drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic.h"
   9 #include "qlcnic_sriov.h"
  10 #include <linux/if_vlan.h>
  11 #include <linux/ipv6.h>
  12 #include <linux/ethtool.h>
  13 #include <linux/interrupt.h>
  14
  15 #define QLCNIC_MAX_TX_QUEUES            1
  16 #define RSS_HASHTYPE_IP_TCP             0x3
  17 #define QLC_83XX_FW_MBX_CMD             0
  18
  19 static const struct qlcnic_mailbox_metadata qlcnic_83xx_mbx_tbl[] = {
  20         {QLCNIC_CMD_CONFIGURE_IP_ADDR, 6, 1},
  21         {QLCNIC_CMD_CONFIG_INTRPT, 18, 34},
  22         {QLCNIC_CMD_CREATE_RX_CTX, 136, 27},
  23         {QLCNIC_CMD_DESTROY_RX_CTX, 2, 1},
  24         {QLCNIC_CMD_CREATE_TX_CTX, 54, 18},
  25         {QLCNIC_CMD_DESTROY_TX_CTX, 2, 1},
  26         {QLCNIC_CMD_CONFIGURE_MAC_LEARNING, 2, 1},
  27         {QLCNIC_CMD_INTRPT_TEST, 22, 12},
  28         {QLCNIC_CMD_SET_MTU, 3, 1},
  29         {QLCNIC_CMD_READ_PHY, 4, 2},
  30         {QLCNIC_CMD_WRITE_PHY, 5, 1},
  31         {QLCNIC_CMD_READ_HW_REG, 4, 1},
  32         {QLCNIC_CMD_GET_FLOW_CTL, 4, 2},
  33         {QLCNIC_CMD_SET_FLOW_CTL, 4, 1},
  34         {QLCNIC_CMD_READ_MAX_MTU, 4, 2},
  35         {QLCNIC_CMD_READ_MAX_LRO, 4, 2},
  36         {QLCNIC_CMD_MAC_ADDRESS, 4, 3},
  37         {QLCNIC_CMD_GET_PCI_INFO, 1, 66},
  38         {QLCNIC_CMD_GET_NIC_INFO, 2, 19},
  39         {QLCNIC_CMD_SET_NIC_INFO, 32, 1},
  40         {QLCNIC_CMD_GET_ESWITCH_CAPABILITY, 4, 3},
  41         {QLCNIC_CMD_TOGGLE_ESWITCH, 4, 1},
  42         {QLCNIC_CMD_GET_ESWITCH_STATUS, 4, 3},
  43         {QLCNIC_CMD_SET_PORTMIRRORING, 4, 1},
  44         {QLCNIC_CMD_CONFIGURE_ESWITCH, 4, 1},
  45         {QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG, 4, 3},
  46         {QLCNIC_CMD_GET_ESWITCH_STATS, 5, 1},
  47         {QLCNIC_CMD_CONFIG_PORT, 4, 1},
  48         {QLCNIC_CMD_TEMP_SIZE, 1, 4},
  49         {QLCNIC_CMD_GET_TEMP_HDR, 5, 5},
  50         {QLCNIC_CMD_GET_LINK_EVENT, 2, 1},
  51         {QLCNIC_CMD_CONFIG_MAC_VLAN, 4, 3},
  52         {QLCNIC_CMD_CONFIG_INTR_COAL, 6, 1},
  53         {QLCNIC_CMD_CONFIGURE_RSS, 14, 1},
  54         {QLCNIC_CMD_CONFIGURE_LED, 2, 1},
  55         {QLCNIC_CMD_CONFIGURE_MAC_RX_MODE, 2, 1},
  56         {QLCNIC_CMD_CONFIGURE_HW_LRO, 2, 1},
  57         {QLCNIC_CMD_GET_STATISTICS, 2, 80},
  58         {QLCNIC_CMD_SET_PORT_CONFIG, 2, 1},
  59         {QLCNIC_CMD_GET_PORT_CONFIG, 2, 2},
  60         {QLCNIC_CMD_GET_LINK_STATUS, 2, 4},
  61         {QLCNIC_CMD_IDC_ACK, 5, 1},
  62         {QLCNIC_CMD_INIT_NIC_FUNC, 2, 1},
  63         {QLCNIC_CMD_STOP_NIC_FUNC, 2, 1},
  64         {QLCNIC_CMD_SET_LED_CONFIG, 5, 1},
  65         {QLCNIC_CMD_GET_LED_CONFIG, 1, 5},
  66         {QLCNIC_CMD_83XX_SET_DRV_VER, 4, 1},
  67         {QLCNIC_CMD_ADD_RCV_RINGS, 130, 26},
  68         {QLCNIC_CMD_CONFIG_VPORT, 4, 4},
  69         {QLCNIC_CMD_BC_EVENT_SETUP, 2, 1},
  70 };
  71
  72 const u32 qlcnic_83xx_ext_reg_tbl[] = {
  73         0x38CC,         /* Global Reset */
  74         0x38F0,         /* Wildcard */
  75         0x38FC,         /* Informant */
  76         0x3038,         /* Host MBX ctrl */
  77         0x303C,         /* FW MBX ctrl */
  78         0x355C,         /* BOOT LOADER ADDRESS REG */
  79         0x3560,         /* BOOT LOADER SIZE REG */
  80         0x3564,         /* FW IMAGE ADDR REG */
  81         0x1000,         /* MBX intr enable */
  82         0x1200,         /* Default Intr mask */
  83         0x1204,         /* Default Interrupt ID */
  84         0x3780,         /* QLC_83XX_IDC_MAJ_VERSION */
  85         0x3784,         /* QLC_83XX_IDC_DEV_STATE */
  86         0x3788,         /* QLC_83XX_IDC_DRV_PRESENCE */
  87         0x378C,         /* QLC_83XX_IDC_DRV_ACK */
  88         0x3790,         /* QLC_83XX_IDC_CTRL */
  89         0x3794,         /* QLC_83XX_IDC_DRV_AUDIT */
  90         0x3798,         /* QLC_83XX_IDC_MIN_VERSION */
  91         0x379C,         /* QLC_83XX_RECOVER_DRV_LOCK */
  92         0x37A0,         /* QLC_83XX_IDC_PF_0 */
  93         0x37A4,         /* QLC_83XX_IDC_PF_1 */
  94         0x37A8,         /* QLC_83XX_IDC_PF_2 */
  95         0x37AC,         /* QLC_83XX_IDC_PF_3 */
  96         0x37B0,         /* QLC_83XX_IDC_PF_4 */
  97         0x37B4,         /* QLC_83XX_IDC_PF_5 */
  98         0x37B8,         /* QLC_83XX_IDC_PF_6 */
  99         0x37BC,         /* QLC_83XX_IDC_PF_7 */
 100         0x37C0,         /* QLC_83XX_IDC_PF_8 */
 101         0x37C4,         /* QLC_83XX_IDC_PF_9 */
 102         0x37C8,         /* QLC_83XX_IDC_PF_10 */
 103         0x37CC,         /* QLC_83XX_IDC_PF_11 */
 104         0x37D0,         /* QLC_83XX_IDC_PF_12 */
 105         0x37D4,         /* QLC_83XX_IDC_PF_13 */
 106         0x37D8,         /* QLC_83XX_IDC_PF_14 */
 107         0x37DC,         /* QLC_83XX_IDC_PF_15 */
 108         0x37E0,         /* QLC_83XX_IDC_DEV_PARTITION_INFO_1 */
 109         0x37E4,         /* QLC_83XX_IDC_DEV_PARTITION_INFO_2 */
 110         0x37F0,         /* QLC_83XX_DRV_OP_MODE */
 111         0x37F4,         /* QLC_83XX_VNIC_STATE */
 112         0x3868,         /* QLC_83XX_DRV_LOCK */
 113         0x386C,         /* QLC_83XX_DRV_UNLOCK */
 114         0x3504,         /* QLC_83XX_DRV_LOCK_ID */
 115         0x34A4,         /* QLC_83XX_ASIC_TEMP */
 116 };
 117
 118 const u32 qlcnic_83xx_reg_tbl[] = {
 119         0x34A8,         /* PEG_HALT_STAT1 */
 120         0x34AC,         /* PEG_HALT_STAT2 */
 121         0x34B0,         /* FW_HEARTBEAT */
 122         0x3500,         /* FLASH LOCK_ID */
 123         0x3528,         /* FW_CAPABILITIES */
 124         0x3538,         /* Driver active, DRV_REG0 */
 125         0x3540,         /* Device state, DRV_REG1 */
 126         0x3544,         /* Driver state, DRV_REG2 */
 127         0x3548,         /* Driver scratch, DRV_REG3 */
 128         0x354C,         /* Device partiton info, DRV_REG4 */
 129         0x3524,         /* Driver IDC ver, DRV_REG5 */
 130         0x3550,         /* FW_VER_MAJOR */
 131         0x3554,         /* FW_VER_MINOR */
 132         0x3558,         /* FW_VER_SUB */
 133         0x359C,         /* NPAR STATE */
 134         0x35FC,         /* FW_IMG_VALID */
 135         0x3650,         /* CMD_PEG_STATE */
 136         0x373C,         /* RCV_PEG_STATE */
 137         0x37B4,         /* ASIC TEMP */
 138         0x356C,         /* FW API */
 139         0x3570,         /* DRV OP MODE */
 140         0x3850,         /* FLASH LOCK */
 141         0x3854,         /* FLASH UNLOCK */
 142 };
 143
 144 static struct qlcnic_hardware_ops qlcnic_83xx_hw_ops = {
 145         .read_crb                       = qlcnic_83xx_read_crb,
 146         .write_crb                      = qlcnic_83xx_write_crb,
 147         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
 148         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
 149         .get_mac_address                = qlcnic_83xx_get_mac_address,
 150         .setup_intr                     = qlcnic_83xx_setup_intr,
 151         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
 152         .mbx_cmd                        = qlcnic_83xx_mbx_op,
 153         .get_func_no                    = qlcnic_83xx_get_func_no,
 154         .api_lock                       = qlcnic_83xx_cam_lock,
 155         .api_unlock                     = qlcnic_83xx_cam_unlock,
 156         .add_sysfs                      = qlcnic_83xx_add_sysfs,
 157         .remove_sysfs                   = qlcnic_83xx_remove_sysfs,
 158         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
 159         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
 160         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
 161         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
 162         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
 163         .setup_link_event               = qlcnic_83xx_setup_link_event,
 164         .get_nic_info                   = qlcnic_83xx_get_nic_info,
 165         .get_pci_info                   = qlcnic_83xx_get_pci_info,
 166         .set_nic_info                   = qlcnic_83xx_set_nic_info,
 167         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
 168         .napi_enable                    = qlcnic_83xx_napi_enable,
 169         .napi_disable                   = qlcnic_83xx_napi_disable,
 170         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
 171         .config_rss                     = qlcnic_83xx_config_rss,
 172         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
 173         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
 174         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
 175         .get_board_info                 = qlcnic_83xx_get_port_info,
 176         .set_mac_filter_count           = qlcnic_83xx_set_mac_filter_count,
 177         .free_mac_list                  = qlcnic_82xx_free_mac_list,
 178 };
 179
 180 static struct qlcnic_nic_template qlcnic_83xx_ops = {
 181         .config_bridged_mode    = qlcnic_config_bridged_mode,
 182         .config_led             = qlcnic_config_led,
 183         .request_reset          = qlcnic_83xx_idc_request_reset,
 184         .cancel_idc_work        = qlcnic_83xx_idc_exit,
 185         .napi_add               = qlcnic_83xx_napi_add,
 186         .napi_del               = qlcnic_83xx_napi_del,
 187         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
 188         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
 189         .shutdown               = qlcnic_83xx_shutdown,
 190         .resume                 = qlcnic_83xx_resume,
 191 };
 192
 193 void qlcnic_83xx_register_map(struct qlcnic_hardware_context *ahw)
 194 {
 195         ahw->hw_ops             = &qlcnic_83xx_hw_ops;
 196         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 197         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 198 }
 199
 200 int qlcnic_83xx_get_fw_version(struct qlcnic_adapter *adapter)
 201 {
 202         u32 fw_major, fw_minor, fw_build;
 203         struct pci_dev *pdev = adapter->pdev;
 204
 205         fw_major = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_MAJOR);
 206         fw_minor = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_MINOR);
 207         fw_build = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_SUB);
 208         adapter->fw_version = QLCNIC_VERSION_CODE(fw_major, fw_minor, fw_build);
 209
 210         dev_info(&pdev->dev, "Driver v%s, firmware version %d.%d.%d\n",
 211                  QLCNIC_LINUX_VERSIONID, fw_major, fw_minor, fw_build);
 212
 213         return adapter->fw_version;
 214 }
 215
 216 static int __qlcnic_set_win_base(struct qlcnic_adapter *adapter, u32 addr)
 217 {
 218         void __iomem *base;
 219         u32 val;
 220
 221         base = adapter->ahw->pci_base0 +
 222                QLC_83XX_CRB_WIN_FUNC(adapter->ahw->pci_func);
 223         writel(addr, base);
 224         val = readl(base);
 225         if (val != addr)
 226                 return -EIO;
 227
 228         return 0;
 229 }
 230
 231 int qlcnic_83xx_rd_reg_indirect(struct qlcnic_adapter *adapter, ulong addr)
 232 {
 233         int ret;
 234         struct qlcnic_hardware_context *ahw = adapter->ahw;
 235
 236         ret = __qlcnic_set_win_base(adapter, (u32) addr);
 237         if (!ret) {
 238                 return QLCRDX(ahw, QLCNIC_WILDCARD);
 239         } else {
 240                 dev_err(&adapter->pdev->dev,
 241                         "%s failed, addr = 0x%x\n", __func__, (int)addr);
 242                 return -EIO;
 243         }
 244 }
 245
 246 int qlcnic_83xx_wrt_reg_indirect(struct qlcnic_adapter *adapter, ulong addr,
 247                                  u32 data)
 248 {
 249         int err;
 250         struct qlcnic_hardware_context *ahw = adapter->ahw;
 251
 252         err = __qlcnic_set_win_base(adapter, (u32) addr);
 253         if (!err) {
 254                 QLCWRX(ahw, QLCNIC_WILDCARD, data);
 255                 return 0;
 256         } else {
 257                 dev_err(&adapter->pdev->dev,
 258                         "%s failed, addr = 0x%x data = 0x%x\n",
 259                         __func__, (int)addr, data);
 260                 return err;
 261         }
 262 }
 263
 264 int qlcnic_83xx_setup_intr(struct qlcnic_adapter *adapter, u8 num_intr)
 265 {
 266         int err, i, num_msix;
 267         struct qlcnic_hardware_context *ahw = adapter->ahw;
 268
 269         if (!num_intr)
 270                 num_intr = QLCNIC_DEF_NUM_STS_DESC_RINGS;
 271         num_msix = rounddown_pow_of_two(min_t(int, num_online_cpus(),
 272                                               num_intr));
 273         /* account for AEN interrupt MSI-X based interrupts */
 274         num_msix += 1;
 275
 276         if (!(adapter->flags & QLCNIC_TX_INTR_SHARED))
 277                 num_msix += adapter->max_drv_tx_rings;
 278
 279         err = qlcnic_enable_msix(adapter, num_msix);
 280         if (err == -ENOMEM)
 281                 return err;
 282         if (adapter->flags & QLCNIC_MSIX_ENABLED)
 283                 num_msix = adapter->ahw->num_msix;
 284         else {
 285                 if (qlcnic_sriov_vf_check(adapter))
 286                         return -EINVAL;
 287                 num_msix = 1;
 288         }
 289         /* setup interrupt mapping table for fw */
 290         ahw->intr_tbl = vzalloc(num_msix *
 291                                 sizeof(struct qlcnic_intrpt_config));
 292         if (!ahw->intr_tbl)
 293                 return -ENOMEM;
 294         if (!(adapter->flags & QLCNIC_MSIX_ENABLED)) {
 295                 /* MSI-X enablement failed, use legacy interrupt */
 296                 adapter->tgt_status_reg = ahw->pci_base0 + QLC_83XX_INTX_PTR;
 297                 adapter->tgt_mask_reg = ahw->pci_base0 + QLC_83XX_INTX_MASK;
 298                 adapter->isr_int_vec = ahw->pci_base0 + QLC_83XX_INTX_TRGR;
 299                 adapter->msix_entries[0].vector = adapter->pdev->irq;
 300                 dev_info(&adapter->pdev->dev, "using legacy interrupt\n");
 301         }
 302
 303         for (i = 0; i < num_msix; i++) {
 304                 if (adapter->flags & QLCNIC_MSIX_ENABLED)
 305                         ahw->intr_tbl[i].type = QLCNIC_INTRPT_MSIX;
 306                 else
 307                         ahw->intr_tbl[i].type = QLCNIC_INTRPT_INTX;
 308                 ahw->intr_tbl[i].id = i;
 309                 ahw->intr_tbl[i].src = 0;
 310         }
 311         return 0;
 312 }
 313
 314 inline void qlcnic_83xx_clear_legacy_intr_mask(struct qlcnic_adapter *adapter)
 315 {
 316         writel(0, adapter->tgt_mask_reg);
 317 }
 318
 319 inline void qlcnic_83xx_set_legacy_intr_mask(struct qlcnic_adapter *adapter)
 320 {
 321         writel(1, adapter->tgt_mask_reg);
 322 }
 323
 324 /* Enable MSI-x and INT-x interrupts */
 325 void qlcnic_83xx_enable_intr(struct qlcnic_adapter *adapter,
 326                              struct qlcnic_host_sds_ring *sds_ring)
 327 {
 328         writel(0, sds_ring->crb_intr_mask);
 329 }
 330
 331 /* Disable MSI-x and INT-x interrupts */
 332 void qlcnic_83xx_disable_intr(struct qlcnic_adapter *adapter,
 333                               struct qlcnic_host_sds_ring *sds_ring)
 334 {
 335         writel(1, sds_ring->crb_intr_mask);
 336 }
 337
 338 inline void qlcnic_83xx_enable_legacy_msix_mbx_intr(struct qlcnic_adapter
 339                                                     *adapter)
 340 {
 341         u32 mask;
 342
 343         /* Mailbox in MSI-x mode and Legacy Interrupt share the same
 344          * source register. We could be here before contexts are created
 345          * and sds_ring->crb_intr_mask has not been initialized, calculate
 346          * BAR offset for Interrupt Source Register
 347          */
 348         mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK);
 349         writel(0, adapter->ahw->pci_base0 + mask);
 350 }
 351
 352 void qlcnic_83xx_disable_mbx_intr(struct qlcnic_adapter *adapter)
 353 {
 354         u32 mask;
 355
 356         mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK);
 357         writel(1, adapter->ahw->pci_base0 + mask);
 358         QLCWRX(adapter->ahw, QLCNIC_MBX_INTR_ENBL, 0);
 359 }
 360
 361 static inline void qlcnic_83xx_get_mbx_data(struct qlcnic_adapter *adapter,
 362                                      struct qlcnic_cmd_args *cmd)
 363 {
 364         int i;
 365         for (i = 0; i < cmd->rsp.num; i++)
 366                 cmd->rsp.arg[i] = readl(QLCNIC_MBX_FW(adapter->ahw, i));
 367 }
 368
 369 irqreturn_t qlcnic_83xx_clear_legacy_intr(struct qlcnic_adapter *adapter)
 370 {
 371         u32 intr_val;
 372         struct qlcnic_hardware_context *ahw = adapter->ahw;
 373         int retries = 0;
 374
 375         intr_val = readl(adapter->tgt_status_reg);
 376
 377         if (!QLC_83XX_VALID_INTX_BIT31(intr_val))
 378                 return IRQ_NONE;
 379
 380         if (QLC_83XX_INTX_FUNC(intr_val) != adapter->ahw->pci_func) {
 381                 adapter->stats.spurious_intr++;
 382                 return IRQ_NONE;
 383         }
 384         /* The barrier is required to ensure writes to the registers */
 385         wmb();
 386
 387         /* clear the interrupt trigger control register */
 388         writel(0, adapter->isr_int_vec);
 389         intr_val = readl(adapter->isr_int_vec);
 390         do {
 391                 intr_val = readl(adapter->tgt_status_reg);
 392                 if (QLC_83XX_INTX_FUNC(intr_val) != ahw->pci_func)
 393                         break;
 394                 retries++;
 395         } while (QLC_83XX_VALID_INTX_BIT30(intr_val) &&
 396                  (retries < QLC_83XX_LEGACY_INTX_MAX_RETRY));
 397
 398         return IRQ_HANDLED;
 399 }
 400
 401 static void qlcnic_83xx_poll_process_aen(struct qlcnic_adapter *adapter)
 402 {
 403         u32 resp, event;
 404         unsigned long flags;
 405
 406         spin_lock_irqsave(&adapter->ahw->mbx_lock, flags);
 407
 408         resp = QLCRDX(adapter->ahw, QLCNIC_FW_MBX_CTRL);
 409         if (!(resp & QLCNIC_SET_OWNER))
 410                 goto out;
 411
 412         event = readl(QLCNIC_MBX_FW(adapter->ahw, 0));
 413         if (event &  QLCNIC_MBX_ASYNC_EVENT)
 414                 __qlcnic_83xx_process_aen(adapter);
 415
 416 out:
 417         qlcnic_83xx_enable_legacy_msix_mbx_intr(adapter);
 418         spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
 419 }
 420
 421 irqreturn_t qlcnic_83xx_intr(int irq, void *data)
 422 {
 423         struct qlcnic_adapter *adapter = data;
 424         struct qlcnic_host_sds_ring *sds_ring;
 425         struct qlcnic_hardware_context *ahw = adapter->ahw;
 426
 427         if (qlcnic_83xx_clear_legacy_intr(adapter) == IRQ_NONE)
 428                 return IRQ_NONE;
 429
 430         qlcnic_83xx_poll_process_aen(adapter);
 431
 432         if (ahw->diag_test == QLCNIC_INTERRUPT_TEST) {
 433                 ahw->diag_cnt++;
 434                 qlcnic_83xx_enable_legacy_msix_mbx_intr(adapter);
 435                 return IRQ_HANDLED;
 436         }
 437
 438         if (!test_bit(__QLCNIC_DEV_UP, &adapter->state)) {
 439                 qlcnic_83xx_enable_legacy_msix_mbx_intr(adapter);
 440         } else {
 441                 sds_ring = &adapter->recv_ctx->sds_rings[0];
 442                 napi_schedule(&sds_ring->napi);
 443         }
 444
 445         return IRQ_HANDLED;
 446 }
 447
 448 irqreturn_t qlcnic_83xx_tmp_intr(int irq, void *data)
 449 {
 450         struct qlcnic_host_sds_ring *sds_ring = data;
 451         struct qlcnic_adapter *adapter = sds_ring->adapter;
 452
 453         if (adapter->flags & QLCNIC_MSIX_ENABLED)
 454                 goto done;
 455
 456         if (adapter->nic_ops->clear_legacy_intr(adapter) == IRQ_NONE)
 457                 return IRQ_NONE;
 458
 459 done:
 460         adapter->ahw->diag_cnt++;
 461         qlcnic_83xx_enable_intr(adapter, sds_ring);
 462
 463         return IRQ_HANDLED;
 464 }
 465
 466 void qlcnic_83xx_free_mbx_intr(struct qlcnic_adapter *adapter)
 467 {
 468         u32 num_msix;
 469
 470         if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
 471                 qlcnic_83xx_set_legacy_intr_mask(adapter);
 472
 473         qlcnic_83xx_disable_mbx_intr(adapter);
 474
 475         if (adapter->flags & QLCNIC_MSIX_ENABLED)
 476                 num_msix = adapter->ahw->num_msix - 1;
 477         else
 478                 num_msix = 0;
 479
 480         msleep(20);
 481         synchronize_irq(adapter->msix_entries[num_msix].vector);
 482         free_irq(adapter->msix_entries[num_msix].vector, adapter);
 483 }
 484
 485 int qlcnic_83xx_setup_mbx_intr(struct qlcnic_adapter *adapter)
 486 {
 487         irq_handler_t handler;
 488         u32 val;
 489         int err = 0;
 490         unsigned long flags = 0;
 491
 492         if (!(adapter->flags & QLCNIC_MSI_ENABLED) &&
 493             !(adapter->flags & QLCNIC_MSIX_ENABLED))
 494                 flags |= IRQF_SHARED;
 495
 496         if (adapter->flags & QLCNIC_MSIX_ENABLED) {
 497                 handler = qlcnic_83xx_handle_aen;
 498                 val = adapter->msix_entries[adapter->ahw->num_msix - 1].vector;
 499                 err = request_irq(val, handler, flags, "qlcnic-MB", adapter);
 500                 if (err) {
 501                         dev_err(&adapter->pdev->dev,
 502                                 "failed to register MBX interrupt\n");
 503                         return err;
 504                 }
 505         } else {
 506                 handler = qlcnic_83xx_intr;
 507                 val = adapter->msix_entries[0].vector;
 508                 err = request_irq(val, handler, flags, "qlcnic", adapter);
 509                 if (err) {
 510                         dev_err(&adapter->pdev->dev,
 511                                 "failed to register INTx interrupt\n");
 512                         return err;
 513                 }
 514                 qlcnic_83xx_clear_legacy_intr_mask(adapter);
 515         }
 516
 517         /* Enable mailbox interrupt */
 518         qlcnic_83xx_enable_mbx_intrpt(adapter);
 519
 520         return err;
 521 }
 522
 523 void qlcnic_83xx_get_func_no(struct qlcnic_adapter *adapter)
 524 {
 525         u32 val = QLCRDX(adapter->ahw, QLCNIC_INFORMANT);
 526         adapter->ahw->pci_func = (val >> 24) & 0xff;
 527 }
 528
 529 int qlcnic_83xx_cam_lock(struct qlcnic_adapter *adapter)
 530 {
 531         void __iomem *addr;
 532         u32 val, limit = 0;
 533
 534         struct qlcnic_hardware_context *ahw = adapter->ahw;
 535
 536         addr = ahw->pci_base0 + QLC_83XX_SEM_LOCK_FUNC(ahw->pci_func);
 537         do {
 538                 val = readl(addr);
 539                 if (val) {
 540                         /* write the function number to register */
 541                         QLC_SHARED_REG_WR32(adapter, QLCNIC_FLASH_LOCK_OWNER,
 542                                             ahw->pci_func);
 543                         return 0;
 544                 }
 545                 usleep_range(1000, 2000);
 546         } while (++limit <= QLCNIC_PCIE_SEM_TIMEOUT);
 547
 548         return -EIO;
 549 }
 550
 551 void qlcnic_83xx_cam_unlock(struct qlcnic_adapter *adapter)
 552 {
 553         void __iomem *addr;
 554         u32 val;
 555         struct qlcnic_hardware_context *ahw = adapter->ahw;
 556
 557         addr = ahw->pci_base0 + QLC_83XX_SEM_UNLOCK_FUNC(ahw->pci_func);
 558         val = readl(addr);
 559 }
 560
 561 void qlcnic_83xx_read_crb(struct qlcnic_adapter *adapter, char *buf,
 562                           loff_t offset, size_t size)
 563 {
 564         int ret;
 565         u32 data;
 566
 567         if (qlcnic_api_lock(adapter)) {
 568                 dev_err(&adapter->pdev->dev,
 569                         "%s: failed to acquire lock. addr offset 0x%x\n",
 570                         __func__, (u32)offset);
 571                 return;
 572         }
 573
 574         ret = qlcnic_83xx_rd_reg_indirect(adapter, (u32) offset);
 575         qlcnic_api_unlock(adapter);
 576
 577         if (ret == -EIO) {
 578                 dev_err(&adapter->pdev->dev,
 579                         "%s: failed. addr offset 0x%x\n",
 580                         __func__, (u32)offset);
 581                 return;
 582         }
 583         data = ret;
 584         memcpy(buf, &data, size);
 585 }
 586
 587 void qlcnic_83xx_write_crb(struct qlcnic_adapter *adapter, char *buf,
 588                            loff_t offset, size_t size)
 589 {
 590         u32 data;
 591
 592         memcpy(&data, buf, size);
 593         qlcnic_83xx_wrt_reg_indirect(adapter, (u32) offset, data);
 594 }
 595
 596 int qlcnic_83xx_get_port_info(struct qlcnic_adapter *adapter)
 597 {
 598         int status;
 599
 600         status = qlcnic_83xx_get_port_config(adapter);
 601         if (status) {
 602                 dev_err(&adapter->pdev->dev,
 603                         "Get Port Info failed\n");
 604         } else {
 605                 if (QLC_83XX_SFP_10G_CAPABLE(adapter->ahw->port_config))
 606                         adapter->ahw->port_type = QLCNIC_XGBE;
 607                 else
 608                         adapter->ahw->port_type = QLCNIC_GBE;
 609
 610                 if (QLC_83XX_AUTONEG(adapter->ahw->port_config))
 611                         adapter->ahw->link_autoneg = AUTONEG_ENABLE;
 612         }
 613         return status;
 614 }
 615
 616 void qlcnic_83xx_set_mac_filter_count(struct qlcnic_adapter *adapter)
 617 {
 618         struct qlcnic_hardware_context *ahw = adapter->ahw;
 619         u16 act_pci_fn = ahw->act_pci_func;
 620         u16 count;
 621
 622         ahw->max_mc_count = QLC_83XX_MAX_MC_COUNT;
 623         if (act_pci_fn <= 2)
 624                 count = (QLC_83XX_MAX_UC_COUNT - QLC_83XX_MAX_MC_COUNT) /
 625                          act_pci_fn;
 626         else
 627                 count = (QLC_83XX_LB_MAX_FILTERS - QLC_83XX_MAX_MC_COUNT) /
 628                          act_pci_fn;
 629         ahw->max_uc_count = count;
 630 }
 631
 632 void qlcnic_83xx_enable_mbx_intrpt(struct qlcnic_adapter *adapter)
 633 {
 634         u32 val;
 635
 636         if (adapter->flags & QLCNIC_MSIX_ENABLED)
 637                 val = BIT_2 | ((adapter->ahw->num_msix - 1) << 8);
 638         else
 639                 val = BIT_2;
 640
 641         QLCWRX(adapter->ahw, QLCNIC_MBX_INTR_ENBL, val);
 642         qlcnic_83xx_enable_legacy_msix_mbx_intr(adapter);
 643 }
 644
 645 void qlcnic_83xx_check_vf(struct qlcnic_adapter *adapter,
 646                           const struct pci_device_id *ent)
 647 {
 648         u32 op_mode, priv_level;
 649         struct qlcnic_hardware_context *ahw = adapter->ahw;
 650
 651         ahw->fw_hal_version = 2;
 652         qlcnic_get_func_no(adapter);
 653
 654         if (qlcnic_sriov_vf_check(adapter)) {
 655                 qlcnic_sriov_vf_set_ops(adapter);
 656                 return;
 657         }
 658
 659         /* Determine function privilege level */
 660         op_mode = QLCRDX(adapter->ahw, QLC_83XX_DRV_OP_MODE);
 661         if (op_mode == QLC_83XX_DEFAULT_OPMODE)
 662                 priv_level = QLCNIC_MGMT_FUNC;
 663         else
 664                 priv_level = QLC_83XX_GET_FUNC_PRIVILEGE(op_mode,
 665                                                          ahw->pci_func);
 666
 667         if (priv_level == QLCNIC_NON_PRIV_FUNC) {
 668                 ahw->op_mode = QLCNIC_NON_PRIV_FUNC;
 669                 dev_info(&adapter->pdev->dev,
 670                          "HAL Version: %d Non Privileged function\n",
 671                          ahw->fw_hal_version);
 672                 adapter->nic_ops = &qlcnic_vf_ops;
 673         } else {
 674                 if (pci_find_ext_capability(adapter->pdev,
 675                                             PCI_EXT_CAP_ID_SRIOV))
 676                         set_bit(__QLCNIC_SRIOV_CAPABLE, &adapter->state);
 677                 adapter->nic_ops = &qlcnic_83xx_ops;
 678         }
 679 }
 680
 681 static void qlcnic_83xx_handle_link_aen(struct qlcnic_adapter *adapter,
 682                                         u32 data[]);
 683 static void qlcnic_83xx_handle_idc_comp_aen(struct qlcnic_adapter *adapter,
 684                                             u32 data[]);
 685
 686 static void qlcnic_dump_mbx(struct qlcnic_adapter *adapter,
 687                             struct qlcnic_cmd_args *cmd)
 688 {
 689         int i;
 690
 691         dev_info(&adapter->pdev->dev,
 692                  "Host MBX regs(%d)\n", cmd->req.num);
 693         for (i = 0; i < cmd->req.num; i++) {
 694                 if (i && !(i % 8))
 695                         pr_info("\n");
 696                 pr_info("%08x ", cmd->req.arg[i]);
 697         }
 698         pr_info("\n");
 699         dev_info(&adapter->pdev->dev,
 700                  "FW MBX regs(%d)\n", cmd->rsp.num);
 701         for (i = 0; i < cmd->rsp.num; i++) {
 702                 if (i && !(i % 8))
 703                         pr_info("\n");
 704                 pr_info("%08x ", cmd->rsp.arg[i]);
 705         }
 706         pr_info("\n");
 707 }
 708
 709 /* Mailbox response for mac rcode */
 710 u32 qlcnic_83xx_mac_rcode(struct qlcnic_adapter *adapter)
 711 {
 712         u32 fw_data;
 713         u8 mac_cmd_rcode;
 714
 715         fw_data = readl(QLCNIC_MBX_FW(adapter->ahw, 2));
 716         mac_cmd_rcode = (u8)fw_data;
 717         if (mac_cmd_rcode == QLC_83XX_NO_NIC_RESOURCE ||
 718             mac_cmd_rcode == QLC_83XX_MAC_PRESENT ||
 719             mac_cmd_rcode == QLC_83XX_MAC_ABSENT)
 720                 return QLCNIC_RCODE_SUCCESS;
 721         return 1;
 722 }
 723
 724 u32 qlcnic_83xx_mbx_poll(struct qlcnic_adapter *adapter, u32 *wait_time)
 725 {
 726         u32 data;
 727         struct qlcnic_hardware_context *ahw = adapter->ahw;
 728         /* wait for mailbox completion */
 729         do {
 730                 data = QLCRDX(ahw, QLCNIC_FW_MBX_CTRL);
 731                 if (++(*wait_time) > QLCNIC_MBX_TIMEOUT) {
 732                         data = QLCNIC_RCODE_TIMEOUT;
 733                         break;
 734                 }
 735                 mdelay(1);
 736         } while (!data);
 737         return data;
 738 }
 739
 740 int qlcnic_83xx_mbx_op(struct qlcnic_adapter *adapter,
 741                        struct qlcnic_cmd_args *cmd)
 742 {
 743         int i;
 744         u16 opcode;
 745         u8 mbx_err_code;
 746         unsigned long flags;
 747         struct qlcnic_hardware_context *ahw = adapter->ahw;
 748         u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, wait_time = 0;
 749
 750         opcode = LSW(cmd->req.arg[0]);
 751         if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
 752                 dev_info(&adapter->pdev->dev,
 753                          "Mailbox cmd attempted, 0x%x\n", opcode);
 754                 dev_info(&adapter->pdev->dev, "Mailbox detached\n");
 755                 return 0;
 756         }
 757
 758         spin_lock_irqsave(&adapter->ahw->mbx_lock, flags);
 759         mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
 760
 761         if (mbx_val) {
 762                 QLCDB(adapter, DRV,
 763                       "Mailbox cmd attempted, 0x%x\n", opcode);
 764                 QLCDB(adapter, DRV,
 765                       "Mailbox not available, 0x%x, collect FW dump\n",
 766                       mbx_val);
 767                 cmd->rsp.arg[0] = QLCNIC_RCODE_TIMEOUT;
 768                 spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
 769                 return cmd->rsp.arg[0];
 770         }
 771
 772         /* Fill in mailbox registers */
 773         mbx_cmd = cmd->req.arg[0];
 774         writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
 775         for (i = 1; i < cmd->req.num; i++)
 776                 writel(cmd->req.arg[i], QLCNIC_MBX_HOST(ahw, i));
 777
 778         /* Signal FW about the impending command */
 779         QLCWRX(ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER);
 780 poll:
 781         rsp = qlcnic_83xx_mbx_poll(adapter, &wait_time);
 782         if (rsp != QLCNIC_RCODE_TIMEOUT) {
 783                 /* Get the FW response data */
 784                 fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
 785                 if (fw_data &  QLCNIC_MBX_ASYNC_EVENT) {
 786                         __qlcnic_83xx_process_aen(adapter);
 787                         goto poll;
 788                 }
 789                 mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
 790                 rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
 791                 opcode = QLCNIC_MBX_RSP(fw_data);
 792                 qlcnic_83xx_get_mbx_data(adapter, cmd);
 793
 794                 switch (mbx_err_code) {
 795                 case QLCNIC_MBX_RSP_OK:
 796                 case QLCNIC_MBX_PORT_RSP_OK:
 797                         rsp = QLCNIC_RCODE_SUCCESS;
 798                         break;
 799                 default:
 800                         if (opcode == QLCNIC_CMD_CONFIG_MAC_VLAN) {
 801                                 rsp = qlcnic_83xx_mac_rcode(adapter);
 802                                 if (!rsp)
 803                                         goto out;
 804                         }
 805                         dev_err(&adapter->pdev->dev,
 806                                 "MBX command 0x%x failed with err:0x%x\n",
 807                                 opcode, mbx_err_code);
 808                         rsp = mbx_err_code;
 809                         qlcnic_dump_mbx(adapter, cmd);
 810                         break;
 811                 }
 812                 goto out;
 813         }
 814
 815         dev_err(&adapter->pdev->dev, "MBX command 0x%x timed out\n",
 816                 QLCNIC_MBX_RSP(mbx_cmd));
 817         rsp = QLCNIC_RCODE_TIMEOUT;
 818 out:
 819         /* clear fw mbx control register */
 820         QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
 821         spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
 822         return rsp;
 823 }
 824
 825 int qlcnic_83xx_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
 826                                struct qlcnic_adapter *adapter, u32 type)
 827 {
 828         int i, size;
 829         u32 temp;
 830         const struct qlcnic_mailbox_metadata *mbx_tbl;
 831
 832         mbx_tbl = qlcnic_83xx_mbx_tbl;
 833         size = ARRAY_SIZE(qlcnic_83xx_mbx_tbl);
 834         for (i = 0; i < size; i++) {
 835                 if (type == mbx_tbl[i].cmd) {
 836                         mbx->op_type = QLC_83XX_FW_MBX_CMD;
 837                         mbx->req.num = mbx_tbl[i].in_args;
 838                         mbx->rsp.num = mbx_tbl[i].out_args;
 839                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 840                                                GFP_ATOMIC);
 841                         if (!mbx->req.arg)
 842                                 return -ENOMEM;
 843                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 844                                                GFP_ATOMIC);
 845                         if (!mbx->rsp.arg) {
 846                                 kfree(mbx->req.arg);
 847                                 mbx->req.arg = NULL;
 848                                 return -ENOMEM;
 849                         }
 850                         memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
 851                         memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
 852                         temp = adapter->ahw->fw_hal_version << 29;
 853                         mbx->req.arg[0] = (type | (mbx->req.num << 16) | temp);
 854                         return 0;
 855                 }
 856         }
 857         return -EINVAL;
 858 }
 859
 860 void qlcnic_83xx_idc_aen_work(struct work_struct *work)
 861 {
 862         struct qlcnic_adapter *adapter;
 863         struct qlcnic_cmd_args cmd;
 864         int i, err = 0;
 865
 866         adapter = container_of(work, struct qlcnic_adapter, idc_aen_work.work);
 867         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_IDC_ACK);
 868         if (err)
 869                 return;
 870
 871         for (i = 1; i < QLC_83XX_MBX_AEN_CNT; i++)
 872                 cmd.req.arg[i] = adapter->ahw->mbox_aen[i];
 873
 874         err = qlcnic_issue_cmd(adapter, &cmd);
 875         if (err)
 876                 dev_info(&adapter->pdev->dev,
 877                          "%s: Mailbox IDC ACK failed.\n", __func__);
 878         qlcnic_free_mbx_args(&cmd);
 879 }
 880
 881 static void qlcnic_83xx_handle_idc_comp_aen(struct qlcnic_adapter *adapter,
 882                                             u32 data[])
 883 {
 884         dev_dbg(&adapter->pdev->dev, "Completion AEN:0x%x.\n",
 885                 QLCNIC_MBX_RSP(data[0]));
 886         clear_bit(QLC_83XX_IDC_COMP_AEN, &adapter->ahw->idc.status);
 887         return;
 888 }
 889
 890 void __qlcnic_83xx_process_aen(struct qlcnic_adapter *adapter)
 891 {
 892         u32 event[QLC_83XX_MBX_AEN_CNT];
 893         int i;
 894         struct qlcnic_hardware_context *ahw = adapter->ahw;
 895
 896         for (i = 0; i < QLC_83XX_MBX_AEN_CNT; i++)
 897                 event[i] = readl(QLCNIC_MBX_FW(ahw, i));
 898
 899         switch (QLCNIC_MBX_RSP(event[0])) {
 900
 901         case QLCNIC_MBX_LINK_EVENT:
 902                 qlcnic_83xx_handle_link_aen(adapter, event);
 903                 break;
 904         case QLCNIC_MBX_COMP_EVENT:
 905                 qlcnic_83xx_handle_idc_comp_aen(adapter, event);
 906                 break;
 907         case QLCNIC_MBX_REQUEST_EVENT:
 908                 for (i = 0; i < QLC_83XX_MBX_AEN_CNT; i++)
 909                         adapter->ahw->mbox_aen[i] = QLCNIC_MBX_RSP(event[i]);
 910                 queue_delayed_work(adapter->qlcnic_wq,
 911                                    &adapter->idc_aen_work, 0);
 912                 break;
 913         case QLCNIC_MBX_TIME_EXTEND_EVENT:
 914                 break;
 915         case QLCNIC_MBX_BC_EVENT:
 916                 qlcnic_sriov_handle_bc_event(adapter, event[1]);
 917                 break;
 918         case QLCNIC_MBX_SFP_INSERT_EVENT:
 919                 dev_info(&adapter->pdev->dev, "SFP+ Insert AEN:0x%x.\n",
 920                          QLCNIC_MBX_RSP(event[0]));
 921                 break;
 922         case QLCNIC_MBX_SFP_REMOVE_EVENT:
 923                 dev_info(&adapter->pdev->dev, "SFP Removed AEN:0x%x.\n",
 924                          QLCNIC_MBX_RSP(event[0]));
 925                 break;
 926         default:
 927                 dev_dbg(&adapter->pdev->dev, "Unsupported AEN:0x%x.\n",
 928                         QLCNIC_MBX_RSP(event[0]));
 929                 break;
 930         }
 931
 932         QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
 933 }
 934
 935 static void qlcnic_83xx_process_aen(struct qlcnic_adapter *adapter)
 936 {
 937         struct qlcnic_hardware_context *ahw = adapter->ahw;
 938         u32 resp, event;
 939         unsigned long flags;
 940
 941         spin_lock_irqsave(&ahw->mbx_lock, flags);
 942
 943         resp = QLCRDX(ahw, QLCNIC_FW_MBX_CTRL);
 944         if (resp & QLCNIC_SET_OWNER) {
 945                 event = readl(QLCNIC_MBX_FW(ahw, 0));
 946                 if (event &  QLCNIC_MBX_ASYNC_EVENT)
 947                         __qlcnic_83xx_process_aen(adapter);
 948         }
 949
 950         spin_unlock_irqrestore(&ahw->mbx_lock, flags);
 951 }
 952
 953 static void qlcnic_83xx_mbx_poll_work(struct work_struct *work)
 954 {
 955         struct qlcnic_adapter *adapter;
 956
 957         adapter = container_of(work, struct qlcnic_adapter, mbx_poll_work.work);
 958
 959         if (!test_bit(__QLCNIC_MBX_POLL_ENABLE, &adapter->state))
 960                 return;
 961
 962         qlcnic_83xx_process_aen(adapter);
 963         queue_delayed_work(adapter->qlcnic_wq, &adapter->mbx_poll_work,
 964                            (HZ / 10));
 965 }
 966
 967 void qlcnic_83xx_enable_mbx_poll(struct qlcnic_adapter *adapter)
 968 {
 969         if (test_and_set_bit(__QLCNIC_MBX_POLL_ENABLE, &adapter->state))
 970                 return;
 971
 972         INIT_DELAYED_WORK(&adapter->mbx_poll_work, qlcnic_83xx_mbx_poll_work);
 973 }
 974
 975 void qlcnic_83xx_disable_mbx_poll(struct qlcnic_adapter *adapter)
 976 {
 977         if (!test_and_clear_bit(__QLCNIC_MBX_POLL_ENABLE, &adapter->state))
 978                 return;
 979         cancel_delayed_work_sync(&adapter->mbx_poll_work);
 980 }
 981
 982 static int qlcnic_83xx_add_rings(struct qlcnic_adapter *adapter)
 983 {
 984         int index, i, err, sds_mbx_size;
 985         u32 *buf, intrpt_id, intr_mask;
 986         u16 context_id;
 987         u8 num_sds;
 988         struct qlcnic_cmd_args cmd;
 989         struct qlcnic_host_sds_ring *sds;
 990         struct qlcnic_sds_mbx sds_mbx;
 991         struct qlcnic_add_rings_mbx_out *mbx_out;
 992         struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
 993         struct qlcnic_hardware_context *ahw = adapter->ahw;
 994
 995         sds_mbx_size = sizeof(struct qlcnic_sds_mbx);
 996         context_id = recv_ctx->context_id;
 997         num_sds = (adapter->max_sds_rings - QLCNIC_MAX_RING_SETS);
 998         ahw->hw_ops->alloc_mbx_args(&cmd, adapter,
 999                                     QLCNIC_CMD_ADD_RCV_RINGS);
1000         cmd.req.arg[1] = 0 | (num_sds << 8) | (context_id << 16);
1001
1002         /* set up status rings, mbx 2-81 */
1003         index = 2;
1004         for (i = 8; i < adapter->max_sds_rings; i++) {
1005                 memset(&sds_mbx, 0, sds_mbx_size);
1006                 sds = &recv_ctx->sds_rings[i];
1007                 sds->consumer = 0;
1008                 memset(sds->desc_head, 0, STATUS_DESC_RINGSIZE(sds));
1009                 sds_mbx.phy_addr_low = LSD(sds->phys_addr);
1010                 sds_mbx.phy_addr_high = MSD(sds->phys_addr);
1011                 sds_mbx.sds_ring_size = sds->num_desc;
1012
1013                 if (adapter->flags & QLCNIC_MSIX_ENABLED)
1014                         intrpt_id = ahw->intr_tbl[i].id;
1015                 else
1016                         intrpt_id = QLCRDX(ahw, QLCNIC_DEF_INT_ID);
1017
1018                 if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST)
1019                         sds_mbx.intrpt_id = intrpt_id;
1020                 else
1021                         sds_mbx.intrpt_id = 0xffff;
1022                 sds_mbx.intrpt_val = 0;
1023                 buf = &cmd.req.arg[index];
1024                 memcpy(buf, &sds_mbx, sds_mbx_size);
1025                 index += sds_mbx_size / sizeof(u32);
1026         }
1027
1028         /* send the mailbox command */
1029         err = ahw->hw_ops->mbx_cmd(adapter, &cmd);
1030         if (err) {
1031                 dev_err(&adapter->pdev->dev,
1032                         "Failed to add rings %d\n", err);
1033                 goto out;
1034         }
1035
1036         mbx_out = (struct qlcnic_add_rings_mbx_out *)&cmd.rsp.arg[1];
1037         index = 0;
1038         /* status descriptor ring */
1039         for (i = 8; i < adapter->max_sds_rings; i++) {
1040                 sds = &recv_ctx->sds_rings[i];
1041                 sds->crb_sts_consumer = ahw->pci_base0 +
1042                                         mbx_out->host_csmr[index];
1043                 if (adapter->flags & QLCNIC_MSIX_ENABLED)
1044                         intr_mask = ahw->intr_tbl[i].src;
1045                 else
1046                         intr_mask = QLCRDX(ahw, QLCNIC_DEF_INT_MASK);
1047
1048                 sds->crb_intr_mask = ahw->pci_base0 + intr_mask;
1049                 index++;
1050         }
1051 out:
1052         qlcnic_free_mbx_args(&cmd);
1053         return err;
1054 }
1055
1056 void qlcnic_83xx_del_rx_ctx(struct qlcnic_adapter *adapter)
1057 {
1058         int err;
1059         u32 temp = 0;
1060         struct qlcnic_cmd_args cmd;
1061         struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
1062
1063         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DESTROY_RX_CTX))
1064                 return;
1065
1066         if (qlcnic_sriov_pf_check(adapter) || qlcnic_sriov_vf_check(adapter))
1067                 cmd.req.arg[0] |= (0x3 << 29);
1068
1069         if (qlcnic_sriov_pf_check(adapter))
1070                 qlcnic_pf_set_interface_id_del_rx_ctx(adapter, &temp);
1071
1072         cmd.req.arg[1] = recv_ctx->context_id | temp;
1073         err = qlcnic_issue_cmd(adapter, &cmd);
1074         if (err)
1075                 dev_err(&adapter->pdev->dev,
1076                         "Failed to destroy rx ctx in firmware\n");
1077
1078         recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
1079         qlcnic_free_mbx_args(&cmd);
1080 }
1081
1082 int qlcnic_83xx_create_rx_ctx(struct qlcnic_adapter *adapter)
1083 {
1084         int i, err, index, sds_mbx_size, rds_mbx_size;
1085         u8 num_sds, num_rds;
1086         u32 *buf, intrpt_id, intr_mask, cap = 0;
1087         struct qlcnic_host_sds_ring *sds;
1088         struct qlcnic_host_rds_ring *rds;
1089         struct qlcnic_sds_mbx sds_mbx;
1090         struct qlcnic_rds_mbx rds_mbx;
1091         struct qlcnic_cmd_args cmd;
1092         struct qlcnic_rcv_mbx_out *mbx_out;
1093         struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
1094         struct qlcnic_hardware_context *ahw = adapter->ahw;
1095         num_rds = adapter->max_rds_rings;
1096
1097         if (adapter->max_sds_rings <= QLCNIC_MAX_RING_SETS)
1098                 num_sds = adapter->max_sds_rings;
1099         else
1100                 num_sds = QLCNIC_MAX_RING_SETS;
1101
1102         sds_mbx_size = sizeof(struct qlcnic_sds_mbx);
1103         rds_mbx_size = sizeof(struct qlcnic_rds_mbx);
1104         cap = QLCNIC_CAP0_LEGACY_CONTEXT;
1105
1106         if (adapter->flags & QLCNIC_FW_LRO_MSS_CAP)
1107                 cap |= QLC_83XX_FW_CAP_LRO_MSS;
1108
1109         /* set mailbox hdr and capabilities */
1110         err = qlcnic_alloc_mbx_args(&cmd, adapter,
1111                                     QLCNIC_CMD_CREATE_RX_CTX);
1112         if (err)
1113                 return err;
1114
1115         if (qlcnic_sriov_pf_check(adapter) || qlcnic_sriov_vf_check(adapter))
1116                 cmd.req.arg[0] |= (0x3 << 29);
1117
1118         cmd.req.arg[1] = cap;
1119         cmd.req.arg[5] = 1 | (num_rds << 5) | (num_sds << 8) |
1120                          (QLC_83XX_HOST_RDS_MODE_UNIQUE << 16);
1121
1122         if (qlcnic_sriov_pf_check(adapter))
1123                 qlcnic_pf_set_interface_id_create_rx_ctx(adapter,
1124                                                          &cmd.req.arg[6]);
1125         /* set up status rings, mbx 8-57/87 */
1126         index = QLC_83XX_HOST_SDS_MBX_IDX;
1127         for (i = 0; i < num_sds; i++) {
1128                 memset(&sds_mbx, 0, sds_mbx_size);
1129                 sds = &recv_ctx->sds_rings[i];
1130                 sds->consumer = 0;
1131                 memset(sds->desc_head, 0, STATUS_DESC_RINGSIZE(sds));
1132                 sds_mbx.phy_addr_low = LSD(sds->phys_addr);
1133                 sds_mbx.phy_addr_high = MSD(sds->phys_addr);
1134                 sds_mbx.sds_ring_size = sds->num_desc;
1135                 if (adapter->flags & QLCNIC_MSIX_ENABLED)
1136                         intrpt_id = ahw->intr_tbl[i].id;
1137                 else
1138                         intrpt_id = QLCRDX(ahw, QLCNIC_DEF_INT_ID);
1139                 if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST)
1140                         sds_mbx.intrpt_id = intrpt_id;
1141                 else
1142                         sds_mbx.intrpt_id = 0xffff;
1143                 sds_mbx.intrpt_val = 0;
1144                 buf = &cmd.req.arg[index];
1145                 memcpy(buf, &sds_mbx, sds_mbx_size);
1146                 index += sds_mbx_size / sizeof(u32);
1147         }
1148         /* set up receive rings, mbx 88-111/135 */
1149         index = QLCNIC_HOST_RDS_MBX_IDX;
1150         rds = &recv_ctx->rds_rings[0];
1151         rds->producer = 0;
1152         memset(&rds_mbx, 0, rds_mbx_size);
1153         rds_mbx.phy_addr_reg_low = LSD(rds->phys_addr);
1154         rds_mbx.phy_addr_reg_high = MSD(rds->phys_addr);
1155         rds_mbx.reg_ring_sz = rds->dma_size;
1156         rds_mbx.reg_ring_len = rds->num_desc;
1157         /* Jumbo ring */
1158         rds = &recv_ctx->rds_rings[1];
1159         rds->producer = 0;
1160         rds_mbx.phy_addr_jmb_low = LSD(rds->phys_addr);
1161         rds_mbx.phy_addr_jmb_high = MSD(rds->phys_addr);
1162         rds_mbx.jmb_ring_sz = rds->dma_size;
1163         rds_mbx.jmb_ring_len = rds->num_desc;
1164         buf = &cmd.req.arg[index];
1165         memcpy(buf, &rds_mbx, rds_mbx_size);
1166
1167         /* send the mailbox command */
1168         err = ahw->hw_ops->mbx_cmd(adapter, &cmd);
1169         if (err) {
1170                 dev_err(&adapter->pdev->dev,
1171                         "Failed to create Rx ctx in firmware%d\n", err);
1172                 goto out;
1173         }
1174         mbx_out = (struct qlcnic_rcv_mbx_out *)&cmd.rsp.arg[1];
1175         recv_ctx->context_id = mbx_out->ctx_id;
1176         recv_ctx->state = mbx_out->state;
1177         recv_ctx->virt_port = mbx_out->vport_id;
1178         dev_info(&adapter->pdev->dev, "Rx Context[%d] Created, state:0x%x\n",
1179                  recv_ctx->context_id, recv_ctx->state);
1180         /* Receive descriptor ring */
1181         /* Standard ring */
1182         rds = &recv_ctx->rds_rings[0];
1183         rds->crb_rcv_producer = ahw->pci_base0 +
1184                                 mbx_out->host_prod[0].reg_buf;
1185         /* Jumbo ring */
1186         rds = &recv_ctx->rds_rings[1];
1187         rds->crb_rcv_producer = ahw->pci_base0 +
1188                                 mbx_out->host_prod[0].jmb_buf;
1189         /* status descriptor ring */
1190         for (i = 0; i < num_sds; i++) {
1191                 sds = &recv_ctx->sds_rings[i];
1192                 sds->crb_sts_consumer = ahw->pci_base0 +
1193                                         mbx_out->host_csmr[i];
1194                 if (adapter->flags & QLCNIC_MSIX_ENABLED)
1195                         intr_mask = ahw->intr_tbl[i].src;
1196                 else
1197                         intr_mask = QLCRDX(ahw, QLCNIC_DEF_INT_MASK);
1198                 sds->crb_intr_mask = ahw->pci_base0 + intr_mask;
1199         }
1200
1201         if (adapter->max_sds_rings > QLCNIC_MAX_RING_SETS)
1202                 err = qlcnic_83xx_add_rings(adapter);
1203 out:
1204         qlcnic_free_mbx_args(&cmd);
1205         return err;
1206 }
1207
1208 void qlcnic_83xx_del_tx_ctx(struct qlcnic_adapter *adapter,
1209                             struct qlcnic_host_tx_ring *tx_ring)
1210 {
1211         struct qlcnic_cmd_args cmd;
1212         u32 temp = 0;
1213
1214         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DESTROY_TX_CTX))
1215                 return;
1216
1217         if (qlcnic_sriov_pf_check(adapter) || qlcnic_sriov_vf_check(adapter))
1218                 cmd.req.arg[0] |= (0x3 << 29);
1219
1220         if (qlcnic_sriov_pf_check(adapter))
1221                 qlcnic_pf_set_interface_id_del_tx_ctx(adapter, &temp);
1222
1223         cmd.req.arg[1] = tx_ring->ctx_id | temp;
1224         if (qlcnic_issue_cmd(adapter, &cmd))
1225                 dev_err(&adapter->pdev->dev,
1226                         "Failed to destroy tx ctx in firmware\n");
1227         qlcnic_free_mbx_args(&cmd);
1228 }
1229
1230 int qlcnic_83xx_create_tx_ctx(struct qlcnic_adapter *adapter,
1231                               struct qlcnic_host_tx_ring *tx, int ring)
1232 {
1233         int err;
1234         u16 msix_id;
1235         u32 *buf, intr_mask, temp = 0;
1236         struct qlcnic_cmd_args cmd;
1237         struct qlcnic_tx_mbx mbx;
1238         struct qlcnic_tx_mbx_out *mbx_out;
1239         struct qlcnic_hardware_context *ahw = adapter->ahw;
1240         u32 msix_vector;
1241
1242         /* Reset host resources */
1243         tx->producer = 0;
1244         tx->sw_consumer = 0;
1245         *(tx->hw_consumer) = 0;
1246
1247         memset(&mbx, 0, sizeof(struct qlcnic_tx_mbx));
1248
1249         /* setup mailbox inbox registerss */
1250         mbx.phys_addr_low = LSD(tx->phys_addr);
1251         mbx.phys_addr_high = MSD(tx->phys_addr);
1252         mbx.cnsmr_index_low = LSD(tx->hw_cons_phys_addr);
1253         mbx.cnsmr_index_high = MSD(tx->hw_cons_phys_addr);
1254         mbx.size = tx->num_desc;
1255         if (adapter->flags & QLCNIC_MSIX_ENABLED) {
1256                 if (!(adapter->flags & QLCNIC_TX_INTR_SHARED))
1257                         msix_vector = adapter->max_sds_rings + ring;
1258                 else
1259                         msix_vector = adapter->max_sds_rings - 1;
1260                 msix_id = ahw->intr_tbl[msix_vector].id;
1261         } else {
1262                 msix_id = QLCRDX(ahw, QLCNIC_DEF_INT_ID);
1263         }
1264
1265         if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST)
1266                 mbx.intr_id = msix_id;
1267         else
1268                 mbx.intr_id = 0xffff;
1269         mbx.src = 0;
1270
1271         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CREATE_TX_CTX);
1272         if (err)
1273                 return err;
1274
1275         if (qlcnic_sriov_pf_check(adapter) || qlcnic_sriov_vf_check(adapter))
1276                 cmd.req.arg[0] |= (0x3 << 29);
1277
1278         if (qlcnic_sriov_pf_check(adapter))
1279                 qlcnic_pf_set_interface_id_create_tx_ctx(adapter, &temp);
1280
1281         cmd.req.arg[1] = QLCNIC_CAP0_LEGACY_CONTEXT;
1282         cmd.req.arg[5] = QLCNIC_MAX_TX_QUEUES | temp;
1283         buf = &cmd.req.arg[6];
1284         memcpy(buf, &mbx, sizeof(struct qlcnic_tx_mbx));
1285         /* send the mailbox command*/
1286         err = qlcnic_issue_cmd(adapter, &cmd);
1287         if (err) {
1288                 dev_err(&adapter->pdev->dev,
1289                         "Failed to create Tx ctx in firmware 0x%x\n", err);
1290                 goto out;
1291         }
1292         mbx_out = (struct qlcnic_tx_mbx_out *)&cmd.rsp.arg[2];
1293         tx->crb_cmd_producer = ahw->pci_base0 + mbx_out->host_prod;
1294         tx->ctx_id = mbx_out->ctx_id;
1295         if ((adapter->flags & QLCNIC_MSIX_ENABLED) &&
1296             !(adapter->flags & QLCNIC_TX_INTR_SHARED)) {
1297                 intr_mask = ahw->intr_tbl[adapter->max_sds_rings + ring].src;
1298                 tx->crb_intr_mask = ahw->pci_base0 + intr_mask;
1299         }
1300         dev_info(&adapter->pdev->dev, "Tx Context[0x%x] Created, state:0x%x\n",
1301                  tx->ctx_id, mbx_out->state);
1302 out:
1303         qlcnic_free_mbx_args(&cmd);
1304         return err;
1305 }
1306
1307 static int qlcnic_83xx_diag_alloc_res(struct net_device *netdev, int test,
1308                                       int num_sds_ring)
1309 {
1310         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1311         struct qlcnic_host_sds_ring *sds_ring;
1312         struct qlcnic_host_rds_ring *rds_ring;
1313         u16 adapter_state = adapter->is_up;
1314         u8 ring;
1315         int ret;
1316
1317         netif_device_detach(netdev);
1318
1319         if (netif_running(netdev))
1320                 __qlcnic_down(adapter, netdev);
1321
1322         qlcnic_detach(adapter);
1323
1324         adapter->max_sds_rings = 1;
1325         adapter->ahw->diag_test = test;
1326         adapter->ahw->linkup = 0;
1327
1328         ret = qlcnic_attach(adapter);
1329         if (ret) {
1330                 netif_device_attach(netdev);
1331                 return ret;
1332         }
1333
1334         ret = qlcnic_fw_create_ctx(adapter);
1335         if (ret) {
1336                 qlcnic_detach(adapter);
1337                 if (adapter_state == QLCNIC_ADAPTER_UP_MAGIC) {
1338                         adapter->max_sds_rings = num_sds_ring;
1339                         qlcnic_attach(adapter);
1340                 }
1341                 netif_device_attach(netdev);
1342                 return ret;
1343         }
1344
1345         for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1346                 rds_ring = &adapter->recv_ctx->rds_rings[ring];
1347                 qlcnic_post_rx_buffers(adapter, rds_ring, ring);
1348         }
1349
1350         if (adapter->ahw->diag_test == QLCNIC_INTERRUPT_TEST) {
1351                 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
1352                         sds_ring = &adapter->recv_ctx->sds_rings[ring];
1353                         qlcnic_83xx_enable_intr(adapter, sds_ring);
1354                 }
1355         }
1356
1357         if (adapter->ahw->diag_test == QLCNIC_LOOPBACK_TEST) {
1358                 /* disable and free mailbox interrupt */
1359                 if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
1360                         qlcnic_83xx_free_mbx_intr(adapter);
1361                 adapter->ahw->loopback_state = 0;
1362                 adapter->ahw->hw_ops->setup_link_event(adapter, 1);
1363         }
1364
1365         set_bit(__QLCNIC_DEV_UP, &adapter->state);
1366         return 0;
1367 }
1368
1369 static void qlcnic_83xx_diag_free_res(struct net_device *netdev,
1370                                         int max_sds_rings)
1371 {
1372         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1373         struct qlcnic_host_sds_ring *sds_ring;
1374         int ring, err;
1375
1376         clear_bit(__QLCNIC_DEV_UP, &adapter->state);
1377         if (adapter->ahw->diag_test == QLCNIC_INTERRUPT_TEST) {
1378                 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
1379                         sds_ring = &adapter->recv_ctx->sds_rings[ring];
1380                         qlcnic_83xx_disable_intr(adapter, sds_ring);
1381                 }
1382         }
1383
1384         qlcnic_fw_destroy_ctx(adapter);
1385         qlcnic_detach(adapter);
1386
1387         if (adapter->ahw->diag_test == QLCNIC_LOOPBACK_TEST) {
1388                 if (!(adapter->flags & QLCNIC_MSIX_ENABLED)) {
1389                         err = qlcnic_83xx_setup_mbx_intr(adapter);
1390                         if (err) {
1391                                 dev_err(&adapter->pdev->dev,
1392                                         "%s: failed to setup mbx interrupt\n",
1393                                         __func__);
1394                                 goto out;
1395                         }
1396                 }
1397         }
1398         adapter->ahw->diag_test = 0;
1399         adapter->max_sds_rings = max_sds_rings;
1400
1401         if (qlcnic_attach(adapter))
1402                 goto out;
1403
1404         if (netif_running(netdev))
1405                 __qlcnic_up(adapter, netdev);
1406 out:
1407         netif_device_attach(netdev);
1408 }
1409
1410 int qlcnic_83xx_config_led(struct qlcnic_adapter *adapter, u32 state,
1411                            u32 beacon)
1412 {
1413         struct qlcnic_cmd_args cmd;
1414         u32 mbx_in;
1415         int i, status = 0;
1416
1417         if (state) {
1418                 /* Get LED configuration */
1419                 status = qlcnic_alloc_mbx_args(&cmd, adapter,
1420                                                QLCNIC_CMD_GET_LED_CONFIG);
1421                 if (status)
1422                         return status;
1423
1424                 status = qlcnic_issue_cmd(adapter, &cmd);
1425                 if (status) {
1426                         dev_err(&adapter->pdev->dev,
1427                                 "Get led config failed.\n");
1428                         goto mbx_err;
1429                 } else {
1430                         for (i = 0; i < 4; i++)
1431                                 adapter->ahw->mbox_reg[i] = cmd.rsp.arg[i+1];
1432                 }
1433                 qlcnic_free_mbx_args(&cmd);
1434                 /* Set LED Configuration */
1435                 mbx_in = (LSW(QLC_83XX_LED_CONFIG) << 16) |
1436                           LSW(QLC_83XX_LED_CONFIG);
1437                 status = qlcnic_alloc_mbx_args(&cmd, adapter,
1438                                                QLCNIC_CMD_SET_LED_CONFIG);
1439                 if (status)
1440                         return status;
1441
1442                 cmd.req.arg[1] = mbx_in;
1443                 cmd.req.arg[2] = mbx_in;
1444                 cmd.req.arg[3] = mbx_in;
1445                 if (beacon)
1446                         cmd.req.arg[4] = QLC_83XX_ENABLE_BEACON;
1447                 status = qlcnic_issue_cmd(adapter, &cmd);
1448                 if (status) {
1449                         dev_err(&adapter->pdev->dev,
1450                                 "Set led config failed.\n");
1451                 }
1452 mbx_err:
1453                 qlcnic_free_mbx_args(&cmd);
1454                 return status;
1455
1456         } else {
1457                 /* Restoring default LED configuration */
1458                 status = qlcnic_alloc_mbx_args(&cmd, adapter,
1459                                                QLCNIC_CMD_SET_LED_CONFIG);
1460                 if (status)
1461                         return status;
1462
1463                 cmd.req.arg[1] = adapter->ahw->mbox_reg[0];
1464                 cmd.req.arg[2] = adapter->ahw->mbox_reg[1];
1465                 cmd.req.arg[3] = adapter->ahw->mbox_reg[2];
1466                 if (beacon)
1467                         cmd.req.arg[4] = adapter->ahw->mbox_reg[3];
1468                 status = qlcnic_issue_cmd(adapter, &cmd);
1469                 if (status)
1470                         dev_err(&adapter->pdev->dev,
1471                                 "Restoring led config failed.\n");
1472                 qlcnic_free_mbx_args(&cmd);
1473                 return status;
1474         }
1475 }
1476
1477 int  qlcnic_83xx_set_led(struct net_device *netdev,
1478                          enum ethtool_phys_id_state state)
1479 {
1480         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1481         int err = -EIO, active = 1;
1482
1483         if (adapter->ahw->op_mode == QLCNIC_NON_PRIV_FUNC) {
1484                 netdev_warn(netdev,
1485                             "LED test is not supported in non-privileged mode\n");
1486                 return -EOPNOTSUPP;
1487         }
1488
1489         switch (state) {
1490         case ETHTOOL_ID_ACTIVE:
1491                 if (test_and_set_bit(__QLCNIC_LED_ENABLE, &adapter->state))
1492                         return -EBUSY;
1493
1494                 if (test_bit(__QLCNIC_RESETTING, &adapter->state))
1495                         break;
1496
1497                 err = qlcnic_83xx_config_led(adapter, active, 0);
1498                 if (err)
1499                         netdev_err(netdev, "Failed to set LED blink state\n");
1500                 break;
1501         case ETHTOOL_ID_INACTIVE:
1502                 active = 0;
1503
1504                 if (test_bit(__QLCNIC_RESETTING, &adapter->state))
1505                         break;
1506
1507                 err = qlcnic_83xx_config_led(adapter, active, 0);
1508                 if (err)
1509                         netdev_err(netdev, "Failed to reset LED blink state\n");
1510                 break;
1511
1512         default:
1513                 return -EINVAL;
1514         }
1515
1516         if (!active || err)
1517                 clear_bit(__QLCNIC_LED_ENABLE, &adapter->state);
1518
1519         return err;
1520 }
1521
1522 void qlcnic_83xx_register_nic_idc_func(struct qlcnic_adapter *adapter,
1523                                        int enable)
1524 {
1525         struct qlcnic_cmd_args cmd;
1526         int status;
1527
1528         if (qlcnic_sriov_vf_check(adapter))
1529                 return;
1530
1531         if (enable) {
1532                 status = qlcnic_alloc_mbx_args(&cmd, adapter,
1533                                                QLCNIC_CMD_INIT_NIC_FUNC);
1534                 if (status)
1535                         return;
1536
1537                 cmd.req.arg[1] = BIT_0 | BIT_31;
1538         } else {
1539                 status = qlcnic_alloc_mbx_args(&cmd, adapter,
1540                                                QLCNIC_CMD_STOP_NIC_FUNC);
1541                 if (status)
1542                         return;
1543
1544                 cmd.req.arg[1] = BIT_0 | BIT_31;
1545         }
1546         status = qlcnic_issue_cmd(adapter, &cmd);
1547         if (status)
1548                 dev_err(&adapter->pdev->dev,
1549                         "Failed to %s in NIC IDC function event.\n",
1550                         (enable ? "register" : "unregister"));
1551
1552         qlcnic_free_mbx_args(&cmd);
1553 }
1554
1555 int qlcnic_83xx_set_port_config(struct qlcnic_adapter *adapter)
1556 {
1557         struct qlcnic_cmd_args cmd;
1558         int err;
1559
1560         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_PORT_CONFIG);
1561         if (err)
1562                 return err;
1563
1564         cmd.req.arg[1] = adapter->ahw->port_config;
1565         err = qlcnic_issue_cmd(adapter, &cmd);
1566         if (err)
1567                 dev_info(&adapter->pdev->dev, "Set Port Config failed.\n");
1568         qlcnic_free_mbx_args(&cmd);
1569         return err;
1570 }
1571
1572 int qlcnic_83xx_get_port_config(struct qlcnic_adapter *adapter)
1573 {
1574         struct qlcnic_cmd_args cmd;
1575         int err;
1576
1577         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_PORT_CONFIG);
1578         if (err)
1579                 return err;
1580
1581         err = qlcnic_issue_cmd(adapter, &cmd);
1582         if (err)
1583                 dev_info(&adapter->pdev->dev, "Get Port config failed\n");
1584         else
1585                 adapter->ahw->port_config = cmd.rsp.arg[1];
1586         qlcnic_free_mbx_args(&cmd);
1587         return err;
1588 }
1589
1590 int qlcnic_83xx_setup_link_event(struct qlcnic_adapter *adapter, int enable)
1591 {
1592         int err;
1593         u32 temp;
1594         struct qlcnic_cmd_args cmd;
1595
1596         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_LINK_EVENT);
1597         if (err)
1598                 return err;
1599
1600         temp = adapter->recv_ctx->context_id << 16;
1601         cmd.req.arg[1] = (enable ? 1 : 0) | BIT_8 | temp;
1602         err = qlcnic_issue_cmd(adapter, &cmd);
1603         if (err)
1604                 dev_info(&adapter->pdev->dev,
1605                          "Setup linkevent mailbox failed\n");
1606         qlcnic_free_mbx_args(&cmd);
1607         return err;
1608 }
1609
1610 static void qlcnic_83xx_set_interface_id_promisc(struct qlcnic_adapter *adapter,
1611                                                  u32 *interface_id)
1612 {
1613         if (qlcnic_sriov_pf_check(adapter)) {
1614                 qlcnic_pf_set_interface_id_promisc(adapter, interface_id);
1615         } else {
1616                 if (!qlcnic_sriov_vf_check(adapter))
1617                         *interface_id = adapter->recv_ctx->context_id << 16;
1618         }
1619 }
1620
1621 int qlcnic_83xx_nic_set_promisc(struct qlcnic_adapter *adapter, u32 mode)
1622 {
1623         int err;
1624         u32 temp = 0;
1625         struct qlcnic_cmd_args cmd;
1626
1627         if (adapter->recv_ctx->state == QLCNIC_HOST_CTX_STATE_FREED)
1628                 return -EIO;
1629
1630         err = qlcnic_alloc_mbx_args(&cmd, adapter,
1631                                     QLCNIC_CMD_CONFIGURE_MAC_RX_MODE);
1632         if (err)
1633                 return err;
1634
1635         qlcnic_83xx_set_interface_id_promisc(adapter, &temp);
1636         cmd.req.arg[1] = (mode ? 1 : 0) | temp;
1637         err = qlcnic_issue_cmd(adapter, &cmd);
1638         if (err)
1639                 dev_info(&adapter->pdev->dev,
1640                          "Promiscous mode config failed\n");
1641
1642         qlcnic_free_mbx_args(&cmd);
1643         return err;
1644 }
1645
1646 int qlcnic_83xx_loopback_test(struct net_device *netdev, u8 mode)
1647 {
1648         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1649         struct qlcnic_hardware_context *ahw = adapter->ahw;
1650         int ret = 0, loop = 0, max_sds_rings = adapter->max_sds_rings;
1651
1652         if (ahw->op_mode == QLCNIC_NON_PRIV_FUNC) {
1653                 netdev_warn(netdev,
1654                             "Loopback test not supported in non privileged mode\n");
1655                 return ret;
1656         }
1657
1658         if (test_bit(__QLCNIC_RESETTING, &adapter->state)) {
1659                 netdev_info(netdev, "Device is resetting\n");
1660                 return -EBUSY;
1661         }
1662
1663         if (qlcnic_get_diag_lock(adapter)) {
1664                 netdev_info(netdev, "Device is in diagnostics mode\n");
1665                 return -EBUSY;
1666         }
1667
1668         netdev_info(netdev, "%s loopback test in progress\n",
1669                     mode == QLCNIC_ILB_MODE ? "internal" : "external");
1670
1671         ret = qlcnic_83xx_diag_alloc_res(netdev, QLCNIC_LOOPBACK_TEST,
1672                                          max_sds_rings);
1673         if (ret)
1674                 goto fail_diag_alloc;
1675
1676         ret = qlcnic_83xx_set_lb_mode(adapter, mode);
1677         if (ret)
1678                 goto free_diag_res;
1679
1680         /* Poll for link up event before running traffic */
1681         do {
1682                 msleep(QLC_83XX_LB_MSLEEP_COUNT);
1683                 if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
1684                         qlcnic_83xx_process_aen(adapter);
1685
1686                 if (test_bit(__QLCNIC_RESETTING, &adapter->state)) {
1687                         netdev_info(netdev,
1688                                     "Device is resetting, free LB test resources\n");
1689                         ret = -EIO;
1690                         goto free_diag_res;
1691                 }
1692                 if (loop++ > QLC_83XX_LB_WAIT_COUNT) {
1693                         netdev_info(netdev,
1694                                     "Firmware didn't sent link up event to loopback request\n");
1695                         ret = -QLCNIC_FW_NOT_RESPOND;
1696                         qlcnic_83xx_clear_lb_mode(adapter, mode);
1697                         goto free_diag_res;
1698                 }
1699         } while ((adapter->ahw->linkup && ahw->has_link_events) != 1);
1700
1701         /* Make sure carrier is off and queue is stopped during loopback */
1702         if (netif_running(netdev)) {
1703                 netif_carrier_off(netdev);
1704                 netif_stop_queue(netdev);
1705         }
1706
1707         ret = qlcnic_do_lb_test(adapter, mode);
1708
1709         qlcnic_83xx_clear_lb_mode(adapter, mode);
1710
1711 free_diag_res:
1712         qlcnic_83xx_diag_free_res(netdev, max_sds_rings);
1713
1714 fail_diag_alloc:
1715         adapter->max_sds_rings = max_sds_rings;
1716         qlcnic_release_diag_lock(adapter);
1717         return ret;
1718 }
1719
1720 int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1721 {
1722         struct qlcnic_hardware_context *ahw = adapter->ahw;
1723         struct net_device *netdev = adapter->netdev;
1724         int status = 0, loop = 0;
1725         u32 config;
1726
1727         status = qlcnic_83xx_get_port_config(adapter);
1728         if (status)
1729                 return status;
1730
1731         config = ahw->port_config;
1732         set_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1733
1734         if (mode == QLCNIC_ILB_MODE)
1735                 ahw->port_config |= QLC_83XX_CFG_LOOPBACK_HSS;
1736         if (mode == QLCNIC_ELB_MODE)
1737                 ahw->port_config |= QLC_83XX_CFG_LOOPBACK_EXT;
1738
1739         status = qlcnic_83xx_set_port_config(adapter);
1740         if (status) {
1741                 netdev_err(netdev,
1742                            "Failed to Set Loopback Mode = 0x%x.\n",
1743                            ahw->port_config);
1744                 ahw->port_config = config;
1745                 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1746                 return status;
1747         }
1748
1749         /* Wait for Link and IDC Completion AEN */
1750         do {
1751                 msleep(QLC_83XX_LB_MSLEEP_COUNT);
1752                 if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
1753                         qlcnic_83xx_process_aen(adapter);
1754
1755                 if (test_bit(__QLCNIC_RESETTING, &adapter->state)) {
1756                         netdev_info(netdev,
1757                                     "Device is resetting, free LB test resources\n");
1758                         clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1759                         return -EIO;
1760                 }
1761                 if (loop++ > QLC_83XX_LB_WAIT_COUNT) {
1762                         netdev_err(netdev,
1763                                    "Did not receive IDC completion AEN\n");
1764                         clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1765                         qlcnic_83xx_clear_lb_mode(adapter, mode);
1766                         return -EIO;
1767                 }
1768         } while (test_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status));
1769
1770         qlcnic_sre_macaddr_change(adapter, adapter->mac_addr, 0,
1771                                   QLCNIC_MAC_ADD);
1772         return status;
1773 }
1774
1775 int qlcnic_83xx_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1776 {
1777         struct qlcnic_hardware_context *ahw = adapter->ahw;
1778         struct net_device *netdev = adapter->netdev;
1779         int status = 0, loop = 0;
1780         u32 config = ahw->port_config;
1781
1782         set_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1783         if (mode == QLCNIC_ILB_MODE)
1784                 ahw->port_config &= ~QLC_83XX_CFG_LOOPBACK_HSS;
1785         if (mode == QLCNIC_ELB_MODE)
1786                 ahw->port_config &= ~QLC_83XX_CFG_LOOPBACK_EXT;
1787
1788         status = qlcnic_83xx_set_port_config(adapter);
1789         if (status) {
1790                 netdev_err(netdev,
1791                            "Failed to Clear Loopback Mode = 0x%x.\n",
1792                            ahw->port_config);
1793                 ahw->port_config = config;
1794                 clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1795                 return status;
1796         }
1797
1798         /* Wait for Link and IDC Completion AEN */
1799         do {
1800                 msleep(QLC_83XX_LB_MSLEEP_COUNT);
1801                 if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
1802                         qlcnic_83xx_process_aen(adapter);
1803
1804                 if (test_bit(__QLCNIC_RESETTING, &adapter->state)) {
1805                         netdev_info(netdev,
1806                                     "Device is resetting, free LB test resources\n");
1807                         clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1808                         return -EIO;
1809                 }
1810
1811                 if (loop++ > QLC_83XX_LB_WAIT_COUNT) {
1812                         netdev_err(netdev,
1813                                    "Did not receive IDC completion AEN\n");
1814                         clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
1815                         return -EIO;
1816                 }
1817         } while (test_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status));
1818
1819         qlcnic_sre_macaddr_change(adapter, adapter->mac_addr, 0,
1820                                   QLCNIC_MAC_DEL);
1821         return status;
1822 }
1823
1824 static void qlcnic_83xx_set_interface_id_ipaddr(struct qlcnic_adapter *adapter,
1825                                                 u32 *interface_id)
1826 {
1827         if (qlcnic_sriov_pf_check(adapter)) {
1828                 qlcnic_pf_set_interface_id_ipaddr(adapter, interface_id);
1829         } else {
1830                 if (!qlcnic_sriov_vf_check(adapter))
1831                         *interface_id = adapter->recv_ctx->context_id << 16;
1832         }
1833 }
1834
1835 void qlcnic_83xx_config_ipaddr(struct qlcnic_adapter *adapter, __be32 ip,
1836                                int mode)
1837 {
1838         int err;
1839         u32 temp = 0, temp_ip;
1840         struct qlcnic_cmd_args cmd;
1841
1842         err = qlcnic_alloc_mbx_args(&cmd, adapter,
1843                                     QLCNIC_CMD_CONFIGURE_IP_ADDR);
1844         if (err)
1845                 return;
1846
1847         qlcnic_83xx_set_interface_id_ipaddr(adapter, &temp);
1848
1849         if (mode == QLCNIC_IP_UP)
1850                 cmd.req.arg[1] = 1 | temp;
1851         else
1852                 cmd.req.arg[1] = 2 | temp;
1853
1854         /*
1855          * Adapter needs IP address in network byte order.
1856          * But hardware mailbox registers go through writel(), hence IP address
1857          * gets swapped on big endian architecture.
1858          * To negate swapping of writel() on big endian architecture
1859          * use swab32(value).
1860          */
1861
1862         temp_ip = swab32(ntohl(ip));
1863         memcpy(&cmd.req.arg[2], &temp_ip, sizeof(u32));
1864         err = qlcnic_issue_cmd(adapter, &cmd);
1865         if (err != QLCNIC_RCODE_SUCCESS)
1866                 dev_err(&adapter->netdev->dev,
1867                         "could not notify %s IP 0x%x request\n",
1868                         (mode == QLCNIC_IP_UP) ? "Add" : "Remove", ip);
1869
1870         qlcnic_free_mbx_args(&cmd);
1871 }
1872
1873 int qlcnic_83xx_config_hw_lro(struct qlcnic_adapter *adapter, int mode)
1874 {
1875         int err;
1876         u32 temp, arg1;
1877         struct qlcnic_cmd_args cmd;
1878         int lro_bit_mask;
1879
1880         lro_bit_mask = (mode ? (BIT_0 | BIT_1 | BIT_2 | BIT_3) : 0);
1881
1882         if (adapter->recv_ctx->state == QLCNIC_HOST_CTX_STATE_FREED)
1883                 return 0;
1884
1885         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIGURE_HW_LRO);
1886         if (err)
1887                 return err;
1888
1889         temp = adapter->recv_ctx->context_id << 16;
1890         arg1 = lro_bit_mask | temp;
1891         cmd.req.arg[1] = arg1;
1892
1893         err = qlcnic_issue_cmd(adapter, &cmd);
1894         if (err)
1895                 dev_info(&adapter->pdev->dev, "LRO config failed\n");
1896         qlcnic_free_mbx_args(&cmd);
1897
1898         return err;
1899 }
1900
1901 int qlcnic_83xx_config_rss(struct qlcnic_adapter *adapter, int enable)
1902 {
1903         int err;
1904         u32 word;
1905         struct qlcnic_cmd_args cmd;
1906         const u64 key[] = { 0xbeac01fa6a42b73bULL, 0x8030f20c77cb2da3ULL,
1907                             0xae7b30b4d0ca2bcbULL, 0x43a38fb04167253dULL,
1908                             0x255b0ec26d5a56daULL };
1909
1910         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIGURE_RSS);
1911         if (err)
1912                 return err;
1913         /*
1914          * RSS request:
1915          * bits 3-0: Rsvd
1916          *      5-4: hash_type_ipv4
1917          *      7-6: hash_type_ipv6
1918          *        8: enable
1919          *        9: use indirection table
1920          *    16-31: indirection table mask
1921          */
1922         word =  ((u32)(RSS_HASHTYPE_IP_TCP & 0x3) << 4) |
1923                 ((u32)(RSS_HASHTYPE_IP_TCP & 0x3) << 6) |
1924                 ((u32)(enable & 0x1) << 8) |
1925                 ((0x7ULL) << 16);
1926         cmd.req.arg[1] = (adapter->recv_ctx->context_id);
1927         cmd.req.arg[2] = word;
1928         memcpy(&cmd.req.arg[4], key, sizeof(key));
1929
1930         err = qlcnic_issue_cmd(adapter, &cmd);
1931
1932         if (err)
1933                 dev_info(&adapter->pdev->dev, "RSS config failed\n");
1934         qlcnic_free_mbx_args(&cmd);
1935
1936         return err;
1937
1938 }
1939
1940 static void qlcnic_83xx_set_interface_id_macaddr(struct qlcnic_adapter *adapter,
1941                                                  u32 *interface_id)
1942 {
1943         if (qlcnic_sriov_pf_check(adapter)) {
1944                 qlcnic_pf_set_interface_id_macaddr(adapter, interface_id);
1945         } else {
1946                 if (!qlcnic_sriov_vf_check(adapter))
1947                         *interface_id = adapter->recv_ctx->context_id << 16;
1948         }
1949 }
1950
1951 int qlcnic_83xx_sre_macaddr_change(struct qlcnic_adapter *adapter, u8 *addr,
1952                                    u16 vlan_id, u8 op)
1953 {
1954         int err;
1955         u32 *buf, temp = 0;
1956         struct qlcnic_cmd_args cmd;
1957         struct qlcnic_macvlan_mbx mv;
1958
1959         if (adapter->recv_ctx->state == QLCNIC_HOST_CTX_STATE_FREED)
1960                 return -EIO;
1961
1962         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIG_MAC_VLAN);
1963         if (err)
1964                 return err;
1965
1966         if (vlan_id)
1967                 op = (op == QLCNIC_MAC_ADD || op == QLCNIC_MAC_VLAN_ADD) ?
1968                      QLCNIC_MAC_VLAN_ADD : QLCNIC_MAC_VLAN_DEL;
1969
1970         cmd.req.arg[1] = op | (1 << 8);
1971         qlcnic_83xx_set_interface_id_macaddr(adapter, &temp);
1972         cmd.req.arg[1] |= temp;
1973         mv.vlan = vlan_id;
1974         mv.mac_addr0 = addr[0];
1975         mv.mac_addr1 = addr[1];
1976         mv.mac_addr2 = addr[2];
1977         mv.mac_addr3 = addr[3];
1978         mv.mac_addr4 = addr[4];
1979         mv.mac_addr5 = addr[5];
1980         buf = &cmd.req.arg[2];
1981         memcpy(buf, &mv, sizeof(struct qlcnic_macvlan_mbx));
1982         err = qlcnic_issue_cmd(adapter, &cmd);
1983         if (err)
1984                 dev_err(&adapter->pdev->dev,
1985                         "MAC-VLAN %s to CAM failed, err=%d.\n",
1986                         ((op == 1) ? "add " : "delete "), err);
1987         qlcnic_free_mbx_args(&cmd);
1988         return err;
1989 }
1990
1991 void qlcnic_83xx_change_l2_filter(struct qlcnic_adapter *adapter, u64 *addr,
1992                                   u16 vlan_id)
1993 {
1994         u8 mac[ETH_ALEN];
1995         memcpy(&mac, addr, ETH_ALEN);
1996         qlcnic_83xx_sre_macaddr_change(adapter, mac, vlan_id, QLCNIC_MAC_ADD);
1997 }
1998
1999 void qlcnic_83xx_configure_mac(struct qlcnic_adapter *adapter, u8 *mac,
2000                                u8 type, struct qlcnic_cmd_args *cmd)
2001 {
2002         switch (type) {
2003         case QLCNIC_SET_STATION_MAC:
2004         case QLCNIC_SET_FAC_DEF_MAC:
2005                 memcpy(&cmd->req.arg[2], mac, sizeof(u32));
2006                 memcpy(&cmd->req.arg[3], &mac[4], sizeof(u16));
2007                 break;
2008         }
2009         cmd->req.arg[1] = type;
2010 }
2011
2012 int qlcnic_83xx_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
2013 {
2014         int err, i;
2015         struct qlcnic_cmd_args cmd;
2016         u32 mac_low, mac_high;
2017
2018         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_MAC_ADDRESS);
2019         if (err)
2020                 return err;
2021
2022         qlcnic_83xx_configure_mac(adapter, mac, QLCNIC_GET_CURRENT_MAC, &cmd);
2023         err = qlcnic_issue_cmd(adapter, &cmd);
2024
2025         if (err == QLCNIC_RCODE_SUCCESS) {
2026                 mac_low = cmd.rsp.arg[1];
2027                 mac_high = cmd.rsp.arg[2];
2028
2029                 for (i = 0; i < 2; i++)
2030                         mac[i] = (u8) (mac_high >> ((1 - i) * 8));
2031                 for (i = 2; i < 6; i++)
2032                         mac[i] = (u8) (mac_low >> ((5 - i) * 8));
2033         } else {
2034                 dev_err(&adapter->pdev->dev, "Failed to get mac address%d\n",
2035                         err);
2036                 err = -EIO;
2037         }
2038         qlcnic_free_mbx_args(&cmd);
2039         return err;
2040 }
2041
2042 void qlcnic_83xx_config_intr_coal(struct qlcnic_adapter *adapter)
2043 {
2044         int err;
2045         u16 temp;
2046         struct qlcnic_cmd_args cmd;
2047         struct qlcnic_nic_intr_coalesce *coal = &adapter->ahw->coal;
2048
2049         if (adapter->recv_ctx->state == QLCNIC_HOST_CTX_STATE_FREED)
2050                 return;
2051
2052         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIG_INTR_COAL);
2053         if (err)
2054                 return;
2055
2056         if (coal->type == QLCNIC_INTR_COAL_TYPE_RX) {
2057                 temp = adapter->recv_ctx->context_id;
2058                 cmd.req.arg[1] = QLCNIC_INTR_COAL_TYPE_RX | temp << 16;
2059                 temp = coal->rx_time_us;
2060                 cmd.req.arg[2] = coal->rx_packets | temp << 16;
2061         } else if (coal->type == QLCNIC_INTR_COAL_TYPE_TX) {
2062                 temp = adapter->tx_ring->ctx_id;
2063                 cmd.req.arg[1] = QLCNIC_INTR_COAL_TYPE_TX | temp << 16;
2064                 temp = coal->tx_time_us;
2065                 cmd.req.arg[2] = coal->tx_packets | temp << 16;
2066         }
2067         cmd.req.arg[3] = coal->flag;
2068         err = qlcnic_issue_cmd(adapter, &cmd);
2069         if (err != QLCNIC_RCODE_SUCCESS)
2070                 dev_info(&adapter->pdev->dev,
2071                          "Failed to send interrupt coalescence parameters\n");
2072         qlcnic_free_mbx_args(&cmd);
2073 }
2074
2075 static void qlcnic_83xx_handle_link_aen(struct qlcnic_adapter *adapter,
2076                                         u32 data[])
2077 {
2078         struct qlcnic_hardware_context *ahw = adapter->ahw;
2079         u8 link_status, duplex;
2080         /* link speed */
2081         link_status = LSB(data[3]) & 1;
2082         if (link_status) {
2083                 ahw->link_speed = MSW(data[2]);
2084                 duplex = LSB(MSW(data[3]));
2085                 if (duplex)
2086                         ahw->link_duplex = DUPLEX_FULL;
2087                 else
2088                         ahw->link_duplex = DUPLEX_HALF;
2089         } else {
2090                 ahw->link_speed = SPEED_UNKNOWN;
2091                 ahw->link_duplex = DUPLEX_UNKNOWN;
2092         }
2093
2094         ahw->link_autoneg = MSB(MSW(data[3]));
2095         ahw->module_type = MSB(LSW(data[3]));
2096         ahw->has_link_events = 1;
2097         qlcnic_advert_link_change(adapter, link_status);
2098 }
2099
2100 irqreturn_t qlcnic_83xx_handle_aen(int irq, void *data)
2101 {
2102         struct qlcnic_adapter *adapter = data;
2103         unsigned long flags;
2104         u32 mask, resp, event;
2105
2106         spin_lock_irqsave(&adapter->ahw->mbx_lock, flags);
2107         resp = QLCRDX(adapter->ahw, QLCNIC_FW_MBX_CTRL);
2108         if (!(resp & QLCNIC_SET_OWNER))
2109                 goto out;
2110
2111         event = readl(QLCNIC_MBX_FW(adapter->ahw, 0));
2112         if (event &  QLCNIC_MBX_ASYNC_EVENT)
2113                 __qlcnic_83xx_process_aen(adapter);
2114 out:
2115         mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK);
2116         writel(0, adapter->ahw->pci_base0 + mask);
2117         spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
2118
2119         return IRQ_HANDLED;
2120 }
2121
2122 int qlcnic_enable_eswitch(struct qlcnic_adapter *adapter, u8 port, u8 enable)
2123 {
2124         int err = -EIO;
2125         struct qlcnic_cmd_args cmd;
2126
2127         if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) {
2128                 dev_err(&adapter->pdev->dev,
2129                         "%s: Error, invoked by non management func\n",
2130                         __func__);
2131                 return err;
2132         }
2133
2134         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_TOGGLE_ESWITCH);
2135         if (err)
2136                 return err;
2137
2138         cmd.req.arg[1] = (port & 0xf) | BIT_4;
2139         err = qlcnic_issue_cmd(adapter, &cmd);
2140
2141         if (err != QLCNIC_RCODE_SUCCESS) {
2142                 dev_err(&adapter->pdev->dev, "Failed to enable eswitch%d\n",
2143                         err);
2144                 err = -EIO;
2145         }
2146         qlcnic_free_mbx_args(&cmd);
2147
2148         return err;
2149
2150 }
2151
2152 int qlcnic_83xx_set_nic_info(struct qlcnic_adapter *adapter,
2153                              struct qlcnic_info *nic)
2154 {
2155         int i, err = -EIO;
2156         struct qlcnic_cmd_args cmd;
2157
2158         if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) {
2159                 dev_err(&adapter->pdev->dev,
2160                         "%s: Error, invoked by non management func\n",
2161                         __func__);
2162                 return err;
2163         }
2164
2165         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_NIC_INFO);
2166         if (err)
2167                 return err;
2168
2169         cmd.req.arg[1] = (nic->pci_func << 16);
2170         cmd.req.arg[2] = 0x1 << 16;
2171         cmd.req.arg[3] = nic->phys_port | (nic->switch_mode << 16);
2172         cmd.req.arg[4] = nic->capabilities;
2173         cmd.req.arg[5] = (nic->max_mac_filters & 0xFF) | ((nic->max_mtu) << 16);
2174         cmd.req.arg[6] = (nic->max_tx_ques) | ((nic->max_rx_ques) << 16);
2175         cmd.req.arg[7] = (nic->min_tx_bw) | ((nic->max_tx_bw) << 16);
2176         for (i = 8; i < 32; i++)
2177                 cmd.req.arg[i] = 0;
2178
2179         err = qlcnic_issue_cmd(adapter, &cmd);
2180
2181         if (err != QLCNIC_RCODE_SUCCESS) {
2182                 dev_err(&adapter->pdev->dev, "Failed to set nic info%d\n",
2183                         err);
2184                 err = -EIO;
2185         }
2186
2187         qlcnic_free_mbx_args(&cmd);
2188
2189         return err;
2190 }
2191
2192 int qlcnic_83xx_get_nic_info(struct qlcnic_adapter *adapter,
2193                              struct qlcnic_info *npar_info, u8 func_id)
2194 {
2195         int err;
2196         u32 temp;
2197         u8 op = 0;
2198         struct qlcnic_cmd_args cmd;
2199         struct qlcnic_hardware_context *ahw = adapter->ahw;
2200
2201         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
2202         if (err)
2203                 return err;
2204
2205         if (func_id != ahw->pci_func) {
2206                 temp = func_id << 16;
2207                 cmd.req.arg[1] = op | BIT_31 | temp;
2208         } else {
2209                 cmd.req.arg[1] = ahw->pci_func << 16;
2210         }
2211         err = qlcnic_issue_cmd(adapter, &cmd);
2212         if (err) {
2213                 dev_info(&adapter->pdev->dev,
2214                          "Failed to get nic info %d\n", err);
2215                 goto out;
2216         }
2217
2218         npar_info->op_type = cmd.rsp.arg[1];
2219         npar_info->pci_func = cmd.rsp.arg[2] & 0xFFFF;
2220         npar_info->op_mode = (cmd.rsp.arg[2] & 0xFFFF0000) >> 16;
2221         npar_info->phys_port = cmd.rsp.arg[3] & 0xFFFF;
2222         npar_info->switch_mode = (cmd.rsp.arg[3] & 0xFFFF0000) >> 16;
2223         npar_info->capabilities = cmd.rsp.arg[4];
2224         npar_info->max_mac_filters = cmd.rsp.arg[5] & 0xFF;
2225         npar_info->max_mtu = (cmd.rsp.arg[5] & 0xFFFF0000) >> 16;
2226         npar_info->max_tx_ques = cmd.rsp.arg[6] & 0xFFFF;
2227         npar_info->max_rx_ques = (cmd.rsp.arg[6] & 0xFFFF0000) >> 16;
2228         npar_info->min_tx_bw = cmd.rsp.arg[7] & 0xFFFF;
2229         npar_info->max_tx_bw = (cmd.rsp.arg[7] & 0xFFFF0000) >> 16;
2230         if (cmd.rsp.arg[8] & 0x1)
2231                 npar_info->max_bw_reg_offset = (cmd.rsp.arg[8] & 0x7FFE) >> 1;
2232         if (cmd.rsp.arg[8] & 0x10000) {
2233                 temp = (cmd.rsp.arg[8] & 0x7FFE0000) >> 17;
2234                 npar_info->max_linkspeed_reg_offset = temp;
2235         }
2236         if (npar_info->capabilities & QLCNIC_FW_CAPABILITY_MORE_CAPS)
2237                 memcpy(ahw->extra_capability, &cmd.rsp.arg[16],
2238                        sizeof(ahw->extra_capability));
2239
2240 out:
2241         qlcnic_free_mbx_args(&cmd);
2242         return err;
2243 }
2244
2245 int qlcnic_83xx_get_pci_info(struct qlcnic_adapter *adapter,
2246                              struct qlcnic_pci_info *pci_info)
2247 {
2248         struct qlcnic_hardware_context *ahw = adapter->ahw;
2249         struct device *dev = &adapter->pdev->dev;
2250         struct qlcnic_cmd_args cmd;
2251         int i, err = 0, j = 0;
2252         u32 temp;
2253
2254         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_PCI_INFO);
2255         if (err)
2256                 return err;
2257
2258         err = qlcnic_issue_cmd(adapter, &cmd);
2259
2260         ahw->act_pci_func = 0;
2261         if (err == QLCNIC_RCODE_SUCCESS) {
2262                 ahw->max_pci_func = cmd.rsp.arg[1] & 0xFF;
2263                 for (i = 2, j = 0; j < QLCNIC_MAX_PCI_FUNC; j++, pci_info++) {
2264                         pci_info->id = cmd.rsp.arg[i] & 0xFFFF;
2265                         pci_info->active = (cmd.rsp.arg[i] & 0xFFFF0000) >> 16;
2266                         i++;
2267                         pci_info->type = cmd.rsp.arg[i] & 0xFFFF;
2268                         if (pci_info->type == QLCNIC_TYPE_NIC)
2269                                 ahw->act_pci_func++;
2270                         temp = (cmd.rsp.arg[i] & 0xFFFF0000) >> 16;
2271                         pci_info->default_port = temp;
2272                         i++;
2273                         pci_info->tx_min_bw = cmd.rsp.arg[i] & 0xFFFF;
2274                         temp = (cmd.rsp.arg[i] & 0xFFFF0000) >> 16;
2275                         pci_info->tx_max_bw = temp;
2276                         i = i + 2;
2277                         memcpy(pci_info->mac, &cmd.rsp.arg[i], ETH_ALEN - 2);
2278                         i++;
2279                         memcpy(pci_info->mac + sizeof(u32), &cmd.rsp.arg[i], 2);
2280                         i = i + 3;
2281                         if (ahw->op_mode == QLCNIC_MGMT_FUNC)
2282                                 dev_info(dev, "id = %d active = %d type = %d\n"
2283                                          "\tport = %d min bw = %d max bw = %d\n"
2284                                          "\tmac_addr =  %pM\n", pci_info->id,
2285                                          pci_info->active, pci_info->type,
2286                                          pci_info->default_port,
2287                                          pci_info->tx_min_bw,
2288                                          pci_info->tx_max_bw, pci_info->mac);
2289                 }
2290                 if (ahw->op_mode == QLCNIC_MGMT_FUNC)
2291                         dev_info(dev, "Max vNIC functions = %d, active vNIC functions = %d\n",
2292                                  ahw->max_pci_func, ahw->act_pci_func);
2293
2294         } else {
2295                 dev_err(dev, "Failed to get PCI Info, error = %d\n", err);
2296                 err = -EIO;
2297         }
2298
2299         qlcnic_free_mbx_args(&cmd);
2300
2301         return err;
2302 }
2303
2304 int qlcnic_83xx_config_intrpt(struct qlcnic_adapter *adapter, bool op_type)
2305 {
2306         int i, index, err;
2307         u8 max_ints;
2308         u32 val, temp, type;
2309         struct qlcnic_cmd_args cmd;
2310
2311         max_ints = adapter->ahw->num_msix - 1;
2312         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIG_INTRPT);
2313         if (err)
2314                 return err;
2315
2316         cmd.req.arg[1] = max_ints;
2317
2318         if (qlcnic_sriov_vf_check(adapter))
2319                 cmd.req.arg[1] |= (adapter->ahw->pci_func << 8) | BIT_16;
2320
2321         for (i = 0, index = 2; i < max_ints; i++) {
2322                 type = op_type ? QLCNIC_INTRPT_ADD : QLCNIC_INTRPT_DEL;
2323                 val = type | (adapter->ahw->intr_tbl[i].type << 4);
2324                 if (adapter->ahw->intr_tbl[i].type == QLCNIC_INTRPT_MSIX)
2325                         val |= (adapter->ahw->intr_tbl[i].id << 16);
2326                 cmd.req.arg[index++] = val;
2327         }
2328         err = qlcnic_issue_cmd(adapter, &cmd);
2329         if (err) {
2330                 dev_err(&adapter->pdev->dev,
2331                         "Failed to configure interrupts 0x%x\n", err);
2332                 goto out;
2333         }
2334
2335         max_ints = cmd.rsp.arg[1];
2336         for (i = 0, index = 2; i < max_ints; i++, index += 2) {
2337                 val = cmd.rsp.arg[index];
2338                 if (LSB(val)) {
2339                         dev_info(&adapter->pdev->dev,
2340                                  "Can't configure interrupt %d\n",
2341                                  adapter->ahw->intr_tbl[i].id);
2342                         continue;
2343                 }
2344                 if (op_type) {
2345                         adapter->ahw->intr_tbl[i].id = MSW(val);
2346                         adapter->ahw->intr_tbl[i].enabled = 1;
2347                         temp = cmd.rsp.arg[index + 1];
2348                         adapter->ahw->intr_tbl[i].src = temp;
2349                 } else {
2350                         adapter->ahw->intr_tbl[i].id = i;
2351                         adapter->ahw->intr_tbl[i].enabled = 0;
2352                         adapter->ahw->intr_tbl[i].src = 0;
2353                 }
2354         }
2355 out:
2356         qlcnic_free_mbx_args(&cmd);
2357         return err;
2358 }
2359
2360 int qlcnic_83xx_lock_flash(struct qlcnic_adapter *adapter)
2361 {
2362         int id, timeout = 0;
2363         u32 status = 0;
2364
2365         while (status == 0) {
2366                 status = QLC_SHARED_REG_RD32(adapter, QLCNIC_FLASH_LOCK);
2367                 if (status)
2368                         break;
2369
2370                 if (++timeout >= QLC_83XX_FLASH_LOCK_TIMEOUT) {
2371                         id = QLC_SHARED_REG_RD32(adapter,
2372                                                  QLCNIC_FLASH_LOCK_OWNER);
2373                         dev_err(&adapter->pdev->dev,
2374                                 "%s: failed, lock held by %d\n", __func__, id);
2375                         return -EIO;
2376                 }
2377                 usleep_range(1000, 2000);
2378         }
2379
2380         QLC_SHARED_REG_WR32(adapter, QLCNIC_FLASH_LOCK_OWNER, adapter->portnum);
2381         return 0;
2382 }
2383
2384 void qlcnic_83xx_unlock_flash(struct qlcnic_adapter *adapter)
2385 {
2386         QLC_SHARED_REG_RD32(adapter, QLCNIC_FLASH_UNLOCK);
2387         QLC_SHARED_REG_WR32(adapter, QLCNIC_FLASH_LOCK_OWNER, 0xFF);
2388 }
2389
2390 int qlcnic_83xx_lockless_flash_read32(struct qlcnic_adapter *adapter,
2391                                       u32 flash_addr, u8 *p_data,
2392                                       int count)
2393 {
2394         int i, ret;
2395         u32 word, range, flash_offset, addr = flash_addr;
2396         ulong indirect_add, direct_window;
2397
2398         flash_offset = addr & (QLCNIC_FLASH_SECTOR_SIZE - 1);
2399         if (addr & 0x3) {
2400                 dev_err(&adapter->pdev->dev, "Illegal addr = 0x%x\n", addr);
2401                 return -EIO;
2402         }
2403
2404         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_DIRECT_WINDOW,
2405                                      (addr));
2406
2407         range = flash_offset + (count * sizeof(u32));
2408         /* Check if data is spread across multiple sectors */
2409         if (range > (QLCNIC_FLASH_SECTOR_SIZE - 1)) {
2410
2411                 /* Multi sector read */
2412                 for (i = 0; i < count; i++) {
2413                         indirect_add = QLC_83XX_FLASH_DIRECT_DATA(addr);
2414                         ret = qlcnic_83xx_rd_reg_indirect(adapter,
2415                                                           indirect_add);
2416                         if (ret == -EIO)
2417                                 return -EIO;
2418
2419                         word = ret;
2420                         *(u32 *)p_data  = word;
2421                         p_data = p_data + 4;
2422                         addr = addr + 4;
2423                         flash_offset = flash_offset + 4;
2424
2425                         if (flash_offset > (QLCNIC_FLASH_SECTOR_SIZE - 1)) {
2426                                 direct_window = QLC_83XX_FLASH_DIRECT_WINDOW;
2427                                 /* This write is needed once for each sector */
2428                                 qlcnic_83xx_wrt_reg_indirect(adapter,
2429                                                              direct_window,
2430                                                              (addr));
2431                                 flash_offset = 0;
2432                         }
2433                 }
2434         } else {
2435                 /* Single sector read */
2436                 for (i = 0; i < count; i++) {
2437                         indirect_add = QLC_83XX_FLASH_DIRECT_DATA(addr);
2438                         ret = qlcnic_83xx_rd_reg_indirect(adapter,
2439                                                           indirect_add);
2440                         if (ret == -EIO)
2441                                 return -EIO;
2442
2443                         word = ret;
2444                         *(u32 *)p_data  = word;
2445                         p_data = p_data + 4;
2446                         addr = addr + 4;
2447                 }
2448         }
2449
2450         return 0;
2451 }
2452
2453 static int qlcnic_83xx_poll_flash_status_reg(struct qlcnic_adapter *adapter)
2454 {
2455         u32 status;
2456         int retries = QLC_83XX_FLASH_READ_RETRY_COUNT;
2457
2458         do {
2459                 status = qlcnic_83xx_rd_reg_indirect(adapter,
2460                                                      QLC_83XX_FLASH_STATUS);
2461                 if ((status & QLC_83XX_FLASH_STATUS_READY) ==
2462                     QLC_83XX_FLASH_STATUS_READY)
2463                         break;
2464
2465                 msleep(QLC_83XX_FLASH_STATUS_REG_POLL_DELAY);
2466         } while (--retries);
2467
2468         if (!retries)
2469                 return -EIO;
2470
2471         return 0;
2472 }
2473
2474 int qlcnic_83xx_enable_flash_write(struct qlcnic_adapter *adapter)
2475 {
2476         int ret;
2477         u32 cmd;
2478         cmd = adapter->ahw->fdt.write_statusreg_cmd;
2479         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR,
2480                                      (QLC_83XX_FLASH_FDT_WRITE_DEF_SIG | cmd));
2481         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA,
2482                                      adapter->ahw->fdt.write_enable_bits);
2483         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_CONTROL,
2484                                      QLC_83XX_FLASH_SECOND_ERASE_MS_VAL);
2485         ret = qlcnic_83xx_poll_flash_status_reg(adapter);
2486         if (ret)
2487                 return -EIO;
2488
2489         return 0;
2490 }
2491
2492 int qlcnic_83xx_disable_flash_write(struct qlcnic_adapter *adapter)
2493 {
2494         int ret;
2495
2496         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR,
2497                                      (QLC_83XX_FLASH_FDT_WRITE_DEF_SIG |
2498                                      adapter->ahw->fdt.write_statusreg_cmd));
2499         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA,
2500                                      adapter->ahw->fdt.write_disable_bits);
2501         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_CONTROL,
2502                                      QLC_83XX_FLASH_SECOND_ERASE_MS_VAL);
2503         ret = qlcnic_83xx_poll_flash_status_reg(adapter);
2504         if (ret)
2505                 return -EIO;
2506
2507         return 0;
2508 }
2509
2510 int qlcnic_83xx_read_flash_mfg_id(struct qlcnic_adapter *adapter)
2511 {
2512         int ret, mfg_id;
2513
2514         if (qlcnic_83xx_lock_flash(adapter))
2515                 return -EIO;
2516
2517         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR,
2518                                      QLC_83XX_FLASH_FDT_READ_MFG_ID_VAL);
2519         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_CONTROL,
2520                                      QLC_83XX_FLASH_READ_CTRL);
2521         ret = qlcnic_83xx_poll_flash_status_reg(adapter);
2522         if (ret) {
2523                 qlcnic_83xx_unlock_flash(adapter);
2524                 return -EIO;
2525         }
2526
2527         mfg_id = qlcnic_83xx_rd_reg_indirect(adapter, QLC_83XX_FLASH_RDDATA);
2528         if (mfg_id == -EIO)
2529                 return -EIO;
2530
2531         adapter->flash_mfg_id = (mfg_id & 0xFF);
2532         qlcnic_83xx_unlock_flash(adapter);
2533
2534         return 0;
2535 }
2536
2537 int qlcnic_83xx_read_flash_descriptor_table(struct qlcnic_adapter *adapter)
2538 {
2539         int count, fdt_size, ret = 0;
2540
2541         fdt_size = sizeof(struct qlcnic_fdt);
2542         count = fdt_size / sizeof(u32);
2543
2544         if (qlcnic_83xx_lock_flash(adapter))
2545                 return -EIO;
2546
2547         memset(&adapter->ahw->fdt, 0, fdt_size);
2548         ret = qlcnic_83xx_lockless_flash_read32(adapter, QLCNIC_FDT_LOCATION,
2549                                                 (u8 *)&adapter->ahw->fdt,
2550                                                 count);
2551
2552         qlcnic_83xx_unlock_flash(adapter);
2553         return ret;
2554 }
2555
2556 int qlcnic_83xx_erase_flash_sector(struct qlcnic_adapter *adapter,
2557                                    u32 sector_start_addr)
2558 {
2559         u32 reversed_addr, addr1, addr2, cmd;
2560         int ret = -EIO;
2561
2562         if (qlcnic_83xx_lock_flash(adapter) != 0)
2563                 return -EIO;
2564
2565         if (adapter->ahw->fdt.mfg_id == adapter->flash_mfg_id) {
2566                 ret = qlcnic_83xx_enable_flash_write(adapter);
2567                 if (ret) {
2568                         qlcnic_83xx_unlock_flash(adapter);
2569                         dev_err(&adapter->pdev->dev,
2570                                 "%s failed at %d\n",
2571                                 __func__, __LINE__);
2572                         return ret;
2573                 }
2574         }
2575
2576         ret = qlcnic_83xx_poll_flash_status_reg(adapter);
2577         if (ret) {
2578                 qlcnic_83xx_unlock_flash(adapter);
2579                 dev_err(&adapter->pdev->dev,
2580                         "%s: failed at %d\n", __func__, __LINE__);
2581                 return -EIO;
2582         }
2583
2584         addr1 = (sector_start_addr & 0xFF) << 16;
2585         addr2 = (sector_start_addr & 0xFF0000) >> 16;
2586         reversed_addr = addr1 | addr2;
2587
2588         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA,
2589                                      reversed_addr);
2590         cmd = QLC_83XX_FLASH_FDT_ERASE_DEF_SIG | adapter->ahw->fdt.erase_cmd;
2591         if (adapter->ahw->fdt.mfg_id == adapter->flash_mfg_id)
2592                 qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR, cmd);
2593         else
2594                 qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR,
2595                                              QLC_83XX_FLASH_OEM_ERASE_SIG);
2596         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_CONTROL,
2597                                      QLC_83XX_FLASH_LAST_ERASE_MS_VAL);
2598
2599         ret = qlcnic_83xx_poll_flash_status_reg(adapter);
2600         if (ret) {
2601                 qlcnic_83xx_unlock_flash(adapter);
2602                 dev_err(&adapter->pdev->dev,
2603                         "%s: failed at %d\n", __func__, __LINE__);
2604                 return -EIO;
2605         }
2606
2607         if (adapter->ahw->fdt.mfg_id == adapter->flash_mfg_id) {
2608                 ret = qlcnic_83xx_disable_flash_write(adapter);
2609                 if (ret) {
2610                         qlcnic_83xx_unlock_flash(adapter);
2611                         dev_err(&adapter->pdev->dev,
2612                                 "%s: failed at %d\n", __func__, __LINE__);
2613                         return ret;
2614                 }
2615         }
2616
2617         qlcnic_83xx_unlock_flash(adapter);
2618
2619         return 0;
2620 }
2621
2622 int qlcnic_83xx_flash_write32(struct qlcnic_adapter *adapter, u32 addr,
2623                               u32 *p_data)
2624 {
2625         int ret = -EIO;
2626         u32 addr1 = 0x00800000 | (addr >> 2);
2627
2628         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR, addr1);
2629         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA, *p_data);
2630         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_CONTROL,
2631                                      QLC_83XX_FLASH_LAST_ERASE_MS_VAL);
2632         ret = qlcnic_83xx_poll_flash_status_reg(adapter);
2633         if (ret) {
2634                 dev_err(&adapter->pdev->dev,
2635                         "%s: failed at %d\n", __func__, __LINE__);
2636                 return -EIO;
2637         }
2638
2639         return 0;
2640 }
2641
2642 int qlcnic_83xx_flash_bulk_write(struct qlcnic_adapter *adapter, u32 addr,
2643                                  u32 *p_data, int count)
2644 {
2645         u32 temp;
2646         int ret = -EIO;
2647
2648         if ((count < QLC_83XX_FLASH_WRITE_MIN) ||
2649             (count > QLC_83XX_FLASH_WRITE_MAX)) {
2650                 dev_err(&adapter->pdev->dev,
2651                         "%s: Invalid word count\n", __func__);
2652                 return -EIO;
2653         }
2654
2655         temp = qlcnic_83xx_rd_reg_indirect(adapter,
2656                                            QLC_83XX_FLASH_SPI_CONTROL);
2657         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_SPI_CONTROL,
2658                                      (temp | QLC_83XX_FLASH_SPI_CTRL));
2659         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR,
2660                                      QLC_83XX_FLASH_ADDR_TEMP_VAL);
2661
2662         /* First DWORD write */
2663         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA, *p_data++);
2664         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_CONTROL,
2665                                      QLC_83XX_FLASH_FIRST_MS_PATTERN);
2666         ret = qlcnic_83xx_poll_flash_status_reg(adapter);
2667         if (ret) {
2668                 dev_err(&adapter->pdev->dev,
2669                         "%s: failed at %d\n", __func__, __LINE__);
2670                 return -EIO;
2671         }
2672
2673         count--;
2674         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR,
2675                                      QLC_83XX_FLASH_ADDR_SECOND_TEMP_VAL);
2676         /* Second to N-1 DWORD writes */
2677         while (count != 1) {
2678                 qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA,
2679                                              *p_data++);
2680                 qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_CONTROL,
2681                                              QLC_83XX_FLASH_SECOND_MS_PATTERN);
2682                 ret = qlcnic_83xx_poll_flash_status_reg(adapter);
2683                 if (ret) {
2684                         dev_err(&adapter->pdev->dev,
2685                                 "%s: failed at %d\n", __func__, __LINE__);
2686                         return -EIO;
2687                 }
2688                 count--;
2689         }
2690
2691         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR,
2692                                      QLC_83XX_FLASH_ADDR_TEMP_VAL |
2693                                      (addr >> 2));
2694         /* Last DWORD write */
2695         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA, *p_data++);
2696         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_CONTROL,
2697                                      QLC_83XX_FLASH_LAST_MS_PATTERN);
2698         ret = qlcnic_83xx_poll_flash_status_reg(adapter);
2699         if (ret) {
2700                 dev_err(&adapter->pdev->dev,
2701                         "%s: failed at %d\n", __func__, __LINE__);
2702                 return -EIO;
2703         }
2704
2705         ret = qlcnic_83xx_rd_reg_indirect(adapter, QLC_83XX_FLASH_SPI_STATUS);
2706         if ((ret & QLC_83XX_FLASH_SPI_CTRL) == QLC_83XX_FLASH_SPI_CTRL) {
2707                 dev_err(&adapter->pdev->dev, "%s: failed at %d\n",
2708                         __func__, __LINE__);
2709                 /* Operation failed, clear error bit */
2710                 temp = qlcnic_83xx_rd_reg_indirect(adapter,
2711                                                    QLC_83XX_FLASH_SPI_CONTROL);
2712                 qlcnic_83xx_wrt_reg_indirect(adapter,
2713                                              QLC_83XX_FLASH_SPI_CONTROL,
2714                                              (temp | QLC_83XX_FLASH_SPI_CTRL));
2715         }
2716
2717         return 0;
2718 }
2719
2720 static void qlcnic_83xx_recover_driver_lock(struct qlcnic_adapter *adapter)
2721 {
2722         u32 val, id;
2723
2724         val = QLCRDX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK);
2725
2726         /* Check if recovery need to be performed by the calling function */
2727         if ((val & QLC_83XX_DRV_LOCK_RECOVERY_STATUS_MASK) == 0) {
2728                 val = val & ~0x3F;
2729                 val = val | ((adapter->portnum << 2) |
2730                              QLC_83XX_NEED_DRV_LOCK_RECOVERY);
2731                 QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, val);
2732                 dev_info(&adapter->pdev->dev,
2733                          "%s: lock recovery initiated\n", __func__);
2734                 msleep(QLC_83XX_DRV_LOCK_RECOVERY_DELAY);
2735                 val = QLCRDX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK);
2736                 id = ((val >> 2) & 0xF);
2737                 if (id == adapter->portnum) {
2738                         val = val & ~QLC_83XX_DRV_LOCK_RECOVERY_STATUS_MASK;
2739                         val = val | QLC_83XX_DRV_LOCK_RECOVERY_IN_PROGRESS;
2740                         QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, val);
2741                         /* Force release the lock */
2742                         QLCRDX(adapter->ahw, QLC_83XX_DRV_UNLOCK);
2743                         /* Clear recovery bits */
2744                         val = val & ~0x3F;
2745                         QLCWRX(adapter->ahw, QLC_83XX_RECOVER_DRV_LOCK, val);
2746                         dev_info(&adapter->pdev->dev,
2747                                  "%s: lock recovery completed\n", __func__);
2748                 } else {
2749                         dev_info(&adapter->pdev->dev,
2750                                  "%s: func %d to resume lock recovery process\n",
2751                                  __func__, id);
2752                 }
2753         } else {
2754                 dev_info(&adapter->pdev->dev,
2755                          "%s: lock recovery initiated by other functions\n",
2756                          __func__);
2757         }
2758 }
2759
2760 int qlcnic_83xx_lock_driver(struct qlcnic_adapter *adapter)
2761 {
2762         u32 lock_alive_counter, val, id, i = 0, status = 0, temp = 0;
2763         int max_attempt = 0;
2764
2765         while (status == 0) {
2766                 status = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK);
2767                 if (status)
2768                         break;
2769
2770                 msleep(QLC_83XX_DRV_LOCK_WAIT_DELAY);
2771                 i++;
2772
2773                 if (i == 1)
2774                         temp = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
2775
2776                 if (i == QLC_83XX_DRV_LOCK_WAIT_COUNTER) {
2777                         val = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
2778                         if (val == temp) {
2779                                 id = val & 0xFF;
2780                                 dev_info(&adapter->pdev->dev,
2781                                          "%s: lock to be recovered from %d\n",
2782                                          __func__, id);
2783                                 qlcnic_83xx_recover_driver_lock(adapter);
2784                                 i = 0;
2785                                 max_attempt++;
2786                         } else {
2787                                 dev_err(&adapter->pdev->dev,
2788                                         "%s: failed to get lock\n", __func__);
2789                                 return -EIO;
2790                         }
2791                 }
2792
2793                 /* Force exit from while loop after few attempts */
2794                 if (max_attempt == QLC_83XX_MAX_DRV_LOCK_RECOVERY_ATTEMPT) {
2795                         dev_err(&adapter->pdev->dev,
2796                                 "%s: failed to get lock\n", __func__);
2797                         return -EIO;
2798                 }
2799         }
2800
2801         val = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
2802         lock_alive_counter = val >> 8;
2803         lock_alive_counter++;
2804         val = lock_alive_counter << 8 | adapter->portnum;
2805         QLCWRX(adapter->ahw, QLC_83XX_DRV_LOCK_ID, val);
2806
2807         return 0;
2808 }
2809
2810 void qlcnic_83xx_unlock_driver(struct qlcnic_adapter *adapter)
2811 {
2812         u32 val, lock_alive_counter, id;
2813
2814         val = QLCRDX(adapter->ahw, QLC_83XX_DRV_LOCK_ID);
2815         id = val & 0xFF;
2816         lock_alive_counter = val >> 8;
2817
2818         if (id != adapter->portnum)
2819                 dev_err(&adapter->pdev->dev,
2820                         "%s:Warning func %d is unlocking lock owned by %d\n",
2821                         __func__, adapter->portnum, id);
2822
2823         val = (lock_alive_counter << 8) | 0xFF;
2824         QLCWRX(adapter->ahw, QLC_83XX_DRV_LOCK_ID, val);
2825         QLCRDX(adapter->ahw, QLC_83XX_DRV_UNLOCK);
2826 }
2827
2828 int qlcnic_83xx_ms_mem_write128(struct qlcnic_adapter *adapter, u64 addr,
2829                                 u32 *data, u32 count)
2830 {
2831         int i, j, ret = 0;
2832         u32 temp;
2833
2834         /* Check alignment */
2835         if (addr & 0xF)
2836                 return -EIO;
2837
2838         mutex_lock(&adapter->ahw->mem_lock);
2839         qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_ADDR_HI, 0);
2840
2841         for (i = 0; i < count; i++, addr += 16) {
2842                 if (!((ADDR_IN_RANGE(addr, QLCNIC_ADDR_QDR_NET,
2843                                      QLCNIC_ADDR_QDR_NET_MAX)) ||
2844                       (ADDR_IN_RANGE(addr, QLCNIC_ADDR_DDR_NET,
2845                                      QLCNIC_ADDR_DDR_NET_MAX)))) {
2846                         mutex_unlock(&adapter->ahw->mem_lock);
2847                         return -EIO;
2848                 }
2849
2850                 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_ADDR_LO, addr);
2851                 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_WRTDATA_LO,
2852                                              *data++);
2853                 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_WRTDATA_HI,
2854                                              *data++);
2855                 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_WRTDATA_ULO,
2856                                              *data++);
2857                 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_WRTDATA_UHI,
2858                                              *data++);
2859                 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_CTRL,
2860                                              QLCNIC_TA_WRITE_ENABLE);
2861                 qlcnic_83xx_wrt_reg_indirect(adapter, QLCNIC_MS_CTRL,
2862                                              QLCNIC_TA_WRITE_START);
2863
2864                 for (j = 0; j < MAX_CTL_CHECK; j++) {
2865                         temp = qlcnic_83xx_rd_reg_indirect(adapter,
2866                                                            QLCNIC_MS_CTRL);
2867                         if ((temp & TA_CTL_BUSY) == 0)
2868                                 break;
2869                 }
2870
2871                 /* Status check failure */
2872                 if (j >= MAX_CTL_CHECK) {
2873                         printk_ratelimited(KERN_WARNING
2874                                            "MS memory write failed\n");
2875                         mutex_unlock(&adapter->ahw->mem_lock);
2876                         return -EIO;
2877                 }
2878         }
2879
2880         mutex_unlock(&adapter->ahw->mem_lock);
2881
2882         return ret;
2883 }
2884
2885 int qlcnic_83xx_flash_read32(struct qlcnic_adapter *adapter, u32 flash_addr,
2886                              u8 *p_data, int count)
2887 {
2888         int i, ret;
2889         u32 word, addr = flash_addr;
2890         ulong  indirect_addr;
2891
2892         if (qlcnic_83xx_lock_flash(adapter) != 0)
2893                 return -EIO;
2894
2895         if (addr & 0x3) {
2896                 dev_err(&adapter->pdev->dev, "Illegal addr = 0x%x\n", addr);
2897                 qlcnic_83xx_unlock_flash(adapter);
2898                 return -EIO;
2899         }
2900
2901         for (i = 0; i < count; i++) {
2902                 if (qlcnic_83xx_wrt_reg_indirect(adapter,
2903                                                  QLC_83XX_FLASH_DIRECT_WINDOW,
2904                                                  (addr))) {
2905                         qlcnic_83xx_unlock_flash(adapter);
2906                         return -EIO;
2907                 }
2908
2909                 indirect_addr = QLC_83XX_FLASH_DIRECT_DATA(addr);
2910                 ret = qlcnic_83xx_rd_reg_indirect(adapter,
2911                                                   indirect_addr);
2912                 if (ret == -EIO)
2913                         return -EIO;
2914                 word = ret;
2915                 *(u32 *)p_data  = word;
2916                 p_data = p_data + 4;
2917                 addr = addr + 4;
2918         }
2919
2920         qlcnic_83xx_unlock_flash(adapter);
2921
2922         return 0;
2923 }
2924
2925 int qlcnic_83xx_test_link(struct qlcnic_adapter *adapter)
2926 {
2927         u8 pci_func;
2928         int err;
2929         u32 config = 0, state;
2930         struct qlcnic_cmd_args cmd;
2931         struct qlcnic_hardware_context *ahw = adapter->ahw;
2932
2933         if (qlcnic_sriov_vf_check(adapter))
2934                 pci_func = adapter->portnum;
2935         else
2936                 pci_func = ahw->pci_func;
2937
2938         state = readl(ahw->pci_base0 + QLC_83XX_LINK_STATE(pci_func));
2939         if (!QLC_83xx_FUNC_VAL(state, pci_func)) {
2940                 dev_info(&adapter->pdev->dev, "link state down\n");
2941                 return config;
2942         }
2943
2944         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_LINK_STATUS);
2945         if (err)
2946                 return err;
2947
2948         err = qlcnic_issue_cmd(adapter, &cmd);
2949         if (err) {
2950                 dev_info(&adapter->pdev->dev,
2951                          "Get Link Status Command failed: 0x%x\n", err);
2952                 goto out;
2953         } else {
2954                 config = cmd.rsp.arg[1];
2955                 switch (QLC_83XX_CURRENT_LINK_SPEED(config)) {
2956                 case QLC_83XX_10M_LINK:
2957                         ahw->link_speed = SPEED_10;
2958                         break;
2959                 case QLC_83XX_100M_LINK:
2960                         ahw->link_speed = SPEED_100;
2961                         break;
2962                 case QLC_83XX_1G_LINK:
2963                         ahw->link_speed = SPEED_1000;
2964                         break;
2965                 case QLC_83XX_10G_LINK:
2966                         ahw->link_speed = SPEED_10000;
2967                         break;
2968                 default:
2969                         ahw->link_speed = 0;
2970                         break;
2971                 }
2972                 config = cmd.rsp.arg[3];
2973                 if (QLC_83XX_SFP_PRESENT(config)) {
2974                         switch (ahw->module_type) {
2975                         case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
2976                         case LINKEVENT_MODULE_OPTICAL_SRLR:
2977                         case LINKEVENT_MODULE_OPTICAL_LRM:
2978                         case LINKEVENT_MODULE_OPTICAL_SFP_1G:
2979                                 ahw->supported_type = PORT_FIBRE;
2980                                 break;
2981                         case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
2982                         case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
2983                         case LINKEVENT_MODULE_TWINAX:
2984                                 ahw->supported_type = PORT_TP;
2985                                 break;
2986                         default:
2987                                 ahw->supported_type = PORT_OTHER;
2988                         }
2989                 }
2990                 if (config & 1)
2991                         err = 1;
2992         }
2993 out:
2994         qlcnic_free_mbx_args(&cmd);
2995         return config;
2996 }
2997
2998 int qlcnic_83xx_get_settings(struct qlcnic_adapter *adapter,
2999                              struct ethtool_cmd *ecmd)
3000 {
3001         u32 config = 0;
3002         int status = 0;
3003         struct qlcnic_hardware_context *ahw = adapter->ahw;
3004
3005         /* Get port configuration info */
3006         status = qlcnic_83xx_get_port_info(adapter);
3007         /* Get Link Status related info */
3008         config = qlcnic_83xx_test_link(adapter);
3009         ahw->module_type = QLC_83XX_SFP_MODULE_TYPE(config);
3010         /* hard code until there is a way to get it from flash */
3011         ahw->board_type = QLCNIC_BRDTYPE_83XX_10G;
3012
3013         if (netif_running(adapter->netdev) && ahw->has_link_events) {
3014                 ethtool_cmd_speed_set(ecmd, ahw->link_speed);
3015                 ecmd->duplex = ahw->link_duplex;
3016                 ecmd->autoneg = ahw->link_autoneg;
3017         } else {
3018                 ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN);
3019                 ecmd->duplex = DUPLEX_UNKNOWN;
3020                 ecmd->autoneg = AUTONEG_DISABLE;
3021         }
3022
3023         if (ahw->port_type == QLCNIC_XGBE) {
3024                 ecmd->supported = SUPPORTED_10000baseT_Full;
3025                 ecmd->advertising = ADVERTISED_10000baseT_Full;
3026         } else {
3027                 ecmd->supported = (SUPPORTED_10baseT_Half |
3028                                    SUPPORTED_10baseT_Full |
3029                                    SUPPORTED_100baseT_Half |
3030                                    SUPPORTED_100baseT_Full |
3031                                    SUPPORTED_1000baseT_Half |
3032                                    SUPPORTED_1000baseT_Full);
3033                 ecmd->advertising = (ADVERTISED_100baseT_Half |
3034                                      ADVERTISED_100baseT_Full |
3035                                      ADVERTISED_1000baseT_Half |
3036                                      ADVERTISED_1000baseT_Full);
3037         }
3038
3039         switch (ahw->supported_type) {
3040         case PORT_FIBRE:
3041                 ecmd->supported |= SUPPORTED_FIBRE;
3042                 ecmd->advertising |= ADVERTISED_FIBRE;
3043                 ecmd->port = PORT_FIBRE;
3044                 ecmd->transceiver = XCVR_EXTERNAL;
3045                 break;
3046         case PORT_TP:
3047                 ecmd->supported |= SUPPORTED_TP;
3048                 ecmd->advertising |= ADVERTISED_TP;
3049                 ecmd->port = PORT_TP;
3050                 ecmd->transceiver = XCVR_INTERNAL;
3051                 break;
3052         default:
3053                 ecmd->supported |= SUPPORTED_FIBRE;
3054                 ecmd->advertising |= ADVERTISED_FIBRE;
3055                 ecmd->port = PORT_OTHER;
3056                 ecmd->transceiver = XCVR_EXTERNAL;
3057                 break;
3058         }
3059         ecmd->phy_address = ahw->physical_port;
3060         return status;
3061 }
3062
3063 int qlcnic_83xx_set_settings(struct qlcnic_adapter *adapter,
3064                              struct ethtool_cmd *ecmd)
3065 {
3066         int status = 0;
3067         u32 config = adapter->ahw->port_config;
3068
3069         if (ecmd->autoneg)
3070                 adapter->ahw->port_config |= BIT_15;
3071
3072         switch (ethtool_cmd_speed(ecmd)) {
3073         case SPEED_10:
3074                 adapter->ahw->port_config |= BIT_8;
3075                 break;
3076         case SPEED_100:
3077                 adapter->ahw->port_config |= BIT_9;
3078                 break;
3079         case SPEED_1000:
3080                 adapter->ahw->port_config |= BIT_10;
3081                 break;
3082         case SPEED_10000:
3083                 adapter->ahw->port_config |= BIT_11;
3084                 break;
3085         default:
3086                 return -EINVAL;
3087         }
3088
3089         status = qlcnic_83xx_set_port_config(adapter);
3090         if (status) {
3091                 dev_info(&adapter->pdev->dev,
3092                          "Faild to Set Link Speed and autoneg.\n");
3093                 adapter->ahw->port_config = config;
3094         }
3095         return status;
3096 }
3097
3098 static inline u64 *qlcnic_83xx_copy_stats(struct qlcnic_cmd_args *cmd,
3099                                           u64 *data, int index)
3100 {
3101         u32 low, hi;
3102         u64 val;
3103
3104         low = cmd->rsp.arg[index];
3105         hi = cmd->rsp.arg[index + 1];
3106         val = (((u64) low) | (((u64) hi) << 32));
3107         *data++ = val;
3108         return data;
3109 }
3110
3111 static u64 *qlcnic_83xx_fill_stats(struct qlcnic_adapter *adapter,
3112                                    struct qlcnic_cmd_args *cmd, u64 *data,
3113                                    int type, int *ret)
3114 {
3115         int err, k, total_regs;
3116
3117         *ret = 0;
3118         err = qlcnic_issue_cmd(adapter, cmd);
3119         if (err != QLCNIC_RCODE_SUCCESS) {
3120                 dev_info(&adapter->pdev->dev,
3121                          "Error in get statistics mailbox command\n");
3122                 *ret = -EIO;
3123                 return data;
3124         }
3125         total_regs = cmd->rsp.num;
3126         switch (type) {
3127         case QLC_83XX_STAT_MAC:
3128                 /* fill in MAC tx counters */
3129                 for (k = 2; k < 28; k += 2)
3130                         data = qlcnic_83xx_copy_stats(cmd, data, k);
3131                 /* skip 24 bytes of reserved area */
3132                 /* fill in MAC rx counters */
3133                 for (k += 6; k < 60; k += 2)
3134                         data = qlcnic_83xx_copy_stats(cmd, data, k);
3135                 /* skip 24 bytes of reserved area */
3136                 /* fill in MAC rx frame stats */
3137                 for (k += 6; k < 80; k += 2)
3138                         data = qlcnic_83xx_copy_stats(cmd, data, k);
3139                 /* fill in eSwitch stats */
3140                 for (; k < total_regs; k += 2)
3141                         data = qlcnic_83xx_copy_stats(cmd, data, k);
3142                 break;
3143         case QLC_83XX_STAT_RX:
3144                 for (k = 2; k < 8; k += 2)
3145                         data = qlcnic_83xx_copy_stats(cmd, data, k);
3146                 /* skip 8 bytes of reserved data */
3147                 for (k += 2; k < 24; k += 2)
3148                         data = qlcnic_83xx_copy_stats(cmd, data, k);
3149                 /* skip 8 bytes containing RE1FBQ error data */
3150                 for (k += 2; k < total_regs; k += 2)
3151                         data = qlcnic_83xx_copy_stats(cmd, data, k);
3152                 break;
3153         case QLC_83XX_STAT_TX:
3154                 for (k = 2; k < 10; k += 2)
3155                         data = qlcnic_83xx_copy_stats(cmd, data, k);
3156                 /* skip 8 bytes of reserved data */
3157                 for (k += 2; k < total_regs; k += 2)
3158                         data = qlcnic_83xx_copy_stats(cmd, data, k);
3159                 break;
3160         default:
3161                 dev_warn(&adapter->pdev->dev, "Unknown get statistics mode\n");
3162                 *ret = -EIO;
3163         }
3164         return data;
3165 }
3166
3167 void qlcnic_83xx_get_stats(struct qlcnic_adapter *adapter, u64 *data)
3168 {
3169         struct qlcnic_cmd_args cmd;
3170         struct net_device *netdev = adapter->netdev;
3171         int ret = 0;
3172
3173         ret = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_STATISTICS);
3174         if (ret)
3175                 return;
3176         /* Get Tx stats */
3177         cmd.req.arg[1] = BIT_1 | (adapter->tx_ring->ctx_id << 16);
3178         cmd.rsp.num = QLC_83XX_TX_STAT_REGS;
3179         data = qlcnic_83xx_fill_stats(adapter, &cmd, data,
3180                                       QLC_83XX_STAT_TX, &ret);
3181         if (ret) {
3182                 netdev_err(netdev, "Error getting Tx stats\n");
3183                 goto out;
3184         }
3185         /* Get MAC stats */
3186         cmd.req.arg[1] = BIT_2 | (adapter->portnum << 16);
3187         cmd.rsp.num = QLC_83XX_MAC_STAT_REGS;
3188         memset(cmd.rsp.arg, 0, sizeof(u32) * cmd.rsp.num);
3189         data = qlcnic_83xx_fill_stats(adapter, &cmd, data,
3190                                       QLC_83XX_STAT_MAC, &ret);
3191         if (ret) {
3192                 netdev_err(netdev, "Error getting MAC stats\n");
3193                 goto out;
3194         }
3195         /* Get Rx stats */
3196         cmd.req.arg[1] = adapter->recv_ctx->context_id << 16;
3197         cmd.rsp.num = QLC_83XX_RX_STAT_REGS;
3198         memset(cmd.rsp.arg, 0, sizeof(u32) * cmd.rsp.num);
3199         data = qlcnic_83xx_fill_stats(adapter, &cmd, data,
3200                                       QLC_83XX_STAT_RX, &ret);
3201         if (ret)
3202                 netdev_err(netdev, "Error getting Rx stats\n");
3203 out:
3204         qlcnic_free_mbx_args(&cmd);
3205 }
3206
3207 int qlcnic_83xx_reg_test(struct qlcnic_adapter *adapter)
3208 {
3209         u32 major, minor, sub;
3210
3211         major = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_MAJOR);
3212         minor = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_MINOR);
3213         sub = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_SUB);
3214
3215         if (adapter->fw_version != QLCNIC_VERSION_CODE(major, minor, sub)) {
3216                 dev_info(&adapter->pdev->dev, "%s: Reg test failed\n",
3217                          __func__);
3218                 return 1;
3219         }
3220         return 0;
3221 }
3222
3223 int qlcnic_83xx_get_regs_len(struct qlcnic_adapter *adapter)
3224 {
3225         return (ARRAY_SIZE(qlcnic_83xx_ext_reg_tbl) *
3226                 sizeof(adapter->ahw->ext_reg_tbl)) +
3227                 (ARRAY_SIZE(qlcnic_83xx_reg_tbl) +
3228                 sizeof(adapter->ahw->reg_tbl));
3229 }
3230
3231 int qlcnic_83xx_get_registers(struct qlcnic_adapter *adapter, u32 *regs_buff)
3232 {
3233         int i, j = 0;
3234
3235         for (i = QLCNIC_DEV_INFO_SIZE + 1;
3236              j < ARRAY_SIZE(qlcnic_83xx_reg_tbl); i++, j++)
3237                 regs_buff[i] = QLC_SHARED_REG_RD32(adapter, j);
3238
3239         for (j = 0; j < ARRAY_SIZE(qlcnic_83xx_ext_reg_tbl); j++)
3240                 regs_buff[i++] = QLCRDX(adapter->ahw, j);
3241         return i;
3242 }
3243
3244 int qlcnic_83xx_interrupt_test(struct net_device *netdev)
3245 {
3246         struct qlcnic_adapter *adapter = netdev_priv(netdev);
3247         struct qlcnic_hardware_context *ahw = adapter->ahw;
3248         struct qlcnic_cmd_args cmd;
3249         u32 data;
3250         u16 intrpt_id, id;
3251         u8 val;
3252         int ret, max_sds_rings = adapter->max_sds_rings;
3253
3254         if (qlcnic_get_diag_lock(adapter)) {
3255                 netdev_info(netdev, "Device in diagnostics mode\n");
3256                 return -EBUSY;
3257         }
3258
3259         ret = qlcnic_83xx_diag_alloc_res(netdev, QLCNIC_INTERRUPT_TEST,
3260                                          max_sds_rings);
3261         if (ret)
3262                 goto fail_diag_irq;
3263
3264         ahw->diag_cnt = 0;
3265         ret = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_INTRPT_TEST);
3266         if (ret)
3267                 goto fail_diag_irq;
3268
3269         if (adapter->flags & QLCNIC_MSIX_ENABLED)
3270                 intrpt_id = ahw->intr_tbl[0].id;
3271         else
3272                 intrpt_id = QLCRDX(ahw, QLCNIC_DEF_INT_ID);
3273
3274         cmd.req.arg[1] = 1;
3275         cmd.req.arg[2] = intrpt_id;
3276         cmd.req.arg[3] = BIT_0;
3277
3278         ret = qlcnic_issue_cmd(adapter, &cmd);
3279         data = cmd.rsp.arg[2];
3280         id = LSW(data);
3281         val = LSB(MSW(data));
3282         if (id != intrpt_id)
3283                 dev_info(&adapter->pdev->dev,
3284                          "Interrupt generated: 0x%x, requested:0x%x\n",
3285                          id, intrpt_id);
3286         if (val)
3287                 dev_err(&adapter->pdev->dev,
3288                          "Interrupt test error: 0x%x\n", val);
3289         if (ret)
3290                 goto done;
3291
3292         msleep(20);
3293         ret = !ahw->diag_cnt;
3294
3295 done:
3296         qlcnic_free_mbx_args(&cmd);
3297         qlcnic_83xx_diag_free_res(netdev, max_sds_rings);
3298
3299 fail_diag_irq:
3300         adapter->max_sds_rings = max_sds_rings;
3301         qlcnic_release_diag_lock(adapter);
3302         return ret;
3303 }
3304
3305 void qlcnic_83xx_get_pauseparam(struct qlcnic_adapter *adapter,
3306                                 struct ethtool_pauseparam *pause)
3307 {
3308         struct qlcnic_hardware_context *ahw = adapter->ahw;
3309         int status = 0;
3310         u32 config;
3311
3312         status = qlcnic_83xx_get_port_config(adapter);
3313         if (status) {
3314                 dev_err(&adapter->pdev->dev,
3315                         "%s: Get Pause Config failed\n", __func__);
3316                 return;
3317         }
3318         config = ahw->port_config;
3319         if (config & QLC_83XX_CFG_STD_PAUSE) {
3320                 if (config & QLC_83XX_CFG_STD_TX_PAUSE)
3321                         pause->tx_pause = 1;
3322                 if (config & QLC_83XX_CFG_STD_RX_PAUSE)
3323                         pause->rx_pause = 1;
3324         }
3325
3326         if (QLC_83XX_AUTONEG(config))
3327                 pause->autoneg = 1;
3328 }
3329
3330 int qlcnic_83xx_set_pauseparam(struct qlcnic_adapter *adapter,
3331                                struct ethtool_pauseparam *pause)
3332 {
3333         struct qlcnic_hardware_context *ahw = adapter->ahw;
3334         int status = 0;
3335         u32 config;
3336
3337         status = qlcnic_83xx_get_port_config(adapter);
3338         if (status) {
3339                 dev_err(&adapter->pdev->dev,
3340                         "%s: Get Pause Config failed.\n", __func__);
3341                 return status;
3342         }
3343         config = ahw->port_config;
3344
3345         if (ahw->port_type == QLCNIC_GBE) {
3346                 if (pause->autoneg)
3347                         ahw->port_config |= QLC_83XX_ENABLE_AUTONEG;
3348                 if (!pause->autoneg)
3349                         ahw->port_config &= ~QLC_83XX_ENABLE_AUTONEG;
3350         } else if ((ahw->port_type == QLCNIC_XGBE) && (pause->autoneg)) {
3351                 return -EOPNOTSUPP;
3352         }
3353
3354         if (!(config & QLC_83XX_CFG_STD_PAUSE))
3355                 ahw->port_config |= QLC_83XX_CFG_STD_PAUSE;
3356
3357         if (pause->rx_pause && pause->tx_pause) {
3358                 ahw->port_config |= QLC_83XX_CFG_STD_TX_RX_PAUSE;
3359         } else if (pause->rx_pause && !pause->tx_pause) {
3360                 ahw->port_config &= ~QLC_83XX_CFG_STD_TX_PAUSE;
3361                 ahw->port_config |= QLC_83XX_CFG_STD_RX_PAUSE;
3362         } else if (pause->tx_pause && !pause->rx_pause) {
3363                 ahw->port_config &= ~QLC_83XX_CFG_STD_RX_PAUSE;
3364                 ahw->port_config |= QLC_83XX_CFG_STD_TX_PAUSE;
3365         } else if (!pause->rx_pause && !pause->tx_pause) {
3366                 ahw->port_config &= ~QLC_83XX_CFG_STD_TX_RX_PAUSE;
3367         }
3368         status = qlcnic_83xx_set_port_config(adapter);
3369         if (status) {
3370                 dev_err(&adapter->pdev->dev,
3371                         "%s: Set Pause Config failed.\n", __func__);
3372                 ahw->port_config = config;
3373         }
3374         return status;
3375 }
3376
3377 static int qlcnic_83xx_read_flash_status_reg(struct qlcnic_adapter *adapter)
3378 {
3379         int ret;
3380
3381         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_ADDR,
3382                                      QLC_83XX_FLASH_OEM_READ_SIG);
3383         qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_CONTROL,
3384                                      QLC_83XX_FLASH_READ_CTRL);
3385         ret = qlcnic_83xx_poll_flash_status_reg(adapter);
3386         if (ret)
3387                 return -EIO;
3388
3389         ret = qlcnic_83xx_rd_reg_indirect(adapter, QLC_83XX_FLASH_RDDATA);
3390         return ret & 0xFF;
3391 }
3392
3393 int qlcnic_83xx_flash_test(struct qlcnic_adapter *adapter)
3394 {
3395         int status;
3396
3397         status = qlcnic_83xx_read_flash_status_reg(adapter);
3398         if (status == -EIO) {
3399                 dev_info(&adapter->pdev->dev, "%s: EEPROM test failed.\n",
3400                          __func__);
3401                 return 1;
3402         }
3403         return 0;
3404 }
3405
3406 int qlcnic_83xx_shutdown(struct pci_dev *pdev)
3407 {
3408         struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
3409         struct net_device *netdev = adapter->netdev;
3410         int retval;
3411
3412         netif_device_detach(netdev);
3413         qlcnic_cancel_idc_work(adapter);
3414
3415         if (netif_running(netdev))
3416                 qlcnic_down(adapter, netdev);
3417
3418         qlcnic_83xx_disable_mbx_intr(adapter);
3419         cancel_delayed_work_sync(&adapter->idc_aen_work);
3420
3421         retval = pci_save_state(pdev);
3422         if (retval)
3423                 return retval;
3424
3425         return 0;
3426 }
3427
3428 int qlcnic_83xx_resume(struct qlcnic_adapter *adapter)
3429 {
3430         struct qlcnic_hardware_context *ahw = adapter->ahw;
3431         struct qlc_83xx_idc *idc = &ahw->idc;
3432         int err = 0;
3433
3434         err = qlcnic_83xx_idc_init(adapter);
3435         if (err)
3436                 return err;
3437
3438         if (ahw->nic_mode == QLC_83XX_VIRTUAL_NIC_MODE) {
3439                 if (ahw->op_mode == QLCNIC_MGMT_FUNC) {
3440                         qlcnic_83xx_set_vnic_opmode(adapter);
3441                 } else {
3442                         err = qlcnic_83xx_check_vnic_state(adapter);
3443                         if (err)
3444                                 return err;
3445                 }
3446         }
3447
3448         err = qlcnic_83xx_idc_reattach_driver(adapter);
3449         if (err)
3450                 return err;
3451
3452         qlcnic_schedule_work(adapter, qlcnic_83xx_idc_poll_dev_state,
3453                              idc->delay);
3454         return err;
3455 }