1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2011 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for ixgbe */
30 #include <linux/types.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/pci.h>
34 #include <linux/netdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/vmalloc.h>
37 #include <linux/uaccess.h>
42 #define IXGBE_ALL_RAR_ENTRIES 16
44 enum {NETDEV_STATS, IXGBE_STATS};
47 char stat_string[ETH_GSTRING_LEN];
53 #define IXGBE_STAT(m) IXGBE_STATS, \
54 sizeof(((struct ixgbe_adapter *)0)->m), \
55 offsetof(struct ixgbe_adapter, m)
56 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \
57 sizeof(((struct rtnl_link_stats64 *)0)->m), \
58 offsetof(struct rtnl_link_stats64, m)
60 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
61 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
62 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
63 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
64 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
65 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
66 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
67 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
68 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
69 {"lsc_int", IXGBE_STAT(lsc_int)},
70 {"tx_busy", IXGBE_STAT(tx_busy)},
71 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
72 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
73 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
74 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
75 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
76 {"multicast", IXGBE_NETDEV_STAT(multicast)},
77 {"broadcast", IXGBE_STAT(stats.bprc)},
78 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
79 {"collisions", IXGBE_NETDEV_STAT(collisions)},
80 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
81 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
82 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
83 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
84 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
85 {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
86 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
87 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
88 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
89 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
90 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
91 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
92 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
93 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
94 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
95 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
96 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
97 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
98 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
99 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
100 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
101 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
102 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
103 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
104 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
106 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
107 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
108 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
109 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
110 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
111 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
112 #endif /* IXGBE_FCOE */
115 #define IXGBE_QUEUE_STATS_LEN \
116 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
117 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
118 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
119 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
120 #define IXGBE_PB_STATS_LEN ( \
121 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
122 IXGBE_FLAG_DCB_ENABLED) ? \
123 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
124 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
125 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
126 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
128 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
129 IXGBE_PB_STATS_LEN + \
130 IXGBE_QUEUE_STATS_LEN)
132 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
133 "Register test (offline)", "Eeprom test (offline)",
134 "Interrupt test (offline)", "Loopback test (offline)",
135 "Link test (on/offline)"
137 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
139 static int ixgbe_get_settings(struct net_device *netdev,
140 struct ethtool_cmd *ecmd)
142 struct ixgbe_adapter *adapter = netdev_priv(netdev);
143 struct ixgbe_hw *hw = &adapter->hw;
147 ecmd->supported = SUPPORTED_10000baseT_Full;
148 ecmd->autoneg = AUTONEG_ENABLE;
149 ecmd->transceiver = XCVR_EXTERNAL;
150 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
151 (hw->phy.multispeed_fiber)) {
152 ecmd->supported |= (SUPPORTED_1000baseT_Full |
155 switch (hw->mac.type) {
157 ecmd->supported |= SUPPORTED_100baseT_Full;
163 ecmd->advertising = ADVERTISED_Autoneg;
164 if (hw->phy.autoneg_advertised) {
165 if (hw->phy.autoneg_advertised &
166 IXGBE_LINK_SPEED_100_FULL)
167 ecmd->advertising |= ADVERTISED_100baseT_Full;
168 if (hw->phy.autoneg_advertised &
169 IXGBE_LINK_SPEED_10GB_FULL)
170 ecmd->advertising |= ADVERTISED_10000baseT_Full;
171 if (hw->phy.autoneg_advertised &
172 IXGBE_LINK_SPEED_1GB_FULL)
173 ecmd->advertising |= ADVERTISED_1000baseT_Full;
176 * Default advertised modes in case
177 * phy.autoneg_advertised isn't set.
179 ecmd->advertising |= (ADVERTISED_10000baseT_Full |
180 ADVERTISED_1000baseT_Full);
181 if (hw->mac.type == ixgbe_mac_X540)
182 ecmd->advertising |= ADVERTISED_100baseT_Full;
185 if (hw->phy.media_type == ixgbe_media_type_copper) {
186 ecmd->supported |= SUPPORTED_TP;
187 ecmd->advertising |= ADVERTISED_TP;
188 ecmd->port = PORT_TP;
190 ecmd->supported |= SUPPORTED_FIBRE;
191 ecmd->advertising |= ADVERTISED_FIBRE;
192 ecmd->port = PORT_FIBRE;
194 } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
195 /* Set as FIBRE until SERDES defined in kernel */
196 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
197 ecmd->supported = (SUPPORTED_1000baseT_Full |
199 ecmd->advertising = (ADVERTISED_1000baseT_Full |
201 ecmd->port = PORT_FIBRE;
202 ecmd->autoneg = AUTONEG_DISABLE;
203 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
204 (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
205 ecmd->supported |= (SUPPORTED_1000baseT_Full |
208 ecmd->advertising = (ADVERTISED_10000baseT_Full |
209 ADVERTISED_1000baseT_Full |
212 ecmd->port = PORT_FIBRE;
214 ecmd->supported |= (SUPPORTED_1000baseT_Full |
216 ecmd->advertising = (ADVERTISED_10000baseT_Full |
217 ADVERTISED_1000baseT_Full |
219 ecmd->port = PORT_FIBRE;
222 ecmd->supported |= SUPPORTED_FIBRE;
223 ecmd->advertising = (ADVERTISED_10000baseT_Full |
225 ecmd->port = PORT_FIBRE;
226 ecmd->autoneg = AUTONEG_DISABLE;
230 switch (adapter->hw.phy.type) {
233 case ixgbe_phy_cu_unknown:
234 /* Copper 10G-BASET */
235 ecmd->port = PORT_TP;
238 ecmd->port = PORT_FIBRE;
241 case ixgbe_phy_sfp_passive_tyco:
242 case ixgbe_phy_sfp_passive_unknown:
243 case ixgbe_phy_sfp_ftl:
244 case ixgbe_phy_sfp_avago:
245 case ixgbe_phy_sfp_intel:
246 case ixgbe_phy_sfp_unknown:
247 switch (adapter->hw.phy.sfp_type) {
248 /* SFP+ devices, further checking needed */
249 case ixgbe_sfp_type_da_cu:
250 case ixgbe_sfp_type_da_cu_core0:
251 case ixgbe_sfp_type_da_cu_core1:
252 ecmd->port = PORT_DA;
254 case ixgbe_sfp_type_sr:
255 case ixgbe_sfp_type_lr:
256 case ixgbe_sfp_type_srlr_core0:
257 case ixgbe_sfp_type_srlr_core1:
258 ecmd->port = PORT_FIBRE;
260 case ixgbe_sfp_type_not_present:
261 ecmd->port = PORT_NONE;
263 case ixgbe_sfp_type_1g_cu_core0:
264 case ixgbe_sfp_type_1g_cu_core1:
265 ecmd->port = PORT_TP;
266 ecmd->supported = SUPPORTED_TP;
267 ecmd->advertising = (ADVERTISED_1000baseT_Full |
270 case ixgbe_sfp_type_unknown:
272 ecmd->port = PORT_OTHER;
277 ecmd->port = PORT_NONE;
279 case ixgbe_phy_unknown:
280 case ixgbe_phy_generic:
281 case ixgbe_phy_sfp_unsupported:
283 ecmd->port = PORT_OTHER;
287 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
289 switch (link_speed) {
290 case IXGBE_LINK_SPEED_10GB_FULL:
291 ethtool_cmd_speed_set(ecmd, SPEED_10000);
293 case IXGBE_LINK_SPEED_1GB_FULL:
294 ethtool_cmd_speed_set(ecmd, SPEED_1000);
296 case IXGBE_LINK_SPEED_100_FULL:
297 ethtool_cmd_speed_set(ecmd, SPEED_100);
302 ecmd->duplex = DUPLEX_FULL;
304 ethtool_cmd_speed_set(ecmd, -1);
311 static int ixgbe_set_settings(struct net_device *netdev,
312 struct ethtool_cmd *ecmd)
314 struct ixgbe_adapter *adapter = netdev_priv(netdev);
315 struct ixgbe_hw *hw = &adapter->hw;
319 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
320 (hw->phy.multispeed_fiber)) {
321 /* 10000/copper and 1000/copper must autoneg
322 * this function does not support any duplex forcing, but can
323 * limit the advertising of the adapter to only 10000 or 1000 */
324 if (ecmd->autoneg == AUTONEG_DISABLE)
327 old = hw->phy.autoneg_advertised;
329 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
330 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
332 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
333 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
335 if (ecmd->advertising & ADVERTISED_100baseT_Full)
336 advertised |= IXGBE_LINK_SPEED_100_FULL;
338 if (old == advertised)
340 /* this sets the link speed and restarts auto-neg */
341 hw->mac.autotry_restart = true;
342 err = hw->mac.ops.setup_link(hw, advertised, true, true);
344 e_info(probe, "setup link failed with code %d\n", err);
345 hw->mac.ops.setup_link(hw, old, true, true);
348 /* in this case we currently only support 10Gb/FULL */
349 u32 speed = ethtool_cmd_speed(ecmd);
350 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
351 (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
352 (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
359 static void ixgbe_get_pauseparam(struct net_device *netdev,
360 struct ethtool_pauseparam *pause)
362 struct ixgbe_adapter *adapter = netdev_priv(netdev);
363 struct ixgbe_hw *hw = &adapter->hw;
366 * Flow Control Autoneg isn't on if
367 * - we didn't ask for it OR
368 * - it failed, we know this by tx & rx being off
370 if (hw->fc.disable_fc_autoneg ||
371 (hw->fc.current_mode == ixgbe_fc_none))
376 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
378 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
380 } else if (hw->fc.current_mode == ixgbe_fc_full) {
384 } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
391 static int ixgbe_set_pauseparam(struct net_device *netdev,
392 struct ethtool_pauseparam *pause)
394 struct ixgbe_adapter *adapter = netdev_priv(netdev);
395 struct ixgbe_hw *hw = &adapter->hw;
396 struct ixgbe_fc_info fc;
399 if (adapter->dcb_cfg.pfc_mode_enable ||
400 ((hw->mac.type == ixgbe_mac_82598EB) &&
401 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
407 if (pause->autoneg != AUTONEG_ENABLE)
408 fc.disable_fc_autoneg = true;
410 fc.disable_fc_autoneg = false;
412 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
413 fc.requested_mode = ixgbe_fc_full;
414 else if (pause->rx_pause && !pause->tx_pause)
415 fc.requested_mode = ixgbe_fc_rx_pause;
416 else if (!pause->rx_pause && pause->tx_pause)
417 fc.requested_mode = ixgbe_fc_tx_pause;
418 else if (!pause->rx_pause && !pause->tx_pause)
419 fc.requested_mode = ixgbe_fc_none;
424 adapter->last_lfc_mode = fc.requested_mode;
427 /* if the thing changed then we'll update and use new autoneg */
428 if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
430 if (netif_running(netdev))
431 ixgbe_reinit_locked(adapter);
433 ixgbe_reset(adapter);
439 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
441 struct ixgbe_adapter *adapter = netdev_priv(netdev);
442 return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
445 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
447 struct ixgbe_adapter *adapter = netdev_priv(netdev);
449 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
451 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
456 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
458 return (netdev->features & NETIF_F_IP_CSUM) != 0;
461 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
463 struct ixgbe_adapter *adapter = netdev_priv(netdev);
466 feature_list = (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
467 switch (adapter->hw.mac.type) {
468 case ixgbe_mac_82599EB:
470 feature_list |= NETIF_F_SCTP_CSUM;
476 netdev->features |= feature_list;
478 netdev->features &= ~feature_list;
483 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
486 netdev->features |= NETIF_F_TSO;
487 netdev->features |= NETIF_F_TSO6;
489 netdev->features &= ~NETIF_F_TSO;
490 netdev->features &= ~NETIF_F_TSO6;
495 static u32 ixgbe_get_msglevel(struct net_device *netdev)
497 struct ixgbe_adapter *adapter = netdev_priv(netdev);
498 return adapter->msg_enable;
501 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
503 struct ixgbe_adapter *adapter = netdev_priv(netdev);
504 adapter->msg_enable = data;
507 static int ixgbe_get_regs_len(struct net_device *netdev)
509 #define IXGBE_REGS_LEN 1128
510 return IXGBE_REGS_LEN * sizeof(u32);
513 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
515 static void ixgbe_get_regs(struct net_device *netdev,
516 struct ethtool_regs *regs, void *p)
518 struct ixgbe_adapter *adapter = netdev_priv(netdev);
519 struct ixgbe_hw *hw = &adapter->hw;
523 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
525 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
527 /* General Registers */
528 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
529 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
530 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
531 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
532 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
533 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
534 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
535 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
538 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
539 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
540 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
541 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
542 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
543 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
544 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
545 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
546 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
547 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
550 /* don't read EICR because it can clear interrupt causes, instead
551 * read EICS which is a shadow but doesn't clear EICR */
552 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
553 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
554 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
555 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
556 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
557 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
558 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
559 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
560 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
561 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
562 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
563 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
566 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
567 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
568 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
569 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
570 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
571 for (i = 0; i < 8; i++) {
572 switch (hw->mac.type) {
573 case ixgbe_mac_82598EB:
574 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
575 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
577 case ixgbe_mac_82599EB:
578 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
579 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
585 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
586 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
589 for (i = 0; i < 64; i++)
590 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
591 for (i = 0; i < 64; i++)
592 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
593 for (i = 0; i < 64; i++)
594 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
595 for (i = 0; i < 64; i++)
596 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
597 for (i = 0; i < 64; i++)
598 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
599 for (i = 0; i < 64; i++)
600 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
601 for (i = 0; i < 16; i++)
602 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
603 for (i = 0; i < 16; i++)
604 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
605 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
606 for (i = 0; i < 8; i++)
607 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
608 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
609 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
612 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
613 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
614 for (i = 0; i < 16; i++)
615 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
616 for (i = 0; i < 16; i++)
617 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
618 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
619 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
620 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
621 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
622 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
623 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
624 for (i = 0; i < 8; i++)
625 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
626 for (i = 0; i < 8; i++)
627 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
628 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
631 for (i = 0; i < 32; i++)
632 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
633 for (i = 0; i < 32; i++)
634 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
635 for (i = 0; i < 32; i++)
636 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
637 for (i = 0; i < 32; i++)
638 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
639 for (i = 0; i < 32; i++)
640 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
641 for (i = 0; i < 32; i++)
642 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
643 for (i = 0; i < 32; i++)
644 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
645 for (i = 0; i < 32; i++)
646 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
647 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
648 for (i = 0; i < 16; i++)
649 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
650 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
651 for (i = 0; i < 8; i++)
652 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
653 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
656 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
657 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
658 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
659 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
660 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
661 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
662 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
663 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
664 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
667 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
668 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
669 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
670 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
671 for (i = 0; i < 8; i++)
672 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
673 for (i = 0; i < 8; i++)
674 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
675 for (i = 0; i < 8; i++)
676 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
677 for (i = 0; i < 8; i++)
678 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
679 for (i = 0; i < 8; i++)
680 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
681 for (i = 0; i < 8; i++)
682 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
685 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
686 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
687 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
688 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
689 for (i = 0; i < 8; i++)
690 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
691 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
692 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
693 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
694 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
695 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
696 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
697 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
698 for (i = 0; i < 8; i++)
699 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
700 for (i = 0; i < 8; i++)
701 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
702 for (i = 0; i < 8; i++)
703 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
704 for (i = 0; i < 8; i++)
705 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
706 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
707 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
708 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
709 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
710 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
711 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
712 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
713 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
714 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
715 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
716 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
717 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
718 for (i = 0; i < 8; i++)
719 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
720 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
721 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
722 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
723 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
724 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
725 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
726 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
727 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
728 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
729 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
730 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
731 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
732 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
733 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
734 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
735 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
736 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
737 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
738 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
739 for (i = 0; i < 16; i++)
740 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
741 for (i = 0; i < 16; i++)
742 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
743 for (i = 0; i < 16; i++)
744 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
745 for (i = 0; i < 16; i++)
746 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
749 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
750 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
751 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
752 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
753 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
754 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
755 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
756 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
757 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
758 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
759 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
760 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
761 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
762 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
763 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
764 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
765 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
766 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
767 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
768 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
769 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
770 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
771 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
772 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
773 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
774 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
775 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
776 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
777 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
778 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
779 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
780 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
781 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
784 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
785 for (i = 0; i < 8; i++)
786 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
787 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
788 for (i = 0; i < 4; i++)
789 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
790 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
791 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
792 for (i = 0; i < 8; i++)
793 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
794 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
795 for (i = 0; i < 4; i++)
796 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
797 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
798 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
799 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
800 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
801 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
802 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
803 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
804 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
805 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
806 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
807 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
808 for (i = 0; i < 8; i++)
809 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
810 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
811 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
812 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
813 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
814 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
815 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
816 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
817 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
818 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
821 static int ixgbe_get_eeprom_len(struct net_device *netdev)
823 struct ixgbe_adapter *adapter = netdev_priv(netdev);
824 return adapter->hw.eeprom.word_size * 2;
827 static int ixgbe_get_eeprom(struct net_device *netdev,
828 struct ethtool_eeprom *eeprom, u8 *bytes)
830 struct ixgbe_adapter *adapter = netdev_priv(netdev);
831 struct ixgbe_hw *hw = &adapter->hw;
833 int first_word, last_word, eeprom_len;
837 if (eeprom->len == 0)
840 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
842 first_word = eeprom->offset >> 1;
843 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
844 eeprom_len = last_word - first_word + 1;
846 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
850 for (i = 0; i < eeprom_len; i++) {
851 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
856 /* Device's eeprom is always little-endian, word addressable */
857 for (i = 0; i < eeprom_len; i++)
858 le16_to_cpus(&eeprom_buff[i]);
860 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
866 static void ixgbe_get_drvinfo(struct net_device *netdev,
867 struct ethtool_drvinfo *drvinfo)
869 struct ixgbe_adapter *adapter = netdev_priv(netdev);
870 char firmware_version[32];
872 strncpy(drvinfo->driver, ixgbe_driver_name,
873 sizeof(drvinfo->driver) - 1);
874 strncpy(drvinfo->version, ixgbe_driver_version,
875 sizeof(drvinfo->version) - 1);
877 snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
878 (adapter->eeprom_version & 0xF000) >> 12,
879 (adapter->eeprom_version & 0x0FF0) >> 4,
880 adapter->eeprom_version & 0x000F);
882 strncpy(drvinfo->fw_version, firmware_version,
883 sizeof(drvinfo->fw_version));
884 strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
885 sizeof(drvinfo->bus_info));
886 drvinfo->n_stats = IXGBE_STATS_LEN;
887 drvinfo->testinfo_len = IXGBE_TEST_LEN;
888 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
891 static void ixgbe_get_ringparam(struct net_device *netdev,
892 struct ethtool_ringparam *ring)
894 struct ixgbe_adapter *adapter = netdev_priv(netdev);
895 struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
896 struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
898 ring->rx_max_pending = IXGBE_MAX_RXD;
899 ring->tx_max_pending = IXGBE_MAX_TXD;
900 ring->rx_mini_max_pending = 0;
901 ring->rx_jumbo_max_pending = 0;
902 ring->rx_pending = rx_ring->count;
903 ring->tx_pending = tx_ring->count;
904 ring->rx_mini_pending = 0;
905 ring->rx_jumbo_pending = 0;
908 static int ixgbe_set_ringparam(struct net_device *netdev,
909 struct ethtool_ringparam *ring)
911 struct ixgbe_adapter *adapter = netdev_priv(netdev);
912 struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
914 u32 new_rx_count, new_tx_count;
915 bool need_update = false;
917 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
920 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
921 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
922 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
924 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
925 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
926 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
928 if ((new_tx_count == adapter->tx_ring[0]->count) &&
929 (new_rx_count == adapter->rx_ring[0]->count)) {
934 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
935 usleep_range(1000, 2000);
937 if (!netif_running(adapter->netdev)) {
938 for (i = 0; i < adapter->num_tx_queues; i++)
939 adapter->tx_ring[i]->count = new_tx_count;
940 for (i = 0; i < adapter->num_rx_queues; i++)
941 adapter->rx_ring[i]->count = new_rx_count;
942 adapter->tx_ring_count = new_tx_count;
943 adapter->rx_ring_count = new_rx_count;
947 temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
953 if (new_tx_count != adapter->tx_ring_count) {
954 for (i = 0; i < adapter->num_tx_queues; i++) {
955 memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
956 sizeof(struct ixgbe_ring));
957 temp_tx_ring[i].count = new_tx_count;
958 err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
962 ixgbe_free_tx_resources(&temp_tx_ring[i]);
970 temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
976 if (new_rx_count != adapter->rx_ring_count) {
977 for (i = 0; i < adapter->num_rx_queues; i++) {
978 memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
979 sizeof(struct ixgbe_ring));
980 temp_rx_ring[i].count = new_rx_count;
981 err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
985 ixgbe_free_rx_resources(&temp_rx_ring[i]);
993 /* if rings need to be updated, here's the place to do it in one shot */
998 if (new_tx_count != adapter->tx_ring_count) {
999 for (i = 0; i < adapter->num_tx_queues; i++) {
1000 ixgbe_free_tx_resources(adapter->tx_ring[i]);
1001 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
1002 sizeof(struct ixgbe_ring));
1004 adapter->tx_ring_count = new_tx_count;
1008 if (new_rx_count != adapter->rx_ring_count) {
1009 for (i = 0; i < adapter->num_rx_queues; i++) {
1010 ixgbe_free_rx_resources(adapter->rx_ring[i]);
1011 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
1012 sizeof(struct ixgbe_ring));
1014 adapter->rx_ring_count = new_rx_count;
1019 vfree(temp_rx_ring);
1021 vfree(temp_tx_ring);
1023 clear_bit(__IXGBE_RESETTING, &adapter->state);
1027 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1031 return IXGBE_TEST_LEN;
1033 return IXGBE_STATS_LEN;
1039 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1040 struct ethtool_stats *stats, u64 *data)
1042 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1043 struct rtnl_link_stats64 temp;
1044 const struct rtnl_link_stats64 *net_stats;
1046 struct ixgbe_ring *ring;
1050 ixgbe_update_stats(adapter);
1051 net_stats = dev_get_stats(netdev, &temp);
1052 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1053 switch (ixgbe_gstrings_stats[i].type) {
1055 p = (char *) net_stats +
1056 ixgbe_gstrings_stats[i].stat_offset;
1059 p = (char *) adapter +
1060 ixgbe_gstrings_stats[i].stat_offset;
1064 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1065 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1067 for (j = 0; j < adapter->num_tx_queues; j++) {
1068 ring = adapter->tx_ring[j];
1070 start = u64_stats_fetch_begin_bh(&ring->syncp);
1071 data[i] = ring->stats.packets;
1072 data[i+1] = ring->stats.bytes;
1073 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1076 for (j = 0; j < adapter->num_rx_queues; j++) {
1077 ring = adapter->rx_ring[j];
1079 start = u64_stats_fetch_begin_bh(&ring->syncp);
1080 data[i] = ring->stats.packets;
1081 data[i+1] = ring->stats.bytes;
1082 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1085 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1086 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1087 data[i++] = adapter->stats.pxontxc[j];
1088 data[i++] = adapter->stats.pxofftxc[j];
1090 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1091 data[i++] = adapter->stats.pxonrxc[j];
1092 data[i++] = adapter->stats.pxoffrxc[j];
1097 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1100 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1101 char *p = (char *)data;
1104 switch (stringset) {
1106 memcpy(data, *ixgbe_gstrings_test,
1107 IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1110 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1111 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1113 p += ETH_GSTRING_LEN;
1115 for (i = 0; i < adapter->num_tx_queues; i++) {
1116 sprintf(p, "tx_queue_%u_packets", i);
1117 p += ETH_GSTRING_LEN;
1118 sprintf(p, "tx_queue_%u_bytes", i);
1119 p += ETH_GSTRING_LEN;
1121 for (i = 0; i < adapter->num_rx_queues; i++) {
1122 sprintf(p, "rx_queue_%u_packets", i);
1123 p += ETH_GSTRING_LEN;
1124 sprintf(p, "rx_queue_%u_bytes", i);
1125 p += ETH_GSTRING_LEN;
1127 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1128 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1129 sprintf(p, "tx_pb_%u_pxon", i);
1130 p += ETH_GSTRING_LEN;
1131 sprintf(p, "tx_pb_%u_pxoff", i);
1132 p += ETH_GSTRING_LEN;
1134 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1135 sprintf(p, "rx_pb_%u_pxon", i);
1136 p += ETH_GSTRING_LEN;
1137 sprintf(p, "rx_pb_%u_pxoff", i);
1138 p += ETH_GSTRING_LEN;
1141 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1146 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1148 struct ixgbe_hw *hw = &adapter->hw;
1153 hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1161 /* ethtool register test data */
1162 struct ixgbe_reg_test {
1170 /* In the hardware, registers are laid out either singly, in arrays
1171 * spaced 0x40 bytes apart, or in contiguous tables. We assume
1172 * most tests take place on arrays or single registers (handled
1173 * as a single-element array) and special-case the tables.
1174 * Table tests are always pattern tests.
1176 * We also make provision for some required setup steps by specifying
1177 * registers to be written without any read-back testing.
1180 #define PATTERN_TEST 1
1181 #define SET_READ_TEST 2
1182 #define WRITE_NO_TEST 3
1183 #define TABLE32_TEST 4
1184 #define TABLE64_TEST_LO 5
1185 #define TABLE64_TEST_HI 6
1187 /* default 82599 register test */
1188 static const struct ixgbe_reg_test reg_test_82599[] = {
1189 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1190 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1191 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1192 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1193 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1194 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1195 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1196 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1197 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1198 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1199 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1200 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1201 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1202 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1203 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1204 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1205 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1206 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1207 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1211 /* default 82598 register test */
1212 static const struct ixgbe_reg_test reg_test_82598[] = {
1213 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1214 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1215 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1216 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1217 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1218 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1219 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1220 /* Enable all four RX queues before testing. */
1221 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1222 /* RDH is read-only for 82598, only test RDT. */
1223 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1224 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1225 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1226 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1227 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1228 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1229 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1230 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1231 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1232 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1233 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1234 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1235 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1239 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1240 u32 mask, u32 write)
1242 u32 pat, val, before;
1243 static const u32 test_pattern[] = {
1244 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1246 for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1247 before = readl(adapter->hw.hw_addr + reg);
1248 writel((test_pattern[pat] & write),
1249 (adapter->hw.hw_addr + reg));
1250 val = readl(adapter->hw.hw_addr + reg);
1251 if (val != (test_pattern[pat] & write & mask)) {
1252 e_err(drv, "pattern test reg %04X failed: got "
1253 "0x%08X expected 0x%08X\n",
1254 reg, val, (test_pattern[pat] & write & mask));
1256 writel(before, adapter->hw.hw_addr + reg);
1259 writel(before, adapter->hw.hw_addr + reg);
1264 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1265 u32 mask, u32 write)
1268 before = readl(adapter->hw.hw_addr + reg);
1269 writel((write & mask), (adapter->hw.hw_addr + reg));
1270 val = readl(adapter->hw.hw_addr + reg);
1271 if ((write & mask) != (val & mask)) {
1272 e_err(drv, "set/check reg %04X test failed: got 0x%08X "
1273 "expected 0x%08X\n", reg, (val & mask), (write & mask));
1275 writel(before, (adapter->hw.hw_addr + reg));
1278 writel(before, (adapter->hw.hw_addr + reg));
1282 #define REG_PATTERN_TEST(reg, mask, write) \
1284 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1289 #define REG_SET_AND_CHECK(reg, mask, write) \
1291 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1295 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1297 const struct ixgbe_reg_test *test;
1298 u32 value, before, after;
1301 switch (adapter->hw.mac.type) {
1302 case ixgbe_mac_82598EB:
1303 toggle = 0x7FFFF3FF;
1304 test = reg_test_82598;
1306 case ixgbe_mac_82599EB:
1307 case ixgbe_mac_X540:
1308 toggle = 0x7FFFF30F;
1309 test = reg_test_82599;
1318 * Because the status register is such a special case,
1319 * we handle it separately from the rest of the register
1320 * tests. Some bits are read-only, some toggle, and some
1321 * are writeable on newer MACs.
1323 before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1324 value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1325 IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1326 after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1327 if (value != after) {
1328 e_err(drv, "failed STATUS register test got: 0x%08X "
1329 "expected: 0x%08X\n", after, value);
1333 /* restore previous status */
1334 IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1337 * Perform the remainder of the register test, looping through
1338 * the test table until we either fail or reach the null entry.
1341 for (i = 0; i < test->array_len; i++) {
1342 switch (test->test_type) {
1344 REG_PATTERN_TEST(test->reg + (i * 0x40),
1349 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1355 (adapter->hw.hw_addr + test->reg)
1359 REG_PATTERN_TEST(test->reg + (i * 4),
1363 case TABLE64_TEST_LO:
1364 REG_PATTERN_TEST(test->reg + (i * 8),
1368 case TABLE64_TEST_HI:
1369 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1382 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1384 struct ixgbe_hw *hw = &adapter->hw;
1385 if (hw->eeprom.ops.validate_checksum(hw, NULL))
1392 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1394 struct net_device *netdev = (struct net_device *) data;
1395 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1397 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1402 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1404 struct net_device *netdev = adapter->netdev;
1405 u32 mask, i = 0, shared_int = true;
1406 u32 irq = adapter->pdev->irq;
1410 /* Hook up test interrupt handler just for this test */
1411 if (adapter->msix_entries) {
1412 /* NOTE: we don't test MSI-X interrupts here, yet */
1414 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1416 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1421 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1422 netdev->name, netdev)) {
1424 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1425 netdev->name, netdev)) {
1429 e_info(hw, "testing %s interrupt\n", shared_int ?
1430 "shared" : "unshared");
1432 /* Disable all the interrupts */
1433 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1434 usleep_range(10000, 20000);
1436 /* Test each interrupt */
1437 for (; i < 10; i++) {
1438 /* Interrupt to test */
1443 * Disable the interrupts to be reported in
1444 * the cause register and then force the same
1445 * interrupt and see if one gets posted. If
1446 * an interrupt was posted to the bus, the
1449 adapter->test_icr = 0;
1450 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1451 ~mask & 0x00007FFF);
1452 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1453 ~mask & 0x00007FFF);
1454 usleep_range(10000, 20000);
1456 if (adapter->test_icr & mask) {
1463 * Enable the interrupt to be reported in the cause
1464 * register and then force the same interrupt and see
1465 * if one gets posted. If an interrupt was not posted
1466 * to the bus, the test failed.
1468 adapter->test_icr = 0;
1469 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1470 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1471 usleep_range(10000, 20000);
1473 if (!(adapter->test_icr &mask)) {
1480 * Disable the other interrupts to be reported in
1481 * the cause register and then force the other
1482 * interrupts and see if any get posted. If
1483 * an interrupt was posted to the bus, the
1486 adapter->test_icr = 0;
1487 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1488 ~mask & 0x00007FFF);
1489 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1490 ~mask & 0x00007FFF);
1491 usleep_range(10000, 20000);
1493 if (adapter->test_icr) {
1500 /* Disable all the interrupts */
1501 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1502 usleep_range(10000, 20000);
1504 /* Unhook test interrupt handler */
1505 free_irq(irq, netdev);
1510 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1512 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1513 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1514 struct ixgbe_hw *hw = &adapter->hw;
1517 /* shut down the DMA engines now so they can be reinitialized later */
1520 reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1521 reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1522 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1523 ixgbe_disable_rx_queue(adapter, rx_ring);
1526 reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1527 reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1528 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1530 switch (hw->mac.type) {
1531 case ixgbe_mac_82599EB:
1532 case ixgbe_mac_X540:
1533 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1534 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1535 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1541 ixgbe_reset(adapter);
1543 ixgbe_free_tx_resources(&adapter->test_tx_ring);
1544 ixgbe_free_rx_resources(&adapter->test_rx_ring);
1547 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1549 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1550 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1555 /* Setup Tx descriptor ring and Tx buffers */
1556 tx_ring->count = IXGBE_DEFAULT_TXD;
1557 tx_ring->queue_index = 0;
1558 tx_ring->dev = &adapter->pdev->dev;
1559 tx_ring->netdev = adapter->netdev;
1560 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1561 tx_ring->numa_node = adapter->node;
1563 err = ixgbe_setup_tx_resources(tx_ring);
1567 switch (adapter->hw.mac.type) {
1568 case ixgbe_mac_82599EB:
1569 case ixgbe_mac_X540:
1570 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1571 reg_data |= IXGBE_DMATXCTL_TE;
1572 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1578 ixgbe_configure_tx_ring(adapter, tx_ring);
1580 /* Setup Rx Descriptor ring and Rx buffers */
1581 rx_ring->count = IXGBE_DEFAULT_RXD;
1582 rx_ring->queue_index = 0;
1583 rx_ring->dev = &adapter->pdev->dev;
1584 rx_ring->netdev = adapter->netdev;
1585 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1586 rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1587 rx_ring->numa_node = adapter->node;
1589 err = ixgbe_setup_rx_resources(rx_ring);
1595 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1596 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1598 ixgbe_configure_rx_ring(adapter, rx_ring);
1600 rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1601 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1606 ixgbe_free_desc_rings(adapter);
1610 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1612 struct ixgbe_hw *hw = &adapter->hw;
1615 /* X540 needs to set the MACC.FLU bit to force link up */
1616 if (adapter->hw.mac.type == ixgbe_mac_X540) {
1617 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_MACC);
1618 reg_data |= IXGBE_MACC_FLU;
1619 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MACC, reg_data);
1622 /* right now we only support MAC loopback in the driver */
1623 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1624 /* Setup MAC loopback */
1625 reg_data |= IXGBE_HLREG0_LPBK;
1626 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1628 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1629 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1630 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1632 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1633 reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1634 reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1635 IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1636 IXGBE_WRITE_FLUSH(&adapter->hw);
1637 usleep_range(10000, 20000);
1639 /* Disable Atlas Tx lanes; re-enabled in reset path */
1640 if (hw->mac.type == ixgbe_mac_82598EB) {
1643 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1644 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1645 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1647 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1648 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1649 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1651 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1652 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1653 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1655 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1656 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1657 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1663 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1667 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1668 reg_data &= ~IXGBE_HLREG0_LPBK;
1669 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1672 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1673 unsigned int frame_size)
1675 memset(skb->data, 0xFF, frame_size);
1677 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1678 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1679 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1682 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1683 unsigned int frame_size)
1686 if (*(skb->data + 3) == 0xFF) {
1687 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1688 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1695 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1696 struct ixgbe_ring *tx_ring,
1699 union ixgbe_adv_rx_desc *rx_desc;
1700 struct ixgbe_rx_buffer *rx_buffer_info;
1701 struct ixgbe_tx_buffer *tx_buffer_info;
1702 const int bufsz = rx_ring->rx_buf_len;
1704 u16 rx_ntc, tx_ntc, count = 0;
1706 /* initialize next to clean and descriptor values */
1707 rx_ntc = rx_ring->next_to_clean;
1708 tx_ntc = tx_ring->next_to_clean;
1709 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1710 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1712 while (staterr & IXGBE_RXD_STAT_DD) {
1713 /* check Rx buffer */
1714 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1716 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1717 dma_unmap_single(rx_ring->dev,
1718 rx_buffer_info->dma,
1721 rx_buffer_info->dma = 0;
1723 /* verify contents of skb */
1724 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1727 /* unmap buffer on Tx side */
1728 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1729 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1731 /* increment Rx/Tx next to clean counters */
1733 if (rx_ntc == rx_ring->count)
1736 if (tx_ntc == tx_ring->count)
1739 /* fetch next descriptor */
1740 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1741 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1744 /* re-map buffers to ring, store next to clean values */
1745 ixgbe_alloc_rx_buffers(rx_ring, count);
1746 rx_ring->next_to_clean = rx_ntc;
1747 tx_ring->next_to_clean = tx_ntc;
1752 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1754 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1755 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1756 int i, j, lc, good_cnt, ret_val = 0;
1757 unsigned int size = 1024;
1758 netdev_tx_t tx_ret_val;
1759 struct sk_buff *skb;
1761 /* allocate test skb */
1762 skb = alloc_skb(size, GFP_KERNEL);
1766 /* place data into test skb */
1767 ixgbe_create_lbtest_frame(skb, size);
1771 * Calculate the loop count based on the largest descriptor ring
1772 * The idea is to wrap the largest ring a number of times using 64
1773 * send/receive pairs during each loop
1776 if (rx_ring->count <= tx_ring->count)
1777 lc = ((tx_ring->count / 64) * 2) + 1;
1779 lc = ((rx_ring->count / 64) * 2) + 1;
1781 for (j = 0; j <= lc; j++) {
1782 /* reset count of good packets */
1785 /* place 64 packets on the transmit queue*/
1786 for (i = 0; i < 64; i++) {
1788 tx_ret_val = ixgbe_xmit_frame_ring(skb,
1791 if (tx_ret_val == NETDEV_TX_OK)
1795 if (good_cnt != 64) {
1800 /* allow 200 milliseconds for packets to go from Tx to Rx */
1803 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1804 if (good_cnt != 64) {
1810 /* free the original skb */
1816 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1818 *data = ixgbe_setup_desc_rings(adapter);
1821 *data = ixgbe_setup_loopback_test(adapter);
1824 *data = ixgbe_run_loopback_test(adapter);
1825 ixgbe_loopback_cleanup(adapter);
1828 ixgbe_free_desc_rings(adapter);
1833 static void ixgbe_diag_test(struct net_device *netdev,
1834 struct ethtool_test *eth_test, u64 *data)
1836 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1837 bool if_running = netif_running(netdev);
1839 set_bit(__IXGBE_TESTING, &adapter->state);
1840 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1843 e_info(hw, "offline testing starting\n");
1845 /* Link test performed before hardware reset so autoneg doesn't
1846 * interfere with test result */
1847 if (ixgbe_link_test(adapter, &data[4]))
1848 eth_test->flags |= ETH_TEST_FL_FAILED;
1850 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1852 for (i = 0; i < adapter->num_vfs; i++) {
1853 if (adapter->vfinfo[i].clear_to_send) {
1854 netdev_warn(netdev, "%s",
1855 "offline diagnostic is not "
1856 "supported when VFs are "
1862 eth_test->flags |= ETH_TEST_FL_FAILED;
1863 clear_bit(__IXGBE_TESTING,
1871 /* indicate we're in test mode */
1874 ixgbe_reset(adapter);
1876 e_info(hw, "register testing starting\n");
1877 if (ixgbe_reg_test(adapter, &data[0]))
1878 eth_test->flags |= ETH_TEST_FL_FAILED;
1880 ixgbe_reset(adapter);
1881 e_info(hw, "eeprom testing starting\n");
1882 if (ixgbe_eeprom_test(adapter, &data[1]))
1883 eth_test->flags |= ETH_TEST_FL_FAILED;
1885 ixgbe_reset(adapter);
1886 e_info(hw, "interrupt testing starting\n");
1887 if (ixgbe_intr_test(adapter, &data[2]))
1888 eth_test->flags |= ETH_TEST_FL_FAILED;
1890 /* If SRIOV or VMDq is enabled then skip MAC
1891 * loopback diagnostic. */
1892 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1893 IXGBE_FLAG_VMDQ_ENABLED)) {
1894 e_info(hw, "Skip MAC loopback diagnostic in VT "
1900 ixgbe_reset(adapter);
1901 e_info(hw, "loopback testing starting\n");
1902 if (ixgbe_loopback_test(adapter, &data[3]))
1903 eth_test->flags |= ETH_TEST_FL_FAILED;
1906 ixgbe_reset(adapter);
1908 clear_bit(__IXGBE_TESTING, &adapter->state);
1912 e_info(hw, "online testing starting\n");
1914 if (ixgbe_link_test(adapter, &data[4]))
1915 eth_test->flags |= ETH_TEST_FL_FAILED;
1917 /* Online tests aren't run; pass by default */
1923 clear_bit(__IXGBE_TESTING, &adapter->state);
1926 msleep_interruptible(4 * 1000);
1929 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1930 struct ethtool_wolinfo *wol)
1932 struct ixgbe_hw *hw = &adapter->hw;
1935 /* WOL not supported except for the following */
1936 switch(hw->device_id) {
1937 case IXGBE_DEV_ID_82599_SFP:
1938 /* Only this subdevice supports WOL */
1939 if (hw->subsystem_device_id != IXGBE_SUBDEV_ID_82599_SFP) {
1945 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1946 /* All except this subdevice support WOL */
1947 if (hw->subsystem_device_id ==
1948 IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1954 case IXGBE_DEV_ID_82599_KX4:
1964 static void ixgbe_get_wol(struct net_device *netdev,
1965 struct ethtool_wolinfo *wol)
1967 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1969 wol->supported = WAKE_UCAST | WAKE_MCAST |
1970 WAKE_BCAST | WAKE_MAGIC;
1973 if (ixgbe_wol_exclusion(adapter, wol) ||
1974 !device_can_wakeup(&adapter->pdev->dev))
1977 if (adapter->wol & IXGBE_WUFC_EX)
1978 wol->wolopts |= WAKE_UCAST;
1979 if (adapter->wol & IXGBE_WUFC_MC)
1980 wol->wolopts |= WAKE_MCAST;
1981 if (adapter->wol & IXGBE_WUFC_BC)
1982 wol->wolopts |= WAKE_BCAST;
1983 if (adapter->wol & IXGBE_WUFC_MAG)
1984 wol->wolopts |= WAKE_MAGIC;
1987 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1989 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1991 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1994 if (ixgbe_wol_exclusion(adapter, wol))
1995 return wol->wolopts ? -EOPNOTSUPP : 0;
1999 if (wol->wolopts & WAKE_UCAST)
2000 adapter->wol |= IXGBE_WUFC_EX;
2001 if (wol->wolopts & WAKE_MCAST)
2002 adapter->wol |= IXGBE_WUFC_MC;
2003 if (wol->wolopts & WAKE_BCAST)
2004 adapter->wol |= IXGBE_WUFC_BC;
2005 if (wol->wolopts & WAKE_MAGIC)
2006 adapter->wol |= IXGBE_WUFC_MAG;
2008 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2013 static int ixgbe_nway_reset(struct net_device *netdev)
2015 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2017 if (netif_running(netdev))
2018 ixgbe_reinit_locked(adapter);
2023 static int ixgbe_set_phys_id(struct net_device *netdev,
2024 enum ethtool_phys_id_state state)
2026 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2027 struct ixgbe_hw *hw = &adapter->hw;
2030 case ETHTOOL_ID_ACTIVE:
2031 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2035 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
2038 case ETHTOOL_ID_OFF:
2039 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
2042 case ETHTOOL_ID_INACTIVE:
2043 /* Restore LED settings */
2044 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2051 static int ixgbe_get_coalesce(struct net_device *netdev,
2052 struct ethtool_coalesce *ec)
2054 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2056 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
2058 /* only valid if in constant ITR mode */
2059 switch (adapter->rx_itr_setting) {
2061 /* throttling disabled */
2062 ec->rx_coalesce_usecs = 0;
2065 /* dynamic ITR mode */
2066 ec->rx_coalesce_usecs = 1;
2069 /* fixed interrupt rate mode */
2070 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
2074 /* if in mixed tx/rx queues per vector mode, report only rx settings */
2075 if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
2078 /* only valid if in constant ITR mode */
2079 switch (adapter->tx_itr_setting) {
2081 /* throttling disabled */
2082 ec->tx_coalesce_usecs = 0;
2085 /* dynamic ITR mode */
2086 ec->tx_coalesce_usecs = 1;
2089 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2097 * this function must be called before setting the new value of
2100 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2101 struct ethtool_coalesce *ec)
2103 struct net_device *netdev = adapter->netdev;
2105 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2108 /* if interrupt rate is too high then disable RSC */
2109 if (ec->rx_coalesce_usecs != 1 &&
2110 ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2111 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2112 e_info(probe, "rx-usecs set too low, "
2114 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2118 /* check the feature flag value and enable RSC if necessary */
2119 if ((netdev->features & NETIF_F_LRO) &&
2120 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2121 e_info(probe, "rx-usecs set to %d, "
2122 "re-enabling RSC\n",
2123 ec->rx_coalesce_usecs);
2124 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2131 static int ixgbe_set_coalesce(struct net_device *netdev,
2132 struct ethtool_coalesce *ec)
2134 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2135 struct ixgbe_q_vector *q_vector;
2137 bool need_reset = false;
2139 /* don't accept tx specific changes if we've got mixed RxTx vectors */
2140 if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
2141 && ec->tx_coalesce_usecs)
2144 if (ec->tx_max_coalesced_frames_irq)
2145 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
2147 if (ec->rx_coalesce_usecs > 1) {
2148 /* check the limits */
2149 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2150 (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2153 /* check the old value and enable RSC if necessary */
2154 need_reset = ixgbe_update_rsc(adapter, ec);
2156 /* store the value in ints/second */
2157 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2159 /* static value of interrupt rate */
2160 adapter->rx_itr_setting = adapter->rx_eitr_param;
2161 /* clear the lower bit as its used for dynamic state */
2162 adapter->rx_itr_setting &= ~1;
2163 } else if (ec->rx_coalesce_usecs == 1) {
2164 /* check the old value and enable RSC if necessary */
2165 need_reset = ixgbe_update_rsc(adapter, ec);
2167 /* 1 means dynamic mode */
2168 adapter->rx_eitr_param = 20000;
2169 adapter->rx_itr_setting = 1;
2171 /* check the old value and enable RSC if necessary */
2172 need_reset = ixgbe_update_rsc(adapter, ec);
2174 * any other value means disable eitr, which is best
2175 * served by setting the interrupt rate very high
2177 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2178 adapter->rx_itr_setting = 0;
2181 if (ec->tx_coalesce_usecs > 1) {
2183 * don't have to worry about max_int as above because
2184 * tx vectors don't do hardware RSC (an rx function)
2186 /* check the limits */
2187 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2188 (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2191 /* store the value in ints/second */
2192 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2194 /* static value of interrupt rate */
2195 adapter->tx_itr_setting = adapter->tx_eitr_param;
2197 /* clear the lower bit as its used for dynamic state */
2198 adapter->tx_itr_setting &= ~1;
2199 } else if (ec->tx_coalesce_usecs == 1) {
2200 /* 1 means dynamic mode */
2201 adapter->tx_eitr_param = 10000;
2202 adapter->tx_itr_setting = 1;
2204 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2205 adapter->tx_itr_setting = 0;
2208 /* MSI/MSIx Interrupt Mode */
2209 if (adapter->flags &
2210 (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2211 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2212 for (i = 0; i < num_vectors; i++) {
2213 q_vector = adapter->q_vector[i];
2214 if (q_vector->txr_count && !q_vector->rxr_count)
2216 q_vector->eitr = adapter->tx_eitr_param;
2218 /* rx only or mixed */
2219 q_vector->eitr = adapter->rx_eitr_param;
2220 ixgbe_write_eitr(q_vector);
2222 /* Legacy Interrupt Mode */
2224 q_vector = adapter->q_vector[0];
2225 q_vector->eitr = adapter->rx_eitr_param;
2226 ixgbe_write_eitr(q_vector);
2230 * do reset here at the end to make sure EITR==0 case is handled
2231 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2232 * also locks in RSC enable/disable which requires reset
2235 if (netif_running(netdev))
2236 ixgbe_reinit_locked(adapter);
2238 ixgbe_reset(adapter);
2244 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2246 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2247 bool need_reset = false;
2250 #ifdef CONFIG_IXGBE_DCB
2251 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2252 !(data & ETH_FLAG_RXVLAN))
2256 need_reset = (data & ETH_FLAG_RXVLAN) !=
2257 (netdev->features & NETIF_F_HW_VLAN_RX);
2259 rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO | ETH_FLAG_NTUPLE |
2260 ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN);
2264 /* if state changes we need to update adapter->flags and reset */
2265 if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2266 (!!(data & ETH_FLAG_LRO) !=
2267 !!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
2268 if ((data & ETH_FLAG_LRO) &&
2269 (!adapter->rx_itr_setting ||
2270 (adapter->rx_itr_setting > IXGBE_MAX_RSC_INT_RATE))) {
2271 e_info(probe, "rx-usecs set too low, "
2272 "not enabling RSC.\n");
2274 adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2275 switch (adapter->hw.mac.type) {
2276 case ixgbe_mac_82599EB:
2279 case ixgbe_mac_X540: {
2281 for (i = 0; i < adapter->num_rx_queues; i++) {
2282 struct ixgbe_ring *ring =
2283 adapter->rx_ring[i];
2284 if (adapter->flags2 &
2285 IXGBE_FLAG2_RSC_ENABLED) {
2286 ixgbe_configure_rscctl(adapter,
2289 ixgbe_clear_rscctl(adapter,
2302 * Check if Flow Director n-tuple support was enabled or disabled. If
2303 * the state changed, we need to reset.
2305 if ((adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) &&
2306 (!(data & ETH_FLAG_NTUPLE))) {
2307 /* turn off Flow Director perfect, set hash and reset */
2308 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2309 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2311 } else if ((!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) &&
2312 (data & ETH_FLAG_NTUPLE)) {
2313 /* turn off Flow Director hash, enable perfect and reset */
2314 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2315 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2318 /* no state change */
2322 if (netif_running(netdev))
2323 ixgbe_reinit_locked(adapter);
2325 ixgbe_reset(adapter);
2331 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2332 struct ethtool_rx_ntuple *cmd)
2334 struct ixgbe_adapter *adapter = netdev_priv(dev);
2335 struct ethtool_rx_ntuple_flow_spec *fs = &cmd->fs;
2336 union ixgbe_atr_input input_struct;
2337 struct ixgbe_atr_input_masks input_masks;
2341 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2345 * Don't allow programming if the action is a queue greater than
2346 * the number of online Tx queues.
2348 if ((fs->action >= adapter->num_tx_queues) ||
2349 (fs->action < ETHTOOL_RXNTUPLE_ACTION_DROP))
2352 memset(&input_struct, 0, sizeof(union ixgbe_atr_input));
2353 memset(&input_masks, 0, sizeof(struct ixgbe_atr_input_masks));
2355 /* record flow type */
2356 switch (fs->flow_type) {
2358 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2361 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2364 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2367 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2373 /* copy vlan tag minus the CFI bit */
2374 if ((fs->vlan_tag & 0xEFFF) || (~fs->vlan_tag_mask & 0xEFFF)) {
2375 input_struct.formatted.vlan_id = htons(fs->vlan_tag & 0xEFFF);
2376 if (!fs->vlan_tag_mask) {
2377 input_masks.vlan_id_mask = htons(0xEFFF);
2379 switch (~fs->vlan_tag_mask & 0xEFFF) {
2380 /* all of these are valid vlan-mask values */
2385 input_masks.vlan_id_mask =
2386 htons(~fs->vlan_tag_mask);
2388 /* exit with error if vlan-mask is invalid */
2390 e_err(drv, "Partial VLAN ID or "
2391 "priority mask in vlan-mask is not "
2392 "supported by hardware\n");
2398 /* make sure we only use the first 2 bytes of user data */
2399 if ((fs->data & 0xFFFF) || (~fs->data_mask & 0xFFFF)) {
2400 input_struct.formatted.flex_bytes = htons(fs->data & 0xFFFF);
2401 if (!(fs->data_mask & 0xFFFF)) {
2402 input_masks.flex_mask = 0xFFFF;
2403 } else if (~fs->data_mask & 0xFFFF) {
2404 e_err(drv, "Partial user-def-mask is not "
2405 "supported by hardware\n");
2411 * Copy input into formatted structures
2413 * These assignments are based on the following logic
2414 * If neither input or mask are set assume value is masked out.
2415 * If input is set, but mask is not mask should default to accept all.
2416 * If input is not set, but mask is set then mask likely results in 0.
2417 * If input is set and mask is set then assign both.
2419 if (fs->h_u.tcp_ip4_spec.ip4src || ~fs->m_u.tcp_ip4_spec.ip4src) {
2420 input_struct.formatted.src_ip[0] = fs->h_u.tcp_ip4_spec.ip4src;
2421 if (!fs->m_u.tcp_ip4_spec.ip4src)
2422 input_masks.src_ip_mask[0] = 0xFFFFFFFF;
2424 input_masks.src_ip_mask[0] =
2425 ~fs->m_u.tcp_ip4_spec.ip4src;
2427 if (fs->h_u.tcp_ip4_spec.ip4dst || ~fs->m_u.tcp_ip4_spec.ip4dst) {
2428 input_struct.formatted.dst_ip[0] = fs->h_u.tcp_ip4_spec.ip4dst;
2429 if (!fs->m_u.tcp_ip4_spec.ip4dst)
2430 input_masks.dst_ip_mask[0] = 0xFFFFFFFF;
2432 input_masks.dst_ip_mask[0] =
2433 ~fs->m_u.tcp_ip4_spec.ip4dst;
2435 if (fs->h_u.tcp_ip4_spec.psrc || ~fs->m_u.tcp_ip4_spec.psrc) {
2436 input_struct.formatted.src_port = fs->h_u.tcp_ip4_spec.psrc;
2437 if (!fs->m_u.tcp_ip4_spec.psrc)
2438 input_masks.src_port_mask = 0xFFFF;
2440 input_masks.src_port_mask = ~fs->m_u.tcp_ip4_spec.psrc;
2442 if (fs->h_u.tcp_ip4_spec.pdst || ~fs->m_u.tcp_ip4_spec.pdst) {
2443 input_struct.formatted.dst_port = fs->h_u.tcp_ip4_spec.pdst;
2444 if (!fs->m_u.tcp_ip4_spec.pdst)
2445 input_masks.dst_port_mask = 0xFFFF;
2447 input_masks.dst_port_mask = ~fs->m_u.tcp_ip4_spec.pdst;
2450 /* determine if we need to drop or route the packet */
2451 if (fs->action == ETHTOOL_RXNTUPLE_ACTION_DROP)
2452 target_queue = MAX_RX_QUEUES - 1;
2454 target_queue = fs->action;
2456 spin_lock(&adapter->fdir_perfect_lock);
2457 err = ixgbe_fdir_add_perfect_filter_82599(&adapter->hw,
2461 spin_unlock(&adapter->fdir_perfect_lock);
2463 return err ? -1 : 0;
2466 static const struct ethtool_ops ixgbe_ethtool_ops = {
2467 .get_settings = ixgbe_get_settings,
2468 .set_settings = ixgbe_set_settings,
2469 .get_drvinfo = ixgbe_get_drvinfo,
2470 .get_regs_len = ixgbe_get_regs_len,
2471 .get_regs = ixgbe_get_regs,
2472 .get_wol = ixgbe_get_wol,
2473 .set_wol = ixgbe_set_wol,
2474 .nway_reset = ixgbe_nway_reset,
2475 .get_link = ethtool_op_get_link,
2476 .get_eeprom_len = ixgbe_get_eeprom_len,
2477 .get_eeprom = ixgbe_get_eeprom,
2478 .get_ringparam = ixgbe_get_ringparam,
2479 .set_ringparam = ixgbe_set_ringparam,
2480 .get_pauseparam = ixgbe_get_pauseparam,
2481 .set_pauseparam = ixgbe_set_pauseparam,
2482 .get_rx_csum = ixgbe_get_rx_csum,
2483 .set_rx_csum = ixgbe_set_rx_csum,
2484 .get_tx_csum = ixgbe_get_tx_csum,
2485 .set_tx_csum = ixgbe_set_tx_csum,
2486 .get_sg = ethtool_op_get_sg,
2487 .set_sg = ethtool_op_set_sg,
2488 .get_msglevel = ixgbe_get_msglevel,
2489 .set_msglevel = ixgbe_set_msglevel,
2490 .get_tso = ethtool_op_get_tso,
2491 .set_tso = ixgbe_set_tso,
2492 .self_test = ixgbe_diag_test,
2493 .get_strings = ixgbe_get_strings,
2494 .set_phys_id = ixgbe_set_phys_id,
2495 .get_sset_count = ixgbe_get_sset_count,
2496 .get_ethtool_stats = ixgbe_get_ethtool_stats,
2497 .get_coalesce = ixgbe_get_coalesce,
2498 .set_coalesce = ixgbe_set_coalesce,
2499 .get_flags = ethtool_op_get_flags,
2500 .set_flags = ixgbe_set_flags,
2501 .set_rx_ntuple = ixgbe_set_rx_ntuple,
2504 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2506 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);