drivers/net/stmmac/stmmac_main.c

   1 /*******************************************************************************
   2   This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
   3   ST Ethernet IPs are built around a Synopsys IP Core.
   4
   5   Copyright (C) 2007-2009  STMicroelectronics Ltd
   6
   7   This program is free software; you can redistribute it and/or modify it
   8   under the terms and conditions of the GNU General Public License,
   9   version 2, as published by the Free Software Foundation.
  10
  11   This program is distributed in the hope it will be useful, but WITHOUT
  12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14   more details.
  15
  16   You should have received a copy of the GNU General Public License along with
  17   this program; if not, write to the Free Software Foundation, Inc.,
  18   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19
  20   The full GNU General Public License is included in this distribution in
  21   the file called "COPYING".
  22
  23   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  24
  25   Documentation available at:
  26         http://www.stlinux.com
  27   Support available at:
  28         https://bugzilla.stlinux.com/
  29 *******************************************************************************/
  30
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/kernel.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/etherdevice.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/skbuff.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_ether.h>
  42 #include <linux/crc32.h>
  43 #include <linux/mii.h>
  44 #include <linux/phy.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/dma-mapping.h>
  47 #include <linux/slab.h>
  48 #include <linux/prefetch.h>
  49 #include "stmmac.h"
  50
  51 #define STMMAC_RESOURCE_NAME    "stmmaceth"
  52 #define PHY_RESOURCE_NAME       "stmmacphy"
  53
  54 #undef STMMAC_DEBUG
  55 /*#define STMMAC_DEBUG*/
  56 #ifdef STMMAC_DEBUG
  57 #define DBG(nlevel, klevel, fmt, args...) \
  58                 ((void)(netif_msg_##nlevel(priv) && \
  59                 printk(KERN_##klevel fmt, ## args)))
  60 #else
  61 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
  62 #endif
  63
  64 #undef STMMAC_RX_DEBUG
  65 /*#define STMMAC_RX_DEBUG*/
  66 #ifdef STMMAC_RX_DEBUG
  67 #define RX_DBG(fmt, args...)  printk(fmt, ## args)
  68 #else
  69 #define RX_DBG(fmt, args...)  do { } while (0)
  70 #endif
  71
  72 #undef STMMAC_XMIT_DEBUG
  73 /*#define STMMAC_XMIT_DEBUG*/
  74 #ifdef STMMAC_TX_DEBUG
  75 #define TX_DBG(fmt, args...)  printk(fmt, ## args)
  76 #else
  77 #define TX_DBG(fmt, args...)  do { } while (0)
  78 #endif
  79
  80 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
  81 #define JUMBO_LEN       9000
  82
  83 /* Module parameters */
  84 #define TX_TIMEO 5000 /* default 5 seconds */
  85 static int watchdog = TX_TIMEO;
  86 module_param(watchdog, int, S_IRUGO | S_IWUSR);
  87 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
  88
  89 static int debug = -1;          /* -1: default, 0: no output, 16:  all */
  90 module_param(debug, int, S_IRUGO | S_IWUSR);
  91 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
  92
  93 static int phyaddr = -1;
  94 module_param(phyaddr, int, S_IRUGO);
  95 MODULE_PARM_DESC(phyaddr, "Physical device address");
  96
  97 #define DMA_TX_SIZE 256
  98 static int dma_txsize = DMA_TX_SIZE;
  99 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
 100 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
 101
 102 #define DMA_RX_SIZE 256
 103 static int dma_rxsize = DMA_RX_SIZE;
 104 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
 105 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
 106
 107 static int flow_ctrl = FLOW_OFF;
 108 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
 109 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
 110
 111 static int pause = PAUSE_TIME;
 112 module_param(pause, int, S_IRUGO | S_IWUSR);
 113 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
 114
 115 #define TC_DEFAULT 64
 116 static int tc = TC_DEFAULT;
 117 module_param(tc, int, S_IRUGO | S_IWUSR);
 118 MODULE_PARM_DESC(tc, "DMA threshold control value");
 119
 120 /* Pay attention to tune this parameter; take care of both
 121  * hardware capability and network stabitily/performance impact.
 122  * Many tests showed that ~4ms latency seems to be good enough. */
 123 #ifdef CONFIG_STMMAC_TIMER
 124 #define DEFAULT_PERIODIC_RATE   256
 125 static int tmrate = DEFAULT_PERIODIC_RATE;
 126 module_param(tmrate, int, S_IRUGO | S_IWUSR);
 127 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
 128 #endif
 129
 130 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
 131 static int buf_sz = DMA_BUFFER_SIZE;
 132 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
 133 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
 134
 135 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 136                                       NETIF_MSG_LINK | NETIF_MSG_IFUP |
 137                                       NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
 138
 139 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
 140
 141 /**
 142  * stmmac_verify_args - verify the driver parameters.
 143  * Description: it verifies if some wrong parameter is passed to the driver.
 144  * Note that wrong parameters are replaced with the default values.
 145  */
 146 static void stmmac_verify_args(void)
 147 {
 148         if (unlikely(watchdog < 0))
 149                 watchdog = TX_TIMEO;
 150         if (unlikely(dma_rxsize < 0))
 151                 dma_rxsize = DMA_RX_SIZE;
 152         if (unlikely(dma_txsize < 0))
 153                 dma_txsize = DMA_TX_SIZE;
 154         if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
 155                 buf_sz = DMA_BUFFER_SIZE;
 156         if (unlikely(flow_ctrl > 1))
 157                 flow_ctrl = FLOW_AUTO;
 158         else if (likely(flow_ctrl < 0))
 159                 flow_ctrl = FLOW_OFF;
 160         if (unlikely((pause < 0) || (pause > 0xffff)))
 161                 pause = PAUSE_TIME;
 162 }
 163
 164 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
 165 static void print_pkt(unsigned char *buf, int len)
 166 {
 167         int j;
 168         pr_info("len = %d byte, buf addr: 0x%p", len, buf);
 169         for (j = 0; j < len; j++) {
 170                 if ((j % 16) == 0)
 171                         pr_info("\n %03x:", j);
 172                 pr_info(" %02x", buf[j]);
 173         }
 174         pr_info("\n");
 175 }
 176 #endif
 177
 178 /* minimum number of free TX descriptors required to wake up TX process */
 179 #define STMMAC_TX_THRESH(x)     (x->dma_tx_size/4)
 180
 181 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
 182 {
 183         return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
 184 }
 185
 186 /* On some ST platforms, some HW system configuraton registers have to be
 187  * set according to the link speed negotiated.
 188  */
 189 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
 190 {
 191         struct phy_device *phydev = priv->phydev;
 192
 193         if (likely(priv->plat->fix_mac_speed))
 194                 priv->plat->fix_mac_speed(priv->plat->bsp_priv,
 195                                           phydev->speed);
 196 }
 197
 198 /**
 199  * stmmac_adjust_link
 200  * @dev: net device structure
 201  * Description: it adjusts the link parameters.
 202  */
 203 static void stmmac_adjust_link(struct net_device *dev)
 204 {
 205         struct stmmac_priv *priv = netdev_priv(dev);
 206         struct phy_device *phydev = priv->phydev;
 207         unsigned long flags;
 208         int new_state = 0;
 209         unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
 210
 211         if (phydev == NULL)
 212                 return;
 213
 214         DBG(probe, DEBUG, "stmmac_adjust_link: called.  address %d link %d\n",
 215             phydev->addr, phydev->link);
 216
 217         spin_lock_irqsave(&priv->lock, flags);
 218         if (phydev->link) {
 219                 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
 220
 221                 /* Now we make sure that we can be in full duplex mode.
 222                  * If not, we operate in half-duplex mode. */
 223                 if (phydev->duplex != priv->oldduplex) {
 224                         new_state = 1;
 225                         if (!(phydev->duplex))
 226                                 ctrl &= ~priv->hw->link.duplex;
 227                         else
 228                                 ctrl |= priv->hw->link.duplex;
 229                         priv->oldduplex = phydev->duplex;
 230                 }
 231                 /* Flow Control operation */
 232                 if (phydev->pause)
 233                         priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
 234                                                  fc, pause_time);
 235
 236                 if (phydev->speed != priv->speed) {
 237                         new_state = 1;
 238                         switch (phydev->speed) {
 239                         case 1000:
 240                                 if (likely(priv->plat->has_gmac))
 241                                         ctrl &= ~priv->hw->link.port;
 242                                 stmmac_hw_fix_mac_speed(priv);
 243                                 break;
 244                         case 100:
 245                         case 10:
 246                                 if (priv->plat->has_gmac) {
 247                                         ctrl |= priv->hw->link.port;
 248                                         if (phydev->speed == SPEED_100) {
 249                                                 ctrl |= priv->hw->link.speed;
 250                                         } else {
 251                                                 ctrl &= ~(priv->hw->link.speed);
 252                                         }
 253                                 } else {
 254                                         ctrl &= ~priv->hw->link.port;
 255                                 }
 256                                 stmmac_hw_fix_mac_speed(priv);
 257                                 break;
 258                         default:
 259                                 if (netif_msg_link(priv))
 260                                         pr_warning("%s: Speed (%d) is not 10"
 261                                        " or 100!\n", dev->name, phydev->speed);
 262                                 break;
 263                         }
 264
 265                         priv->speed = phydev->speed;
 266                 }
 267
 268                 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
 269
 270                 if (!priv->oldlink) {
 271                         new_state = 1;
 272                         priv->oldlink = 1;
 273                 }
 274         } else if (priv->oldlink) {
 275                 new_state = 1;
 276                 priv->oldlink = 0;
 277                 priv->speed = 0;
 278                 priv->oldduplex = -1;
 279         }
 280
 281         if (new_state && netif_msg_link(priv))
 282                 phy_print_status(phydev);
 283
 284         spin_unlock_irqrestore(&priv->lock, flags);
 285
 286         DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
 287 }
 288
 289 /**
 290  * stmmac_init_phy - PHY initialization
 291  * @dev: net device structure
 292  * Description: it initializes the driver's PHY state, and attaches the PHY
 293  * to the mac driver.
 294  *  Return value:
 295  *  0 on success
 296  */
 297 static int stmmac_init_phy(struct net_device *dev)
 298 {
 299         struct stmmac_priv *priv = netdev_priv(dev);
 300         struct phy_device *phydev;
 301         char phy_id[MII_BUS_ID_SIZE + 3];
 302         char bus_id[MII_BUS_ID_SIZE];
 303
 304         priv->oldlink = 0;
 305         priv->speed = 0;
 306         priv->oldduplex = -1;
 307
 308         if (priv->phy_addr == -1) {
 309                 /* We don't have a PHY, so do nothing */
 310                 return 0;
 311         }
 312
 313         snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
 314         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
 315                  priv->phy_addr);
 316         pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);
 317
 318         phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
 319                         priv->phy_interface);
 320
 321         if (IS_ERR(phydev)) {
 322                 pr_err("%s: Could not attach to PHY\n", dev->name);
 323                 return PTR_ERR(phydev);
 324         }
 325
 326         /*
 327          * Broken HW is sometimes missing the pull-up resistor on the
 328          * MDIO line, which results in reads to non-existent devices returning
 329          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
 330          * device as well.
 331          * Note: phydev->phy_id is the result of reading the UID PHY registers.
 332          */
 333         if (phydev->phy_id == 0) {
 334                 phy_disconnect(phydev);
 335                 return -ENODEV;
 336         }
 337         pr_debug("stmmac_init_phy:  %s: attached to PHY (UID 0x%x)"
 338                " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
 339
 340         priv->phydev = phydev;
 341
 342         return 0;
 343 }
 344
 345 static inline void stmmac_enable_mac(void __iomem *ioaddr)
 346 {
 347         u32 value = readl(ioaddr + MAC_CTRL_REG);
 348
 349         value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
 350         writel(value, ioaddr + MAC_CTRL_REG);
 351 }
 352
 353 static inline void stmmac_disable_mac(void __iomem *ioaddr)
 354 {
 355         u32 value = readl(ioaddr + MAC_CTRL_REG);
 356
 357         value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
 358         writel(value, ioaddr + MAC_CTRL_REG);
 359 }
 360
 361 /**
 362  * display_ring
 363  * @p: pointer to the ring.
 364  * @size: size of the ring.
 365  * Description: display all the descriptors within the ring.
 366  */
 367 static void display_ring(struct dma_desc *p, int size)
 368 {
 369         struct tmp_s {
 370                 u64 a;
 371                 unsigned int b;
 372                 unsigned int c;
 373         };
 374         int i;
 375         for (i = 0; i < size; i++) {
 376                 struct tmp_s *x = (struct tmp_s *)(p + i);
 377                 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
 378                        i, (unsigned int)virt_to_phys(&p[i]),
 379                        (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
 380                        x->b, x->c);
 381                 pr_info("\n");
 382         }
 383 }
 384
 385 /**
 386  * init_dma_desc_rings - init the RX/TX descriptor rings
 387  * @dev: net device structure
 388  * Description:  this function initializes the DMA RX/TX descriptors
 389  * and allocates the socket buffers.
 390  */
 391 static void init_dma_desc_rings(struct net_device *dev)
 392 {
 393         int i;
 394         struct stmmac_priv *priv = netdev_priv(dev);
 395         struct sk_buff *skb;
 396         unsigned int txsize = priv->dma_tx_size;
 397         unsigned int rxsize = priv->dma_rx_size;
 398         unsigned int bfsize = priv->dma_buf_sz;
 399         int buff2_needed = 0, dis_ic = 0;
 400
 401         /* Set the Buffer size according to the MTU;
 402          * indeed, in case of jumbo we need to bump-up the buffer sizes.
 403          */
 404         if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
 405                 bfsize = BUF_SIZE_16KiB;
 406         else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
 407                 bfsize = BUF_SIZE_8KiB;
 408         else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
 409                 bfsize = BUF_SIZE_4KiB;
 410         else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
 411                 bfsize = BUF_SIZE_2KiB;
 412         else
 413                 bfsize = DMA_BUFFER_SIZE;
 414
 415 #ifdef CONFIG_STMMAC_TIMER
 416         /* Disable interrupts on completion for the reception if timer is on */
 417         if (likely(priv->tm->enable))
 418                 dis_ic = 1;
 419 #endif
 420         /* If the MTU exceeds 8k so use the second buffer in the chain */
 421         if (bfsize >= BUF_SIZE_8KiB)
 422                 buff2_needed = 1;
 423
 424         DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
 425             txsize, rxsize, bfsize);
 426
 427         priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
 428         priv->rx_skbuff =
 429             kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
 430         priv->dma_rx =
 431             (struct dma_desc *)dma_alloc_coherent(priv->device,
 432                                                   rxsize *
 433                                                   sizeof(struct dma_desc),
 434                                                   &priv->dma_rx_phy,
 435                                                   GFP_KERNEL);
 436         priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
 437                                        GFP_KERNEL);
 438         priv->dma_tx =
 439             (struct dma_desc *)dma_alloc_coherent(priv->device,
 440                                                   txsize *
 441                                                   sizeof(struct dma_desc),
 442                                                   &priv->dma_tx_phy,
 443                                                   GFP_KERNEL);
 444
 445         if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
 446                 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
 447                 return;
 448         }
 449
 450         DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
 451             "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
 452             dev->name, priv->dma_rx, priv->dma_tx,
 453             (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
 454
 455         /* RX INITIALIZATION */
 456         DBG(probe, INFO, "stmmac: SKB addresses:\n"
 457                          "skb\t\tskb data\tdma data\n");
 458
 459         for (i = 0; i < rxsize; i++) {
 460                 struct dma_desc *p = priv->dma_rx + i;
 461
 462                 skb = netdev_alloc_skb_ip_align(dev, bfsize);
 463                 if (unlikely(skb == NULL)) {
 464                         pr_err("%s: Rx init fails; skb is NULL\n", __func__);
 465                         break;
 466                 }
 467                 priv->rx_skbuff[i] = skb;
 468                 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
 469                                                 bfsize, DMA_FROM_DEVICE);
 470
 471                 p->des2 = priv->rx_skbuff_dma[i];
 472                 if (unlikely(buff2_needed))
 473                         p->des3 = p->des2 + BUF_SIZE_8KiB;
 474                 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
 475                         priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
 476         }
 477         priv->cur_rx = 0;
 478         priv->dirty_rx = (unsigned int)(i - rxsize);
 479         priv->dma_buf_sz = bfsize;
 480         buf_sz = bfsize;
 481
 482         /* TX INITIALIZATION */
 483         for (i = 0; i < txsize; i++) {
 484                 priv->tx_skbuff[i] = NULL;
 485                 priv->dma_tx[i].des2 = 0;
 486         }
 487         priv->dirty_tx = 0;
 488         priv->cur_tx = 0;
 489
 490         /* Clear the Rx/Tx descriptors */
 491         priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
 492         priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
 493
 494         if (netif_msg_hw(priv)) {
 495                 pr_info("RX descriptor ring:\n");
 496                 display_ring(priv->dma_rx, rxsize);
 497                 pr_info("TX descriptor ring:\n");
 498                 display_ring(priv->dma_tx, txsize);
 499         }
 500 }
 501
 502 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
 503 {
 504         int i;
 505
 506         for (i = 0; i < priv->dma_rx_size; i++) {
 507                 if (priv->rx_skbuff[i]) {
 508                         dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
 509                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
 510                         dev_kfree_skb_any(priv->rx_skbuff[i]);
 511                 }
 512                 priv->rx_skbuff[i] = NULL;
 513         }
 514 }
 515
 516 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
 517 {
 518         int i;
 519
 520         for (i = 0; i < priv->dma_tx_size; i++) {
 521                 if (priv->tx_skbuff[i] != NULL) {
 522                         struct dma_desc *p = priv->dma_tx + i;
 523                         if (p->des2)
 524                                 dma_unmap_single(priv->device, p->des2,
 525                                                  priv->hw->desc->get_tx_len(p),
 526                                                  DMA_TO_DEVICE);
 527                         dev_kfree_skb_any(priv->tx_skbuff[i]);
 528                         priv->tx_skbuff[i] = NULL;
 529                 }
 530         }
 531 }
 532
 533 static void free_dma_desc_resources(struct stmmac_priv *priv)
 534 {
 535         /* Release the DMA TX/RX socket buffers */
 536         dma_free_rx_skbufs(priv);
 537         dma_free_tx_skbufs(priv);
 538
 539         /* Free the region of consistent memory previously allocated for
 540          * the DMA */
 541         dma_free_coherent(priv->device,
 542                           priv->dma_tx_size * sizeof(struct dma_desc),
 543                           priv->dma_tx, priv->dma_tx_phy);
 544         dma_free_coherent(priv->device,
 545                           priv->dma_rx_size * sizeof(struct dma_desc),
 546                           priv->dma_rx, priv->dma_rx_phy);
 547         kfree(priv->rx_skbuff_dma);
 548         kfree(priv->rx_skbuff);
 549         kfree(priv->tx_skbuff);
 550 }
 551
 552 /**
 553  *  stmmac_dma_operation_mode - HW DMA operation mode
 554  *  @priv : pointer to the private device structure.
 555  *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
 556  *  or Store-And-Forward capability.
 557  */
 558 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
 559 {
 560         if (likely((priv->plat->tx_coe) && (!priv->no_csum_insertion))) {
 561                 /* In case of GMAC, SF mode has to be enabled
 562                  * to perform the TX COE. This depends on:
 563                  * 1) TX COE if actually supported
 564                  * 2) There is no bugged Jumbo frame support
 565                  *    that needs to not insert csum in the TDES.
 566                  */
 567                 priv->hw->dma->dma_mode(priv->ioaddr,
 568                                         SF_DMA_MODE, SF_DMA_MODE);
 569                 tc = SF_DMA_MODE;
 570         } else
 571                 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 572 }
 573
 574 /**
 575  * stmmac_tx:
 576  * @priv: private driver structure
 577  * Description: it reclaims resources after transmission completes.
 578  */
 579 static void stmmac_tx(struct stmmac_priv *priv)
 580 {
 581         unsigned int txsize = priv->dma_tx_size;
 582
 583         while (priv->dirty_tx != priv->cur_tx) {
 584                 int last;
 585                 unsigned int entry = priv->dirty_tx % txsize;
 586                 struct sk_buff *skb = priv->tx_skbuff[entry];
 587                 struct dma_desc *p = priv->dma_tx + entry;
 588
 589                 /* Check if the descriptor is owned by the DMA. */
 590                 if (priv->hw->desc->get_tx_owner(p))
 591                         break;
 592
 593                 /* Verify tx error by looking at the last segment */
 594                 last = priv->hw->desc->get_tx_ls(p);
 595                 if (likely(last)) {
 596                         int tx_error =
 597                                 priv->hw->desc->tx_status(&priv->dev->stats,
 598                                                           &priv->xstats, p,
 599                                                           priv->ioaddr);
 600                         if (likely(tx_error == 0)) {
 601                                 priv->dev->stats.tx_packets++;
 602                                 priv->xstats.tx_pkt_n++;
 603                         } else
 604                                 priv->dev->stats.tx_errors++;
 605                 }
 606                 TX_DBG("%s: curr %d, dirty %d\n", __func__,
 607                         priv->cur_tx, priv->dirty_tx);
 608
 609                 if (likely(p->des2))
 610                         dma_unmap_single(priv->device, p->des2,
 611                                          priv->hw->desc->get_tx_len(p),
 612                                          DMA_TO_DEVICE);
 613                 if (unlikely(p->des3))
 614                         p->des3 = 0;
 615
 616                 if (likely(skb != NULL)) {
 617                         /*
 618                          * If there's room in the queue (limit it to size)
 619                          * we add this skb back into the pool,
 620                          * if it's the right size.
 621                          */
 622                         if ((skb_queue_len(&priv->rx_recycle) <
 623                                 priv->dma_rx_size) &&
 624                                 skb_recycle_check(skb, priv->dma_buf_sz))
 625                                 __skb_queue_head(&priv->rx_recycle, skb);
 626                         else
 627                                 dev_kfree_skb(skb);
 628
 629                         priv->tx_skbuff[entry] = NULL;
 630                 }
 631
 632                 priv->hw->desc->release_tx_desc(p);
 633
 634                 entry = (++priv->dirty_tx) % txsize;
 635         }
 636         if (unlikely(netif_queue_stopped(priv->dev) &&
 637                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
 638                 netif_tx_lock(priv->dev);
 639                 if (netif_queue_stopped(priv->dev) &&
 640                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
 641                         TX_DBG("%s: restart transmit\n", __func__);
 642                         netif_wake_queue(priv->dev);
 643                 }
 644                 netif_tx_unlock(priv->dev);
 645         }
 646 }
 647
 648 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
 649 {
 650 #ifdef CONFIG_STMMAC_TIMER
 651         if (likely(priv->tm->enable))
 652                 priv->tm->timer_start(tmrate);
 653         else
 654 #endif
 655                 priv->hw->dma->enable_dma_irq(priv->ioaddr);
 656 }
 657
 658 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
 659 {
 660 #ifdef CONFIG_STMMAC_TIMER
 661         if (likely(priv->tm->enable))
 662                 priv->tm->timer_stop();
 663         else
 664 #endif
 665                 priv->hw->dma->disable_dma_irq(priv->ioaddr);
 666 }
 667
 668 static int stmmac_has_work(struct stmmac_priv *priv)
 669 {
 670         unsigned int has_work = 0;
 671         int rxret, tx_work = 0;
 672
 673         rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
 674                 (priv->cur_rx % priv->dma_rx_size));
 675
 676         if (priv->dirty_tx != priv->cur_tx)
 677                 tx_work = 1;
 678
 679         if (likely(!rxret || tx_work))
 680                 has_work = 1;
 681
 682         return has_work;
 683 }
 684
 685 static inline void _stmmac_schedule(struct stmmac_priv *priv)
 686 {
 687         if (likely(stmmac_has_work(priv))) {
 688                 stmmac_disable_irq(priv);
 689                 napi_schedule(&priv->napi);
 690         }
 691 }
 692
 693 #ifdef CONFIG_STMMAC_TIMER
 694 void stmmac_schedule(struct net_device *dev)
 695 {
 696         struct stmmac_priv *priv = netdev_priv(dev);
 697
 698         priv->xstats.sched_timer_n++;
 699
 700         _stmmac_schedule(priv);
 701 }
 702
 703 static void stmmac_no_timer_started(unsigned int x)
 704 {;
 705 };
 706
 707 static void stmmac_no_timer_stopped(void)
 708 {;
 709 };
 710 #endif
 711
 712 /**
 713  * stmmac_tx_err:
 714  * @priv: pointer to the private device structure
 715  * Description: it cleans the descriptors and restarts the transmission
 716  * in case of errors.
 717  */
 718 static void stmmac_tx_err(struct stmmac_priv *priv)
 719 {
 720
 721         netif_stop_queue(priv->dev);
 722
 723         priv->hw->dma->stop_tx(priv->ioaddr);
 724         dma_free_tx_skbufs(priv);
 725         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
 726         priv->dirty_tx = 0;
 727         priv->cur_tx = 0;
 728         priv->hw->dma->start_tx(priv->ioaddr);
 729
 730         priv->dev->stats.tx_errors++;
 731         netif_wake_queue(priv->dev);
 732 }
 733
 734
 735 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
 736 {
 737         int status;
 738
 739         status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
 740         if (likely(status == handle_tx_rx))
 741                 _stmmac_schedule(priv);
 742
 743         else if (unlikely(status == tx_hard_error_bump_tc)) {
 744                 /* Try to bump up the dma threshold on this failure */
 745                 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
 746                         tc += 64;
 747                         priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 748                         priv->xstats.threshold = tc;
 749                 }
 750         } else if (unlikely(status == tx_hard_error))
 751                 stmmac_tx_err(priv);
 752 }
 753
 754 /**
 755  *  stmmac_open - open entry point of the driver
 756  *  @dev : pointer to the device structure.
 757  *  Description:
 758  *  This function is the open entry point of the driver.
 759  *  Return value:
 760  *  0 on success and an appropriate (-)ve integer as defined in errno.h
 761  *  file on failure.
 762  */
 763 static int stmmac_open(struct net_device *dev)
 764 {
 765         struct stmmac_priv *priv = netdev_priv(dev);
 766         int ret;
 767
 768         /* Check that the MAC address is valid.  If its not, refuse
 769          * to bring the device up. The user must specify an
 770          * address using the following linux command:
 771          *      ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx  */
 772         if (!is_valid_ether_addr(dev->dev_addr)) {
 773                 random_ether_addr(dev->dev_addr);
 774                 pr_warning("%s: generated random MAC address %pM\n", dev->name,
 775                         dev->dev_addr);
 776         }
 777
 778         stmmac_verify_args();
 779
 780 #ifdef CONFIG_STMMAC_TIMER
 781         priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
 782         if (unlikely(priv->tm == NULL)) {
 783                 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
 784                 return -ENOMEM;
 785         }
 786         priv->tm->freq = tmrate;
 787
 788         /* Test if the external timer can be actually used.
 789          * In case of failure continue without timer. */
 790         if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
 791                 pr_warning("stmmaceth: cannot attach the external timer.\n");
 792                 priv->tm->freq = 0;
 793                 priv->tm->timer_start = stmmac_no_timer_started;
 794                 priv->tm->timer_stop = stmmac_no_timer_stopped;
 795         } else
 796                 priv->tm->enable = 1;
 797 #endif
 798         ret = stmmac_init_phy(dev);
 799         if (unlikely(ret)) {
 800                 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
 801                 goto open_error;
 802         }
 803
 804         /* Create and initialize the TX/RX descriptors chains. */
 805         priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
 806         priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
 807         priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
 808         init_dma_desc_rings(dev);
 809
 810         /* DMA initialization and SW reset */
 811         ret = priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
 812                                   priv->dma_tx_phy, priv->dma_rx_phy);
 813         if (ret < 0) {
 814                 pr_err("%s: DMA initialization failed\n", __func__);
 815                 goto open_error;
 816         }
 817
 818         /* Copy the MAC addr into the HW  */
 819         priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
 820         /* If required, perform hw setup of the bus. */
 821         if (priv->plat->bus_setup)
 822                 priv->plat->bus_setup(priv->ioaddr);
 823         /* Initialize the MAC Core */
 824         priv->hw->mac->core_init(priv->ioaddr);
 825
 826         priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
 827         if (priv->rx_coe)
 828                 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
 829         if (priv->plat->tx_coe)
 830                 pr_info("\tTX Checksum insertion supported\n");
 831         netdev_update_features(dev);
 832
 833         /* Initialise the MMC (if present) to disable all interrupts. */
 834         writel(0xffffffff, priv->ioaddr + MMC_HIGH_INTR_MASK);
 835         writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK);
 836
 837         /* Request the IRQ lines */
 838         ret = request_irq(dev->irq, stmmac_interrupt,
 839                          IRQF_SHARED, dev->name, dev);
 840         if (unlikely(ret < 0)) {
 841                 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
 842                        __func__, dev->irq, ret);
 843                 goto open_error;
 844         }
 845
 846         /* Enable the MAC Rx/Tx */
 847         stmmac_enable_mac(priv->ioaddr);
 848
 849         /* Set the HW DMA mode and the COE */
 850         stmmac_dma_operation_mode(priv);
 851
 852         /* Extra statistics */
 853         memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
 854         priv->xstats.threshold = tc;
 855
 856         /* Start the ball rolling... */
 857         DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
 858         priv->hw->dma->start_tx(priv->ioaddr);
 859         priv->hw->dma->start_rx(priv->ioaddr);
 860
 861 #ifdef CONFIG_STMMAC_TIMER
 862         priv->tm->timer_start(tmrate);
 863 #endif
 864         /* Dump DMA/MAC registers */
 865         if (netif_msg_hw(priv)) {
 866                 priv->hw->mac->dump_regs(priv->ioaddr);
 867                 priv->hw->dma->dump_regs(priv->ioaddr);
 868         }
 869
 870         if (priv->phydev)
 871                 phy_start(priv->phydev);
 872
 873         napi_enable(&priv->napi);
 874         skb_queue_head_init(&priv->rx_recycle);
 875         netif_start_queue(dev);
 876
 877         return 0;
 878
 879 open_error:
 880 #ifdef CONFIG_STMMAC_TIMER
 881         kfree(priv->tm);
 882 #endif
 883         if (priv->phydev)
 884                 phy_disconnect(priv->phydev);
 885
 886         return ret;
 887 }
 888
 889 /**
 890  *  stmmac_release - close entry point of the driver
 891  *  @dev : device pointer.
 892  *  Description:
 893  *  This is the stop entry point of the driver.
 894  */
 895 static int stmmac_release(struct net_device *dev)
 896 {
 897         struct stmmac_priv *priv = netdev_priv(dev);
 898
 899         /* Stop and disconnect the PHY */
 900         if (priv->phydev) {
 901                 phy_stop(priv->phydev);
 902                 phy_disconnect(priv->phydev);
 903                 priv->phydev = NULL;
 904         }
 905
 906         netif_stop_queue(dev);
 907
 908 #ifdef CONFIG_STMMAC_TIMER
 909         /* Stop and release the timer */
 910         stmmac_close_ext_timer();
 911         if (priv->tm != NULL)
 912                 kfree(priv->tm);
 913 #endif
 914         napi_disable(&priv->napi);
 915         skb_queue_purge(&priv->rx_recycle);
 916
 917         /* Free the IRQ lines */
 918         free_irq(dev->irq, dev);
 919
 920         /* Stop TX/RX DMA and clear the descriptors */
 921         priv->hw->dma->stop_tx(priv->ioaddr);
 922         priv->hw->dma->stop_rx(priv->ioaddr);
 923
 924         /* Release and free the Rx/Tx resources */
 925         free_dma_desc_resources(priv);
 926
 927         /* Disable the MAC Rx/Tx */
 928         stmmac_disable_mac(priv->ioaddr);
 929
 930         netif_carrier_off(dev);
 931
 932         return 0;
 933 }
 934
 935 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
 936                                                struct net_device *dev,
 937                                                int csum_insertion)
 938 {
 939         struct stmmac_priv *priv = netdev_priv(dev);
 940         unsigned int nopaged_len = skb_headlen(skb);
 941         unsigned int txsize = priv->dma_tx_size;
 942         unsigned int entry = priv->cur_tx % txsize;
 943         struct dma_desc *desc = priv->dma_tx + entry;
 944
 945         if (nopaged_len > BUF_SIZE_8KiB) {
 946
 947                 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
 948
 949                 desc->des2 = dma_map_single(priv->device, skb->data,
 950                                             BUF_SIZE_8KiB, DMA_TO_DEVICE);
 951                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
 952                 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
 953                                                 csum_insertion);
 954
 955                 entry = (++priv->cur_tx) % txsize;
 956                 desc = priv->dma_tx + entry;
 957
 958                 desc->des2 = dma_map_single(priv->device,
 959                                         skb->data + BUF_SIZE_8KiB,
 960                                         buf2_size, DMA_TO_DEVICE);
 961                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
 962                 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
 963                                                 csum_insertion);
 964                 priv->hw->desc->set_tx_owner(desc);
 965                 priv->tx_skbuff[entry] = NULL;
 966         } else {
 967                 desc->des2 = dma_map_single(priv->device, skb->data,
 968                                         nopaged_len, DMA_TO_DEVICE);
 969                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
 970                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
 971                                                 csum_insertion);
 972         }
 973         return entry;
 974 }
 975
 976 /**
 977  *  stmmac_xmit:
 978  *  @skb : the socket buffer
 979  *  @dev : device pointer
 980  *  Description : Tx entry point of the driver.
 981  */
 982 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
 983 {
 984         struct stmmac_priv *priv = netdev_priv(dev);
 985         unsigned int txsize = priv->dma_tx_size;
 986         unsigned int entry;
 987         int i, csum_insertion = 0;
 988         int nfrags = skb_shinfo(skb)->nr_frags;
 989         struct dma_desc *desc, *first;
 990
 991         if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
 992                 if (!netif_queue_stopped(dev)) {
 993                         netif_stop_queue(dev);
 994                         /* This is a hard error, log it. */
 995                         pr_err("%s: BUG! Tx Ring full when queue awake\n",
 996                                 __func__);
 997                 }
 998                 return NETDEV_TX_BUSY;
 999         }
1000
1001         entry = priv->cur_tx % txsize;
1002
1003 #ifdef STMMAC_XMIT_DEBUG
1004         if ((skb->len > ETH_FRAME_LEN) || nfrags)
1005                 pr_info("stmmac xmit:\n"
1006                        "\tskb addr %p - len: %d - nopaged_len: %d\n"
1007                        "\tn_frags: %d - ip_summed: %d - %s gso\n",
1008                        skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1009                        !skb_is_gso(skb) ? "isn't" : "is");
1010 #endif
1011
1012         csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL);
1013
1014         desc = priv->dma_tx + entry;
1015         first = desc;
1016
1017 #ifdef STMMAC_XMIT_DEBUG
1018         if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1019                 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1020                        "\t\tn_frags: %d, ip_summed: %d\n",
1021                        skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1022 #endif
1023         priv->tx_skbuff[entry] = skb;
1024         if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1025                 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1026                 desc = priv->dma_tx + entry;
1027         } else {
1028                 unsigned int nopaged_len = skb_headlen(skb);
1029                 desc->des2 = dma_map_single(priv->device, skb->data,
1030                                         nopaged_len, DMA_TO_DEVICE);
1031                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1032                                                 csum_insertion);
1033         }
1034
1035         for (i = 0; i < nfrags; i++) {
1036                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1037                 int len = frag->size;
1038
1039                 entry = (++priv->cur_tx) % txsize;
1040                 desc = priv->dma_tx + entry;
1041
1042                 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1043                 desc->des2 = dma_map_page(priv->device, frag->page,
1044                                           frag->page_offset,
1045                                           len, DMA_TO_DEVICE);
1046                 priv->tx_skbuff[entry] = NULL;
1047                 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1048                 priv->hw->desc->set_tx_owner(desc);
1049         }
1050
1051         /* Interrupt on completition only for the latest segment */
1052         priv->hw->desc->close_tx_desc(desc);
1053
1054 #ifdef CONFIG_STMMAC_TIMER
1055         /* Clean IC while using timer */
1056         if (likely(priv->tm->enable))
1057                 priv->hw->desc->clear_tx_ic(desc);
1058 #endif
1059         /* To avoid raise condition */
1060         priv->hw->desc->set_tx_owner(first);
1061
1062         priv->cur_tx++;
1063
1064 #ifdef STMMAC_XMIT_DEBUG
1065         if (netif_msg_pktdata(priv)) {
1066                 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1067                        "first=%p, nfrags=%d\n",
1068                        (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1069                        entry, first, nfrags);
1070                 display_ring(priv->dma_tx, txsize);
1071                 pr_info(">>> frame to be transmitted: ");
1072                 print_pkt(skb->data, skb->len);
1073         }
1074 #endif
1075         if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1076                 TX_DBG("%s: stop transmitted packets\n", __func__);
1077                 netif_stop_queue(dev);
1078         }
1079
1080         dev->stats.tx_bytes += skb->len;
1081
1082         priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1083
1084         return NETDEV_TX_OK;
1085 }
1086
1087 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1088 {
1089         unsigned int rxsize = priv->dma_rx_size;
1090         int bfsize = priv->dma_buf_sz;
1091         struct dma_desc *p = priv->dma_rx;
1092
1093         for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1094                 unsigned int entry = priv->dirty_rx % rxsize;
1095                 if (likely(priv->rx_skbuff[entry] == NULL)) {
1096                         struct sk_buff *skb;
1097
1098                         skb = __skb_dequeue(&priv->rx_recycle);
1099                         if (skb == NULL)
1100                                 skb = netdev_alloc_skb_ip_align(priv->dev,
1101                                                                 bfsize);
1102
1103                         if (unlikely(skb == NULL))
1104                                 break;
1105
1106                         priv->rx_skbuff[entry] = skb;
1107                         priv->rx_skbuff_dma[entry] =
1108                             dma_map_single(priv->device, skb->data, bfsize,
1109                                            DMA_FROM_DEVICE);
1110
1111                         (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1112                         if (unlikely(priv->plat->has_gmac)) {
1113                                 if (bfsize >= BUF_SIZE_8KiB)
1114                                         (p + entry)->des3 =
1115                                             (p + entry)->des2 + BUF_SIZE_8KiB;
1116                         }
1117                         RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1118                 }
1119                 priv->hw->desc->set_rx_owner(p + entry);
1120         }
1121 }
1122
1123 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1124 {
1125         unsigned int rxsize = priv->dma_rx_size;
1126         unsigned int entry = priv->cur_rx % rxsize;
1127         unsigned int next_entry;
1128         unsigned int count = 0;
1129         struct dma_desc *p = priv->dma_rx + entry;
1130         struct dma_desc *p_next;
1131
1132 #ifdef STMMAC_RX_DEBUG
1133         if (netif_msg_hw(priv)) {
1134                 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1135                 display_ring(priv->dma_rx, rxsize);
1136         }
1137 #endif
1138         count = 0;
1139         while (!priv->hw->desc->get_rx_owner(p)) {
1140                 int status;
1141
1142                 if (count >= limit)
1143                         break;
1144
1145                 count++;
1146
1147                 next_entry = (++priv->cur_rx) % rxsize;
1148                 p_next = priv->dma_rx + next_entry;
1149                 prefetch(p_next);
1150
1151                 /* read the status of the incoming frame */
1152                 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1153                                                     &priv->xstats, p));
1154                 if (unlikely(status == discard_frame))
1155                         priv->dev->stats.rx_errors++;
1156                 else {
1157                         struct sk_buff *skb;
1158                         int frame_len;
1159
1160                         frame_len = priv->hw->desc->get_rx_frame_len(p);
1161                         /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1162                          * Type frames (LLC/LLC-SNAP) */
1163                         if (unlikely(status != llc_snap))
1164                                 frame_len -= ETH_FCS_LEN;
1165 #ifdef STMMAC_RX_DEBUG
1166                         if (frame_len > ETH_FRAME_LEN)
1167                                 pr_debug("\tRX frame size %d, COE status: %d\n",
1168                                         frame_len, status);
1169
1170                         if (netif_msg_hw(priv))
1171                                 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1172                                         p, entry, p->des2);
1173 #endif
1174                         skb = priv->rx_skbuff[entry];
1175                         if (unlikely(!skb)) {
1176                                 pr_err("%s: Inconsistent Rx descriptor chain\n",
1177                                         priv->dev->name);
1178                                 priv->dev->stats.rx_dropped++;
1179                                 break;
1180                         }
1181                         prefetch(skb->data - NET_IP_ALIGN);
1182                         priv->rx_skbuff[entry] = NULL;
1183
1184                         skb_put(skb, frame_len);
1185                         dma_unmap_single(priv->device,
1186                                          priv->rx_skbuff_dma[entry],
1187                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
1188 #ifdef STMMAC_RX_DEBUG
1189                         if (netif_msg_pktdata(priv)) {
1190                                 pr_info(" frame received (%dbytes)", frame_len);
1191                                 print_pkt(skb->data, frame_len);
1192                         }
1193 #endif
1194                         skb->protocol = eth_type_trans(skb, priv->dev);
1195
1196                         if (unlikely(status == csum_none)) {
1197                                 /* always for the old mac 10/100 */
1198                                 skb_checksum_none_assert(skb);
1199                                 netif_receive_skb(skb);
1200                         } else {
1201                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1202                                 napi_gro_receive(&priv->napi, skb);
1203                         }
1204
1205                         priv->dev->stats.rx_packets++;
1206                         priv->dev->stats.rx_bytes += frame_len;
1207                 }
1208                 entry = next_entry;
1209                 p = p_next;     /* use prefetched values */
1210         }
1211
1212         stmmac_rx_refill(priv);
1213
1214         priv->xstats.rx_pkt_n += count;
1215
1216         return count;
1217 }
1218
1219 /**
1220  *  stmmac_poll - stmmac poll method (NAPI)
1221  *  @napi : pointer to the napi structure.
1222  *  @budget : maximum number of packets that the current CPU can receive from
1223  *            all interfaces.
1224  *  Description :
1225  *   This function implements the the reception process.
1226  *   Also it runs the TX completion thread
1227  */
1228 static int stmmac_poll(struct napi_struct *napi, int budget)
1229 {
1230         struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1231         int work_done = 0;
1232
1233         priv->xstats.poll_n++;
1234         stmmac_tx(priv);
1235         work_done = stmmac_rx(priv, budget);
1236
1237         if (work_done < budget) {
1238                 napi_complete(napi);
1239                 stmmac_enable_irq(priv);
1240         }
1241         return work_done;
1242 }
1243
1244 /**
1245  *  stmmac_tx_timeout
1246  *  @dev : Pointer to net device structure
1247  *  Description: this function is called when a packet transmission fails to
1248  *   complete within a reasonable tmrate. The driver will mark the error in the
1249  *   netdev structure and arrange for the device to be reset to a sane state
1250  *   in order to transmit a new packet.
1251  */
1252 static void stmmac_tx_timeout(struct net_device *dev)
1253 {
1254         struct stmmac_priv *priv = netdev_priv(dev);
1255
1256         /* Clear Tx resources and restart transmitting again */
1257         stmmac_tx_err(priv);
1258 }
1259
1260 /* Configuration changes (passed on by ifconfig) */
1261 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1262 {
1263         if (dev->flags & IFF_UP)        /* can't act on a running interface */
1264                 return -EBUSY;
1265
1266         /* Don't allow changing the I/O address */
1267         if (map->base_addr != dev->base_addr) {
1268                 pr_warning("%s: can't change I/O address\n", dev->name);
1269                 return -EOPNOTSUPP;
1270         }
1271
1272         /* Don't allow changing the IRQ */
1273         if (map->irq != dev->irq) {
1274                 pr_warning("%s: can't change IRQ number %d\n",
1275                        dev->name, dev->irq);
1276                 return -EOPNOTSUPP;
1277         }
1278
1279         /* ignore other fields */
1280         return 0;
1281 }
1282
1283 /**
1284  *  stmmac_multicast_list - entry point for multicast addressing
1285  *  @dev : pointer to the device structure
1286  *  Description:
1287  *  This function is a driver entry point which gets called by the kernel
1288  *  whenever multicast addresses must be enabled/disabled.
1289  *  Return value:
1290  *  void.
1291  */
1292 static void stmmac_multicast_list(struct net_device *dev)
1293 {
1294         struct stmmac_priv *priv = netdev_priv(dev);
1295
1296         spin_lock(&priv->lock);
1297         priv->hw->mac->set_filter(dev);
1298         spin_unlock(&priv->lock);
1299 }
1300
1301 /**
1302  *  stmmac_change_mtu - entry point to change MTU size for the device.
1303  *  @dev : device pointer.
1304  *  @new_mtu : the new MTU size for the device.
1305  *  Description: the Maximum Transfer Unit (MTU) is used by the network layer
1306  *  to drive packet transmission. Ethernet has an MTU of 1500 octets
1307  *  (ETH_DATA_LEN). This value can be changed with ifconfig.
1308  *  Return value:
1309  *  0 on success and an appropriate (-)ve integer as defined in errno.h
1310  *  file on failure.
1311  */
1312 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1313 {
1314         struct stmmac_priv *priv = netdev_priv(dev);
1315         int max_mtu;
1316
1317         if (netif_running(dev)) {
1318                 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1319                 return -EBUSY;
1320         }
1321
1322         if (priv->plat->has_gmac)
1323                 max_mtu = JUMBO_LEN;
1324         else
1325                 max_mtu = ETH_DATA_LEN;
1326
1327         if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1328                 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1329                 return -EINVAL;
1330         }
1331
1332         dev->mtu = new_mtu;
1333         netdev_update_features(dev);
1334
1335         return 0;
1336 }
1337
1338 static u32 stmmac_fix_features(struct net_device *dev, u32 features)
1339 {
1340         struct stmmac_priv *priv = netdev_priv(dev);
1341
1342         if (!priv->rx_coe)
1343                 features &= ~NETIF_F_RXCSUM;
1344         if (!priv->plat->tx_coe)
1345                 features &= ~NETIF_F_ALL_CSUM;
1346
1347         /* Some GMAC devices have a bugged Jumbo frame support that
1348          * needs to have the Tx COE disabled for oversized frames
1349          * (due to limited buffer sizes). In this case we disable
1350          * the TX csum insertionin the TDES and not use SF. */
1351         if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))
1352                 features &= ~NETIF_F_ALL_CSUM;
1353
1354         return features;
1355 }
1356
1357 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1358 {
1359         struct net_device *dev = (struct net_device *)dev_id;
1360         struct stmmac_priv *priv = netdev_priv(dev);
1361
1362         if (unlikely(!dev)) {
1363                 pr_err("%s: invalid dev pointer\n", __func__);
1364                 return IRQ_NONE;
1365         }
1366
1367         if (priv->plat->has_gmac)
1368                 /* To handle GMAC own interrupts */
1369                 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1370
1371         stmmac_dma_interrupt(priv);
1372
1373         return IRQ_HANDLED;
1374 }
1375
1376 #ifdef CONFIG_NET_POLL_CONTROLLER
1377 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1378  * to allow network I/O with interrupts disabled. */
1379 static void stmmac_poll_controller(struct net_device *dev)
1380 {
1381         disable_irq(dev->irq);
1382         stmmac_interrupt(dev->irq, dev);
1383         enable_irq(dev->irq);
1384 }
1385 #endif
1386
1387 /**
1388  *  stmmac_ioctl - Entry point for the Ioctl
1389  *  @dev: Device pointer.
1390  *  @rq: An IOCTL specefic structure, that can contain a pointer to
1391  *  a proprietary structure used to pass information to the driver.
1392  *  @cmd: IOCTL command
1393  *  Description:
1394  *  Currently there are no special functionality supported in IOCTL, just the
1395  *  phy_mii_ioctl(...) can be invoked.
1396  */
1397 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1398 {
1399         struct stmmac_priv *priv = netdev_priv(dev);
1400         int ret;
1401
1402         if (!netif_running(dev))
1403                 return -EINVAL;
1404
1405         if (!priv->phydev)
1406                 return -EINVAL;
1407
1408         spin_lock(&priv->lock);
1409         ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1410         spin_unlock(&priv->lock);
1411
1412         return ret;
1413 }
1414
1415 #ifdef STMMAC_VLAN_TAG_USED
1416 static void stmmac_vlan_rx_register(struct net_device *dev,
1417                                     struct vlan_group *grp)
1418 {
1419         struct stmmac_priv *priv = netdev_priv(dev);
1420
1421         DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1422
1423         spin_lock(&priv->lock);
1424         priv->vlgrp = grp;
1425         spin_unlock(&priv->lock);
1426 }
1427 #endif
1428
1429 static const struct net_device_ops stmmac_netdev_ops = {
1430         .ndo_open = stmmac_open,
1431         .ndo_start_xmit = stmmac_xmit,
1432         .ndo_stop = stmmac_release,
1433         .ndo_change_mtu = stmmac_change_mtu,
1434         .ndo_fix_features = stmmac_fix_features,
1435         .ndo_set_multicast_list = stmmac_multicast_list,
1436         .ndo_tx_timeout = stmmac_tx_timeout,
1437         .ndo_do_ioctl = stmmac_ioctl,
1438         .ndo_set_config = stmmac_config,
1439 #ifdef STMMAC_VLAN_TAG_USED
1440         .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1441 #endif
1442 #ifdef CONFIG_NET_POLL_CONTROLLER
1443         .ndo_poll_controller = stmmac_poll_controller,
1444 #endif
1445         .ndo_set_mac_address = eth_mac_addr,
1446 };
1447
1448 /**
1449  * stmmac_probe - Initialization of the adapter .
1450  * @dev : device pointer
1451  * Description: The function initializes the network device structure for
1452  * the STMMAC driver. It also calls the low level routines
1453  * in order to init the HW (i.e. the DMA engine)
1454  */
1455 static int stmmac_probe(struct net_device *dev)
1456 {
1457         int ret = 0;
1458         struct stmmac_priv *priv = netdev_priv(dev);
1459
1460         ether_setup(dev);
1461
1462         dev->netdev_ops = &stmmac_netdev_ops;
1463         stmmac_set_ethtool_ops(dev);
1464
1465         dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1466         dev->features |= dev->hw_features | NETIF_F_HIGHDMA;
1467         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1468 #ifdef STMMAC_VLAN_TAG_USED
1469         /* Both mac100 and gmac support receive VLAN tag detection */
1470         dev->features |= NETIF_F_HW_VLAN_RX;
1471 #endif
1472         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1473
1474         if (flow_ctrl)
1475                 priv->flow_ctrl = FLOW_AUTO;    /* RX/TX pause on */
1476
1477         priv->pause = pause;
1478         netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1479
1480         /* Get the MAC address */
1481         priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1482                                      dev->dev_addr, 0);
1483
1484         if (!is_valid_ether_addr(dev->dev_addr))
1485                 pr_warning("\tno valid MAC address;"
1486                         "please, use ifconfig or nwhwconfig!\n");
1487
1488         spin_lock_init(&priv->lock);
1489
1490         ret = register_netdev(dev);
1491         if (ret) {
1492                 pr_err("%s: ERROR %i registering the device\n",
1493                        __func__, ret);
1494                 return -ENODEV;
1495         }
1496
1497         DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1498             dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1499             (dev->features & NETIF_F_IP_CSUM) ? "on" : "off");
1500
1501         return ret;
1502 }
1503
1504 /**
1505  * stmmac_mac_device_setup
1506  * @dev : device pointer
1507  * Description: select and initialise the mac device (mac100 or Gmac).
1508  */
1509 static int stmmac_mac_device_setup(struct net_device *dev)
1510 {
1511         struct stmmac_priv *priv = netdev_priv(dev);
1512
1513         struct mac_device_info *device;
1514
1515         if (priv->plat->has_gmac)
1516                 device = dwmac1000_setup(priv->ioaddr);
1517         else
1518                 device = dwmac100_setup(priv->ioaddr);
1519
1520         if (!device)
1521                 return -ENOMEM;
1522
1523         if (priv->plat->enh_desc) {
1524                 device->desc = &enh_desc_ops;
1525                 pr_info("\tEnhanced descriptor structure\n");
1526         } else
1527                 device->desc = &ndesc_ops;
1528
1529         priv->hw = device;
1530
1531         if (device_can_wakeup(priv->device)) {
1532                 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1533                 enable_irq_wake(dev->irq);
1534         }
1535
1536         return 0;
1537 }
1538
1539 static int stmmacphy_dvr_probe(struct platform_device *pdev)
1540 {
1541         struct plat_stmmacphy_data *plat_dat = pdev->dev.platform_data;
1542
1543         pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1544                plat_dat->bus_id);
1545
1546         return 0;
1547 }
1548
1549 static int stmmacphy_dvr_remove(struct platform_device *pdev)
1550 {
1551         return 0;
1552 }
1553
1554 static struct platform_driver stmmacphy_driver = {
1555         .driver = {
1556                    .name = PHY_RESOURCE_NAME,
1557                    },
1558         .probe = stmmacphy_dvr_probe,
1559         .remove = stmmacphy_dvr_remove,
1560 };
1561
1562 /**
1563  * stmmac_associate_phy
1564  * @dev: pointer to device structure
1565  * @data: points to the private structure.
1566  * Description: Scans through all the PHYs we have registered and checks if
1567  * any are associated with our MAC.  If so, then just fill in
1568  * the blanks in our local context structure
1569  */
1570 static int stmmac_associate_phy(struct device *dev, void *data)
1571 {
1572         struct stmmac_priv *priv = (struct stmmac_priv *)data;
1573         struct plat_stmmacphy_data *plat_dat = dev->platform_data;
1574
1575         DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1576                 plat_dat->bus_id);
1577
1578         /* Check that this phy is for the MAC being initialised */
1579         if (priv->plat->bus_id != plat_dat->bus_id)
1580                 return 0;
1581
1582         /* OK, this PHY is connected to the MAC.
1583            Go ahead and get the parameters */
1584         DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1585         priv->phy_irq =
1586             platform_get_irq_byname(to_platform_device(dev), "phyirq");
1587         DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1588             plat_dat->bus_id, priv->phy_irq);
1589
1590         /* Override with kernel parameters if supplied XXX CRS XXX
1591          * this needs to have multiple instances */
1592         if ((phyaddr >= 0) && (phyaddr <= 31))
1593                 plat_dat->phy_addr = phyaddr;
1594
1595         priv->phy_addr = plat_dat->phy_addr;
1596         priv->phy_mask = plat_dat->phy_mask;
1597         priv->phy_interface = plat_dat->interface;
1598         priv->phy_reset = plat_dat->phy_reset;
1599
1600         DBG(probe, DEBUG, "%s: exiting\n", __func__);
1601         return 1;       /* forces exit of driver_for_each_device() */
1602 }
1603
1604 /**
1605  * stmmac_dvr_probe
1606  * @pdev: platform device pointer
1607  * Description: the driver is initialized through platform_device.
1608  */
1609 static int stmmac_dvr_probe(struct platform_device *pdev)
1610 {
1611         int ret = 0;
1612         struct resource *res;
1613         void __iomem *addr = NULL;
1614         struct net_device *ndev = NULL;
1615         struct stmmac_priv *priv = NULL;
1616         struct plat_stmmacenet_data *plat_dat;
1617
1618         pr_info("STMMAC driver:\n\tplatform registration... ");
1619         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1620         if (!res)
1621                 return -ENODEV;
1622         pr_info("\tdone!\n");
1623
1624         if (!request_mem_region(res->start, resource_size(res),
1625                                 pdev->name)) {
1626                 pr_err("%s: ERROR: memory allocation failed"
1627                        "cannot get the I/O addr 0x%x\n",
1628                        __func__, (unsigned int)res->start);
1629                 return -EBUSY;
1630         }
1631
1632         addr = ioremap(res->start, resource_size(res));
1633         if (!addr) {
1634                 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1635                 ret = -ENOMEM;
1636                 goto out_release_region;
1637         }
1638
1639         ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1640         if (!ndev) {
1641                 pr_err("%s: ERROR: allocating the device\n", __func__);
1642                 ret = -ENOMEM;
1643                 goto out_unmap;
1644         }
1645
1646         SET_NETDEV_DEV(ndev, &pdev->dev);
1647
1648         /* Get the MAC information */
1649         ndev->irq = platform_get_irq_byname(pdev, "macirq");
1650         if (ndev->irq == -ENXIO) {
1651                 pr_err("%s: ERROR: MAC IRQ configuration "
1652                        "information not found\n", __func__);
1653                 ret = -ENXIO;
1654                 goto out_free_ndev;
1655         }
1656
1657         priv = netdev_priv(ndev);
1658         priv->device = &(pdev->dev);
1659         priv->dev = ndev;
1660         plat_dat = pdev->dev.platform_data;
1661
1662         priv->plat = plat_dat;
1663
1664         priv->ioaddr = addr;
1665
1666         /* PMT module is not integrated in all the MAC devices. */
1667         if (plat_dat->pmt) {
1668                 pr_info("\tPMT module supported\n");
1669                 device_set_wakeup_capable(&pdev->dev, 1);
1670         }
1671
1672         platform_set_drvdata(pdev, ndev);
1673
1674         /* Set the I/O base addr */
1675         ndev->base_addr = (unsigned long)addr;
1676
1677         /* Custom initialisation */
1678         if (priv->plat->init) {
1679                 ret = priv->plat->init(pdev);
1680                 if (unlikely(ret))
1681                         goto out_free_ndev;
1682         }
1683
1684         /* MAC HW revice detection */
1685         ret = stmmac_mac_device_setup(ndev);
1686         if (ret < 0)
1687                 goto out_plat_exit;
1688
1689         /* Network Device Registration */
1690         ret = stmmac_probe(ndev);
1691         if (ret < 0)
1692                 goto out_plat_exit;
1693
1694         /* associate a PHY - it is provided by another platform bus */
1695         if (!driver_for_each_device
1696             (&(stmmacphy_driver.driver), NULL, (void *)priv,
1697              stmmac_associate_phy)) {
1698                 pr_err("No PHY device is associated with this MAC!\n");
1699                 ret = -ENODEV;
1700                 goto out_unregister;
1701         }
1702
1703         pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1704                "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1705                pdev->id, ndev->irq, addr);
1706
1707         /* MDIO bus Registration */
1708         pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
1709         ret = stmmac_mdio_register(ndev);
1710         if (ret < 0)
1711                 goto out_unregister;
1712         pr_debug("registered!\n");
1713         return 0;
1714
1715 out_unregister:
1716         unregister_netdev(ndev);
1717 out_plat_exit:
1718         if (priv->plat->exit)
1719                 priv->plat->exit(pdev);
1720 out_free_ndev:
1721         free_netdev(ndev);
1722         platform_set_drvdata(pdev, NULL);
1723 out_unmap:
1724         iounmap(addr);
1725 out_release_region:
1726         release_mem_region(res->start, resource_size(res));
1727
1728         return ret;
1729 }
1730
1731 /**
1732  * stmmac_dvr_remove
1733  * @pdev: platform device pointer
1734  * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1735  * changes the link status, releases the DMA descriptor rings,
1736  * unregisters the MDIO bus and unmaps the allocated memory.
1737  */
1738 static int stmmac_dvr_remove(struct platform_device *pdev)
1739 {
1740         struct net_device *ndev = platform_get_drvdata(pdev);
1741         struct stmmac_priv *priv = netdev_priv(ndev);
1742         struct resource *res;
1743
1744         pr_info("%s:\n\tremoving driver", __func__);
1745
1746         priv->hw->dma->stop_rx(priv->ioaddr);
1747         priv->hw->dma->stop_tx(priv->ioaddr);
1748
1749         stmmac_disable_mac(priv->ioaddr);
1750
1751         netif_carrier_off(ndev);
1752
1753         stmmac_mdio_unregister(ndev);
1754
1755         if (priv->plat->exit)
1756                 priv->plat->exit(pdev);
1757
1758         platform_set_drvdata(pdev, NULL);
1759         unregister_netdev(ndev);
1760
1761         iounmap((void *)priv->ioaddr);
1762         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1763         release_mem_region(res->start, resource_size(res));
1764
1765         free_netdev(ndev);
1766
1767         return 0;
1768 }
1769
1770 #ifdef CONFIG_PM
1771 static int stmmac_suspend(struct device *dev)
1772 {
1773         struct net_device *ndev = dev_get_drvdata(dev);
1774         struct stmmac_priv *priv = netdev_priv(ndev);
1775         int dis_ic = 0;
1776
1777         if (!ndev || !netif_running(ndev))
1778                 return 0;
1779
1780         spin_lock(&priv->lock);
1781
1782         netif_device_detach(ndev);
1783         netif_stop_queue(ndev);
1784         if (priv->phydev)
1785                 phy_stop(priv->phydev);
1786
1787 #ifdef CONFIG_STMMAC_TIMER
1788         priv->tm->timer_stop();
1789         if (likely(priv->tm->enable))
1790                 dis_ic = 1;
1791 #endif
1792         napi_disable(&priv->napi);
1793
1794         /* Stop TX/RX DMA */
1795         priv->hw->dma->stop_tx(priv->ioaddr);
1796         priv->hw->dma->stop_rx(priv->ioaddr);
1797         /* Clear the Rx/Tx descriptors */
1798         priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1799                                      dis_ic);
1800         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1801
1802         /* Enable Power down mode by programming the PMT regs */
1803         if (device_may_wakeup(priv->device))
1804                 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1805         else
1806                 stmmac_disable_mac(priv->ioaddr);
1807
1808         spin_unlock(&priv->lock);
1809         return 0;
1810 }
1811
1812 static int stmmac_resume(struct device *dev)
1813 {
1814         struct net_device *ndev = dev_get_drvdata(dev);
1815         struct stmmac_priv *priv = netdev_priv(ndev);
1816
1817         if (!netif_running(ndev))
1818                 return 0;
1819
1820         spin_lock(&priv->lock);
1821
1822         /* Power Down bit, into the PM register, is cleared
1823          * automatically as soon as a magic packet or a Wake-up frame
1824          * is received. Anyway, it's better to manually clear
1825          * this bit because it can generate problems while resuming
1826          * from another devices (e.g. serial console). */
1827         if (device_may_wakeup(priv->device))
1828                 priv->hw->mac->pmt(priv->ioaddr, 0);
1829
1830         netif_device_attach(ndev);
1831
1832         /* Enable the MAC and DMA */
1833         stmmac_enable_mac(priv->ioaddr);
1834         priv->hw->dma->start_tx(priv->ioaddr);
1835         priv->hw->dma->start_rx(priv->ioaddr);
1836
1837 #ifdef CONFIG_STMMAC_TIMER
1838         if (likely(priv->tm->enable))
1839                 priv->tm->timer_start(tmrate);
1840 #endif
1841         napi_enable(&priv->napi);
1842
1843         if (priv->phydev)
1844                 phy_start(priv->phydev);
1845
1846         netif_start_queue(ndev);
1847
1848         spin_unlock(&priv->lock);
1849         return 0;
1850 }
1851
1852 static int stmmac_freeze(struct device *dev)
1853 {
1854         struct net_device *ndev = dev_get_drvdata(dev);
1855
1856         if (!ndev || !netif_running(ndev))
1857                 return 0;
1858
1859         return stmmac_release(ndev);
1860 }
1861
1862 static int stmmac_restore(struct device *dev)
1863 {
1864         struct net_device *ndev = dev_get_drvdata(dev);
1865
1866         if (!ndev || !netif_running(ndev))
1867                 return 0;
1868
1869         return stmmac_open(ndev);
1870 }
1871
1872 static const struct dev_pm_ops stmmac_pm_ops = {
1873         .suspend = stmmac_suspend,
1874         .resume = stmmac_resume,
1875         .freeze = stmmac_freeze,
1876         .thaw = stmmac_restore,
1877         .restore = stmmac_restore,
1878 };
1879 #else
1880 static const struct dev_pm_ops stmmac_pm_ops;
1881 #endif /* CONFIG_PM */
1882
1883 static struct platform_driver stmmac_driver = {
1884         .probe = stmmac_dvr_probe,
1885         .remove = stmmac_dvr_remove,
1886         .driver = {
1887                 .name = STMMAC_RESOURCE_NAME,
1888                 .owner = THIS_MODULE,
1889                 .pm = &stmmac_pm_ops,
1890         },
1891 };
1892
1893 /**
1894  * stmmac_init_module - Entry point for the driver
1895  * Description: This function is the entry point for the driver.
1896  */
1897 static int __init stmmac_init_module(void)
1898 {
1899         int ret;
1900
1901         if (platform_driver_register(&stmmacphy_driver)) {
1902                 pr_err("No PHY devices registered!\n");
1903                 return -ENODEV;
1904         }
1905
1906         ret = platform_driver_register(&stmmac_driver);
1907         return ret;
1908 }
1909
1910 /**
1911  * stmmac_cleanup_module - Cleanup routine for the driver
1912  * Description: This function is the cleanup routine for the driver.
1913  */
1914 static void __exit stmmac_cleanup_module(void)
1915 {
1916         platform_driver_unregister(&stmmacphy_driver);
1917         platform_driver_unregister(&stmmac_driver);
1918 }
1919
1920 #ifndef MODULE
1921 static int __init stmmac_cmdline_opt(char *str)
1922 {
1923         char *opt;
1924
1925         if (!str || !*str)
1926                 return -EINVAL;
1927         while ((opt = strsep(&str, ",")) != NULL) {
1928                 if (!strncmp(opt, "debug:", 6))
1929                         strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
1930                 else if (!strncmp(opt, "phyaddr:", 8))
1931                         strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
1932                 else if (!strncmp(opt, "dma_txsize:", 11))
1933                         strict_strtoul(opt + 11, 0,
1934                                        (unsigned long *)&dma_txsize);
1935                 else if (!strncmp(opt, "dma_rxsize:", 11))
1936                         strict_strtoul(opt + 11, 0,
1937                                        (unsigned long *)&dma_rxsize);
1938                 else if (!strncmp(opt, "buf_sz:", 7))
1939                         strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
1940                 else if (!strncmp(opt, "tc:", 3))
1941                         strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
1942                 else if (!strncmp(opt, "watchdog:", 9))
1943                         strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
1944                 else if (!strncmp(opt, "flow_ctrl:", 10))
1945                         strict_strtoul(opt + 10, 0,
1946                                        (unsigned long *)&flow_ctrl);
1947                 else if (!strncmp(opt, "pause:", 6))
1948                         strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
1949 #ifdef CONFIG_STMMAC_TIMER
1950                 else if (!strncmp(opt, "tmrate:", 7))
1951                         strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
1952 #endif
1953         }
1954         return 0;
1955 }
1956
1957 __setup("stmmaceth=", stmmac_cmdline_opt);
1958 #endif
1959
1960 module_init(stmmac_init_module);
1961 module_exit(stmmac_cleanup_module);
1962
1963 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
1964 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1965 MODULE_LICENSE("GPL");