2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, see <http://www.gnu.org/licenses/>.
24 #define PHY_MODE_MARVELL 0x0000
25 #define MII_MARVELL_LED_CTRL 0x0018
26 #define MII_MARVELL_STATUS 0x001b
27 #define MII_MARVELL_CTRL 0x0014
29 #define MARVELL_LED_MANUAL 0x0019
31 #define MARVELL_STATUS_HWCFG 0x0004
33 #define MARVELL_CTRL_TXDELAY 0x0002
34 #define MARVELL_CTRL_RXDELAY 0x0080
36 #define PHY_MODE_RTL8211CL 0x000C
38 struct ax88172_int_data {
46 static void asix_status(struct usbnet *dev, struct urb *urb)
48 struct ax88172_int_data *event;
51 if (urb->actual_length < 8)
54 event = urb->transfer_buffer;
55 link = event->link & 0x01;
56 if (netif_carrier_ok(dev->net) != link) {
57 usbnet_link_change(dev, link, 1);
58 netdev_dbg(dev->net, "Link Status is: %d\n", link);
62 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
64 if (is_valid_ether_addr(addr)) {
65 memcpy(dev->net->dev_addr, addr, ETH_ALEN);
67 netdev_info(dev->net, "invalid hw address, using random\n");
68 eth_hw_addr_random(dev->net);
72 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
73 static u32 asix_get_phyid(struct usbnet *dev)
79 /* Poll for the rare case the FW or phy isn't ready yet. */
80 for (i = 0; i < 100; i++) {
81 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
82 if (phy_reg != 0 && phy_reg != 0xFFFF)
87 if (phy_reg <= 0 || phy_reg == 0xFFFF)
90 phy_id = (phy_reg & 0xffff) << 16;
92 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
96 phy_id |= (phy_reg & 0xffff);
101 static u32 asix_get_link(struct net_device *net)
103 struct usbnet *dev = netdev_priv(net);
105 return mii_link_ok(&dev->mii);
108 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
110 struct usbnet *dev = netdev_priv(net);
112 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
115 /* We need to override some ethtool_ops so we require our
116 own structure so we don't interfere with other usbnet
117 devices that may be connected at the same time. */
118 static const struct ethtool_ops ax88172_ethtool_ops = {
119 .get_drvinfo = asix_get_drvinfo,
120 .get_link = asix_get_link,
121 .get_msglevel = usbnet_get_msglevel,
122 .set_msglevel = usbnet_set_msglevel,
123 .get_wol = asix_get_wol,
124 .set_wol = asix_set_wol,
125 .get_eeprom_len = asix_get_eeprom_len,
126 .get_eeprom = asix_get_eeprom,
127 .set_eeprom = asix_set_eeprom,
128 .get_settings = usbnet_get_settings,
129 .set_settings = usbnet_set_settings,
130 .nway_reset = usbnet_nway_reset,
133 static void ax88172_set_multicast(struct net_device *net)
135 struct usbnet *dev = netdev_priv(net);
136 struct asix_data *data = (struct asix_data *)&dev->data;
139 if (net->flags & IFF_PROMISC) {
141 } else if (net->flags & IFF_ALLMULTI ||
142 netdev_mc_count(net) > AX_MAX_MCAST) {
144 } else if (netdev_mc_empty(net)) {
145 /* just broadcast and directed */
147 /* We use the 20 byte dev->data
148 * for our 8 byte filter buffer
149 * to avoid allocating memory that
150 * is tricky to free later */
151 struct netdev_hw_addr *ha;
154 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
156 /* Build the multicast hash filter. */
157 netdev_for_each_mc_addr(ha, net) {
158 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
159 data->multi_filter[crc_bits >> 3] |=
163 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
164 AX_MCAST_FILTER_SIZE, data->multi_filter);
169 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
172 static int ax88172_link_reset(struct usbnet *dev)
175 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
177 mii_check_media(&dev->mii, 1, 1);
178 mii_ethtool_gset(&dev->mii, &ecmd);
179 mode = AX88172_MEDIUM_DEFAULT;
181 if (ecmd.duplex != DUPLEX_FULL)
182 mode |= ~AX88172_MEDIUM_FD;
184 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
185 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
187 asix_write_medium_mode(dev, mode, 0);
192 static const struct net_device_ops ax88172_netdev_ops = {
193 .ndo_open = usbnet_open,
194 .ndo_stop = usbnet_stop,
195 .ndo_start_xmit = usbnet_start_xmit,
196 .ndo_tx_timeout = usbnet_tx_timeout,
197 .ndo_change_mtu = usbnet_change_mtu,
198 .ndo_set_mac_address = eth_mac_addr,
199 .ndo_validate_addr = eth_validate_addr,
200 .ndo_do_ioctl = asix_ioctl,
201 .ndo_set_rx_mode = ax88172_set_multicast,
204 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
209 unsigned long gpio_bits = dev->driver_info->data;
211 usbnet_get_endpoints(dev,intf);
213 /* Toggle the GPIOs in a manufacturer/model specific way */
214 for (i = 2; i >= 0; i--) {
215 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
216 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL, 0);
222 ret = asix_write_rx_ctl(dev, 0x80, 0);
226 /* Get the MAC address */
227 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
228 0, 0, ETH_ALEN, buf, 0);
230 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
235 asix_set_netdev_dev_addr(dev, buf);
237 /* Initialize MII structure */
238 dev->mii.dev = dev->net;
239 dev->mii.mdio_read = asix_mdio_read;
240 dev->mii.mdio_write = asix_mdio_write;
241 dev->mii.phy_id_mask = 0x3f;
242 dev->mii.reg_num_mask = 0x1f;
243 dev->mii.phy_id = asix_get_phy_addr(dev);
245 dev->net->netdev_ops = &ax88172_netdev_ops;
246 dev->net->ethtool_ops = &ax88172_ethtool_ops;
247 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
248 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
250 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
251 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
252 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
253 mii_nway_restart(&dev->mii);
261 static const struct ethtool_ops ax88772_ethtool_ops = {
262 .get_drvinfo = asix_get_drvinfo,
263 .get_link = asix_get_link,
264 .get_msglevel = usbnet_get_msglevel,
265 .set_msglevel = usbnet_set_msglevel,
266 .get_wol = asix_get_wol,
267 .set_wol = asix_set_wol,
268 .get_eeprom_len = asix_get_eeprom_len,
269 .get_eeprom = asix_get_eeprom,
270 .set_eeprom = asix_set_eeprom,
271 .get_settings = usbnet_get_settings,
272 .set_settings = usbnet_set_settings,
273 .nway_reset = usbnet_nway_reset,
276 static int ax88772_link_reset(struct usbnet *dev)
279 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
281 mii_check_media(&dev->mii, 1, 1);
282 mii_ethtool_gset(&dev->mii, &ecmd);
283 mode = AX88772_MEDIUM_DEFAULT;
285 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
286 mode &= ~AX_MEDIUM_PS;
288 if (ecmd.duplex != DUPLEX_FULL)
289 mode &= ~AX_MEDIUM_FD;
291 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
292 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
294 asix_write_medium_mode(dev, mode, 0);
299 static int ax88772_reset(struct usbnet *dev)
301 struct asix_data *data = (struct asix_data *)&dev->data;
304 /* Rewrite MAC address */
305 ether_addr_copy(data->mac_addr, dev->net->dev_addr);
306 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
307 ETH_ALEN, data->mac_addr, 0);
311 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
312 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
316 asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, 0);
326 static int ax88772_hw_reset(struct usbnet *dev, int in_pm)
328 struct asix_data *data = (struct asix_data *)&dev->data;
332 ret = asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_2 |
333 AX_GPIO_GPO2EN, 5, in_pm);
337 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
339 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy,
342 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
347 ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm);
351 usleep_range(10000, 11000);
353 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
359 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL,
364 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL,
372 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
378 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
382 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
386 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
387 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
388 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
390 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
394 /* Rewrite MAC address */
395 ether_addr_copy(data->mac_addr, dev->net->dev_addr);
396 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
397 ETH_ALEN, data->mac_addr, in_pm);
401 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
402 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
406 rx_ctl = asix_read_rx_ctl(dev, in_pm);
407 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
410 rx_ctl = asix_read_medium_status(dev, in_pm);
412 "Medium Status is 0x%04x after all initializations\n",
421 static int ax88772a_hw_reset(struct usbnet *dev, int in_pm)
423 struct asix_data *data = (struct asix_data *)&dev->data;
428 ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm);
432 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
434 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy |
435 AX_PHYSEL_SSEN, 0, 0, NULL, in_pm);
437 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
440 usleep_range(10000, 11000);
442 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm);
446 usleep_range(10000, 11000);
448 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
454 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
458 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
464 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
470 ret = asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0,
471 0, 1, &chipcode, in_pm);
475 if ((chipcode & AX_CHIPCODE_MASK) == AX_AX88772B_CHIPCODE) {
476 ret = asix_write_cmd(dev, AX_QCTCTRL, 0x8000, 0x8001,
479 netdev_dbg(dev->net, "Write BQ setting failed: %d\n",
485 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
486 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
487 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
489 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
493 /* Rewrite MAC address */
494 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
495 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
496 data->mac_addr, in_pm);
500 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
501 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
505 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
509 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
510 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
514 rx_ctl = asix_read_rx_ctl(dev, in_pm);
515 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
518 rx_ctl = asix_read_medium_status(dev, in_pm);
520 "Medium Status is 0x%04x after all initializations\n",
529 static const struct net_device_ops ax88772_netdev_ops = {
530 .ndo_open = usbnet_open,
531 .ndo_stop = usbnet_stop,
532 .ndo_start_xmit = usbnet_start_xmit,
533 .ndo_tx_timeout = usbnet_tx_timeout,
534 .ndo_change_mtu = usbnet_change_mtu,
535 .ndo_set_mac_address = asix_set_mac_address,
536 .ndo_validate_addr = eth_validate_addr,
537 .ndo_do_ioctl = asix_ioctl,
538 .ndo_set_rx_mode = asix_set_multicast,
541 static void ax88772_suspend(struct usbnet *dev)
543 struct asix_common_private *priv = dev->driver_priv;
545 /* Preserve BMCR for restoring */
546 priv->presvd_phy_bmcr =
547 asix_mdio_read_nopm(dev->net, dev->mii.phy_id, MII_BMCR);
549 /* Preserve ANAR for restoring */
550 priv->presvd_phy_advertise =
551 asix_mdio_read_nopm(dev->net, dev->mii.phy_id, MII_ADVERTISE);
554 static int asix_suspend(struct usb_interface *intf, pm_message_t message)
556 struct usbnet *dev = usb_get_intfdata(intf);
557 struct asix_common_private *priv = dev->driver_priv;
562 return usbnet_suspend(intf, message);
565 static void ax88772_restore_phy(struct usbnet *dev)
567 struct asix_common_private *priv = dev->driver_priv;
569 if (priv->presvd_phy_advertise) {
570 /* Restore Advertisement control reg */
571 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, MII_ADVERTISE,
572 priv->presvd_phy_advertise);
575 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, MII_BMCR,
576 priv->presvd_phy_bmcr);
578 priv->presvd_phy_advertise = 0;
579 priv->presvd_phy_bmcr = 0;
583 static void ax88772_resume(struct usbnet *dev)
587 for (i = 0; i < 3; i++)
588 if (!ax88772_hw_reset(dev, 1))
590 ax88772_restore_phy(dev);
593 static void ax88772a_resume(struct usbnet *dev)
597 for (i = 0; i < 3; i++) {
598 if (!ax88772a_hw_reset(dev, 1))
602 ax88772_restore_phy(dev);
605 static int asix_resume(struct usb_interface *intf)
607 struct usbnet *dev = usb_get_intfdata(intf);
608 struct asix_common_private *priv = dev->driver_priv;
613 return usbnet_resume(intf);
616 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
619 u8 buf[ETH_ALEN], chipcode = 0;
621 struct asix_common_private *priv;
623 usbnet_get_endpoints(dev,intf);
625 /* Get the MAC address */
626 if (dev->driver_info->data & FLAG_EEPROM_MAC) {
627 for (i = 0; i < (ETH_ALEN >> 1); i++) {
628 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
629 0, 2, buf + i * 2, 0);
634 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
635 0, 0, ETH_ALEN, buf, 0);
639 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
643 asix_set_netdev_dev_addr(dev, buf);
645 /* Initialize MII structure */
646 dev->mii.dev = dev->net;
647 dev->mii.mdio_read = asix_mdio_read;
648 dev->mii.mdio_write = asix_mdio_write;
649 dev->mii.phy_id_mask = 0x1f;
650 dev->mii.reg_num_mask = 0x1f;
651 dev->mii.phy_id = asix_get_phy_addr(dev);
653 dev->net->netdev_ops = &ax88772_netdev_ops;
654 dev->net->ethtool_ops = &ax88772_ethtool_ops;
655 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
656 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
658 asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1, &chipcode, 0);
659 chipcode &= AX_CHIPCODE_MASK;
661 (chipcode == AX_AX88772_CHIPCODE) ? ax88772_hw_reset(dev, 0) :
662 ax88772a_hw_reset(dev, 0);
664 /* Read PHYID register *AFTER* the PHY was reset properly */
665 phyid = asix_get_phyid(dev);
666 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
668 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
669 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
670 /* hard_mtu is still the default - the device does not support
672 dev->rx_urb_size = 2048;
675 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
676 if (!dev->driver_priv)
679 priv = dev->driver_priv;
681 priv->presvd_phy_bmcr = 0;
682 priv->presvd_phy_advertise = 0;
683 if (chipcode == AX_AX88772_CHIPCODE) {
684 priv->resume = ax88772_resume;
685 priv->suspend = ax88772_suspend;
687 priv->resume = ax88772a_resume;
688 priv->suspend = ax88772_suspend;
694 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
696 kfree(dev->driver_priv);
699 static const struct ethtool_ops ax88178_ethtool_ops = {
700 .get_drvinfo = asix_get_drvinfo,
701 .get_link = asix_get_link,
702 .get_msglevel = usbnet_get_msglevel,
703 .set_msglevel = usbnet_set_msglevel,
704 .get_wol = asix_get_wol,
705 .set_wol = asix_set_wol,
706 .get_eeprom_len = asix_get_eeprom_len,
707 .get_eeprom = asix_get_eeprom,
708 .set_eeprom = asix_set_eeprom,
709 .get_settings = usbnet_get_settings,
710 .set_settings = usbnet_set_settings,
711 .nway_reset = usbnet_nway_reset,
714 static int marvell_phy_init(struct usbnet *dev)
716 struct asix_data *data = (struct asix_data *)&dev->data;
719 netdev_dbg(dev->net, "marvell_phy_init()\n");
721 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
722 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
724 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
725 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
728 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
729 MII_MARVELL_LED_CTRL);
730 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
734 asix_mdio_write(dev->net, dev->mii.phy_id,
735 MII_MARVELL_LED_CTRL, reg);
737 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
738 MII_MARVELL_LED_CTRL);
739 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
746 static int rtl8211cl_phy_init(struct usbnet *dev)
748 struct asix_data *data = (struct asix_data *)&dev->data;
750 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
752 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
753 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
754 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
755 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
756 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
758 if (data->ledmode == 12) {
759 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
760 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
761 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
767 static int marvell_led_status(struct usbnet *dev, u16 speed)
769 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
771 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
773 /* Clear out the center LED bits - 0x03F0 */
787 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
788 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
793 static int ax88178_reset(struct usbnet *dev)
795 struct asix_data *data = (struct asix_data *)&dev->data;
802 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status, 0);
803 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
805 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL, 0);
806 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom, 0);
807 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL, 0);
809 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
811 if (eeprom == cpu_to_le16(0xffff)) {
812 data->phymode = PHY_MODE_MARVELL;
816 data->phymode = le16_to_cpu(eeprom) & 0x7F;
817 data->ledmode = le16_to_cpu(eeprom) >> 8;
818 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
820 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
822 /* Power up external GigaPHY through AX88178 GPIO pin */
823 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 |
824 AX_GPIO_GPO1EN, 40, 0);
825 if ((le16_to_cpu(eeprom) >> 8) != 1) {
826 asix_write_gpio(dev, 0x003c, 30, 0);
827 asix_write_gpio(dev, 0x001c, 300, 0);
828 asix_write_gpio(dev, 0x003c, 30, 0);
830 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
831 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30, 0);
832 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30, 0);
835 /* Read PHYID register *AFTER* powering up PHY */
836 phyid = asix_get_phyid(dev);
837 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
839 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
840 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL, 0);
842 asix_sw_reset(dev, 0, 0);
845 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
848 asix_write_rx_ctl(dev, 0, 0);
850 if (data->phymode == PHY_MODE_MARVELL) {
851 marvell_phy_init(dev);
853 } else if (data->phymode == PHY_MODE_RTL8211CL)
854 rtl8211cl_phy_init(dev);
856 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
857 BMCR_RESET | BMCR_ANENABLE);
858 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
859 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
860 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
863 mii_nway_restart(&dev->mii);
865 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT, 0);
869 /* Rewrite MAC address */
870 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
871 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
876 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
883 static int ax88178_link_reset(struct usbnet *dev)
886 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
887 struct asix_data *data = (struct asix_data *)&dev->data;
890 netdev_dbg(dev->net, "ax88178_link_reset()\n");
892 mii_check_media(&dev->mii, 1, 1);
893 mii_ethtool_gset(&dev->mii, &ecmd);
894 mode = AX88178_MEDIUM_DEFAULT;
895 speed = ethtool_cmd_speed(&ecmd);
897 if (speed == SPEED_1000)
898 mode |= AX_MEDIUM_GM;
899 else if (speed == SPEED_100)
900 mode |= AX_MEDIUM_PS;
902 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
904 mode |= AX_MEDIUM_ENCK;
906 if (ecmd.duplex == DUPLEX_FULL)
907 mode |= AX_MEDIUM_FD;
909 mode &= ~AX_MEDIUM_FD;
911 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
912 speed, ecmd.duplex, mode);
914 asix_write_medium_mode(dev, mode, 0);
916 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
917 marvell_led_status(dev, speed);
922 static void ax88178_set_mfb(struct usbnet *dev)
924 u16 mfb = AX_RX_CTL_MFB_16384;
927 int old_rx_urb_size = dev->rx_urb_size;
929 if (dev->hard_mtu < 2048) {
930 dev->rx_urb_size = 2048;
931 mfb = AX_RX_CTL_MFB_2048;
932 } else if (dev->hard_mtu < 4096) {
933 dev->rx_urb_size = 4096;
934 mfb = AX_RX_CTL_MFB_4096;
935 } else if (dev->hard_mtu < 8192) {
936 dev->rx_urb_size = 8192;
937 mfb = AX_RX_CTL_MFB_8192;
938 } else if (dev->hard_mtu < 16384) {
939 dev->rx_urb_size = 16384;
940 mfb = AX_RX_CTL_MFB_16384;
943 rxctl = asix_read_rx_ctl(dev, 0);
944 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb, 0);
946 medium = asix_read_medium_status(dev, 0);
947 if (dev->net->mtu > 1500)
948 medium |= AX_MEDIUM_JFE;
950 medium &= ~AX_MEDIUM_JFE;
951 asix_write_medium_mode(dev, medium, 0);
953 if (dev->rx_urb_size > old_rx_urb_size)
954 usbnet_unlink_rx_urbs(dev);
957 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
959 struct usbnet *dev = netdev_priv(net);
960 int ll_mtu = new_mtu + net->hard_header_len + 4;
962 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
964 if (new_mtu <= 0 || ll_mtu > 16384)
967 if ((ll_mtu % dev->maxpacket) == 0)
971 dev->hard_mtu = net->mtu + net->hard_header_len;
972 ax88178_set_mfb(dev);
974 /* max qlen depend on hard_mtu and rx_urb_size */
975 usbnet_update_max_qlen(dev);
980 static const struct net_device_ops ax88178_netdev_ops = {
981 .ndo_open = usbnet_open,
982 .ndo_stop = usbnet_stop,
983 .ndo_start_xmit = usbnet_start_xmit,
984 .ndo_tx_timeout = usbnet_tx_timeout,
985 .ndo_set_mac_address = asix_set_mac_address,
986 .ndo_validate_addr = eth_validate_addr,
987 .ndo_set_rx_mode = asix_set_multicast,
988 .ndo_do_ioctl = asix_ioctl,
989 .ndo_change_mtu = ax88178_change_mtu,
992 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
997 usbnet_get_endpoints(dev,intf);
999 /* Get the MAC address */
1000 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
1002 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
1006 asix_set_netdev_dev_addr(dev, buf);
1008 /* Initialize MII structure */
1009 dev->mii.dev = dev->net;
1010 dev->mii.mdio_read = asix_mdio_read;
1011 dev->mii.mdio_write = asix_mdio_write;
1012 dev->mii.phy_id_mask = 0x1f;
1013 dev->mii.reg_num_mask = 0xff;
1014 dev->mii.supports_gmii = 1;
1015 dev->mii.phy_id = asix_get_phy_addr(dev);
1017 dev->net->netdev_ops = &ax88178_netdev_ops;
1018 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1020 /* Blink LEDS so users know driver saw dongle */
1021 asix_sw_reset(dev, 0, 0);
1024 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
1027 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1028 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1029 /* hard_mtu is still the default - the device does not support
1031 dev->rx_urb_size = 2048;
1034 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
1035 if (!dev->driver_priv)
1041 static const struct driver_info ax8817x_info = {
1042 .description = "ASIX AX8817x USB 2.0 Ethernet",
1043 .bind = ax88172_bind,
1044 .status = asix_status,
1045 .link_reset = ax88172_link_reset,
1046 .reset = ax88172_link_reset,
1047 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1051 static const struct driver_info dlink_dub_e100_info = {
1052 .description = "DLink DUB-E100 USB Ethernet",
1053 .bind = ax88172_bind,
1054 .status = asix_status,
1055 .link_reset = ax88172_link_reset,
1056 .reset = ax88172_link_reset,
1057 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1061 static const struct driver_info netgear_fa120_info = {
1062 .description = "Netgear FA-120 USB Ethernet",
1063 .bind = ax88172_bind,
1064 .status = asix_status,
1065 .link_reset = ax88172_link_reset,
1066 .reset = ax88172_link_reset,
1067 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1071 static const struct driver_info hawking_uf200_info = {
1072 .description = "Hawking UF200 USB Ethernet",
1073 .bind = ax88172_bind,
1074 .status = asix_status,
1075 .link_reset = ax88172_link_reset,
1076 .reset = ax88172_link_reset,
1077 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1081 static const struct driver_info ax88772_info = {
1082 .description = "ASIX AX88772 USB 2.0 Ethernet",
1083 .bind = ax88772_bind,
1084 .unbind = ax88772_unbind,
1085 .status = asix_status,
1086 .link_reset = ax88772_link_reset,
1087 .reset = ax88772_reset,
1088 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
1089 .rx_fixup = asix_rx_fixup_common,
1090 .tx_fixup = asix_tx_fixup,
1093 static const struct driver_info ax88772b_info = {
1094 .description = "ASIX AX88772B USB 2.0 Ethernet",
1095 .bind = ax88772_bind,
1096 .unbind = ax88772_unbind,
1097 .status = asix_status,
1098 .link_reset = ax88772_link_reset,
1099 .reset = ax88772_reset,
1100 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1102 .rx_fixup = asix_rx_fixup_common,
1103 .tx_fixup = asix_tx_fixup,
1104 .data = FLAG_EEPROM_MAC,
1107 static const struct driver_info ax88178_info = {
1108 .description = "ASIX AX88178 USB 2.0 Ethernet",
1109 .bind = ax88178_bind,
1110 .unbind = ax88772_unbind,
1111 .status = asix_status,
1112 .link_reset = ax88178_link_reset,
1113 .reset = ax88178_reset,
1114 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1116 .rx_fixup = asix_rx_fixup_common,
1117 .tx_fixup = asix_tx_fixup,
1121 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
1122 * no-name packaging.
1123 * USB device strings are:
1124 * 1: Manufacturer: USBLINK
1125 * 2: Product: HG20F9 USB2.0
1127 * Appears to be compatible with Asix 88772B.
1129 static const struct driver_info hg20f9_info = {
1130 .description = "HG20F9 USB 2.0 Ethernet",
1131 .bind = ax88772_bind,
1132 .unbind = ax88772_unbind,
1133 .status = asix_status,
1134 .link_reset = ax88772_link_reset,
1135 .reset = ax88772_reset,
1136 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1138 .rx_fixup = asix_rx_fixup_common,
1139 .tx_fixup = asix_tx_fixup,
1140 .data = FLAG_EEPROM_MAC,
1143 static const struct usb_device_id products [] = {
1146 USB_DEVICE (0x077b, 0x2226),
1147 .driver_info = (unsigned long) &ax8817x_info,
1150 USB_DEVICE (0x0846, 0x1040),
1151 .driver_info = (unsigned long) &netgear_fa120_info,
1154 USB_DEVICE (0x2001, 0x1a00),
1155 .driver_info = (unsigned long) &dlink_dub_e100_info,
1157 // Intellinet, ST Lab USB Ethernet
1158 USB_DEVICE (0x0b95, 0x1720),
1159 .driver_info = (unsigned long) &ax8817x_info,
1161 // Hawking UF200, TrendNet TU2-ET100
1162 USB_DEVICE (0x07b8, 0x420a),
1163 .driver_info = (unsigned long) &hawking_uf200_info,
1165 // Billionton Systems, USB2AR
1166 USB_DEVICE (0x08dd, 0x90ff),
1167 .driver_info = (unsigned long) &ax8817x_info,
1169 // Billionton Systems, GUSB2AM-1G-B
1170 USB_DEVICE(0x08dd, 0x0114),
1171 .driver_info = (unsigned long) &ax88178_info,
1174 USB_DEVICE (0x0557, 0x2009),
1175 .driver_info = (unsigned long) &ax8817x_info,
1177 // Buffalo LUA-U2-KTX
1178 USB_DEVICE (0x0411, 0x003d),
1179 .driver_info = (unsigned long) &ax8817x_info,
1181 // Buffalo LUA-U2-GT 10/100/1000
1182 USB_DEVICE (0x0411, 0x006e),
1183 .driver_info = (unsigned long) &ax88178_info,
1185 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1186 USB_DEVICE (0x6189, 0x182d),
1187 .driver_info = (unsigned long) &ax8817x_info,
1189 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1190 USB_DEVICE (0x0df6, 0x0056),
1191 .driver_info = (unsigned long) &ax88178_info,
1193 // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
1194 USB_DEVICE (0x0df6, 0x061c),
1195 .driver_info = (unsigned long) &ax88178_info,
1197 // corega FEther USB2-TX
1198 USB_DEVICE (0x07aa, 0x0017),
1199 .driver_info = (unsigned long) &ax8817x_info,
1201 // Surecom EP-1427X-2
1202 USB_DEVICE (0x1189, 0x0893),
1203 .driver_info = (unsigned long) &ax8817x_info,
1205 // goodway corp usb gwusb2e
1206 USB_DEVICE (0x1631, 0x6200),
1207 .driver_info = (unsigned long) &ax8817x_info,
1209 // JVC MP-PRX1 Port Replicator
1210 USB_DEVICE (0x04f1, 0x3008),
1211 .driver_info = (unsigned long) &ax8817x_info,
1213 // Lenovo U2L100P 10/100
1214 USB_DEVICE (0x17ef, 0x7203),
1215 .driver_info = (unsigned long)&ax88772b_info,
1217 // ASIX AX88772B 10/100
1218 USB_DEVICE (0x0b95, 0x772b),
1219 .driver_info = (unsigned long) &ax88772b_info,
1221 // ASIX AX88772 10/100
1222 USB_DEVICE (0x0b95, 0x7720),
1223 .driver_info = (unsigned long) &ax88772_info,
1225 // ASIX AX88178 10/100/1000
1226 USB_DEVICE (0x0b95, 0x1780),
1227 .driver_info = (unsigned long) &ax88178_info,
1229 // Logitec LAN-GTJ/U2A
1230 USB_DEVICE (0x0789, 0x0160),
1231 .driver_info = (unsigned long) &ax88178_info,
1233 // Linksys USB200M Rev 2
1234 USB_DEVICE (0x13b1, 0x0018),
1235 .driver_info = (unsigned long) &ax88772_info,
1237 // 0Q0 cable ethernet
1238 USB_DEVICE (0x1557, 0x7720),
1239 .driver_info = (unsigned long) &ax88772_info,
1241 // DLink DUB-E100 H/W Ver B1
1242 USB_DEVICE (0x07d1, 0x3c05),
1243 .driver_info = (unsigned long) &ax88772_info,
1245 // DLink DUB-E100 H/W Ver B1 Alternate
1246 USB_DEVICE (0x2001, 0x3c05),
1247 .driver_info = (unsigned long) &ax88772_info,
1249 // DLink DUB-E100 H/W Ver C1
1250 USB_DEVICE (0x2001, 0x1a02),
1251 .driver_info = (unsigned long) &ax88772_info,
1254 USB_DEVICE (0x1737, 0x0039),
1255 .driver_info = (unsigned long) &ax88178_info,
1258 USB_DEVICE (0x04bb, 0x0930),
1259 .driver_info = (unsigned long) &ax88178_info,
1262 USB_DEVICE(0x050d, 0x5055),
1263 .driver_info = (unsigned long) &ax88178_info,
1265 // Apple USB Ethernet Adapter
1266 USB_DEVICE(0x05ac, 0x1402),
1267 .driver_info = (unsigned long) &ax88772_info,
1269 // Cables-to-Go USB Ethernet Adapter
1270 USB_DEVICE(0x0b95, 0x772a),
1271 .driver_info = (unsigned long) &ax88772_info,
1274 USB_DEVICE(0x14ea, 0xab11),
1275 .driver_info = (unsigned long) &ax88178_info,
1278 USB_DEVICE(0x0db0, 0xa877),
1279 .driver_info = (unsigned long) &ax88772_info,
1281 // Asus USB Ethernet Adapter
1282 USB_DEVICE (0x0b95, 0x7e2b),
1283 .driver_info = (unsigned long)&ax88772b_info,
1285 /* ASIX 88172a demo board */
1286 USB_DEVICE(0x0b95, 0x172a),
1287 .driver_info = (unsigned long) &ax88172a_info,
1290 * USBLINK HG20F9 "USB 2.0 LAN"
1291 * Appears to have gazumped Linksys's manufacturer ID but
1292 * doesn't (yet) conflict with any known Linksys product.
1294 USB_DEVICE(0x066b, 0x20f9),
1295 .driver_info = (unsigned long) &hg20f9_info,
1299 MODULE_DEVICE_TABLE(usb, products);
1301 static struct usb_driver asix_driver = {
1302 .name = DRIVER_NAME,
1303 .id_table = products,
1304 .probe = usbnet_probe,
1305 .suspend = asix_suspend,
1306 .resume = asix_resume,
1307 .disconnect = usbnet_disconnect,
1308 .supports_autosuspend = 1,
1309 .disable_hub_initiated_lpm = 1,
1312 module_usb_driver(asix_driver);
1314 MODULE_AUTHOR("David Hollis");
1315 MODULE_VERSION(DRIVER_VERSION);
1316 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1317 MODULE_LICENSE("GPL");