Merge branch 'r8152-next'
[cascardo/linux.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27
28 /* Version Information */
29 #define DRIVER_VERSION "v1.07.0 (2014/10/09)"
30 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
31 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
32 #define MODULENAME "r8152"
33
34 #define R8152_PHY_ID            32
35
36 #define PLA_IDR                 0xc000
37 #define PLA_RCR                 0xc010
38 #define PLA_RMS                 0xc016
39 #define PLA_RXFIFO_CTRL0        0xc0a0
40 #define PLA_RXFIFO_CTRL1        0xc0a4
41 #define PLA_RXFIFO_CTRL2        0xc0a8
42 #define PLA_FMC                 0xc0b4
43 #define PLA_CFG_WOL             0xc0b6
44 #define PLA_TEREDO_CFG          0xc0bc
45 #define PLA_MAR                 0xcd00
46 #define PLA_BACKUP              0xd000
47 #define PAL_BDC_CR              0xd1a0
48 #define PLA_TEREDO_TIMER        0xd2cc
49 #define PLA_REALWOW_TIMER       0xd2e8
50 #define PLA_LEDSEL              0xdd90
51 #define PLA_LED_FEATURE         0xdd92
52 #define PLA_PHYAR               0xde00
53 #define PLA_BOOT_CTRL           0xe004
54 #define PLA_GPHY_INTR_IMR       0xe022
55 #define PLA_EEE_CR              0xe040
56 #define PLA_EEEP_CR             0xe080
57 #define PLA_MAC_PWR_CTRL        0xe0c0
58 #define PLA_MAC_PWR_CTRL2       0xe0ca
59 #define PLA_MAC_PWR_CTRL3       0xe0cc
60 #define PLA_MAC_PWR_CTRL4       0xe0ce
61 #define PLA_WDT6_CTRL           0xe428
62 #define PLA_TCR0                0xe610
63 #define PLA_TCR1                0xe612
64 #define PLA_MTPS                0xe615
65 #define PLA_TXFIFO_CTRL         0xe618
66 #define PLA_RSTTALLY            0xe800
67 #define PLA_CR                  0xe813
68 #define PLA_CRWECR              0xe81c
69 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
70 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
71 #define PLA_CONFIG5             0xe822
72 #define PLA_PHY_PWR             0xe84c
73 #define PLA_OOB_CTRL            0xe84f
74 #define PLA_CPCR                0xe854
75 #define PLA_MISC_0              0xe858
76 #define PLA_MISC_1              0xe85a
77 #define PLA_OCP_GPHY_BASE       0xe86c
78 #define PLA_TALLYCNT            0xe890
79 #define PLA_SFF_STS_7           0xe8de
80 #define PLA_PHYSTATUS           0xe908
81 #define PLA_BP_BA               0xfc26
82 #define PLA_BP_0                0xfc28
83 #define PLA_BP_1                0xfc2a
84 #define PLA_BP_2                0xfc2c
85 #define PLA_BP_3                0xfc2e
86 #define PLA_BP_4                0xfc30
87 #define PLA_BP_5                0xfc32
88 #define PLA_BP_6                0xfc34
89 #define PLA_BP_7                0xfc36
90 #define PLA_BP_EN               0xfc38
91
92 #define USB_U2P3_CTRL           0xb460
93 #define USB_DEV_STAT            0xb808
94 #define USB_USB_CTRL            0xd406
95 #define USB_PHY_CTRL            0xd408
96 #define USB_TX_AGG              0xd40a
97 #define USB_RX_BUF_TH           0xd40c
98 #define USB_USB_TIMER           0xd428
99 #define USB_RX_EARLY_AGG        0xd42c
100 #define USB_PM_CTRL_STATUS      0xd432
101 #define USB_TX_DMA              0xd434
102 #define USB_TOLERANCE           0xd490
103 #define USB_LPM_CTRL            0xd41a
104 #define USB_UPS_CTRL            0xd800
105 #define USB_MISC_0              0xd81a
106 #define USB_POWER_CUT           0xd80a
107 #define USB_AFE_CTRL2           0xd824
108 #define USB_WDT11_CTRL          0xe43c
109 #define USB_BP_BA               0xfc26
110 #define USB_BP_0                0xfc28
111 #define USB_BP_1                0xfc2a
112 #define USB_BP_2                0xfc2c
113 #define USB_BP_3                0xfc2e
114 #define USB_BP_4                0xfc30
115 #define USB_BP_5                0xfc32
116 #define USB_BP_6                0xfc34
117 #define USB_BP_7                0xfc36
118 #define USB_BP_EN               0xfc38
119
120 /* OCP Registers */
121 #define OCP_ALDPS_CONFIG        0x2010
122 #define OCP_EEE_CONFIG1         0x2080
123 #define OCP_EEE_CONFIG2         0x2092
124 #define OCP_EEE_CONFIG3         0x2094
125 #define OCP_BASE_MII            0xa400
126 #define OCP_EEE_AR              0xa41a
127 #define OCP_EEE_DATA            0xa41c
128 #define OCP_PHY_STATUS          0xa420
129 #define OCP_POWER_CFG           0xa430
130 #define OCP_EEE_CFG             0xa432
131 #define OCP_SRAM_ADDR           0xa436
132 #define OCP_SRAM_DATA           0xa438
133 #define OCP_DOWN_SPEED          0xa442
134 #define OCP_EEE_ABLE            0xa5c4
135 #define OCP_EEE_ADV             0xa5d0
136 #define OCP_EEE_LPABLE          0xa5d2
137 #define OCP_ADC_CFG             0xbc06
138
139 /* SRAM Register */
140 #define SRAM_LPF_CFG            0x8012
141 #define SRAM_10M_AMP1           0x8080
142 #define SRAM_10M_AMP2           0x8082
143 #define SRAM_IMPEDANCE          0x8084
144
145 /* PLA_RCR */
146 #define RCR_AAP                 0x00000001
147 #define RCR_APM                 0x00000002
148 #define RCR_AM                  0x00000004
149 #define RCR_AB                  0x00000008
150 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
151
152 /* PLA_RXFIFO_CTRL0 */
153 #define RXFIFO_THR1_NORMAL      0x00080002
154 #define RXFIFO_THR1_OOB         0x01800003
155
156 /* PLA_RXFIFO_CTRL1 */
157 #define RXFIFO_THR2_FULL        0x00000060
158 #define RXFIFO_THR2_HIGH        0x00000038
159 #define RXFIFO_THR2_OOB         0x0000004a
160 #define RXFIFO_THR2_NORMAL      0x00a0
161
162 /* PLA_RXFIFO_CTRL2 */
163 #define RXFIFO_THR3_FULL        0x00000078
164 #define RXFIFO_THR3_HIGH        0x00000048
165 #define RXFIFO_THR3_OOB         0x0000005a
166 #define RXFIFO_THR3_NORMAL      0x0110
167
168 /* PLA_TXFIFO_CTRL */
169 #define TXFIFO_THR_NORMAL       0x00400008
170 #define TXFIFO_THR_NORMAL2      0x01000008
171
172 /* PLA_FMC */
173 #define FMC_FCR_MCU_EN          0x0001
174
175 /* PLA_EEEP_CR */
176 #define EEEP_CR_EEEP_TX         0x0002
177
178 /* PLA_WDT6_CTRL */
179 #define WDT6_SET_MODE           0x0010
180
181 /* PLA_TCR0 */
182 #define TCR0_TX_EMPTY           0x0800
183 #define TCR0_AUTO_FIFO          0x0080
184
185 /* PLA_TCR1 */
186 #define VERSION_MASK            0x7cf0
187
188 /* PLA_MTPS */
189 #define MTPS_JUMBO              (12 * 1024 / 64)
190 #define MTPS_DEFAULT            (6 * 1024 / 64)
191
192 /* PLA_RSTTALLY */
193 #define TALLY_RESET             0x0001
194
195 /* PLA_CR */
196 #define CR_RST                  0x10
197 #define CR_RE                   0x08
198 #define CR_TE                   0x04
199
200 /* PLA_CRWECR */
201 #define CRWECR_NORAML           0x00
202 #define CRWECR_CONFIG           0xc0
203
204 /* PLA_OOB_CTRL */
205 #define NOW_IS_OOB              0x80
206 #define TXFIFO_EMPTY            0x20
207 #define RXFIFO_EMPTY            0x10
208 #define LINK_LIST_READY         0x02
209 #define DIS_MCU_CLROOB          0x01
210 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
211
212 /* PLA_MISC_1 */
213 #define RXDY_GATED_EN           0x0008
214
215 /* PLA_SFF_STS_7 */
216 #define RE_INIT_LL              0x8000
217 #define MCU_BORW_EN             0x4000
218
219 /* PLA_CPCR */
220 #define CPCR_RX_VLAN            0x0040
221
222 /* PLA_CFG_WOL */
223 #define MAGIC_EN                0x0001
224
225 /* PLA_TEREDO_CFG */
226 #define TEREDO_SEL              0x8000
227 #define TEREDO_WAKE_MASK        0x7f00
228 #define TEREDO_RS_EVENT_MASK    0x00fe
229 #define OOB_TEREDO_EN           0x0001
230
231 /* PAL_BDC_CR */
232 #define ALDPS_PROXY_MODE        0x0001
233
234 /* PLA_CONFIG34 */
235 #define LINK_ON_WAKE_EN         0x0010
236 #define LINK_OFF_WAKE_EN        0x0008
237
238 /* PLA_CONFIG5 */
239 #define BWF_EN                  0x0040
240 #define MWF_EN                  0x0020
241 #define UWF_EN                  0x0010
242 #define LAN_WAKE_EN             0x0002
243
244 /* PLA_LED_FEATURE */
245 #define LED_MODE_MASK           0x0700
246
247 /* PLA_PHY_PWR */
248 #define TX_10M_IDLE_EN          0x0080
249 #define PFM_PWM_SWITCH          0x0040
250
251 /* PLA_MAC_PWR_CTRL */
252 #define D3_CLK_GATED_EN         0x00004000
253 #define MCU_CLK_RATIO           0x07010f07
254 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
255 #define ALDPS_SPDWN_RATIO       0x0f87
256
257 /* PLA_MAC_PWR_CTRL2 */
258 #define EEE_SPDWN_RATIO         0x8007
259
260 /* PLA_MAC_PWR_CTRL3 */
261 #define PKT_AVAIL_SPDWN_EN      0x0100
262 #define SUSPEND_SPDWN_EN        0x0004
263 #define U1U2_SPDWN_EN           0x0002
264 #define L1_SPDWN_EN             0x0001
265
266 /* PLA_MAC_PWR_CTRL4 */
267 #define PWRSAVE_SPDWN_EN        0x1000
268 #define RXDV_SPDWN_EN           0x0800
269 #define TX10MIDLE_EN            0x0100
270 #define TP100_SPDWN_EN          0x0020
271 #define TP500_SPDWN_EN          0x0010
272 #define TP1000_SPDWN_EN         0x0008
273 #define EEE_SPDWN_EN            0x0001
274
275 /* PLA_GPHY_INTR_IMR */
276 #define GPHY_STS_MSK            0x0001
277 #define SPEED_DOWN_MSK          0x0002
278 #define SPDWN_RXDV_MSK          0x0004
279 #define SPDWN_LINKCHG_MSK       0x0008
280
281 /* PLA_PHYAR */
282 #define PHYAR_FLAG              0x80000000
283
284 /* PLA_EEE_CR */
285 #define EEE_RX_EN               0x0001
286 #define EEE_TX_EN               0x0002
287
288 /* PLA_BOOT_CTRL */
289 #define AUTOLOAD_DONE           0x0002
290
291 /* USB_DEV_STAT */
292 #define STAT_SPEED_MASK         0x0006
293 #define STAT_SPEED_HIGH         0x0000
294 #define STAT_SPEED_FULL         0x0002
295
296 /* USB_TX_AGG */
297 #define TX_AGG_MAX_THRESHOLD    0x03
298
299 /* USB_RX_BUF_TH */
300 #define RX_THR_SUPPER           0x0c350180
301 #define RX_THR_HIGH             0x7a120180
302 #define RX_THR_SLOW             0xffff0180
303
304 /* USB_TX_DMA */
305 #define TEST_MODE_DISABLE       0x00000001
306 #define TX_SIZE_ADJUST1         0x00000100
307
308 /* USB_UPS_CTRL */
309 #define POWER_CUT               0x0100
310
311 /* USB_PM_CTRL_STATUS */
312 #define RESUME_INDICATE         0x0001
313
314 /* USB_USB_CTRL */
315 #define RX_AGG_DISABLE          0x0010
316
317 /* USB_U2P3_CTRL */
318 #define U2P3_ENABLE             0x0001
319
320 /* USB_POWER_CUT */
321 #define PWR_EN                  0x0001
322 #define PHASE2_EN               0x0008
323
324 /* USB_MISC_0 */
325 #define PCUT_STATUS             0x0001
326
327 /* USB_RX_EARLY_AGG */
328 #define EARLY_AGG_SUPPER        0x0e832981
329 #define EARLY_AGG_HIGH          0x0e837a12
330 #define EARLY_AGG_SLOW          0x0e83ffff
331
332 /* USB_WDT11_CTRL */
333 #define TIMER11_EN              0x0001
334
335 /* USB_LPM_CTRL */
336 #define LPM_TIMER_MASK          0x0c
337 #define LPM_TIMER_500MS         0x04    /* 500 ms */
338 #define LPM_TIMER_500US         0x0c    /* 500 us */
339
340 /* USB_AFE_CTRL2 */
341 #define SEN_VAL_MASK            0xf800
342 #define SEN_VAL_NORMAL          0xa000
343 #define SEL_RXIDLE              0x0100
344
345 /* OCP_ALDPS_CONFIG */
346 #define ENPWRSAVE               0x8000
347 #define ENPDNPS                 0x0200
348 #define LINKENA                 0x0100
349 #define DIS_SDSAVE              0x0010
350
351 /* OCP_PHY_STATUS */
352 #define PHY_STAT_MASK           0x0007
353 #define PHY_STAT_LAN_ON         3
354 #define PHY_STAT_PWRDN          5
355
356 /* OCP_POWER_CFG */
357 #define EEE_CLKDIV_EN           0x8000
358 #define EN_ALDPS                0x0004
359 #define EN_10M_PLLOFF           0x0001
360
361 /* OCP_EEE_CONFIG1 */
362 #define RG_TXLPI_MSK_HFDUP      0x8000
363 #define RG_MATCLR_EN            0x4000
364 #define EEE_10_CAP              0x2000
365 #define EEE_NWAY_EN             0x1000
366 #define TX_QUIET_EN             0x0200
367 #define RX_QUIET_EN             0x0100
368 #define sd_rise_time_mask       0x0070
369 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
370 #define RG_RXLPI_MSK_HFDUP      0x0008
371 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
372
373 /* OCP_EEE_CONFIG2 */
374 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
375 #define RG_DACQUIET_EN          0x0400
376 #define RG_LDVQUIET_EN          0x0200
377 #define RG_CKRSEL               0x0020
378 #define RG_EEEPRG_EN            0x0010
379
380 /* OCP_EEE_CONFIG3 */
381 #define fast_snr_mask           0xff80
382 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
383 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
384 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
385
386 /* OCP_EEE_AR */
387 /* bit[15:14] function */
388 #define FUN_ADDR                0x0000
389 #define FUN_DATA                0x4000
390 /* bit[4:0] device addr */
391
392 /* OCP_EEE_CFG */
393 #define CTAP_SHORT_EN           0x0040
394 #define EEE10_EN                0x0010
395
396 /* OCP_DOWN_SPEED */
397 #define EN_10M_BGOFF            0x0080
398
399 /* OCP_ADC_CFG */
400 #define CKADSEL_L               0x0100
401 #define ADC_EN                  0x0080
402 #define EN_EMI_L                0x0040
403
404 /* SRAM_LPF_CFG */
405 #define LPF_AUTO_TUNE           0x8000
406
407 /* SRAM_10M_AMP1 */
408 #define GDAC_IB_UPALL           0x0008
409
410 /* SRAM_10M_AMP2 */
411 #define AMP_DN                  0x0200
412
413 /* SRAM_IMPEDANCE */
414 #define RX_DRIVING_MASK         0x6000
415
416 enum rtl_register_content {
417         _1000bps        = 0x10,
418         _100bps         = 0x08,
419         _10bps          = 0x04,
420         LINK_STATUS     = 0x02,
421         FULL_DUP        = 0x01,
422 };
423
424 #define RTL8152_MAX_TX          4
425 #define RTL8152_MAX_RX          10
426 #define INTBUFSIZE              2
427 #define CRC_SIZE                4
428 #define TX_ALIGN                4
429 #define RX_ALIGN                8
430
431 #define INTR_LINK               0x0004
432
433 #define RTL8152_REQT_READ       0xc0
434 #define RTL8152_REQT_WRITE      0x40
435 #define RTL8152_REQ_GET_REGS    0x05
436 #define RTL8152_REQ_SET_REGS    0x05
437
438 #define BYTE_EN_DWORD           0xff
439 #define BYTE_EN_WORD            0x33
440 #define BYTE_EN_BYTE            0x11
441 #define BYTE_EN_SIX_BYTES       0x3f
442 #define BYTE_EN_START_MASK      0x0f
443 #define BYTE_EN_END_MASK        0xf0
444
445 #define RTL8153_MAX_PACKET      9216 /* 9K */
446 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
447 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
448 #define RTL8153_RMS             RTL8153_MAX_PACKET
449 #define RTL8152_TX_TIMEOUT      (5 * HZ)
450
451 /* rtl8152 flags */
452 enum rtl8152_flags {
453         RTL8152_UNPLUG = 0,
454         RTL8152_SET_RX_MODE,
455         WORK_ENABLE,
456         RTL8152_LINK_CHG,
457         SELECTIVE_SUSPEND,
458         PHY_RESET,
459         SCHEDULE_TASKLET,
460 };
461
462 /* Define these values to match your device */
463 #define VENDOR_ID_REALTEK               0x0bda
464 #define VENDOR_ID_SAMSUNG               0x04e8
465
466 #define MCU_TYPE_PLA                    0x0100
467 #define MCU_TYPE_USB                    0x0000
468
469 #define REALTEK_USB_DEVICE(vend, prod)  \
470         USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
471
472 struct tally_counter {
473         __le64  tx_packets;
474         __le64  rx_packets;
475         __le64  tx_errors;
476         __le32  rx_errors;
477         __le16  rx_missed;
478         __le16  align_errors;
479         __le32  tx_one_collision;
480         __le32  tx_multi_collision;
481         __le64  rx_unicast;
482         __le64  rx_broadcast;
483         __le32  rx_multicast;
484         __le16  tx_aborted;
485         __le16  tx_underrun;
486 };
487
488 struct rx_desc {
489         __le32 opts1;
490 #define RX_LEN_MASK                     0x7fff
491
492         __le32 opts2;
493 #define RD_UDP_CS                       (1 << 23)
494 #define RD_TCP_CS                       (1 << 22)
495 #define RD_IPV6_CS                      (1 << 20)
496 #define RD_IPV4_CS                      (1 << 19)
497
498         __le32 opts3;
499 #define IPF                             (1 << 23) /* IP checksum fail */
500 #define UDPF                            (1 << 22) /* UDP checksum fail */
501 #define TCPF                            (1 << 21) /* TCP checksum fail */
502 #define RX_VLAN_TAG                     (1 << 16)
503
504         __le32 opts4;
505         __le32 opts5;
506         __le32 opts6;
507 };
508
509 struct tx_desc {
510         __le32 opts1;
511 #define TX_FS                   (1 << 31) /* First segment of a packet */
512 #define TX_LS                   (1 << 30) /* Final segment of a packet */
513 #define GTSENDV4                (1 << 28)
514 #define GTSENDV6                (1 << 27)
515 #define GTTCPHO_SHIFT           18
516 #define GTTCPHO_MAX             0x7fU
517 #define TX_LEN_MAX              0x3ffffU
518
519         __le32 opts2;
520 #define UDP_CS                  (1 << 31) /* Calculate UDP/IP checksum */
521 #define TCP_CS                  (1 << 30) /* Calculate TCP/IP checksum */
522 #define IPV4_CS                 (1 << 29) /* Calculate IPv4 checksum */
523 #define IPV6_CS                 (1 << 28) /* Calculate IPv6 checksum */
524 #define MSS_SHIFT               17
525 #define MSS_MAX                 0x7ffU
526 #define TCPHO_SHIFT             17
527 #define TCPHO_MAX               0x7ffU
528 #define TX_VLAN_TAG                     (1 << 16)
529 };
530
531 struct r8152;
532
533 struct rx_agg {
534         struct list_head list;
535         struct urb *urb;
536         struct r8152 *context;
537         void *buffer;
538         void *head;
539 };
540
541 struct tx_agg {
542         struct list_head list;
543         struct urb *urb;
544         struct r8152 *context;
545         void *buffer;
546         void *head;
547         u32 skb_num;
548         u32 skb_len;
549 };
550
551 struct r8152 {
552         unsigned long flags;
553         struct usb_device *udev;
554         struct tasklet_struct tl;
555         struct usb_interface *intf;
556         struct net_device *netdev;
557         struct urb *intr_urb;
558         struct tx_agg tx_info[RTL8152_MAX_TX];
559         struct rx_agg rx_info[RTL8152_MAX_RX];
560         struct list_head rx_done, tx_free;
561         struct sk_buff_head tx_queue;
562         spinlock_t rx_lock, tx_lock;
563         struct delayed_work schedule;
564         struct mii_if_info mii;
565         struct mutex control;   /* use for hw setting */
566
567         struct rtl_ops {
568                 void (*init)(struct r8152 *);
569                 int (*enable)(struct r8152 *);
570                 void (*disable)(struct r8152 *);
571                 void (*up)(struct r8152 *);
572                 void (*down)(struct r8152 *);
573                 void (*unload)(struct r8152 *);
574                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
575                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
576         } rtl_ops;
577
578         int intr_interval;
579         u32 saved_wolopts;
580         u32 msg_enable;
581         u32 tx_qlen;
582         u16 ocp_base;
583         u8 *intr_buff;
584         u8 version;
585         u8 speed;
586 };
587
588 enum rtl_version {
589         RTL_VER_UNKNOWN = 0,
590         RTL_VER_01,
591         RTL_VER_02,
592         RTL_VER_03,
593         RTL_VER_04,
594         RTL_VER_05,
595         RTL_VER_MAX
596 };
597
598 enum tx_csum_stat {
599         TX_CSUM_SUCCESS = 0,
600         TX_CSUM_TSO,
601         TX_CSUM_NONE
602 };
603
604 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
605  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
606  */
607 static const int multicast_filter_limit = 32;
608 static unsigned int agg_buf_sz = 16384;
609
610 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
611                                  VLAN_ETH_HLEN - VLAN_HLEN)
612
613 static
614 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
615 {
616         int ret;
617         void *tmp;
618
619         tmp = kmalloc(size, GFP_KERNEL);
620         if (!tmp)
621                 return -ENOMEM;
622
623         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
624                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
625                               value, index, tmp, size, 500);
626
627         memcpy(data, tmp, size);
628         kfree(tmp);
629
630         return ret;
631 }
632
633 static
634 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
635 {
636         int ret;
637         void *tmp;
638
639         tmp = kmemdup(data, size, GFP_KERNEL);
640         if (!tmp)
641                 return -ENOMEM;
642
643         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
644                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
645                               value, index, tmp, size, 500);
646
647         kfree(tmp);
648
649         return ret;
650 }
651
652 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
653                             void *data, u16 type)
654 {
655         u16 limit = 64;
656         int ret = 0;
657
658         if (test_bit(RTL8152_UNPLUG, &tp->flags))
659                 return -ENODEV;
660
661         /* both size and indix must be 4 bytes align */
662         if ((size & 3) || !size || (index & 3) || !data)
663                 return -EPERM;
664
665         if ((u32)index + (u32)size > 0xffff)
666                 return -EPERM;
667
668         while (size) {
669                 if (size > limit) {
670                         ret = get_registers(tp, index, type, limit, data);
671                         if (ret < 0)
672                                 break;
673
674                         index += limit;
675                         data += limit;
676                         size -= limit;
677                 } else {
678                         ret = get_registers(tp, index, type, size, data);
679                         if (ret < 0)
680                                 break;
681
682                         index += size;
683                         data += size;
684                         size = 0;
685                         break;
686                 }
687         }
688
689         if (ret == -ENODEV)
690                 set_bit(RTL8152_UNPLUG, &tp->flags);
691
692         return ret;
693 }
694
695 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
696                              u16 size, void *data, u16 type)
697 {
698         int ret;
699         u16 byteen_start, byteen_end, byen;
700         u16 limit = 512;
701
702         if (test_bit(RTL8152_UNPLUG, &tp->flags))
703                 return -ENODEV;
704
705         /* both size and indix must be 4 bytes align */
706         if ((size & 3) || !size || (index & 3) || !data)
707                 return -EPERM;
708
709         if ((u32)index + (u32)size > 0xffff)
710                 return -EPERM;
711
712         byteen_start = byteen & BYTE_EN_START_MASK;
713         byteen_end = byteen & BYTE_EN_END_MASK;
714
715         byen = byteen_start | (byteen_start << 4);
716         ret = set_registers(tp, index, type | byen, 4, data);
717         if (ret < 0)
718                 goto error1;
719
720         index += 4;
721         data += 4;
722         size -= 4;
723
724         if (size) {
725                 size -= 4;
726
727                 while (size) {
728                         if (size > limit) {
729                                 ret = set_registers(tp, index,
730                                                     type | BYTE_EN_DWORD,
731                                                     limit, data);
732                                 if (ret < 0)
733                                         goto error1;
734
735                                 index += limit;
736                                 data += limit;
737                                 size -= limit;
738                         } else {
739                                 ret = set_registers(tp, index,
740                                                     type | BYTE_EN_DWORD,
741                                                     size, data);
742                                 if (ret < 0)
743                                         goto error1;
744
745                                 index += size;
746                                 data += size;
747                                 size = 0;
748                                 break;
749                         }
750                 }
751
752                 byen = byteen_end | (byteen_end >> 4);
753                 ret = set_registers(tp, index, type | byen, 4, data);
754                 if (ret < 0)
755                         goto error1;
756         }
757
758 error1:
759         if (ret == -ENODEV)
760                 set_bit(RTL8152_UNPLUG, &tp->flags);
761
762         return ret;
763 }
764
765 static inline
766 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
767 {
768         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
769 }
770
771 static inline
772 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
773 {
774         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
775 }
776
777 static inline
778 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
779 {
780         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
781 }
782
783 static inline
784 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
785 {
786         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
787 }
788
789 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
790 {
791         __le32 data;
792
793         generic_ocp_read(tp, index, sizeof(data), &data, type);
794
795         return __le32_to_cpu(data);
796 }
797
798 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
799 {
800         __le32 tmp = __cpu_to_le32(data);
801
802         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
803 }
804
805 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
806 {
807         u32 data;
808         __le32 tmp;
809         u8 shift = index & 2;
810
811         index &= ~3;
812
813         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
814
815         data = __le32_to_cpu(tmp);
816         data >>= (shift * 8);
817         data &= 0xffff;
818
819         return (u16)data;
820 }
821
822 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
823 {
824         u32 mask = 0xffff;
825         __le32 tmp;
826         u16 byen = BYTE_EN_WORD;
827         u8 shift = index & 2;
828
829         data &= mask;
830
831         if (index & 2) {
832                 byen <<= shift;
833                 mask <<= (shift * 8);
834                 data <<= (shift * 8);
835                 index &= ~3;
836         }
837
838         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
839
840         data |= __le32_to_cpu(tmp) & ~mask;
841         tmp = __cpu_to_le32(data);
842
843         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
844 }
845
846 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
847 {
848         u32 data;
849         __le32 tmp;
850         u8 shift = index & 3;
851
852         index &= ~3;
853
854         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
855
856         data = __le32_to_cpu(tmp);
857         data >>= (shift * 8);
858         data &= 0xff;
859
860         return (u8)data;
861 }
862
863 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
864 {
865         u32 mask = 0xff;
866         __le32 tmp;
867         u16 byen = BYTE_EN_BYTE;
868         u8 shift = index & 3;
869
870         data &= mask;
871
872         if (index & 3) {
873                 byen <<= shift;
874                 mask <<= (shift * 8);
875                 data <<= (shift * 8);
876                 index &= ~3;
877         }
878
879         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
880
881         data |= __le32_to_cpu(tmp) & ~mask;
882         tmp = __cpu_to_le32(data);
883
884         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
885 }
886
887 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
888 {
889         u16 ocp_base, ocp_index;
890
891         ocp_base = addr & 0xf000;
892         if (ocp_base != tp->ocp_base) {
893                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
894                 tp->ocp_base = ocp_base;
895         }
896
897         ocp_index = (addr & 0x0fff) | 0xb000;
898         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
899 }
900
901 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
902 {
903         u16 ocp_base, ocp_index;
904
905         ocp_base = addr & 0xf000;
906         if (ocp_base != tp->ocp_base) {
907                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
908                 tp->ocp_base = ocp_base;
909         }
910
911         ocp_index = (addr & 0x0fff) | 0xb000;
912         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
913 }
914
915 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
916 {
917         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
918 }
919
920 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
921 {
922         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
923 }
924
925 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
926 {
927         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
928         ocp_reg_write(tp, OCP_SRAM_DATA, data);
929 }
930
931 static u16 sram_read(struct r8152 *tp, u16 addr)
932 {
933         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
934         return ocp_reg_read(tp, OCP_SRAM_DATA);
935 }
936
937 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
938 {
939         struct r8152 *tp = netdev_priv(netdev);
940         int ret;
941
942         if (test_bit(RTL8152_UNPLUG, &tp->flags))
943                 return -ENODEV;
944
945         if (phy_id != R8152_PHY_ID)
946                 return -EINVAL;
947
948         ret = r8152_mdio_read(tp, reg);
949
950         return ret;
951 }
952
953 static
954 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
955 {
956         struct r8152 *tp = netdev_priv(netdev);
957
958         if (test_bit(RTL8152_UNPLUG, &tp->flags))
959                 return;
960
961         if (phy_id != R8152_PHY_ID)
962                 return;
963
964         r8152_mdio_write(tp, reg, val);
965 }
966
967 static int
968 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
969
970 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
971 {
972         struct r8152 *tp = netdev_priv(netdev);
973         struct sockaddr *addr = p;
974         int ret = -EADDRNOTAVAIL;
975
976         if (!is_valid_ether_addr(addr->sa_data))
977                 goto out1;
978
979         ret = usb_autopm_get_interface(tp->intf);
980         if (ret < 0)
981                 goto out1;
982
983         mutex_lock(&tp->control);
984
985         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
986
987         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
988         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
989         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
990
991         mutex_unlock(&tp->control);
992
993         usb_autopm_put_interface(tp->intf);
994 out1:
995         return ret;
996 }
997
998 static int set_ethernet_addr(struct r8152 *tp)
999 {
1000         struct net_device *dev = tp->netdev;
1001         struct sockaddr sa;
1002         int ret;
1003
1004         if (tp->version == RTL_VER_01)
1005                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1006         else
1007                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1008
1009         if (ret < 0) {
1010                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1011         } else if (!is_valid_ether_addr(sa.sa_data)) {
1012                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1013                           sa.sa_data);
1014                 eth_hw_addr_random(dev);
1015                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1016                 ret = rtl8152_set_mac_address(dev, &sa);
1017                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1018                            sa.sa_data);
1019         } else {
1020                 if (tp->version == RTL_VER_01)
1021                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1022                 else
1023                         ret = rtl8152_set_mac_address(dev, &sa);
1024         }
1025
1026         return ret;
1027 }
1028
1029 static void read_bulk_callback(struct urb *urb)
1030 {
1031         struct net_device *netdev;
1032         int status = urb->status;
1033         struct rx_agg *agg;
1034         struct r8152 *tp;
1035
1036         agg = urb->context;
1037         if (!agg)
1038                 return;
1039
1040         tp = agg->context;
1041         if (!tp)
1042                 return;
1043
1044         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1045                 return;
1046
1047         if (!test_bit(WORK_ENABLE, &tp->flags))
1048                 return;
1049
1050         netdev = tp->netdev;
1051
1052         /* When link down, the driver would cancel all bulks. */
1053         /* This avoid the re-submitting bulk */
1054         if (!netif_carrier_ok(netdev))
1055                 return;
1056
1057         usb_mark_last_busy(tp->udev);
1058
1059         switch (status) {
1060         case 0:
1061                 if (urb->actual_length < ETH_ZLEN)
1062                         break;
1063
1064                 spin_lock(&tp->rx_lock);
1065                 list_add_tail(&agg->list, &tp->rx_done);
1066                 spin_unlock(&tp->rx_lock);
1067                 tasklet_schedule(&tp->tl);
1068                 return;
1069         case -ESHUTDOWN:
1070                 set_bit(RTL8152_UNPLUG, &tp->flags);
1071                 netif_device_detach(tp->netdev);
1072                 return;
1073         case -ENOENT:
1074                 return; /* the urb is in unlink state */
1075         case -ETIME:
1076                 if (net_ratelimit())
1077                         netdev_warn(netdev, "maybe reset is needed?\n");
1078                 break;
1079         default:
1080                 if (net_ratelimit())
1081                         netdev_warn(netdev, "Rx status %d\n", status);
1082                 break;
1083         }
1084
1085         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1086 }
1087
1088 static void write_bulk_callback(struct urb *urb)
1089 {
1090         struct net_device_stats *stats;
1091         struct net_device *netdev;
1092         struct tx_agg *agg;
1093         struct r8152 *tp;
1094         int status = urb->status;
1095
1096         agg = urb->context;
1097         if (!agg)
1098                 return;
1099
1100         tp = agg->context;
1101         if (!tp)
1102                 return;
1103
1104         netdev = tp->netdev;
1105         stats = &netdev->stats;
1106         if (status) {
1107                 if (net_ratelimit())
1108                         netdev_warn(netdev, "Tx status %d\n", status);
1109                 stats->tx_errors += agg->skb_num;
1110         } else {
1111                 stats->tx_packets += agg->skb_num;
1112                 stats->tx_bytes += agg->skb_len;
1113         }
1114
1115         spin_lock(&tp->tx_lock);
1116         list_add_tail(&agg->list, &tp->tx_free);
1117         spin_unlock(&tp->tx_lock);
1118
1119         usb_autopm_put_interface_async(tp->intf);
1120
1121         if (!netif_carrier_ok(netdev))
1122                 return;
1123
1124         if (!test_bit(WORK_ENABLE, &tp->flags))
1125                 return;
1126
1127         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1128                 return;
1129
1130         if (!skb_queue_empty(&tp->tx_queue))
1131                 tasklet_schedule(&tp->tl);
1132 }
1133
1134 static void intr_callback(struct urb *urb)
1135 {
1136         struct r8152 *tp;
1137         __le16 *d;
1138         int status = urb->status;
1139         int res;
1140
1141         tp = urb->context;
1142         if (!tp)
1143                 return;
1144
1145         if (!test_bit(WORK_ENABLE, &tp->flags))
1146                 return;
1147
1148         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1149                 return;
1150
1151         switch (status) {
1152         case 0:                 /* success */
1153                 break;
1154         case -ECONNRESET:       /* unlink */
1155         case -ESHUTDOWN:
1156                 netif_device_detach(tp->netdev);
1157         case -ENOENT:
1158         case -EPROTO:
1159                 netif_info(tp, intr, tp->netdev,
1160                            "Stop submitting intr, status %d\n", status);
1161                 return;
1162         case -EOVERFLOW:
1163                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1164                 goto resubmit;
1165         /* -EPIPE:  should clear the halt */
1166         default:
1167                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1168                 goto resubmit;
1169         }
1170
1171         d = urb->transfer_buffer;
1172         if (INTR_LINK & __le16_to_cpu(d[0])) {
1173                 if (!(tp->speed & LINK_STATUS)) {
1174                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1175                         schedule_delayed_work(&tp->schedule, 0);
1176                 }
1177         } else {
1178                 if (tp->speed & LINK_STATUS) {
1179                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1180                         schedule_delayed_work(&tp->schedule, 0);
1181                 }
1182         }
1183
1184 resubmit:
1185         res = usb_submit_urb(urb, GFP_ATOMIC);
1186         if (res == -ENODEV) {
1187                 set_bit(RTL8152_UNPLUG, &tp->flags);
1188                 netif_device_detach(tp->netdev);
1189         } else if (res) {
1190                 netif_err(tp, intr, tp->netdev,
1191                           "can't resubmit intr, status %d\n", res);
1192         }
1193 }
1194
1195 static inline void *rx_agg_align(void *data)
1196 {
1197         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1198 }
1199
1200 static inline void *tx_agg_align(void *data)
1201 {
1202         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1203 }
1204
1205 static void free_all_mem(struct r8152 *tp)
1206 {
1207         int i;
1208
1209         for (i = 0; i < RTL8152_MAX_RX; i++) {
1210                 usb_free_urb(tp->rx_info[i].urb);
1211                 tp->rx_info[i].urb = NULL;
1212
1213                 kfree(tp->rx_info[i].buffer);
1214                 tp->rx_info[i].buffer = NULL;
1215                 tp->rx_info[i].head = NULL;
1216         }
1217
1218         for (i = 0; i < RTL8152_MAX_TX; i++) {
1219                 usb_free_urb(tp->tx_info[i].urb);
1220                 tp->tx_info[i].urb = NULL;
1221
1222                 kfree(tp->tx_info[i].buffer);
1223                 tp->tx_info[i].buffer = NULL;
1224                 tp->tx_info[i].head = NULL;
1225         }
1226
1227         usb_free_urb(tp->intr_urb);
1228         tp->intr_urb = NULL;
1229
1230         kfree(tp->intr_buff);
1231         tp->intr_buff = NULL;
1232 }
1233
1234 static int alloc_all_mem(struct r8152 *tp)
1235 {
1236         struct net_device *netdev = tp->netdev;
1237         struct usb_interface *intf = tp->intf;
1238         struct usb_host_interface *alt = intf->cur_altsetting;
1239         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1240         struct urb *urb;
1241         int node, i;
1242         u8 *buf;
1243
1244         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1245
1246         spin_lock_init(&tp->rx_lock);
1247         spin_lock_init(&tp->tx_lock);
1248         INIT_LIST_HEAD(&tp->tx_free);
1249         skb_queue_head_init(&tp->tx_queue);
1250
1251         for (i = 0; i < RTL8152_MAX_RX; i++) {
1252                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1253                 if (!buf)
1254                         goto err1;
1255
1256                 if (buf != rx_agg_align(buf)) {
1257                         kfree(buf);
1258                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1259                                            node);
1260                         if (!buf)
1261                                 goto err1;
1262                 }
1263
1264                 urb = usb_alloc_urb(0, GFP_KERNEL);
1265                 if (!urb) {
1266                         kfree(buf);
1267                         goto err1;
1268                 }
1269
1270                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1271                 tp->rx_info[i].context = tp;
1272                 tp->rx_info[i].urb = urb;
1273                 tp->rx_info[i].buffer = buf;
1274                 tp->rx_info[i].head = rx_agg_align(buf);
1275         }
1276
1277         for (i = 0; i < RTL8152_MAX_TX; i++) {
1278                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1279                 if (!buf)
1280                         goto err1;
1281
1282                 if (buf != tx_agg_align(buf)) {
1283                         kfree(buf);
1284                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1285                                            node);
1286                         if (!buf)
1287                                 goto err1;
1288                 }
1289
1290                 urb = usb_alloc_urb(0, GFP_KERNEL);
1291                 if (!urb) {
1292                         kfree(buf);
1293                         goto err1;
1294                 }
1295
1296                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1297                 tp->tx_info[i].context = tp;
1298                 tp->tx_info[i].urb = urb;
1299                 tp->tx_info[i].buffer = buf;
1300                 tp->tx_info[i].head = tx_agg_align(buf);
1301
1302                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1303         }
1304
1305         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1306         if (!tp->intr_urb)
1307                 goto err1;
1308
1309         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1310         if (!tp->intr_buff)
1311                 goto err1;
1312
1313         tp->intr_interval = (int)ep_intr->desc.bInterval;
1314         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1315                          tp->intr_buff, INTBUFSIZE, intr_callback,
1316                          tp, tp->intr_interval);
1317
1318         return 0;
1319
1320 err1:
1321         free_all_mem(tp);
1322         return -ENOMEM;
1323 }
1324
1325 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1326 {
1327         struct tx_agg *agg = NULL;
1328         unsigned long flags;
1329
1330         if (list_empty(&tp->tx_free))
1331                 return NULL;
1332
1333         spin_lock_irqsave(&tp->tx_lock, flags);
1334         if (!list_empty(&tp->tx_free)) {
1335                 struct list_head *cursor;
1336
1337                 cursor = tp->tx_free.next;
1338                 list_del_init(cursor);
1339                 agg = list_entry(cursor, struct tx_agg, list);
1340         }
1341         spin_unlock_irqrestore(&tp->tx_lock, flags);
1342
1343         return agg;
1344 }
1345
1346 static inline __be16 get_protocol(struct sk_buff *skb)
1347 {
1348         __be16 protocol;
1349
1350         if (skb->protocol == htons(ETH_P_8021Q))
1351                 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1352         else
1353                 protocol = skb->protocol;
1354
1355         return protocol;
1356 }
1357
1358 /* r8152_csum_workaround()
1359  * The hw limites the value the transport offset. When the offset is out of the
1360  * range, calculate the checksum by sw.
1361  */
1362 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1363                                   struct sk_buff_head *list)
1364 {
1365         if (skb_shinfo(skb)->gso_size) {
1366                 netdev_features_t features = tp->netdev->features;
1367                 struct sk_buff_head seg_list;
1368                 struct sk_buff *segs, *nskb;
1369
1370                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1371                 segs = skb_gso_segment(skb, features);
1372                 if (IS_ERR(segs) || !segs)
1373                         goto drop;
1374
1375                 __skb_queue_head_init(&seg_list);
1376
1377                 do {
1378                         nskb = segs;
1379                         segs = segs->next;
1380                         nskb->next = NULL;
1381                         __skb_queue_tail(&seg_list, nskb);
1382                 } while (segs);
1383
1384                 skb_queue_splice(&seg_list, list);
1385                 dev_kfree_skb(skb);
1386         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1387                 if (skb_checksum_help(skb) < 0)
1388                         goto drop;
1389
1390                 __skb_queue_head(list, skb);
1391         } else {
1392                 struct net_device_stats *stats;
1393
1394 drop:
1395                 stats = &tp->netdev->stats;
1396                 stats->tx_dropped++;
1397                 dev_kfree_skb(skb);
1398         }
1399 }
1400
1401 /* msdn_giant_send_check()
1402  * According to the document of microsoft, the TCP Pseudo Header excludes the
1403  * packet length for IPv6 TCP large packets.
1404  */
1405 static int msdn_giant_send_check(struct sk_buff *skb)
1406 {
1407         const struct ipv6hdr *ipv6h;
1408         struct tcphdr *th;
1409         int ret;
1410
1411         ret = skb_cow_head(skb, 0);
1412         if (ret)
1413                 return ret;
1414
1415         ipv6h = ipv6_hdr(skb);
1416         th = tcp_hdr(skb);
1417
1418         th->check = 0;
1419         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1420
1421         return ret;
1422 }
1423
1424 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1425 {
1426         if (vlan_tx_tag_present(skb)) {
1427                 u32 opts2;
1428
1429                 opts2 = TX_VLAN_TAG | swab16(vlan_tx_tag_get(skb));
1430                 desc->opts2 |= cpu_to_le32(opts2);
1431         }
1432 }
1433
1434 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1435 {
1436         u32 opts2 = le32_to_cpu(desc->opts2);
1437
1438         if (opts2 & RX_VLAN_TAG)
1439                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1440                                        swab16(opts2 & 0xffff));
1441 }
1442
1443 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1444                          struct sk_buff *skb, u32 len, u32 transport_offset)
1445 {
1446         u32 mss = skb_shinfo(skb)->gso_size;
1447         u32 opts1, opts2 = 0;
1448         int ret = TX_CSUM_SUCCESS;
1449
1450         WARN_ON_ONCE(len > TX_LEN_MAX);
1451
1452         opts1 = len | TX_FS | TX_LS;
1453
1454         if (mss) {
1455                 if (transport_offset > GTTCPHO_MAX) {
1456                         netif_warn(tp, tx_err, tp->netdev,
1457                                    "Invalid transport offset 0x%x for TSO\n",
1458                                    transport_offset);
1459                         ret = TX_CSUM_TSO;
1460                         goto unavailable;
1461                 }
1462
1463                 switch (get_protocol(skb)) {
1464                 case htons(ETH_P_IP):
1465                         opts1 |= GTSENDV4;
1466                         break;
1467
1468                 case htons(ETH_P_IPV6):
1469                         if (msdn_giant_send_check(skb)) {
1470                                 ret = TX_CSUM_TSO;
1471                                 goto unavailable;
1472                         }
1473                         opts1 |= GTSENDV6;
1474                         break;
1475
1476                 default:
1477                         WARN_ON_ONCE(1);
1478                         break;
1479                 }
1480
1481                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1482                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1483         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1484                 u8 ip_protocol;
1485
1486                 if (transport_offset > TCPHO_MAX) {
1487                         netif_warn(tp, tx_err, tp->netdev,
1488                                    "Invalid transport offset 0x%x\n",
1489                                    transport_offset);
1490                         ret = TX_CSUM_NONE;
1491                         goto unavailable;
1492                 }
1493
1494                 switch (get_protocol(skb)) {
1495                 case htons(ETH_P_IP):
1496                         opts2 |= IPV4_CS;
1497                         ip_protocol = ip_hdr(skb)->protocol;
1498                         break;
1499
1500                 case htons(ETH_P_IPV6):
1501                         opts2 |= IPV6_CS;
1502                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1503                         break;
1504
1505                 default:
1506                         ip_protocol = IPPROTO_RAW;
1507                         break;
1508                 }
1509
1510                 if (ip_protocol == IPPROTO_TCP)
1511                         opts2 |= TCP_CS;
1512                 else if (ip_protocol == IPPROTO_UDP)
1513                         opts2 |= UDP_CS;
1514                 else
1515                         WARN_ON_ONCE(1);
1516
1517                 opts2 |= transport_offset << TCPHO_SHIFT;
1518         }
1519
1520         desc->opts2 = cpu_to_le32(opts2);
1521         desc->opts1 = cpu_to_le32(opts1);
1522
1523 unavailable:
1524         return ret;
1525 }
1526
1527 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1528 {
1529         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1530         int remain, ret;
1531         u8 *tx_data;
1532
1533         __skb_queue_head_init(&skb_head);
1534         spin_lock(&tx_queue->lock);
1535         skb_queue_splice_init(tx_queue, &skb_head);
1536         spin_unlock(&tx_queue->lock);
1537
1538         tx_data = agg->head;
1539         agg->skb_num = 0;
1540         agg->skb_len = 0;
1541         remain = agg_buf_sz;
1542
1543         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1544                 struct tx_desc *tx_desc;
1545                 struct sk_buff *skb;
1546                 unsigned int len;
1547                 u32 offset;
1548
1549                 skb = __skb_dequeue(&skb_head);
1550                 if (!skb)
1551                         break;
1552
1553                 len = skb->len + sizeof(*tx_desc);
1554
1555                 if (len > remain) {
1556                         __skb_queue_head(&skb_head, skb);
1557                         break;
1558                 }
1559
1560                 tx_data = tx_agg_align(tx_data);
1561                 tx_desc = (struct tx_desc *)tx_data;
1562
1563                 offset = (u32)skb_transport_offset(skb);
1564
1565                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1566                         r8152_csum_workaround(tp, skb, &skb_head);
1567                         continue;
1568                 }
1569
1570                 rtl_tx_vlan_tag(tx_desc, skb);
1571
1572                 tx_data += sizeof(*tx_desc);
1573
1574                 len = skb->len;
1575                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1576                         struct net_device_stats *stats = &tp->netdev->stats;
1577
1578                         stats->tx_dropped++;
1579                         dev_kfree_skb_any(skb);
1580                         tx_data -= sizeof(*tx_desc);
1581                         continue;
1582                 }
1583
1584                 tx_data += len;
1585                 agg->skb_len += len;
1586                 agg->skb_num++;
1587
1588                 dev_kfree_skb_any(skb);
1589
1590                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1591         }
1592
1593         if (!skb_queue_empty(&skb_head)) {
1594                 spin_lock(&tx_queue->lock);
1595                 skb_queue_splice(&skb_head, tx_queue);
1596                 spin_unlock(&tx_queue->lock);
1597         }
1598
1599         netif_tx_lock(tp->netdev);
1600
1601         if (netif_queue_stopped(tp->netdev) &&
1602             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1603                 netif_wake_queue(tp->netdev);
1604
1605         netif_tx_unlock(tp->netdev);
1606
1607         ret = usb_autopm_get_interface_async(tp->intf);
1608         if (ret < 0)
1609                 goto out_tx_fill;
1610
1611         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1612                           agg->head, (int)(tx_data - (u8 *)agg->head),
1613                           (usb_complete_t)write_bulk_callback, agg);
1614
1615         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1616         if (ret < 0)
1617                 usb_autopm_put_interface_async(tp->intf);
1618
1619 out_tx_fill:
1620         return ret;
1621 }
1622
1623 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1624 {
1625         u8 checksum = CHECKSUM_NONE;
1626         u32 opts2, opts3;
1627
1628         if (tp->version == RTL_VER_01)
1629                 goto return_result;
1630
1631         opts2 = le32_to_cpu(rx_desc->opts2);
1632         opts3 = le32_to_cpu(rx_desc->opts3);
1633
1634         if (opts2 & RD_IPV4_CS) {
1635                 if (opts3 & IPF)
1636                         checksum = CHECKSUM_NONE;
1637                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1638                         checksum = CHECKSUM_NONE;
1639                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1640                         checksum = CHECKSUM_NONE;
1641                 else
1642                         checksum = CHECKSUM_UNNECESSARY;
1643         } else if (RD_IPV6_CS) {
1644                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1645                         checksum = CHECKSUM_UNNECESSARY;
1646                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1647                         checksum = CHECKSUM_UNNECESSARY;
1648         }
1649
1650 return_result:
1651         return checksum;
1652 }
1653
1654 static void rx_bottom(struct r8152 *tp)
1655 {
1656         unsigned long flags;
1657         struct list_head *cursor, *next, rx_queue;
1658
1659         if (list_empty(&tp->rx_done))
1660                 return;
1661
1662         INIT_LIST_HEAD(&rx_queue);
1663         spin_lock_irqsave(&tp->rx_lock, flags);
1664         list_splice_init(&tp->rx_done, &rx_queue);
1665         spin_unlock_irqrestore(&tp->rx_lock, flags);
1666
1667         list_for_each_safe(cursor, next, &rx_queue) {
1668                 struct rx_desc *rx_desc;
1669                 struct rx_agg *agg;
1670                 int len_used = 0;
1671                 struct urb *urb;
1672                 u8 *rx_data;
1673
1674                 list_del_init(cursor);
1675
1676                 agg = list_entry(cursor, struct rx_agg, list);
1677                 urb = agg->urb;
1678                 if (urb->actual_length < ETH_ZLEN)
1679                         goto submit;
1680
1681                 rx_desc = agg->head;
1682                 rx_data = agg->head;
1683                 len_used += sizeof(struct rx_desc);
1684
1685                 while (urb->actual_length > len_used) {
1686                         struct net_device *netdev = tp->netdev;
1687                         struct net_device_stats *stats = &netdev->stats;
1688                         unsigned int pkt_len;
1689                         struct sk_buff *skb;
1690
1691                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1692                         if (pkt_len < ETH_ZLEN)
1693                                 break;
1694
1695                         len_used += pkt_len;
1696                         if (urb->actual_length < len_used)
1697                                 break;
1698
1699                         pkt_len -= CRC_SIZE;
1700                         rx_data += sizeof(struct rx_desc);
1701
1702                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1703                         if (!skb) {
1704                                 stats->rx_dropped++;
1705                                 goto find_next_rx;
1706                         }
1707
1708                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1709                         memcpy(skb->data, rx_data, pkt_len);
1710                         skb_put(skb, pkt_len);
1711                         skb->protocol = eth_type_trans(skb, netdev);
1712                         rtl_rx_vlan_tag(rx_desc, skb);
1713                         netif_receive_skb(skb);
1714                         stats->rx_packets++;
1715                         stats->rx_bytes += pkt_len;
1716
1717 find_next_rx:
1718                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1719                         rx_desc = (struct rx_desc *)rx_data;
1720                         len_used = (int)(rx_data - (u8 *)agg->head);
1721                         len_used += sizeof(struct rx_desc);
1722                 }
1723
1724 submit:
1725                 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1726         }
1727 }
1728
1729 static void tx_bottom(struct r8152 *tp)
1730 {
1731         int res;
1732
1733         do {
1734                 struct tx_agg *agg;
1735
1736                 if (skb_queue_empty(&tp->tx_queue))
1737                         break;
1738
1739                 agg = r8152_get_tx_agg(tp);
1740                 if (!agg)
1741                         break;
1742
1743                 res = r8152_tx_agg_fill(tp, agg);
1744                 if (res) {
1745                         struct net_device *netdev = tp->netdev;
1746
1747                         if (res == -ENODEV) {
1748                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1749                                 netif_device_detach(netdev);
1750                         } else {
1751                                 struct net_device_stats *stats = &netdev->stats;
1752                                 unsigned long flags;
1753
1754                                 netif_warn(tp, tx_err, netdev,
1755                                            "failed tx_urb %d\n", res);
1756                                 stats->tx_dropped += agg->skb_num;
1757
1758                                 spin_lock_irqsave(&tp->tx_lock, flags);
1759                                 list_add_tail(&agg->list, &tp->tx_free);
1760                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1761                         }
1762                 }
1763         } while (res == 0);
1764 }
1765
1766 static void bottom_half(unsigned long data)
1767 {
1768         struct r8152 *tp;
1769
1770         tp = (struct r8152 *)data;
1771
1772         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1773                 return;
1774
1775         if (!test_bit(WORK_ENABLE, &tp->flags))
1776                 return;
1777
1778         /* When link down, the driver would cancel all bulks. */
1779         /* This avoid the re-submitting bulk */
1780         if (!netif_carrier_ok(tp->netdev))
1781                 return;
1782
1783         clear_bit(SCHEDULE_TASKLET, &tp->flags);
1784
1785         rx_bottom(tp);
1786         tx_bottom(tp);
1787 }
1788
1789 static
1790 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1791 {
1792         int ret;
1793
1794         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1795                           agg->head, agg_buf_sz,
1796                           (usb_complete_t)read_bulk_callback, agg);
1797
1798         ret = usb_submit_urb(agg->urb, mem_flags);
1799         if (ret == -ENODEV) {
1800                 set_bit(RTL8152_UNPLUG, &tp->flags);
1801                 netif_device_detach(tp->netdev);
1802         } else if (ret) {
1803                 struct urb *urb = agg->urb;
1804                 unsigned long flags;
1805
1806                 urb->actual_length = 0;
1807                 spin_lock_irqsave(&tp->rx_lock, flags);
1808                 list_add_tail(&agg->list, &tp->rx_done);
1809                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1810                 tasklet_schedule(&tp->tl);
1811         }
1812
1813         return ret;
1814 }
1815
1816 static void rtl_drop_queued_tx(struct r8152 *tp)
1817 {
1818         struct net_device_stats *stats = &tp->netdev->stats;
1819         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1820         struct sk_buff *skb;
1821
1822         if (skb_queue_empty(tx_queue))
1823                 return;
1824
1825         __skb_queue_head_init(&skb_head);
1826         spin_lock_bh(&tx_queue->lock);
1827         skb_queue_splice_init(tx_queue, &skb_head);
1828         spin_unlock_bh(&tx_queue->lock);
1829
1830         while ((skb = __skb_dequeue(&skb_head))) {
1831                 dev_kfree_skb(skb);
1832                 stats->tx_dropped++;
1833         }
1834 }
1835
1836 static void rtl8152_tx_timeout(struct net_device *netdev)
1837 {
1838         struct r8152 *tp = netdev_priv(netdev);
1839         int i;
1840
1841         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1842         for (i = 0; i < RTL8152_MAX_TX; i++)
1843                 usb_unlink_urb(tp->tx_info[i].urb);
1844 }
1845
1846 static void rtl8152_set_rx_mode(struct net_device *netdev)
1847 {
1848         struct r8152 *tp = netdev_priv(netdev);
1849
1850         if (tp->speed & LINK_STATUS) {
1851                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1852                 schedule_delayed_work(&tp->schedule, 0);
1853         }
1854 }
1855
1856 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1857 {
1858         struct r8152 *tp = netdev_priv(netdev);
1859         u32 mc_filter[2];       /* Multicast hash filter */
1860         __le32 tmp[2];
1861         u32 ocp_data;
1862
1863         clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1864         netif_stop_queue(netdev);
1865         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1866         ocp_data &= ~RCR_ACPT_ALL;
1867         ocp_data |= RCR_AB | RCR_APM;
1868
1869         if (netdev->flags & IFF_PROMISC) {
1870                 /* Unconditionally log net taps. */
1871                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1872                 ocp_data |= RCR_AM | RCR_AAP;
1873                 mc_filter[1] = 0xffffffff;
1874                 mc_filter[0] = 0xffffffff;
1875         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1876                    (netdev->flags & IFF_ALLMULTI)) {
1877                 /* Too many to filter perfectly -- accept all multicasts. */
1878                 ocp_data |= RCR_AM;
1879                 mc_filter[1] = 0xffffffff;
1880                 mc_filter[0] = 0xffffffff;
1881         } else {
1882                 struct netdev_hw_addr *ha;
1883
1884                 mc_filter[1] = 0;
1885                 mc_filter[0] = 0;
1886                 netdev_for_each_mc_addr(ha, netdev) {
1887                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1888
1889                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1890                         ocp_data |= RCR_AM;
1891                 }
1892         }
1893
1894         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1895         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1896
1897         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1898         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1899         netif_wake_queue(netdev);
1900 }
1901
1902 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1903                                       struct net_device *netdev)
1904 {
1905         struct r8152 *tp = netdev_priv(netdev);
1906
1907         skb_tx_timestamp(skb);
1908
1909         skb_queue_tail(&tp->tx_queue, skb);
1910
1911         if (!list_empty(&tp->tx_free)) {
1912                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1913                         set_bit(SCHEDULE_TASKLET, &tp->flags);
1914                         schedule_delayed_work(&tp->schedule, 0);
1915                 } else {
1916                         usb_mark_last_busy(tp->udev);
1917                         tasklet_schedule(&tp->tl);
1918                 }
1919         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1920                 netif_stop_queue(netdev);
1921         }
1922
1923         return NETDEV_TX_OK;
1924 }
1925
1926 static void r8152b_reset_packet_filter(struct r8152 *tp)
1927 {
1928         u32     ocp_data;
1929
1930         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1931         ocp_data &= ~FMC_FCR_MCU_EN;
1932         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1933         ocp_data |= FMC_FCR_MCU_EN;
1934         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1935 }
1936
1937 static void rtl8152_nic_reset(struct r8152 *tp)
1938 {
1939         int     i;
1940
1941         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1942
1943         for (i = 0; i < 1000; i++) {
1944                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1945                         break;
1946                 usleep_range(100, 400);
1947         }
1948 }
1949
1950 static void set_tx_qlen(struct r8152 *tp)
1951 {
1952         struct net_device *netdev = tp->netdev;
1953
1954         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1955                                     sizeof(struct tx_desc));
1956 }
1957
1958 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1959 {
1960         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1961 }
1962
1963 static void rtl_set_eee_plus(struct r8152 *tp)
1964 {
1965         u32 ocp_data;
1966         u8 speed;
1967
1968         speed = rtl8152_get_speed(tp);
1969         if (speed & _10bps) {
1970                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1971                 ocp_data |= EEEP_CR_EEEP_TX;
1972                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1973         } else {
1974                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1975                 ocp_data &= ~EEEP_CR_EEEP_TX;
1976                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1977         }
1978 }
1979
1980 static void rxdy_gated_en(struct r8152 *tp, bool enable)
1981 {
1982         u32 ocp_data;
1983
1984         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1985         if (enable)
1986                 ocp_data |= RXDY_GATED_EN;
1987         else
1988                 ocp_data &= ~RXDY_GATED_EN;
1989         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1990 }
1991
1992 static int rtl_start_rx(struct r8152 *tp)
1993 {
1994         int i, ret = 0;
1995
1996         INIT_LIST_HEAD(&tp->rx_done);
1997         for (i = 0; i < RTL8152_MAX_RX; i++) {
1998                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1999                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2000                 if (ret)
2001                         break;
2002         }
2003
2004         if (ret && ++i < RTL8152_MAX_RX) {
2005                 struct list_head rx_queue;
2006                 unsigned long flags;
2007
2008                 INIT_LIST_HEAD(&rx_queue);
2009
2010                 do {
2011                         struct rx_agg *agg = &tp->rx_info[i++];
2012                         struct urb *urb = agg->urb;
2013
2014                         urb->actual_length = 0;
2015                         list_add_tail(&agg->list, &rx_queue);
2016                 } while (i < RTL8152_MAX_RX);
2017
2018                 spin_lock_irqsave(&tp->rx_lock, flags);
2019                 list_splice_tail(&rx_queue, &tp->rx_done);
2020                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2021         }
2022
2023         return ret;
2024 }
2025
2026 static int rtl_stop_rx(struct r8152 *tp)
2027 {
2028         int i;
2029
2030         for (i = 0; i < RTL8152_MAX_RX; i++)
2031                 usb_kill_urb(tp->rx_info[i].urb);
2032
2033         return 0;
2034 }
2035
2036 static int rtl_enable(struct r8152 *tp)
2037 {
2038         u32 ocp_data;
2039
2040         r8152b_reset_packet_filter(tp);
2041
2042         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2043         ocp_data |= CR_RE | CR_TE;
2044         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2045
2046         rxdy_gated_en(tp, false);
2047
2048         return rtl_start_rx(tp);
2049 }
2050
2051 static int rtl8152_enable(struct r8152 *tp)
2052 {
2053         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2054                 return -ENODEV;
2055
2056         set_tx_qlen(tp);
2057         rtl_set_eee_plus(tp);
2058
2059         return rtl_enable(tp);
2060 }
2061
2062 static void r8153_set_rx_agg(struct r8152 *tp)
2063 {
2064         u8 speed;
2065
2066         speed = rtl8152_get_speed(tp);
2067         if (speed & _1000bps) {
2068                 if (tp->udev->speed == USB_SPEED_SUPER) {
2069                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2070                                         RX_THR_SUPPER);
2071                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2072                                         EARLY_AGG_SUPPER);
2073                 } else {
2074                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2075                                         RX_THR_HIGH);
2076                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2077                                         EARLY_AGG_HIGH);
2078                 }
2079         } else {
2080                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2081                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2082                                 EARLY_AGG_SLOW);
2083         }
2084 }
2085
2086 static int rtl8153_enable(struct r8152 *tp)
2087 {
2088         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2089                 return -ENODEV;
2090
2091         set_tx_qlen(tp);
2092         rtl_set_eee_plus(tp);
2093         r8153_set_rx_agg(tp);
2094
2095         return rtl_enable(tp);
2096 }
2097
2098 static void rtl_disable(struct r8152 *tp)
2099 {
2100         u32 ocp_data;
2101         int i;
2102
2103         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2104                 rtl_drop_queued_tx(tp);
2105                 return;
2106         }
2107
2108         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2109         ocp_data &= ~RCR_ACPT_ALL;
2110         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2111
2112         rtl_drop_queued_tx(tp);
2113
2114         for (i = 0; i < RTL8152_MAX_TX; i++)
2115                 usb_kill_urb(tp->tx_info[i].urb);
2116
2117         rxdy_gated_en(tp, true);
2118
2119         for (i = 0; i < 1000; i++) {
2120                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2121                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2122                         break;
2123                 usleep_range(1000, 2000);
2124         }
2125
2126         for (i = 0; i < 1000; i++) {
2127                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2128                         break;
2129                 usleep_range(1000, 2000);
2130         }
2131
2132         rtl_stop_rx(tp);
2133
2134         rtl8152_nic_reset(tp);
2135 }
2136
2137 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2138 {
2139         u32 ocp_data;
2140
2141         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2142         if (enable)
2143                 ocp_data |= POWER_CUT;
2144         else
2145                 ocp_data &= ~POWER_CUT;
2146         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2147
2148         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2149         ocp_data &= ~RESUME_INDICATE;
2150         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2151 }
2152
2153 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2154 {
2155         u32 ocp_data;
2156
2157         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2158         if (enable)
2159                 ocp_data |= CPCR_RX_VLAN;
2160         else
2161                 ocp_data &= ~CPCR_RX_VLAN;
2162         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2163 }
2164
2165 static int rtl8152_set_features(struct net_device *dev,
2166                                 netdev_features_t features)
2167 {
2168         netdev_features_t changed = features ^ dev->features;
2169         struct r8152 *tp = netdev_priv(dev);
2170         int ret;
2171
2172         ret = usb_autopm_get_interface(tp->intf);
2173         if (ret < 0)
2174                 goto out;
2175
2176         mutex_lock(&tp->control);
2177
2178         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2179                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2180                         rtl_rx_vlan_en(tp, true);
2181                 else
2182                         rtl_rx_vlan_en(tp, false);
2183         }
2184
2185         mutex_unlock(&tp->control);
2186
2187         usb_autopm_put_interface(tp->intf);
2188
2189 out:
2190         return ret;
2191 }
2192
2193 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2194
2195 static u32 __rtl_get_wol(struct r8152 *tp)
2196 {
2197         u32 ocp_data;
2198         u32 wolopts = 0;
2199
2200         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2201         if (!(ocp_data & LAN_WAKE_EN))
2202                 return 0;
2203
2204         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2205         if (ocp_data & LINK_ON_WAKE_EN)
2206                 wolopts |= WAKE_PHY;
2207
2208         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2209         if (ocp_data & UWF_EN)
2210                 wolopts |= WAKE_UCAST;
2211         if (ocp_data & BWF_EN)
2212                 wolopts |= WAKE_BCAST;
2213         if (ocp_data & MWF_EN)
2214                 wolopts |= WAKE_MCAST;
2215
2216         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2217         if (ocp_data & MAGIC_EN)
2218                 wolopts |= WAKE_MAGIC;
2219
2220         return wolopts;
2221 }
2222
2223 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2224 {
2225         u32 ocp_data;
2226
2227         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2228
2229         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2230         ocp_data &= ~LINK_ON_WAKE_EN;
2231         if (wolopts & WAKE_PHY)
2232                 ocp_data |= LINK_ON_WAKE_EN;
2233         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2234
2235         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2236         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2237         if (wolopts & WAKE_UCAST)
2238                 ocp_data |= UWF_EN;
2239         if (wolopts & WAKE_BCAST)
2240                 ocp_data |= BWF_EN;
2241         if (wolopts & WAKE_MCAST)
2242                 ocp_data |= MWF_EN;
2243         if (wolopts & WAKE_ANY)
2244                 ocp_data |= LAN_WAKE_EN;
2245         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2246
2247         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2248
2249         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2250         ocp_data &= ~MAGIC_EN;
2251         if (wolopts & WAKE_MAGIC)
2252                 ocp_data |= MAGIC_EN;
2253         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2254
2255         if (wolopts & WAKE_ANY)
2256                 device_set_wakeup_enable(&tp->udev->dev, true);
2257         else
2258                 device_set_wakeup_enable(&tp->udev->dev, false);
2259 }
2260
2261 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2262 {
2263         if (enable) {
2264                 u32 ocp_data;
2265
2266                 __rtl_set_wol(tp, WAKE_ANY);
2267
2268                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2269
2270                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2271                 ocp_data |= LINK_OFF_WAKE_EN;
2272                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2273
2274                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2275         } else {
2276                 __rtl_set_wol(tp, tp->saved_wolopts);
2277         }
2278 }
2279
2280 static void rtl_phy_reset(struct r8152 *tp)
2281 {
2282         u16 data;
2283         int i;
2284
2285         clear_bit(PHY_RESET, &tp->flags);
2286
2287         data = r8152_mdio_read(tp, MII_BMCR);
2288
2289         /* don't reset again before the previous one complete */
2290         if (data & BMCR_RESET)
2291                 return;
2292
2293         data |= BMCR_RESET;
2294         r8152_mdio_write(tp, MII_BMCR, data);
2295
2296         for (i = 0; i < 50; i++) {
2297                 msleep(20);
2298                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2299                         break;
2300         }
2301 }
2302
2303 static void r8153_teredo_off(struct r8152 *tp)
2304 {
2305         u32 ocp_data;
2306
2307         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2308         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2309         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2310
2311         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2312         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2313         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2314 }
2315
2316 static void r8152b_disable_aldps(struct r8152 *tp)
2317 {
2318         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2319         msleep(20);
2320 }
2321
2322 static inline void r8152b_enable_aldps(struct r8152 *tp)
2323 {
2324         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2325                                             LINKENA | DIS_SDSAVE);
2326 }
2327
2328 static void rtl8152_disable(struct r8152 *tp)
2329 {
2330         r8152b_disable_aldps(tp);
2331         rtl_disable(tp);
2332         r8152b_enable_aldps(tp);
2333 }
2334
2335 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2336 {
2337         u16 data;
2338
2339         data = r8152_mdio_read(tp, MII_BMCR);
2340         if (data & BMCR_PDOWN) {
2341                 data &= ~BMCR_PDOWN;
2342                 r8152_mdio_write(tp, MII_BMCR, data);
2343         }
2344
2345         set_bit(PHY_RESET, &tp->flags);
2346 }
2347
2348 static void r8152b_exit_oob(struct r8152 *tp)
2349 {
2350         u32 ocp_data;
2351         int i;
2352
2353         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2354         ocp_data &= ~RCR_ACPT_ALL;
2355         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2356
2357         rxdy_gated_en(tp, true);
2358         r8153_teredo_off(tp);
2359         r8152b_hw_phy_cfg(tp);
2360
2361         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2362         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2363
2364         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2365         ocp_data &= ~NOW_IS_OOB;
2366         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2367
2368         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2369         ocp_data &= ~MCU_BORW_EN;
2370         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2371
2372         for (i = 0; i < 1000; i++) {
2373                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2374                 if (ocp_data & LINK_LIST_READY)
2375                         break;
2376                 usleep_range(1000, 2000);
2377         }
2378
2379         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2380         ocp_data |= RE_INIT_LL;
2381         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2382
2383         for (i = 0; i < 1000; i++) {
2384                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2385                 if (ocp_data & LINK_LIST_READY)
2386                         break;
2387                 usleep_range(1000, 2000);
2388         }
2389
2390         rtl8152_nic_reset(tp);
2391
2392         /* rx share fifo credit full threshold */
2393         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2394
2395         if (tp->udev->speed == USB_SPEED_FULL ||
2396             tp->udev->speed == USB_SPEED_LOW) {
2397                 /* rx share fifo credit near full threshold */
2398                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2399                                 RXFIFO_THR2_FULL);
2400                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2401                                 RXFIFO_THR3_FULL);
2402         } else {
2403                 /* rx share fifo credit near full threshold */
2404                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2405                                 RXFIFO_THR2_HIGH);
2406                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2407                                 RXFIFO_THR3_HIGH);
2408         }
2409
2410         /* TX share fifo free credit full threshold */
2411         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2412
2413         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2414         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2415         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2416                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2417
2418         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2419
2420         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2421
2422         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2423         ocp_data |= TCR0_AUTO_FIFO;
2424         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2425 }
2426
2427 static void r8152b_enter_oob(struct r8152 *tp)
2428 {
2429         u32 ocp_data;
2430         int i;
2431
2432         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2433         ocp_data &= ~NOW_IS_OOB;
2434         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2435
2436         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2437         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2438         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2439
2440         rtl_disable(tp);
2441
2442         for (i = 0; i < 1000; i++) {
2443                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2444                 if (ocp_data & LINK_LIST_READY)
2445                         break;
2446                 usleep_range(1000, 2000);
2447         }
2448
2449         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2450         ocp_data |= RE_INIT_LL;
2451         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2452
2453         for (i = 0; i < 1000; i++) {
2454                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2455                 if (ocp_data & LINK_LIST_READY)
2456                         break;
2457                 usleep_range(1000, 2000);
2458         }
2459
2460         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2461
2462         rtl_rx_vlan_en(tp, true);
2463
2464         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2465         ocp_data |= ALDPS_PROXY_MODE;
2466         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2467
2468         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2469         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2470         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2471
2472         rxdy_gated_en(tp, false);
2473
2474         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2475         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2476         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2477 }
2478
2479 static void r8153_hw_phy_cfg(struct r8152 *tp)
2480 {
2481         u32 ocp_data;
2482         u16 data;
2483
2484         ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2485         data = r8152_mdio_read(tp, MII_BMCR);
2486         if (data & BMCR_PDOWN) {
2487                 data &= ~BMCR_PDOWN;
2488                 r8152_mdio_write(tp, MII_BMCR, data);
2489         }
2490
2491         if (tp->version == RTL_VER_03) {
2492                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2493                 data &= ~CTAP_SHORT_EN;
2494                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2495         }
2496
2497         data = ocp_reg_read(tp, OCP_POWER_CFG);
2498         data |= EEE_CLKDIV_EN;
2499         ocp_reg_write(tp, OCP_POWER_CFG, data);
2500
2501         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2502         data |= EN_10M_BGOFF;
2503         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2504         data = ocp_reg_read(tp, OCP_POWER_CFG);
2505         data |= EN_10M_PLLOFF;
2506         ocp_reg_write(tp, OCP_POWER_CFG, data);
2507         data = sram_read(tp, SRAM_IMPEDANCE);
2508         data &= ~RX_DRIVING_MASK;
2509         sram_write(tp, SRAM_IMPEDANCE, data);
2510
2511         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2512         ocp_data |= PFM_PWM_SWITCH;
2513         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2514
2515         data = sram_read(tp, SRAM_LPF_CFG);
2516         data |= LPF_AUTO_TUNE;
2517         sram_write(tp, SRAM_LPF_CFG, data);
2518
2519         data = sram_read(tp, SRAM_10M_AMP1);
2520         data |= GDAC_IB_UPALL;
2521         sram_write(tp, SRAM_10M_AMP1, data);
2522         data = sram_read(tp, SRAM_10M_AMP2);
2523         data |= AMP_DN;
2524         sram_write(tp, SRAM_10M_AMP2, data);
2525
2526         set_bit(PHY_RESET, &tp->flags);
2527 }
2528
2529 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2530 {
2531         u8 u1u2[8];
2532
2533         if (enable)
2534                 memset(u1u2, 0xff, sizeof(u1u2));
2535         else
2536                 memset(u1u2, 0x00, sizeof(u1u2));
2537
2538         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2539 }
2540
2541 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2542 {
2543         u32 ocp_data;
2544
2545         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2546         if (enable)
2547                 ocp_data |= U2P3_ENABLE;
2548         else
2549                 ocp_data &= ~U2P3_ENABLE;
2550         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2551 }
2552
2553 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2554 {
2555         u32 ocp_data;
2556
2557         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2558         if (enable)
2559                 ocp_data |= PWR_EN | PHASE2_EN;
2560         else
2561                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2562         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2563
2564         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2565         ocp_data &= ~PCUT_STATUS;
2566         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2567 }
2568
2569 static void r8153_first_init(struct r8152 *tp)
2570 {
2571         u32 ocp_data;
2572         int i;
2573
2574         rxdy_gated_en(tp, true);
2575         r8153_teredo_off(tp);
2576
2577         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2578         ocp_data &= ~RCR_ACPT_ALL;
2579         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2580
2581         r8153_hw_phy_cfg(tp);
2582
2583         rtl8152_nic_reset(tp);
2584
2585         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2586         ocp_data &= ~NOW_IS_OOB;
2587         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2588
2589         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2590         ocp_data &= ~MCU_BORW_EN;
2591         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2592
2593         for (i = 0; i < 1000; i++) {
2594                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2595                 if (ocp_data & LINK_LIST_READY)
2596                         break;
2597                 usleep_range(1000, 2000);
2598         }
2599
2600         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2601         ocp_data |= RE_INIT_LL;
2602         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2603
2604         for (i = 0; i < 1000; i++) {
2605                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2606                 if (ocp_data & LINK_LIST_READY)
2607                         break;
2608                 usleep_range(1000, 2000);
2609         }
2610
2611         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2612
2613         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2614         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2615
2616         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2617         ocp_data |= TCR0_AUTO_FIFO;
2618         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2619
2620         rtl8152_nic_reset(tp);
2621
2622         /* rx share fifo credit full threshold */
2623         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2624         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2625         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2626         /* TX share fifo free credit full threshold */
2627         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2628
2629         /* rx aggregation */
2630         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2631         ocp_data &= ~RX_AGG_DISABLE;
2632         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2633 }
2634
2635 static void r8153_enter_oob(struct r8152 *tp)
2636 {
2637         u32 ocp_data;
2638         int i;
2639
2640         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2641         ocp_data &= ~NOW_IS_OOB;
2642         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2643
2644         rtl_disable(tp);
2645
2646         for (i = 0; i < 1000; i++) {
2647                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2648                 if (ocp_data & LINK_LIST_READY)
2649                         break;
2650                 usleep_range(1000, 2000);
2651         }
2652
2653         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2654         ocp_data |= RE_INIT_LL;
2655         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2656
2657         for (i = 0; i < 1000; i++) {
2658                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2659                 if (ocp_data & LINK_LIST_READY)
2660                         break;
2661                 usleep_range(1000, 2000);
2662         }
2663
2664         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2665
2666         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2667         ocp_data &= ~TEREDO_WAKE_MASK;
2668         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2669
2670         rtl_rx_vlan_en(tp, true);
2671
2672         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2673         ocp_data |= ALDPS_PROXY_MODE;
2674         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2675
2676         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2677         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2678         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2679
2680         rxdy_gated_en(tp, false);
2681
2682         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2683         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2684         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2685 }
2686
2687 static void r8153_disable_aldps(struct r8152 *tp)
2688 {
2689         u16 data;
2690
2691         data = ocp_reg_read(tp, OCP_POWER_CFG);
2692         data &= ~EN_ALDPS;
2693         ocp_reg_write(tp, OCP_POWER_CFG, data);
2694         msleep(20);
2695 }
2696
2697 static void r8153_enable_aldps(struct r8152 *tp)
2698 {
2699         u16 data;
2700
2701         data = ocp_reg_read(tp, OCP_POWER_CFG);
2702         data |= EN_ALDPS;
2703         ocp_reg_write(tp, OCP_POWER_CFG, data);
2704 }
2705
2706 static void rtl8153_disable(struct r8152 *tp)
2707 {
2708         r8153_disable_aldps(tp);
2709         rtl_disable(tp);
2710         r8153_enable_aldps(tp);
2711 }
2712
2713 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2714 {
2715         u16 bmcr, anar, gbcr;
2716         int ret = 0;
2717
2718         cancel_delayed_work_sync(&tp->schedule);
2719         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2720         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2721                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2722         if (tp->mii.supports_gmii) {
2723                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2724                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2725         } else {
2726                 gbcr = 0;
2727         }
2728
2729         if (autoneg == AUTONEG_DISABLE) {
2730                 if (speed == SPEED_10) {
2731                         bmcr = 0;
2732                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2733                 } else if (speed == SPEED_100) {
2734                         bmcr = BMCR_SPEED100;
2735                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2736                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2737                         bmcr = BMCR_SPEED1000;
2738                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2739                 } else {
2740                         ret = -EINVAL;
2741                         goto out;
2742                 }
2743
2744                 if (duplex == DUPLEX_FULL)
2745                         bmcr |= BMCR_FULLDPLX;
2746         } else {
2747                 if (speed == SPEED_10) {
2748                         if (duplex == DUPLEX_FULL)
2749                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2750                         else
2751                                 anar |= ADVERTISE_10HALF;
2752                 } else if (speed == SPEED_100) {
2753                         if (duplex == DUPLEX_FULL) {
2754                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2755                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2756                         } else {
2757                                 anar |= ADVERTISE_10HALF;
2758                                 anar |= ADVERTISE_100HALF;
2759                         }
2760                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2761                         if (duplex == DUPLEX_FULL) {
2762                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2763                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2764                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2765                         } else {
2766                                 anar |= ADVERTISE_10HALF;
2767                                 anar |= ADVERTISE_100HALF;
2768                                 gbcr |= ADVERTISE_1000HALF;
2769                         }
2770                 } else {
2771                         ret = -EINVAL;
2772                         goto out;
2773                 }
2774
2775                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2776         }
2777
2778         if (test_bit(PHY_RESET, &tp->flags))
2779                 bmcr |= BMCR_RESET;
2780
2781         if (tp->mii.supports_gmii)
2782                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2783
2784         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2785         r8152_mdio_write(tp, MII_BMCR, bmcr);
2786
2787         if (test_bit(PHY_RESET, &tp->flags)) {
2788                 int i;
2789
2790                 clear_bit(PHY_RESET, &tp->flags);
2791                 for (i = 0; i < 50; i++) {
2792                         msleep(20);
2793                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2794                                 break;
2795                 }
2796         }
2797
2798 out:
2799
2800         return ret;
2801 }
2802
2803 static void rtl8152_up(struct r8152 *tp)
2804 {
2805         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2806                 return;
2807
2808         r8152b_disable_aldps(tp);
2809         r8152b_exit_oob(tp);
2810         r8152b_enable_aldps(tp);
2811 }
2812
2813 static void rtl8152_down(struct r8152 *tp)
2814 {
2815         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2816                 rtl_drop_queued_tx(tp);
2817                 return;
2818         }
2819
2820         r8152_power_cut_en(tp, false);
2821         r8152b_disable_aldps(tp);
2822         r8152b_enter_oob(tp);
2823         r8152b_enable_aldps(tp);
2824 }
2825
2826 static void rtl8153_up(struct r8152 *tp)
2827 {
2828         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2829                 return;
2830
2831         r8153_disable_aldps(tp);
2832         r8153_first_init(tp);
2833         r8153_enable_aldps(tp);
2834 }
2835
2836 static void rtl8153_down(struct r8152 *tp)
2837 {
2838         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2839                 rtl_drop_queued_tx(tp);
2840                 return;
2841         }
2842
2843         r8153_u1u2en(tp, false);
2844         r8153_power_cut_en(tp, false);
2845         r8153_disable_aldps(tp);
2846         r8153_enter_oob(tp);
2847         r8153_enable_aldps(tp);
2848 }
2849
2850 static void set_carrier(struct r8152 *tp)
2851 {
2852         struct net_device *netdev = tp->netdev;
2853         u8 speed;
2854
2855         clear_bit(RTL8152_LINK_CHG, &tp->flags);
2856         speed = rtl8152_get_speed(tp);
2857
2858         if (speed & LINK_STATUS) {
2859                 if (!(tp->speed & LINK_STATUS)) {
2860                         tp->rtl_ops.enable(tp);
2861                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2862                         netif_carrier_on(netdev);
2863                 }
2864         } else {
2865                 if (tp->speed & LINK_STATUS) {
2866                         netif_carrier_off(netdev);
2867                         tasklet_disable(&tp->tl);
2868                         tp->rtl_ops.disable(tp);
2869                         tasklet_enable(&tp->tl);
2870                 }
2871         }
2872         tp->speed = speed;
2873 }
2874
2875 static void rtl_work_func_t(struct work_struct *work)
2876 {
2877         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2878
2879         /* If the device is unplugged or !netif_running(), the workqueue
2880          * doesn't need to wake the device, and could return directly.
2881          */
2882         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
2883                 return;
2884
2885         if (usb_autopm_get_interface(tp->intf) < 0)
2886                 return;
2887
2888         if (!test_bit(WORK_ENABLE, &tp->flags))
2889                 goto out1;
2890
2891         if (!mutex_trylock(&tp->control)) {
2892                 schedule_delayed_work(&tp->schedule, 0);
2893                 goto out1;
2894         }
2895
2896         if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2897                 set_carrier(tp);
2898
2899         if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2900                 _rtl8152_set_rx_mode(tp->netdev);
2901
2902         if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2903             (tp->speed & LINK_STATUS)) {
2904                 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2905                 tasklet_schedule(&tp->tl);
2906         }
2907
2908         if (test_bit(PHY_RESET, &tp->flags))
2909                 rtl_phy_reset(tp);
2910
2911         mutex_unlock(&tp->control);
2912
2913 out1:
2914         usb_autopm_put_interface(tp->intf);
2915 }
2916
2917 static int rtl8152_open(struct net_device *netdev)
2918 {
2919         struct r8152 *tp = netdev_priv(netdev);
2920         int res = 0;
2921
2922         res = alloc_all_mem(tp);
2923         if (res)
2924                 goto out;
2925
2926         /* set speed to 0 to avoid autoresume try to submit rx */
2927         tp->speed = 0;
2928
2929         res = usb_autopm_get_interface(tp->intf);
2930         if (res < 0) {
2931                 free_all_mem(tp);
2932                 goto out;
2933         }
2934
2935         mutex_lock(&tp->control);
2936
2937         /* The WORK_ENABLE may be set when autoresume occurs */
2938         if (test_bit(WORK_ENABLE, &tp->flags)) {
2939                 clear_bit(WORK_ENABLE, &tp->flags);
2940                 usb_kill_urb(tp->intr_urb);
2941                 cancel_delayed_work_sync(&tp->schedule);
2942
2943                 /* disable the tx/rx, if the workqueue has enabled them. */
2944                 if (tp->speed & LINK_STATUS)
2945                         tp->rtl_ops.disable(tp);
2946         }
2947
2948         tp->rtl_ops.up(tp);
2949
2950         rtl8152_set_speed(tp, AUTONEG_ENABLE,
2951                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2952                           DUPLEX_FULL);
2953         tp->speed = 0;
2954         netif_carrier_off(netdev);
2955         netif_start_queue(netdev);
2956         set_bit(WORK_ENABLE, &tp->flags);
2957
2958         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2959         if (res) {
2960                 if (res == -ENODEV)
2961                         netif_device_detach(tp->netdev);
2962                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2963                            res);
2964                 free_all_mem(tp);
2965         } else {
2966                 tasklet_enable(&tp->tl);
2967         }
2968
2969         mutex_unlock(&tp->control);
2970
2971         usb_autopm_put_interface(tp->intf);
2972
2973 out:
2974         return res;
2975 }
2976
2977 static int rtl8152_close(struct net_device *netdev)
2978 {
2979         struct r8152 *tp = netdev_priv(netdev);
2980         int res = 0;
2981
2982         tasklet_disable(&tp->tl);
2983         clear_bit(WORK_ENABLE, &tp->flags);
2984         usb_kill_urb(tp->intr_urb);
2985         cancel_delayed_work_sync(&tp->schedule);
2986         netif_stop_queue(netdev);
2987
2988         res = usb_autopm_get_interface(tp->intf);
2989         if (res < 0) {
2990                 rtl_drop_queued_tx(tp);
2991         } else {
2992                 mutex_lock(&tp->control);
2993
2994                 /* The autosuspend may have been enabled and wouldn't
2995                  * be disable when autoresume occurs, because the
2996                  * netif_running() would be false.
2997                  */
2998                 rtl_runtime_suspend_enable(tp, false);
2999
3000                 tp->rtl_ops.down(tp);
3001
3002                 mutex_unlock(&tp->control);
3003
3004                 usb_autopm_put_interface(tp->intf);
3005         }
3006
3007         free_all_mem(tp);
3008
3009         return res;
3010 }
3011
3012 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3013 {
3014         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3015         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3016         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3017 }
3018
3019 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3020 {
3021         u16 data;
3022
3023         r8152_mmd_indirect(tp, dev, reg);
3024         data = ocp_reg_read(tp, OCP_EEE_DATA);
3025         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3026
3027         return data;
3028 }
3029
3030 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3031 {
3032         r8152_mmd_indirect(tp, dev, reg);
3033         ocp_reg_write(tp, OCP_EEE_DATA, data);
3034         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3035 }
3036
3037 static void r8152_eee_en(struct r8152 *tp, bool enable)
3038 {
3039         u16 config1, config2, config3;
3040         u32 ocp_data;
3041
3042         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3043         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3044         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3045         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3046
3047         if (enable) {
3048                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3049                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3050                 config1 |= sd_rise_time(1);
3051                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3052                 config3 |= fast_snr(42);
3053         } else {
3054                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3055                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3056                              RX_QUIET_EN);
3057                 config1 |= sd_rise_time(7);
3058                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3059                 config3 |= fast_snr(511);
3060         }
3061
3062         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3063         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3064         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3065         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3066 }
3067
3068 static void r8152b_enable_eee(struct r8152 *tp)
3069 {
3070         r8152_eee_en(tp, true);
3071         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3072 }
3073
3074 static void r8153_eee_en(struct r8152 *tp, bool enable)
3075 {
3076         u32 ocp_data;
3077         u16 config;
3078
3079         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3080         config = ocp_reg_read(tp, OCP_EEE_CFG);
3081
3082         if (enable) {
3083                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3084                 config |= EEE10_EN;
3085         } else {
3086                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3087                 config &= ~EEE10_EN;
3088         }
3089
3090         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3091         ocp_reg_write(tp, OCP_EEE_CFG, config);
3092 }
3093
3094 static void r8153_enable_eee(struct r8152 *tp)
3095 {
3096         r8153_eee_en(tp, true);
3097         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3098 }
3099
3100 static void r8152b_enable_fc(struct r8152 *tp)
3101 {
3102         u16 anar;
3103
3104         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3105         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3106         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3107 }
3108
3109 static void rtl_tally_reset(struct r8152 *tp)
3110 {
3111         u32 ocp_data;
3112
3113         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3114         ocp_data |= TALLY_RESET;
3115         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3116 }
3117
3118 static void r8152b_init(struct r8152 *tp)
3119 {
3120         u32 ocp_data;
3121
3122         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3123                 return;
3124
3125         r8152b_disable_aldps(tp);
3126
3127         if (tp->version == RTL_VER_01) {
3128                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3129                 ocp_data &= ~LED_MODE_MASK;
3130                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3131         }
3132
3133         r8152_power_cut_en(tp, false);
3134
3135         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3136         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3137         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3138         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3139         ocp_data &= ~MCU_CLK_RATIO_MASK;
3140         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3141         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3142         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3143                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3144         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3145
3146         r8152b_enable_eee(tp);
3147         r8152b_enable_aldps(tp);
3148         r8152b_enable_fc(tp);
3149         rtl_tally_reset(tp);
3150
3151         /* enable rx aggregation */
3152         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3153         ocp_data &= ~RX_AGG_DISABLE;
3154         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3155 }
3156
3157 static void r8153_init(struct r8152 *tp)
3158 {
3159         u32 ocp_data;
3160         int i;
3161
3162         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3163                 return;
3164
3165         r8153_disable_aldps(tp);
3166         r8153_u1u2en(tp, false);
3167
3168         for (i = 0; i < 500; i++) {
3169                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3170                     AUTOLOAD_DONE)
3171                         break;
3172                 msleep(20);
3173         }
3174
3175         for (i = 0; i < 500; i++) {
3176                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3177                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3178                         break;
3179                 msleep(20);
3180         }
3181
3182         r8153_u2p3en(tp, false);
3183
3184         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3185         ocp_data &= ~TIMER11_EN;
3186         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3187
3188         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3189         ocp_data &= ~LED_MODE_MASK;
3190         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3191
3192         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3193         ocp_data &= ~LPM_TIMER_MASK;
3194         if (tp->udev->speed == USB_SPEED_SUPER)
3195                 ocp_data |= LPM_TIMER_500US;
3196         else
3197                 ocp_data |= LPM_TIMER_500MS;
3198         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3199
3200         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3201         ocp_data &= ~SEN_VAL_MASK;
3202         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3203         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3204
3205         r8153_power_cut_en(tp, false);
3206         r8153_u1u2en(tp, true);
3207
3208         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3209         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3210         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3211                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3212                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3213         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3214                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3215                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3216                        EEE_SPDWN_EN);
3217
3218         r8153_enable_eee(tp);
3219         r8153_enable_aldps(tp);
3220         r8152b_enable_fc(tp);
3221         rtl_tally_reset(tp);
3222 }
3223
3224 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3225 {
3226         struct r8152 *tp = usb_get_intfdata(intf);
3227         struct net_device *netdev = tp->netdev;
3228         int ret = 0;
3229
3230         mutex_lock(&tp->control);
3231
3232         if (PMSG_IS_AUTO(message)) {
3233                 if (netif_running(netdev) && work_busy(&tp->schedule.work)) {
3234                         ret = -EBUSY;
3235                         goto out1;
3236                 }
3237
3238                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3239         } else {
3240                 netif_device_detach(netdev);
3241         }
3242
3243         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3244                 clear_bit(WORK_ENABLE, &tp->flags);
3245                 usb_kill_urb(tp->intr_urb);
3246                 tasklet_disable(&tp->tl);
3247                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3248                         rtl_stop_rx(tp);
3249                         rtl_runtime_suspend_enable(tp, true);
3250                 } else {
3251                         cancel_delayed_work_sync(&tp->schedule);
3252                         tp->rtl_ops.down(tp);
3253                 }
3254                 tasklet_enable(&tp->tl);
3255         }
3256 out1:
3257         mutex_unlock(&tp->control);
3258
3259         return ret;
3260 }
3261
3262 static int rtl8152_resume(struct usb_interface *intf)
3263 {
3264         struct r8152 *tp = usb_get_intfdata(intf);
3265
3266         mutex_lock(&tp->control);
3267
3268         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3269                 tp->rtl_ops.init(tp);
3270                 netif_device_attach(tp->netdev);
3271         }
3272
3273         if (netif_running(tp->netdev)) {
3274                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3275                         rtl_runtime_suspend_enable(tp, false);
3276                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3277                         set_bit(WORK_ENABLE, &tp->flags);
3278                         if (tp->speed & LINK_STATUS)
3279                                 rtl_start_rx(tp);
3280                 } else {
3281                         tp->rtl_ops.up(tp);
3282                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3283                                           tp->mii.supports_gmii ?
3284                                           SPEED_1000 : SPEED_100,
3285                                           DUPLEX_FULL);
3286                         tp->speed = 0;
3287                         netif_carrier_off(tp->netdev);
3288                         set_bit(WORK_ENABLE, &tp->flags);
3289                 }
3290                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3291         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3292                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3293         }
3294
3295         mutex_unlock(&tp->control);
3296
3297         return 0;
3298 }
3299
3300 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3301 {
3302         struct r8152 *tp = netdev_priv(dev);
3303
3304         if (usb_autopm_get_interface(tp->intf) < 0)
3305                 return;
3306
3307         mutex_lock(&tp->control);
3308
3309         wol->supported = WAKE_ANY;
3310         wol->wolopts = __rtl_get_wol(tp);
3311
3312         mutex_unlock(&tp->control);
3313
3314         usb_autopm_put_interface(tp->intf);
3315 }
3316
3317 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3318 {
3319         struct r8152 *tp = netdev_priv(dev);
3320         int ret;
3321
3322         ret = usb_autopm_get_interface(tp->intf);
3323         if (ret < 0)
3324                 goto out_set_wol;
3325
3326         mutex_lock(&tp->control);
3327
3328         __rtl_set_wol(tp, wol->wolopts);
3329         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3330
3331         mutex_unlock(&tp->control);
3332
3333         usb_autopm_put_interface(tp->intf);
3334
3335 out_set_wol:
3336         return ret;
3337 }
3338
3339 static u32 rtl8152_get_msglevel(struct net_device *dev)
3340 {
3341         struct r8152 *tp = netdev_priv(dev);
3342
3343         return tp->msg_enable;
3344 }
3345
3346 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3347 {
3348         struct r8152 *tp = netdev_priv(dev);
3349
3350         tp->msg_enable = value;
3351 }
3352
3353 static void rtl8152_get_drvinfo(struct net_device *netdev,
3354                                 struct ethtool_drvinfo *info)
3355 {
3356         struct r8152 *tp = netdev_priv(netdev);
3357
3358         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3359         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3360         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3361 }
3362
3363 static
3364 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3365 {
3366         struct r8152 *tp = netdev_priv(netdev);
3367         int ret;
3368
3369         if (!tp->mii.mdio_read)
3370                 return -EOPNOTSUPP;
3371
3372         ret = usb_autopm_get_interface(tp->intf);
3373         if (ret < 0)
3374                 goto out;
3375
3376         mutex_lock(&tp->control);
3377
3378         ret = mii_ethtool_gset(&tp->mii, cmd);
3379
3380         mutex_unlock(&tp->control);
3381
3382         usb_autopm_put_interface(tp->intf);
3383
3384 out:
3385         return ret;
3386 }
3387
3388 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3389 {
3390         struct r8152 *tp = netdev_priv(dev);
3391         int ret;
3392
3393         ret = usb_autopm_get_interface(tp->intf);
3394         if (ret < 0)
3395                 goto out;
3396
3397         mutex_lock(&tp->control);
3398
3399         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3400
3401         mutex_unlock(&tp->control);
3402
3403         usb_autopm_put_interface(tp->intf);
3404
3405 out:
3406         return ret;
3407 }
3408
3409 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3410         "tx_packets",
3411         "rx_packets",
3412         "tx_errors",
3413         "rx_errors",
3414         "rx_missed",
3415         "align_errors",
3416         "tx_single_collisions",
3417         "tx_multi_collisions",
3418         "rx_unicast",
3419         "rx_broadcast",
3420         "rx_multicast",
3421         "tx_aborted",
3422         "tx_underrun",
3423 };
3424
3425 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3426 {
3427         switch (sset) {
3428         case ETH_SS_STATS:
3429                 return ARRAY_SIZE(rtl8152_gstrings);
3430         default:
3431                 return -EOPNOTSUPP;
3432         }
3433 }
3434
3435 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3436                                       struct ethtool_stats *stats, u64 *data)
3437 {
3438         struct r8152 *tp = netdev_priv(dev);
3439         struct tally_counter tally;
3440
3441         if (usb_autopm_get_interface(tp->intf) < 0)
3442                 return;
3443
3444         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3445
3446         usb_autopm_put_interface(tp->intf);
3447
3448         data[0] = le64_to_cpu(tally.tx_packets);
3449         data[1] = le64_to_cpu(tally.rx_packets);
3450         data[2] = le64_to_cpu(tally.tx_errors);
3451         data[3] = le32_to_cpu(tally.rx_errors);
3452         data[4] = le16_to_cpu(tally.rx_missed);
3453         data[5] = le16_to_cpu(tally.align_errors);
3454         data[6] = le32_to_cpu(tally.tx_one_collision);
3455         data[7] = le32_to_cpu(tally.tx_multi_collision);
3456         data[8] = le64_to_cpu(tally.rx_unicast);
3457         data[9] = le64_to_cpu(tally.rx_broadcast);
3458         data[10] = le32_to_cpu(tally.rx_multicast);
3459         data[11] = le16_to_cpu(tally.tx_aborted);
3460         data[12] = le16_to_cpu(tally.tx_underrun);
3461 }
3462
3463 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3464 {
3465         switch (stringset) {
3466         case ETH_SS_STATS:
3467                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3468                 break;
3469         }
3470 }
3471
3472 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3473 {
3474         u32 ocp_data, lp, adv, supported = 0;
3475         u16 val;
3476
3477         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3478         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3479
3480         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3481         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3482
3483         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3484         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3485
3486         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3487         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3488
3489         eee->eee_enabled = !!ocp_data;
3490         eee->eee_active = !!(supported & adv & lp);
3491         eee->supported = supported;
3492         eee->advertised = adv;
3493         eee->lp_advertised = lp;
3494
3495         return 0;
3496 }
3497
3498 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3499 {
3500         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3501
3502         r8152_eee_en(tp, eee->eee_enabled);
3503
3504         if (!eee->eee_enabled)
3505                 val = 0;
3506
3507         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3508
3509         return 0;
3510 }
3511
3512 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3513 {
3514         u32 ocp_data, lp, adv, supported = 0;
3515         u16 val;
3516
3517         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3518         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3519
3520         val = ocp_reg_read(tp, OCP_EEE_ADV);
3521         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3522
3523         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3524         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3525
3526         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3527         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3528
3529         eee->eee_enabled = !!ocp_data;
3530         eee->eee_active = !!(supported & adv & lp);
3531         eee->supported = supported;
3532         eee->advertised = adv;
3533         eee->lp_advertised = lp;
3534
3535         return 0;
3536 }
3537
3538 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3539 {
3540         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3541
3542         r8153_eee_en(tp, eee->eee_enabled);
3543
3544         if (!eee->eee_enabled)
3545                 val = 0;
3546
3547         ocp_reg_write(tp, OCP_EEE_ADV, val);
3548
3549         return 0;
3550 }
3551
3552 static int
3553 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3554 {
3555         struct r8152 *tp = netdev_priv(net);
3556         int ret;
3557
3558         ret = usb_autopm_get_interface(tp->intf);
3559         if (ret < 0)
3560                 goto out;
3561
3562         mutex_lock(&tp->control);
3563
3564         ret = tp->rtl_ops.eee_get(tp, edata);
3565
3566         mutex_unlock(&tp->control);
3567
3568         usb_autopm_put_interface(tp->intf);
3569
3570 out:
3571         return ret;
3572 }
3573
3574 static int
3575 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3576 {
3577         struct r8152 *tp = netdev_priv(net);
3578         int ret;
3579
3580         ret = usb_autopm_get_interface(tp->intf);
3581         if (ret < 0)
3582                 goto out;
3583
3584         mutex_lock(&tp->control);
3585
3586         ret = tp->rtl_ops.eee_set(tp, edata);
3587         if (!ret)
3588                 ret = mii_nway_restart(&tp->mii);
3589
3590         mutex_unlock(&tp->control);
3591
3592         usb_autopm_put_interface(tp->intf);
3593
3594 out:
3595         return ret;
3596 }
3597
3598 static int rtl8152_nway_reset(struct net_device *dev)
3599 {
3600         struct r8152 *tp = netdev_priv(dev);
3601         int ret;
3602
3603         ret = usb_autopm_get_interface(tp->intf);
3604         if (ret < 0)
3605                 goto out;
3606
3607         mutex_lock(&tp->control);
3608
3609         ret = mii_nway_restart(&tp->mii);
3610
3611         mutex_unlock(&tp->control);
3612
3613         usb_autopm_put_interface(tp->intf);
3614
3615 out:
3616         return ret;
3617 }
3618
3619 static struct ethtool_ops ops = {
3620         .get_drvinfo = rtl8152_get_drvinfo,
3621         .get_settings = rtl8152_get_settings,
3622         .set_settings = rtl8152_set_settings,
3623         .get_link = ethtool_op_get_link,
3624         .nway_reset = rtl8152_nway_reset,
3625         .get_msglevel = rtl8152_get_msglevel,
3626         .set_msglevel = rtl8152_set_msglevel,
3627         .get_wol = rtl8152_get_wol,
3628         .set_wol = rtl8152_set_wol,
3629         .get_strings = rtl8152_get_strings,
3630         .get_sset_count = rtl8152_get_sset_count,
3631         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3632         .get_eee = rtl_ethtool_get_eee,
3633         .set_eee = rtl_ethtool_set_eee,
3634 };
3635
3636 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3637 {
3638         struct r8152 *tp = netdev_priv(netdev);
3639         struct mii_ioctl_data *data = if_mii(rq);
3640         int res;
3641
3642         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3643                 return -ENODEV;
3644
3645         res = usb_autopm_get_interface(tp->intf);
3646         if (res < 0)
3647                 goto out;
3648
3649         switch (cmd) {
3650         case SIOCGMIIPHY:
3651                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3652                 break;
3653
3654         case SIOCGMIIREG:
3655                 mutex_lock(&tp->control);
3656                 data->val_out = r8152_mdio_read(tp, data->reg_num);
3657                 mutex_unlock(&tp->control);
3658                 break;
3659
3660         case SIOCSMIIREG:
3661                 if (!capable(CAP_NET_ADMIN)) {
3662                         res = -EPERM;
3663                         break;
3664                 }
3665                 mutex_lock(&tp->control);
3666                 r8152_mdio_write(tp, data->reg_num, data->val_in);
3667                 mutex_unlock(&tp->control);
3668                 break;
3669
3670         default:
3671                 res = -EOPNOTSUPP;
3672         }
3673
3674         usb_autopm_put_interface(tp->intf);
3675
3676 out:
3677         return res;
3678 }
3679
3680 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3681 {
3682         struct r8152 *tp = netdev_priv(dev);
3683
3684         switch (tp->version) {
3685         case RTL_VER_01:
3686         case RTL_VER_02:
3687                 return eth_change_mtu(dev, new_mtu);
3688         default:
3689                 break;
3690         }
3691
3692         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3693                 return -EINVAL;
3694
3695         dev->mtu = new_mtu;
3696
3697         return 0;
3698 }
3699
3700 static const struct net_device_ops rtl8152_netdev_ops = {
3701         .ndo_open               = rtl8152_open,
3702         .ndo_stop               = rtl8152_close,
3703         .ndo_do_ioctl           = rtl8152_ioctl,
3704         .ndo_start_xmit         = rtl8152_start_xmit,
3705         .ndo_tx_timeout         = rtl8152_tx_timeout,
3706         .ndo_set_features       = rtl8152_set_features,
3707         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
3708         .ndo_set_mac_address    = rtl8152_set_mac_address,
3709         .ndo_change_mtu         = rtl8152_change_mtu,
3710         .ndo_validate_addr      = eth_validate_addr,
3711 };
3712
3713 static void r8152b_get_version(struct r8152 *tp)
3714 {
3715         u32     ocp_data;
3716         u16     version;
3717
3718         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3719         version = (u16)(ocp_data & VERSION_MASK);
3720
3721         switch (version) {
3722         case 0x4c00:
3723                 tp->version = RTL_VER_01;
3724                 break;
3725         case 0x4c10:
3726                 tp->version = RTL_VER_02;
3727                 break;
3728         case 0x5c00:
3729                 tp->version = RTL_VER_03;
3730                 tp->mii.supports_gmii = 1;
3731                 break;
3732         case 0x5c10:
3733                 tp->version = RTL_VER_04;
3734                 tp->mii.supports_gmii = 1;
3735                 break;
3736         case 0x5c20:
3737                 tp->version = RTL_VER_05;
3738                 tp->mii.supports_gmii = 1;
3739                 break;
3740         default:
3741                 netif_info(tp, probe, tp->netdev,
3742                            "Unknown version 0x%04x\n", version);
3743                 break;
3744         }
3745 }
3746
3747 static void rtl8152_unload(struct r8152 *tp)
3748 {
3749         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3750                 return;
3751
3752         if (tp->version != RTL_VER_01)
3753                 r8152_power_cut_en(tp, true);
3754 }
3755
3756 static void rtl8153_unload(struct r8152 *tp)
3757 {
3758         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3759                 return;
3760
3761         r8153_power_cut_en(tp, false);
3762 }
3763
3764 static int rtl_ops_init(struct r8152 *tp)
3765 {
3766         struct rtl_ops *ops = &tp->rtl_ops;
3767         int ret = 0;
3768
3769         switch (tp->version) {
3770         case RTL_VER_01:
3771         case RTL_VER_02:
3772                 ops->init               = r8152b_init;
3773                 ops->enable             = rtl8152_enable;
3774                 ops->disable            = rtl8152_disable;
3775                 ops->up                 = rtl8152_up;
3776                 ops->down               = rtl8152_down;
3777                 ops->unload             = rtl8152_unload;
3778                 ops->eee_get            = r8152_get_eee;
3779                 ops->eee_set            = r8152_set_eee;
3780                 break;
3781
3782         case RTL_VER_03:
3783         case RTL_VER_04:
3784         case RTL_VER_05:
3785                 ops->init               = r8153_init;
3786                 ops->enable             = rtl8153_enable;
3787                 ops->disable            = rtl8153_disable;
3788                 ops->up                 = rtl8153_up;
3789                 ops->down               = rtl8153_down;
3790                 ops->unload             = rtl8153_unload;
3791                 ops->eee_get            = r8153_get_eee;
3792                 ops->eee_set            = r8153_set_eee;
3793                 break;
3794
3795         default:
3796                 ret = -ENODEV;
3797                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3798                 break;
3799         }
3800
3801         return ret;
3802 }
3803
3804 static int rtl8152_probe(struct usb_interface *intf,
3805                          const struct usb_device_id *id)
3806 {
3807         struct usb_device *udev = interface_to_usbdev(intf);
3808         struct r8152 *tp;
3809         struct net_device *netdev;
3810         int ret;
3811
3812         if (udev->actconfig->desc.bConfigurationValue != 1) {
3813                 usb_driver_set_configuration(udev, 1);
3814                 return -ENODEV;
3815         }
3816
3817         usb_reset_device(udev);
3818         netdev = alloc_etherdev(sizeof(struct r8152));
3819         if (!netdev) {
3820                 dev_err(&intf->dev, "Out of memory\n");
3821                 return -ENOMEM;
3822         }
3823
3824         SET_NETDEV_DEV(netdev, &intf->dev);
3825         tp = netdev_priv(netdev);
3826         tp->msg_enable = 0x7FFF;
3827
3828         tp->udev = udev;
3829         tp->netdev = netdev;
3830         tp->intf = intf;
3831
3832         r8152b_get_version(tp);
3833         ret = rtl_ops_init(tp);
3834         if (ret)
3835                 goto out;
3836
3837         tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
3838         mutex_init(&tp->control);
3839         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3840
3841         netdev->netdev_ops = &rtl8152_netdev_ops;
3842         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
3843
3844         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3845                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3846                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
3847                             NETIF_F_HW_VLAN_CTAG_TX;
3848         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3849                               NETIF_F_TSO | NETIF_F_FRAGLIST |
3850                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
3851                               NETIF_F_HW_VLAN_CTAG_RX |
3852                               NETIF_F_HW_VLAN_CTAG_TX;
3853         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
3854                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
3855                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3856
3857         netdev->ethtool_ops = &ops;
3858         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
3859
3860         tp->mii.dev = netdev;
3861         tp->mii.mdio_read = read_mii_word;
3862         tp->mii.mdio_write = write_mii_word;
3863         tp->mii.phy_id_mask = 0x3f;
3864         tp->mii.reg_num_mask = 0x1f;
3865         tp->mii.phy_id = R8152_PHY_ID;
3866
3867         intf->needs_remote_wakeup = 1;
3868
3869         tp->rtl_ops.init(tp);
3870         set_ethernet_addr(tp);
3871
3872         usb_set_intfdata(intf, tp);
3873
3874         ret = register_netdev(netdev);
3875         if (ret != 0) {
3876                 netif_err(tp, probe, netdev, "couldn't register the device\n");
3877                 goto out1;
3878         }
3879
3880         tp->saved_wolopts = __rtl_get_wol(tp);
3881         if (tp->saved_wolopts)
3882                 device_set_wakeup_enable(&udev->dev, true);
3883         else
3884                 device_set_wakeup_enable(&udev->dev, false);
3885
3886         tasklet_disable(&tp->tl);
3887
3888         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
3889
3890         return 0;
3891
3892 out1:
3893         usb_set_intfdata(intf, NULL);
3894         tasklet_kill(&tp->tl);
3895 out:
3896         free_netdev(netdev);
3897         return ret;
3898 }
3899
3900 static void rtl8152_disconnect(struct usb_interface *intf)
3901 {
3902         struct r8152 *tp = usb_get_intfdata(intf);
3903
3904         usb_set_intfdata(intf, NULL);
3905         if (tp) {
3906                 struct usb_device *udev = tp->udev;
3907
3908                 if (udev->state == USB_STATE_NOTATTACHED)
3909                         set_bit(RTL8152_UNPLUG, &tp->flags);
3910
3911                 tasklet_kill(&tp->tl);
3912                 unregister_netdev(tp->netdev);
3913                 tp->rtl_ops.unload(tp);
3914                 free_netdev(tp->netdev);
3915         }
3916 }
3917
3918 /* table of devices that work with this driver */
3919 static struct usb_device_id rtl8152_table[] = {
3920         {USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
3921         {USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
3922         {USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
3923         {}
3924 };
3925
3926 MODULE_DEVICE_TABLE(usb, rtl8152_table);
3927
3928 static struct usb_driver rtl8152_driver = {
3929         .name =         MODULENAME,
3930         .id_table =     rtl8152_table,
3931         .probe =        rtl8152_probe,
3932         .disconnect =   rtl8152_disconnect,
3933         .suspend =      rtl8152_suspend,
3934         .resume =       rtl8152_resume,
3935         .reset_resume = rtl8152_resume,
3936         .supports_autosuspend = 1,
3937         .disable_hub_initiated_lpm = 1,
3938 };
3939
3940 module_usb_driver(rtl8152_driver);
3941
3942 MODULE_AUTHOR(DRIVER_AUTHOR);
3943 MODULE_DESCRIPTION(DRIVER_DESC);
3944 MODULE_LICENSE("GPL");