drivers/net/wireless/ath/ath6kl/debug.c

   1 /*
   2  * Copyright (c) 2004-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "core.h"
  18 #include "debug.h"
  19
  20 int ath6kl_printk(const char *level, const char *fmt, ...)
  21 {
  22         struct va_format vaf;
  23         va_list args;
  24         int rtn;
  25
  26         va_start(args, fmt);
  27
  28         vaf.fmt = fmt;
  29         vaf.va = &args;
  30
  31         rtn = printk("%sath6kl: %pV", level, &vaf);
  32
  33         va_end(args);
  34
  35         return rtn;
  36 }
  37
  38 #ifdef CONFIG_ATH6KL_DEBUG
  39 void ath6kl_dump_registers(struct ath6kl_device *dev,
  40                            struct ath6kl_irq_proc_registers *irq_proc_reg,
  41                            struct ath6kl_irq_enable_reg *irq_enable_reg)
  42 {
  43
  44         ath6kl_dbg(ATH6KL_DBG_ANY, ("<------- Register Table -------->\n"));
  45
  46         if (irq_proc_reg != NULL) {
  47                 ath6kl_dbg(ATH6KL_DBG_ANY,
  48                         "Host Int status:           0x%x\n",
  49                         irq_proc_reg->host_int_status);
  50                 ath6kl_dbg(ATH6KL_DBG_ANY,
  51                            "CPU Int status:            0x%x\n",
  52                         irq_proc_reg->cpu_int_status);
  53                 ath6kl_dbg(ATH6KL_DBG_ANY,
  54                            "Error Int status:          0x%x\n",
  55                         irq_proc_reg->error_int_status);
  56                 ath6kl_dbg(ATH6KL_DBG_ANY,
  57                            "Counter Int status:        0x%x\n",
  58                         irq_proc_reg->counter_int_status);
  59                 ath6kl_dbg(ATH6KL_DBG_ANY,
  60                            "Mbox Frame:                0x%x\n",
  61                         irq_proc_reg->mbox_frame);
  62                 ath6kl_dbg(ATH6KL_DBG_ANY,
  63                            "Rx Lookahead Valid:        0x%x\n",
  64                         irq_proc_reg->rx_lkahd_valid);
  65                 ath6kl_dbg(ATH6KL_DBG_ANY,
  66                            "Rx Lookahead 0:            0x%x\n",
  67                         irq_proc_reg->rx_lkahd[0]);
  68                 ath6kl_dbg(ATH6KL_DBG_ANY,
  69                            "Rx Lookahead 1:            0x%x\n",
  70                         irq_proc_reg->rx_lkahd[1]);
  71
  72                 if (dev->ar->mbox_info.gmbox_addr != 0) {
  73                         /*
  74                          * If the target supports GMBOX hardware, dump some
  75                          * additional state.
  76                          */
  77                         ath6kl_dbg(ATH6KL_DBG_ANY,
  78                                 "GMBOX Host Int status 2:   0x%x\n",
  79                                 irq_proc_reg->host_int_status2);
  80                         ath6kl_dbg(ATH6KL_DBG_ANY,
  81                                 "GMBOX RX Avail:            0x%x\n",
  82                                 irq_proc_reg->gmbox_rx_avail);
  83                         ath6kl_dbg(ATH6KL_DBG_ANY,
  84                                 "GMBOX lookahead alias 0:   0x%x\n",
  85                                 irq_proc_reg->rx_gmbox_lkahd_alias[0]);
  86                         ath6kl_dbg(ATH6KL_DBG_ANY,
  87                                 "GMBOX lookahead alias 1:   0x%x\n",
  88                                 irq_proc_reg->rx_gmbox_lkahd_alias[1]);
  89                 }
  90
  91         }
  92
  93         if (irq_enable_reg != NULL) {
  94                 ath6kl_dbg(ATH6KL_DBG_ANY,
  95                         "Int status Enable:         0x%x\n",
  96                         irq_enable_reg->int_status_en);
  97                 ath6kl_dbg(ATH6KL_DBG_ANY, "Counter Int status Enable: 0x%x\n",
  98                         irq_enable_reg->cntr_int_status_en);
  99         }
 100         ath6kl_dbg(ATH6KL_DBG_ANY, "<------------------------------->\n");
 101 }
 102
 103 static void dump_cred_dist(struct htc_endpoint_credit_dist *ep_dist)
 104 {
 105         ath6kl_dbg(ATH6KL_DBG_ANY,
 106                    "--- endpoint: %d  svc_id: 0x%X ---\n",
 107                    ep_dist->endpoint, ep_dist->svc_id);
 108         ath6kl_dbg(ATH6KL_DBG_ANY, " dist_flags     : 0x%X\n",
 109                    ep_dist->dist_flags);
 110         ath6kl_dbg(ATH6KL_DBG_ANY, " cred_norm      : %d\n",
 111                    ep_dist->cred_norm);
 112         ath6kl_dbg(ATH6KL_DBG_ANY, " cred_min       : %d\n",
 113                    ep_dist->cred_min);
 114         ath6kl_dbg(ATH6KL_DBG_ANY, " credits        : %d\n",
 115                    ep_dist->credits);
 116         ath6kl_dbg(ATH6KL_DBG_ANY, " cred_assngd    : %d\n",
 117                    ep_dist->cred_assngd);
 118         ath6kl_dbg(ATH6KL_DBG_ANY, " seek_cred      : %d\n",
 119                    ep_dist->seek_cred);
 120         ath6kl_dbg(ATH6KL_DBG_ANY, " cred_sz        : %d\n",
 121                    ep_dist->cred_sz);
 122         ath6kl_dbg(ATH6KL_DBG_ANY, " cred_per_msg   : %d\n",
 123                    ep_dist->cred_per_msg);
 124         ath6kl_dbg(ATH6KL_DBG_ANY, " cred_to_dist   : %d\n",
 125                    ep_dist->cred_to_dist);
 126         ath6kl_dbg(ATH6KL_DBG_ANY, " txq_depth      : %d\n",
 127                    get_queue_depth(&((struct htc_endpoint *)
 128                                      ep_dist->htc_rsvd)->txq));
 129         ath6kl_dbg(ATH6KL_DBG_ANY,
 130                    "----------------------------------\n");
 131 }
 132
 133 void dump_cred_dist_stats(struct htc_target *target)
 134 {
 135         struct htc_endpoint_credit_dist *ep_list;
 136
 137         if (!AR_DBG_LVL_CHECK(ATH6KL_DBG_TRC))
 138                 return;
 139
 140         list_for_each_entry(ep_list, &target->cred_dist_list, list)
 141                 dump_cred_dist(ep_list);
 142
 143         ath6kl_dbg(ATH6KL_DBG_HTC_SEND, "ctxt:%p dist:%p\n",
 144                    target->cred_dist_cntxt, NULL);
 145         ath6kl_dbg(ATH6KL_DBG_TRC, "credit distribution, total : %d, free : %d\n",
 146                    target->cred_dist_cntxt->total_avail_credits,
 147                    target->cred_dist_cntxt->cur_free_credits);
 148 }
 149
 150 #endif