drivers/net/wireless/ath/ath9k/eeprom.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "hw.h"
  18
  19 static inline u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz)
  20 {
  21         if (fbin == AR5416_BCHAN_UNUSED)
  22                 return fbin;
  23
  24         return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));
  25 }
  26
  27 void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask,
  28                                u32 shift, u32 val)
  29 {
  30         u32 regVal;
  31
  32         regVal = REG_READ(ah, reg) & ~mask;
  33         regVal |= (val << shift) & mask;
  34
  35         REG_WRITE(ah, reg, regVal);
  36
  37         if (ah->config.analog_shiftreg)
  38                 udelay(100);
  39 }
  40
  41 int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight,
  42                              int16_t targetLeft, int16_t targetRight)
  43 {
  44         int16_t rv;
  45
  46         if (srcRight == srcLeft) {
  47                 rv = targetLeft;
  48         } else {
  49                 rv = (int16_t) (((target - srcLeft) * targetRight +
  50                                  (srcRight - target) * targetLeft) /
  51                                 (srcRight - srcLeft));
  52         }
  53         return rv;
  54 }
  55
  56 bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
  57                                     u16 *indexL, u16 *indexR)
  58 {
  59         u16 i;
  60
  61         if (target <= pList[0]) {
  62                 *indexL = *indexR = 0;
  63                 return true;
  64         }
  65         if (target >= pList[listSize - 1]) {
  66                 *indexL = *indexR = (u16) (listSize - 1);
  67                 return true;
  68         }
  69
  70         for (i = 0; i < listSize - 1; i++) {
  71                 if (pList[i] == target) {
  72                         *indexL = *indexR = i;
  73                         return true;
  74                 }
  75                 if (target < pList[i + 1]) {
  76                         *indexL = i;
  77                         *indexR = (u16) (i + 1);
  78                         return false;
  79                 }
  80         }
  81         return false;
  82 }
  83
  84 bool ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data)
  85 {
  86         return common->bus_ops->eeprom_read(common, off, data);
  87 }
  88
  89 void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
  90                              u8 *pVpdList, u16 numIntercepts,
  91                              u8 *pRetVpdList)
  92 {
  93         u16 i, k;
  94         u8 currPwr = pwrMin;
  95         u16 idxL = 0, idxR = 0;
  96
  97         for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) {
  98                 ath9k_hw_get_lower_upper_index(currPwr, pPwrList,
  99                                                numIntercepts, &(idxL),
 100                                                &(idxR));
 101                 if (idxR < 1)
 102                         idxR = 1;
 103                 if (idxL == numIntercepts - 1)
 104                         idxL = (u16) (numIntercepts - 2);
 105                 if (pPwrList[idxL] == pPwrList[idxR])
 106                         k = pVpdList[idxL];
 107                 else
 108                         k = (u16)(((currPwr - pPwrList[idxL]) * pVpdList[idxR] +
 109                                    (pPwrList[idxR] - currPwr) * pVpdList[idxL]) /
 110                                   (pPwrList[idxR] - pPwrList[idxL]));
 111                 pRetVpdList[i] = (u8) k;
 112                 currPwr += 2;
 113         }
 114 }
 115
 116 void ath9k_hw_get_legacy_target_powers(struct ath_hw *ah,
 117                                        struct ath9k_channel *chan,
 118                                        struct cal_target_power_leg *powInfo,
 119                                        u16 numChannels,
 120                                        struct cal_target_power_leg *pNewPower,
 121                                        u16 numRates, bool isExtTarget)
 122 {
 123         struct chan_centers centers;
 124         u16 clo, chi;
 125         int i;
 126         int matchIndex = -1, lowIndex = -1;
 127         u16 freq;
 128
 129         ath9k_hw_get_channel_centers(ah, chan, &centers);
 130         freq = (isExtTarget) ? centers.ext_center : centers.ctl_center;
 131
 132         if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel,
 133                                        IS_CHAN_2GHZ(chan))) {
 134                 matchIndex = 0;
 135         } else {
 136                 for (i = 0; (i < numChannels) &&
 137                              (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
 138                         if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
 139                                                        IS_CHAN_2GHZ(chan))) {
 140                                 matchIndex = i;
 141                                 break;
 142                         } else if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
 143                                                 IS_CHAN_2GHZ(chan)) && i > 0 &&
 144                                    freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
 145                                                 IS_CHAN_2GHZ(chan))) {
 146                                 lowIndex = i - 1;
 147                                 break;
 148                         }
 149                 }
 150                 if ((matchIndex == -1) && (lowIndex == -1))
 151                         matchIndex = i - 1;
 152         }
 153
 154         if (matchIndex != -1) {
 155                 *pNewPower = powInfo[matchIndex];
 156         } else {
 157                 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
 158                                          IS_CHAN_2GHZ(chan));
 159                 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
 160                                          IS_CHAN_2GHZ(chan));
 161
 162                 for (i = 0; i < numRates; i++) {
 163                         pNewPower->tPow2x[i] =
 164                                 (u8)ath9k_hw_interpolate(freq, clo, chi,
 165                                                 powInfo[lowIndex].tPow2x[i],
 166                                                 powInfo[lowIndex + 1].tPow2x[i]);
 167                 }
 168         }
 169 }
 170
 171 void ath9k_hw_get_target_powers(struct ath_hw *ah,
 172                                 struct ath9k_channel *chan,
 173                                 struct cal_target_power_ht *powInfo,
 174                                 u16 numChannels,
 175                                 struct cal_target_power_ht *pNewPower,
 176                                 u16 numRates, bool isHt40Target)
 177 {
 178         struct chan_centers centers;
 179         u16 clo, chi;
 180         int i;
 181         int matchIndex = -1, lowIndex = -1;
 182         u16 freq;
 183
 184         ath9k_hw_get_channel_centers(ah, chan, &centers);
 185         freq = isHt40Target ? centers.synth_center : centers.ctl_center;
 186
 187         if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {
 188                 matchIndex = 0;
 189         } else {
 190                 for (i = 0; (i < numChannels) &&
 191                              (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
 192                         if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
 193                                                        IS_CHAN_2GHZ(chan))) {
 194                                 matchIndex = i;
 195                                 break;
 196                         } else
 197                                 if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
 198                                                 IS_CHAN_2GHZ(chan)) && i > 0 &&
 199                                     freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
 200                                                 IS_CHAN_2GHZ(chan))) {
 201                                         lowIndex = i - 1;
 202                                         break;
 203                                 }
 204                 }
 205                 if ((matchIndex == -1) && (lowIndex == -1))
 206                         matchIndex = i - 1;
 207         }
 208
 209         if (matchIndex != -1) {
 210                 *pNewPower = powInfo[matchIndex];
 211         } else {
 212                 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
 213                                          IS_CHAN_2GHZ(chan));
 214                 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
 215                                          IS_CHAN_2GHZ(chan));
 216
 217                 for (i = 0; i < numRates; i++) {
 218                         pNewPower->tPow2x[i] = (u8)ath9k_hw_interpolate(freq,
 219                                                 clo, chi,
 220                                                 powInfo[lowIndex].tPow2x[i],
 221                                                 powInfo[lowIndex + 1].tPow2x[i]);
 222                 }
 223         }
 224 }
 225
 226 u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
 227                                 bool is2GHz, int num_band_edges)
 228 {
 229         u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
 230         int i;
 231
 232         for (i = 0; (i < num_band_edges) &&
 233                      (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
 234                 if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
 235                         twiceMaxEdgePower = pRdEdgesPower[i].tPower;
 236                         break;
 237                 } else if ((i > 0) &&
 238                            (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
 239                                                       is2GHz))) {
 240                         if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
 241                                                is2GHz) < freq &&
 242                             pRdEdgesPower[i - 1].flag) {
 243                                 twiceMaxEdgePower =
 244                                         pRdEdgesPower[i - 1].tPower;
 245                         }
 246                         break;
 247                 }
 248         }
 249
 250         return twiceMaxEdgePower;
 251 }
 252
 253 int ath9k_hw_eeprom_init(struct ath_hw *ah)
 254 {
 255         int status;
 256
 257         if (AR_SREV_9300_20_OR_LATER(ah))
 258                 ah->eep_ops = &eep_ar9300_ops;
 259         else if (AR_SREV_9287(ah)) {
 260                 ah->eep_ops = &eep_ar9287_ops;
 261         } else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
 262                 ah->eep_ops = &eep_4k_ops;
 263         } else {
 264                 ah->eep_ops = &eep_def_ops;
 265         }
 266
 267         if (!ah->eep_ops->fill_eeprom(ah))
 268                 return -EIO;
 269
 270         status = ah->eep_ops->check_eeprom(ah);
 271
 272         return status;
 273 }