2 * Copyright (c) 2010 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 MODULE_AUTHOR("Atheros Communications");
20 MODULE_LICENSE("Dual BSD/GPL");
21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
24 module_param_named(debug, ath9k_debug, uint, 0);
25 MODULE_PARM_DESC(debug, "Debugging mask");
27 int htc_modparam_nohwcrypt;
28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
31 #define CHAN2G(_freq, _idx) { \
32 .center_freq = (_freq), \
37 static struct ieee80211_channel ath9k_2ghz_channels[] = {
38 CHAN2G(2412, 0), /* Channel 1 */
39 CHAN2G(2417, 1), /* Channel 2 */
40 CHAN2G(2422, 2), /* Channel 3 */
41 CHAN2G(2427, 3), /* Channel 4 */
42 CHAN2G(2432, 4), /* Channel 5 */
43 CHAN2G(2437, 5), /* Channel 6 */
44 CHAN2G(2442, 6), /* Channel 7 */
45 CHAN2G(2447, 7), /* Channel 8 */
46 CHAN2G(2452, 8), /* Channel 9 */
47 CHAN2G(2457, 9), /* Channel 10 */
48 CHAN2G(2462, 10), /* Channel 11 */
49 CHAN2G(2467, 11), /* Channel 12 */
50 CHAN2G(2472, 12), /* Channel 13 */
51 CHAN2G(2484, 13), /* Channel 14 */
54 /* Atheros hardware rate code addition for short premble */
55 #define SHPCHECK(__hw_rate, __flags) \
56 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
58 #define RATE(_bitrate, _hw_rate, _flags) { \
59 .bitrate = (_bitrate), \
61 .hw_value = (_hw_rate), \
62 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
65 static struct ieee80211_rate ath9k_legacy_rates[] = {
67 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
68 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
69 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
80 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
84 if (atomic_read(&priv->htc->tgt_ready) > 0) {
85 atomic_dec(&priv->htc->tgt_ready);
89 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
90 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
92 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
96 atomic_dec(&priv->htc->tgt_ready);
101 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
103 ath9k_htc_exit_debug(priv->ah);
104 ath9k_hw_deinit(priv->ah);
105 tasklet_kill(&priv->wmi_tasklet);
106 tasklet_kill(&priv->rx_tasklet);
107 tasklet_kill(&priv->tx_tasklet);
112 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
114 struct ieee80211_hw *hw = priv->hw;
116 wiphy_rfkill_stop_polling(hw->wiphy);
117 ath9k_deinit_leds(priv);
118 ieee80211_unregister_hw(hw);
119 ath9k_rx_cleanup(priv);
120 ath9k_tx_cleanup(priv);
121 ath9k_deinit_priv(priv);
124 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
128 enum htc_endpoint_id,
130 enum htc_endpoint_id *ep_id)
132 struct htc_service_connreq req;
134 memset(&req, 0, sizeof(struct htc_service_connreq));
136 req.service_id = service_id;
137 req.ep_callbacks.priv = priv;
138 req.ep_callbacks.rx = ath9k_htc_rxep;
139 req.ep_callbacks.tx = tx;
141 return htc_connect_service(priv->htc, &req, ep_id);
144 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv)
149 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
154 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
160 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
167 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
173 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
179 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
185 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
191 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
197 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
202 ret = htc_init(priv->htc);
209 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
213 static int ath9k_reg_notifier(struct wiphy *wiphy,
214 struct regulatory_request *request)
216 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
217 struct ath9k_htc_priv *priv = hw->priv;
219 return ath_reg_notifier_apply(wiphy, request,
220 ath9k_hw_regulatory(priv->ah));
223 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
225 struct ath_hw *ah = (struct ath_hw *) hw_priv;
226 struct ath_common *common = ath9k_hw_common(ah);
227 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
228 __be32 val, reg = cpu_to_be32(reg_offset);
231 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
232 (u8 *) ®, sizeof(reg),
233 (u8 *) &val, sizeof(val),
236 ath_print(common, ATH_DBG_WMI,
237 "REGISTER READ FAILED: (0x%04x, %d)\n",
242 return be32_to_cpu(val);
245 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
247 struct ath_hw *ah = (struct ath_hw *) hw_priv;
248 struct ath_common *common = ath9k_hw_common(ah);
249 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
251 cpu_to_be32(reg_offset),
256 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
257 (u8 *) &buf, sizeof(buf),
258 (u8 *) &val, sizeof(val),
261 ath_print(common, ATH_DBG_WMI,
262 "REGISTER WRITE FAILED:(0x%04x, %d)\n",
267 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
269 struct ath_hw *ah = (struct ath_hw *) hw_priv;
270 struct ath_common *common = ath9k_hw_common(ah);
271 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
275 mutex_lock(&priv->wmi->multi_write_mutex);
277 /* Store the register/value */
278 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
279 cpu_to_be32(reg_offset);
280 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
283 priv->wmi->multi_write_idx++;
285 /* If the buffer is full, send it out. */
286 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
287 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
288 (u8 *) &priv->wmi->multi_write,
289 sizeof(struct register_write) * priv->wmi->multi_write_idx,
290 (u8 *) &rsp_status, sizeof(rsp_status),
293 ath_print(common, ATH_DBG_WMI,
294 "REGISTER WRITE FAILED, multi len: %d\n",
295 priv->wmi->multi_write_idx);
297 priv->wmi->multi_write_idx = 0;
300 mutex_unlock(&priv->wmi->multi_write_mutex);
303 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
305 struct ath_hw *ah = (struct ath_hw *) hw_priv;
306 struct ath_common *common = ath9k_hw_common(ah);
307 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
309 if (atomic_read(&priv->wmi->mwrite_cnt))
310 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
312 ath9k_regwrite_single(hw_priv, val, reg_offset);
315 static void ath9k_enable_regwrite_buffer(void *hw_priv)
317 struct ath_hw *ah = (struct ath_hw *) hw_priv;
318 struct ath_common *common = ath9k_hw_common(ah);
319 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
321 atomic_inc(&priv->wmi->mwrite_cnt);
324 static void ath9k_disable_regwrite_buffer(void *hw_priv)
326 struct ath_hw *ah = (struct ath_hw *) hw_priv;
327 struct ath_common *common = ath9k_hw_common(ah);
328 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
330 atomic_dec(&priv->wmi->mwrite_cnt);
333 static void ath9k_regwrite_flush(void *hw_priv)
335 struct ath_hw *ah = (struct ath_hw *) hw_priv;
336 struct ath_common *common = ath9k_hw_common(ah);
337 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
341 mutex_lock(&priv->wmi->multi_write_mutex);
343 if (priv->wmi->multi_write_idx) {
344 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
345 (u8 *) &priv->wmi->multi_write,
346 sizeof(struct register_write) * priv->wmi->multi_write_idx,
347 (u8 *) &rsp_status, sizeof(rsp_status),
350 ath_print(common, ATH_DBG_WMI,
351 "REGISTER WRITE FAILED, multi len: %d\n",
352 priv->wmi->multi_write_idx);
354 priv->wmi->multi_write_idx = 0;
357 mutex_unlock(&priv->wmi->multi_write_mutex);
360 static const struct ath_ops ath9k_common_ops = {
361 .read = ath9k_regread,
362 .write = ath9k_regwrite,
363 .enable_write_buffer = ath9k_enable_regwrite_buffer,
364 .disable_write_buffer = ath9k_disable_regwrite_buffer,
365 .write_flush = ath9k_regwrite_flush,
368 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
370 *csz = L1_CACHE_BYTES >> 2;
373 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
375 struct ath_hw *ah = (struct ath_hw *) common->ah;
377 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
379 if (!ath9k_hw_wait(ah,
380 AR_EEPROM_STATUS_DATA,
381 AR_EEPROM_STATUS_DATA_BUSY |
382 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
386 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
387 AR_EEPROM_STATUS_DATA_VAL);
392 static const struct ath_bus_ops ath9k_usb_bus_ops = {
393 .ath_bus_type = ATH_USB,
394 .read_cachesize = ath_usb_read_cachesize,
395 .eeprom_read = ath_usb_eeprom_read,
398 static void setup_ht_cap(struct ath9k_htc_priv *priv,
399 struct ieee80211_sta_ht_cap *ht_info)
401 ht_info->ht_supported = true;
402 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
403 IEEE80211_HT_CAP_SM_PS |
404 IEEE80211_HT_CAP_SGI_40 |
405 IEEE80211_HT_CAP_DSSSCCK40;
407 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
408 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
410 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
411 ht_info->mcs.rx_mask[0] = 0xff;
412 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
415 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
417 struct ath_common *common = ath9k_hw_common(priv->ah);
420 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
421 priv->hwq_map[i] = -1;
423 if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BE)) {
424 ath_print(common, ATH_DBG_FATAL,
425 "Unable to setup xmit queue for BE traffic\n");
429 if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BK)) {
430 ath_print(common, ATH_DBG_FATAL,
431 "Unable to setup xmit queue for BK traffic\n");
434 if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VI)) {
435 ath_print(common, ATH_DBG_FATAL,
436 "Unable to setup xmit queue for VI traffic\n");
439 if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VO)) {
440 ath_print(common, ATH_DBG_FATAL,
441 "Unable to setup xmit queue for VO traffic\n");
451 static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
453 struct ath_common *common = ath9k_hw_common(priv->ah);
456 /* Get the hardware key cache size. */
457 common->keymax = priv->ah->caps.keycache_size;
458 if (common->keymax > ATH_KEYMAX) {
459 ath_print(common, ATH_DBG_ANY,
460 "Warning, using only %u entries in %u key cache\n",
461 ATH_KEYMAX, common->keymax);
462 common->keymax = ATH_KEYMAX;
466 * Reset the key cache since some parts do not
467 * reset the contents on initial power up.
469 for (i = 0; i < common->keymax; i++)
470 ath9k_hw_keyreset(priv->ah, (u16) i);
472 if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER,
473 ATH9K_CIPHER_TKIP, NULL)) {
475 * Whether we should enable h/w TKIP MIC.
476 * XXX: if we don't support WME TKIP MIC, then we wouldn't
477 * report WMM capable, so it's always safe to turn on
478 * TKIP MIC in this case.
480 ath9k_hw_setcapability(priv->ah, ATH9K_CAP_TKIP_MIC, 0, 1, NULL);
484 * Check whether the separate key cache entries
485 * are required to handle both tx+rx MIC keys.
486 * With split mic keys the number of stations is limited
487 * to 27 otherwise 59.
489 if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER,
490 ATH9K_CIPHER_TKIP, NULL)
491 && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER,
492 ATH9K_CIPHER_MIC, NULL)
493 && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_TKIP_SPLIT,
495 common->splitmic = 1;
497 /* turn on mcast key search if possible */
498 if (!ath9k_hw_getcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
499 (void)ath9k_hw_setcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH,
503 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
505 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) {
506 priv->sbands[IEEE80211_BAND_2GHZ].channels =
508 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
509 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
510 ARRAY_SIZE(ath9k_2ghz_channels);
511 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
512 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
513 ARRAY_SIZE(ath9k_legacy_rates);
517 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
519 struct ath_common *common = ath9k_hw_common(priv->ah);
521 common->tx_chainmask = priv->ah->caps.tx_chainmask;
522 common->rx_chainmask = priv->ah->caps.rx_chainmask;
524 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
525 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
527 priv->op_flags |= OP_TXAGGR;
528 priv->ah->opmode = NL80211_IFTYPE_STATION;
531 static int ath9k_init_priv(struct ath9k_htc_priv *priv, u16 devid)
533 struct ath_hw *ah = NULL;
534 struct ath_common *common;
535 int ret = 0, csz = 0;
537 priv->op_flags |= OP_INVALID;
539 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
543 ah->hw_version.devid = devid;
544 ah->hw_version.subsysid = 0; /* FIXME */
547 common = ath9k_hw_common(ah);
548 common->ops = &ath9k_common_ops;
549 common->bus_ops = &ath9k_usb_bus_ops;
551 common->hw = priv->hw;
553 common->debug_mask = ath9k_debug;
555 spin_lock_init(&priv->wmi->wmi_lock);
556 spin_lock_init(&priv->beacon_lock);
557 spin_lock_init(&priv->tx_lock);
558 mutex_init(&priv->mutex);
559 mutex_init(&priv->aggr_work.mutex);
560 mutex_init(&priv->htc_pm_lock);
561 tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
562 (unsigned long)priv);
563 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
564 (unsigned long)priv);
565 tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
566 INIT_DELAYED_WORK(&priv->ath9k_aggr_work, ath9k_htc_aggr_work);
567 INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
568 INIT_WORK(&priv->ps_work, ath9k_ps_work);
571 * Cache line size is used to size and align various
572 * structures used to communicate with the hardware.
574 ath_read_cachesize(common, &csz);
575 common->cachelsz = csz << 2; /* convert to bytes */
577 ret = ath9k_hw_init(ah);
579 ath_print(common, ATH_DBG_FATAL,
580 "Unable to initialize hardware; "
581 "initialization status: %d\n", ret);
585 ret = ath9k_htc_init_debug(ah);
587 ath_print(common, ATH_DBG_FATAL,
588 "Unable to create debugfs files\n");
592 ret = ath9k_init_queues(priv);
596 ath9k_init_crypto(priv);
597 ath9k_init_channels_rates(priv);
598 ath9k_init_misc(priv);
603 ath9k_htc_exit_debug(ah);
614 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
615 struct ieee80211_hw *hw)
617 struct ath_common *common = ath9k_hw_common(priv->ah);
619 hw->flags = IEEE80211_HW_SIGNAL_DBM |
620 IEEE80211_HW_AMPDU_AGGREGATION |
621 IEEE80211_HW_SPECTRUM_MGMT |
622 IEEE80211_HW_HAS_RATE_CONTROL |
623 IEEE80211_HW_RX_INCLUDES_FCS |
624 IEEE80211_HW_SUPPORTS_PS |
625 IEEE80211_HW_PS_NULLFUNC_STACK;
627 hw->wiphy->interface_modes =
628 BIT(NL80211_IFTYPE_STATION) |
629 BIT(NL80211_IFTYPE_ADHOC);
631 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
634 hw->channel_change_time = 5000;
635 hw->max_listen_interval = 10;
636 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
637 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
639 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
640 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
641 sizeof(struct htc_frame_hdr) + 4;
643 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
644 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
645 &priv->sbands[IEEE80211_BAND_2GHZ];
647 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
648 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
650 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
653 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
656 static int ath9k_init_device(struct ath9k_htc_priv *priv, u16 devid)
658 struct ieee80211_hw *hw = priv->hw;
659 struct ath_common *common;
662 struct ath_regulatory *reg;
664 /* Bring up device */
665 error = ath9k_init_priv(priv, devid);
670 common = ath9k_hw_common(ah);
671 ath9k_set_hw_capab(priv, hw);
673 /* Initialize regulatory */
674 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
679 reg = &common->regulatory;
682 error = ath9k_tx_init(priv);
687 error = ath9k_rx_init(priv);
691 /* Register with mac80211 */
692 error = ieee80211_register_hw(hw);
696 /* Handle world regulatory */
697 if (!ath_is_world_regd(reg)) {
698 error = regulatory_hint(hw->wiphy, reg->alpha2);
703 ath9k_init_leds(priv);
704 ath9k_start_rfkill_poll(priv);
709 ieee80211_unregister_hw(hw);
711 ath9k_rx_cleanup(priv);
713 ath9k_tx_cleanup(priv);
717 ath9k_deinit_priv(priv);
722 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
725 struct ieee80211_hw *hw;
726 struct ath9k_htc_priv *priv;
729 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
735 priv->htc = htc_handle;
737 htc_handle->drv_priv = priv;
738 SET_IEEE80211_DEV(hw, priv->dev);
740 ret = ath9k_htc_wait_for_target(priv);
744 priv->wmi = ath9k_init_wmi(priv);
750 ret = ath9k_init_htc_services(priv);
754 /* The device may have been unplugged earlier. */
755 priv->op_flags &= ~OP_UNPLUGGED;
757 ret = ath9k_init_device(priv, devid);
764 ath9k_deinit_wmi(priv);
766 ieee80211_free_hw(hw);
770 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
772 if (htc_handle->drv_priv) {
774 /* Check if the device has been yanked out. */
776 htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
778 ath9k_deinit_device(htc_handle->drv_priv);
779 ath9k_deinit_wmi(htc_handle->drv_priv);
780 ieee80211_free_hw(htc_handle->drv_priv->hw);
785 int ath9k_htc_resume(struct htc_target *htc_handle)
789 ret = ath9k_htc_wait_for_target(htc_handle->drv_priv);
793 ret = ath9k_init_htc_services(htc_handle->drv_priv);
798 static int __init ath9k_htc_init(void)
802 error = ath9k_htc_debug_create_root();
805 "ath9k_htc: Unable to create debugfs root: %d\n",
810 error = ath9k_hif_usb_init();
813 "ath9k_htc: No USB devices found,"
814 " driver not installed.\n");
822 ath9k_htc_debug_remove_root();
826 module_init(ath9k_htc_init);
828 static void __exit ath9k_htc_exit(void)
830 ath9k_hif_usb_exit();
831 ath9k_htc_debug_remove_root();
832 printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
834 module_exit(ath9k_htc_exit);