2 * Copyright (c) 2010-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 MODULE_AUTHOR("Atheros Communications");
20 MODULE_LICENSE("Dual BSD/GPL");
21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
24 module_param_named(debug, ath9k_debug, uint, 0);
25 MODULE_PARM_DESC(debug, "Debugging mask");
27 int htc_modparam_nohwcrypt;
28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
31 #define CHAN2G(_freq, _idx) { \
32 .center_freq = (_freq), \
37 #define CHAN5G(_freq, _idx) { \
38 .band = IEEE80211_BAND_5GHZ, \
39 .center_freq = (_freq), \
44 static struct ieee80211_channel ath9k_2ghz_channels[] = {
45 CHAN2G(2412, 0), /* Channel 1 */
46 CHAN2G(2417, 1), /* Channel 2 */
47 CHAN2G(2422, 2), /* Channel 3 */
48 CHAN2G(2427, 3), /* Channel 4 */
49 CHAN2G(2432, 4), /* Channel 5 */
50 CHAN2G(2437, 5), /* Channel 6 */
51 CHAN2G(2442, 6), /* Channel 7 */
52 CHAN2G(2447, 7), /* Channel 8 */
53 CHAN2G(2452, 8), /* Channel 9 */
54 CHAN2G(2457, 9), /* Channel 10 */
55 CHAN2G(2462, 10), /* Channel 11 */
56 CHAN2G(2467, 11), /* Channel 12 */
57 CHAN2G(2472, 12), /* Channel 13 */
58 CHAN2G(2484, 13), /* Channel 14 */
61 static struct ieee80211_channel ath9k_5ghz_channels[] = {
62 /* _We_ call this UNII 1 */
63 CHAN5G(5180, 14), /* Channel 36 */
64 CHAN5G(5200, 15), /* Channel 40 */
65 CHAN5G(5220, 16), /* Channel 44 */
66 CHAN5G(5240, 17), /* Channel 48 */
67 /* _We_ call this UNII 2 */
68 CHAN5G(5260, 18), /* Channel 52 */
69 CHAN5G(5280, 19), /* Channel 56 */
70 CHAN5G(5300, 20), /* Channel 60 */
71 CHAN5G(5320, 21), /* Channel 64 */
72 /* _We_ call this "Middle band" */
73 CHAN5G(5500, 22), /* Channel 100 */
74 CHAN5G(5520, 23), /* Channel 104 */
75 CHAN5G(5540, 24), /* Channel 108 */
76 CHAN5G(5560, 25), /* Channel 112 */
77 CHAN5G(5580, 26), /* Channel 116 */
78 CHAN5G(5600, 27), /* Channel 120 */
79 CHAN5G(5620, 28), /* Channel 124 */
80 CHAN5G(5640, 29), /* Channel 128 */
81 CHAN5G(5660, 30), /* Channel 132 */
82 CHAN5G(5680, 31), /* Channel 136 */
83 CHAN5G(5700, 32), /* Channel 140 */
84 /* _We_ call this UNII 3 */
85 CHAN5G(5745, 33), /* Channel 149 */
86 CHAN5G(5765, 34), /* Channel 153 */
87 CHAN5G(5785, 35), /* Channel 157 */
88 CHAN5G(5805, 36), /* Channel 161 */
89 CHAN5G(5825, 37), /* Channel 165 */
92 /* Atheros hardware rate code addition for short premble */
93 #define SHPCHECK(__hw_rate, __flags) \
94 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
96 #define RATE(_bitrate, _hw_rate, _flags) { \
97 .bitrate = (_bitrate), \
99 .hw_value = (_hw_rate), \
100 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
103 static struct ieee80211_rate ath9k_legacy_rates[] = {
105 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
106 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
107 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
118 #ifdef CONFIG_MAC80211_LEDS
119 static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
120 { .throughput = 0 * 1024, .blink_time = 334 },
121 { .throughput = 1 * 1024, .blink_time = 260 },
122 { .throughput = 5 * 1024, .blink_time = 220 },
123 { .throughput = 10 * 1024, .blink_time = 190 },
124 { .throughput = 20 * 1024, .blink_time = 170 },
125 { .throughput = 50 * 1024, .blink_time = 150 },
126 { .throughput = 70 * 1024, .blink_time = 130 },
127 { .throughput = 100 * 1024, .blink_time = 110 },
128 { .throughput = 200 * 1024, .blink_time = 80 },
129 { .throughput = 300 * 1024, .blink_time = 50 },
133 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
137 if (atomic_read(&priv->htc->tgt_ready) > 0) {
138 atomic_dec(&priv->htc->tgt_ready);
142 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
143 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
145 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
149 atomic_dec(&priv->htc->tgt_ready);
154 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
156 ath9k_hw_deinit(priv->ah);
161 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
163 struct ieee80211_hw *hw = priv->hw;
165 wiphy_rfkill_stop_polling(hw->wiphy);
166 ath9k_deinit_leds(priv);
167 ieee80211_unregister_hw(hw);
168 ath9k_rx_cleanup(priv);
169 ath9k_tx_cleanup(priv);
170 ath9k_deinit_priv(priv);
173 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
177 enum htc_endpoint_id,
179 enum htc_endpoint_id *ep_id)
181 struct htc_service_connreq req;
183 memset(&req, 0, sizeof(struct htc_service_connreq));
185 req.service_id = service_id;
186 req.ep_callbacks.priv = priv;
187 req.ep_callbacks.rx = ath9k_htc_rxep;
188 req.ep_callbacks.tx = tx;
190 return htc_connect_service(priv->htc, &req, ep_id);
193 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
199 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
204 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
210 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
217 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
223 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
229 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
235 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
241 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
247 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
253 * Setup required credits before initializing HTC.
254 * This is a bit hacky, but, since queuing is done in
255 * the HIF layer, shouldn't matter much.
258 if (IS_AR7010_DEVICE(drv_info))
259 priv->htc->credits = 45;
261 priv->htc->credits = 33;
263 ret = htc_init(priv->htc);
267 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
273 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
277 static int ath9k_reg_notifier(struct wiphy *wiphy,
278 struct regulatory_request *request)
280 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
281 struct ath9k_htc_priv *priv = hw->priv;
283 return ath_reg_notifier_apply(wiphy, request,
284 ath9k_hw_regulatory(priv->ah));
287 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
289 struct ath_hw *ah = (struct ath_hw *) hw_priv;
290 struct ath_common *common = ath9k_hw_common(ah);
291 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
292 __be32 val, reg = cpu_to_be32(reg_offset);
295 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
296 (u8 *) ®, sizeof(reg),
297 (u8 *) &val, sizeof(val),
300 ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n",
305 return be32_to_cpu(val);
308 static void ath9k_multi_regread(void *hw_priv, u32 *addr,
311 struct ath_hw *ah = (struct ath_hw *) hw_priv;
312 struct ath_common *common = ath9k_hw_common(ah);
313 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
318 for (i = 0; i < count; i++) {
319 tmpaddr[i] = cpu_to_be32(addr[i]);
322 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
323 (u8 *)tmpaddr , sizeof(u32) * count,
324 (u8 *)tmpval, sizeof(u32) * count,
328 "Multiple REGISTER READ FAILED (count: %d)\n", count);
331 for (i = 0; i < count; i++) {
332 val[i] = be32_to_cpu(tmpval[i]);
336 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
338 struct ath_hw *ah = (struct ath_hw *) hw_priv;
339 struct ath_common *common = ath9k_hw_common(ah);
340 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
341 const __be32 buf[2] = {
342 cpu_to_be32(reg_offset),
347 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
348 (u8 *) &buf, sizeof(buf),
349 (u8 *) &val, sizeof(val),
352 ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n",
357 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
359 struct ath_hw *ah = (struct ath_hw *) hw_priv;
360 struct ath_common *common = ath9k_hw_common(ah);
361 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
365 mutex_lock(&priv->wmi->multi_write_mutex);
367 /* Store the register/value */
368 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
369 cpu_to_be32(reg_offset);
370 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
373 priv->wmi->multi_write_idx++;
375 /* If the buffer is full, send it out. */
376 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
377 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
378 (u8 *) &priv->wmi->multi_write,
379 sizeof(struct register_write) * priv->wmi->multi_write_idx,
380 (u8 *) &rsp_status, sizeof(rsp_status),
384 "REGISTER WRITE FAILED, multi len: %d\n",
385 priv->wmi->multi_write_idx);
387 priv->wmi->multi_write_idx = 0;
390 mutex_unlock(&priv->wmi->multi_write_mutex);
393 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
395 struct ath_hw *ah = (struct ath_hw *) hw_priv;
396 struct ath_common *common = ath9k_hw_common(ah);
397 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
399 if (atomic_read(&priv->wmi->mwrite_cnt))
400 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
402 ath9k_regwrite_single(hw_priv, val, reg_offset);
405 static void ath9k_enable_regwrite_buffer(void *hw_priv)
407 struct ath_hw *ah = (struct ath_hw *) hw_priv;
408 struct ath_common *common = ath9k_hw_common(ah);
409 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
411 atomic_inc(&priv->wmi->mwrite_cnt);
414 static void ath9k_regwrite_flush(void *hw_priv)
416 struct ath_hw *ah = (struct ath_hw *) hw_priv;
417 struct ath_common *common = ath9k_hw_common(ah);
418 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
422 atomic_dec(&priv->wmi->mwrite_cnt);
424 mutex_lock(&priv->wmi->multi_write_mutex);
426 if (priv->wmi->multi_write_idx) {
427 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
428 (u8 *) &priv->wmi->multi_write,
429 sizeof(struct register_write) * priv->wmi->multi_write_idx,
430 (u8 *) &rsp_status, sizeof(rsp_status),
434 "REGISTER WRITE FAILED, multi len: %d\n",
435 priv->wmi->multi_write_idx);
437 priv->wmi->multi_write_idx = 0;
440 mutex_unlock(&priv->wmi->multi_write_mutex);
443 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
447 val = ath9k_regread(hw_priv, reg_offset);
450 ath9k_regwrite(hw_priv, val, reg_offset);
454 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
456 *csz = L1_CACHE_BYTES >> 2;
459 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
461 struct ath_hw *ah = (struct ath_hw *) common->ah;
463 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
465 if (!ath9k_hw_wait(ah,
466 AR_EEPROM_STATUS_DATA,
467 AR_EEPROM_STATUS_DATA_BUSY |
468 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
472 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
473 AR_EEPROM_STATUS_DATA_VAL);
478 static const struct ath_bus_ops ath9k_usb_bus_ops = {
479 .ath_bus_type = ATH_USB,
480 .read_cachesize = ath_usb_read_cachesize,
481 .eeprom_read = ath_usb_eeprom_read,
484 static void setup_ht_cap(struct ath9k_htc_priv *priv,
485 struct ieee80211_sta_ht_cap *ht_info)
487 struct ath_common *common = ath9k_hw_common(priv->ah);
488 u8 tx_streams, rx_streams;
491 ht_info->ht_supported = true;
492 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
493 IEEE80211_HT_CAP_SM_PS |
494 IEEE80211_HT_CAP_SGI_40 |
495 IEEE80211_HT_CAP_DSSSCCK40;
497 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
498 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
500 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
502 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
503 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
505 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
507 /* ath9k_htc supports only 1 or 2 stream devices */
508 tx_streams = ath9k_cmn_count_streams(priv->ah->txchainmask, 2);
509 rx_streams = ath9k_cmn_count_streams(priv->ah->rxchainmask, 2);
511 ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n",
512 tx_streams, rx_streams);
514 if (tx_streams != rx_streams) {
515 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
516 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
517 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
520 for (i = 0; i < rx_streams; i++)
521 ht_info->mcs.rx_mask[i] = 0xff;
523 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
526 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
528 struct ath_common *common = ath9k_hw_common(priv->ah);
531 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
532 priv->hwq_map[i] = -1;
534 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
535 if (priv->beaconq == -1) {
536 ath_err(common, "Unable to setup BEACON xmit queue\n");
540 priv->cabq = ath9k_htc_cabq_setup(priv);
541 if (priv->cabq == -1) {
542 ath_err(common, "Unable to setup CAB xmit queue\n");
546 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
547 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
551 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
552 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
555 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
556 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
559 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
560 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
570 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
572 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
573 priv->sbands[IEEE80211_BAND_2GHZ].channels =
575 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
576 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
577 ARRAY_SIZE(ath9k_2ghz_channels);
578 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
579 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
580 ARRAY_SIZE(ath9k_legacy_rates);
583 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
584 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
585 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
586 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
587 ARRAY_SIZE(ath9k_5ghz_channels);
588 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
589 ath9k_legacy_rates + 4;
590 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
591 ARRAY_SIZE(ath9k_legacy_rates) - 4;
595 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
597 struct ath_common *common = ath9k_hw_common(priv->ah);
599 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
601 priv->ah->opmode = NL80211_IFTYPE_STATION;
604 static int ath9k_init_priv(struct ath9k_htc_priv *priv,
605 u16 devid, char *product,
608 struct ath_hw *ah = NULL;
609 struct ath_common *common;
610 int i, ret = 0, csz = 0;
612 priv->op_flags |= OP_INVALID;
614 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
618 ah->hw_version.devid = devid;
619 ah->hw_version.usbdev = drv_info;
620 ah->ah_flags |= AH_USE_EEPROM;
621 ah->reg_ops.read = ath9k_regread;
622 ah->reg_ops.multi_read = ath9k_multi_regread;
623 ah->reg_ops.write = ath9k_regwrite;
624 ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
625 ah->reg_ops.write_flush = ath9k_regwrite_flush;
626 ah->reg_ops.rmw = ath9k_reg_rmw;
629 common = ath9k_hw_common(ah);
630 common->ops = &ah->reg_ops;
631 common->bus_ops = &ath9k_usb_bus_ops;
633 common->hw = priv->hw;
635 common->debug_mask = ath9k_debug;
637 spin_lock_init(&priv->beacon_lock);
638 spin_lock_init(&priv->tx.tx_lock);
639 mutex_init(&priv->mutex);
640 mutex_init(&priv->htc_pm_lock);
641 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
642 (unsigned long)priv);
643 tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet,
644 (unsigned long)priv);
645 INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
646 INIT_WORK(&priv->ps_work, ath9k_ps_work);
647 INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
648 setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer,
649 (unsigned long)priv);
652 * Cache line size is used to size and align various
653 * structures used to communicate with the hardware.
655 ath_read_cachesize(common, &csz);
656 common->cachelsz = csz << 2; /* convert to bytes */
658 ret = ath9k_hw_init(ah);
661 "Unable to initialize hardware; initialization status: %d\n",
666 ret = ath9k_init_queues(priv);
670 for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
671 priv->cur_beacon_conf.bslot[i] = NULL;
673 ath9k_cmn_init_crypto(ah);
674 ath9k_init_channels_rates(priv);
675 ath9k_init_misc(priv);
676 ath9k_htc_init_btcoex(priv, product);
690 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
691 struct ieee80211_hw *hw)
693 struct ath_common *common = ath9k_hw_common(priv->ah);
695 hw->flags = IEEE80211_HW_SIGNAL_DBM |
696 IEEE80211_HW_AMPDU_AGGREGATION |
697 IEEE80211_HW_SPECTRUM_MGMT |
698 IEEE80211_HW_HAS_RATE_CONTROL |
699 IEEE80211_HW_RX_INCLUDES_FCS |
700 IEEE80211_HW_SUPPORTS_PS |
701 IEEE80211_HW_PS_NULLFUNC_STACK |
702 IEEE80211_HW_REPORTS_TX_ACK_STATUS |
703 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
705 hw->wiphy->interface_modes =
706 BIT(NL80211_IFTYPE_STATION) |
707 BIT(NL80211_IFTYPE_ADHOC) |
708 BIT(NL80211_IFTYPE_AP) |
709 BIT(NL80211_IFTYPE_P2P_GO) |
710 BIT(NL80211_IFTYPE_P2P_CLIENT);
712 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
714 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
717 hw->channel_change_time = 5000;
718 hw->max_listen_interval = 10;
720 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
721 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
723 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
724 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
725 sizeof(struct htc_frame_hdr) + 4;
727 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
728 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
729 &priv->sbands[IEEE80211_BAND_2GHZ];
730 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
731 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
732 &priv->sbands[IEEE80211_BAND_5GHZ];
734 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
735 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
737 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
738 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
740 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
743 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
746 static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
748 struct ieee80211_hw *hw = priv->hw;
749 struct wmi_fw_version cmd_rsp;
752 memset(&cmd_rsp, 0, sizeof(cmd_rsp));
754 WMI_CMD(WMI_GET_FW_VERSION);
758 priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
759 priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
761 snprintf(hw->wiphy->fw_version, ETHTOOL_BUSINFO_LEN, "%d.%d",
762 priv->fw_version_major,
763 priv->fw_version_minor);
765 dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
766 priv->fw_version_major,
767 priv->fw_version_minor);
770 * Check if the available FW matches the driver's
773 if (priv->fw_version_major != MAJOR_VERSION_REQ ||
774 priv->fw_version_minor != MINOR_VERSION_REQ) {
775 dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
776 MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
783 static int ath9k_init_device(struct ath9k_htc_priv *priv,
784 u16 devid, char *product, u32 drv_info)
786 struct ieee80211_hw *hw = priv->hw;
787 struct ath_common *common;
790 struct ath_regulatory *reg;
793 /* Bring up device */
794 error = ath9k_init_priv(priv, devid, product, drv_info);
799 common = ath9k_hw_common(ah);
800 ath9k_set_hw_capab(priv, hw);
802 error = ath9k_init_firmware_version(priv);
806 /* Initialize regulatory */
807 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
812 reg = &common->regulatory;
815 error = ath9k_tx_init(priv);
820 error = ath9k_rx_init(priv);
824 #ifdef CONFIG_MAC80211_LEDS
825 /* must be initialized before ieee80211_register_hw */
826 priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw,
827 IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink,
828 ARRAY_SIZE(ath9k_htc_tpt_blink));
831 /* Register with mac80211 */
832 error = ieee80211_register_hw(hw);
836 /* Handle world regulatory */
837 if (!ath_is_world_regd(reg)) {
838 error = regulatory_hint(hw->wiphy, reg->alpha2);
843 error = ath9k_htc_init_debug(priv->ah);
845 ath_err(common, "Unable to create debugfs files\n");
849 ath_dbg(common, CONFIG,
850 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n",
861 ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
862 wiphy_info(hw->wiphy, "%s\n", hw_name);
864 ath9k_init_leds(priv);
865 ath9k_start_rfkill_poll(priv);
870 ieee80211_unregister_hw(hw);
872 ath9k_rx_cleanup(priv);
874 ath9k_tx_cleanup(priv);
880 ath9k_deinit_priv(priv);
885 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
886 u16 devid, char *product, u32 drv_info)
888 struct ieee80211_hw *hw;
889 struct ath9k_htc_priv *priv;
892 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
898 priv->htc = htc_handle;
900 htc_handle->drv_priv = priv;
901 SET_IEEE80211_DEV(hw, priv->dev);
903 ret = ath9k_htc_wait_for_target(priv);
907 priv->wmi = ath9k_init_wmi(priv);
913 ret = ath9k_init_htc_services(priv, devid, drv_info);
917 ret = ath9k_init_device(priv, devid, product, drv_info);
924 ath9k_deinit_wmi(priv);
926 ieee80211_free_hw(hw);
930 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
932 if (htc_handle->drv_priv) {
934 /* Check if the device has been yanked out. */
936 htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
938 ath9k_deinit_device(htc_handle->drv_priv);
939 ath9k_deinit_wmi(htc_handle->drv_priv);
940 ieee80211_free_hw(htc_handle->drv_priv->hw);
946 void ath9k_htc_suspend(struct htc_target *htc_handle)
948 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
951 int ath9k_htc_resume(struct htc_target *htc_handle)
953 struct ath9k_htc_priv *priv = htc_handle->drv_priv;
956 ret = ath9k_htc_wait_for_target(priv);
960 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
961 priv->ah->hw_version.usbdev);
966 static int __init ath9k_htc_init(void)
968 if (ath9k_hif_usb_init() < 0) {
970 "ath9k_htc: No USB devices found,"
971 " driver not installed.\n");
977 module_init(ath9k_htc_init);
979 static void __exit ath9k_htc_exit(void)
981 ath9k_hif_usb_exit();
982 printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
984 module_exit(ath9k_htc_exit);