drivers/net/wireless/ath/ath9k/link.c

   1 /*
   2  * Copyright (c) 2012 Qualcomm Atheros, Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "ath9k.h"
  18
  19 /*
  20  * TX polling - checks if the TX engine is stuck somewhere
  21  * and issues a chip reset if so.
  22  */
  23 void ath_tx_complete_poll_work(struct work_struct *work)
  24 {
  25         struct ath_softc *sc = container_of(work, struct ath_softc,
  26                                             tx_complete_work.work);
  27         struct ath_txq *txq;
  28         int i;
  29         bool needreset = false;
  30 #ifdef CONFIG_ATH9K_DEBUGFS
  31         sc->tx_complete_poll_work_seen++;
  32 #endif
  33
  34         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
  35                 if (ATH_TXQ_SETUP(sc, i)) {
  36                         txq = &sc->tx.txq[i];
  37                         ath_txq_lock(sc, txq);
  38                         if (txq->axq_depth) {
  39                                 if (txq->axq_tx_inprogress) {
  40                                         needreset = true;
  41                                         ath_txq_unlock(sc, txq);
  42                                         break;
  43                                 } else {
  44                                         txq->axq_tx_inprogress = true;
  45                                 }
  46                         }
  47                         ath_txq_unlock_complete(sc, txq);
  48                 }
  49
  50         if (needreset) {
  51                 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
  52                         "tx hung, resetting the chip\n");
  53                 RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
  54                 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  55                 return;
  56         }
  57
  58         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
  59                                      msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT));
  60 }
  61
  62 /*
  63  * Checks if the BB/MAC is hung.
  64  */
  65 void ath_hw_check(struct work_struct *work)
  66 {
  67         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  68         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  69         unsigned long flags;
  70         int busy;
  71         u8 is_alive, nbeacon = 1;
  72
  73         ath9k_ps_wakeup(sc);
  74         is_alive = ath9k_hw_check_alive(sc->sc_ah);
  75
  76         if (is_alive && !AR_SREV_9300(sc->sc_ah))
  77                 goto out;
  78         else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
  79                 ath_dbg(common, RESET,
  80                         "DCU stuck is detected. Schedule chip reset\n");
  81                 RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);
  82                 goto sched_reset;
  83         }
  84
  85         spin_lock_irqsave(&common->cc_lock, flags);
  86         busy = ath_update_survey_stats(sc);
  87         spin_unlock_irqrestore(&common->cc_lock, flags);
  88
  89         ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
  90                 busy, sc->hw_busy_count + 1);
  91         if (busy >= 99) {
  92                 if (++sc->hw_busy_count >= 3) {
  93                         RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
  94                         goto sched_reset;
  95                 }
  96         } else if (busy >= 0) {
  97                 sc->hw_busy_count = 0;
  98                 nbeacon = 3;
  99         }
 100
 101         ath_start_rx_poll(sc, nbeacon);
 102         goto out;
 103
 104 sched_reset:
 105         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 106 out:
 107         ath9k_ps_restore(sc);
 108 }
 109
 110 /*
 111  * PLL-WAR for AR9485/AR9340
 112  */
 113 static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
 114 {
 115         static int count;
 116         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 117
 118         if (pll_sqsum >= 0x40000) {
 119                 count++;
 120                 if (count == 3) {
 121                         ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
 122                         RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
 123                         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 124                         count = 0;
 125                         return true;
 126                 }
 127         } else {
 128                 count = 0;
 129         }
 130
 131         return false;
 132 }
 133
 134 void ath_hw_pll_work(struct work_struct *work)
 135 {
 136         u32 pll_sqsum;
 137         struct ath_softc *sc = container_of(work, struct ath_softc,
 138                                             hw_pll_work.work);
 139
 140         ath9k_ps_wakeup(sc);
 141         pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
 142         ath9k_ps_restore(sc);
 143         if (ath_hw_pll_rx_hang_check(sc, pll_sqsum))
 144                 return;
 145
 146         ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 147                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 148 }
 149
 150 /*
 151  * RX Polling - monitors baseband hangs.
 152  */
 153 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)
 154 {
 155         if (!AR_SREV_9300(sc->sc_ah))
 156                 return;
 157
 158         if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
 159                 return;
 160
 161         mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies
 162                   (nbeacon * sc->cur_beacon_conf.beacon_interval));
 163 }
 164
 165 void ath_rx_poll(unsigned long data)
 166 {
 167         struct ath_softc *sc = (struct ath_softc *)data;
 168
 169         ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 170 }
 171
 172 /*
 173  * PA Pre-distortion.
 174  */
 175 static void ath_paprd_activate(struct ath_softc *sc)
 176 {
 177         struct ath_hw *ah = sc->sc_ah;
 178         struct ath9k_hw_cal_data *caldata = ah->caldata;
 179         int chain;
 180
 181         if (!caldata || !caldata->paprd_done)
 182                 return;
 183
 184         ath9k_ps_wakeup(sc);
 185         ar9003_paprd_enable(ah, false);
 186         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 187                 if (!(ah->txchainmask & BIT(chain)))
 188                         continue;
 189
 190                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 191         }
 192
 193         ar9003_paprd_enable(ah, true);
 194         ath9k_ps_restore(sc);
 195 }
 196
 197 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 198 {
 199         struct ieee80211_hw *hw = sc->hw;
 200         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 201         struct ath_hw *ah = sc->sc_ah;
 202         struct ath_common *common = ath9k_hw_common(ah);
 203         struct ath_tx_control txctl;
 204         int time_left;
 205
 206         memset(&txctl, 0, sizeof(txctl));
 207         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 208
 209         memset(tx_info, 0, sizeof(*tx_info));
 210         tx_info->band = hw->conf.channel->band;
 211         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 212         tx_info->control.rates[0].idx = 0;
 213         tx_info->control.rates[0].count = 1;
 214         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 215         tx_info->control.rates[1].idx = -1;
 216
 217         init_completion(&sc->paprd_complete);
 218         txctl.paprd = BIT(chain);
 219
 220         if (ath_tx_start(hw, skb, &txctl) != 0) {
 221                 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
 222                 dev_kfree_skb_any(skb);
 223                 return false;
 224         }
 225
 226         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 227                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 228
 229         if (!time_left)
 230                 ath_dbg(common, CALIBRATE,
 231                         "Timeout waiting for paprd training on TX chain %d\n",
 232                         chain);
 233
 234         return !!time_left;
 235 }
 236
 237 void ath_paprd_calibrate(struct work_struct *work)
 238 {
 239         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 240         struct ieee80211_hw *hw = sc->hw;
 241         struct ath_hw *ah = sc->sc_ah;
 242         struct ieee80211_hdr *hdr;
 243         struct sk_buff *skb = NULL;
 244         struct ath9k_hw_cal_data *caldata = ah->caldata;
 245         struct ath_common *common = ath9k_hw_common(ah);
 246         int ftype;
 247         int chain_ok = 0;
 248         int chain;
 249         int len = 1800;
 250
 251         if (!caldata)
 252                 return;
 253
 254         ath9k_ps_wakeup(sc);
 255
 256         if (ar9003_paprd_init_table(ah) < 0)
 257                 goto fail_paprd;
 258
 259         skb = alloc_skb(len, GFP_KERNEL);
 260         if (!skb)
 261                 goto fail_paprd;
 262
 263         skb_put(skb, len);
 264         memset(skb->data, 0, len);
 265         hdr = (struct ieee80211_hdr *)skb->data;
 266         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 267         hdr->frame_control = cpu_to_le16(ftype);
 268         hdr->duration_id = cpu_to_le16(10);
 269         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 270         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 271         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 272
 273         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 274                 if (!(ah->txchainmask & BIT(chain)))
 275                         continue;
 276
 277                 chain_ok = 0;
 278
 279                 ath_dbg(common, CALIBRATE,
 280                         "Sending PAPRD frame for thermal measurement on chain %d\n",
 281                         chain);
 282                 if (!ath_paprd_send_frame(sc, skb, chain))
 283                         goto fail_paprd;
 284
 285                 ar9003_paprd_setup_gain_table(ah, chain);
 286
 287                 ath_dbg(common, CALIBRATE,
 288                         "Sending PAPRD training frame on chain %d\n", chain);
 289                 if (!ath_paprd_send_frame(sc, skb, chain))
 290                         goto fail_paprd;
 291
 292                 if (!ar9003_paprd_is_done(ah)) {
 293                         ath_dbg(common, CALIBRATE,
 294                                 "PAPRD not yet done on chain %d\n", chain);
 295                         break;
 296                 }
 297
 298                 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
 299                         ath_dbg(common, CALIBRATE,
 300                                 "PAPRD create curve failed on chain %d\n",
 301                                 chain);
 302                         break;
 303                 }
 304
 305                 chain_ok = 1;
 306         }
 307         kfree_skb(skb);
 308
 309         if (chain_ok) {
 310                 caldata->paprd_done = true;
 311                 ath_paprd_activate(sc);
 312         }
 313
 314 fail_paprd:
 315         ath9k_ps_restore(sc);
 316 }
 317
 318 /*
 319  *  ANI performs periodic noise floor calibration
 320  *  that is used to adjust and optimize the chip performance.  This
 321  *  takes environmental changes (location, temperature) into account.
 322  *  When the task is complete, it reschedules itself depending on the
 323  *  appropriate interval that was calculated.
 324  */
 325 void ath_ani_calibrate(unsigned long data)
 326 {
 327         struct ath_softc *sc = (struct ath_softc *)data;
 328         struct ath_hw *ah = sc->sc_ah;
 329         struct ath_common *common = ath9k_hw_common(ah);
 330         bool longcal = false;
 331         bool shortcal = false;
 332         bool aniflag = false;
 333         unsigned int timestamp = jiffies_to_msecs(jiffies);
 334         u32 cal_interval, short_cal_interval, long_cal_interval;
 335         unsigned long flags;
 336
 337         if (ah->caldata && ah->caldata->nfcal_interference)
 338                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 339         else
 340                 long_cal_interval = ATH_LONG_CALINTERVAL;
 341
 342         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 343                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 344
 345         /* Only calibrate if awake */
 346         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 347                 goto set_timer;
 348
 349         ath9k_ps_wakeup(sc);
 350
 351         /* Long calibration runs independently of short calibration. */
 352         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 353                 longcal = true;
 354                 common->ani.longcal_timer = timestamp;
 355         }
 356
 357         /* Short calibration applies only while caldone is false */
 358         if (!common->ani.caldone) {
 359                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 360                         shortcal = true;
 361                         common->ani.shortcal_timer = timestamp;
 362                         common->ani.resetcal_timer = timestamp;
 363                 }
 364         } else {
 365                 if ((timestamp - common->ani.resetcal_timer) >=
 366                     ATH_RESTART_CALINTERVAL) {
 367                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 368                         if (common->ani.caldone)
 369                                 common->ani.resetcal_timer = timestamp;
 370                 }
 371         }
 372
 373         /* Verify whether we must check ANI */
 374         if (sc->sc_ah->config.enable_ani
 375             && (timestamp - common->ani.checkani_timer) >=
 376             ah->config.ani_poll_interval) {
 377                 aniflag = true;
 378                 common->ani.checkani_timer = timestamp;
 379         }
 380
 381         /* Call ANI routine if necessary */
 382         if (aniflag) {
 383                 spin_lock_irqsave(&common->cc_lock, flags);
 384                 ath9k_hw_ani_monitor(ah, ah->curchan);
 385                 ath_update_survey_stats(sc);
 386                 spin_unlock_irqrestore(&common->cc_lock, flags);
 387         }
 388
 389         /* Perform calibration if necessary */
 390         if (longcal || shortcal) {
 391                 common->ani.caldone =
 392                         ath9k_hw_calibrate(ah, ah->curchan,
 393                                            ah->rxchainmask, longcal);
 394         }
 395
 396         ath_dbg(common, ANI,
 397                 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
 398                 jiffies,
 399                 longcal ? "long" : "", shortcal ? "short" : "",
 400                 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
 401
 402         ath9k_ps_restore(sc);
 403
 404 set_timer:
 405         /*
 406         * Set timer interval based on previous results.
 407         * The interval must be the shortest necessary to satisfy ANI,
 408         * short calibration and long calibration.
 409         */
 410         ath9k_debug_samp_bb_mac(sc);
 411         cal_interval = ATH_LONG_CALINTERVAL;
 412         if (sc->sc_ah->config.enable_ani)
 413                 cal_interval = min(cal_interval,
 414                                    (u32)ah->config.ani_poll_interval);
 415         if (!common->ani.caldone)
 416                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 417
 418         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 419         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 420                 if (!ah->caldata->paprd_done)
 421                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 422                 else if (!ah->paprd_table_write_done)
 423                         ath_paprd_activate(sc);
 424         }
 425 }
 426
 427 void ath_start_ani(struct ath_common *common)
 428 {
 429         struct ath_hw *ah = common->ah;
 430         unsigned long timestamp = jiffies_to_msecs(jiffies);
 431         struct ath_softc *sc = (struct ath_softc *) common->priv;
 432
 433         if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags))
 434                 return;
 435
 436         if (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
 437                 return;
 438
 439         common->ani.longcal_timer = timestamp;
 440         common->ani.shortcal_timer = timestamp;
 441         common->ani.checkani_timer = timestamp;
 442
 443         mod_timer(&common->ani.timer,
 444                   jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 445 }
 446
 447 void ath_update_survey_nf(struct ath_softc *sc, int channel)
 448 {
 449         struct ath_hw *ah = sc->sc_ah;
 450         struct ath9k_channel *chan = &ah->channels[channel];
 451         struct survey_info *survey = &sc->survey[channel];
 452
 453         if (chan->noisefloor) {
 454                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 455                 survey->noise = ath9k_hw_getchan_noise(ah, chan);
 456         }
 457 }
 458
 459 /*
 460  * Updates the survey statistics and returns the busy time since last
 461  * update in %, if the measurement duration was long enough for the
 462  * result to be useful, -1 otherwise.
 463  */
 464 int ath_update_survey_stats(struct ath_softc *sc)
 465 {
 466         struct ath_hw *ah = sc->sc_ah;
 467         struct ath_common *common = ath9k_hw_common(ah);
 468         int pos = ah->curchan - &ah->channels[0];
 469         struct survey_info *survey = &sc->survey[pos];
 470         struct ath_cycle_counters *cc = &common->cc_survey;
 471         unsigned int div = common->clockrate * 1000;
 472         int ret = 0;
 473
 474         if (!ah->curchan)
 475                 return -1;
 476
 477         if (ah->power_mode == ATH9K_PM_AWAKE)
 478                 ath_hw_cycle_counters_update(common);
 479
 480         if (cc->cycles > 0) {
 481                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 482                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 483                         SURVEY_INFO_CHANNEL_TIME_RX |
 484                         SURVEY_INFO_CHANNEL_TIME_TX;
 485                 survey->channel_time += cc->cycles / div;
 486                 survey->channel_time_busy += cc->rx_busy / div;
 487                 survey->channel_time_rx += cc->rx_frame / div;
 488                 survey->channel_time_tx += cc->tx_frame / div;
 489         }
 490
 491         if (cc->cycles < div)
 492                 return -1;
 493
 494         if (cc->cycles > 0)
 495                 ret = cc->rx_busy * 100 / cc->cycles;
 496
 497         memset(cc, 0, sizeof(*cc));
 498
 499         ath_update_survey_nf(sc, pos);
 500
 501         return ret;
 502 }