2 * Copyright (c) 2012-2014 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/netdevice.h>
21 #include <linux/wireless.h>
22 #include <net/cfg80211.h>
23 #include <linux/timex.h>
25 #define WIL_NAME "wil6210"
26 #define WIL_FW_NAME "wil6210.fw"
30 #define WIL_BOARD_MARLON (1)
31 #define WIL_BOARD_SPARROW (2)
32 const char * const name;
36 * extract bits [@b0:@b1] (inclusive) from the value @x
37 * it should be @b0 <= @b1, or result is incorrect
39 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
41 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
44 #define WIL6210_MEM_SIZE (2*1024*1024UL)
46 #define WIL6210_RX_RING_SIZE (128)
47 #define WIL6210_TX_RING_SIZE (512)
48 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
49 #define WIL6210_MAX_CID (8) /* HW limit */
50 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
51 #define WIL6210_ITR_TRSH (10000) /* arbitrary - about 15 IRQs/msec */
52 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */
53 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000)
54 #define WIL6210_SCAN_TO msecs_to_jiffies(10000)
56 /* Hardware definitions begin */
60 * RGF File | Host addr | FW addr
62 * user_rgf | 0x000000 | 0x880000
63 * dma_rgf | 0x001000 | 0x881000
64 * pcie_rgf | 0x002000 | 0x882000
68 /* Where various structures placed in host address space */
69 #define WIL6210_FW_HOST_OFF (0x880000UL)
71 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
74 * Interrupt control registers block
76 * each interrupt controlled by the same bit in all registers
79 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
80 u32 ICR; /* Cause, W1C/COR depending on ICC */
81 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
82 u32 ICS; /* Cause Set, WO */
83 u32 IMV; /* Mask, RW+S/C */
84 u32 IMS; /* Mask Set, write 1 to set */
85 u32 IMC; /* Mask Clear, write 1 to clear */
88 /* registers - FW addresses */
89 #define RGF_USER_USAGE_1 (0x880004)
90 #define RGF_USER_USAGE_6 (0x880018)
91 #define RGF_USER_HW_MACHINE_STATE (0x8801dc)
92 #define HW_MACHINE_BOOT_DONE (0x3fffffd)
93 #define RGF_USER_USER_CPU_0 (0x8801e0)
94 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */
95 #define RGF_USER_MAC_CPU_0 (0x8801fc)
96 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */
97 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
98 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */
99 #define RGF_USER_CLKS_CTL_0 (0x880abc)
100 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */
101 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */
102 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
103 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
104 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
105 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
106 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
107 #define BIT_HPAL_PERST_FROM_PAD BIT(6)
108 #define BIT_CAR_PERST_RST BIT(7)
109 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
110 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
111 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18)
112 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
114 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
115 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
116 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
117 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
118 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
119 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
120 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
121 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
122 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
124 /* Interrupt moderation control */
125 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
126 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
127 #define RGF_DMA_ITR_CNT_CRL (0x881c64)
128 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
129 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
130 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
131 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
132 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
134 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
135 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
136 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
137 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
138 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
139 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
141 #define RGF_HP_CTRL (0x88265c)
142 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
144 /* MAC timer, usec, for packet lifetime */
145 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
147 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
149 /* popular locations */
150 #define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
151 #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
152 offsetof(struct RGF_ICR, ICS))
153 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
155 /* ISR register bits */
156 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
157 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
158 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
160 /* Hardware definitions end */
162 u32 from; /* linker address - from, inclusive */
163 u32 to; /* linker address - to, exclusive */
164 u32 host; /* PCI/Host address - BAR0 + 0x880000 */
165 const char *name; /* for debugfs */
168 /* array size should be in sync with actual definition in the wmi.c */
169 extern const struct fw_map fw_mapping[7];
172 * mk_cidxtid - construct @cidxtid field
176 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
178 static inline u8 mk_cidxtid(u8 cid, u8 tid)
180 return ((tid & 0xf) << 4) | (cid & 0xf);
184 * parse_cidxtid - parse @cidxtid field
185 * @cid: store CID value here
186 * @tid: store TID value here
188 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
190 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid)
192 *cid = cidxtid & 0xf;
193 *tid = (cidxtid >> 4) & 0xf;
196 struct wil6210_mbox_ring {
198 u16 entry_size; /* max. size of mbox entry, incl. all headers */
204 struct wil6210_mbox_ring_desc {
209 /* at HOST_OFF_WIL6210_MBOX_CTL */
210 struct wil6210_mbox_ctl {
211 struct wil6210_mbox_ring tx;
212 struct wil6210_mbox_ring rx;
215 struct wil6210_mbox_hdr {
217 __le16 len; /* payload, bytes after this header */
223 #define WIL_MBOX_HDR_TYPE_WMI (0)
225 /* max. value for wil6210_mbox_hdr.len */
226 #define MAX_MBOXITEM_SIZE (240)
229 * struct wil6210_mbox_hdr_wmi - WMI header
232 * 00 - default, created by FW
233 * 01..0f - WiFi ports, driver to create
236 * @id: command/event ID
237 * @timestamp: FW fills for events, free-running msec timer
239 struct wil6210_mbox_hdr_wmi {
246 struct pending_wmi_event {
247 struct list_head list;
249 struct wil6210_mbox_hdr hdr;
250 struct wil6210_mbox_hdr_wmi wmi;
255 enum { /* for wil_ctx.mapped_as */
256 wil_mapped_as_none = 0,
257 wil_mapped_as_single = 1,
258 wil_mapped_as_page = 2,
262 * struct wil_ctx - software context for Vring descriptor
274 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
275 u16 size; /* number of vring_desc elements */
278 u32 hwtail; /* write here to inform hw */
279 struct wil_ctx *ctx; /* ctx[size] - software context */
283 * Additional data for Tx Vring
285 struct vring_tx_data {
287 cycles_t idle, last_idle, begin;
290 enum { /* for wil6210_priv.status */
291 wil_status_fwready = 0,
292 wil_status_fwconnecting,
293 wil_status_fwconnected,
295 wil_status_reset_done,
296 wil_status_irqen, /* FIXME: interrupts enabled - for debug */
297 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */
303 * struct tid_ampdu_rx - TID aggregation information (Rx).
305 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
306 * @reorder_time: jiffies when skb was added
307 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
308 * @reorder_timer: releases expired frames from the reorder buffer.
309 * @last_rx: jiffies of last rx activity
310 * @head_seq_num: head sequence number in reordering buffer.
311 * @stored_mpdu_num: number of MPDUs in reordering buffer
312 * @ssn: Starting Sequence Number expected to be aggregated.
313 * @buf_size: buffer size for incoming A-MPDUs
314 * @timeout: reset timer value (in TUs).
315 * @dialog_token: dialog token for aggregation session
316 * @rcu_head: RCU head used for freeing this struct
317 * @reorder_lock: serializes access to reorder buffer, see below.
319 * This structure's lifetime is managed by RCU, assignments to
320 * the array holding it must hold the aggregation mutex.
322 * The @reorder_lock is used to protect the members of this
323 * struct, except for @timeout, @buf_size and @dialog_token,
324 * which are constant across the lifetime of the struct (the
325 * dialog token being used only for debugging).
327 struct wil_tid_ampdu_rx {
328 spinlock_t reorder_lock; /* see above */
329 struct sk_buff **reorder_buf;
330 unsigned long *reorder_time;
331 struct timer_list session_timer;
332 struct timer_list reorder_timer;
333 unsigned long last_rx;
341 bool first_time; /* is it 1-st time this buffer used? */
344 enum wil_sta_status {
346 wil_sta_conn_pending = 1,
347 wil_sta_connected = 2,
350 #define WIL_STA_TID_NUM (16)
352 struct wil_net_stats {
353 unsigned long rx_packets;
354 unsigned long tx_packets;
355 unsigned long rx_bytes;
356 unsigned long tx_bytes;
357 unsigned long tx_errors;
358 unsigned long rx_dropped;
363 * struct wil_sta_info - data for peer
365 * Peer identified by its CID (connection ID)
366 * NIC performs beam forming for each peer;
367 * if no beam forming done, frame exchange is not
370 struct wil_sta_info {
372 enum wil_sta_status status;
373 struct wil_net_stats stats;
374 bool data_port_open; /* can send any data, not only EAPOL */
376 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
377 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
378 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
381 struct wil6210_priv {
382 struct pci_dev *pdev;
384 struct wireless_dev *wdev;
389 struct wil_board *board;
390 u8 n_mids; /* number of additional MIDs as reported by FW */
391 int recovery_count; /* num of FW recovery attempts in a short time */
392 unsigned long last_fw_recovery; /* jiffies of last fw recovery */
395 u32 secure_pcp; /* create secure PCP? */
397 /* cached ISR registers */
399 /* mailbox related */
400 struct mutex wmi_mutex;
401 struct wil6210_mbox_ctl mbox_ctl;
402 struct completion wmi_ready;
404 u16 reply_id; /**< wait for this WMI event */
407 struct workqueue_struct *wmi_wq; /* for deferred calls */
408 struct work_struct wmi_event_worker;
409 struct workqueue_struct *wmi_wq_conn; /* for connect worker */
410 struct work_struct connect_worker;
411 struct work_struct disconnect_worker;
412 struct work_struct fw_error_worker; /* for FW error recovery */
413 struct timer_list connect_timer;
414 struct timer_list scan_timer; /* detect scan timeout */
415 int pending_connect_cid;
416 struct list_head pending_wmi_ev;
418 * protect pending_wmi_ev
419 * - fill in IRQ from wil6210_irq_misc,
420 * - consumed in thread by wmi_event_worker
422 spinlock_t wmi_ev_lock;
423 struct napi_struct napi_rx;
424 struct napi_struct napi_tx;
426 struct vring vring_rx;
427 struct vring vring_tx[WIL6210_MAX_TX_RINGS];
428 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS];
429 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
430 struct wil_sta_info sta[WIL6210_MAX_CID];
432 struct cfg80211_scan_request *scan_request;
434 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
436 atomic_t isr_count_rx, isr_count_tx;
438 struct dentry *debug;
439 struct debugfs_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)];
442 #define wil_to_wiphy(i) (i->wdev->wiphy)
443 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
444 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
445 #define wil_to_wdev(i) (i->wdev)
446 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
447 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
448 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
449 #define wil_to_pcie_dev(i) (&i->pdev->dev)
451 int wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
452 int wil_err(struct wil6210_priv *wil, const char *fmt, ...);
453 int wil_info(struct wil6210_priv *wil, const char *fmt, ...);
454 #define wil_dbg(wil, fmt, arg...) do { \
455 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
456 wil_dbg_trace(wil, fmt, ##arg); \
459 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
460 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
461 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
462 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
464 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
465 groupsize, buf, len, ascii) \
466 print_hex_dump_debug("DBG[TXRX]" prefix_str,\
467 prefix_type, rowsize, \
468 groupsize, buf, len, ascii)
470 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
471 groupsize, buf, len, ascii) \
472 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
473 prefix_type, rowsize, \
474 groupsize, buf, len, ascii)
476 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
478 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
481 void *wil_if_alloc(struct device *dev, void __iomem *csr);
482 void wil_if_free(struct wil6210_priv *wil);
483 int wil_if_add(struct wil6210_priv *wil);
484 void wil_if_remove(struct wil6210_priv *wil);
485 int wil_priv_init(struct wil6210_priv *wil);
486 void wil_priv_deinit(struct wil6210_priv *wil);
487 int wil_reset(struct wil6210_priv *wil);
488 void wil_fw_error_recovery(struct wil6210_priv *wil);
489 void wil_link_on(struct wil6210_priv *wil);
490 void wil_link_off(struct wil6210_priv *wil);
491 int wil_up(struct wil6210_priv *wil);
492 int wil_down(struct wil6210_priv *wil);
493 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
494 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac);
496 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
497 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
498 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
499 struct wil6210_mbox_hdr *hdr);
500 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
501 void wmi_recv_cmd(struct wil6210_priv *wil);
502 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
503 u16 reply_id, void *reply, u8 reply_size, int to_msec);
504 void wmi_event_worker(struct work_struct *work);
505 void wmi_event_flush(struct wil6210_priv *wil);
506 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
507 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
508 int wmi_set_channel(struct wil6210_priv *wil, int channel);
509 int wmi_get_channel(struct wil6210_priv *wil, int *channel);
510 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
511 const void *mac_addr);
512 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
513 const void *mac_addr, int key_len, const void *key);
514 int wmi_echo(struct wil6210_priv *wil);
515 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
516 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
517 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
518 int wmi_rxon(struct wil6210_priv *wil, bool on);
519 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
520 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, u16 reason);
522 void wil6210_clear_irq(struct wil6210_priv *wil);
523 int wil6210_init_irq(struct wil6210_priv *wil, int irq);
524 void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
525 void wil6210_disable_irq(struct wil6210_priv *wil);
526 void wil6210_enable_irq(struct wil6210_priv *wil);
527 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev,
528 struct cfg80211_mgmt_tx_params *params,
531 int wil6210_debugfs_init(struct wil6210_priv *wil);
532 void wil6210_debugfs_remove(struct wil6210_priv *wil);
533 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid,
534 struct station_info *sinfo);
536 struct wireless_dev *wil_cfg80211_init(struct device *dev);
537 void wil_wdev_free(struct wil6210_priv *wil);
539 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
540 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
541 int wmi_pcp_stop(struct wil6210_priv *wil);
542 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid);
544 int wil_rx_init(struct wil6210_priv *wil);
545 void wil_rx_fini(struct wil6210_priv *wil);
548 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
550 void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
552 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
553 int wil_tx_complete(struct wil6210_priv *wil, int ringid);
554 void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
557 void wil_rx_handle(struct wil6210_priv *wil, int *quota);
558 void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
560 int wil_iftype_nl2wmi(enum nl80211_iftype type);
562 int wil_request_firmware(struct wil6210_priv *wil, const char *name);
563 #endif /* __WIL6210_H__ */