2 * Copyright (c) 2012-2014 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/netdevice.h>
21 #include <linux/wireless.h>
22 #include <net/cfg80211.h>
23 #include <linux/timex.h>
24 #include "wil_platform.h"
26 extern bool no_fw_recovery;
27 extern unsigned int mtu_max;
29 #define WIL_NAME "wil6210"
30 #define WIL_FW_NAME "wil6210.fw"
32 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
36 #define WIL_BOARD_MARLON (1)
37 #define WIL_BOARD_SPARROW (2)
38 const char * const name;
42 * extract bits [@b0:@b1] (inclusive) from the value @x
43 * it should be @b0 <= @b1, or result is incorrect
45 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
47 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
50 #define WIL6210_MEM_SIZE (2*1024*1024UL)
52 #define WIL6210_RX_RING_SIZE (128)
53 #define WIL6210_TX_RING_SIZE (512)
54 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
55 #define WIL6210_MAX_CID (8) /* HW limit */
56 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
57 /* Max supported by wil6210 value for interrupt threshold is 5sec. */
58 #define WIL6210_ITR_TRSH_MAX (5000000)
59 #define WIL6210_ITR_TRSH_DEFAULT (300) /* usec */
60 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */
61 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000)
62 #define WIL6210_SCAN_TO msecs_to_jiffies(10000)
64 /* Hardware definitions begin */
68 * RGF File | Host addr | FW addr
70 * user_rgf | 0x000000 | 0x880000
71 * dma_rgf | 0x001000 | 0x881000
72 * pcie_rgf | 0x002000 | 0x882000
76 /* Where various structures placed in host address space */
77 #define WIL6210_FW_HOST_OFF (0x880000UL)
79 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
82 * Interrupt control registers block
84 * each interrupt controlled by the same bit in all registers
87 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
88 u32 ICR; /* Cause, W1C/COR depending on ICC */
89 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
90 u32 ICS; /* Cause Set, WO */
91 u32 IMV; /* Mask, RW+S/C */
92 u32 IMS; /* Mask Set, write 1 to set */
93 u32 IMC; /* Mask Clear, write 1 to clear */
96 /* registers - FW addresses */
97 #define RGF_USER_USAGE_1 (0x880004)
98 #define RGF_USER_USAGE_6 (0x880018)
99 #define RGF_USER_HW_MACHINE_STATE (0x8801dc)
100 #define HW_MACHINE_BOOT_DONE (0x3fffffd)
101 #define RGF_USER_USER_CPU_0 (0x8801e0)
102 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */
103 #define RGF_USER_MAC_CPU_0 (0x8801fc)
104 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */
105 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
106 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */
107 #define RGF_USER_CLKS_CTL_0 (0x880abc)
108 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */
109 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */
110 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
111 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
112 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
113 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
114 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
115 #define BIT_HPAL_PERST_FROM_PAD BIT(6)
116 #define BIT_CAR_PERST_RST BIT(7)
117 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
118 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
119 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18)
120 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
121 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */
122 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2)
124 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
125 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
126 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
127 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
128 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
129 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
130 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
131 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
132 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
134 /* Interrupt moderation control */
135 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
136 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
137 #define RGF_DMA_ITR_CNT_CRL (0x881c64)
138 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
139 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
140 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
141 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
142 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
144 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
145 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
146 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
147 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
148 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
149 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
151 #define RGF_HP_CTRL (0x88265c)
152 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
154 /* MAC timer, usec, for packet lifetime */
155 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
157 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
158 #define RGF_CAF_OSC_CONTROL (0x88afa4)
159 #define BIT_CAF_OSC_XTAL_EN BIT(0)
160 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
161 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
163 /* popular locations */
164 #define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
165 #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
166 offsetof(struct RGF_ICR, ICS))
167 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
169 /* ISR register bits */
170 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
171 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
172 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
174 /* Hardware definitions end */
176 u32 from; /* linker address - from, inclusive */
177 u32 to; /* linker address - to, exclusive */
178 u32 host; /* PCI/Host address - BAR0 + 0x880000 */
179 const char *name; /* for debugfs */
182 /* array size should be in sync with actual definition in the wmi.c */
183 extern const struct fw_map fw_mapping[7];
186 * mk_cidxtid - construct @cidxtid field
190 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
192 static inline u8 mk_cidxtid(u8 cid, u8 tid)
194 return ((tid & 0xf) << 4) | (cid & 0xf);
198 * parse_cidxtid - parse @cidxtid field
199 * @cid: store CID value here
200 * @tid: store TID value here
202 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
204 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid)
206 *cid = cidxtid & 0xf;
207 *tid = (cidxtid >> 4) & 0xf;
210 struct wil6210_mbox_ring {
212 u16 entry_size; /* max. size of mbox entry, incl. all headers */
218 struct wil6210_mbox_ring_desc {
223 /* at HOST_OFF_WIL6210_MBOX_CTL */
224 struct wil6210_mbox_ctl {
225 struct wil6210_mbox_ring tx;
226 struct wil6210_mbox_ring rx;
229 struct wil6210_mbox_hdr {
231 __le16 len; /* payload, bytes after this header */
237 #define WIL_MBOX_HDR_TYPE_WMI (0)
239 /* max. value for wil6210_mbox_hdr.len */
240 #define MAX_MBOXITEM_SIZE (240)
243 * struct wil6210_mbox_hdr_wmi - WMI header
246 * 00 - default, created by FW
247 * 01..0f - WiFi ports, driver to create
250 * @id: command/event ID
251 * @timestamp: FW fills for events, free-running msec timer
253 struct wil6210_mbox_hdr_wmi {
260 struct pending_wmi_event {
261 struct list_head list;
263 struct wil6210_mbox_hdr hdr;
264 struct wil6210_mbox_hdr_wmi wmi;
269 enum { /* for wil_ctx.mapped_as */
270 wil_mapped_as_none = 0,
271 wil_mapped_as_single = 1,
272 wil_mapped_as_page = 2,
276 * struct wil_ctx - software context for Vring descriptor
288 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
289 u16 size; /* number of vring_desc elements */
292 u32 hwtail; /* write here to inform hw */
293 struct wil_ctx *ctx; /* ctx[size] - software context */
297 * Additional data for Tx Vring
299 struct vring_tx_data {
301 cycles_t idle, last_idle, begin;
304 enum { /* for wil6210_priv.status */
305 wil_status_fwready = 0,
306 wil_status_fwconnecting,
307 wil_status_fwconnected,
309 wil_status_reset_done,
310 wil_status_irqen, /* FIXME: interrupts enabled - for debug */
311 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */
317 * struct tid_ampdu_rx - TID aggregation information (Rx).
319 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
320 * @reorder_time: jiffies when skb was added
321 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
322 * @reorder_timer: releases expired frames from the reorder buffer.
323 * @last_rx: jiffies of last rx activity
324 * @head_seq_num: head sequence number in reordering buffer.
325 * @stored_mpdu_num: number of MPDUs in reordering buffer
326 * @ssn: Starting Sequence Number expected to be aggregated.
327 * @buf_size: buffer size for incoming A-MPDUs
328 * @timeout: reset timer value (in TUs).
329 * @dialog_token: dialog token for aggregation session
330 * @rcu_head: RCU head used for freeing this struct
332 * This structure's lifetime is managed by RCU, assignments to
333 * the array holding it must hold the aggregation mutex.
336 struct wil_tid_ampdu_rx {
337 struct sk_buff **reorder_buf;
338 unsigned long *reorder_time;
339 struct timer_list session_timer;
340 struct timer_list reorder_timer;
341 unsigned long last_rx;
349 bool first_time; /* is it 1-st time this buffer used? */
352 enum wil_sta_status {
354 wil_sta_conn_pending = 1,
355 wil_sta_connected = 2,
358 #define WIL_STA_TID_NUM (16)
360 struct wil_net_stats {
361 unsigned long rx_packets;
362 unsigned long tx_packets;
363 unsigned long rx_bytes;
364 unsigned long tx_bytes;
365 unsigned long tx_errors;
366 unsigned long rx_dropped;
371 * struct wil_sta_info - data for peer
373 * Peer identified by its CID (connection ID)
374 * NIC performs beam forming for each peer;
375 * if no beam forming done, frame exchange is not
378 struct wil_sta_info {
380 enum wil_sta_status status;
381 struct wil_net_stats stats;
382 bool data_port_open; /* can send any data, not only EAPOL */
384 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
385 spinlock_t tid_rx_lock; /* guarding tid_rx array */
386 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
387 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
391 fw_recovery_idle = 0,
392 fw_recovery_pending = 1,
393 fw_recovery_running = 2,
396 struct wil6210_priv {
397 struct pci_dev *pdev;
399 struct wireless_dev *wdev;
404 struct wil_board *board;
405 u8 n_mids; /* number of additional MIDs as reported by FW */
406 u32 recovery_count; /* num of FW recovery attempts in a short time */
407 u32 recovery_state; /* FW recovery state machine */
408 unsigned long last_fw_recovery; /* jiffies of last fw recovery */
409 wait_queue_head_t wq; /* for all wait_event() use */
412 u32 secure_pcp; /* create secure PCP? */
415 /* cached ISR registers */
417 /* mailbox related */
418 struct mutex wmi_mutex;
419 struct wil6210_mbox_ctl mbox_ctl;
420 struct completion wmi_ready;
421 struct completion wmi_call;
423 u16 reply_id; /**< wait for this WMI event */
426 struct workqueue_struct *wmi_wq; /* for deferred calls */
427 struct work_struct wmi_event_worker;
428 struct workqueue_struct *wmi_wq_conn; /* for connect worker */
429 struct work_struct connect_worker;
430 struct work_struct disconnect_worker;
431 struct work_struct fw_error_worker; /* for FW error recovery */
432 struct timer_list connect_timer;
433 struct timer_list scan_timer; /* detect scan timeout */
434 int pending_connect_cid;
435 struct list_head pending_wmi_ev;
437 * protect pending_wmi_ev
438 * - fill in IRQ from wil6210_irq_misc,
439 * - consumed in thread by wmi_event_worker
441 spinlock_t wmi_ev_lock;
442 struct napi_struct napi_rx;
443 struct napi_struct napi_tx;
445 struct vring vring_rx;
446 struct vring vring_tx[WIL6210_MAX_TX_RINGS];
447 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS];
448 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
449 struct wil_sta_info sta[WIL6210_MAX_CID];
451 struct cfg80211_scan_request *scan_request;
453 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
455 atomic_t isr_count_rx, isr_count_tx;
457 struct dentry *debug;
458 struct debugfs_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)];
460 void *platform_handle;
461 struct wil_platform_ops platform_ops;
464 #define wil_to_wiphy(i) (i->wdev->wiphy)
465 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
466 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
467 #define wil_to_wdev(i) (i->wdev)
468 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
469 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
470 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
471 #define wil_to_pcie_dev(i) (&i->pdev->dev)
474 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
476 void wil_err(struct wil6210_priv *wil, const char *fmt, ...);
478 void wil_info(struct wil6210_priv *wil, const char *fmt, ...);
479 #define wil_dbg(wil, fmt, arg...) do { \
480 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
481 wil_dbg_trace(wil, fmt, ##arg); \
484 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
485 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
486 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
487 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
489 #if defined(CONFIG_DYNAMIC_DEBUG)
490 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
491 groupsize, buf, len, ascii) \
492 print_hex_dump_debug("DBG[TXRX]" prefix_str,\
493 prefix_type, rowsize, \
494 groupsize, buf, len, ascii)
496 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
497 groupsize, buf, len, ascii) \
498 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
499 prefix_type, rowsize, \
500 groupsize, buf, len, ascii)
501 #else /* defined(CONFIG_DYNAMIC_DEBUG) */
503 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize,
504 int groupsize, const void *buf, size_t len, bool ascii)
509 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize,
510 int groupsize, const void *buf, size_t len, bool ascii)
513 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */
515 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
517 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
520 void *wil_if_alloc(struct device *dev, void __iomem *csr);
521 void wil_if_free(struct wil6210_priv *wil);
522 int wil_if_add(struct wil6210_priv *wil);
523 void wil_if_remove(struct wil6210_priv *wil);
524 int wil_priv_init(struct wil6210_priv *wil);
525 void wil_priv_deinit(struct wil6210_priv *wil);
526 int wil_reset(struct wil6210_priv *wil);
527 void wil_set_itr_trsh(struct wil6210_priv *wil);
528 void wil_fw_error_recovery(struct wil6210_priv *wil);
529 void wil_set_recovery_state(struct wil6210_priv *wil, int state);
530 void wil_link_on(struct wil6210_priv *wil);
531 void wil_link_off(struct wil6210_priv *wil);
532 int wil_up(struct wil6210_priv *wil);
533 int __wil_up(struct wil6210_priv *wil);
534 int wil_down(struct wil6210_priv *wil);
535 int __wil_down(struct wil6210_priv *wil);
536 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
537 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac);
538 void wil_set_ethtoolops(struct net_device *ndev);
540 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
541 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
542 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
543 struct wil6210_mbox_hdr *hdr);
544 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
545 void wmi_recv_cmd(struct wil6210_priv *wil);
546 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
547 u16 reply_id, void *reply, u8 reply_size, int to_msec);
548 void wmi_event_worker(struct work_struct *work);
549 void wmi_event_flush(struct wil6210_priv *wil);
550 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
551 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
552 int wmi_set_channel(struct wil6210_priv *wil, int channel);
553 int wmi_get_channel(struct wil6210_priv *wil, int *channel);
554 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
555 const void *mac_addr);
556 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
557 const void *mac_addr, int key_len, const void *key);
558 int wmi_echo(struct wil6210_priv *wil);
559 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
560 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
561 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
562 int wmi_rxon(struct wil6210_priv *wil, bool on);
563 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
564 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, u16 reason);
566 void wil6210_clear_irq(struct wil6210_priv *wil);
567 int wil6210_init_irq(struct wil6210_priv *wil, int irq);
568 void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
569 void wil_mask_irq(struct wil6210_priv *wil);
570 void wil_unmask_irq(struct wil6210_priv *wil);
571 void wil_disable_irq(struct wil6210_priv *wil);
572 void wil_enable_irq(struct wil6210_priv *wil);
573 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev,
574 struct cfg80211_mgmt_tx_params *params,
577 int wil6210_debugfs_init(struct wil6210_priv *wil);
578 void wil6210_debugfs_remove(struct wil6210_priv *wil);
579 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid,
580 struct station_info *sinfo);
582 struct wireless_dev *wil_cfg80211_init(struct device *dev);
583 void wil_wdev_free(struct wil6210_priv *wil);
585 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
586 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
587 int wmi_pcp_stop(struct wil6210_priv *wil);
588 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid,
591 int wil_rx_init(struct wil6210_priv *wil);
592 void wil_rx_fini(struct wil6210_priv *wil);
595 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
597 void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
599 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
600 int wil_tx_complete(struct wil6210_priv *wil, int ringid);
601 void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
604 void wil_rx_handle(struct wil6210_priv *wil, int *quota);
605 void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
607 int wil_iftype_nl2wmi(enum nl80211_iftype type);
609 int wil_ioctl(struct wil6210_priv *wil, void __user *data, int cmd);
610 int wil_request_firmware(struct wil6210_priv *wil, const char *name);
612 #endif /* __WIL6210_H__ */