drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_ids.h>
  27 #include <linux/mmc/sdio_func.h>
  28 #include <linux/mmc/card.h>
  29 #include <linux/semaphore.h>
  30 #include <linux/firmware.h>
  31 #include <linux/module.h>
  32 #include <linux/bcma/bcma.h>
  33 #include <linux/debugfs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/platform_data/brcmfmac-sdio.h>
  36 #include <linux/moduleparam.h>
  37 #include <asm/unaligned.h>
  38 #include <defs.h>
  39 #include <brcmu_wifi.h>
  40 #include <brcmu_utils.h>
  41 #include <brcm_hw_ids.h>
  42 #include <soc.h>
  43 #include "sdio_host.h"
  44 #include "chip.h"
  45 #include "firmware.h"
  46
  47 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  48
  49 #ifdef DEBUG
  50
  51 #define BRCMF_TRAP_INFO_SIZE    80
  52
  53 #define CBUF_LEN        (128)
  54
  55 /* Device console log buffer state */
  56 #define CONSOLE_BUFFER_MAX      2024
  57
  58 struct rte_log_le {
  59         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  60         __le32 buf_size;
  61         __le32 idx;
  62         char *_buf_compat;      /* Redundant pointer for backward compat. */
  63 };
  64
  65 struct rte_console {
  66         /* Virtual UART
  67          * When there is no UART (e.g. Quickturn),
  68          * the host should write a complete
  69          * input line directly into cbuf and then write
  70          * the length into vcons_in.
  71          * This may also be used when there is a real UART
  72          * (at risk of conflicting with
  73          * the real UART).  vcons_out is currently unused.
  74          */
  75         uint vcons_in;
  76         uint vcons_out;
  77
  78         /* Output (logging) buffer
  79          * Console output is written to a ring buffer log_buf at index log_idx.
  80          * The host may read the output when it sees log_idx advance.
  81          * Output will be lost if the output wraps around faster than the host
  82          * polls.
  83          */
  84         struct rte_log_le log_le;
  85
  86         /* Console input line buffer
  87          * Characters are read one at a time into cbuf
  88          * until <CR> is received, then
  89          * the buffer is processed as a command line.
  90          * Also used for virtual UART.
  91          */
  92         uint cbuf_idx;
  93         char cbuf[CBUF_LEN];
  94 };
  95
  96 #endif                          /* DEBUG */
  97 #include <chipcommon.h>
  98
  99 #include "dhd_bus.h"
 100 #include "dhd_dbg.h"
 101 #include "tracepoint.h"
 102
 103 #define TXQLEN          2048    /* bulk tx queue length */
 104 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 105 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 106 #define PRIOMASK        7
 107
 108 #define TXRETRIES       2       /* # of retries for tx frames */
 109
 110 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 111                                  one scheduling */
 112
 113 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 114                                  one scheduling */
 115
 116 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 117
 118 #define MEMBLOCK        2048    /* Block size used for downloading
 119                                  of dongle image */
 120 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 121                                  biggest possible glom */
 122
 123 #define BRCMF_FIRSTREAD (1 << 6)
 124
 125
 126 /* SBSDIO_DEVICE_CTL */
 127
 128 /* 1: device will assert busy signal when receiving CMD53 */
 129 #define SBSDIO_DEVCTL_SETBUSY           0x01
 130 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 131 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 132 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 133 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 134 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 135  * sdio bus power cycle to clear (rev 9) */
 136 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 137 /* Force SD->SB reset mapping (rev 11) */
 138 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 139 /*   Determined by CoreControl bit */
 140 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 141 /*   Force backplane reset */
 142 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 143 /*   Force no backplane reset */
 144 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 145
 146 /* direct(mapped) cis space */
 147
 148 /* MAPPED common CIS address */
 149 #define SBSDIO_CIS_BASE_COMMON          0x1000
 150 /* maximum bytes in one CIS */
 151 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 152 /* cis offset addr is < 17 bits */
 153 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 154
 155 /* manfid tuple length, include tuple, link bytes */
 156 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 157
 158 #define CORE_BUS_REG(base, field) \
 159                 (base + offsetof(struct sdpcmd_regs, field))
 160
 161 /* SDIO function 1 register CHIPCLKCSR */
 162 /* Force ALP request to backplane */
 163 #define SBSDIO_FORCE_ALP                0x01
 164 /* Force HT request to backplane */
 165 #define SBSDIO_FORCE_HT                 0x02
 166 /* Force ILP request to backplane */
 167 #define SBSDIO_FORCE_ILP                0x04
 168 /* Make ALP ready (power up xtal) */
 169 #define SBSDIO_ALP_AVAIL_REQ            0x08
 170 /* Make HT ready (power up PLL) */
 171 #define SBSDIO_HT_AVAIL_REQ             0x10
 172 /* Squelch clock requests from HW */
 173 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 174 /* Status: ALP is ready */
 175 #define SBSDIO_ALP_AVAIL                0x40
 176 /* Status: HT is ready */
 177 #define SBSDIO_HT_AVAIL                 0x80
 178 #define SBSDIO_CSR_MASK                 0x1F
 179 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 180 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 181 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 182 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 183 #define SBSDIO_CLKAV(regval, alponly) \
 184         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 185
 186 /* intstatus */
 187 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 188 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 189 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 190 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 191 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 192 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 193 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 194 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 195 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 196 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 197 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 198 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 199 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 200 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 201 #define I_PC            (1 << 10)       /* descriptor error */
 202 #define I_PD            (1 << 11)       /* data error */
 203 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 204 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 205 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 206 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 207 #define I_RI            (1 << 16)       /* Receive Interrupt */
 208 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 209 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 210 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 211 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 212 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 213 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 214 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 215 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 216 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 217 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 218 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 219 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 220
 221 /* corecontrol */
 222 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 223 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 224 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 225 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 226 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 227 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 228
 229 /* SDA_FRAMECTRL */
 230 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 231 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 232 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 233 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 234
 235 /*
 236  * Software allocation of To SB Mailbox resources
 237  */
 238
 239 /* tosbmailbox bits corresponding to intstatus bits */
 240 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 241 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 242 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 243 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 244
 245 /* tosbmailboxdata */
 246 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 247
 248 /*
 249  * Software allocation of To Host Mailbox resources
 250  */
 251
 252 /* intstatus bits */
 253 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 254 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 255 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 256 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 257
 258 /* tohostmailboxdata */
 259 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 260 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 261 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 262 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 263
 264 #define HMB_DATA_FCDATA_MASK    0xff000000
 265 #define HMB_DATA_FCDATA_SHIFT   24
 266
 267 #define HMB_DATA_VERSION_MASK   0x00ff0000
 268 #define HMB_DATA_VERSION_SHIFT  16
 269
 270 /*
 271  * Software-defined protocol header
 272  */
 273
 274 /* Current protocol version */
 275 #define SDPCM_PROT_VERSION      4
 276
 277 /*
 278  * Shared structure between dongle and the host.
 279  * The structure contains pointers to trap or assert information.
 280  */
 281 #define SDPCM_SHARED_VERSION       0x0003
 282 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 283 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 284 #define SDPCM_SHARED_ASSERT        0x0200
 285 #define SDPCM_SHARED_TRAP          0x0400
 286
 287 /* Space for header read, limit for data packets */
 288 #define MAX_HDR_READ    (1 << 6)
 289 #define MAX_RX_DATASZ   2048
 290
 291 /* Bump up limit on waiting for HT to account for first startup;
 292  * if the image is doing a CRC calculation before programming the PMU
 293  * for HT availability, it could take a couple hundred ms more, so
 294  * max out at a 1 second (1000000us).
 295  */
 296 #undef PMU_MAX_TRANSITION_DLY
 297 #define PMU_MAX_TRANSITION_DLY 1000000
 298
 299 /* Value for ChipClockCSR during initial setup */
 300 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 301                                         SBSDIO_ALP_AVAIL_REQ)
 302
 303 /* Flags for SDH calls */
 304 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 305
 306 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 307                                          * when idle
 308                                          */
 309 #define BRCMF_IDLE_INTERVAL     1
 310
 311 #define KSO_WAIT_US 50
 312 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 313
 314 /*
 315  * Conversion of 802.1D priority to precedence level
 316  */
 317 static uint prio2prec(u32 prio)
 318 {
 319         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 320                (prio^2) : prio;
 321 }
 322
 323 #ifdef DEBUG
 324 /* Device console log buffer state */
 325 struct brcmf_console {
 326         uint count;             /* Poll interval msec counter */
 327         uint log_addr;          /* Log struct address (fixed) */
 328         struct rte_log_le log_le;       /* Log struct (host copy) */
 329         uint bufsize;           /* Size of log buffer */
 330         u8 *buf;                /* Log buffer (host copy) */
 331         uint last;              /* Last buffer read index */
 332 };
 333
 334 struct brcmf_trap_info {
 335         __le32          type;
 336         __le32          epc;
 337         __le32          cpsr;
 338         __le32          spsr;
 339         __le32          r0;     /* a1 */
 340         __le32          r1;     /* a2 */
 341         __le32          r2;     /* a3 */
 342         __le32          r3;     /* a4 */
 343         __le32          r4;     /* v1 */
 344         __le32          r5;     /* v2 */
 345         __le32          r6;     /* v3 */
 346         __le32          r7;     /* v4 */
 347         __le32          r8;     /* v5 */
 348         __le32          r9;     /* sb/v6 */
 349         __le32          r10;    /* sl/v7 */
 350         __le32          r11;    /* fp/v8 */
 351         __le32          r12;    /* ip */
 352         __le32          r13;    /* sp */
 353         __le32          r14;    /* lr */
 354         __le32          pc;     /* r15 */
 355 };
 356 #endif                          /* DEBUG */
 357
 358 struct sdpcm_shared {
 359         u32 flags;
 360         u32 trap_addr;
 361         u32 assert_exp_addr;
 362         u32 assert_file_addr;
 363         u32 assert_line;
 364         u32 console_addr;       /* Address of struct rte_console */
 365         u32 msgtrace_addr;
 366         u8 tag[32];
 367         u32 brpt_addr;
 368 };
 369
 370 struct sdpcm_shared_le {
 371         __le32 flags;
 372         __le32 trap_addr;
 373         __le32 assert_exp_addr;
 374         __le32 assert_file_addr;
 375         __le32 assert_line;
 376         __le32 console_addr;    /* Address of struct rte_console */
 377         __le32 msgtrace_addr;
 378         u8 tag[32];
 379         __le32 brpt_addr;
 380 };
 381
 382 /* dongle SDIO bus specific header info */
 383 struct brcmf_sdio_hdrinfo {
 384         u8 seq_num;
 385         u8 channel;
 386         u16 len;
 387         u16 len_left;
 388         u16 len_nxtfrm;
 389         u8 dat_offset;
 390         bool lastfrm;
 391         u16 tail_pad;
 392 };
 393
 394 /*
 395  * hold counter variables
 396  */
 397 struct brcmf_sdio_count {
 398         uint intrcount;         /* Count of device interrupt callbacks */
 399         uint lastintrs;         /* Count as of last watchdog timer */
 400         uint pollcnt;           /* Count of active polls */
 401         uint regfails;          /* Count of R_REG failures */
 402         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 403         uint fcqueued;          /* Tx packets that got queued */
 404         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 405         uint rx_toolong;        /* Receive frames too long to receive */
 406         uint rxc_errors;        /* SDIO errors when reading control frames */
 407         uint rx_hdrfail;        /* SDIO errors on header reads */
 408         uint rx_badhdr;         /* Bad received headers (roosync?) */
 409         uint rx_badseq;         /* Mismatched rx sequence number */
 410         uint fc_rcvd;           /* Number of flow-control events received */
 411         uint fc_xoff;           /* Number which turned on flow-control */
 412         uint fc_xon;            /* Number which turned off flow-control */
 413         uint rxglomfail;        /* Failed deglom attempts */
 414         uint rxglomframes;      /* Number of glom frames (superframes) */
 415         uint rxglompkts;        /* Number of packets from glom frames */
 416         uint f2rxhdrs;          /* Number of header reads */
 417         uint f2rxdata;          /* Number of frame data reads */
 418         uint f2txdata;          /* Number of f2 frame writes */
 419         uint f1regdata;         /* Number of f1 register accesses */
 420         uint tickcnt;           /* Number of watchdog been schedule */
 421         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 422         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 423         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 424         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 425         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 426 };
 427
 428 /* misc chip info needed by some of the routines */
 429 /* Private data for SDIO bus interaction */
 430 struct brcmf_sdio {
 431         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 432         struct brcmf_chip *ci;  /* Chip info struct */
 433
 434         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 435
 436         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 437         atomic_t intstatus;     /* Intstatus bits (events) pending */
 438         atomic_t fcstate;       /* State of dongle flow-control */
 439
 440         uint blocksize;         /* Block size of SDIO transfers */
 441         uint roundup;           /* Max roundup limit */
 442
 443         struct pktq txq;        /* Queue length used for flow-control */
 444         u8 flowcontrol; /* per prio flow control bitmask */
 445         u8 tx_seq;              /* Transmit sequence number (next) */
 446         u8 tx_max;              /* Maximum transmit sequence allowed */
 447
 448         u8 *hdrbuf;             /* buffer for handling rx frame */
 449         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 450         u8 rx_seq;              /* Receive sequence number (expected) */
 451         struct brcmf_sdio_hdrinfo cur_read;
 452                                 /* info of current read frame */
 453         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 454         bool rxpending;         /* Data frame pending in dongle */
 455
 456         uint rxbound;           /* Rx frames to read before resched */
 457         uint txbound;           /* Tx frames to send before resched */
 458         uint txminmax;
 459
 460         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 461         struct sk_buff_head glom; /* Packet list for glommed superframe */
 462         uint glomerr;           /* Glom packet read errors */
 463
 464         u8 *rxbuf;              /* Buffer for receiving control packets */
 465         uint rxblen;            /* Allocated length of rxbuf */
 466         u8 *rxctl;              /* Aligned pointer into rxbuf */
 467         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 468         uint rxlen;             /* Length of valid data in buffer */
 469         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 470
 471         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 472
 473         bool intr;              /* Use interrupts */
 474         bool poll;              /* Use polling */
 475         atomic_t ipend;         /* Device interrupt is pending */
 476         uint spurious;          /* Count of spurious interrupts */
 477         uint pollrate;          /* Ticks between device polls */
 478         uint polltick;          /* Tick counter */
 479
 480 #ifdef DEBUG
 481         uint console_interval;
 482         struct brcmf_console console;   /* Console output polling support */
 483         uint console_addr;      /* Console address from shared struct */
 484 #endif                          /* DEBUG */
 485
 486         uint clkstate;          /* State of sd and backplane clock(s) */
 487         bool activity;          /* Activity flag for clock down */
 488         s32 idletime;           /* Control for activity timeout */
 489         s32 idlecount;  /* Activity timeout counter */
 490         s32 idleclock;  /* How to set bus driver when idle */
 491         bool rxflow_mode;       /* Rx flow control mode */
 492         bool rxflow;            /* Is rx flow control on */
 493         bool alp_only;          /* Don't use HT clock (ALP only) */
 494
 495         u8 *ctrl_frame_buf;
 496         u16 ctrl_frame_len;
 497         bool ctrl_frame_stat;
 498
 499         spinlock_t txq_lock;            /* protect bus->txq */
 500         struct semaphore tx_seq_lock;   /* protect bus->tx_seq */
 501         wait_queue_head_t ctrl_wait;
 502         wait_queue_head_t dcmd_resp_wait;
 503
 504         struct timer_list timer;
 505         struct completion watchdog_wait;
 506         struct task_struct *watchdog_tsk;
 507         bool wd_timer_valid;
 508         uint save_ms;
 509
 510         struct workqueue_struct *brcmf_wq;
 511         struct work_struct datawork;
 512         atomic_t dpc_tskcnt;
 513
 514         bool txoff;             /* Transmit flow-controlled */
 515         struct brcmf_sdio_count sdcnt;
 516         bool sr_enabled; /* SaveRestore enabled */
 517         bool sleeping; /* SDIO bus sleeping */
 518
 519         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 520         bool txglom;            /* host tx glomming enable flag */
 521         u16 head_align;         /* buffer pointer alignment */
 522         u16 sgentry_align;      /* scatter-gather buffer alignment */
 523 };
 524
 525 /* clkstate */
 526 #define CLK_NONE        0
 527 #define CLK_SDONLY      1
 528 #define CLK_PENDING     2
 529 #define CLK_AVAIL       3
 530
 531 #ifdef DEBUG
 532 static int qcount[NUMPRIO];
 533 #endif                          /* DEBUG */
 534
 535 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 536
 537 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 538
 539 /* Retry count for register access failures */
 540 static const uint retry_limit = 2;
 541
 542 /* Limit on rounding up frames */
 543 static const uint max_roundup = 512;
 544
 545 #define ALIGNMENT  4
 546
 547 enum brcmf_sdio_frmtype {
 548         BRCMF_SDIO_FT_NORMAL,
 549         BRCMF_SDIO_FT_SUPER,
 550         BRCMF_SDIO_FT_SUB,
 551 };
 552
 553 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 554
 555 /* SDIO Pad drive strength to select value mappings */
 556 struct sdiod_drive_str {
 557         u8 strength;    /* Pad Drive Strength in mA */
 558         u8 sel;         /* Chip-specific select value */
 559 };
 560
 561 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 562 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 563         {32, 0x6},
 564         {26, 0x7},
 565         {22, 0x4},
 566         {16, 0x5},
 567         {12, 0x2},
 568         {8, 0x3},
 569         {4, 0x0},
 570         {0, 0x1}
 571 };
 572
 573 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 574 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 575         {6, 0x7},
 576         {5, 0x6},
 577         {4, 0x5},
 578         {3, 0x4},
 579         {2, 0x2},
 580         {1, 0x1},
 581         {0, 0x0}
 582 };
 583
 584 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 585 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 586         {3, 0x3},
 587         {2, 0x2},
 588         {1, 0x1},
 589         {0, 0x0} };
 590
 591 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 592 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 593         {16, 0x7},
 594         {12, 0x5},
 595         {8,  0x3},
 596         {4,  0x1}
 597 };
 598
 599 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 600 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 601 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 602 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 603 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 604 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 605 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 606 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 607 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 608 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 609 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 610 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 611 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 612 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 613 #define BCM43362_FIRMWARE_NAME          "brcm/brcmfmac43362-sdio.bin"
 614 #define BCM43362_NVRAM_NAME             "brcm/brcmfmac43362-sdio.txt"
 615 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 616 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 617 #define BCM4354_FIRMWARE_NAME           "brcm/brcmfmac4354-sdio.bin"
 618 #define BCM4354_NVRAM_NAME              "brcm/brcmfmac4354-sdio.txt"
 619
 620 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 621 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 622 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 623 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 624 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 625 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 626 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 627 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 628 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 629 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 630 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 631 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 632 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 633 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 634 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
 635 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
 636 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 637 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 638 MODULE_FIRMWARE(BCM4354_FIRMWARE_NAME);
 639 MODULE_FIRMWARE(BCM4354_NVRAM_NAME);
 640
 641 struct brcmf_firmware_names {
 642         u32 chipid;
 643         u32 revmsk;
 644         const char *bin;
 645         const char *nv;
 646 };
 647
 648 enum brcmf_firmware_type {
 649         BRCMF_FIRMWARE_BIN,
 650         BRCMF_FIRMWARE_NVRAM
 651 };
 652
 653 #define BRCMF_FIRMWARE_NVRAM(name) \
 654         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 655
 656 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 657         { BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 658         { BRCM_CC_43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 659         { BRCM_CC_43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 660         { BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 661         { BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 662         { BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 663         { BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 664         { BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
 665         { BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) },
 666         { BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4354) }
 667 };
 668
 669 static int brcmf_sdio_get_fwnames(struct brcmf_chip *ci,
 670                                   struct brcmf_sdio_dev *sdiodev)
 671 {
 672         int i;
 673         char end;
 674
 675         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 676                 if (brcmf_fwname_data[i].chipid == ci->chip &&
 677                     brcmf_fwname_data[i].revmsk & BIT(ci->chiprev))
 678                         break;
 679         }
 680
 681         if (i == ARRAY_SIZE(brcmf_fwname_data)) {
 682                 brcmf_err("Unknown chipid %d [%d]\n", ci->chip, ci->chiprev);
 683                 return -ENODEV;
 684         }
 685
 686         /* check if firmware path is provided by module parameter */
 687         if (brcmf_firmware_path[0] != '\0') {
 688                 strlcpy(sdiodev->fw_name, brcmf_firmware_path,
 689                         sizeof(sdiodev->fw_name));
 690                 strlcpy(sdiodev->nvram_name, brcmf_firmware_path,
 691                         sizeof(sdiodev->nvram_name));
 692
 693                 end = brcmf_firmware_path[strlen(brcmf_firmware_path) - 1];
 694                 if (end != '/') {
 695                         strlcat(sdiodev->fw_name, "/",
 696                                 sizeof(sdiodev->fw_name));
 697                         strlcat(sdiodev->nvram_name, "/",
 698                                 sizeof(sdiodev->nvram_name));
 699                 }
 700         }
 701         strlcat(sdiodev->fw_name, brcmf_fwname_data[i].bin,
 702                 sizeof(sdiodev->fw_name));
 703         strlcat(sdiodev->nvram_name, brcmf_fwname_data[i].nv,
 704                 sizeof(sdiodev->nvram_name));
 705
 706         return 0;
 707 }
 708
 709 static void pkt_align(struct sk_buff *p, int len, int align)
 710 {
 711         uint datalign;
 712         datalign = (unsigned long)(p->data);
 713         datalign = roundup(datalign, (align)) - datalign;
 714         if (datalign)
 715                 skb_pull(p, datalign);
 716         __skb_trim(p, len);
 717 }
 718
 719 /* To check if there's window offered */
 720 static bool data_ok(struct brcmf_sdio *bus)
 721 {
 722         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 723                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 724 }
 725
 726 /*
 727  * Reads a register in the SDIO hardware block. This block occupies a series of
 728  * adresses on the 32 bit backplane bus.
 729  */
 730 static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 731 {
 732         struct brcmf_core *core;
 733         int ret;
 734
 735         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 736         *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
 737
 738         return ret;
 739 }
 740
 741 static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 742 {
 743         struct brcmf_core *core;
 744         int ret;
 745
 746         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 747         brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
 748
 749         return ret;
 750 }
 751
 752 static int
 753 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 754 {
 755         u8 wr_val = 0, rd_val, cmp_val, bmask;
 756         int err = 0;
 757         int try_cnt = 0;
 758
 759         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 760
 761         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 762         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 763         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 764                           wr_val, &err);
 765
 766         if (on) {
 767                 /* device WAKEUP through KSO:
 768                  * write bit 0 & read back until
 769                  * both bits 0 (kso bit) & 1 (dev on status) are set
 770                  */
 771                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 772                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 773                 bmask = cmp_val;
 774                 usleep_range(2000, 3000);
 775         } else {
 776                 /* Put device to sleep, turn off KSO */
 777                 cmp_val = 0;
 778                 /* only check for bit0, bit1(dev on status) may not
 779                  * get cleared right away
 780                  */
 781                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 782         }
 783
 784         do {
 785                 /* reliable KSO bit set/clr:
 786                  * the sdiod sleep write access is synced to PMU 32khz clk
 787                  * just one write attempt may fail,
 788                  * read it back until it matches written value
 789                  */
 790                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 791                                            &err);
 792                 if (((rd_val & bmask) == cmp_val) && !err)
 793                         break;
 794
 795                 udelay(KSO_WAIT_US);
 796                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 797                                   wr_val, &err);
 798         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 799
 800         if (try_cnt > 2)
 801                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 802                           rd_val, err);
 803
 804         if (try_cnt > MAX_KSO_ATTEMPTS)
 805                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 806
 807         return err;
 808 }
 809
 810 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 811
 812 /* Turn backplane clock on or off */
 813 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 814 {
 815         int err;
 816         u8 clkctl, clkreq, devctl;
 817         unsigned long timeout;
 818
 819         brcmf_dbg(SDIO, "Enter\n");
 820
 821         clkctl = 0;
 822
 823         if (bus->sr_enabled) {
 824                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 825                 return 0;
 826         }
 827
 828         if (on) {
 829                 /* Request HT Avail */
 830                 clkreq =
 831                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 832
 833                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 834                                   clkreq, &err);
 835                 if (err) {
 836                         brcmf_err("HT Avail request error: %d\n", err);
 837                         return -EBADE;
 838                 }
 839
 840                 /* Check current status */
 841                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 842                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 843                 if (err) {
 844                         brcmf_err("HT Avail read error: %d\n", err);
 845                         return -EBADE;
 846                 }
 847
 848                 /* Go to pending and await interrupt if appropriate */
 849                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 850                         /* Allow only clock-available interrupt */
 851                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 852                                                    SBSDIO_DEVICE_CTL, &err);
 853                         if (err) {
 854                                 brcmf_err("Devctl error setting CA: %d\n",
 855                                           err);
 856                                 return -EBADE;
 857                         }
 858
 859                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 860                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 861                                           devctl, &err);
 862                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 863                         bus->clkstate = CLK_PENDING;
 864
 865                         return 0;
 866                 } else if (bus->clkstate == CLK_PENDING) {
 867                         /* Cancel CA-only interrupt filter */
 868                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 869                                                    SBSDIO_DEVICE_CTL, &err);
 870                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 871                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 872                                           devctl, &err);
 873                 }
 874
 875                 /* Otherwise, wait here (polling) for HT Avail */
 876                 timeout = jiffies +
 877                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 878                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 879                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 880                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 881                                                    &err);
 882                         if (time_after(jiffies, timeout))
 883                                 break;
 884                         else
 885                                 usleep_range(5000, 10000);
 886                 }
 887                 if (err) {
 888                         brcmf_err("HT Avail request error: %d\n", err);
 889                         return -EBADE;
 890                 }
 891                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 892                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 893                                   PMU_MAX_TRANSITION_DLY, clkctl);
 894                         return -EBADE;
 895                 }
 896
 897                 /* Mark clock available */
 898                 bus->clkstate = CLK_AVAIL;
 899                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 900
 901 #if defined(DEBUG)
 902                 if (!bus->alp_only) {
 903                         if (SBSDIO_ALPONLY(clkctl))
 904                                 brcmf_err("HT Clock should be on\n");
 905                 }
 906 #endif                          /* defined (DEBUG) */
 907
 908         } else {
 909                 clkreq = 0;
 910
 911                 if (bus->clkstate == CLK_PENDING) {
 912                         /* Cancel CA-only interrupt filter */
 913                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 914                                                    SBSDIO_DEVICE_CTL, &err);
 915                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 916                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 917                                           devctl, &err);
 918                 }
 919
 920                 bus->clkstate = CLK_SDONLY;
 921                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 922                                   clkreq, &err);
 923                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 924                 if (err) {
 925                         brcmf_err("Failed access turning clock off: %d\n",
 926                                   err);
 927                         return -EBADE;
 928                 }
 929         }
 930         return 0;
 931 }
 932
 933 /* Change idle/active SD state */
 934 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 935 {
 936         brcmf_dbg(SDIO, "Enter\n");
 937
 938         if (on)
 939                 bus->clkstate = CLK_SDONLY;
 940         else
 941                 bus->clkstate = CLK_NONE;
 942
 943         return 0;
 944 }
 945
 946 /* Transition SD and backplane clock readiness */
 947 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 948 {
 949 #ifdef DEBUG
 950         uint oldstate = bus->clkstate;
 951 #endif                          /* DEBUG */
 952
 953         brcmf_dbg(SDIO, "Enter\n");
 954
 955         /* Early exit if we're already there */
 956         if (bus->clkstate == target) {
 957                 if (target == CLK_AVAIL) {
 958                         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 959                         bus->activity = true;
 960                 }
 961                 return 0;
 962         }
 963
 964         switch (target) {
 965         case CLK_AVAIL:
 966                 /* Make sure SD clock is available */
 967                 if (bus->clkstate == CLK_NONE)
 968                         brcmf_sdio_sdclk(bus, true);
 969                 /* Now request HT Avail on the backplane */
 970                 brcmf_sdio_htclk(bus, true, pendok);
 971                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 972                 bus->activity = true;
 973                 break;
 974
 975         case CLK_SDONLY:
 976                 /* Remove HT request, or bring up SD clock */
 977                 if (bus->clkstate == CLK_NONE)
 978                         brcmf_sdio_sdclk(bus, true);
 979                 else if (bus->clkstate == CLK_AVAIL)
 980                         brcmf_sdio_htclk(bus, false, false);
 981                 else
 982                         brcmf_err("request for %d -> %d\n",
 983                                   bus->clkstate, target);
 984                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 985                 break;
 986
 987         case CLK_NONE:
 988                 /* Make sure to remove HT request */
 989                 if (bus->clkstate == CLK_AVAIL)
 990                         brcmf_sdio_htclk(bus, false, false);
 991                 /* Now remove the SD clock */
 992                 brcmf_sdio_sdclk(bus, false);
 993                 brcmf_sdio_wd_timer(bus, 0);
 994                 break;
 995         }
 996 #ifdef DEBUG
 997         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 998 #endif                          /* DEBUG */
 999
1000         return 0;
1001 }
1002
1003 static int
1004 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
1005 {
1006         int err = 0;
1007         u8 clkcsr;
1008
1009         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
1010                   (sleep ? "SLEEP" : "WAKE"),
1011                   (bus->sleeping ? "SLEEP" : "WAKE"));
1012
1013         /* If SR is enabled control bus state with KSO */
1014         if (bus->sr_enabled) {
1015                 /* Done if we're already in the requested state */
1016                 if (sleep == bus->sleeping)
1017                         goto end;
1018
1019                 /* Going to sleep */
1020                 if (sleep) {
1021                         /* Don't sleep if something is pending */
1022                         if (atomic_read(&bus->intstatus) ||
1023                             atomic_read(&bus->ipend) > 0 ||
1024                             (!atomic_read(&bus->fcstate) &&
1025                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
1026                             data_ok(bus))) {
1027                                  err = -EBUSY;
1028                                  goto done;
1029                         }
1030
1031                         clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
1032                                                    SBSDIO_FUNC1_CHIPCLKCSR,
1033                                                    &err);
1034                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
1035                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
1036                                 brcmf_sdiod_regwb(bus->sdiodev,
1037                                                   SBSDIO_FUNC1_CHIPCLKCSR,
1038                                                   SBSDIO_ALP_AVAIL_REQ, &err);
1039                         }
1040                         err = brcmf_sdio_kso_control(bus, false);
1041                         /* disable watchdog */
1042                         if (!err)
1043                                 brcmf_sdio_wd_timer(bus, 0);
1044                 } else {
1045                         bus->idlecount = 0;
1046                         err = brcmf_sdio_kso_control(bus, true);
1047                 }
1048                 if (!err) {
1049                         /* Change state */
1050                         bus->sleeping = sleep;
1051                         brcmf_dbg(SDIO, "new state %s\n",
1052                                   (sleep ? "SLEEP" : "WAKE"));
1053                 } else {
1054                         brcmf_err("error while changing bus sleep state %d\n",
1055                                   err);
1056                         goto done;
1057                 }
1058         }
1059
1060 end:
1061         /* control clocks */
1062         if (sleep) {
1063                 if (!bus->sr_enabled)
1064                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
1065         } else {
1066                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
1067         }
1068 done:
1069         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
1070         return err;
1071
1072 }
1073
1074 #ifdef DEBUG
1075 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
1076 {
1077         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
1078 }
1079
1080 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
1081                                  struct sdpcm_shared *sh)
1082 {
1083         u32 addr;
1084         int rv;
1085         u32 shaddr = 0;
1086         struct sdpcm_shared_le sh_le;
1087         __le32 addr_le;
1088
1089         shaddr = bus->ci->rambase + bus->ramsize - 4;
1090
1091         /*
1092          * Read last word in socram to determine
1093          * address of sdpcm_shared structure
1094          */
1095         sdio_claim_host(bus->sdiodev->func[1]);
1096         brcmf_sdio_bus_sleep(bus, false, false);
1097         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
1098         sdio_release_host(bus->sdiodev->func[1]);
1099         if (rv < 0)
1100                 return rv;
1101
1102         addr = le32_to_cpu(addr_le);
1103
1104         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
1105
1106         /*
1107          * Check if addr is valid.
1108          * NVRAM length at the end of memory should have been overwritten.
1109          */
1110         if (!brcmf_sdio_valid_shared_address(addr)) {
1111                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
1112                                   addr);
1113                         return -EINVAL;
1114         }
1115
1116         /* Read hndrte_shared structure */
1117         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1118                                sizeof(struct sdpcm_shared_le));
1119         if (rv < 0)
1120                 return rv;
1121
1122         /* Endianness */
1123         sh->flags = le32_to_cpu(sh_le.flags);
1124         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1125         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1126         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1127         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1128         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1129         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1130
1131         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1132                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1133                           SDPCM_SHARED_VERSION,
1134                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1135                 return -EPROTO;
1136         }
1137
1138         return 0;
1139 }
1140
1141 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1142 {
1143         struct sdpcm_shared sh;
1144
1145         if (brcmf_sdio_readshared(bus, &sh) == 0)
1146                 bus->console_addr = sh.console_addr;
1147 }
1148 #else
1149 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1150 {
1151 }
1152 #endif /* DEBUG */
1153
1154 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1155 {
1156         u32 intstatus = 0;
1157         u32 hmb_data;
1158         u8 fcbits;
1159         int ret;
1160
1161         brcmf_dbg(SDIO, "Enter\n");
1162
1163         /* Read mailbox data and ack that we did so */
1164         ret = r_sdreg32(bus, &hmb_data,
1165                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
1166
1167         if (ret == 0)
1168                 w_sdreg32(bus, SMB_INT_ACK,
1169                           offsetof(struct sdpcmd_regs, tosbmailbox));
1170         bus->sdcnt.f1regdata += 2;
1171
1172         /* Dongle recomposed rx frames, accept them again */
1173         if (hmb_data & HMB_DATA_NAKHANDLED) {
1174                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1175                           bus->rx_seq);
1176                 if (!bus->rxskip)
1177                         brcmf_err("unexpected NAKHANDLED!\n");
1178
1179                 bus->rxskip = false;
1180                 intstatus |= I_HMB_FRAME_IND;
1181         }
1182
1183         /*
1184          * DEVREADY does not occur with gSPI.
1185          */
1186         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1187                 bus->sdpcm_ver =
1188                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1189                     HMB_DATA_VERSION_SHIFT;
1190                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1191                         brcmf_err("Version mismatch, dongle reports %d, "
1192                                   "expecting %d\n",
1193                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1194                 else
1195                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1196                                   bus->sdpcm_ver);
1197
1198                 /*
1199                  * Retrieve console state address now that firmware should have
1200                  * updated it.
1201                  */
1202                 brcmf_sdio_get_console_addr(bus);
1203         }
1204
1205         /*
1206          * Flow Control has been moved into the RX headers and this out of band
1207          * method isn't used any more.
1208          * remaining backward compatible with older dongles.
1209          */
1210         if (hmb_data & HMB_DATA_FC) {
1211                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1212                                                         HMB_DATA_FCDATA_SHIFT;
1213
1214                 if (fcbits & ~bus->flowcontrol)
1215                         bus->sdcnt.fc_xoff++;
1216
1217                 if (bus->flowcontrol & ~fcbits)
1218                         bus->sdcnt.fc_xon++;
1219
1220                 bus->sdcnt.fc_rcvd++;
1221                 bus->flowcontrol = fcbits;
1222         }
1223
1224         /* Shouldn't be any others */
1225         if (hmb_data & ~(HMB_DATA_DEVREADY |
1226                          HMB_DATA_NAKHANDLED |
1227                          HMB_DATA_FC |
1228                          HMB_DATA_FWREADY |
1229                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1230                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1231                           hmb_data);
1232
1233         return intstatus;
1234 }
1235
1236 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1237 {
1238         uint retries = 0;
1239         u16 lastrbc;
1240         u8 hi, lo;
1241         int err;
1242
1243         brcmf_err("%sterminate frame%s\n",
1244                   abort ? "abort command, " : "",
1245                   rtx ? ", send NAK" : "");
1246
1247         if (abort)
1248                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1249
1250         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1251                           SFC_RF_TERM, &err);
1252         bus->sdcnt.f1regdata++;
1253
1254         /* Wait until the packet has been flushed (device/FIFO stable) */
1255         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1256                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1257                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1258                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1259                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1260                 bus->sdcnt.f1regdata += 2;
1261
1262                 if ((hi == 0) && (lo == 0))
1263                         break;
1264
1265                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1266                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1267                                   lastrbc, (hi << 8) + lo);
1268                 }
1269                 lastrbc = (hi << 8) + lo;
1270         }
1271
1272         if (!retries)
1273                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1274         else
1275                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1276
1277         if (rtx) {
1278                 bus->sdcnt.rxrtx++;
1279                 err = w_sdreg32(bus, SMB_NAK,
1280                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1281
1282                 bus->sdcnt.f1regdata++;
1283                 if (err == 0)
1284                         bus->rxskip = true;
1285         }
1286
1287         /* Clear partial in any case */
1288         bus->cur_read.len = 0;
1289 }
1290
1291 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1292 {
1293         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1294         u8 i, hi, lo;
1295
1296         /* On failure, abort the command and terminate the frame */
1297         brcmf_err("sdio error, abort command and terminate frame\n");
1298         bus->sdcnt.tx_sderrs++;
1299
1300         brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
1301         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1302         bus->sdcnt.f1regdata++;
1303
1304         for (i = 0; i < 3; i++) {
1305                 hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1306                 lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1307                 bus->sdcnt.f1regdata += 2;
1308                 if ((hi == 0) && (lo == 0))
1309                         break;
1310         }
1311 }
1312
1313 /* return total length of buffer chain */
1314 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1315 {
1316         struct sk_buff *p;
1317         uint total;
1318
1319         total = 0;
1320         skb_queue_walk(&bus->glom, p)
1321                 total += p->len;
1322         return total;
1323 }
1324
1325 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1326 {
1327         struct sk_buff *cur, *next;
1328
1329         skb_queue_walk_safe(&bus->glom, cur, next) {
1330                 skb_unlink(cur, &bus->glom);
1331                 brcmu_pkt_buf_free_skb(cur);
1332         }
1333 }
1334
1335 /**
1336  * brcmfmac sdio bus specific header
1337  * This is the lowest layer header wrapped on the packets transmitted between
1338  * host and WiFi dongle which contains information needed for SDIO core and
1339  * firmware
1340  *
1341  * It consists of 3 parts: hardware header, hardware extension header and
1342  * software header
1343  * hardware header (frame tag) - 4 bytes
1344  * Byte 0~1: Frame length
1345  * Byte 2~3: Checksum, bit-wise inverse of frame length
1346  * hardware extension header - 8 bytes
1347  * Tx glom mode only, N/A for Rx or normal Tx
1348  * Byte 0~1: Packet length excluding hw frame tag
1349  * Byte 2: Reserved
1350  * Byte 3: Frame flags, bit 0: last frame indication
1351  * Byte 4~5: Reserved
1352  * Byte 6~7: Tail padding length
1353  * software header - 8 bytes
1354  * Byte 0: Rx/Tx sequence number
1355  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1356  * Byte 2: Length of next data frame, reserved for Tx
1357  * Byte 3: Data offset
1358  * Byte 4: Flow control bits, reserved for Tx
1359  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1360  * Byte 6~7: Reserved
1361  */
1362 #define SDPCM_HWHDR_LEN                 4
1363 #define SDPCM_HWEXT_LEN                 8
1364 #define SDPCM_SWHDR_LEN                 8
1365 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1366 /* software header */
1367 #define SDPCM_SEQ_MASK                  0x000000ff
1368 #define SDPCM_SEQ_WRAP                  256
1369 #define SDPCM_CHANNEL_MASK              0x00000f00
1370 #define SDPCM_CHANNEL_SHIFT             8
1371 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1372 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1373 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1374 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1375 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1376 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1377 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1378 #define SDPCM_NEXTLEN_SHIFT             16
1379 #define SDPCM_DOFFSET_MASK              0xff000000
1380 #define SDPCM_DOFFSET_SHIFT             24
1381 #define SDPCM_FCMASK_MASK               0x000000ff
1382 #define SDPCM_WINDOW_MASK               0x0000ff00
1383 #define SDPCM_WINDOW_SHIFT              8
1384
1385 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1386 {
1387         u32 hdrvalue;
1388         hdrvalue = *(u32 *)swheader;
1389         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1390 }
1391
1392 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1393                               struct brcmf_sdio_hdrinfo *rd,
1394                               enum brcmf_sdio_frmtype type)
1395 {
1396         u16 len, checksum;
1397         u8 rx_seq, fc, tx_seq_max;
1398         u32 swheader;
1399
1400         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1401
1402         /* hw header */
1403         len = get_unaligned_le16(header);
1404         checksum = get_unaligned_le16(header + sizeof(u16));
1405         /* All zero means no more to read */
1406         if (!(len | checksum)) {
1407                 bus->rxpending = false;
1408                 return -ENODATA;
1409         }
1410         if ((u16)(~(len ^ checksum))) {
1411                 brcmf_err("HW header checksum error\n");
1412                 bus->sdcnt.rx_badhdr++;
1413                 brcmf_sdio_rxfail(bus, false, false);
1414                 return -EIO;
1415         }
1416         if (len < SDPCM_HDRLEN) {
1417                 brcmf_err("HW header length error\n");
1418                 return -EPROTO;
1419         }
1420         if (type == BRCMF_SDIO_FT_SUPER &&
1421             (roundup(len, bus->blocksize) != rd->len)) {
1422                 brcmf_err("HW superframe header length error\n");
1423                 return -EPROTO;
1424         }
1425         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1426                 brcmf_err("HW subframe header length error\n");
1427                 return -EPROTO;
1428         }
1429         rd->len = len;
1430
1431         /* software header */
1432         header += SDPCM_HWHDR_LEN;
1433         swheader = le32_to_cpu(*(__le32 *)header);
1434         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1435                 brcmf_err("Glom descriptor found in superframe head\n");
1436                 rd->len = 0;
1437                 return -EINVAL;
1438         }
1439         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1440         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1441         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1442             type != BRCMF_SDIO_FT_SUPER) {
1443                 brcmf_err("HW header length too long\n");
1444                 bus->sdcnt.rx_toolong++;
1445                 brcmf_sdio_rxfail(bus, false, false);
1446                 rd->len = 0;
1447                 return -EPROTO;
1448         }
1449         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1450                 brcmf_err("Wrong channel for superframe\n");
1451                 rd->len = 0;
1452                 return -EINVAL;
1453         }
1454         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1455             rd->channel != SDPCM_EVENT_CHANNEL) {
1456                 brcmf_err("Wrong channel for subframe\n");
1457                 rd->len = 0;
1458                 return -EINVAL;
1459         }
1460         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1461         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1462                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1463                 bus->sdcnt.rx_badhdr++;
1464                 brcmf_sdio_rxfail(bus, false, false);
1465                 rd->len = 0;
1466                 return -ENXIO;
1467         }
1468         if (rd->seq_num != rx_seq) {
1469                 brcmf_err("seq %d: sequence number error, expect %d\n",
1470                           rx_seq, rd->seq_num);
1471                 bus->sdcnt.rx_badseq++;
1472                 rd->seq_num = rx_seq;
1473         }
1474         /* no need to check the reset for subframe */
1475         if (type == BRCMF_SDIO_FT_SUB)
1476                 return 0;
1477         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1478         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1479                 /* only warm for NON glom packet */
1480                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1481                         brcmf_err("seq %d: next length error\n", rx_seq);
1482                 rd->len_nxtfrm = 0;
1483         }
1484         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1485         fc = swheader & SDPCM_FCMASK_MASK;
1486         if (bus->flowcontrol != fc) {
1487                 if (~bus->flowcontrol & fc)
1488                         bus->sdcnt.fc_xoff++;
1489                 if (bus->flowcontrol & ~fc)
1490                         bus->sdcnt.fc_xon++;
1491                 bus->sdcnt.fc_rcvd++;
1492                 bus->flowcontrol = fc;
1493         }
1494         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1495         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1496                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1497                 tx_seq_max = bus->tx_seq + 2;
1498         }
1499         bus->tx_max = tx_seq_max;
1500
1501         return 0;
1502 }
1503
1504 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1505 {
1506         *(__le16 *)header = cpu_to_le16(frm_length);
1507         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1508 }
1509
1510 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1511                               struct brcmf_sdio_hdrinfo *hd_info)
1512 {
1513         u32 hdrval;
1514         u8 hdr_offset;
1515
1516         brcmf_sdio_update_hwhdr(header, hd_info->len);
1517         hdr_offset = SDPCM_HWHDR_LEN;
1518
1519         if (bus->txglom) {
1520                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1521                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1522                 hdrval = (u16)hd_info->tail_pad << 16;
1523                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1524                 hdr_offset += SDPCM_HWEXT_LEN;
1525         }
1526
1527         hdrval = hd_info->seq_num;
1528         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1529                   SDPCM_CHANNEL_MASK;
1530         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1531                   SDPCM_DOFFSET_MASK;
1532         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1533         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1534         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1535 }
1536
1537 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1538 {
1539         u16 dlen, totlen;
1540         u8 *dptr, num = 0;
1541         u16 sublen;
1542         struct sk_buff *pfirst, *pnext;
1543
1544         int errcode;
1545         u8 doff, sfdoff;
1546
1547         struct brcmf_sdio_hdrinfo rd_new;
1548
1549         /* If packets, issue read(s) and send up packet chain */
1550         /* Return sequence numbers consumed? */
1551
1552         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1553                   bus->glomd, skb_peek(&bus->glom));
1554
1555         /* If there's a descriptor, generate the packet chain */
1556         if (bus->glomd) {
1557                 pfirst = pnext = NULL;
1558                 dlen = (u16) (bus->glomd->len);
1559                 dptr = bus->glomd->data;
1560                 if (!dlen || (dlen & 1)) {
1561                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1562                                   dlen);
1563                         dlen = 0;
1564                 }
1565
1566                 for (totlen = num = 0; dlen; num++) {
1567                         /* Get (and move past) next length */
1568                         sublen = get_unaligned_le16(dptr);
1569                         dlen -= sizeof(u16);
1570                         dptr += sizeof(u16);
1571                         if ((sublen < SDPCM_HDRLEN) ||
1572                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1573                                 brcmf_err("descriptor len %d bad: %d\n",
1574                                           num, sublen);
1575                                 pnext = NULL;
1576                                 break;
1577                         }
1578                         if (sublen % bus->sgentry_align) {
1579                                 brcmf_err("sublen %d not multiple of %d\n",
1580                                           sublen, bus->sgentry_align);
1581                         }
1582                         totlen += sublen;
1583
1584                         /* For last frame, adjust read len so total
1585                                  is a block multiple */
1586                         if (!dlen) {
1587                                 sublen +=
1588                                     (roundup(totlen, bus->blocksize) - totlen);
1589                                 totlen = roundup(totlen, bus->blocksize);
1590                         }
1591
1592                         /* Allocate/chain packet for next subframe */
1593                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1594                         if (pnext == NULL) {
1595                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1596                                           num, sublen);
1597                                 break;
1598                         }
1599                         skb_queue_tail(&bus->glom, pnext);
1600
1601                         /* Adhere to start alignment requirements */
1602                         pkt_align(pnext, sublen, bus->sgentry_align);
1603                 }
1604
1605                 /* If all allocations succeeded, save packet chain
1606                          in bus structure */
1607                 if (pnext) {
1608                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1609                                   totlen, num);
1610                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1611                             totlen != bus->cur_read.len) {
1612                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1613                                           bus->cur_read.len, totlen, rxseq);
1614                         }
1615                         pfirst = pnext = NULL;
1616                 } else {
1617                         brcmf_sdio_free_glom(bus);
1618                         num = 0;
1619                 }
1620
1621                 /* Done with descriptor packet */
1622                 brcmu_pkt_buf_free_skb(bus->glomd);
1623                 bus->glomd = NULL;
1624                 bus->cur_read.len = 0;
1625         }
1626
1627         /* Ok -- either we just generated a packet chain,
1628                  or had one from before */
1629         if (!skb_queue_empty(&bus->glom)) {
1630                 if (BRCMF_GLOM_ON()) {
1631                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1632                         skb_queue_walk(&bus->glom, pnext) {
1633                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1634                                           pnext, (u8 *) (pnext->data),
1635                                           pnext->len, pnext->len);
1636                         }
1637                 }
1638
1639                 pfirst = skb_peek(&bus->glom);
1640                 dlen = (u16) brcmf_sdio_glom_len(bus);
1641
1642                 /* Do an SDIO read for the superframe.  Configurable iovar to
1643                  * read directly into the chained packet, or allocate a large
1644                  * packet and and copy into the chain.
1645                  */
1646                 sdio_claim_host(bus->sdiodev->func[1]);
1647                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1648                                                  &bus->glom, dlen);
1649                 sdio_release_host(bus->sdiodev->func[1]);
1650                 bus->sdcnt.f2rxdata++;
1651
1652                 /* On failure, kill the superframe, allow a couple retries */
1653                 if (errcode < 0) {
1654                         brcmf_err("glom read of %d bytes failed: %d\n",
1655                                   dlen, errcode);
1656
1657                         sdio_claim_host(bus->sdiodev->func[1]);
1658                         if (bus->glomerr++ < 3) {
1659                                 brcmf_sdio_rxfail(bus, true, true);
1660                         } else {
1661                                 bus->glomerr = 0;
1662                                 brcmf_sdio_rxfail(bus, true, false);
1663                                 bus->sdcnt.rxglomfail++;
1664                                 brcmf_sdio_free_glom(bus);
1665                         }
1666                         sdio_release_host(bus->sdiodev->func[1]);
1667                         return 0;
1668                 }
1669
1670                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1671                                    pfirst->data, min_t(int, pfirst->len, 48),
1672                                    "SUPERFRAME:\n");
1673
1674                 rd_new.seq_num = rxseq;
1675                 rd_new.len = dlen;
1676                 sdio_claim_host(bus->sdiodev->func[1]);
1677                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1678                                              BRCMF_SDIO_FT_SUPER);
1679                 sdio_release_host(bus->sdiodev->func[1]);
1680                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1681
1682                 /* Remove superframe header, remember offset */
1683                 skb_pull(pfirst, rd_new.dat_offset);
1684                 sfdoff = rd_new.dat_offset;
1685                 num = 0;
1686
1687                 /* Validate all the subframe headers */
1688                 skb_queue_walk(&bus->glom, pnext) {
1689                         /* leave when invalid subframe is found */
1690                         if (errcode)
1691                                 break;
1692
1693                         rd_new.len = pnext->len;
1694                         rd_new.seq_num = rxseq++;
1695                         sdio_claim_host(bus->sdiodev->func[1]);
1696                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1697                                                      BRCMF_SDIO_FT_SUB);
1698                         sdio_release_host(bus->sdiodev->func[1]);
1699                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1700                                            pnext->data, 32, "subframe:\n");
1701
1702                         num++;
1703                 }
1704
1705                 if (errcode) {
1706                         /* Terminate frame on error, request
1707                                  a couple retries */
1708                         sdio_claim_host(bus->sdiodev->func[1]);
1709                         if (bus->glomerr++ < 3) {
1710                                 /* Restore superframe header space */
1711                                 skb_push(pfirst, sfdoff);
1712                                 brcmf_sdio_rxfail(bus, true, true);
1713                         } else {
1714                                 bus->glomerr = 0;
1715                                 brcmf_sdio_rxfail(bus, true, false);
1716                                 bus->sdcnt.rxglomfail++;
1717                                 brcmf_sdio_free_glom(bus);
1718                         }
1719                         sdio_release_host(bus->sdiodev->func[1]);
1720                         bus->cur_read.len = 0;
1721                         return 0;
1722                 }
1723
1724                 /* Basic SD framing looks ok - process each packet (header) */
1725
1726                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1727                         dptr = (u8 *) (pfirst->data);
1728                         sublen = get_unaligned_le16(dptr);
1729                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1730
1731                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1732                                            dptr, pfirst->len,
1733                                            "Rx Subframe Data:\n");
1734
1735                         __skb_trim(pfirst, sublen);
1736                         skb_pull(pfirst, doff);
1737
1738                         if (pfirst->len == 0) {
1739                                 skb_unlink(pfirst, &bus->glom);
1740                                 brcmu_pkt_buf_free_skb(pfirst);
1741                                 continue;
1742                         }
1743
1744                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1745                                            pfirst->data,
1746                                            min_t(int, pfirst->len, 32),
1747                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1748                                            bus->glom.qlen, pfirst, pfirst->data,
1749                                            pfirst->len, pfirst->next,
1750                                            pfirst->prev);
1751                         skb_unlink(pfirst, &bus->glom);
1752                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1753                         bus->sdcnt.rxglompkts++;
1754                 }
1755
1756                 bus->sdcnt.rxglomframes++;
1757         }
1758         return num;
1759 }
1760
1761 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1762                                      bool *pending)
1763 {
1764         DECLARE_WAITQUEUE(wait, current);
1765         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1766
1767         /* Wait until control frame is available */
1768         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1769         set_current_state(TASK_INTERRUPTIBLE);
1770
1771         while (!(*condition) && (!signal_pending(current) && timeout))
1772                 timeout = schedule_timeout(timeout);
1773
1774         if (signal_pending(current))
1775                 *pending = true;
1776
1777         set_current_state(TASK_RUNNING);
1778         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1779
1780         return timeout;
1781 }
1782
1783 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1784 {
1785         if (waitqueue_active(&bus->dcmd_resp_wait))
1786                 wake_up_interruptible(&bus->dcmd_resp_wait);
1787
1788         return 0;
1789 }
1790 static void
1791 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1792 {
1793         uint rdlen, pad;
1794         u8 *buf = NULL, *rbuf;
1795         int sdret;
1796
1797         brcmf_dbg(TRACE, "Enter\n");
1798
1799         if (bus->rxblen)
1800                 buf = vzalloc(bus->rxblen);
1801         if (!buf)
1802                 goto done;
1803
1804         rbuf = bus->rxbuf;
1805         pad = ((unsigned long)rbuf % bus->head_align);
1806         if (pad)
1807                 rbuf += (bus->head_align - pad);
1808
1809         /* Copy the already-read portion over */
1810         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1811         if (len <= BRCMF_FIRSTREAD)
1812                 goto gotpkt;
1813
1814         /* Raise rdlen to next SDIO block to avoid tail command */
1815         rdlen = len - BRCMF_FIRSTREAD;
1816         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1817                 pad = bus->blocksize - (rdlen % bus->blocksize);
1818                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1819                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1820                         rdlen += pad;
1821         } else if (rdlen % bus->head_align) {
1822                 rdlen += bus->head_align - (rdlen % bus->head_align);
1823         }
1824
1825         /* Drop if the read is too big or it exceeds our maximum */
1826         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1827                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1828                           rdlen, bus->sdiodev->bus_if->maxctl);
1829                 brcmf_sdio_rxfail(bus, false, false);
1830                 goto done;
1831         }
1832
1833         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1834                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1835                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1836                 bus->sdcnt.rx_toolong++;
1837                 brcmf_sdio_rxfail(bus, false, false);
1838                 goto done;
1839         }
1840
1841         /* Read remain of frame body */
1842         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1843         bus->sdcnt.f2rxdata++;
1844
1845         /* Control frame failures need retransmission */
1846         if (sdret < 0) {
1847                 brcmf_err("read %d control bytes failed: %d\n",
1848                           rdlen, sdret);
1849                 bus->sdcnt.rxc_errors++;
1850                 brcmf_sdio_rxfail(bus, true, true);
1851                 goto done;
1852         } else
1853                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1854
1855 gotpkt:
1856
1857         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1858                            buf, len, "RxCtrl:\n");
1859
1860         /* Point to valid data and indicate its length */
1861         spin_lock_bh(&bus->rxctl_lock);
1862         if (bus->rxctl) {
1863                 brcmf_err("last control frame is being processed.\n");
1864                 spin_unlock_bh(&bus->rxctl_lock);
1865                 vfree(buf);
1866                 goto done;
1867         }
1868         bus->rxctl = buf + doff;
1869         bus->rxctl_orig = buf;
1870         bus->rxlen = len - doff;
1871         spin_unlock_bh(&bus->rxctl_lock);
1872
1873 done:
1874         /* Awake any waiters */
1875         brcmf_sdio_dcmd_resp_wake(bus);
1876 }
1877
1878 /* Pad read to blocksize for efficiency */
1879 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1880 {
1881         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1882                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1883                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1884                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1885                         *rdlen += *pad;
1886         } else if (*rdlen % bus->head_align) {
1887                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1888         }
1889 }
1890
1891 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1892 {
1893         struct sk_buff *pkt;            /* Packet for event or data frames */
1894         u16 pad;                /* Number of pad bytes to read */
1895         uint rxleft = 0;        /* Remaining number of frames allowed */
1896         int ret;                /* Return code from calls */
1897         uint rxcount = 0;       /* Total frames read */
1898         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1899         u8 head_read = 0;
1900
1901         brcmf_dbg(TRACE, "Enter\n");
1902
1903         /* Not finished unless we encounter no more frames indication */
1904         bus->rxpending = true;
1905
1906         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1907              !bus->rxskip && rxleft && brcmf_bus_ready(bus->sdiodev->bus_if);
1908              rd->seq_num++, rxleft--) {
1909
1910                 /* Handle glomming separately */
1911                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1912                         u8 cnt;
1913                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1914                                   bus->glomd, skb_peek(&bus->glom));
1915                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1916                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1917                         rd->seq_num += cnt - 1;
1918                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1919                         continue;
1920                 }
1921
1922                 rd->len_left = rd->len;
1923                 /* read header first for unknow frame length */
1924                 sdio_claim_host(bus->sdiodev->func[1]);
1925                 if (!rd->len) {
1926                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1927                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1928                         bus->sdcnt.f2rxhdrs++;
1929                         if (ret < 0) {
1930                                 brcmf_err("RXHEADER FAILED: %d\n",
1931                                           ret);
1932                                 bus->sdcnt.rx_hdrfail++;
1933                                 brcmf_sdio_rxfail(bus, true, true);
1934                                 sdio_release_host(bus->sdiodev->func[1]);
1935                                 continue;
1936                         }
1937
1938                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1939                                            bus->rxhdr, SDPCM_HDRLEN,
1940                                            "RxHdr:\n");
1941
1942                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1943                                                BRCMF_SDIO_FT_NORMAL)) {
1944                                 sdio_release_host(bus->sdiodev->func[1]);
1945                                 if (!bus->rxpending)
1946                                         break;
1947                                 else
1948                                         continue;
1949                         }
1950
1951                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1952                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1953                                                         rd->len,
1954                                                         rd->dat_offset);
1955                                 /* prepare the descriptor for the next read */
1956                                 rd->len = rd->len_nxtfrm << 4;
1957                                 rd->len_nxtfrm = 0;
1958                                 /* treat all packet as event if we don't know */
1959                                 rd->channel = SDPCM_EVENT_CHANNEL;
1960                                 sdio_release_host(bus->sdiodev->func[1]);
1961                                 continue;
1962                         }
1963                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1964                                        rd->len - BRCMF_FIRSTREAD : 0;
1965                         head_read = BRCMF_FIRSTREAD;
1966                 }
1967
1968                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1969
1970                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1971                                             bus->head_align);
1972                 if (!pkt) {
1973                         /* Give up on data, request rtx of events */
1974                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1975                         brcmf_sdio_rxfail(bus, false,
1976                                             RETRYCHAN(rd->channel));
1977                         sdio_release_host(bus->sdiodev->func[1]);
1978                         continue;
1979                 }
1980                 skb_pull(pkt, head_read);
1981                 pkt_align(pkt, rd->len_left, bus->head_align);
1982
1983                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1984                 bus->sdcnt.f2rxdata++;
1985                 sdio_release_host(bus->sdiodev->func[1]);
1986
1987                 if (ret < 0) {
1988                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1989                                   rd->len, rd->channel, ret);
1990                         brcmu_pkt_buf_free_skb(pkt);
1991                         sdio_claim_host(bus->sdiodev->func[1]);
1992                         brcmf_sdio_rxfail(bus, true,
1993                                             RETRYCHAN(rd->channel));
1994                         sdio_release_host(bus->sdiodev->func[1]);
1995                         continue;
1996                 }
1997
1998                 if (head_read) {
1999                         skb_push(pkt, head_read);
2000                         memcpy(pkt->data, bus->rxhdr, head_read);
2001                         head_read = 0;
2002                 } else {
2003                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
2004                         rd_new.seq_num = rd->seq_num;
2005                         sdio_claim_host(bus->sdiodev->func[1]);
2006                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
2007                                                BRCMF_SDIO_FT_NORMAL)) {
2008                                 rd->len = 0;
2009                                 brcmu_pkt_buf_free_skb(pkt);
2010                         }
2011                         bus->sdcnt.rx_readahead_cnt++;
2012                         if (rd->len != roundup(rd_new.len, 16)) {
2013                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
2014                                           rd->len,
2015                                           roundup(rd_new.len, 16) >> 4);
2016                                 rd->len = 0;
2017                                 brcmf_sdio_rxfail(bus, true, true);
2018                                 sdio_release_host(bus->sdiodev->func[1]);
2019                                 brcmu_pkt_buf_free_skb(pkt);
2020                                 continue;
2021                         }
2022                         sdio_release_host(bus->sdiodev->func[1]);
2023                         rd->len_nxtfrm = rd_new.len_nxtfrm;
2024                         rd->channel = rd_new.channel;
2025                         rd->dat_offset = rd_new.dat_offset;
2026
2027                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2028                                              BRCMF_DATA_ON()) &&
2029                                            BRCMF_HDRS_ON(),
2030                                            bus->rxhdr, SDPCM_HDRLEN,
2031                                            "RxHdr:\n");
2032
2033                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
2034                                 brcmf_err("readahead on control packet %d?\n",
2035                                           rd_new.seq_num);
2036                                 /* Force retry w/normal header read */
2037                                 rd->len = 0;
2038                                 sdio_claim_host(bus->sdiodev->func[1]);
2039                                 brcmf_sdio_rxfail(bus, false, true);
2040                                 sdio_release_host(bus->sdiodev->func[1]);
2041                                 brcmu_pkt_buf_free_skb(pkt);
2042                                 continue;
2043                         }
2044                 }
2045
2046                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
2047                                    pkt->data, rd->len, "Rx Data:\n");
2048
2049                 /* Save superframe descriptor and allocate packet frame */
2050                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
2051                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
2052                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2053                                           rd->len);
2054                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
2055                                                    pkt->data, rd->len,
2056                                                    "Glom Data:\n");
2057                                 __skb_trim(pkt, rd->len);
2058                                 skb_pull(pkt, SDPCM_HDRLEN);
2059                                 bus->glomd = pkt;
2060                         } else {
2061                                 brcmf_err("%s: glom superframe w/o "
2062                                           "descriptor!\n", __func__);
2063                                 sdio_claim_host(bus->sdiodev->func[1]);
2064                                 brcmf_sdio_rxfail(bus, false, false);
2065                                 sdio_release_host(bus->sdiodev->func[1]);
2066                         }
2067                         /* prepare the descriptor for the next read */
2068                         rd->len = rd->len_nxtfrm << 4;
2069                         rd->len_nxtfrm = 0;
2070                         /* treat all packet as event if we don't know */
2071                         rd->channel = SDPCM_EVENT_CHANNEL;
2072                         continue;
2073                 }
2074
2075                 /* Fill in packet len and prio, deliver upward */
2076                 __skb_trim(pkt, rd->len);
2077                 skb_pull(pkt, rd->dat_offset);
2078
2079                 /* prepare the descriptor for the next read */
2080                 rd->len = rd->len_nxtfrm << 4;
2081                 rd->len_nxtfrm = 0;
2082                 /* treat all packet as event if we don't know */
2083                 rd->channel = SDPCM_EVENT_CHANNEL;
2084
2085                 if (pkt->len == 0) {
2086                         brcmu_pkt_buf_free_skb(pkt);
2087                         continue;
2088                 }
2089
2090                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
2091         }
2092
2093         rxcount = maxframes - rxleft;
2094         /* Message if we hit the limit */
2095         if (!rxleft)
2096                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2097         else
2098                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2099         /* Back off rxseq if awaiting rtx, update rx_seq */
2100         if (bus->rxskip)
2101                 rd->seq_num--;
2102         bus->rx_seq = rd->seq_num;
2103
2104         return rxcount;
2105 }
2106
2107 static void
2108 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2109 {
2110         if (waitqueue_active(&bus->ctrl_wait))
2111                 wake_up_interruptible(&bus->ctrl_wait);
2112         return;
2113 }
2114
2115 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2116 {
2117         u16 head_pad;
2118         u8 *dat_buf;
2119
2120         dat_buf = (u8 *)(pkt->data);
2121
2122         /* Check head padding */
2123         head_pad = ((unsigned long)dat_buf % bus->head_align);
2124         if (head_pad) {
2125                 if (skb_headroom(pkt) < head_pad) {
2126                         bus->sdiodev->bus_if->tx_realloc++;
2127                         head_pad = 0;
2128                         if (skb_cow(pkt, head_pad))
2129                                 return -ENOMEM;
2130                 }
2131                 skb_push(pkt, head_pad);
2132                 dat_buf = (u8 *)(pkt->data);
2133                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2134         }
2135         return head_pad;
2136 }
2137
2138 /**
2139  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2140  * bus layer usage.
2141  */
2142 /* flag marking a dummy skb added for DMA alignment requirement */
2143 #define ALIGN_SKB_FLAG          0x8000
2144 /* bit mask of data length chopped from the previous packet */
2145 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2146
2147 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2148                                     struct sk_buff_head *pktq,
2149                                     struct sk_buff *pkt, u16 total_len)
2150 {
2151         struct brcmf_sdio_dev *sdiodev;
2152         struct sk_buff *pkt_pad;
2153         u16 tail_pad, tail_chop, chain_pad;
2154         unsigned int blksize;
2155         bool lastfrm;
2156         int ntail, ret;
2157
2158         sdiodev = bus->sdiodev;
2159         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
2160         /* sg entry alignment should be a divisor of block size */
2161         WARN_ON(blksize % bus->sgentry_align);
2162
2163         /* Check tail padding */
2164         lastfrm = skb_queue_is_last(pktq, pkt);
2165         tail_pad = 0;
2166         tail_chop = pkt->len % bus->sgentry_align;
2167         if (tail_chop)
2168                 tail_pad = bus->sgentry_align - tail_chop;
2169         chain_pad = (total_len + tail_pad) % blksize;
2170         if (lastfrm && chain_pad)
2171                 tail_pad += blksize - chain_pad;
2172         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2173                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2174                                                 bus->head_align);
2175                 if (pkt_pad == NULL)
2176                         return -ENOMEM;
2177                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2178                 if (unlikely(ret < 0)) {
2179                         kfree_skb(pkt_pad);
2180                         return ret;
2181                 }
2182                 memcpy(pkt_pad->data,
2183                        pkt->data + pkt->len - tail_chop,
2184                        tail_chop);
2185                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2186                 skb_trim(pkt, pkt->len - tail_chop);
2187                 skb_trim(pkt_pad, tail_pad + tail_chop);
2188                 __skb_queue_after(pktq, pkt, pkt_pad);
2189         } else {
2190                 ntail = pkt->data_len + tail_pad -
2191                         (pkt->end - pkt->tail);
2192                 if (skb_cloned(pkt) || ntail > 0)
2193                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2194                                 return -ENOMEM;
2195                 if (skb_linearize(pkt))
2196                         return -ENOMEM;
2197                 __skb_put(pkt, tail_pad);
2198         }
2199
2200         return tail_pad;
2201 }
2202
2203 /**
2204  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2205  * @bus: brcmf_sdio structure pointer
2206  * @pktq: packet list pointer
2207  * @chan: virtual channel to transmit the packet
2208  *
2209  * Processes to be applied to the packet
2210  *      - Align data buffer pointer
2211  *      - Align data buffer length
2212  *      - Prepare header
2213  * Return: negative value if there is error
2214  */
2215 static int
2216 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2217                       uint chan)
2218 {
2219         u16 head_pad, total_len;
2220         struct sk_buff *pkt_next;
2221         u8 txseq;
2222         int ret;
2223         struct brcmf_sdio_hdrinfo hd_info = {0};
2224
2225         txseq = bus->tx_seq;
2226         total_len = 0;
2227         skb_queue_walk(pktq, pkt_next) {
2228                 /* alignment packet inserted in previous
2229                  * loop cycle can be skipped as it is
2230                  * already properly aligned and does not
2231                  * need an sdpcm header.
2232                  */
2233                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2234                         continue;
2235
2236                 /* align packet data pointer */
2237                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2238                 if (ret < 0)
2239                         return ret;
2240                 head_pad = (u16)ret;
2241                 if (head_pad)
2242                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2243
2244                 total_len += pkt_next->len;
2245
2246                 hd_info.len = pkt_next->len;
2247                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2248                 if (bus->txglom && pktq->qlen > 1) {
2249                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2250                                                        pkt_next, total_len);
2251                         if (ret < 0)
2252                                 return ret;
2253                         hd_info.tail_pad = (u16)ret;
2254                         total_len += (u16)ret;
2255                 }
2256
2257                 hd_info.channel = chan;
2258                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2259                 hd_info.seq_num = txseq++;
2260
2261                 /* Now fill the header */
2262                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2263
2264                 if (BRCMF_BYTES_ON() &&
2265                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2266                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2267                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2268                                            "Tx Frame:\n");
2269                 else if (BRCMF_HDRS_ON())
2270                         brcmf_dbg_hex_dump(true, pkt_next->data,
2271                                            head_pad + bus->tx_hdrlen,
2272                                            "Tx Header:\n");
2273         }
2274         /* Hardware length tag of the first packet should be total
2275          * length of the chain (including padding)
2276          */
2277         if (bus->txglom)
2278                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2279         return 0;
2280 }
2281
2282 /**
2283  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2284  * @bus: brcmf_sdio structure pointer
2285  * @pktq: packet list pointer
2286  *
2287  * Processes to be applied to the packet
2288  *      - Remove head padding
2289  *      - Remove tail padding
2290  */
2291 static void
2292 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2293 {
2294         u8 *hdr;
2295         u32 dat_offset;
2296         u16 tail_pad;
2297         u16 dummy_flags, chop_len;
2298         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2299
2300         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2301                 dummy_flags = *(u16 *)(pkt_next->cb);
2302                 if (dummy_flags & ALIGN_SKB_FLAG) {
2303                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2304                         if (chop_len) {
2305                                 pkt_prev = pkt_next->prev;
2306                                 skb_put(pkt_prev, chop_len);
2307                         }
2308                         __skb_unlink(pkt_next, pktq);
2309                         brcmu_pkt_buf_free_skb(pkt_next);
2310                 } else {
2311                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2312                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2313                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2314                                      SDPCM_DOFFSET_SHIFT;
2315                         skb_pull(pkt_next, dat_offset);
2316                         if (bus->txglom) {
2317                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2318                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2319                         }
2320                 }
2321         }
2322 }
2323
2324 /* Writes a HW/SW header into the packet and sends it. */
2325 /* Assumes: (a) header space already there, (b) caller holds lock */
2326 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2327                             uint chan)
2328 {
2329         int ret;
2330         struct sk_buff *pkt_next, *tmp;
2331
2332         brcmf_dbg(TRACE, "Enter\n");
2333
2334         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2335         if (ret)
2336                 goto done;
2337
2338         sdio_claim_host(bus->sdiodev->func[1]);
2339         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2340         bus->sdcnt.f2txdata++;
2341
2342         if (ret < 0)
2343                 brcmf_sdio_txfail(bus);
2344
2345         sdio_release_host(bus->sdiodev->func[1]);
2346
2347 done:
2348         brcmf_sdio_txpkt_postp(bus, pktq);
2349         if (ret == 0)
2350                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2351         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2352                 __skb_unlink(pkt_next, pktq);
2353                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2354         }
2355         return ret;
2356 }
2357
2358 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2359 {
2360         struct sk_buff *pkt;
2361         struct sk_buff_head pktq;
2362         u32 intstatus = 0;
2363         int ret = 0, prec_out, i;
2364         uint cnt = 0;
2365         u8 tx_prec_map, pkt_num;
2366
2367         brcmf_dbg(TRACE, "Enter\n");
2368
2369         tx_prec_map = ~bus->flowcontrol;
2370
2371         /* Send frames until the limit or some other event */
2372         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2373                 pkt_num = 1;
2374                 if (down_interruptible(&bus->tx_seq_lock))
2375                         return cnt;
2376                 if (bus->txglom)
2377                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2378                                         bus->sdiodev->txglomsz);
2379                 pkt_num = min_t(u32, pkt_num,
2380                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2381                 __skb_queue_head_init(&pktq);
2382                 spin_lock_bh(&bus->txq_lock);
2383                 for (i = 0; i < pkt_num; i++) {
2384                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2385                                               &prec_out);
2386                         if (pkt == NULL)
2387                                 break;
2388                         __skb_queue_tail(&pktq, pkt);
2389                 }
2390                 spin_unlock_bh(&bus->txq_lock);
2391                 if (i == 0) {
2392                         up(&bus->tx_seq_lock);
2393                         break;
2394                 }
2395
2396                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2397                 up(&bus->tx_seq_lock);
2398
2399                 cnt += i;
2400
2401                 /* In poll mode, need to check for other events */
2402                 if (!bus->intr) {
2403                         /* Check device status, signal pending interrupt */
2404                         sdio_claim_host(bus->sdiodev->func[1]);
2405                         ret = r_sdreg32(bus, &intstatus,
2406                                         offsetof(struct sdpcmd_regs,
2407                                                  intstatus));
2408                         sdio_release_host(bus->sdiodev->func[1]);
2409                         bus->sdcnt.f2txdata++;
2410                         if (ret != 0)
2411                                 break;
2412                         if (intstatus & bus->hostintmask)
2413                                 atomic_set(&bus->ipend, 1);
2414                 }
2415         }
2416
2417         /* Deflow-control stack if needed */
2418         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2419             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2420                 bus->txoff = false;
2421                 brcmf_txflowblock(bus->sdiodev->dev, false);
2422         }
2423
2424         return cnt;
2425 }
2426
2427 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2428 {
2429         u8 doff;
2430         u16 pad;
2431         uint retries = 0;
2432         struct brcmf_sdio_hdrinfo hd_info = {0};
2433         int ret;
2434
2435         brcmf_dbg(TRACE, "Enter\n");
2436
2437         /* Back the pointer to make room for bus header */
2438         frame -= bus->tx_hdrlen;
2439         len += bus->tx_hdrlen;
2440
2441         /* Add alignment padding (optional for ctl frames) */
2442         doff = ((unsigned long)frame % bus->head_align);
2443         if (doff) {
2444                 frame -= doff;
2445                 len += doff;
2446                 memset(frame + bus->tx_hdrlen, 0, doff);
2447         }
2448
2449         /* Round send length to next SDIO block */
2450         pad = 0;
2451         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2452                 pad = bus->blocksize - (len % bus->blocksize);
2453                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2454                         pad = 0;
2455         } else if (len % bus->head_align) {
2456                 pad = bus->head_align - (len % bus->head_align);
2457         }
2458         len += pad;
2459
2460         hd_info.len = len - pad;
2461         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2462         hd_info.dat_offset = doff + bus->tx_hdrlen;
2463         hd_info.seq_num = bus->tx_seq;
2464         hd_info.lastfrm = true;
2465         hd_info.tail_pad = pad;
2466         brcmf_sdio_hdpack(bus, frame, &hd_info);
2467
2468         if (bus->txglom)
2469                 brcmf_sdio_update_hwhdr(frame, len);
2470
2471         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2472                            frame, len, "Tx Frame:\n");
2473         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2474                            BRCMF_HDRS_ON(),
2475                            frame, min_t(u16, len, 16), "TxHdr:\n");
2476
2477         do {
2478                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2479
2480                 if (ret < 0)
2481                         brcmf_sdio_txfail(bus);
2482                 else
2483                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2484         } while (ret < 0 && retries++ < TXRETRIES);
2485
2486         return ret;
2487 }
2488
2489 static void brcmf_sdio_bus_stop(struct device *dev)
2490 {
2491         u32 local_hostintmask;
2492         u8 saveclk;
2493         int err;
2494         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2495         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2496         struct brcmf_sdio *bus = sdiodev->bus;
2497
2498         brcmf_dbg(TRACE, "Enter\n");
2499
2500         if (bus->watchdog_tsk) {
2501                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2502                 kthread_stop(bus->watchdog_tsk);
2503                 bus->watchdog_tsk = NULL;
2504         }
2505
2506         if (bus_if->state == BRCMF_BUS_DOWN) {
2507                 sdio_claim_host(sdiodev->func[1]);
2508
2509                 /* Enable clock for device interrupts */
2510                 brcmf_sdio_bus_sleep(bus, false, false);
2511
2512                 /* Disable and clear interrupts at the chip level also */
2513                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2514                 local_hostintmask = bus->hostintmask;
2515                 bus->hostintmask = 0;
2516
2517                 /* Force backplane clocks to assure F2 interrupt propagates */
2518                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2519                                             &err);
2520                 if (!err)
2521                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2522                                           (saveclk | SBSDIO_FORCE_HT), &err);
2523                 if (err)
2524                         brcmf_err("Failed to force clock for F2: err %d\n",
2525                                   err);
2526
2527                 /* Turn off the bus (F2), free any pending packets */
2528                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2529                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2530
2531                 /* Clear any pending interrupts now that F2 is disabled */
2532                 w_sdreg32(bus, local_hostintmask,
2533                           offsetof(struct sdpcmd_regs, intstatus));
2534
2535                 sdio_release_host(sdiodev->func[1]);
2536         }
2537         /* Clear the data packet queues */
2538         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2539
2540         /* Clear any held glomming stuff */
2541         if (bus->glomd)
2542                 brcmu_pkt_buf_free_skb(bus->glomd);
2543         brcmf_sdio_free_glom(bus);
2544
2545         /* Clear rx control and wake any waiters */
2546         spin_lock_bh(&bus->rxctl_lock);
2547         bus->rxlen = 0;
2548         spin_unlock_bh(&bus->rxctl_lock);
2549         brcmf_sdio_dcmd_resp_wake(bus);
2550
2551         /* Reset some F2 state stuff */
2552         bus->rxskip = false;
2553         bus->tx_seq = bus->rx_seq = 0;
2554 }
2555
2556 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2557 {
2558         unsigned long flags;
2559
2560         if (bus->sdiodev->oob_irq_requested) {
2561                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2562                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2563                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2564                         bus->sdiodev->irq_en = true;
2565                 }
2566                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2567         }
2568 }
2569
2570 static void atomic_orr(int val, atomic_t *v)
2571 {
2572         int old_val;
2573
2574         old_val = atomic_read(v);
2575         while (atomic_cmpxchg(v, old_val, val | old_val) != old_val)
2576                 old_val = atomic_read(v);
2577 }
2578
2579 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2580 {
2581         struct brcmf_core *buscore;
2582         u32 addr;
2583         unsigned long val;
2584         int ret;
2585
2586         buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
2587         addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
2588
2589         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2590         bus->sdcnt.f1regdata++;
2591         if (ret != 0)
2592                 return ret;
2593
2594         val &= bus->hostintmask;
2595         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2596
2597         /* Clear interrupts */
2598         if (val) {
2599                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2600                 bus->sdcnt.f1regdata++;
2601                 atomic_orr(val, &bus->intstatus);
2602         }
2603
2604         return ret;
2605 }
2606
2607 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2608 {
2609         u32 newstatus = 0;
2610         unsigned long intstatus;
2611         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2612         uint framecnt;                  /* Temporary counter of tx/rx frames */
2613         int err = 0;
2614
2615         brcmf_dbg(TRACE, "Enter\n");
2616
2617         sdio_claim_host(bus->sdiodev->func[1]);
2618
2619         /* If waiting for HTAVAIL, check status */
2620         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2621                 u8 clkctl, devctl = 0;
2622
2623 #ifdef DEBUG
2624                 /* Check for inconsistent device control */
2625                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2626                                            SBSDIO_DEVICE_CTL, &err);
2627 #endif                          /* DEBUG */
2628
2629                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2630                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2631                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2632
2633                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2634                           devctl, clkctl);
2635
2636                 if (SBSDIO_HTAV(clkctl)) {
2637                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2638                                                    SBSDIO_DEVICE_CTL, &err);
2639                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2640                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2641                                           devctl, &err);
2642                         bus->clkstate = CLK_AVAIL;
2643                 }
2644         }
2645
2646         /* Make sure backplane clock is on */
2647         brcmf_sdio_bus_sleep(bus, false, true);
2648
2649         /* Pending interrupt indicates new device status */
2650         if (atomic_read(&bus->ipend) > 0) {
2651                 atomic_set(&bus->ipend, 0);
2652                 err = brcmf_sdio_intr_rstatus(bus);
2653         }
2654
2655         /* Start with leftover status bits */
2656         intstatus = atomic_xchg(&bus->intstatus, 0);
2657
2658         /* Handle flow-control change: read new state in case our ack
2659          * crossed another change interrupt.  If change still set, assume
2660          * FC ON for safety, let next loop through do the debounce.
2661          */
2662         if (intstatus & I_HMB_FC_CHANGE) {
2663                 intstatus &= ~I_HMB_FC_CHANGE;
2664                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2665                                 offsetof(struct sdpcmd_regs, intstatus));
2666
2667                 err = r_sdreg32(bus, &newstatus,
2668                                 offsetof(struct sdpcmd_regs, intstatus));
2669                 bus->sdcnt.f1regdata += 2;
2670                 atomic_set(&bus->fcstate,
2671                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2672                 intstatus |= (newstatus & bus->hostintmask);
2673         }
2674
2675         /* Handle host mailbox indication */
2676         if (intstatus & I_HMB_HOST_INT) {
2677                 intstatus &= ~I_HMB_HOST_INT;
2678                 intstatus |= brcmf_sdio_hostmail(bus);
2679         }
2680
2681         sdio_release_host(bus->sdiodev->func[1]);
2682
2683         /* Generally don't ask for these, can get CRC errors... */
2684         if (intstatus & I_WR_OOSYNC) {
2685                 brcmf_err("Dongle reports WR_OOSYNC\n");
2686                 intstatus &= ~I_WR_OOSYNC;
2687         }
2688
2689         if (intstatus & I_RD_OOSYNC) {
2690                 brcmf_err("Dongle reports RD_OOSYNC\n");
2691                 intstatus &= ~I_RD_OOSYNC;
2692         }
2693
2694         if (intstatus & I_SBINT) {
2695                 brcmf_err("Dongle reports SBINT\n");
2696                 intstatus &= ~I_SBINT;
2697         }
2698
2699         /* Would be active due to wake-wlan in gSPI */
2700         if (intstatus & I_CHIPACTIVE) {
2701                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2702                 intstatus &= ~I_CHIPACTIVE;
2703         }
2704
2705         /* Ignore frame indications if rxskip is set */
2706         if (bus->rxskip)
2707                 intstatus &= ~I_HMB_FRAME_IND;
2708
2709         /* On frame indication, read available frames */
2710         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2711                 brcmf_sdio_readframes(bus, bus->rxbound);
2712                 if (!bus->rxpending)
2713                         intstatus &= ~I_HMB_FRAME_IND;
2714         }
2715
2716         /* Keep still-pending events for next scheduling */
2717         if (intstatus)
2718                 atomic_orr(intstatus, &bus->intstatus);
2719
2720         brcmf_sdio_clrintr(bus);
2721
2722         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2723             (down_interruptible(&bus->tx_seq_lock) == 0)) {
2724                 if (data_ok(bus)) {
2725                         sdio_claim_host(bus->sdiodev->func[1]);
2726                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2727                                                       bus->ctrl_frame_len);
2728                         sdio_release_host(bus->sdiodev->func[1]);
2729
2730                         bus->ctrl_frame_stat = false;
2731                         brcmf_sdio_wait_event_wakeup(bus);
2732                 }
2733                 up(&bus->tx_seq_lock);
2734         }
2735         /* Send queued frames (limit 1 if rx may still be pending) */
2736         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2737             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2738             data_ok(bus)) {
2739                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2740                                             txlimit;
2741                 brcmf_sdio_sendfromq(bus, framecnt);
2742         }
2743
2744         if (!brcmf_bus_ready(bus->sdiodev->bus_if) || (err != 0)) {
2745                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2746                 atomic_set(&bus->intstatus, 0);
2747         } else if (atomic_read(&bus->intstatus) ||
2748                    atomic_read(&bus->ipend) > 0 ||
2749                    (!atomic_read(&bus->fcstate) &&
2750                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2751                     data_ok(bus))) {
2752                 atomic_inc(&bus->dpc_tskcnt);
2753         }
2754 }
2755
2756 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2757 {
2758         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2759         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2760         struct brcmf_sdio *bus = sdiodev->bus;
2761
2762         return &bus->txq;
2763 }
2764
2765 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2766 {
2767         int ret = -EBADE;
2768         uint prec;
2769         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2770         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2771         struct brcmf_sdio *bus = sdiodev->bus;
2772
2773         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2774
2775         /* Add space for the header */
2776         skb_push(pkt, bus->tx_hdrlen);
2777         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2778
2779         prec = prio2prec((pkt->priority & PRIOMASK));
2780
2781         /* Check for existing queue, current flow-control,
2782                          pending event, or pending clock */
2783         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2784         bus->sdcnt.fcqueued++;
2785
2786         /* Priority based enq */
2787         spin_lock_bh(&bus->txq_lock);
2788         /* reset bus_flags in packet cb */
2789         *(u16 *)(pkt->cb) = 0;
2790         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2791                 skb_pull(pkt, bus->tx_hdrlen);
2792                 brcmf_err("out of bus->txq !!!\n");
2793                 ret = -ENOSR;
2794         } else {
2795                 ret = 0;
2796         }
2797
2798         if (pktq_len(&bus->txq) >= TXHI) {
2799                 bus->txoff = true;
2800                 brcmf_txflowblock(bus->sdiodev->dev, true);
2801         }
2802         spin_unlock_bh(&bus->txq_lock);
2803
2804 #ifdef DEBUG
2805         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2806                 qcount[prec] = pktq_plen(&bus->txq, prec);
2807 #endif
2808
2809         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2810                 atomic_inc(&bus->dpc_tskcnt);
2811                 queue_work(bus->brcmf_wq, &bus->datawork);
2812         }
2813
2814         return ret;
2815 }
2816
2817 #ifdef DEBUG
2818 #define CONSOLE_LINE_MAX        192
2819
2820 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2821 {
2822         struct brcmf_console *c = &bus->console;
2823         u8 line[CONSOLE_LINE_MAX], ch;
2824         u32 n, idx, addr;
2825         int rv;
2826
2827         /* Don't do anything until FWREADY updates console address */
2828         if (bus->console_addr == 0)
2829                 return 0;
2830
2831         /* Read console log struct */
2832         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2833         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2834                                sizeof(c->log_le));
2835         if (rv < 0)
2836                 return rv;
2837
2838         /* Allocate console buffer (one time only) */
2839         if (c->buf == NULL) {
2840                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2841                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2842                 if (c->buf == NULL)
2843                         return -ENOMEM;
2844         }
2845
2846         idx = le32_to_cpu(c->log_le.idx);
2847
2848         /* Protect against corrupt value */
2849         if (idx > c->bufsize)
2850                 return -EBADE;
2851
2852         /* Skip reading the console buffer if the index pointer
2853          has not moved */
2854         if (idx == c->last)
2855                 return 0;
2856
2857         /* Read the console buffer */
2858         addr = le32_to_cpu(c->log_le.buf);
2859         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2860         if (rv < 0)
2861                 return rv;
2862
2863         while (c->last != idx) {
2864                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2865                         if (c->last == idx) {
2866                                 /* This would output a partial line.
2867                                  * Instead, back up
2868                                  * the buffer pointer and output this
2869                                  * line next time around.
2870                                  */
2871                                 if (c->last >= n)
2872                                         c->last -= n;
2873                                 else
2874                                         c->last = c->bufsize - n;
2875                                 goto break2;
2876                         }
2877                         ch = c->buf[c->last];
2878                         c->last = (c->last + 1) % c->bufsize;
2879                         if (ch == '\n')
2880                                 break;
2881                         line[n] = ch;
2882                 }
2883
2884                 if (n > 0) {
2885                         if (line[n - 1] == '\r')
2886                                 n--;
2887                         line[n] = 0;
2888                         pr_debug("CONSOLE: %s\n", line);
2889                 }
2890         }
2891 break2:
2892
2893         return 0;
2894 }
2895 #endif                          /* DEBUG */
2896
2897 static int
2898 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2899 {
2900         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2901         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2902         struct brcmf_sdio *bus = sdiodev->bus;
2903         int ret = -1;
2904
2905         brcmf_dbg(TRACE, "Enter\n");
2906
2907         if (down_interruptible(&bus->tx_seq_lock))
2908                 return -EINTR;
2909
2910         if (!data_ok(bus)) {
2911                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2912                           bus->tx_max, bus->tx_seq);
2913                 up(&bus->tx_seq_lock);
2914                 /* Send from dpc */
2915                 bus->ctrl_frame_buf = msg;
2916                 bus->ctrl_frame_len = msglen;
2917                 bus->ctrl_frame_stat = true;
2918
2919                 wait_event_interruptible_timeout(bus->ctrl_wait,
2920                                                  !bus->ctrl_frame_stat,
2921                                                  msecs_to_jiffies(2000));
2922
2923                 if (!bus->ctrl_frame_stat) {
2924                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2925                         ret = 0;
2926                 } else {
2927                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2928                         bus->ctrl_frame_stat = false;
2929                         if (down_interruptible(&bus->tx_seq_lock))
2930                                 return -EINTR;
2931                         ret = -1;
2932                 }
2933         }
2934         if (ret == -1) {
2935                 sdio_claim_host(bus->sdiodev->func[1]);
2936                 brcmf_sdio_bus_sleep(bus, false, false);
2937                 ret = brcmf_sdio_tx_ctrlframe(bus, msg, msglen);
2938                 sdio_release_host(bus->sdiodev->func[1]);
2939                 up(&bus->tx_seq_lock);
2940         }
2941
2942         if (ret)
2943                 bus->sdcnt.tx_ctlerrs++;
2944         else
2945                 bus->sdcnt.tx_ctlpkts++;
2946
2947         return ret ? -EIO : 0;
2948 }
2949
2950 #ifdef DEBUG
2951 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2952                                    struct sdpcm_shared *sh)
2953 {
2954         u32 addr, console_ptr, console_size, console_index;
2955         char *conbuf = NULL;
2956         __le32 sh_val;
2957         int rv;
2958
2959         /* obtain console information from device memory */
2960         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2961         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2962                                (u8 *)&sh_val, sizeof(u32));
2963         if (rv < 0)
2964                 return rv;
2965         console_ptr = le32_to_cpu(sh_val);
2966
2967         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2968         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2969                                (u8 *)&sh_val, sizeof(u32));
2970         if (rv < 0)
2971                 return rv;
2972         console_size = le32_to_cpu(sh_val);
2973
2974         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2975         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2976                                (u8 *)&sh_val, sizeof(u32));
2977         if (rv < 0)
2978                 return rv;
2979         console_index = le32_to_cpu(sh_val);
2980
2981         /* allocate buffer for console data */
2982         if (console_size <= CONSOLE_BUFFER_MAX)
2983                 conbuf = vzalloc(console_size+1);
2984
2985         if (!conbuf)
2986                 return -ENOMEM;
2987
2988         /* obtain the console data from device */
2989         conbuf[console_size] = '\0';
2990         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2991                                console_size);
2992         if (rv < 0)
2993                 goto done;
2994
2995         rv = seq_write(seq, conbuf + console_index,
2996                        console_size - console_index);
2997         if (rv < 0)
2998                 goto done;
2999
3000         if (console_index > 0)
3001                 rv = seq_write(seq, conbuf, console_index - 1);
3002
3003 done:
3004         vfree(conbuf);
3005         return rv;
3006 }
3007
3008 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
3009                                 struct sdpcm_shared *sh)
3010 {
3011         int error;
3012         struct brcmf_trap_info tr;
3013
3014         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
3015                 brcmf_dbg(INFO, "no trap in firmware\n");
3016                 return 0;
3017         }
3018
3019         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
3020                                   sizeof(struct brcmf_trap_info));
3021         if (error < 0)
3022                 return error;
3023
3024         seq_printf(seq,
3025                    "dongle trap info: type 0x%x @ epc 0x%08x\n"
3026                    "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3027                    "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3028                    "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3029                    "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3030                    le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3031                    le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3032                    le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3033                    le32_to_cpu(tr.pc), sh->trap_addr,
3034                    le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3035                    le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3036                    le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3037                    le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3038
3039         return 0;
3040 }
3041
3042 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
3043                                   struct sdpcm_shared *sh)
3044 {
3045         int error = 0;
3046         char file[80] = "?";
3047         char expr[80] = "<???>";
3048
3049         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3050                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3051                 return 0;
3052         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3053                 brcmf_dbg(INFO, "no assert in dongle\n");
3054                 return 0;
3055         }
3056
3057         sdio_claim_host(bus->sdiodev->func[1]);
3058         if (sh->assert_file_addr != 0) {
3059                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3060                                           sh->assert_file_addr, (u8 *)file, 80);
3061                 if (error < 0)
3062                         return error;
3063         }
3064         if (sh->assert_exp_addr != 0) {
3065                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3066                                           sh->assert_exp_addr, (u8 *)expr, 80);
3067                 if (error < 0)
3068                         return error;
3069         }
3070         sdio_release_host(bus->sdiodev->func[1]);
3071
3072         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3073                    file, sh->assert_line, expr);
3074         return 0;
3075 }
3076
3077 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3078 {
3079         int error;
3080         struct sdpcm_shared sh;
3081
3082         error = brcmf_sdio_readshared(bus, &sh);
3083
3084         if (error < 0)
3085                 return error;
3086
3087         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3088                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3089         else if (sh.flags & SDPCM_SHARED_ASSERT)
3090                 brcmf_err("assertion in dongle\n");
3091
3092         if (sh.flags & SDPCM_SHARED_TRAP)
3093                 brcmf_err("firmware trap in dongle\n");
3094
3095         return 0;
3096 }
3097
3098 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3099 {
3100         int error = 0;
3101         struct sdpcm_shared sh;
3102
3103         error = brcmf_sdio_readshared(bus, &sh);
3104         if (error < 0)
3105                 goto done;
3106
3107         error = brcmf_sdio_assert_info(seq, bus, &sh);
3108         if (error < 0)
3109                 goto done;
3110
3111         error = brcmf_sdio_trap_info(seq, bus, &sh);
3112         if (error < 0)
3113                 goto done;
3114
3115         error = brcmf_sdio_dump_console(seq, bus, &sh);
3116
3117 done:
3118         return error;
3119 }
3120
3121 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3122 {
3123         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3124         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3125
3126         return brcmf_sdio_died_dump(seq, bus);
3127 }
3128
3129 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3130 {
3131         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3132         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3133         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3134
3135         seq_printf(seq,
3136                    "intrcount:    %u\nlastintrs:    %u\n"
3137                    "pollcnt:      %u\nregfails:     %u\n"
3138                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3139                    "rxrtx:        %u\nrx_toolong:   %u\n"
3140                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3141                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3142                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3143                    "fc_xon:       %u\nrxglomfail:   %u\n"
3144                    "rxglomframes: %u\nrxglompkts:   %u\n"
3145                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3146                    "f2txdata:     %u\nf1regdata:    %u\n"
3147                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3148                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3149                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3150                    sdcnt->intrcount, sdcnt->lastintrs,
3151                    sdcnt->pollcnt, sdcnt->regfails,
3152                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3153                    sdcnt->rxrtx, sdcnt->rx_toolong,
3154                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3155                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3156                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3157                    sdcnt->fc_xon, sdcnt->rxglomfail,
3158                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3159                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3160                    sdcnt->f2txdata, sdcnt->f1regdata,
3161                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3162                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3163                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3164
3165         return 0;
3166 }
3167
3168 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3169 {
3170         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3171         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3172
3173         if (IS_ERR_OR_NULL(dentry))
3174                 return;
3175
3176         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3177         brcmf_debugfs_add_entry(drvr, "counters",
3178                                 brcmf_debugfs_sdio_count_read);
3179         debugfs_create_u32("console_interval", 0644, dentry,
3180                            &bus->console_interval);
3181 }
3182 #else
3183 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3184 {
3185         return 0;
3186 }
3187
3188 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3189 {
3190 }
3191 #endif /* DEBUG */
3192
3193 static int
3194 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3195 {
3196         int timeleft;
3197         uint rxlen = 0;
3198         bool pending;
3199         u8 *buf;
3200         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3201         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3202         struct brcmf_sdio *bus = sdiodev->bus;
3203
3204         brcmf_dbg(TRACE, "Enter\n");
3205
3206         /* Wait until control frame is available */
3207         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3208
3209         spin_lock_bh(&bus->rxctl_lock);
3210         rxlen = bus->rxlen;
3211         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3212         bus->rxctl = NULL;
3213         buf = bus->rxctl_orig;
3214         bus->rxctl_orig = NULL;
3215         bus->rxlen = 0;
3216         spin_unlock_bh(&bus->rxctl_lock);
3217         vfree(buf);
3218
3219         if (rxlen) {
3220                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3221                           rxlen, msglen);
3222         } else if (timeleft == 0) {
3223                 brcmf_err("resumed on timeout\n");
3224                 brcmf_sdio_checkdied(bus);
3225         } else if (pending) {
3226                 brcmf_dbg(CTL, "cancelled\n");
3227                 return -ERESTARTSYS;
3228         } else {
3229                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3230                 brcmf_sdio_checkdied(bus);
3231         }
3232
3233         if (rxlen)
3234                 bus->sdcnt.rx_ctlpkts++;
3235         else
3236                 bus->sdcnt.rx_ctlerrs++;
3237
3238         return rxlen ? (int)rxlen : -ETIMEDOUT;
3239 }
3240
3241 #ifdef DEBUG
3242 static bool
3243 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3244                         u8 *ram_data, uint ram_sz)
3245 {
3246         char *ram_cmp;
3247         int err;
3248         bool ret = true;
3249         int address;
3250         int offset;
3251         int len;
3252
3253         /* read back and verify */
3254         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3255                   ram_sz);
3256         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3257         /* do not proceed while no memory but  */
3258         if (!ram_cmp)
3259                 return true;
3260
3261         address = ram_addr;
3262         offset = 0;
3263         while (offset < ram_sz) {
3264                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3265                       ram_sz - offset;
3266                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3267                 if (err) {
3268                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3269                                   err, len, address);
3270                         ret = false;
3271                         break;
3272                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3273                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3274                                   offset, len);
3275                         ret = false;
3276                         break;
3277                 }
3278                 offset += len;
3279                 address += len;
3280         }
3281
3282         kfree(ram_cmp);
3283
3284         return ret;
3285 }
3286 #else   /* DEBUG */
3287 static bool
3288 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3289                         u8 *ram_data, uint ram_sz)
3290 {
3291         return true;
3292 }
3293 #endif  /* DEBUG */
3294
3295 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3296                                          const struct firmware *fw)
3297 {
3298         int err;
3299
3300         brcmf_dbg(TRACE, "Enter\n");
3301
3302         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3303                                 (u8 *)fw->data, fw->size);
3304         if (err)
3305                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3306                           err, (int)fw->size, bus->ci->rambase);
3307         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3308                                           (u8 *)fw->data, fw->size))
3309                 err = -EIO;
3310
3311         return err;
3312 }
3313
3314 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3315                                      void *vars, u32 varsz)
3316 {
3317         int address;
3318         int err;
3319
3320         brcmf_dbg(TRACE, "Enter\n");
3321
3322         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3323         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3324         if (err)
3325                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3326                           err, varsz, address);
3327         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3328                 err = -EIO;
3329
3330         return err;
3331 }
3332
3333 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3334                                         const struct firmware *fw,
3335                                         void *nvram, u32 nvlen)
3336 {
3337         int bcmerror = -EFAULT;
3338         u32 rstvec;
3339
3340         sdio_claim_host(bus->sdiodev->func[1]);
3341         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3342
3343         /* Keep arm in reset */
3344         brcmf_chip_enter_download(bus->ci);
3345
3346         rstvec = get_unaligned_le32(fw->data);
3347         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3348
3349         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3350         release_firmware(fw);
3351         if (bcmerror) {
3352                 brcmf_err("dongle image file download failed\n");
3353                 brcmf_fw_nvram_free(nvram);
3354                 goto err;
3355         }
3356
3357         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3358         brcmf_fw_nvram_free(nvram);
3359         if (bcmerror) {
3360                 brcmf_err("dongle nvram file download failed\n");
3361                 goto err;
3362         }
3363
3364         /* Take arm out of reset */
3365         if (!brcmf_chip_exit_download(bus->ci, rstvec)) {
3366                 brcmf_err("error getting out of ARM core reset\n");
3367                 goto err;
3368         }
3369
3370         /* Allow HT Clock now that the ARM is running. */
3371         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_LOAD);
3372         bcmerror = 0;
3373
3374 err:
3375         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3376         sdio_release_host(bus->sdiodev->func[1]);
3377         return bcmerror;
3378 }
3379
3380 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3381 {
3382         int err = 0;
3383         u8 val;
3384
3385         brcmf_dbg(TRACE, "Enter\n");
3386
3387         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3388         if (err) {
3389                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3390                 return;
3391         }
3392
3393         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3394         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3395         if (err) {
3396                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3397                 return;
3398         }
3399
3400         /* Add CMD14 Support */
3401         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3402                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3403                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3404                           &err);
3405         if (err) {
3406                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3407                 return;
3408         }
3409
3410         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3411                           SBSDIO_FORCE_HT, &err);
3412         if (err) {
3413                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3414                 return;
3415         }
3416
3417         /* set flag */
3418         bus->sr_enabled = true;
3419         brcmf_dbg(INFO, "SR enabled\n");
3420 }
3421
3422 /* enable KSO bit */
3423 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3424 {
3425         u8 val;
3426         int err = 0;
3427
3428         brcmf_dbg(TRACE, "Enter\n");
3429
3430         /* KSO bit added in SDIO core rev 12 */
3431         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
3432                 return 0;
3433
3434         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3435         if (err) {
3436                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3437                 return err;
3438         }
3439
3440         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3441                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3442                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3443                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3444                                   val, &err);
3445                 if (err) {
3446                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3447                         return err;
3448                 }
3449         }
3450
3451         return 0;
3452 }
3453
3454
3455 static int brcmf_sdio_bus_preinit(struct device *dev)
3456 {
3457         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3458         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3459         struct brcmf_sdio *bus = sdiodev->bus;
3460         uint pad_size;
3461         u32 value;
3462         int err;
3463
3464         /* the commands below use the terms tx and rx from
3465          * a device perspective, ie. bus:txglom affects the
3466          * bus transfers from device to host.
3467          */
3468         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12) {
3469                 /* for sdio core rev < 12, disable txgloming */
3470                 value = 0;
3471                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3472                                            sizeof(u32));
3473         } else {
3474                 /* otherwise, set txglomalign */
3475                 value = 4;
3476                 if (sdiodev->pdata)
3477                         value = sdiodev->pdata->sd_sgentry_align;
3478                 /* SDIO ADMA requires at least 32 bit alignment */
3479                 value = max_t(u32, value, 4);
3480                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3481                                            sizeof(u32));
3482         }
3483
3484         if (err < 0)
3485                 goto done;
3486
3487         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3488         if (sdiodev->sg_support) {
3489                 bus->txglom = false;
3490                 value = 1;
3491                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3492                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3493                                            &value, sizeof(u32));
3494                 if (err < 0) {
3495                         /* bus:rxglom is allowed to fail */
3496                         err = 0;
3497                 } else {
3498                         bus->txglom = true;
3499                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3500                 }
3501         }
3502         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3503
3504 done:
3505         return err;
3506 }
3507
3508 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3509 {
3510         brcmf_dbg(TRACE, "Enter\n");
3511
3512         if (!bus) {
3513                 brcmf_err("bus is null pointer, exiting\n");
3514                 return;
3515         }
3516
3517         if (!brcmf_bus_ready(bus->sdiodev->bus_if)) {
3518                 brcmf_err("bus is down. we have nothing to do\n");
3519                 return;
3520         }
3521         /* Count the interrupt call */
3522         bus->sdcnt.intrcount++;
3523         if (in_interrupt())
3524                 atomic_set(&bus->ipend, 1);
3525         else
3526                 if (brcmf_sdio_intr_rstatus(bus)) {
3527                         brcmf_err("failed backplane access\n");
3528                 }
3529
3530         /* Disable additional interrupts (is this needed now)? */
3531         if (!bus->intr)
3532                 brcmf_err("isr w/o interrupt configured!\n");
3533
3534         atomic_inc(&bus->dpc_tskcnt);
3535         queue_work(bus->brcmf_wq, &bus->datawork);
3536 }
3537
3538 static bool brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3539 {
3540 #ifdef DEBUG
3541         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3542 #endif  /* DEBUG */
3543
3544         brcmf_dbg(TIMER, "Enter\n");
3545
3546         /* Poll period: check device if appropriate. */
3547         if (!bus->sr_enabled &&
3548             bus->poll && (++bus->polltick >= bus->pollrate)) {
3549                 u32 intstatus = 0;
3550
3551                 /* Reset poll tick */
3552                 bus->polltick = 0;
3553
3554                 /* Check device if no interrupts */
3555                 if (!bus->intr ||
3556                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3557
3558                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3559                                 u8 devpend;
3560
3561                                 sdio_claim_host(bus->sdiodev->func[1]);
3562                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3563                                                             SDIO_CCCR_INTx,
3564                                                             NULL);
3565                                 sdio_release_host(bus->sdiodev->func[1]);
3566                                 intstatus =
3567                                     devpend & (INTR_STATUS_FUNC1 |
3568                                                INTR_STATUS_FUNC2);
3569                         }
3570
3571                         /* If there is something, make like the ISR and
3572                                  schedule the DPC */
3573                         if (intstatus) {
3574                                 bus->sdcnt.pollcnt++;
3575                                 atomic_set(&bus->ipend, 1);
3576
3577                                 atomic_inc(&bus->dpc_tskcnt);
3578                                 queue_work(bus->brcmf_wq, &bus->datawork);
3579                         }
3580                 }
3581
3582                 /* Update interrupt tracking */
3583                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3584         }
3585 #ifdef DEBUG
3586         /* Poll for console output periodically */
3587         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3588             bus->console_interval != 0) {
3589                 bus->console.count += BRCMF_WD_POLL_MS;
3590                 if (bus->console.count >= bus->console_interval) {
3591                         bus->console.count -= bus->console_interval;
3592                         sdio_claim_host(bus->sdiodev->func[1]);
3593                         /* Make sure backplane clock is on */
3594                         brcmf_sdio_bus_sleep(bus, false, false);
3595                         if (brcmf_sdio_readconsole(bus) < 0)
3596                                 /* stop on error */
3597                                 bus->console_interval = 0;
3598                         sdio_release_host(bus->sdiodev->func[1]);
3599                 }
3600         }
3601 #endif                          /* DEBUG */
3602
3603         /* On idle timeout clear activity flag and/or turn off clock */
3604         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3605                 if (++bus->idlecount >= bus->idletime) {
3606                         bus->idlecount = 0;
3607                         if (bus->activity) {
3608                                 bus->activity = false;
3609                                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3610                         } else {
3611                                 brcmf_dbg(SDIO, "idle\n");
3612                                 sdio_claim_host(bus->sdiodev->func[1]);
3613                                 brcmf_sdio_bus_sleep(bus, true, false);
3614                                 sdio_release_host(bus->sdiodev->func[1]);
3615                         }
3616                 }
3617         }
3618
3619         return (atomic_read(&bus->ipend) > 0);
3620 }
3621
3622 static void brcmf_sdio_dataworker(struct work_struct *work)
3623 {
3624         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3625                                               datawork);
3626
3627         while (atomic_read(&bus->dpc_tskcnt)) {
3628                 atomic_set(&bus->dpc_tskcnt, 0);
3629                 brcmf_sdio_dpc(bus);
3630         }
3631 }
3632
3633 static void
3634 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3635                              struct brcmf_chip *ci, u32 drivestrength)
3636 {
3637         const struct sdiod_drive_str *str_tab = NULL;
3638         u32 str_mask;
3639         u32 str_shift;
3640         u32 base;
3641         u32 i;
3642         u32 drivestrength_sel = 0;
3643         u32 cc_data_temp;
3644         u32 addr;
3645
3646         if (!(ci->cc_caps & CC_CAP_PMU))
3647                 return;
3648
3649         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3650         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3651                 str_tab = sdiod_drvstr_tab1_1v8;
3652                 str_mask = 0x00003800;
3653                 str_shift = 11;
3654                 break;
3655         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3656                 str_tab = sdiod_drvstr_tab6_1v8;
3657                 str_mask = 0x00001800;
3658                 str_shift = 11;
3659                 break;
3660         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3661                 /* note: 43143 does not support tristate */
3662                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3663                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3664                         str_tab = sdiod_drvstr_tab2_3v3;
3665                         str_mask = 0x00000007;
3666                         str_shift = 0;
3667                 } else
3668                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3669                                   ci->name, drivestrength);
3670                 break;
3671         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3672                 str_tab = sdiod_drive_strength_tab5_1v8;
3673                 str_mask = 0x00003800;
3674                 str_shift = 11;
3675                 break;
3676         default:
3677                 brcmf_err("No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
3678                           ci->name, ci->chiprev, ci->pmurev);
3679                 break;
3680         }
3681
3682         if (str_tab != NULL) {
3683                 for (i = 0; str_tab[i].strength != 0; i++) {
3684                         if (drivestrength >= str_tab[i].strength) {
3685                                 drivestrength_sel = str_tab[i].sel;
3686                                 break;
3687                         }
3688                 }
3689                 base = brcmf_chip_get_chipcommon(ci)->base;
3690                 addr = CORE_CC_REG(base, chipcontrol_addr);
3691                 brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
3692                 cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3693                 cc_data_temp &= ~str_mask;
3694                 drivestrength_sel <<= str_shift;
3695                 cc_data_temp |= drivestrength_sel;
3696                 brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
3697
3698                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3699                           str_tab[i].strength, drivestrength, cc_data_temp);
3700         }
3701 }
3702
3703 static int brcmf_sdio_buscoreprep(void *ctx)
3704 {
3705         struct brcmf_sdio_dev *sdiodev = ctx;
3706         int err = 0;
3707         u8 clkval, clkset;
3708
3709         /* Try forcing SDIO core to do ALPAvail request only */
3710         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3711         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3712         if (err) {
3713                 brcmf_err("error writing for HT off\n");
3714                 return err;
3715         }
3716
3717         /* If register supported, wait for ALPAvail and then force ALP */
3718         /* This may take up to 15 milliseconds */
3719         clkval = brcmf_sdiod_regrb(sdiodev,
3720                                    SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3721
3722         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3723                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3724                           clkset, clkval);
3725                 return -EACCES;
3726         }
3727
3728         SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
3729                                               SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
3730                         !SBSDIO_ALPAV(clkval)),
3731                         PMU_MAX_TRANSITION_DLY);
3732         if (!SBSDIO_ALPAV(clkval)) {
3733                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3734                           clkval);
3735                 return -EBUSY;
3736         }
3737
3738         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3739         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3740         udelay(65);
3741
3742         /* Also, disable the extra SDIO pull-ups */
3743         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3744
3745         return 0;
3746 }
3747
3748 static void brcmf_sdio_buscore_exitdl(void *ctx, struct brcmf_chip *chip,
3749                                       u32 rstvec)
3750 {
3751         struct brcmf_sdio_dev *sdiodev = ctx;
3752         struct brcmf_core *core;
3753         u32 reg_addr;
3754
3755         /* clear all interrupts */
3756         core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
3757         reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
3758         brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3759
3760         if (rstvec)
3761                 /* Write reset vector to address 0 */
3762                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3763                                   sizeof(rstvec));
3764 }
3765
3766 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3767 {
3768         struct brcmf_sdio_dev *sdiodev = ctx;
3769         u32 val, rev;
3770
3771         val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3772         if (sdiodev->func[0]->device == BRCM_SDIO_4335_4339_DEVICE_ID &&
3773             addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
3774                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3775                 if (rev >= 2) {
3776                         val &= ~CID_ID_MASK;
3777                         val |= BRCM_CC_4339_CHIP_ID;
3778                 }
3779         }
3780         return val;
3781 }
3782
3783 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3784 {
3785         struct brcmf_sdio_dev *sdiodev = ctx;
3786
3787         brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
3788 }
3789
3790 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3791         .prepare = brcmf_sdio_buscoreprep,
3792         .exit_dl = brcmf_sdio_buscore_exitdl,
3793         .read32 = brcmf_sdio_buscore_read32,
3794         .write32 = brcmf_sdio_buscore_write32,
3795 };
3796
3797 static bool
3798 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3799 {
3800         u8 clkctl = 0;
3801         int err = 0;
3802         int reg_addr;
3803         u32 reg_val;
3804         u32 drivestrength;
3805
3806         sdio_claim_host(bus->sdiodev->func[1]);
3807
3808         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3809                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3810
3811         /*
3812          * Force PLL off until brcmf_chip_attach()
3813          * programs PLL control regs
3814          */
3815
3816         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3817                           BRCMF_INIT_CLKCTL1, &err);
3818         if (!err)
3819                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3820                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3821
3822         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3823                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3824                           err, BRCMF_INIT_CLKCTL1, clkctl);
3825                 goto fail;
3826         }
3827
3828         /* SDIO register access works so moving
3829          * state from UNKNOWN to DOWN.
3830          */
3831         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_DOWN);
3832
3833         bus->ci = brcmf_chip_attach(bus->sdiodev, &brcmf_sdio_buscore_ops);
3834         if (IS_ERR(bus->ci)) {
3835                 brcmf_err("brcmf_chip_attach failed!\n");
3836                 bus->ci = NULL;
3837                 goto fail;
3838         }
3839
3840         if (brcmf_sdio_kso_init(bus)) {
3841                 brcmf_err("error enabling KSO\n");
3842                 goto fail;
3843         }
3844
3845         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3846                 drivestrength = bus->sdiodev->pdata->drive_strength;
3847         else
3848                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3849         brcmf_sdio_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3850
3851         /* Get info on the SOCRAM cores... */
3852         bus->ramsize = bus->ci->ramsize;
3853         if (!(bus->ramsize)) {
3854                 brcmf_err("failed to find SOCRAM memory!\n");
3855                 goto fail;
3856         }
3857
3858         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3859         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3860                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3861         if (err)
3862                 goto fail;
3863
3864         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3865
3866         brcmf_sdiod_regwb(bus->sdiodev,
3867                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3868         if (err)
3869                 goto fail;
3870
3871         /* set PMUControl so a backplane reset does PMU state reload */
3872         reg_addr = CORE_CC_REG(brcmf_chip_get_chipcommon(bus->ci)->base,
3873                                pmucontrol);
3874         reg_val = brcmf_sdiod_regrl(bus->sdiodev, reg_addr, &err);
3875         if (err)
3876                 goto fail;
3877
3878         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3879
3880         brcmf_sdiod_regwl(bus->sdiodev, reg_addr, reg_val, &err);
3881         if (err)
3882                 goto fail;
3883
3884         sdio_release_host(bus->sdiodev->func[1]);
3885
3886         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3887
3888         /* allocate header buffer */
3889         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3890         if (!bus->hdrbuf)
3891                 return false;
3892         /* Locate an appropriately-aligned portion of hdrbuf */
3893         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3894                                     bus->head_align);
3895
3896         /* Set the poll and/or interrupt flags */
3897         bus->intr = true;
3898         bus->poll = false;
3899         if (bus->poll)
3900                 bus->pollrate = 1;
3901
3902         return true;
3903
3904 fail:
3905         sdio_release_host(bus->sdiodev->func[1]);
3906         return false;
3907 }
3908
3909 static int
3910 brcmf_sdio_watchdog_thread(void *data)
3911 {
3912         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3913
3914         allow_signal(SIGTERM);
3915         /* Run until signal received */
3916         while (1) {
3917                 if (kthread_should_stop())
3918                         break;
3919                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3920                         brcmf_sdio_bus_watchdog(bus);
3921                         /* Count the tick for reference */
3922                         bus->sdcnt.tickcnt++;
3923                         reinit_completion(&bus->watchdog_wait);
3924                 } else
3925                         break;
3926         }
3927         return 0;
3928 }
3929
3930 static void
3931 brcmf_sdio_watchdog(unsigned long data)
3932 {
3933         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3934
3935         if (bus->watchdog_tsk) {
3936                 complete(&bus->watchdog_wait);
3937                 /* Reschedule the watchdog */
3938                 if (bus->wd_timer_valid)
3939                         mod_timer(&bus->timer,
3940                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3941         }
3942 }
3943
3944 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3945         .stop = brcmf_sdio_bus_stop,
3946         .preinit = brcmf_sdio_bus_preinit,
3947         .txdata = brcmf_sdio_bus_txdata,
3948         .txctl = brcmf_sdio_bus_txctl,
3949         .rxctl = brcmf_sdio_bus_rxctl,
3950         .gettxq = brcmf_sdio_bus_gettxq,
3951 };
3952
3953 static void brcmf_sdio_firmware_callback(struct device *dev,
3954                                          const struct firmware *code,
3955                                          void *nvram, u32 nvram_len)
3956 {
3957         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3958         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3959         struct brcmf_sdio *bus = sdiodev->bus;
3960         int err = 0;
3961         u8 saveclk;
3962
3963         brcmf_dbg(TRACE, "Enter: dev=%s\n", dev_name(dev));
3964
3965         /* try to download image and nvram to the dongle */
3966         if (bus_if->state == BRCMF_BUS_DOWN) {
3967                 bus->alp_only = true;
3968                 err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
3969                 if (err)
3970                         goto fail;
3971                 bus->alp_only = false;
3972         }
3973
3974         if (!bus_if->drvr)
3975                 return;
3976
3977         /* Start the watchdog timer */
3978         bus->sdcnt.tickcnt = 0;
3979         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3980
3981         sdio_claim_host(sdiodev->func[1]);
3982
3983         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3984         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3985         if (bus->clkstate != CLK_AVAIL)
3986                 goto release;
3987
3988         /* Force clocks on backplane to be sure F2 interrupt propagates */
3989         saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
3990         if (!err) {
3991                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3992                                   (saveclk | SBSDIO_FORCE_HT), &err);
3993         }
3994         if (err) {
3995                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3996                 goto release;
3997         }
3998
3999         /* Enable function 2 (frame transfers) */
4000         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
4001                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
4002         err = sdio_enable_func(sdiodev->func[SDIO_FUNC_2]);
4003
4004
4005         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4006
4007         /* If F2 successfully enabled, set core and enable interrupts */
4008         if (!err) {
4009                 /* Set up the interrupt mask and enable interrupts */
4010                 bus->hostintmask = HOSTINTMASK;
4011                 w_sdreg32(bus, bus->hostintmask,
4012                           offsetof(struct sdpcmd_regs, hostintmask));
4013
4014                 brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
4015         } else {
4016                 /* Disable F2 again */
4017                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
4018                 goto release;
4019         }
4020
4021         if (brcmf_chip_sr_capable(bus->ci)) {
4022                 brcmf_sdio_sr_init(bus);
4023         } else {
4024                 /* Restore previous clock setting */
4025                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4026                                   saveclk, &err);
4027         }
4028
4029         if (err == 0) {
4030                 err = brcmf_sdiod_intr_register(sdiodev);
4031                 if (err != 0)
4032                         brcmf_err("intr register failed:%d\n", err);
4033         }
4034
4035         /* If we didn't come up, turn off backplane clock */
4036         if (err != 0)
4037                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4038
4039         sdio_release_host(sdiodev->func[1]);
4040
4041         err = brcmf_bus_start(dev);
4042         if (err != 0) {
4043                 brcmf_err("dongle is not responding\n");
4044                 goto fail;
4045         }
4046         return;
4047
4048 release:
4049         sdio_release_host(sdiodev->func[1]);
4050 fail:
4051         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4052         device_release_driver(dev);
4053 }
4054
4055 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4056 {
4057         int ret;
4058         struct brcmf_sdio *bus;
4059
4060         brcmf_dbg(TRACE, "Enter\n");
4061
4062         /* Allocate private bus interface state */
4063         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4064         if (!bus)
4065                 goto fail;
4066
4067         bus->sdiodev = sdiodev;
4068         sdiodev->bus = bus;
4069         skb_queue_head_init(&bus->glom);
4070         bus->txbound = BRCMF_TXBOUND;
4071         bus->rxbound = BRCMF_RXBOUND;
4072         bus->txminmax = BRCMF_TXMINMAX;
4073         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4074
4075         /* platform specific configuration:
4076          *   alignments must be at least 4 bytes for ADMA
4077          */
4078         bus->head_align = ALIGNMENT;
4079         bus->sgentry_align = ALIGNMENT;
4080         if (sdiodev->pdata) {
4081                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
4082                         bus->head_align = sdiodev->pdata->sd_head_align;
4083                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
4084                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
4085         }
4086
4087         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4088         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
4089         if (bus->brcmf_wq == NULL) {
4090                 brcmf_err("insufficient memory to create txworkqueue\n");
4091                 goto fail;
4092         }
4093
4094         /* attempt to attach to the dongle */
4095         if (!(brcmf_sdio_probe_attach(bus))) {
4096                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4097                 goto fail;
4098         }
4099
4100         spin_lock_init(&bus->rxctl_lock);
4101         spin_lock_init(&bus->txq_lock);
4102         sema_init(&bus->tx_seq_lock, 1);
4103         init_waitqueue_head(&bus->ctrl_wait);
4104         init_waitqueue_head(&bus->dcmd_resp_wait);
4105
4106         /* Set up the watchdog timer */
4107         init_timer(&bus->timer);
4108         bus->timer.data = (unsigned long)bus;
4109         bus->timer.function = brcmf_sdio_watchdog;
4110
4111         /* Initialize watchdog thread */
4112         init_completion(&bus->watchdog_wait);
4113         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4114                                         bus, "brcmf_watchdog");
4115         if (IS_ERR(bus->watchdog_tsk)) {
4116                 pr_warn("brcmf_watchdog thread failed to start\n");
4117                 bus->watchdog_tsk = NULL;
4118         }
4119         /* Initialize DPC thread */
4120         atomic_set(&bus->dpc_tskcnt, 0);
4121
4122         /* Assign bus interface call back */
4123         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4124         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4125         bus->sdiodev->bus_if->chip = bus->ci->chip;
4126         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4127
4128         /* default sdio bus header length for tx packet */
4129         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4130
4131         /* Attach to the common layer, reserve hdr space */
4132         ret = brcmf_attach(bus->sdiodev->dev);
4133         if (ret != 0) {
4134                 brcmf_err("brcmf_attach failed\n");
4135                 goto fail;
4136         }
4137
4138         /* Query the F2 block size, set roundup accordingly */
4139         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4140         bus->roundup = min(max_roundup, bus->blocksize);
4141
4142         /* Allocate buffers */
4143         if (bus->sdiodev->bus_if->maxctl) {
4144                 bus->sdiodev->bus_if->maxctl += bus->roundup;
4145                 bus->rxblen =
4146                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4147                             ALIGNMENT) + bus->head_align;
4148                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4149                 if (!(bus->rxbuf)) {
4150                         brcmf_err("rxbuf allocation failed\n");
4151                         goto fail;
4152                 }
4153         }
4154
4155         sdio_claim_host(bus->sdiodev->func[1]);
4156
4157         /* Disable F2 to clear any intermediate frame state on the dongle */
4158         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4159
4160         bus->rxflow = false;
4161
4162         /* Done with backplane-dependent accesses, can drop clock... */
4163         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4164
4165         sdio_release_host(bus->sdiodev->func[1]);
4166
4167         /* ...and initialize clock/power states */
4168         bus->clkstate = CLK_SDONLY;
4169         bus->idletime = BRCMF_IDLE_INTERVAL;
4170         bus->idleclock = BRCMF_IDLE_ACTIVE;
4171
4172         /* SR state */
4173         bus->sleeping = false;
4174         bus->sr_enabled = false;
4175
4176         brcmf_sdio_debugfs_create(bus);
4177         brcmf_dbg(INFO, "completed!!\n");
4178
4179         ret = brcmf_sdio_get_fwnames(bus->ci, sdiodev);
4180         if (ret)
4181                 goto fail;
4182
4183         ret = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
4184                                      sdiodev->fw_name, sdiodev->nvram_name,
4185                                      brcmf_sdio_firmware_callback);
4186         if (ret != 0) {
4187                 brcmf_err("async firmware request failed: %d\n", ret);
4188                 goto fail;
4189         }
4190
4191         return bus;
4192
4193 fail:
4194         brcmf_sdio_remove(bus);
4195         return NULL;
4196 }
4197
4198 /* Detach and free everything */
4199 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4200 {
4201         brcmf_dbg(TRACE, "Enter\n");
4202
4203         if (bus) {
4204                 /* De-register interrupt handler */
4205                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4206
4207                 brcmf_detach(bus->sdiodev->dev);
4208
4209                 cancel_work_sync(&bus->datawork);
4210                 if (bus->brcmf_wq)
4211                         destroy_workqueue(bus->brcmf_wq);
4212
4213                 if (bus->ci) {
4214                         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
4215                                 sdio_claim_host(bus->sdiodev->func[1]);
4216                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4217                                 /* Leave the device in state where it is
4218                                  * 'quiet'. This is done by putting it in
4219                                  * download_state which essentially resets
4220                                  * all necessary cores.
4221                                  */
4222                                 msleep(20);
4223                                 brcmf_chip_enter_download(bus->ci);
4224                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4225                                 sdio_release_host(bus->sdiodev->func[1]);
4226                         }
4227                         brcmf_chip_detach(bus->ci);
4228                 }
4229
4230                 kfree(bus->rxbuf);
4231                 kfree(bus->hdrbuf);
4232                 kfree(bus);
4233         }
4234
4235         brcmf_dbg(TRACE, "Disconnected\n");
4236 }
4237
4238 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4239 {
4240         /* Totally stop the timer */
4241         if (!wdtick && bus->wd_timer_valid) {
4242                 del_timer_sync(&bus->timer);
4243                 bus->wd_timer_valid = false;
4244                 bus->save_ms = wdtick;
4245                 return;
4246         }
4247
4248         /* don't start the wd until fw is loaded */
4249         if (bus->sdiodev->bus_if->state != BRCMF_BUS_DATA)
4250                 return;
4251
4252         if (wdtick) {
4253                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4254                         if (bus->wd_timer_valid)
4255                                 /* Stop timer and restart at new value */
4256                                 del_timer_sync(&bus->timer);
4257
4258                         /* Create timer again when watchdog period is
4259                            dynamically changed or in the first instance
4260                          */
4261                         bus->timer.expires =
4262                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4263                         add_timer(&bus->timer);
4264
4265                 } else {
4266                         /* Re arm the timer, at last watchdog period */
4267                         mod_timer(&bus->timer,
4268                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4269                 }
4270
4271                 bus->wd_timer_valid = true;
4272                 bus->save_ms = wdtick;
4273         }
4274 }