2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <linux/debugfs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/platform_data/brcmfmac-sdio.h>
35 #include <asm/unaligned.h>
37 #include <brcmu_wifi.h>
38 #include <brcmu_utils.h>
39 #include <brcm_hw_ids.h>
41 #include "sdio_host.h"
42 #include "sdio_chip.h"
44 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
48 #define BRCMF_TRAP_INFO_SIZE 80
50 #define CBUF_LEN (128)
52 /* Device console log buffer state */
53 #define CONSOLE_BUFFER_MAX 2024
56 __le32 buf; /* Can't be pointer on (64-bit) hosts */
59 char *_buf_compat; /* Redundant pointer for backward compat. */
64 * When there is no UART (e.g. Quickturn),
65 * the host should write a complete
66 * input line directly into cbuf and then write
67 * the length into vcons_in.
68 * This may also be used when there is a real UART
69 * (at risk of conflicting with
70 * the real UART). vcons_out is currently unused.
75 /* Output (logging) buffer
76 * Console output is written to a ring buffer log_buf at index log_idx.
77 * The host may read the output when it sees log_idx advance.
78 * Output will be lost if the output wraps around faster than the host
81 struct rte_log_le log_le;
83 /* Console input line buffer
84 * Characters are read one at a time into cbuf
85 * until <CR> is received, then
86 * the buffer is processed as a command line.
87 * Also used for virtual UART.
94 #include <chipcommon.h>
98 #include "tracepoint.h"
100 #define TXQLEN 2048 /* bulk tx queue length */
101 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
102 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
105 #define TXRETRIES 2 /* # of retries for tx frames */
107 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
110 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
113 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
115 #define MEMBLOCK 2048 /* Block size used for downloading
117 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
118 biggest possible glom */
120 #define BRCMF_FIRSTREAD (1 << 6)
123 /* SBSDIO_DEVICE_CTL */
125 /* 1: device will assert busy signal when receiving CMD53 */
126 #define SBSDIO_DEVCTL_SETBUSY 0x01
127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
130 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
132 * sdio bus power cycle to clear (rev 9) */
133 #define SBSDIO_DEVCTL_PADS_ISO 0x08
134 /* Force SD->SB reset mapping (rev 11) */
135 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
136 /* Determined by CoreControl bit */
137 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
138 /* Force backplane reset */
139 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
140 /* Force no backplane reset */
141 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
143 /* direct(mapped) cis space */
145 /* MAPPED common CIS address */
146 #define SBSDIO_CIS_BASE_COMMON 0x1000
147 /* maximum bytes in one CIS */
148 #define SBSDIO_CIS_SIZE_LIMIT 0x200
149 /* cis offset addr is < 17 bits */
150 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
152 /* manfid tuple length, include tuple, link bytes */
153 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
156 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
157 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
158 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
159 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
160 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
161 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
162 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
163 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
164 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
165 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
166 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
167 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
168 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
169 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
170 #define I_PC (1 << 10) /* descriptor error */
171 #define I_PD (1 << 11) /* data error */
172 #define I_DE (1 << 12) /* Descriptor protocol Error */
173 #define I_RU (1 << 13) /* Receive descriptor Underflow */
174 #define I_RO (1 << 14) /* Receive fifo Overflow */
175 #define I_XU (1 << 15) /* Transmit fifo Underflow */
176 #define I_RI (1 << 16) /* Receive Interrupt */
177 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
178 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
179 #define I_XI (1 << 24) /* Transmit Interrupt */
180 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
181 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
182 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
183 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
184 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
185 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
186 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
187 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
188 #define I_DMA (I_RI | I_XI | I_ERRORS)
191 #define CC_CISRDY (1 << 0) /* CIS Ready */
192 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
193 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
194 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
195 #define CC_XMTDATAAVAIL_MODE (1 << 4)
196 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
199 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
200 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
201 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
202 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
205 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
207 /* Total length of frame header for dongle protocol */
208 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
209 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
212 * Software allocation of To SB Mailbox resources
215 /* tosbmailbox bits corresponding to intstatus bits */
216 #define SMB_NAK (1 << 0) /* Frame NAK */
217 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
218 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
219 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
221 /* tosbmailboxdata */
222 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
225 * Software allocation of To Host Mailbox resources
229 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
230 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
231 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
232 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
234 /* tohostmailboxdata */
235 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
236 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
237 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
238 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
240 #define HMB_DATA_FCDATA_MASK 0xff000000
241 #define HMB_DATA_FCDATA_SHIFT 24
243 #define HMB_DATA_VERSION_MASK 0x00ff0000
244 #define HMB_DATA_VERSION_SHIFT 16
247 * Software-defined protocol header
250 /* Current protocol version */
251 #define SDPCM_PROT_VERSION 4
253 /* SW frame header */
254 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
256 #define SDPCM_CHANNEL_MASK 0x00000f00
257 #define SDPCM_CHANNEL_SHIFT 8
258 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
260 #define SDPCM_NEXTLEN_OFFSET 2
262 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
263 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
264 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
265 #define SDPCM_DOFFSET_MASK 0xff000000
266 #define SDPCM_DOFFSET_SHIFT 24
267 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
268 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
269 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
270 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
272 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
274 /* logical channel numbers */
275 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
276 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
277 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
278 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
279 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
281 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
283 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
286 * Shared structure between dongle and the host.
287 * The structure contains pointers to trap or assert information.
289 #define SDPCM_SHARED_VERSION 0x0003
290 #define SDPCM_SHARED_VERSION_MASK 0x00FF
291 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
292 #define SDPCM_SHARED_ASSERT 0x0200
293 #define SDPCM_SHARED_TRAP 0x0400
295 /* Space for header read, limit for data packets */
296 #define MAX_HDR_READ (1 << 6)
297 #define MAX_RX_DATASZ 2048
299 /* Maximum milliseconds to wait for F2 to come up */
300 #define BRCMF_WAIT_F2RDY 3000
302 /* Bump up limit on waiting for HT to account for first startup;
303 * if the image is doing a CRC calculation before programming the PMU
304 * for HT availability, it could take a couple hundred ms more, so
305 * max out at a 1 second (1000000us).
307 #undef PMU_MAX_TRANSITION_DLY
308 #define PMU_MAX_TRANSITION_DLY 1000000
310 /* Value for ChipClockCSR during initial setup */
311 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
312 SBSDIO_ALP_AVAIL_REQ)
314 /* Flags for SDH calls */
315 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
317 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
318 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
319 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
320 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
322 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
323 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
326 #define BRCMF_IDLE_INTERVAL 1
328 #define KSO_WAIT_US 50
329 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
332 * Conversion of 802.1D priority to precedence level
334 static uint prio2prec(u32 prio)
336 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
341 /* Device console log buffer state */
342 struct brcmf_console {
343 uint count; /* Poll interval msec counter */
344 uint log_addr; /* Log struct address (fixed) */
345 struct rte_log_le log_le; /* Log struct (host copy) */
346 uint bufsize; /* Size of log buffer */
347 u8 *buf; /* Log buffer (host copy) */
348 uint last; /* Last buffer read index */
351 struct brcmf_trap_info {
365 __le32 r9; /* sb/v6 */
366 __le32 r10; /* sl/v7 */
367 __le32 r11; /* fp/v8 */
375 struct sdpcm_shared {
379 u32 assert_file_addr;
381 u32 console_addr; /* Address of struct rte_console */
387 struct sdpcm_shared_le {
390 __le32 assert_exp_addr;
391 __le32 assert_file_addr;
393 __le32 console_addr; /* Address of struct rte_console */
394 __le32 msgtrace_addr;
399 /* SDIO read frame info */
400 struct brcmf_sdio_read {
409 /* misc chip info needed by some of the routines */
410 /* Private data for SDIO bus interaction */
412 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
413 struct chip_info *ci; /* Chip info struct */
414 char *vars; /* Variables (from CIS and/or other) */
415 uint varsz; /* Size of variables buffer */
417 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
419 u32 hostintmask; /* Copy of Host Interrupt Mask */
420 atomic_t intstatus; /* Intstatus bits (events) pending */
421 atomic_t fcstate; /* State of dongle flow-control */
423 uint blocksize; /* Block size of SDIO transfers */
424 uint roundup; /* Max roundup limit */
426 struct pktq txq; /* Queue length used for flow-control */
427 u8 flowcontrol; /* per prio flow control bitmask */
428 u8 tx_seq; /* Transmit sequence number (next) */
429 u8 tx_max; /* Maximum transmit sequence allowed */
431 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
432 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
433 u8 rx_seq; /* Receive sequence number (expected) */
434 struct brcmf_sdio_read cur_read;
435 /* info of current read frame */
436 bool rxskip; /* Skip receive (awaiting NAK ACK) */
437 bool rxpending; /* Data frame pending in dongle */
439 uint rxbound; /* Rx frames to read before resched */
440 uint txbound; /* Tx frames to send before resched */
443 struct sk_buff *glomd; /* Packet containing glomming descriptor */
444 struct sk_buff_head glom; /* Packet list for glommed superframe */
445 uint glomerr; /* Glom packet read errors */
447 u8 *rxbuf; /* Buffer for receiving control packets */
448 uint rxblen; /* Allocated length of rxbuf */
449 u8 *rxctl; /* Aligned pointer into rxbuf */
450 u8 *rxctl_orig; /* pointer for freeing rxctl */
451 u8 *databuf; /* Buffer for receiving big glom packet */
452 u8 *dataptr; /* Aligned pointer into databuf */
453 uint rxlen; /* Length of valid data in buffer */
454 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
456 u8 sdpcm_ver; /* Bus protocol reported by dongle */
458 bool intr; /* Use interrupts */
459 bool poll; /* Use polling */
460 atomic_t ipend; /* Device interrupt is pending */
461 uint spurious; /* Count of spurious interrupts */
462 uint pollrate; /* Ticks between device polls */
463 uint polltick; /* Tick counter */
466 uint console_interval;
467 struct brcmf_console console; /* Console output polling support */
468 uint console_addr; /* Console address from shared struct */
471 uint clkstate; /* State of sd and backplane clock(s) */
472 bool activity; /* Activity flag for clock down */
473 s32 idletime; /* Control for activity timeout */
474 s32 idlecount; /* Activity timeout counter */
475 s32 idleclock; /* How to set bus driver when idle */
477 bool use_rxchain; /* If brcmf should use PKT chains */
478 bool rxflow_mode; /* Rx flow control mode */
479 bool rxflow; /* Is rx flow control on */
480 bool alp_only; /* Don't use HT clock (ALP only) */
484 bool ctrl_frame_stat;
487 wait_queue_head_t ctrl_wait;
488 wait_queue_head_t dcmd_resp_wait;
490 struct timer_list timer;
491 struct completion watchdog_wait;
492 struct task_struct *watchdog_tsk;
496 struct workqueue_struct *brcmf_wq;
497 struct work_struct datawork;
500 const struct firmware *firmware;
503 bool txoff; /* Transmit flow-controlled */
504 struct brcmf_sdio_count sdcnt;
505 bool sr_enabled; /* SaveRestore enabled */
506 bool sleeping; /* SDIO bus sleeping */
512 #define CLK_PENDING 2
516 static int qcount[NUMPRIO];
517 static int tx_packets[NUMPRIO];
520 #define DEFAULT_SDIO_DRIVE_STRENGTH 6 /* in milliamps */
522 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
524 /* Retry count for register access failures */
525 static const uint retry_limit = 2;
527 /* Limit on rounding up frames */
528 static const uint max_roundup = 512;
532 enum brcmf_sdio_frmtype {
533 BRCMF_SDIO_FT_NORMAL,
538 static void pkt_align(struct sk_buff *p, int len, int align)
541 datalign = (unsigned long)(p->data);
542 datalign = roundup(datalign, (align)) - datalign;
544 skb_pull(p, datalign);
548 /* To check if there's window offered */
549 static bool data_ok(struct brcmf_sdio *bus)
551 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
552 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
556 * Reads a register in the SDIO hardware block. This block occupies a series of
557 * adresses on the 32 bit backplane bus.
560 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
562 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
565 *regvar = brcmf_sdio_regrl(bus->sdiodev,
566 bus->ci->c_inf[idx].base + offset, &ret);
572 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
574 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
577 brcmf_sdio_regwl(bus->sdiodev,
578 bus->ci->c_inf[idx].base + reg_offset,
585 brcmf_sdbrcm_kso_control(struct brcmf_sdio *bus, bool on)
587 u8 wr_val = 0, rd_val, cmp_val, bmask;
591 brcmf_dbg(TRACE, "Enter\n");
593 wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
594 /* 1st KSO write goes to AOS wake up core if device is asleep */
595 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
598 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
603 /* device WAKEUP through KSO:
604 * write bit 0 & read back until
605 * both bits 0 (kso bit) & 1 (dev on status) are set
607 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
608 SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
610 usleep_range(2000, 3000);
612 /* Put device to sleep, turn off KSO */
614 /* only check for bit0, bit1(dev on status) may not
615 * get cleared right away
617 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
621 /* reliable KSO bit set/clr:
622 * the sdiod sleep write access is synced to PMU 32khz clk
623 * just one write attempt may fail,
624 * read it back until it matches written value
626 rd_val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
628 if (((rd_val & bmask) == cmp_val) && !err)
630 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
631 try_cnt, MAX_KSO_ATTEMPTS, err);
633 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
635 } while (try_cnt++ < MAX_KSO_ATTEMPTS);
640 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
642 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
644 /* Turn backplane clock on or off */
645 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
648 u8 clkctl, clkreq, devctl;
649 unsigned long timeout;
651 brcmf_dbg(SDIO, "Enter\n");
655 if (bus->sr_enabled) {
656 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
661 /* Request HT Avail */
663 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
665 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
668 brcmf_err("HT Avail request error: %d\n", err);
672 /* Check current status */
673 clkctl = brcmf_sdio_regrb(bus->sdiodev,
674 SBSDIO_FUNC1_CHIPCLKCSR, &err);
676 brcmf_err("HT Avail read error: %d\n", err);
680 /* Go to pending and await interrupt if appropriate */
681 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
682 /* Allow only clock-available interrupt */
683 devctl = brcmf_sdio_regrb(bus->sdiodev,
684 SBSDIO_DEVICE_CTL, &err);
686 brcmf_err("Devctl error setting CA: %d\n",
691 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
692 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
694 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
695 bus->clkstate = CLK_PENDING;
698 } else if (bus->clkstate == CLK_PENDING) {
699 /* Cancel CA-only interrupt filter */
700 devctl = brcmf_sdio_regrb(bus->sdiodev,
701 SBSDIO_DEVICE_CTL, &err);
702 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
703 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
707 /* Otherwise, wait here (polling) for HT Avail */
709 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
710 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
711 clkctl = brcmf_sdio_regrb(bus->sdiodev,
712 SBSDIO_FUNC1_CHIPCLKCSR,
714 if (time_after(jiffies, timeout))
717 usleep_range(5000, 10000);
720 brcmf_err("HT Avail request error: %d\n", err);
723 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
724 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
725 PMU_MAX_TRANSITION_DLY, clkctl);
729 /* Mark clock available */
730 bus->clkstate = CLK_AVAIL;
731 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
734 if (!bus->alp_only) {
735 if (SBSDIO_ALPONLY(clkctl))
736 brcmf_err("HT Clock should be on\n");
738 #endif /* defined (DEBUG) */
740 bus->activity = true;
744 if (bus->clkstate == CLK_PENDING) {
745 /* Cancel CA-only interrupt filter */
746 devctl = brcmf_sdio_regrb(bus->sdiodev,
747 SBSDIO_DEVICE_CTL, &err);
748 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
749 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
753 bus->clkstate = CLK_SDONLY;
754 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
756 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
758 brcmf_err("Failed access turning clock off: %d\n",
766 /* Change idle/active SD state */
767 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
769 brcmf_dbg(SDIO, "Enter\n");
772 bus->clkstate = CLK_SDONLY;
774 bus->clkstate = CLK_NONE;
779 /* Transition SD and backplane clock readiness */
780 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
783 uint oldstate = bus->clkstate;
786 brcmf_dbg(SDIO, "Enter\n");
788 /* Early exit if we're already there */
789 if (bus->clkstate == target) {
790 if (target == CLK_AVAIL) {
791 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
792 bus->activity = true;
799 /* Make sure SD clock is available */
800 if (bus->clkstate == CLK_NONE)
801 brcmf_sdbrcm_sdclk(bus, true);
802 /* Now request HT Avail on the backplane */
803 brcmf_sdbrcm_htclk(bus, true, pendok);
804 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
805 bus->activity = true;
809 /* Remove HT request, or bring up SD clock */
810 if (bus->clkstate == CLK_NONE)
811 brcmf_sdbrcm_sdclk(bus, true);
812 else if (bus->clkstate == CLK_AVAIL)
813 brcmf_sdbrcm_htclk(bus, false, false);
815 brcmf_err("request for %d -> %d\n",
816 bus->clkstate, target);
817 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
821 /* Make sure to remove HT request */
822 if (bus->clkstate == CLK_AVAIL)
823 brcmf_sdbrcm_htclk(bus, false, false);
824 /* Now remove the SD clock */
825 brcmf_sdbrcm_sdclk(bus, false);
826 brcmf_sdbrcm_wd_timer(bus, 0);
830 brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
837 brcmf_sdbrcm_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
840 brcmf_dbg(TRACE, "Enter\n");
841 brcmf_dbg(SDIO, "request %s currently %s\n",
842 (sleep ? "SLEEP" : "WAKE"),
843 (bus->sleeping ? "SLEEP" : "WAKE"));
845 /* If SR is enabled control bus state with KSO */
846 if (bus->sr_enabled) {
847 /* Done if we're already in the requested state */
848 if (sleep == bus->sleeping)
853 /* Don't sleep if something is pending */
854 if (atomic_read(&bus->intstatus) ||
855 atomic_read(&bus->ipend) > 0 ||
856 (!atomic_read(&bus->fcstate) &&
857 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
860 err = brcmf_sdbrcm_kso_control(bus, false);
861 /* disable watchdog */
863 brcmf_sdbrcm_wd_timer(bus, 0);
866 err = brcmf_sdbrcm_kso_control(bus, true);
870 bus->sleeping = sleep;
871 brcmf_dbg(SDIO, "new state %s\n",
872 (sleep ? "SLEEP" : "WAKE"));
874 brcmf_err("error while changing bus sleep state %d\n",
883 if (!bus->sr_enabled)
884 brcmf_sdbrcm_clkctl(bus, CLK_NONE, pendok);
886 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, pendok);
893 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
900 brcmf_dbg(SDIO, "Enter\n");
902 /* Read mailbox data and ack that we did so */
903 ret = r_sdreg32(bus, &hmb_data,
904 offsetof(struct sdpcmd_regs, tohostmailboxdata));
907 w_sdreg32(bus, SMB_INT_ACK,
908 offsetof(struct sdpcmd_regs, tosbmailbox));
909 bus->sdcnt.f1regdata += 2;
911 /* Dongle recomposed rx frames, accept them again */
912 if (hmb_data & HMB_DATA_NAKHANDLED) {
913 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
916 brcmf_err("unexpected NAKHANDLED!\n");
919 intstatus |= I_HMB_FRAME_IND;
923 * DEVREADY does not occur with gSPI.
925 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
927 (hmb_data & HMB_DATA_VERSION_MASK) >>
928 HMB_DATA_VERSION_SHIFT;
929 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
930 brcmf_err("Version mismatch, dongle reports %d, "
932 bus->sdpcm_ver, SDPCM_PROT_VERSION);
934 brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
939 * Flow Control has been moved into the RX headers and this out of band
940 * method isn't used any more.
941 * remaining backward compatible with older dongles.
943 if (hmb_data & HMB_DATA_FC) {
944 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
945 HMB_DATA_FCDATA_SHIFT;
947 if (fcbits & ~bus->flowcontrol)
948 bus->sdcnt.fc_xoff++;
950 if (bus->flowcontrol & ~fcbits)
953 bus->sdcnt.fc_rcvd++;
954 bus->flowcontrol = fcbits;
957 /* Shouldn't be any others */
958 if (hmb_data & ~(HMB_DATA_DEVREADY |
959 HMB_DATA_NAKHANDLED |
962 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
963 brcmf_err("Unknown mailbox data content: 0x%02x\n",
969 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
976 brcmf_err("%sterminate frame%s\n",
977 abort ? "abort command, " : "",
978 rtx ? ", send NAK" : "");
981 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
983 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
985 bus->sdcnt.f1regdata++;
987 /* Wait until the packet has been flushed (device/FIFO stable) */
988 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
989 hi = brcmf_sdio_regrb(bus->sdiodev,
990 SBSDIO_FUNC1_RFRAMEBCHI, &err);
991 lo = brcmf_sdio_regrb(bus->sdiodev,
992 SBSDIO_FUNC1_RFRAMEBCLO, &err);
993 bus->sdcnt.f1regdata += 2;
995 if ((hi == 0) && (lo == 0))
998 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
999 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1000 lastrbc, (hi << 8) + lo);
1002 lastrbc = (hi << 8) + lo;
1006 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1008 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1012 err = w_sdreg32(bus, SMB_NAK,
1013 offsetof(struct sdpcmd_regs, tosbmailbox));
1015 bus->sdcnt.f1regdata++;
1020 /* Clear partial in any case */
1021 bus->cur_read.len = 0;
1023 /* If we can't reach the device, signal failure */
1025 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1028 /* copy a buffer into a pkt buffer chain */
1029 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1038 skb_queue_walk(&bus->glom, p) {
1039 n = min_t(uint, p->len, len);
1040 memcpy(p->data, buf, n);
1051 /* return total length of buffer chain */
1052 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1058 skb_queue_walk(&bus->glom, p)
1063 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1065 struct sk_buff *cur, *next;
1067 skb_queue_walk_safe(&bus->glom, cur, next) {
1068 skb_unlink(cur, &bus->glom);
1069 brcmu_pkt_buf_free_skb(cur);
1073 static int brcmf_sdio_hdparser(struct brcmf_sdio *bus, u8 *header,
1074 struct brcmf_sdio_read *rd,
1075 enum brcmf_sdio_frmtype type)
1078 u8 rx_seq, fc, tx_seq_max;
1081 * 4 bytes hardware header (frame tag)
1082 * Byte 0~1: Frame length
1083 * Byte 2~3: Checksum, bit-wise inverse of frame length
1085 len = get_unaligned_le16(header);
1086 checksum = get_unaligned_le16(header + sizeof(u16));
1087 /* All zero means no more to read */
1088 if (!(len | checksum)) {
1089 bus->rxpending = false;
1092 if ((u16)(~(len ^ checksum))) {
1093 brcmf_err("HW header checksum error\n");
1094 bus->sdcnt.rx_badhdr++;
1095 brcmf_sdbrcm_rxfail(bus, false, false);
1098 if (len < SDPCM_HDRLEN) {
1099 brcmf_err("HW header length error\n");
1102 if (type == BRCMF_SDIO_FT_SUPER &&
1103 (roundup(len, bus->blocksize) != rd->len)) {
1104 brcmf_err("HW superframe header length error\n");
1107 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1108 brcmf_err("HW subframe header length error\n");
1114 * 8 bytes hardware header
1115 * Byte 0: Rx sequence number
1116 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1117 * Byte 2: Length of next data frame
1118 * Byte 3: Data offset
1119 * Byte 4: Flow control bits
1120 * Byte 5: Maximum Sequence number allow for Tx
1121 * Byte 6~7: Reserved
1123 if (type == BRCMF_SDIO_FT_SUPER &&
1124 SDPCM_GLOMDESC(&header[SDPCM_FRAMETAG_LEN])) {
1125 brcmf_err("Glom descriptor found in superframe head\n");
1129 rx_seq = SDPCM_PACKET_SEQUENCE(&header[SDPCM_FRAMETAG_LEN]);
1130 rd->channel = SDPCM_PACKET_CHANNEL(&header[SDPCM_FRAMETAG_LEN]);
1131 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1132 type != BRCMF_SDIO_FT_SUPER) {
1133 brcmf_err("HW header length too long\n");
1134 bus->sdcnt.rx_toolong++;
1135 brcmf_sdbrcm_rxfail(bus, false, false);
1139 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1140 brcmf_err("Wrong channel for superframe\n");
1144 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1145 rd->channel != SDPCM_EVENT_CHANNEL) {
1146 brcmf_err("Wrong channel for subframe\n");
1150 rd->dat_offset = SDPCM_DOFFSET_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1151 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1152 brcmf_err("seq %d: bad data offset\n", rx_seq);
1153 bus->sdcnt.rx_badhdr++;
1154 brcmf_sdbrcm_rxfail(bus, false, false);
1158 if (rd->seq_num != rx_seq) {
1159 brcmf_err("seq %d: sequence number error, expect %d\n",
1160 rx_seq, rd->seq_num);
1161 bus->sdcnt.rx_badseq++;
1162 rd->seq_num = rx_seq;
1164 /* no need to check the reset for subframe */
1165 if (type == BRCMF_SDIO_FT_SUB)
1167 rd->len_nxtfrm = header[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1168 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1169 /* only warm for NON glom packet */
1170 if (rd->channel != SDPCM_GLOM_CHANNEL)
1171 brcmf_err("seq %d: next length error\n", rx_seq);
1174 fc = SDPCM_FCMASK_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1175 if (bus->flowcontrol != fc) {
1176 if (~bus->flowcontrol & fc)
1177 bus->sdcnt.fc_xoff++;
1178 if (bus->flowcontrol & ~fc)
1179 bus->sdcnt.fc_xon++;
1180 bus->sdcnt.fc_rcvd++;
1181 bus->flowcontrol = fc;
1183 tx_seq_max = SDPCM_WINDOW_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1184 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1185 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1186 tx_seq_max = bus->tx_seq + 2;
1188 bus->tx_max = tx_seq_max;
1193 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1199 struct sk_buff *pfirst, *pnext;
1204 bool usechain = bus->use_rxchain;
1206 struct brcmf_sdio_read rd_new;
1208 /* If packets, issue read(s) and send up packet chain */
1209 /* Return sequence numbers consumed? */
1211 brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1212 bus->glomd, skb_peek(&bus->glom));
1214 /* If there's a descriptor, generate the packet chain */
1216 pfirst = pnext = NULL;
1217 dlen = (u16) (bus->glomd->len);
1218 dptr = bus->glomd->data;
1219 if (!dlen || (dlen & 1)) {
1220 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1225 for (totlen = num = 0; dlen; num++) {
1226 /* Get (and move past) next length */
1227 sublen = get_unaligned_le16(dptr);
1228 dlen -= sizeof(u16);
1229 dptr += sizeof(u16);
1230 if ((sublen < SDPCM_HDRLEN) ||
1231 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1232 brcmf_err("descriptor len %d bad: %d\n",
1237 if (sublen % BRCMF_SDALIGN) {
1238 brcmf_err("sublen %d not multiple of %d\n",
1239 sublen, BRCMF_SDALIGN);
1244 /* For last frame, adjust read len so total
1245 is a block multiple */
1248 (roundup(totlen, bus->blocksize) - totlen);
1249 totlen = roundup(totlen, bus->blocksize);
1252 /* Allocate/chain packet for next subframe */
1253 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1254 if (pnext == NULL) {
1255 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1259 skb_queue_tail(&bus->glom, pnext);
1261 /* Adhere to start alignment requirements */
1262 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1265 /* If all allocations succeeded, save packet chain
1268 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1270 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1271 totlen != bus->cur_read.len) {
1272 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1273 bus->cur_read.len, totlen, rxseq);
1275 pfirst = pnext = NULL;
1277 brcmf_sdbrcm_free_glom(bus);
1281 /* Done with descriptor packet */
1282 brcmu_pkt_buf_free_skb(bus->glomd);
1284 bus->cur_read.len = 0;
1287 /* Ok -- either we just generated a packet chain,
1288 or had one from before */
1289 if (!skb_queue_empty(&bus->glom)) {
1290 if (BRCMF_GLOM_ON()) {
1291 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1292 skb_queue_walk(&bus->glom, pnext) {
1293 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1294 pnext, (u8 *) (pnext->data),
1295 pnext->len, pnext->len);
1299 pfirst = skb_peek(&bus->glom);
1300 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1302 /* Do an SDIO read for the superframe. Configurable iovar to
1303 * read directly into the chained packet, or allocate a large
1304 * packet and and copy into the chain.
1306 sdio_claim_host(bus->sdiodev->func[1]);
1308 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1309 bus->sdiodev->sbwad,
1310 SDIO_FUNC_2, F2SYNC, &bus->glom);
1311 } else if (bus->dataptr) {
1312 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1313 bus->sdiodev->sbwad,
1314 SDIO_FUNC_2, F2SYNC,
1315 bus->dataptr, dlen);
1316 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1317 if (sublen != dlen) {
1318 brcmf_err("FAILED TO COPY, dlen %d sublen %d\n",
1324 brcmf_err("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1328 sdio_release_host(bus->sdiodev->func[1]);
1329 bus->sdcnt.f2rxdata++;
1331 /* On failure, kill the superframe, allow a couple retries */
1333 brcmf_err("glom read of %d bytes failed: %d\n",
1336 sdio_claim_host(bus->sdiodev->func[1]);
1337 if (bus->glomerr++ < 3) {
1338 brcmf_sdbrcm_rxfail(bus, true, true);
1341 brcmf_sdbrcm_rxfail(bus, true, false);
1342 bus->sdcnt.rxglomfail++;
1343 brcmf_sdbrcm_free_glom(bus);
1345 sdio_release_host(bus->sdiodev->func[1]);
1349 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1350 pfirst->data, min_t(int, pfirst->len, 48),
1353 rd_new.seq_num = rxseq;
1355 sdio_claim_host(bus->sdiodev->func[1]);
1356 errcode = brcmf_sdio_hdparser(bus, pfirst->data, &rd_new,
1357 BRCMF_SDIO_FT_SUPER);
1358 sdio_release_host(bus->sdiodev->func[1]);
1359 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1361 /* Remove superframe header, remember offset */
1362 skb_pull(pfirst, rd_new.dat_offset);
1363 sfdoff = rd_new.dat_offset;
1366 /* Validate all the subframe headers */
1367 skb_queue_walk(&bus->glom, pnext) {
1368 /* leave when invalid subframe is found */
1372 rd_new.len = pnext->len;
1373 rd_new.seq_num = rxseq++;
1374 sdio_claim_host(bus->sdiodev->func[1]);
1375 errcode = brcmf_sdio_hdparser(bus, pnext->data, &rd_new,
1377 sdio_release_host(bus->sdiodev->func[1]);
1378 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1379 pnext->data, 32, "subframe:\n");
1385 /* Terminate frame on error, request
1387 sdio_claim_host(bus->sdiodev->func[1]);
1388 if (bus->glomerr++ < 3) {
1389 /* Restore superframe header space */
1390 skb_push(pfirst, sfdoff);
1391 brcmf_sdbrcm_rxfail(bus, true, true);
1394 brcmf_sdbrcm_rxfail(bus, true, false);
1395 bus->sdcnt.rxglomfail++;
1396 brcmf_sdbrcm_free_glom(bus);
1398 sdio_release_host(bus->sdiodev->func[1]);
1399 bus->cur_read.len = 0;
1403 /* Basic SD framing looks ok - process each packet (header) */
1405 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1406 dptr = (u8 *) (pfirst->data);
1407 sublen = get_unaligned_le16(dptr);
1408 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1410 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1412 "Rx Subframe Data:\n");
1414 __skb_trim(pfirst, sublen);
1415 skb_pull(pfirst, doff);
1417 if (pfirst->len == 0) {
1418 skb_unlink(pfirst, &bus->glom);
1419 brcmu_pkt_buf_free_skb(pfirst);
1423 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1425 min_t(int, pfirst->len, 32),
1426 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1427 bus->glom.qlen, pfirst, pfirst->data,
1428 pfirst->len, pfirst->next,
1431 /* sent any remaining packets up */
1433 brcmf_rx_frames(bus->sdiodev->dev, &bus->glom);
1435 bus->sdcnt.rxglomframes++;
1436 bus->sdcnt.rxglompkts += bus->glom.qlen;
1441 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1444 DECLARE_WAITQUEUE(wait, current);
1445 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1447 /* Wait until control frame is available */
1448 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1449 set_current_state(TASK_INTERRUPTIBLE);
1451 while (!(*condition) && (!signal_pending(current) && timeout))
1452 timeout = schedule_timeout(timeout);
1454 if (signal_pending(current))
1457 set_current_state(TASK_RUNNING);
1458 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1463 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1465 if (waitqueue_active(&bus->dcmd_resp_wait))
1466 wake_up_interruptible(&bus->dcmd_resp_wait);
1471 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1474 u8 *buf = NULL, *rbuf;
1477 brcmf_dbg(TRACE, "Enter\n");
1480 buf = vzalloc(bus->rxblen);
1485 pad = ((unsigned long)rbuf % BRCMF_SDALIGN);
1487 rbuf += (BRCMF_SDALIGN - pad);
1489 /* Copy the already-read portion over */
1490 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1491 if (len <= BRCMF_FIRSTREAD)
1494 /* Raise rdlen to next SDIO block to avoid tail command */
1495 rdlen = len - BRCMF_FIRSTREAD;
1496 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1497 pad = bus->blocksize - (rdlen % bus->blocksize);
1498 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1499 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1501 } else if (rdlen % BRCMF_SDALIGN) {
1502 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1505 /* Satisfy length-alignment requirements */
1506 if (rdlen & (ALIGNMENT - 1))
1507 rdlen = roundup(rdlen, ALIGNMENT);
1509 /* Drop if the read is too big or it exceeds our maximum */
1510 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1511 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1512 rdlen, bus->sdiodev->bus_if->maxctl);
1513 brcmf_sdbrcm_rxfail(bus, false, false);
1517 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1518 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1519 len, len - doff, bus->sdiodev->bus_if->maxctl);
1520 bus->sdcnt.rx_toolong++;
1521 brcmf_sdbrcm_rxfail(bus, false, false);
1525 /* Read remain of frame body */
1526 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1527 bus->sdiodev->sbwad,
1529 F2SYNC, rbuf, rdlen);
1530 bus->sdcnt.f2rxdata++;
1532 /* Control frame failures need retransmission */
1534 brcmf_err("read %d control bytes failed: %d\n",
1536 bus->sdcnt.rxc_errors++;
1537 brcmf_sdbrcm_rxfail(bus, true, true);
1540 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1544 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1545 buf, len, "RxCtrl:\n");
1547 /* Point to valid data and indicate its length */
1548 spin_lock_bh(&bus->rxctl_lock);
1550 brcmf_err("last control frame is being processed.\n");
1551 spin_unlock_bh(&bus->rxctl_lock);
1555 bus->rxctl = buf + doff;
1556 bus->rxctl_orig = buf;
1557 bus->rxlen = len - doff;
1558 spin_unlock_bh(&bus->rxctl_lock);
1561 /* Awake any waiters */
1562 brcmf_sdbrcm_dcmd_resp_wake(bus);
1565 /* Pad read to blocksize for efficiency */
1566 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1568 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1569 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1570 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1571 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1573 } else if (*rdlen % BRCMF_SDALIGN) {
1574 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1578 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1580 struct sk_buff *pkt; /* Packet for event or data frames */
1581 struct sk_buff_head pktlist; /* needed for bus interface */
1582 u16 pad; /* Number of pad bytes to read */
1583 uint rxleft = 0; /* Remaining number of frames allowed */
1584 int ret; /* Return code from calls */
1585 uint rxcount = 0; /* Total frames read */
1586 struct brcmf_sdio_read *rd = &bus->cur_read, rd_new;
1589 brcmf_dbg(TRACE, "Enter\n");
1591 /* Not finished unless we encounter no more frames indication */
1592 bus->rxpending = true;
1594 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1595 !bus->rxskip && rxleft &&
1596 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1597 rd->seq_num++, rxleft--) {
1599 /* Handle glomming separately */
1600 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1602 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1603 bus->glomd, skb_peek(&bus->glom));
1604 cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1605 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1606 rd->seq_num += cnt - 1;
1607 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1611 rd->len_left = rd->len;
1612 /* read header first for unknow frame length */
1613 sdio_claim_host(bus->sdiodev->func[1]);
1615 ret = brcmf_sdcard_recv_buf(bus->sdiodev,
1616 bus->sdiodev->sbwad,
1617 SDIO_FUNC_2, F2SYNC,
1620 bus->sdcnt.f2rxhdrs++;
1622 brcmf_err("RXHEADER FAILED: %d\n",
1624 bus->sdcnt.rx_hdrfail++;
1625 brcmf_sdbrcm_rxfail(bus, true, true);
1626 sdio_release_host(bus->sdiodev->func[1]);
1630 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1631 bus->rxhdr, SDPCM_HDRLEN,
1634 if (brcmf_sdio_hdparser(bus, bus->rxhdr, rd,
1635 BRCMF_SDIO_FT_NORMAL)) {
1636 sdio_release_host(bus->sdiodev->func[1]);
1637 if (!bus->rxpending)
1643 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1644 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1647 /* prepare the descriptor for the next read */
1648 rd->len = rd->len_nxtfrm << 4;
1650 /* treat all packet as event if we don't know */
1651 rd->channel = SDPCM_EVENT_CHANNEL;
1652 sdio_release_host(bus->sdiodev->func[1]);
1655 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1656 rd->len - BRCMF_FIRSTREAD : 0;
1657 head_read = BRCMF_FIRSTREAD;
1660 brcmf_pad(bus, &pad, &rd->len_left);
1662 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1665 /* Give up on data, request rtx of events */
1666 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1667 brcmf_sdbrcm_rxfail(bus, false,
1668 RETRYCHAN(rd->channel));
1669 sdio_release_host(bus->sdiodev->func[1]);
1672 skb_pull(pkt, head_read);
1673 pkt_align(pkt, rd->len_left, BRCMF_SDALIGN);
1675 ret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1676 SDIO_FUNC_2, F2SYNC, pkt);
1677 bus->sdcnt.f2rxdata++;
1678 sdio_release_host(bus->sdiodev->func[1]);
1681 brcmf_err("read %d bytes from channel %d failed: %d\n",
1682 rd->len, rd->channel, ret);
1683 brcmu_pkt_buf_free_skb(pkt);
1684 sdio_claim_host(bus->sdiodev->func[1]);
1685 brcmf_sdbrcm_rxfail(bus, true,
1686 RETRYCHAN(rd->channel));
1687 sdio_release_host(bus->sdiodev->func[1]);
1692 skb_push(pkt, head_read);
1693 memcpy(pkt->data, bus->rxhdr, head_read);
1696 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1697 rd_new.seq_num = rd->seq_num;
1698 sdio_claim_host(bus->sdiodev->func[1]);
1699 if (brcmf_sdio_hdparser(bus, bus->rxhdr, &rd_new,
1700 BRCMF_SDIO_FT_NORMAL)) {
1702 brcmu_pkt_buf_free_skb(pkt);
1704 bus->sdcnt.rx_readahead_cnt++;
1705 if (rd->len != roundup(rd_new.len, 16)) {
1706 brcmf_err("frame length mismatch:read %d, should be %d\n",
1708 roundup(rd_new.len, 16) >> 4);
1710 brcmf_sdbrcm_rxfail(bus, true, true);
1711 sdio_release_host(bus->sdiodev->func[1]);
1712 brcmu_pkt_buf_free_skb(pkt);
1715 sdio_release_host(bus->sdiodev->func[1]);
1716 rd->len_nxtfrm = rd_new.len_nxtfrm;
1717 rd->channel = rd_new.channel;
1718 rd->dat_offset = rd_new.dat_offset;
1720 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1723 bus->rxhdr, SDPCM_HDRLEN,
1726 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1727 brcmf_err("readahead on control packet %d?\n",
1729 /* Force retry w/normal header read */
1731 sdio_claim_host(bus->sdiodev->func[1]);
1732 brcmf_sdbrcm_rxfail(bus, false, true);
1733 sdio_release_host(bus->sdiodev->func[1]);
1734 brcmu_pkt_buf_free_skb(pkt);
1739 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1740 pkt->data, rd->len, "Rx Data:\n");
1742 /* Save superframe descriptor and allocate packet frame */
1743 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1744 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
1745 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1747 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1750 __skb_trim(pkt, rd->len);
1751 skb_pull(pkt, SDPCM_HDRLEN);
1754 brcmf_err("%s: glom superframe w/o "
1755 "descriptor!\n", __func__);
1756 sdio_claim_host(bus->sdiodev->func[1]);
1757 brcmf_sdbrcm_rxfail(bus, false, false);
1758 sdio_release_host(bus->sdiodev->func[1]);
1760 /* prepare the descriptor for the next read */
1761 rd->len = rd->len_nxtfrm << 4;
1763 /* treat all packet as event if we don't know */
1764 rd->channel = SDPCM_EVENT_CHANNEL;
1768 /* Fill in packet len and prio, deliver upward */
1769 __skb_trim(pkt, rd->len);
1770 skb_pull(pkt, rd->dat_offset);
1772 /* prepare the descriptor for the next read */
1773 rd->len = rd->len_nxtfrm << 4;
1775 /* treat all packet as event if we don't know */
1776 rd->channel = SDPCM_EVENT_CHANNEL;
1778 if (pkt->len == 0) {
1779 brcmu_pkt_buf_free_skb(pkt);
1783 skb_queue_head_init(&pktlist);
1784 skb_queue_tail(&pktlist, pkt);
1785 brcmf_rx_frames(bus->sdiodev->dev, &pktlist);
1788 rxcount = maxframes - rxleft;
1789 /* Message if we hit the limit */
1791 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1793 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1794 /* Back off rxseq if awaiting rtx, update rx_seq */
1797 bus->rx_seq = rd->seq_num;
1803 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1805 if (waitqueue_active(&bus->ctrl_wait))
1806 wake_up_interruptible(&bus->ctrl_wait);
1810 /* Writes a HW/SW header into the packet and sends it. */
1811 /* Assumes: (a) header space already there, (b) caller holds lock */
1812 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
1821 brcmf_dbg(TRACE, "Enter\n");
1823 frame = (u8 *) (pkt->data);
1825 /* Add alignment padding, allocate new packet if needed */
1826 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1828 if (skb_headroom(pkt) < pad) {
1829 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
1830 skb_headroom(pkt), pad);
1831 bus->sdiodev->bus_if->tx_realloc++;
1832 ret = skb_cow(pkt, BRCMF_SDALIGN);
1835 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1838 frame = (u8 *) (pkt->data);
1839 memset(frame, 0, pad + SDPCM_HDRLEN);
1841 /* precondition: pad < BRCMF_SDALIGN */
1843 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1844 len = (u16) (pkt->len);
1845 *(__le16 *) frame = cpu_to_le16(len);
1846 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
1848 /* Software tag: channel, sequence number, data offset */
1850 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1852 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1854 *(((__le32 *) frame) + 1) = cpu_to_le32(swheader);
1855 *(((__le32 *) frame) + 2) = 0;
1858 tx_packets[pkt->priority]++;
1861 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
1862 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
1863 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
1864 frame, len, "Tx Frame:\n");
1865 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1867 chan == SDPCM_CONTROL_CHANNEL) ||
1869 chan != SDPCM_CONTROL_CHANNEL))) &&
1871 frame, min_t(u16, len, 16), "TxHdr:\n");
1873 /* Raise len to next SDIO block to eliminate tail command */
1874 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1875 u16 pad = bus->blocksize - (len % bus->blocksize);
1876 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1878 } else if (len % BRCMF_SDALIGN) {
1879 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1882 /* Some controllers have trouble with odd bytes -- round to even */
1883 if (len & (ALIGNMENT - 1))
1884 len = roundup(len, ALIGNMENT);
1886 sdio_claim_host(bus->sdiodev->func[1]);
1887 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1888 SDIO_FUNC_2, F2SYNC, pkt);
1889 bus->sdcnt.f2txdata++;
1892 /* On failure, abort the command and terminate the frame */
1893 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
1895 bus->sdcnt.tx_sderrs++;
1897 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1898 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1900 bus->sdcnt.f1regdata++;
1902 for (i = 0; i < 3; i++) {
1904 hi = brcmf_sdio_regrb(bus->sdiodev,
1905 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1906 lo = brcmf_sdio_regrb(bus->sdiodev,
1907 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1908 bus->sdcnt.f1regdata += 2;
1909 if ((hi == 0) && (lo == 0))
1914 sdio_release_host(bus->sdiodev->func[1]);
1916 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1919 /* restore pkt buffer pointer before calling tx complete routine */
1920 skb_pull(pkt, SDPCM_HDRLEN + pad);
1921 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret == 0);
1925 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
1927 struct sk_buff *pkt;
1929 int ret = 0, prec_out;
1934 brcmf_dbg(TRACE, "Enter\n");
1936 tx_prec_map = ~bus->flowcontrol;
1938 /* Send frames until the limit or some other event */
1939 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
1940 spin_lock_bh(&bus->txqlock);
1941 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1943 spin_unlock_bh(&bus->txqlock);
1946 spin_unlock_bh(&bus->txqlock);
1947 datalen = pkt->len - SDPCM_HDRLEN;
1949 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL);
1951 /* In poll mode, need to check for other events */
1952 if (!bus->intr && cnt) {
1953 /* Check device status, signal pending interrupt */
1954 sdio_claim_host(bus->sdiodev->func[1]);
1955 ret = r_sdreg32(bus, &intstatus,
1956 offsetof(struct sdpcmd_regs,
1958 sdio_release_host(bus->sdiodev->func[1]);
1959 bus->sdcnt.f2txdata++;
1962 if (intstatus & bus->hostintmask)
1963 atomic_set(&bus->ipend, 1);
1967 /* Deflow-control stack if needed */
1968 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
1969 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
1971 brcmf_txflowblock(bus->sdiodev->dev, false);
1977 static void brcmf_sdbrcm_bus_stop(struct device *dev)
1979 u32 local_hostintmask;
1982 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
1983 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
1984 struct brcmf_sdio *bus = sdiodev->bus;
1986 brcmf_dbg(TRACE, "Enter\n");
1988 if (bus->watchdog_tsk) {
1989 send_sig(SIGTERM, bus->watchdog_tsk, 1);
1990 kthread_stop(bus->watchdog_tsk);
1991 bus->watchdog_tsk = NULL;
1994 sdio_claim_host(bus->sdiodev->func[1]);
1996 /* Enable clock for device interrupts */
1997 brcmf_sdbrcm_bus_sleep(bus, false, false);
1999 /* Disable and clear interrupts at the chip level also */
2000 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2001 local_hostintmask = bus->hostintmask;
2002 bus->hostintmask = 0;
2004 /* Change our idea of bus state */
2005 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2007 /* Force clocks on backplane to be sure F2 interrupt propagates */
2008 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2009 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2011 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2012 (saveclk | SBSDIO_FORCE_HT), &err);
2015 brcmf_err("Failed to force clock for F2: err %d\n", err);
2017 /* Turn off the bus (F2), free any pending packets */
2018 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2019 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2022 /* Clear any pending interrupts now that F2 is disabled */
2023 w_sdreg32(bus, local_hostintmask,
2024 offsetof(struct sdpcmd_regs, intstatus));
2026 /* Turn off the backplane clock (only) */
2027 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2028 sdio_release_host(bus->sdiodev->func[1]);
2030 /* Clear the data packet queues */
2031 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2033 /* Clear any held glomming stuff */
2035 brcmu_pkt_buf_free_skb(bus->glomd);
2036 brcmf_sdbrcm_free_glom(bus);
2038 /* Clear rx control and wake any waiters */
2039 spin_lock_bh(&bus->rxctl_lock);
2041 spin_unlock_bh(&bus->rxctl_lock);
2042 brcmf_sdbrcm_dcmd_resp_wake(bus);
2044 /* Reset some F2 state stuff */
2045 bus->rxskip = false;
2046 bus->tx_seq = bus->rx_seq = 0;
2049 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2051 unsigned long flags;
2053 if (bus->sdiodev->oob_irq_requested) {
2054 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2055 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2056 enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2057 bus->sdiodev->irq_en = true;
2059 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2063 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2070 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2071 addr = bus->ci->c_inf[idx].base +
2072 offsetof(struct sdpcmd_regs, intstatus);
2074 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2075 bus->sdcnt.f1regdata++;
2079 val &= bus->hostintmask;
2080 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2082 /* Clear interrupts */
2084 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2085 bus->sdcnt.f1regdata++;
2089 atomic_set(&bus->intstatus, 0);
2091 for_each_set_bit(n, &val, 32)
2092 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2098 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2101 unsigned long intstatus;
2102 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2103 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2104 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2107 brcmf_dbg(TRACE, "Enter\n");
2109 sdio_claim_host(bus->sdiodev->func[1]);
2111 /* If waiting for HTAVAIL, check status */
2112 if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2113 u8 clkctl, devctl = 0;
2116 /* Check for inconsistent device control */
2117 devctl = brcmf_sdio_regrb(bus->sdiodev,
2118 SBSDIO_DEVICE_CTL, &err);
2120 brcmf_err("error reading DEVCTL: %d\n", err);
2121 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2125 /* Read CSR, if clock on switch to AVAIL, else ignore */
2126 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2127 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2129 brcmf_err("error reading CSR: %d\n",
2131 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2134 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2137 if (SBSDIO_HTAV(clkctl)) {
2138 devctl = brcmf_sdio_regrb(bus->sdiodev,
2139 SBSDIO_DEVICE_CTL, &err);
2141 brcmf_err("error reading DEVCTL: %d\n",
2143 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2145 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2146 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2149 brcmf_err("error writing DEVCTL: %d\n",
2151 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2153 bus->clkstate = CLK_AVAIL;
2157 /* Make sure backplane clock is on */
2158 brcmf_sdbrcm_bus_sleep(bus, false, true);
2160 /* Pending interrupt indicates new device status */
2161 if (atomic_read(&bus->ipend) > 0) {
2162 atomic_set(&bus->ipend, 0);
2163 err = brcmf_sdio_intr_rstatus(bus);
2166 /* Start with leftover status bits */
2167 intstatus = atomic_xchg(&bus->intstatus, 0);
2169 /* Handle flow-control change: read new state in case our ack
2170 * crossed another change interrupt. If change still set, assume
2171 * FC ON for safety, let next loop through do the debounce.
2173 if (intstatus & I_HMB_FC_CHANGE) {
2174 intstatus &= ~I_HMB_FC_CHANGE;
2175 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2176 offsetof(struct sdpcmd_regs, intstatus));
2178 err = r_sdreg32(bus, &newstatus,
2179 offsetof(struct sdpcmd_regs, intstatus));
2180 bus->sdcnt.f1regdata += 2;
2181 atomic_set(&bus->fcstate,
2182 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2183 intstatus |= (newstatus & bus->hostintmask);
2186 /* Handle host mailbox indication */
2187 if (intstatus & I_HMB_HOST_INT) {
2188 intstatus &= ~I_HMB_HOST_INT;
2189 intstatus |= brcmf_sdbrcm_hostmail(bus);
2192 sdio_release_host(bus->sdiodev->func[1]);
2194 /* Generally don't ask for these, can get CRC errors... */
2195 if (intstatus & I_WR_OOSYNC) {
2196 brcmf_err("Dongle reports WR_OOSYNC\n");
2197 intstatus &= ~I_WR_OOSYNC;
2200 if (intstatus & I_RD_OOSYNC) {
2201 brcmf_err("Dongle reports RD_OOSYNC\n");
2202 intstatus &= ~I_RD_OOSYNC;
2205 if (intstatus & I_SBINT) {
2206 brcmf_err("Dongle reports SBINT\n");
2207 intstatus &= ~I_SBINT;
2210 /* Would be active due to wake-wlan in gSPI */
2211 if (intstatus & I_CHIPACTIVE) {
2212 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2213 intstatus &= ~I_CHIPACTIVE;
2216 /* Ignore frame indications if rxskip is set */
2218 intstatus &= ~I_HMB_FRAME_IND;
2220 /* On frame indication, read available frames */
2221 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2222 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2223 if (!bus->rxpending)
2224 intstatus &= ~I_HMB_FRAME_IND;
2225 rxlimit -= min(framecnt, rxlimit);
2228 /* Keep still-pending events for next scheduling */
2230 for_each_set_bit(n, &intstatus, 32)
2231 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2234 brcmf_sdbrcm_clrintr(bus);
2236 if (data_ok(bus) && bus->ctrl_frame_stat &&
2237 (bus->clkstate == CLK_AVAIL)) {
2240 sdio_claim_host(bus->sdiodev->func[1]);
2241 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2242 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2243 (u32) bus->ctrl_frame_len);
2246 /* On failure, abort the command and
2247 terminate the frame */
2248 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2250 bus->sdcnt.tx_sderrs++;
2252 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2254 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2256 bus->sdcnt.f1regdata++;
2258 for (i = 0; i < 3; i++) {
2260 hi = brcmf_sdio_regrb(bus->sdiodev,
2261 SBSDIO_FUNC1_WFRAMEBCHI,
2263 lo = brcmf_sdio_regrb(bus->sdiodev,
2264 SBSDIO_FUNC1_WFRAMEBCLO,
2266 bus->sdcnt.f1regdata += 2;
2267 if ((hi == 0) && (lo == 0))
2272 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2274 sdio_release_host(bus->sdiodev->func[1]);
2275 bus->ctrl_frame_stat = false;
2276 brcmf_sdbrcm_wait_event_wakeup(bus);
2278 /* Send queued frames (limit 1 if rx may still be pending) */
2279 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2280 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2282 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2284 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2285 txlimit -= framecnt;
2288 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2289 brcmf_err("failed backplane access over SDIO, halting operation\n");
2290 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2291 atomic_set(&bus->intstatus, 0);
2292 } else if (atomic_read(&bus->intstatus) ||
2293 atomic_read(&bus->ipend) > 0 ||
2294 (!atomic_read(&bus->fcstate) &&
2295 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2296 data_ok(bus)) || PKT_AVAILABLE()) {
2297 atomic_inc(&bus->dpc_tskcnt);
2300 /* If we're done for now, turn off clock request. */
2301 if ((bus->clkstate != CLK_PENDING)
2302 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2303 bus->activity = false;
2304 brcmf_dbg(SDIO, "idle state\n");
2305 sdio_claim_host(bus->sdiodev->func[1]);
2306 brcmf_sdbrcm_bus_sleep(bus, true, false);
2307 sdio_release_host(bus->sdiodev->func[1]);
2311 static struct pktq *brcmf_sdbrcm_bus_gettxq(struct device *dev)
2313 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2314 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2315 struct brcmf_sdio *bus = sdiodev->bus;
2320 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2324 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2325 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2326 struct brcmf_sdio *bus = sdiodev->bus;
2328 brcmf_dbg(TRACE, "Enter\n");
2332 /* Add space for the header */
2333 skb_push(pkt, SDPCM_HDRLEN);
2334 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2336 prec = prio2prec((pkt->priority & PRIOMASK));
2338 /* Check for existing queue, current flow-control,
2339 pending event, or pending clock */
2340 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2341 bus->sdcnt.fcqueued++;
2343 /* Priority based enq */
2344 spin_lock_bh(&bus->txqlock);
2345 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2346 skb_pull(pkt, SDPCM_HDRLEN);
2347 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2348 brcmf_err("out of bus->txq !!!\n");
2354 if (pktq_len(&bus->txq) >= TXHI) {
2356 brcmf_txflowblock(bus->sdiodev->dev, true);
2358 spin_unlock_bh(&bus->txqlock);
2361 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2362 qcount[prec] = pktq_plen(&bus->txq, prec);
2365 if (atomic_read(&bus->dpc_tskcnt) == 0) {
2366 atomic_inc(&bus->dpc_tskcnt);
2367 queue_work(bus->brcmf_wq, &bus->datawork);
2374 #define CONSOLE_LINE_MAX 192
2376 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2378 struct brcmf_console *c = &bus->console;
2379 u8 line[CONSOLE_LINE_MAX], ch;
2383 /* Don't do anything until FWREADY updates console address */
2384 if (bus->console_addr == 0)
2387 /* Read console log struct */
2388 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2389 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2394 /* Allocate console buffer (one time only) */
2395 if (c->buf == NULL) {
2396 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2397 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2402 idx = le32_to_cpu(c->log_le.idx);
2404 /* Protect against corrupt value */
2405 if (idx > c->bufsize)
2408 /* Skip reading the console buffer if the index pointer
2413 /* Read the console buffer */
2414 addr = le32_to_cpu(c->log_le.buf);
2415 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2419 while (c->last != idx) {
2420 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2421 if (c->last == idx) {
2422 /* This would output a partial line.
2424 * the buffer pointer and output this
2425 * line next time around.
2430 c->last = c->bufsize - n;
2433 ch = c->buf[c->last];
2434 c->last = (c->last + 1) % c->bufsize;
2441 if (line[n - 1] == '\r')
2444 pr_debug("CONSOLE: %s\n", line);
2453 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2458 bus->ctrl_frame_stat = false;
2459 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2460 SDIO_FUNC_2, F2SYNC, frame, len);
2463 /* On failure, abort the command and terminate the frame */
2464 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2466 bus->sdcnt.tx_sderrs++;
2468 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2470 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2472 bus->sdcnt.f1regdata++;
2474 for (i = 0; i < 3; i++) {
2476 hi = brcmf_sdio_regrb(bus->sdiodev,
2477 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2478 lo = brcmf_sdio_regrb(bus->sdiodev,
2479 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2480 bus->sdcnt.f1regdata += 2;
2481 if (hi == 0 && lo == 0)
2487 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2493 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2501 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2502 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2503 struct brcmf_sdio *bus = sdiodev->bus;
2505 brcmf_dbg(TRACE, "Enter\n");
2507 /* Back the pointer to make a room for bus header */
2508 frame = msg - SDPCM_HDRLEN;
2509 len = (msglen += SDPCM_HDRLEN);
2511 /* Add alignment padding (optional for ctl frames) */
2512 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2517 memset(frame, 0, doff + SDPCM_HDRLEN);
2519 /* precondition: doff < BRCMF_SDALIGN */
2520 doff += SDPCM_HDRLEN;
2522 /* Round send length to next SDIO block */
2523 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2524 u16 pad = bus->blocksize - (len % bus->blocksize);
2525 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2527 } else if (len % BRCMF_SDALIGN) {
2528 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2531 /* Satisfy length-alignment requirements */
2532 if (len & (ALIGNMENT - 1))
2533 len = roundup(len, ALIGNMENT);
2535 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2537 /* Make sure backplane clock is on */
2538 sdio_claim_host(bus->sdiodev->func[1]);
2539 brcmf_sdbrcm_bus_sleep(bus, false, false);
2540 sdio_release_host(bus->sdiodev->func[1]);
2542 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2543 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2544 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2546 /* Software tag: channel, sequence number, data offset */
2548 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2550 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2551 SDPCM_DOFFSET_MASK);
2552 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2553 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2555 if (!data_ok(bus)) {
2556 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2557 bus->tx_max, bus->tx_seq);
2558 bus->ctrl_frame_stat = true;
2560 bus->ctrl_frame_buf = frame;
2561 bus->ctrl_frame_len = len;
2563 wait_event_interruptible_timeout(bus->ctrl_wait,
2564 !bus->ctrl_frame_stat,
2565 msecs_to_jiffies(2000));
2567 if (!bus->ctrl_frame_stat) {
2568 brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2571 brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2577 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2578 frame, len, "Tx Frame:\n");
2579 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2581 frame, min_t(u16, len, 16), "TxHdr:\n");
2584 sdio_claim_host(bus->sdiodev->func[1]);
2585 ret = brcmf_tx_frame(bus, frame, len);
2586 sdio_release_host(bus->sdiodev->func[1]);
2587 } while (ret < 0 && retries++ < TXRETRIES);
2590 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2591 atomic_read(&bus->dpc_tskcnt) == 0) {
2592 bus->activity = false;
2593 sdio_claim_host(bus->sdiodev->func[1]);
2594 brcmf_dbg(INFO, "idle\n");
2595 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2596 sdio_release_host(bus->sdiodev->func[1]);
2600 bus->sdcnt.tx_ctlerrs++;
2602 bus->sdcnt.tx_ctlpkts++;
2604 return ret ? -EIO : 0;
2608 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2610 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2613 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2614 struct sdpcm_shared *sh)
2619 struct sdpcm_shared_le sh_le;
2622 shaddr = bus->ci->rambase + bus->ramsize - 4;
2625 * Read last word in socram to determine
2626 * address of sdpcm_shared structure
2628 sdio_claim_host(bus->sdiodev->func[1]);
2629 brcmf_sdbrcm_bus_sleep(bus, false, false);
2630 rv = brcmf_sdio_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2631 sdio_release_host(bus->sdiodev->func[1]);
2635 addr = le32_to_cpu(addr_le);
2637 brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2640 * Check if addr is valid.
2641 * NVRAM length at the end of memory should have been overwritten.
2643 if (!brcmf_sdio_valid_shared_address(addr)) {
2644 brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2649 /* Read hndrte_shared structure */
2650 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2651 sizeof(struct sdpcm_shared_le));
2656 sh->flags = le32_to_cpu(sh_le.flags);
2657 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2658 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2659 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2660 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2661 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2662 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2664 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2665 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2666 SDPCM_SHARED_VERSION,
2667 sh->flags & SDPCM_SHARED_VERSION_MASK);
2674 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2675 struct sdpcm_shared *sh, char __user *data,
2678 u32 addr, console_ptr, console_size, console_index;
2679 char *conbuf = NULL;
2685 /* obtain console information from device memory */
2686 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2687 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2688 (u8 *)&sh_val, sizeof(u32));
2691 console_ptr = le32_to_cpu(sh_val);
2693 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2694 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2695 (u8 *)&sh_val, sizeof(u32));
2698 console_size = le32_to_cpu(sh_val);
2700 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2701 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2702 (u8 *)&sh_val, sizeof(u32));
2705 console_index = le32_to_cpu(sh_val);
2707 /* allocate buffer for console data */
2708 if (console_size <= CONSOLE_BUFFER_MAX)
2709 conbuf = vzalloc(console_size+1);
2714 /* obtain the console data from device */
2715 conbuf[console_size] = '\0';
2716 rv = brcmf_sdio_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2721 rv = simple_read_from_buffer(data, count, &pos,
2722 conbuf + console_index,
2723 console_size - console_index);
2728 if (console_index > 0) {
2730 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2731 conbuf, console_index - 1);
2741 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2742 char __user *data, size_t count)
2746 struct brcmf_trap_info tr;
2749 if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2750 brcmf_dbg(INFO, "no trap in firmware\n");
2754 error = brcmf_sdio_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2755 sizeof(struct brcmf_trap_info));
2759 res = scnprintf(buf, sizeof(buf),
2760 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2761 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2762 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2763 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2764 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
2765 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2766 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2767 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2768 le32_to_cpu(tr.pc), sh->trap_addr,
2769 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2770 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2771 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2772 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2774 return simple_read_from_buffer(data, count, &pos, buf, res);
2777 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2778 struct sdpcm_shared *sh, char __user *data,
2783 char file[80] = "?";
2784 char expr[80] = "<???>";
2788 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2789 brcmf_dbg(INFO, "firmware not built with -assert\n");
2791 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2792 brcmf_dbg(INFO, "no assert in dongle\n");
2796 sdio_claim_host(bus->sdiodev->func[1]);
2797 if (sh->assert_file_addr != 0) {
2798 error = brcmf_sdio_ramrw(bus->sdiodev, false,
2799 sh->assert_file_addr, (u8 *)file, 80);
2803 if (sh->assert_exp_addr != 0) {
2804 error = brcmf_sdio_ramrw(bus->sdiodev, false,
2805 sh->assert_exp_addr, (u8 *)expr, 80);
2809 sdio_release_host(bus->sdiodev->func[1]);
2811 res = scnprintf(buf, sizeof(buf),
2812 "dongle assert: %s:%d: assert(%s)\n",
2813 file, sh->assert_line, expr);
2814 return simple_read_from_buffer(data, count, &pos, buf, res);
2817 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2820 struct sdpcm_shared sh;
2822 error = brcmf_sdio_readshared(bus, &sh);
2827 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2828 brcmf_dbg(INFO, "firmware not built with -assert\n");
2829 else if (sh.flags & SDPCM_SHARED_ASSERT)
2830 brcmf_err("assertion in dongle\n");
2832 if (sh.flags & SDPCM_SHARED_TRAP)
2833 brcmf_err("firmware trap in dongle\n");
2838 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
2839 size_t count, loff_t *ppos)
2842 struct sdpcm_shared sh;
2849 error = brcmf_sdio_readshared(bus, &sh);
2853 error = brcmf_sdio_assert_info(bus, &sh, data, count);
2858 error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
2863 error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
2874 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
2875 size_t count, loff_t *ppos)
2877 struct brcmf_sdio *bus = f->private_data;
2880 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
2883 return (ssize_t)res;
2886 static const struct file_operations brcmf_sdio_forensic_ops = {
2887 .owner = THIS_MODULE,
2888 .open = simple_open,
2889 .read = brcmf_sdio_forensic_read
2892 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
2894 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
2895 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
2897 if (IS_ERR_OR_NULL(dentry))
2900 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
2901 &brcmf_sdio_forensic_ops);
2902 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
2905 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2910 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
2916 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
2922 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2923 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2924 struct brcmf_sdio *bus = sdiodev->bus;
2926 brcmf_dbg(TRACE, "Enter\n");
2928 /* Wait until control frame is available */
2929 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
2931 spin_lock_bh(&bus->rxctl_lock);
2933 memcpy(msg, bus->rxctl, min(msglen, rxlen));
2935 buf = bus->rxctl_orig;
2936 bus->rxctl_orig = NULL;
2938 spin_unlock_bh(&bus->rxctl_lock);
2942 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
2944 } else if (timeleft == 0) {
2945 brcmf_err("resumed on timeout\n");
2946 brcmf_sdbrcm_checkdied(bus);
2947 } else if (pending) {
2948 brcmf_dbg(CTL, "cancelled\n");
2949 return -ERESTARTSYS;
2951 brcmf_dbg(CTL, "resumed for unknown reason?\n");
2952 brcmf_sdbrcm_checkdied(bus);
2956 bus->sdcnt.rx_ctlpkts++;
2958 bus->sdcnt.rx_ctlerrs++;
2960 return rxlen ? (int)rxlen : -ETIMEDOUT;
2963 static bool brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
2965 struct chip_info *ci = bus->ci;
2967 /* To enter download state, disable ARM and reset SOCRAM.
2968 * To exit download state, simply reset ARM (default is RAM boot).
2971 bus->alp_only = true;
2973 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
2975 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
2979 /* Allow HT Clock now that the ARM is running. */
2980 bus->alp_only = false;
2982 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
2988 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
2990 if (bus->firmware->size < bus->fw_ptr + len)
2991 len = bus->firmware->size - bus->fw_ptr;
2993 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
2998 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3002 u8 *memblock = NULL, *memptr;
3006 brcmf_dbg(INFO, "Enter\n");
3008 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3009 &bus->sdiodev->func[2]->dev);
3011 brcmf_err("Fail to request firmware %d\n", ret);
3016 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3017 if (memblock == NULL) {
3021 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3022 memptr += (BRCMF_SDALIGN -
3023 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3025 offset = bus->ci->rambase;
3027 /* Download image */
3028 len = brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus);
3029 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4);
3030 if (BRCMF_MAX_CORENUM != idx)
3031 memcpy(&bus->ci->rst_vec, memptr, sizeof(bus->ci->rst_vec));
3033 ret = brcmf_sdio_ramrw(bus->sdiodev, true, offset, memptr, len);
3035 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3036 ret, MEMBLOCK, offset);
3041 len = brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus);
3047 release_firmware(bus->firmware);
3054 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3055 * and ending in a NUL.
3056 * Removes carriage returns, empty lines, comment lines, and converts
3058 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3062 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus)
3069 uint buf_len, n, len;
3071 len = bus->firmware->size;
3072 varbuf = vmalloc(len);
3076 memcpy(varbuf, bus->firmware->data, len);
3079 findNewline = false;
3082 for (n = 0; n < len; n++) {
3085 if (varbuf[n] == '\r')
3087 if (findNewline && varbuf[n] != '\n')
3089 findNewline = false;
3090 if (varbuf[n] == '#') {
3094 if (varbuf[n] == '\n') {
3104 buf_len = dp - varbuf;
3105 while (dp < varbuf + n)
3109 /* roundup needed for download to device */
3110 bus->varsz = roundup(buf_len + 1, 4);
3111 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3112 if (bus->vars == NULL) {
3118 /* copy the processed variables and add null termination */
3119 memcpy(bus->vars, varbuf, buf_len);
3120 bus->vars[buf_len] = 0;
3126 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3130 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3131 &bus->sdiodev->func[2]->dev);
3133 brcmf_err("Fail to request nvram %d\n", ret);
3137 ret = brcmf_process_nvram_vars(bus);
3139 release_firmware(bus->firmware);
3144 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3148 /* Keep arm in reset */
3149 if (!brcmf_sdbrcm_download_state(bus, true)) {
3150 brcmf_err("error placing ARM core in reset\n");
3154 if (brcmf_sdbrcm_download_code_file(bus)) {
3155 brcmf_err("dongle image file download failed\n");
3159 if (brcmf_sdbrcm_download_nvram(bus)) {
3160 brcmf_err("dongle nvram file download failed\n");
3164 /* Take arm out of reset */
3165 if (!brcmf_sdbrcm_download_state(bus, false)) {
3166 brcmf_err("error getting out of ARM core reset\n");
3176 static bool brcmf_sdbrcm_sr_capable(struct brcmf_sdio *bus)
3180 brcmf_dbg(TRACE, "Enter\n");
3182 /* old chips with PMU version less than 17 don't support save restore */
3183 if (bus->ci->pmurev < 17)
3186 /* read PMU chipcontrol register 3*/
3187 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3188 brcmf_sdio_regwl(bus->sdiodev, addr, 3, NULL);
3189 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3190 reg = brcmf_sdio_regrl(bus->sdiodev, addr, NULL);
3195 static void brcmf_sdbrcm_sr_init(struct brcmf_sdio *bus)
3200 brcmf_dbg(TRACE, "Enter\n");
3202 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3205 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3209 val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3210 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3213 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3217 /* Add CMD14 Support */
3218 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3219 (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3220 SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3223 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3227 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3228 SBSDIO_FORCE_HT, &err);
3230 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3235 bus->sr_enabled = true;
3236 brcmf_dbg(INFO, "SR enabled\n");
3239 /* enable KSO bit */
3240 static int brcmf_sdbrcm_kso_init(struct brcmf_sdio *bus)
3245 brcmf_dbg(TRACE, "Enter\n");
3247 /* KSO bit added in SDIO core rev 12 */
3248 if (bus->ci->c_inf[1].rev < 12)
3251 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3254 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3258 if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3259 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3260 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3261 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3264 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3274 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3278 sdio_claim_host(bus->sdiodev->func[1]);
3280 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3282 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3284 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3286 sdio_release_host(bus->sdiodev->func[1]);
3291 static int brcmf_sdbrcm_bus_init(struct device *dev)
3293 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3294 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3295 struct brcmf_sdio *bus = sdiodev->bus;
3296 unsigned long timeout;
3301 brcmf_dbg(TRACE, "Enter\n");
3303 /* try to download image and nvram to the dongle */
3304 if (bus_if->state == BRCMF_BUS_DOWN) {
3305 if (!(brcmf_sdbrcm_download_firmware(bus)))
3309 if (!bus->sdiodev->bus_if->drvr)
3312 /* Start the watchdog timer */
3313 bus->sdcnt.tickcnt = 0;
3314 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3316 sdio_claim_host(bus->sdiodev->func[1]);
3318 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3319 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3320 if (bus->clkstate != CLK_AVAIL)
3323 /* Force clocks on backplane to be sure F2 interrupt propagates */
3324 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3325 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3327 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3328 (saveclk | SBSDIO_FORCE_HT), &err);
3331 brcmf_err("Failed to force clock for F2: err %d\n", err);
3335 /* Enable function 2 (frame transfers) */
3336 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3337 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3338 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3340 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3342 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3344 while (enable != ready) {
3345 ready = brcmf_sdio_regrb(bus->sdiodev,
3346 SDIO_CCCR_IORx, NULL);
3347 if (time_after(jiffies, timeout))
3349 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3350 /* prevent busy waiting if it takes too long */
3351 msleep_interruptible(20);
3354 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3356 /* If F2 successfully enabled, set core and enable interrupts */
3357 if (ready == enable) {
3358 /* Set up the interrupt mask and enable interrupts */
3359 bus->hostintmask = HOSTINTMASK;
3360 w_sdreg32(bus, bus->hostintmask,
3361 offsetof(struct sdpcmd_regs, hostintmask));
3363 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3365 /* Disable F2 again */
3366 enable = SDIO_FUNC_ENABLE_1;
3367 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3371 if (brcmf_sdbrcm_sr_capable(bus)) {
3372 brcmf_sdbrcm_sr_init(bus);
3374 /* Restore previous clock setting */
3375 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3380 ret = brcmf_sdio_intr_register(bus->sdiodev);
3382 brcmf_err("intr register failed:%d\n", ret);
3385 /* If we didn't come up, turn off backplane clock */
3386 if (bus_if->state != BRCMF_BUS_DATA)
3387 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3390 sdio_release_host(bus->sdiodev->func[1]);
3395 void brcmf_sdbrcm_isr(void *arg)
3397 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3399 brcmf_dbg(TRACE, "Enter\n");
3402 brcmf_err("bus is null pointer, exiting\n");
3406 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3407 brcmf_err("bus is down. we have nothing to do\n");
3410 /* Count the interrupt call */
3411 bus->sdcnt.intrcount++;
3413 atomic_set(&bus->ipend, 1);
3415 if (brcmf_sdio_intr_rstatus(bus)) {
3416 brcmf_err("failed backplane access\n");
3417 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3420 /* Disable additional interrupts (is this needed now)? */
3422 brcmf_err("isr w/o interrupt configured!\n");
3424 atomic_inc(&bus->dpc_tskcnt);
3425 queue_work(bus->brcmf_wq, &bus->datawork);
3428 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3431 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3434 brcmf_dbg(TIMER, "Enter\n");
3436 /* Poll period: check device if appropriate. */
3437 if (!bus->sr_enabled &&
3438 bus->poll && (++bus->polltick >= bus->pollrate)) {
3441 /* Reset poll tick */
3444 /* Check device if no interrupts */
3446 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3448 if (atomic_read(&bus->dpc_tskcnt) == 0) {
3451 sdio_claim_host(bus->sdiodev->func[1]);
3452 devpend = brcmf_sdio_regrb(bus->sdiodev,
3455 sdio_release_host(bus->sdiodev->func[1]);
3457 devpend & (INTR_STATUS_FUNC1 |
3461 /* If there is something, make like the ISR and
3464 bus->sdcnt.pollcnt++;
3465 atomic_set(&bus->ipend, 1);
3467 atomic_inc(&bus->dpc_tskcnt);
3468 queue_work(bus->brcmf_wq, &bus->datawork);
3472 /* Update interrupt tracking */
3473 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3476 /* Poll for console output periodically */
3477 if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3478 bus->console_interval != 0) {
3479 bus->console.count += BRCMF_WD_POLL_MS;
3480 if (bus->console.count >= bus->console_interval) {
3481 bus->console.count -= bus->console_interval;
3482 sdio_claim_host(bus->sdiodev->func[1]);
3483 /* Make sure backplane clock is on */
3484 brcmf_sdbrcm_bus_sleep(bus, false, false);
3485 if (brcmf_sdbrcm_readconsole(bus) < 0)
3487 bus->console_interval = 0;
3488 sdio_release_host(bus->sdiodev->func[1]);
3493 /* On idle timeout clear activity flag and/or turn off clock */
3494 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3495 if (++bus->idlecount >= bus->idletime) {
3497 if (bus->activity) {
3498 bus->activity = false;
3499 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3501 brcmf_dbg(SDIO, "idle\n");
3502 sdio_claim_host(bus->sdiodev->func[1]);
3503 brcmf_sdbrcm_bus_sleep(bus, true, false);
3504 sdio_release_host(bus->sdiodev->func[1]);
3509 return (atomic_read(&bus->ipend) > 0);
3512 static void brcmf_sdio_dataworker(struct work_struct *work)
3514 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3517 while (atomic_read(&bus->dpc_tskcnt)) {
3518 brcmf_sdbrcm_dpc(bus);
3519 atomic_dec(&bus->dpc_tskcnt);
3523 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3525 brcmf_dbg(TRACE, "Enter\n");
3528 bus->rxctl = bus->rxbuf = NULL;
3531 kfree(bus->databuf);
3532 bus->databuf = NULL;
3535 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3537 brcmf_dbg(TRACE, "Enter\n");
3539 if (bus->sdiodev->bus_if->maxctl) {
3541 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3542 ALIGNMENT) + BRCMF_SDALIGN;
3543 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3548 /* Allocate buffer to receive glomed packet */
3549 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3550 if (!(bus->databuf)) {
3551 /* release rxbuf which was already located as above */
3557 /* Align the buffer */
3558 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3559 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3560 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3562 bus->dataptr = bus->databuf;
3571 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3579 bus->alp_only = true;
3581 sdio_claim_host(bus->sdiodev->func[1]);
3583 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3584 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3587 * Force PLL off until brcmf_sdio_chip_attach()
3588 * programs PLL control regs
3591 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3592 BRCMF_INIT_CLKCTL1, &err);
3594 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3595 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3597 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3598 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3599 err, BRCMF_INIT_CLKCTL1, clkctl);
3603 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3604 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3608 if (brcmf_sdbrcm_kso_init(bus)) {
3609 brcmf_err("error enabling KSO\n");
3613 if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3614 drivestrength = bus->sdiodev->pdata->drive_strength;
3616 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3617 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3619 /* Get info on the SOCRAM cores... */
3620 bus->ramsize = bus->ci->ramsize;
3621 if (!(bus->ramsize)) {
3622 brcmf_err("failed to find SOCRAM memory!\n");
3626 /* Set card control so an SDIO card reset does a WLAN backplane reset */
3627 reg_val = brcmf_sdio_regrb(bus->sdiodev,
3628 SDIO_CCCR_BRCM_CARDCTRL, &err);
3632 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3634 brcmf_sdio_regwb(bus->sdiodev,
3635 SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3639 /* set PMUControl so a backplane reset does PMU state reload */
3640 reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3642 reg_val = brcmf_sdio_regrl(bus->sdiodev,
3648 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3650 brcmf_sdio_regwl(bus->sdiodev,
3658 sdio_release_host(bus->sdiodev->func[1]);
3660 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3662 /* Locate an appropriately-aligned portion of hdrbuf */
3663 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3666 /* Set the poll and/or interrupt flags */
3675 sdio_release_host(bus->sdiodev->func[1]);
3679 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3681 brcmf_dbg(TRACE, "Enter\n");
3683 sdio_claim_host(bus->sdiodev->func[1]);
3685 /* Disable F2 to clear any intermediate frame state on the dongle */
3686 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3687 SDIO_FUNC_ENABLE_1, NULL);
3689 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3690 bus->rxflow = false;
3692 /* Done with backplane-dependent accesses, can drop clock... */
3693 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3695 sdio_release_host(bus->sdiodev->func[1]);
3697 /* ...and initialize clock/power states */
3698 bus->clkstate = CLK_SDONLY;
3699 bus->idletime = BRCMF_IDLE_INTERVAL;
3700 bus->idleclock = BRCMF_IDLE_ACTIVE;
3702 /* Query the F2 block size, set roundup accordingly */
3703 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3704 bus->roundup = min(max_roundup, bus->blocksize);
3706 /* bus module does not support packet chaining */
3707 bus->use_rxchain = false;
3708 bus->sd_rxchain = false;
3711 bus->sleeping = false;
3712 bus->sr_enabled = false;
3718 brcmf_sdbrcm_watchdog_thread(void *data)
3720 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3722 allow_signal(SIGTERM);
3723 /* Run until signal received */
3725 if (kthread_should_stop())
3727 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3728 brcmf_sdbrcm_bus_watchdog(bus);
3729 /* Count the tick for reference */
3730 bus->sdcnt.tickcnt++;
3738 brcmf_sdbrcm_watchdog(unsigned long data)
3740 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3742 if (bus->watchdog_tsk) {
3743 complete(&bus->watchdog_wait);
3744 /* Reschedule the watchdog */
3745 if (bus->wd_timer_valid)
3746 mod_timer(&bus->timer,
3747 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3751 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3753 brcmf_dbg(TRACE, "Enter\n");
3756 sdio_claim_host(bus->sdiodev->func[1]);
3757 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3758 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3759 sdio_release_host(bus->sdiodev->func[1]);
3760 brcmf_sdio_chip_detach(&bus->ci);
3761 if (bus->vars && bus->varsz)
3766 brcmf_dbg(TRACE, "Disconnected\n");
3769 /* Detach and free everything */
3770 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3772 brcmf_dbg(TRACE, "Enter\n");
3775 /* De-register interrupt handler */
3776 brcmf_sdio_intr_unregister(bus->sdiodev);
3778 cancel_work_sync(&bus->datawork);
3780 destroy_workqueue(bus->brcmf_wq);
3782 if (bus->sdiodev->bus_if->drvr) {
3783 brcmf_detach(bus->sdiodev->dev);
3784 brcmf_sdbrcm_release_dongle(bus);
3787 brcmf_sdbrcm_release_malloc(bus);
3792 brcmf_dbg(TRACE, "Disconnected\n");
3795 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3796 .stop = brcmf_sdbrcm_bus_stop,
3797 .init = brcmf_sdbrcm_bus_init,
3798 .txdata = brcmf_sdbrcm_bus_txdata,
3799 .txctl = brcmf_sdbrcm_bus_txctl,
3800 .rxctl = brcmf_sdbrcm_bus_rxctl,
3801 .gettxq = brcmf_sdbrcm_bus_gettxq,
3804 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3807 struct brcmf_sdio *bus;
3808 struct brcmf_bus_dcmd *dlst;
3810 u32 dngl_txglomalign;
3813 brcmf_dbg(TRACE, "Enter\n");
3815 /* We make an assumption about address window mappings:
3816 * regsva == SI_ENUM_BASE*/
3818 /* Allocate private bus interface state */
3819 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3823 bus->sdiodev = sdiodev;
3825 skb_queue_head_init(&bus->glom);
3826 bus->txbound = BRCMF_TXBOUND;
3827 bus->rxbound = BRCMF_RXBOUND;
3828 bus->txminmax = BRCMF_TXMINMAX;
3829 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3831 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3832 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3833 if (bus->brcmf_wq == NULL) {
3834 brcmf_err("insufficient memory to create txworkqueue\n");
3838 /* attempt to attach to the dongle */
3839 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3840 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
3844 spin_lock_init(&bus->rxctl_lock);
3845 spin_lock_init(&bus->txqlock);
3846 init_waitqueue_head(&bus->ctrl_wait);
3847 init_waitqueue_head(&bus->dcmd_resp_wait);
3849 /* Set up the watchdog timer */
3850 init_timer(&bus->timer);
3851 bus->timer.data = (unsigned long)bus;
3852 bus->timer.function = brcmf_sdbrcm_watchdog;
3854 /* Initialize watchdog thread */
3855 init_completion(&bus->watchdog_wait);
3856 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3857 bus, "brcmf_watchdog");
3858 if (IS_ERR(bus->watchdog_tsk)) {
3859 pr_warn("brcmf_watchdog thread failed to start\n");
3860 bus->watchdog_tsk = NULL;
3862 /* Initialize DPC thread */
3863 atomic_set(&bus->dpc_tskcnt, 0);
3865 /* Assign bus interface call back */
3866 bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3867 bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3868 bus->sdiodev->bus_if->chip = bus->ci->chip;
3869 bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
3871 /* Attach to the brcmf/OS/network interface */
3872 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
3874 brcmf_err("brcmf_attach failed\n");
3878 /* Allocate buffers */
3879 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3880 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
3884 if (!(brcmf_sdbrcm_probe_init(bus))) {
3885 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
3889 brcmf_sdio_debugfs_create(bus);
3890 brcmf_dbg(INFO, "completed!!\n");
3892 /* sdio bus core specific dcmd */
3893 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3894 dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
3896 if (bus->ci->c_inf[idx].rev < 12) {
3897 /* for sdio core rev < 12, disable txgloming */
3899 dlst->name = "bus:txglom";
3900 dlst->param = (char *)&dngl_txglom;
3901 dlst->param_len = sizeof(u32);
3903 /* otherwise, set txglomalign */
3904 dngl_txglomalign = bus->sdiodev->bus_if->align;
3905 dlst->name = "bus:txglomalign";
3906 dlst->param = (char *)&dngl_txglomalign;
3907 dlst->param_len = sizeof(u32);
3909 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
3912 /* if firmware path present try to download and bring up bus */
3913 ret = brcmf_bus_start(bus->sdiodev->dev);
3915 brcmf_err("dongle is not responding\n");
3922 brcmf_sdbrcm_release(bus);
3926 void brcmf_sdbrcm_disconnect(void *ptr)
3928 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
3930 brcmf_dbg(TRACE, "Enter\n");
3933 brcmf_sdbrcm_release(bus);
3935 brcmf_dbg(TRACE, "Disconnected\n");
3939 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
3941 /* Totally stop the timer */
3942 if (!wdtick && bus->wd_timer_valid) {
3943 del_timer_sync(&bus->timer);
3944 bus->wd_timer_valid = false;
3945 bus->save_ms = wdtick;
3949 /* don't start the wd until fw is loaded */
3950 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
3954 if (bus->save_ms != BRCMF_WD_POLL_MS) {
3955 if (bus->wd_timer_valid)
3956 /* Stop timer and restart at new value */
3957 del_timer_sync(&bus->timer);
3959 /* Create timer again when watchdog period is
3960 dynamically changed or in the first instance
3962 bus->timer.expires =
3963 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
3964 add_timer(&bus->timer);
3967 /* Re arm the timer, at last watchdog period */
3968 mod_timer(&bus->timer,
3969 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3972 bus->wd_timer_valid = true;
3973 bus->save_ms = wdtick;
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