drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_func.h>
  27 #include <linux/mmc/card.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/firmware.h>
  30 #include <linux/module.h>
  31 #include <linux/bcma/bcma.h>
  32 #include <linux/debugfs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/platform_data/brcmfmac-sdio.h>
  35 #include <linux/moduleparam.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio_host.h"
  43 #include "sdio_chip.h"
  44
  45 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  46
  47 #ifdef DEBUG
  48
  49 #define BRCMF_TRAP_INFO_SIZE    80
  50
  51 #define CBUF_LEN        (128)
  52
  53 /* Device console log buffer state */
  54 #define CONSOLE_BUFFER_MAX      2024
  55
  56 struct rte_log_le {
  57         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  58         __le32 buf_size;
  59         __le32 idx;
  60         char *_buf_compat;      /* Redundant pointer for backward compat. */
  61 };
  62
  63 struct rte_console {
  64         /* Virtual UART
  65          * When there is no UART (e.g. Quickturn),
  66          * the host should write a complete
  67          * input line directly into cbuf and then write
  68          * the length into vcons_in.
  69          * This may also be used when there is a real UART
  70          * (at risk of conflicting with
  71          * the real UART).  vcons_out is currently unused.
  72          */
  73         uint vcons_in;
  74         uint vcons_out;
  75
  76         /* Output (logging) buffer
  77          * Console output is written to a ring buffer log_buf at index log_idx.
  78          * The host may read the output when it sees log_idx advance.
  79          * Output will be lost if the output wraps around faster than the host
  80          * polls.
  81          */
  82         struct rte_log_le log_le;
  83
  84         /* Console input line buffer
  85          * Characters are read one at a time into cbuf
  86          * until <CR> is received, then
  87          * the buffer is processed as a command line.
  88          * Also used for virtual UART.
  89          */
  90         uint cbuf_idx;
  91         char cbuf[CBUF_LEN];
  92 };
  93
  94 #endif                          /* DEBUG */
  95 #include <chipcommon.h>
  96
  97 #include "dhd_bus.h"
  98 #include "dhd_dbg.h"
  99 #include "tracepoint.h"
 100
 101 #define TXQLEN          2048    /* bulk tx queue length */
 102 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 103 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 104 #define PRIOMASK        7
 105
 106 #define TXRETRIES       2       /* # of retries for tx frames */
 107
 108 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 109                                  one scheduling */
 110
 111 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 112                                  one scheduling */
 113
 114 #define BRCMF_DEFAULT_TXGLOM_SIZE       32  /* max tx frames in glom chain */
 115
 116 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 117
 118 #define MEMBLOCK        2048    /* Block size used for downloading
 119                                  of dongle image */
 120 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 121                                  biggest possible glom */
 122
 123 #define BRCMF_FIRSTREAD (1 << 6)
 124
 125
 126 /* SBSDIO_DEVICE_CTL */
 127
 128 /* 1: device will assert busy signal when receiving CMD53 */
 129 #define SBSDIO_DEVCTL_SETBUSY           0x01
 130 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 131 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 132 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 133 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 134 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 135  * sdio bus power cycle to clear (rev 9) */
 136 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 137 /* Force SD->SB reset mapping (rev 11) */
 138 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 139 /*   Determined by CoreControl bit */
 140 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 141 /*   Force backplane reset */
 142 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 143 /*   Force no backplane reset */
 144 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 145
 146 /* direct(mapped) cis space */
 147
 148 /* MAPPED common CIS address */
 149 #define SBSDIO_CIS_BASE_COMMON          0x1000
 150 /* maximum bytes in one CIS */
 151 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 152 /* cis offset addr is < 17 bits */
 153 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 154
 155 /* manfid tuple length, include tuple, link bytes */
 156 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 157
 158 /* intstatus */
 159 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 160 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 161 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 162 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 163 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 164 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 165 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 166 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 167 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 168 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 169 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 170 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 171 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 172 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 173 #define I_PC            (1 << 10)       /* descriptor error */
 174 #define I_PD            (1 << 11)       /* data error */
 175 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 176 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 177 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 178 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 179 #define I_RI            (1 << 16)       /* Receive Interrupt */
 180 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 181 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 182 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 183 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 184 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 185 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 186 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 187 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 188 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 189 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 190 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 191 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 192
 193 /* corecontrol */
 194 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 195 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 196 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 197 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 198 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 199 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 200
 201 /* SDA_FRAMECTRL */
 202 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 203 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 204 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 205 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 206
 207 /*
 208  * Software allocation of To SB Mailbox resources
 209  */
 210
 211 /* tosbmailbox bits corresponding to intstatus bits */
 212 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 213 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 214 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 215 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 216
 217 /* tosbmailboxdata */
 218 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 219
 220 /*
 221  * Software allocation of To Host Mailbox resources
 222  */
 223
 224 /* intstatus bits */
 225 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 226 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 227 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 228 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 229
 230 /* tohostmailboxdata */
 231 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 232 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 233 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 234 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 235
 236 #define HMB_DATA_FCDATA_MASK    0xff000000
 237 #define HMB_DATA_FCDATA_SHIFT   24
 238
 239 #define HMB_DATA_VERSION_MASK   0x00ff0000
 240 #define HMB_DATA_VERSION_SHIFT  16
 241
 242 /*
 243  * Software-defined protocol header
 244  */
 245
 246 /* Current protocol version */
 247 #define SDPCM_PROT_VERSION      4
 248
 249 /*
 250  * Shared structure between dongle and the host.
 251  * The structure contains pointers to trap or assert information.
 252  */
 253 #define SDPCM_SHARED_VERSION       0x0003
 254 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 255 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 256 #define SDPCM_SHARED_ASSERT        0x0200
 257 #define SDPCM_SHARED_TRAP          0x0400
 258
 259 /* Space for header read, limit for data packets */
 260 #define MAX_HDR_READ    (1 << 6)
 261 #define MAX_RX_DATASZ   2048
 262
 263 /* Bump up limit on waiting for HT to account for first startup;
 264  * if the image is doing a CRC calculation before programming the PMU
 265  * for HT availability, it could take a couple hundred ms more, so
 266  * max out at a 1 second (1000000us).
 267  */
 268 #undef PMU_MAX_TRANSITION_DLY
 269 #define PMU_MAX_TRANSITION_DLY 1000000
 270
 271 /* Value for ChipClockCSR during initial setup */
 272 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 273                                         SBSDIO_ALP_AVAIL_REQ)
 274
 275 /* Flags for SDH calls */
 276 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 277
 278 #define BRCMF_IDLE_IMMEDIATE    (-1)    /* Enter idle immediately */
 279 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 280                                          * when idle
 281                                          */
 282 #define BRCMF_IDLE_INTERVAL     1
 283
 284 #define KSO_WAIT_US 50
 285 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 286
 287 /*
 288  * Conversion of 802.1D priority to precedence level
 289  */
 290 static uint prio2prec(u32 prio)
 291 {
 292         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 293                (prio^2) : prio;
 294 }
 295
 296 #ifdef DEBUG
 297 /* Device console log buffer state */
 298 struct brcmf_console {
 299         uint count;             /* Poll interval msec counter */
 300         uint log_addr;          /* Log struct address (fixed) */
 301         struct rte_log_le log_le;       /* Log struct (host copy) */
 302         uint bufsize;           /* Size of log buffer */
 303         u8 *buf;                /* Log buffer (host copy) */
 304         uint last;              /* Last buffer read index */
 305 };
 306
 307 struct brcmf_trap_info {
 308         __le32          type;
 309         __le32          epc;
 310         __le32          cpsr;
 311         __le32          spsr;
 312         __le32          r0;     /* a1 */
 313         __le32          r1;     /* a2 */
 314         __le32          r2;     /* a3 */
 315         __le32          r3;     /* a4 */
 316         __le32          r4;     /* v1 */
 317         __le32          r5;     /* v2 */
 318         __le32          r6;     /* v3 */
 319         __le32          r7;     /* v4 */
 320         __le32          r8;     /* v5 */
 321         __le32          r9;     /* sb/v6 */
 322         __le32          r10;    /* sl/v7 */
 323         __le32          r11;    /* fp/v8 */
 324         __le32          r12;    /* ip */
 325         __le32          r13;    /* sp */
 326         __le32          r14;    /* lr */
 327         __le32          pc;     /* r15 */
 328 };
 329 #endif                          /* DEBUG */
 330
 331 struct sdpcm_shared {
 332         u32 flags;
 333         u32 trap_addr;
 334         u32 assert_exp_addr;
 335         u32 assert_file_addr;
 336         u32 assert_line;
 337         u32 console_addr;       /* Address of struct rte_console */
 338         u32 msgtrace_addr;
 339         u8 tag[32];
 340         u32 brpt_addr;
 341 };
 342
 343 struct sdpcm_shared_le {
 344         __le32 flags;
 345         __le32 trap_addr;
 346         __le32 assert_exp_addr;
 347         __le32 assert_file_addr;
 348         __le32 assert_line;
 349         __le32 console_addr;    /* Address of struct rte_console */
 350         __le32 msgtrace_addr;
 351         u8 tag[32];
 352         __le32 brpt_addr;
 353 };
 354
 355 /* dongle SDIO bus specific header info */
 356 struct brcmf_sdio_hdrinfo {
 357         u8 seq_num;
 358         u8 channel;
 359         u16 len;
 360         u16 len_left;
 361         u16 len_nxtfrm;
 362         u8 dat_offset;
 363         bool lastfrm;
 364         u16 tail_pad;
 365 };
 366
 367 /* misc chip info needed by some of the routines */
 368 /* Private data for SDIO bus interaction */
 369 struct brcmf_sdio {
 370         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 371         struct chip_info *ci;   /* Chip info struct */
 372         char *vars;             /* Variables (from CIS and/or other) */
 373         uint varsz;             /* Size of variables buffer */
 374
 375         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 376
 377         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 378         atomic_t intstatus;     /* Intstatus bits (events) pending */
 379         atomic_t fcstate;       /* State of dongle flow-control */
 380
 381         uint blocksize;         /* Block size of SDIO transfers */
 382         uint roundup;           /* Max roundup limit */
 383
 384         struct pktq txq;        /* Queue length used for flow-control */
 385         u8 flowcontrol; /* per prio flow control bitmask */
 386         u8 tx_seq;              /* Transmit sequence number (next) */
 387         u8 tx_max;              /* Maximum transmit sequence allowed */
 388
 389         u8 *hdrbuf;             /* buffer for handling rx frame */
 390         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 391         u8 rx_seq;              /* Receive sequence number (expected) */
 392         struct brcmf_sdio_hdrinfo cur_read;
 393                                 /* info of current read frame */
 394         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 395         bool rxpending;         /* Data frame pending in dongle */
 396
 397         uint rxbound;           /* Rx frames to read before resched */
 398         uint txbound;           /* Tx frames to send before resched */
 399         uint txminmax;
 400
 401         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 402         struct sk_buff_head glom; /* Packet list for glommed superframe */
 403         uint glomerr;           /* Glom packet read errors */
 404
 405         u8 *rxbuf;              /* Buffer for receiving control packets */
 406         uint rxblen;            /* Allocated length of rxbuf */
 407         u8 *rxctl;              /* Aligned pointer into rxbuf */
 408         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 409         uint rxlen;             /* Length of valid data in buffer */
 410         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 411
 412         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 413
 414         bool intr;              /* Use interrupts */
 415         bool poll;              /* Use polling */
 416         atomic_t ipend;         /* Device interrupt is pending */
 417         uint spurious;          /* Count of spurious interrupts */
 418         uint pollrate;          /* Ticks between device polls */
 419         uint polltick;          /* Tick counter */
 420
 421 #ifdef DEBUG
 422         uint console_interval;
 423         struct brcmf_console console;   /* Console output polling support */
 424         uint console_addr;      /* Console address from shared struct */
 425 #endif                          /* DEBUG */
 426
 427         uint clkstate;          /* State of sd and backplane clock(s) */
 428         bool activity;          /* Activity flag for clock down */
 429         s32 idletime;           /* Control for activity timeout */
 430         s32 idlecount;  /* Activity timeout counter */
 431         s32 idleclock;  /* How to set bus driver when idle */
 432         bool rxflow_mode;       /* Rx flow control mode */
 433         bool rxflow;            /* Is rx flow control on */
 434         bool alp_only;          /* Don't use HT clock (ALP only) */
 435
 436         u8 *ctrl_frame_buf;
 437         u32 ctrl_frame_len;
 438         bool ctrl_frame_stat;
 439
 440         spinlock_t txqlock;
 441         wait_queue_head_t ctrl_wait;
 442         wait_queue_head_t dcmd_resp_wait;
 443
 444         struct timer_list timer;
 445         struct completion watchdog_wait;
 446         struct task_struct *watchdog_tsk;
 447         bool wd_timer_valid;
 448         uint save_ms;
 449
 450         struct workqueue_struct *brcmf_wq;
 451         struct work_struct datawork;
 452         atomic_t dpc_tskcnt;
 453
 454         bool txoff;             /* Transmit flow-controlled */
 455         struct brcmf_sdio_count sdcnt;
 456         bool sr_enabled; /* SaveRestore enabled */
 457         bool sleeping; /* SDIO bus sleeping */
 458
 459         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 460         bool txglom;            /* host tx glomming enable flag */
 461         struct sk_buff *txglom_sgpad;   /* scatter-gather padding buffer */
 462         u16 head_align;         /* buffer pointer alignment */
 463         u16 sgentry_align;      /* scatter-gather buffer alignment */
 464 };
 465
 466 /* clkstate */
 467 #define CLK_NONE        0
 468 #define CLK_SDONLY      1
 469 #define CLK_PENDING     2
 470 #define CLK_AVAIL       3
 471
 472 #ifdef DEBUG
 473 static int qcount[NUMPRIO];
 474 #endif                          /* DEBUG */
 475
 476 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 477
 478 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 479
 480 /* Retry count for register access failures */
 481 static const uint retry_limit = 2;
 482
 483 /* Limit on rounding up frames */
 484 static const uint max_roundup = 512;
 485
 486 #define ALIGNMENT  4
 487
 488 static int brcmf_sdio_txglomsz = BRCMF_DEFAULT_TXGLOM_SIZE;
 489 module_param_named(txglomsz, brcmf_sdio_txglomsz, int, 0);
 490 MODULE_PARM_DESC(txglomsz, "maximum tx packet chain size [SDIO]");
 491
 492 enum brcmf_sdio_frmtype {
 493         BRCMF_SDIO_FT_NORMAL,
 494         BRCMF_SDIO_FT_SUPER,
 495         BRCMF_SDIO_FT_SUB,
 496 };
 497
 498 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 499 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 500 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 501 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 502 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 503 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 504 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 505 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 506 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 507 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 508 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 509 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 510 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 511 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 512 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 513 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 514
 515 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 516 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 517 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 518 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 519 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 520 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 521 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 522 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 523 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 524 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 525 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 526 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 527 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 528 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 529 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 530 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 531
 532 struct brcmf_firmware_names {
 533         u32 chipid;
 534         u32 revmsk;
 535         const char *bin;
 536         const char *nv;
 537 };
 538
 539 enum brcmf_firmware_type {
 540         BRCMF_FIRMWARE_BIN,
 541         BRCMF_FIRMWARE_NVRAM
 542 };
 543
 544 #define BRCMF_FIRMWARE_NVRAM(name) \
 545         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 546
 547 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 548         { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 549         { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 550         { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 551         { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 552         { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 553         { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 554         { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 555         { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) }
 556 };
 557
 558
 559 static const struct firmware *brcmf_sdbrcm_get_fw(struct brcmf_sdio *bus,
 560                                                   enum brcmf_firmware_type type)
 561 {
 562         const struct firmware *fw;
 563         const char *name;
 564         int err, i;
 565
 566         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 567                 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
 568                     brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
 569                         switch (type) {
 570                         case BRCMF_FIRMWARE_BIN:
 571                                 name = brcmf_fwname_data[i].bin;
 572                                 break;
 573                         case BRCMF_FIRMWARE_NVRAM:
 574                                 name = brcmf_fwname_data[i].nv;
 575                                 break;
 576                         default:
 577                                 brcmf_err("invalid firmware type (%d)\n", type);
 578                                 return NULL;
 579                         }
 580                         goto found;
 581                 }
 582         }
 583         brcmf_err("Unknown chipid %d [%d]\n",
 584                   bus->ci->chip, bus->ci->chiprev);
 585         return NULL;
 586
 587 found:
 588         err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
 589         if ((err) || (!fw)) {
 590                 brcmf_err("fail to request firmware %s (%d)\n", name, err);
 591                 return NULL;
 592         }
 593
 594         return fw;
 595 }
 596
 597 static void pkt_align(struct sk_buff *p, int len, int align)
 598 {
 599         uint datalign;
 600         datalign = (unsigned long)(p->data);
 601         datalign = roundup(datalign, (align)) - datalign;
 602         if (datalign)
 603                 skb_pull(p, datalign);
 604         __skb_trim(p, len);
 605 }
 606
 607 /* To check if there's window offered */
 608 static bool data_ok(struct brcmf_sdio *bus)
 609 {
 610         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 611                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 612 }
 613
 614 /*
 615  * Reads a register in the SDIO hardware block. This block occupies a series of
 616  * adresses on the 32 bit backplane bus.
 617  */
 618 static int
 619 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 620 {
 621         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 622         int ret;
 623
 624         *regvar = brcmf_sdiod_regrl(bus->sdiodev,
 625                                     bus->ci->c_inf[idx].base + offset, &ret);
 626
 627         return ret;
 628 }
 629
 630 static int
 631 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 632 {
 633         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 634         int ret;
 635
 636         brcmf_sdiod_regwl(bus->sdiodev,
 637                           bus->ci->c_inf[idx].base + reg_offset,
 638                           regval, &ret);
 639
 640         return ret;
 641 }
 642
 643 static int
 644 brcmf_sdbrcm_kso_control(struct brcmf_sdio *bus, bool on)
 645 {
 646         u8 wr_val = 0, rd_val, cmp_val, bmask;
 647         int err = 0;
 648         int try_cnt = 0;
 649
 650         brcmf_dbg(TRACE, "Enter\n");
 651
 652         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 653         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 654         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 655                           wr_val, &err);
 656         if (err) {
 657                 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
 658                 return err;
 659         }
 660
 661         if (on) {
 662                 /* device WAKEUP through KSO:
 663                  * write bit 0 & read back until
 664                  * both bits 0 (kso bit) & 1 (dev on status) are set
 665                  */
 666                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 667                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 668                 bmask = cmp_val;
 669                 usleep_range(2000, 3000);
 670         } else {
 671                 /* Put device to sleep, turn off KSO */
 672                 cmp_val = 0;
 673                 /* only check for bit0, bit1(dev on status) may not
 674                  * get cleared right away
 675                  */
 676                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 677         }
 678
 679         do {
 680                 /* reliable KSO bit set/clr:
 681                  * the sdiod sleep write access is synced to PMU 32khz clk
 682                  * just one write attempt may fail,
 683                  * read it back until it matches written value
 684                  */
 685                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 686                                            &err);
 687                 if (((rd_val & bmask) == cmp_val) && !err)
 688                         break;
 689                 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
 690                           try_cnt, MAX_KSO_ATTEMPTS, err);
 691                 udelay(KSO_WAIT_US);
 692                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 693                                   wr_val, &err);
 694         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 695
 696         return err;
 697 }
 698
 699 #define PKT_AVAILABLE()         (intstatus & I_HMB_FRAME_IND)
 700
 701 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 702
 703 /* Turn backplane clock on or off */
 704 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 705 {
 706         int err;
 707         u8 clkctl, clkreq, devctl;
 708         unsigned long timeout;
 709
 710         brcmf_dbg(SDIO, "Enter\n");
 711
 712         clkctl = 0;
 713
 714         if (bus->sr_enabled) {
 715                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 716                 return 0;
 717         }
 718
 719         if (on) {
 720                 /* Request HT Avail */
 721                 clkreq =
 722                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 723
 724                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 725                                   clkreq, &err);
 726                 if (err) {
 727                         brcmf_err("HT Avail request error: %d\n", err);
 728                         return -EBADE;
 729                 }
 730
 731                 /* Check current status */
 732                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 733                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 734                 if (err) {
 735                         brcmf_err("HT Avail read error: %d\n", err);
 736                         return -EBADE;
 737                 }
 738
 739                 /* Go to pending and await interrupt if appropriate */
 740                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 741                         /* Allow only clock-available interrupt */
 742                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 743                                                    SBSDIO_DEVICE_CTL, &err);
 744                         if (err) {
 745                                 brcmf_err("Devctl error setting CA: %d\n",
 746                                           err);
 747                                 return -EBADE;
 748                         }
 749
 750                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 751                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 752                                           devctl, &err);
 753                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 754                         bus->clkstate = CLK_PENDING;
 755
 756                         return 0;
 757                 } else if (bus->clkstate == CLK_PENDING) {
 758                         /* Cancel CA-only interrupt filter */
 759                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 760                                                    SBSDIO_DEVICE_CTL, &err);
 761                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 762                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 763                                           devctl, &err);
 764                 }
 765
 766                 /* Otherwise, wait here (polling) for HT Avail */
 767                 timeout = jiffies +
 768                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 769                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 770                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 771                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 772                                                    &err);
 773                         if (time_after(jiffies, timeout))
 774                                 break;
 775                         else
 776                                 usleep_range(5000, 10000);
 777                 }
 778                 if (err) {
 779                         brcmf_err("HT Avail request error: %d\n", err);
 780                         return -EBADE;
 781                 }
 782                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 783                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 784                                   PMU_MAX_TRANSITION_DLY, clkctl);
 785                         return -EBADE;
 786                 }
 787
 788                 /* Mark clock available */
 789                 bus->clkstate = CLK_AVAIL;
 790                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 791
 792 #if defined(DEBUG)
 793                 if (!bus->alp_only) {
 794                         if (SBSDIO_ALPONLY(clkctl))
 795                                 brcmf_err("HT Clock should be on\n");
 796                 }
 797 #endif                          /* defined (DEBUG) */
 798
 799                 bus->activity = true;
 800         } else {
 801                 clkreq = 0;
 802
 803                 if (bus->clkstate == CLK_PENDING) {
 804                         /* Cancel CA-only interrupt filter */
 805                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 806                                                    SBSDIO_DEVICE_CTL, &err);
 807                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 808                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 809                                           devctl, &err);
 810                 }
 811
 812                 bus->clkstate = CLK_SDONLY;
 813                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 814                                   clkreq, &err);
 815                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 816                 if (err) {
 817                         brcmf_err("Failed access turning clock off: %d\n",
 818                                   err);
 819                         return -EBADE;
 820                 }
 821         }
 822         return 0;
 823 }
 824
 825 /* Change idle/active SD state */
 826 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
 827 {
 828         brcmf_dbg(SDIO, "Enter\n");
 829
 830         if (on)
 831                 bus->clkstate = CLK_SDONLY;
 832         else
 833                 bus->clkstate = CLK_NONE;
 834
 835         return 0;
 836 }
 837
 838 /* Transition SD and backplane clock readiness */
 839 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 840 {
 841 #ifdef DEBUG
 842         uint oldstate = bus->clkstate;
 843 #endif                          /* DEBUG */
 844
 845         brcmf_dbg(SDIO, "Enter\n");
 846
 847         /* Early exit if we're already there */
 848         if (bus->clkstate == target) {
 849                 if (target == CLK_AVAIL) {
 850                         brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
 851                         bus->activity = true;
 852                 }
 853                 return 0;
 854         }
 855
 856         switch (target) {
 857         case CLK_AVAIL:
 858                 /* Make sure SD clock is available */
 859                 if (bus->clkstate == CLK_NONE)
 860                         brcmf_sdbrcm_sdclk(bus, true);
 861                 /* Now request HT Avail on the backplane */
 862                 brcmf_sdbrcm_htclk(bus, true, pendok);
 863                 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
 864                 bus->activity = true;
 865                 break;
 866
 867         case CLK_SDONLY:
 868                 /* Remove HT request, or bring up SD clock */
 869                 if (bus->clkstate == CLK_NONE)
 870                         brcmf_sdbrcm_sdclk(bus, true);
 871                 else if (bus->clkstate == CLK_AVAIL)
 872                         brcmf_sdbrcm_htclk(bus, false, false);
 873                 else
 874                         brcmf_err("request for %d -> %d\n",
 875                                   bus->clkstate, target);
 876                 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
 877                 break;
 878
 879         case CLK_NONE:
 880                 /* Make sure to remove HT request */
 881                 if (bus->clkstate == CLK_AVAIL)
 882                         brcmf_sdbrcm_htclk(bus, false, false);
 883                 /* Now remove the SD clock */
 884                 brcmf_sdbrcm_sdclk(bus, false);
 885                 brcmf_sdbrcm_wd_timer(bus, 0);
 886                 break;
 887         }
 888 #ifdef DEBUG
 889         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 890 #endif                          /* DEBUG */
 891
 892         return 0;
 893 }
 894
 895 static int
 896 brcmf_sdbrcm_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 897 {
 898         int err = 0;
 899         brcmf_dbg(TRACE, "Enter\n");
 900         brcmf_dbg(SDIO, "request %s currently %s\n",
 901                   (sleep ? "SLEEP" : "WAKE"),
 902                   (bus->sleeping ? "SLEEP" : "WAKE"));
 903
 904         /* If SR is enabled control bus state with KSO */
 905         if (bus->sr_enabled) {
 906                 /* Done if we're already in the requested state */
 907                 if (sleep == bus->sleeping)
 908                         goto end;
 909
 910                 /* Going to sleep */
 911                 if (sleep) {
 912                         /* Don't sleep if something is pending */
 913                         if (atomic_read(&bus->intstatus) ||
 914                             atomic_read(&bus->ipend) > 0 ||
 915                             (!atomic_read(&bus->fcstate) &&
 916                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
 917                             data_ok(bus)))
 918                                  return -EBUSY;
 919                         err = brcmf_sdbrcm_kso_control(bus, false);
 920                         /* disable watchdog */
 921                         if (!err)
 922                                 brcmf_sdbrcm_wd_timer(bus, 0);
 923                 } else {
 924                         bus->idlecount = 0;
 925                         err = brcmf_sdbrcm_kso_control(bus, true);
 926                 }
 927                 if (!err) {
 928                         /* Change state */
 929                         bus->sleeping = sleep;
 930                         brcmf_dbg(SDIO, "new state %s\n",
 931                                   (sleep ? "SLEEP" : "WAKE"));
 932                 } else {
 933                         brcmf_err("error while changing bus sleep state %d\n",
 934                                   err);
 935                         return err;
 936                 }
 937         }
 938
 939 end:
 940         /* control clocks */
 941         if (sleep) {
 942                 if (!bus->sr_enabled)
 943                         brcmf_sdbrcm_clkctl(bus, CLK_NONE, pendok);
 944         } else {
 945                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, pendok);
 946         }
 947
 948         return err;
 949
 950 }
 951
 952 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
 953 {
 954         u32 intstatus = 0;
 955         u32 hmb_data;
 956         u8 fcbits;
 957         int ret;
 958
 959         brcmf_dbg(SDIO, "Enter\n");
 960
 961         /* Read mailbox data and ack that we did so */
 962         ret = r_sdreg32(bus, &hmb_data,
 963                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
 964
 965         if (ret == 0)
 966                 w_sdreg32(bus, SMB_INT_ACK,
 967                           offsetof(struct sdpcmd_regs, tosbmailbox));
 968         bus->sdcnt.f1regdata += 2;
 969
 970         /* Dongle recomposed rx frames, accept them again */
 971         if (hmb_data & HMB_DATA_NAKHANDLED) {
 972                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
 973                           bus->rx_seq);
 974                 if (!bus->rxskip)
 975                         brcmf_err("unexpected NAKHANDLED!\n");
 976
 977                 bus->rxskip = false;
 978                 intstatus |= I_HMB_FRAME_IND;
 979         }
 980
 981         /*
 982          * DEVREADY does not occur with gSPI.
 983          */
 984         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
 985                 bus->sdpcm_ver =
 986                     (hmb_data & HMB_DATA_VERSION_MASK) >>
 987                     HMB_DATA_VERSION_SHIFT;
 988                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
 989                         brcmf_err("Version mismatch, dongle reports %d, "
 990                                   "expecting %d\n",
 991                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
 992                 else
 993                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
 994                                   bus->sdpcm_ver);
 995         }
 996
 997         /*
 998          * Flow Control has been moved into the RX headers and this out of band
 999          * method isn't used any more.
1000          * remaining backward compatible with older dongles.
1001          */
1002         if (hmb_data & HMB_DATA_FC) {
1003                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1004                                                         HMB_DATA_FCDATA_SHIFT;
1005
1006                 if (fcbits & ~bus->flowcontrol)
1007                         bus->sdcnt.fc_xoff++;
1008
1009                 if (bus->flowcontrol & ~fcbits)
1010                         bus->sdcnt.fc_xon++;
1011
1012                 bus->sdcnt.fc_rcvd++;
1013                 bus->flowcontrol = fcbits;
1014         }
1015
1016         /* Shouldn't be any others */
1017         if (hmb_data & ~(HMB_DATA_DEVREADY |
1018                          HMB_DATA_NAKHANDLED |
1019                          HMB_DATA_FC |
1020                          HMB_DATA_FWREADY |
1021                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1022                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1023                           hmb_data);
1024
1025         return intstatus;
1026 }
1027
1028 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1029 {
1030         uint retries = 0;
1031         u16 lastrbc;
1032         u8 hi, lo;
1033         int err;
1034
1035         brcmf_err("%sterminate frame%s\n",
1036                   abort ? "abort command, " : "",
1037                   rtx ? ", send NAK" : "");
1038
1039         if (abort)
1040                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1041
1042         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1043                           SFC_RF_TERM, &err);
1044         bus->sdcnt.f1regdata++;
1045
1046         /* Wait until the packet has been flushed (device/FIFO stable) */
1047         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1048                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1049                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1050                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1051                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1052                 bus->sdcnt.f1regdata += 2;
1053
1054                 if ((hi == 0) && (lo == 0))
1055                         break;
1056
1057                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1058                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1059                                   lastrbc, (hi << 8) + lo);
1060                 }
1061                 lastrbc = (hi << 8) + lo;
1062         }
1063
1064         if (!retries)
1065                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1066         else
1067                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1068
1069         if (rtx) {
1070                 bus->sdcnt.rxrtx++;
1071                 err = w_sdreg32(bus, SMB_NAK,
1072                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1073
1074                 bus->sdcnt.f1regdata++;
1075                 if (err == 0)
1076                         bus->rxskip = true;
1077         }
1078
1079         /* Clear partial in any case */
1080         bus->cur_read.len = 0;
1081
1082         /* If we can't reach the device, signal failure */
1083         if (err)
1084                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1085 }
1086
1087 /* return total length of buffer chain */
1088 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1089 {
1090         struct sk_buff *p;
1091         uint total;
1092
1093         total = 0;
1094         skb_queue_walk(&bus->glom, p)
1095                 total += p->len;
1096         return total;
1097 }
1098
1099 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1100 {
1101         struct sk_buff *cur, *next;
1102
1103         skb_queue_walk_safe(&bus->glom, cur, next) {
1104                 skb_unlink(cur, &bus->glom);
1105                 brcmu_pkt_buf_free_skb(cur);
1106         }
1107 }
1108
1109 /**
1110  * brcmfmac sdio bus specific header
1111  * This is the lowest layer header wrapped on the packets transmitted between
1112  * host and WiFi dongle which contains information needed for SDIO core and
1113  * firmware
1114  *
1115  * It consists of 3 parts: hardware header, hardware extension header and
1116  * software header
1117  * hardware header (frame tag) - 4 bytes
1118  * Byte 0~1: Frame length
1119  * Byte 2~3: Checksum, bit-wise inverse of frame length
1120  * hardware extension header - 8 bytes
1121  * Tx glom mode only, N/A for Rx or normal Tx
1122  * Byte 0~1: Packet length excluding hw frame tag
1123  * Byte 2: Reserved
1124  * Byte 3: Frame flags, bit 0: last frame indication
1125  * Byte 4~5: Reserved
1126  * Byte 6~7: Tail padding length
1127  * software header - 8 bytes
1128  * Byte 0: Rx/Tx sequence number
1129  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1130  * Byte 2: Length of next data frame, reserved for Tx
1131  * Byte 3: Data offset
1132  * Byte 4: Flow control bits, reserved for Tx
1133  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1134  * Byte 6~7: Reserved
1135  */
1136 #define SDPCM_HWHDR_LEN                 4
1137 #define SDPCM_HWEXT_LEN                 8
1138 #define SDPCM_SWHDR_LEN                 8
1139 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1140 /* software header */
1141 #define SDPCM_SEQ_MASK                  0x000000ff
1142 #define SDPCM_SEQ_WRAP                  256
1143 #define SDPCM_CHANNEL_MASK              0x00000f00
1144 #define SDPCM_CHANNEL_SHIFT             8
1145 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1146 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1147 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1148 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1149 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1150 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1151 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1152 #define SDPCM_NEXTLEN_SHIFT             16
1153 #define SDPCM_DOFFSET_MASK              0xff000000
1154 #define SDPCM_DOFFSET_SHIFT             24
1155 #define SDPCM_FCMASK_MASK               0x000000ff
1156 #define SDPCM_WINDOW_MASK               0x0000ff00
1157 #define SDPCM_WINDOW_SHIFT              8
1158
1159 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1160 {
1161         u32 hdrvalue;
1162         hdrvalue = *(u32 *)swheader;
1163         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1164 }
1165
1166 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1167                               struct brcmf_sdio_hdrinfo *rd,
1168                               enum brcmf_sdio_frmtype type)
1169 {
1170         u16 len, checksum;
1171         u8 rx_seq, fc, tx_seq_max;
1172         u32 swheader;
1173
1174         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1175
1176         /* hw header */
1177         len = get_unaligned_le16(header);
1178         checksum = get_unaligned_le16(header + sizeof(u16));
1179         /* All zero means no more to read */
1180         if (!(len | checksum)) {
1181                 bus->rxpending = false;
1182                 return -ENODATA;
1183         }
1184         if ((u16)(~(len ^ checksum))) {
1185                 brcmf_err("HW header checksum error\n");
1186                 bus->sdcnt.rx_badhdr++;
1187                 brcmf_sdbrcm_rxfail(bus, false, false);
1188                 return -EIO;
1189         }
1190         if (len < SDPCM_HDRLEN) {
1191                 brcmf_err("HW header length error\n");
1192                 return -EPROTO;
1193         }
1194         if (type == BRCMF_SDIO_FT_SUPER &&
1195             (roundup(len, bus->blocksize) != rd->len)) {
1196                 brcmf_err("HW superframe header length error\n");
1197                 return -EPROTO;
1198         }
1199         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1200                 brcmf_err("HW subframe header length error\n");
1201                 return -EPROTO;
1202         }
1203         rd->len = len;
1204
1205         /* software header */
1206         header += SDPCM_HWHDR_LEN;
1207         swheader = le32_to_cpu(*(__le32 *)header);
1208         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1209                 brcmf_err("Glom descriptor found in superframe head\n");
1210                 rd->len = 0;
1211                 return -EINVAL;
1212         }
1213         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1214         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1215         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1216             type != BRCMF_SDIO_FT_SUPER) {
1217                 brcmf_err("HW header length too long\n");
1218                 bus->sdcnt.rx_toolong++;
1219                 brcmf_sdbrcm_rxfail(bus, false, false);
1220                 rd->len = 0;
1221                 return -EPROTO;
1222         }
1223         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1224                 brcmf_err("Wrong channel for superframe\n");
1225                 rd->len = 0;
1226                 return -EINVAL;
1227         }
1228         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1229             rd->channel != SDPCM_EVENT_CHANNEL) {
1230                 brcmf_err("Wrong channel for subframe\n");
1231                 rd->len = 0;
1232                 return -EINVAL;
1233         }
1234         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1235         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1236                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1237                 bus->sdcnt.rx_badhdr++;
1238                 brcmf_sdbrcm_rxfail(bus, false, false);
1239                 rd->len = 0;
1240                 return -ENXIO;
1241         }
1242         if (rd->seq_num != rx_seq) {
1243                 brcmf_err("seq %d: sequence number error, expect %d\n",
1244                           rx_seq, rd->seq_num);
1245                 bus->sdcnt.rx_badseq++;
1246                 rd->seq_num = rx_seq;
1247         }
1248         /* no need to check the reset for subframe */
1249         if (type == BRCMF_SDIO_FT_SUB)
1250                 return 0;
1251         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1252         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1253                 /* only warm for NON glom packet */
1254                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1255                         brcmf_err("seq %d: next length error\n", rx_seq);
1256                 rd->len_nxtfrm = 0;
1257         }
1258         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1259         fc = swheader & SDPCM_FCMASK_MASK;
1260         if (bus->flowcontrol != fc) {
1261                 if (~bus->flowcontrol & fc)
1262                         bus->sdcnt.fc_xoff++;
1263                 if (bus->flowcontrol & ~fc)
1264                         bus->sdcnt.fc_xon++;
1265                 bus->sdcnt.fc_rcvd++;
1266                 bus->flowcontrol = fc;
1267         }
1268         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1269         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1270                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1271                 tx_seq_max = bus->tx_seq + 2;
1272         }
1273         bus->tx_max = tx_seq_max;
1274
1275         return 0;
1276 }
1277
1278 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1279 {
1280         *(__le16 *)header = cpu_to_le16(frm_length);
1281         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1282 }
1283
1284 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1285                               struct brcmf_sdio_hdrinfo *hd_info)
1286 {
1287         u32 hdrval;
1288         u8 hdr_offset;
1289
1290         brcmf_sdio_update_hwhdr(header, hd_info->len);
1291         hdr_offset = SDPCM_HWHDR_LEN;
1292
1293         if (bus->txglom) {
1294                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1295                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1296                 hdrval = (u16)hd_info->tail_pad << 16;
1297                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1298                 hdr_offset += SDPCM_HWEXT_LEN;
1299         }
1300
1301         hdrval = hd_info->seq_num;
1302         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1303                   SDPCM_CHANNEL_MASK;
1304         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1305                   SDPCM_DOFFSET_MASK;
1306         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1307         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1308         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1309 }
1310
1311 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1312 {
1313         u16 dlen, totlen;
1314         u8 *dptr, num = 0;
1315         u16 sublen;
1316         struct sk_buff *pfirst, *pnext;
1317
1318         int errcode;
1319         u8 doff, sfdoff;
1320
1321         struct brcmf_sdio_hdrinfo rd_new;
1322
1323         /* If packets, issue read(s) and send up packet chain */
1324         /* Return sequence numbers consumed? */
1325
1326         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1327                   bus->glomd, skb_peek(&bus->glom));
1328
1329         /* If there's a descriptor, generate the packet chain */
1330         if (bus->glomd) {
1331                 pfirst = pnext = NULL;
1332                 dlen = (u16) (bus->glomd->len);
1333                 dptr = bus->glomd->data;
1334                 if (!dlen || (dlen & 1)) {
1335                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1336                                   dlen);
1337                         dlen = 0;
1338                 }
1339
1340                 for (totlen = num = 0; dlen; num++) {
1341                         /* Get (and move past) next length */
1342                         sublen = get_unaligned_le16(dptr);
1343                         dlen -= sizeof(u16);
1344                         dptr += sizeof(u16);
1345                         if ((sublen < SDPCM_HDRLEN) ||
1346                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1347                                 brcmf_err("descriptor len %d bad: %d\n",
1348                                           num, sublen);
1349                                 pnext = NULL;
1350                                 break;
1351                         }
1352                         if (sublen % bus->sgentry_align) {
1353                                 brcmf_err("sublen %d not multiple of %d\n",
1354                                           sublen, bus->sgentry_align);
1355                         }
1356                         totlen += sublen;
1357
1358                         /* For last frame, adjust read len so total
1359                                  is a block multiple */
1360                         if (!dlen) {
1361                                 sublen +=
1362                                     (roundup(totlen, bus->blocksize) - totlen);
1363                                 totlen = roundup(totlen, bus->blocksize);
1364                         }
1365
1366                         /* Allocate/chain packet for next subframe */
1367                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1368                         if (pnext == NULL) {
1369                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1370                                           num, sublen);
1371                                 break;
1372                         }
1373                         skb_queue_tail(&bus->glom, pnext);
1374
1375                         /* Adhere to start alignment requirements */
1376                         pkt_align(pnext, sublen, bus->sgentry_align);
1377                 }
1378
1379                 /* If all allocations succeeded, save packet chain
1380                          in bus structure */
1381                 if (pnext) {
1382                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1383                                   totlen, num);
1384                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1385                             totlen != bus->cur_read.len) {
1386                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1387                                           bus->cur_read.len, totlen, rxseq);
1388                         }
1389                         pfirst = pnext = NULL;
1390                 } else {
1391                         brcmf_sdbrcm_free_glom(bus);
1392                         num = 0;
1393                 }
1394
1395                 /* Done with descriptor packet */
1396                 brcmu_pkt_buf_free_skb(bus->glomd);
1397                 bus->glomd = NULL;
1398                 bus->cur_read.len = 0;
1399         }
1400
1401         /* Ok -- either we just generated a packet chain,
1402                  or had one from before */
1403         if (!skb_queue_empty(&bus->glom)) {
1404                 if (BRCMF_GLOM_ON()) {
1405                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1406                         skb_queue_walk(&bus->glom, pnext) {
1407                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1408                                           pnext, (u8 *) (pnext->data),
1409                                           pnext->len, pnext->len);
1410                         }
1411                 }
1412
1413                 pfirst = skb_peek(&bus->glom);
1414                 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1415
1416                 /* Do an SDIO read for the superframe.  Configurable iovar to
1417                  * read directly into the chained packet, or allocate a large
1418                  * packet and and copy into the chain.
1419                  */
1420                 sdio_claim_host(bus->sdiodev->func[1]);
1421                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1422                                                  bus->sdiodev->sbwad,
1423                                                  SDIO_FUNC_2, F2SYNC,
1424                                                  &bus->glom, dlen);
1425                 sdio_release_host(bus->sdiodev->func[1]);
1426                 bus->sdcnt.f2rxdata++;
1427
1428                 /* On failure, kill the superframe, allow a couple retries */
1429                 if (errcode < 0) {
1430                         brcmf_err("glom read of %d bytes failed: %d\n",
1431                                   dlen, errcode);
1432
1433                         sdio_claim_host(bus->sdiodev->func[1]);
1434                         if (bus->glomerr++ < 3) {
1435                                 brcmf_sdbrcm_rxfail(bus, true, true);
1436                         } else {
1437                                 bus->glomerr = 0;
1438                                 brcmf_sdbrcm_rxfail(bus, true, false);
1439                                 bus->sdcnt.rxglomfail++;
1440                                 brcmf_sdbrcm_free_glom(bus);
1441                         }
1442                         sdio_release_host(bus->sdiodev->func[1]);
1443                         return 0;
1444                 }
1445
1446                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1447                                    pfirst->data, min_t(int, pfirst->len, 48),
1448                                    "SUPERFRAME:\n");
1449
1450                 rd_new.seq_num = rxseq;
1451                 rd_new.len = dlen;
1452                 sdio_claim_host(bus->sdiodev->func[1]);
1453                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1454                                              BRCMF_SDIO_FT_SUPER);
1455                 sdio_release_host(bus->sdiodev->func[1]);
1456                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1457
1458                 /* Remove superframe header, remember offset */
1459                 skb_pull(pfirst, rd_new.dat_offset);
1460                 sfdoff = rd_new.dat_offset;
1461                 num = 0;
1462
1463                 /* Validate all the subframe headers */
1464                 skb_queue_walk(&bus->glom, pnext) {
1465                         /* leave when invalid subframe is found */
1466                         if (errcode)
1467                                 break;
1468
1469                         rd_new.len = pnext->len;
1470                         rd_new.seq_num = rxseq++;
1471                         sdio_claim_host(bus->sdiodev->func[1]);
1472                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1473                                                      BRCMF_SDIO_FT_SUB);
1474                         sdio_release_host(bus->sdiodev->func[1]);
1475                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1476                                            pnext->data, 32, "subframe:\n");
1477
1478                         num++;
1479                 }
1480
1481                 if (errcode) {
1482                         /* Terminate frame on error, request
1483                                  a couple retries */
1484                         sdio_claim_host(bus->sdiodev->func[1]);
1485                         if (bus->glomerr++ < 3) {
1486                                 /* Restore superframe header space */
1487                                 skb_push(pfirst, sfdoff);
1488                                 brcmf_sdbrcm_rxfail(bus, true, true);
1489                         } else {
1490                                 bus->glomerr = 0;
1491                                 brcmf_sdbrcm_rxfail(bus, true, false);
1492                                 bus->sdcnt.rxglomfail++;
1493                                 brcmf_sdbrcm_free_glom(bus);
1494                         }
1495                         sdio_release_host(bus->sdiodev->func[1]);
1496                         bus->cur_read.len = 0;
1497                         return 0;
1498                 }
1499
1500                 /* Basic SD framing looks ok - process each packet (header) */
1501
1502                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1503                         dptr = (u8 *) (pfirst->data);
1504                         sublen = get_unaligned_le16(dptr);
1505                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1506
1507                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1508                                            dptr, pfirst->len,
1509                                            "Rx Subframe Data:\n");
1510
1511                         __skb_trim(pfirst, sublen);
1512                         skb_pull(pfirst, doff);
1513
1514                         if (pfirst->len == 0) {
1515                                 skb_unlink(pfirst, &bus->glom);
1516                                 brcmu_pkt_buf_free_skb(pfirst);
1517                                 continue;
1518                         }
1519
1520                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1521                                            pfirst->data,
1522                                            min_t(int, pfirst->len, 32),
1523                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1524                                            bus->glom.qlen, pfirst, pfirst->data,
1525                                            pfirst->len, pfirst->next,
1526                                            pfirst->prev);
1527                         skb_unlink(pfirst, &bus->glom);
1528                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1529                         bus->sdcnt.rxglompkts++;
1530                 }
1531
1532                 bus->sdcnt.rxglomframes++;
1533         }
1534         return num;
1535 }
1536
1537 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1538                                         bool *pending)
1539 {
1540         DECLARE_WAITQUEUE(wait, current);
1541         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1542
1543         /* Wait until control frame is available */
1544         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1545         set_current_state(TASK_INTERRUPTIBLE);
1546
1547         while (!(*condition) && (!signal_pending(current) && timeout))
1548                 timeout = schedule_timeout(timeout);
1549
1550         if (signal_pending(current))
1551                 *pending = true;
1552
1553         set_current_state(TASK_RUNNING);
1554         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1555
1556         return timeout;
1557 }
1558
1559 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1560 {
1561         if (waitqueue_active(&bus->dcmd_resp_wait))
1562                 wake_up_interruptible(&bus->dcmd_resp_wait);
1563
1564         return 0;
1565 }
1566 static void
1567 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1568 {
1569         uint rdlen, pad;
1570         u8 *buf = NULL, *rbuf;
1571         int sdret;
1572
1573         brcmf_dbg(TRACE, "Enter\n");
1574
1575         if (bus->rxblen)
1576                 buf = vzalloc(bus->rxblen);
1577         if (!buf)
1578                 goto done;
1579
1580         rbuf = bus->rxbuf;
1581         pad = ((unsigned long)rbuf % bus->head_align);
1582         if (pad)
1583                 rbuf += (bus->head_align - pad);
1584
1585         /* Copy the already-read portion over */
1586         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1587         if (len <= BRCMF_FIRSTREAD)
1588                 goto gotpkt;
1589
1590         /* Raise rdlen to next SDIO block to avoid tail command */
1591         rdlen = len - BRCMF_FIRSTREAD;
1592         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1593                 pad = bus->blocksize - (rdlen % bus->blocksize);
1594                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1595                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1596                         rdlen += pad;
1597         } else if (rdlen % bus->head_align) {
1598                 rdlen += bus->head_align - (rdlen % bus->head_align);
1599         }
1600
1601         /* Drop if the read is too big or it exceeds our maximum */
1602         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1603                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1604                           rdlen, bus->sdiodev->bus_if->maxctl);
1605                 brcmf_sdbrcm_rxfail(bus, false, false);
1606                 goto done;
1607         }
1608
1609         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1610                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1611                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1612                 bus->sdcnt.rx_toolong++;
1613                 brcmf_sdbrcm_rxfail(bus, false, false);
1614                 goto done;
1615         }
1616
1617         /* Read remain of frame body */
1618         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1619                                      SDIO_FUNC_2, F2SYNC, rbuf, rdlen);
1620         bus->sdcnt.f2rxdata++;
1621
1622         /* Control frame failures need retransmission */
1623         if (sdret < 0) {
1624                 brcmf_err("read %d control bytes failed: %d\n",
1625                           rdlen, sdret);
1626                 bus->sdcnt.rxc_errors++;
1627                 brcmf_sdbrcm_rxfail(bus, true, true);
1628                 goto done;
1629         } else
1630                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1631
1632 gotpkt:
1633
1634         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1635                            buf, len, "RxCtrl:\n");
1636
1637         /* Point to valid data and indicate its length */
1638         spin_lock_bh(&bus->rxctl_lock);
1639         if (bus->rxctl) {
1640                 brcmf_err("last control frame is being processed.\n");
1641                 spin_unlock_bh(&bus->rxctl_lock);
1642                 vfree(buf);
1643                 goto done;
1644         }
1645         bus->rxctl = buf + doff;
1646         bus->rxctl_orig = buf;
1647         bus->rxlen = len - doff;
1648         spin_unlock_bh(&bus->rxctl_lock);
1649
1650 done:
1651         /* Awake any waiters */
1652         brcmf_sdbrcm_dcmd_resp_wake(bus);
1653 }
1654
1655 /* Pad read to blocksize for efficiency */
1656 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1657 {
1658         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1659                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1660                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1661                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1662                         *rdlen += *pad;
1663         } else if (*rdlen % bus->head_align) {
1664                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1665         }
1666 }
1667
1668 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1669 {
1670         struct sk_buff *pkt;            /* Packet for event or data frames */
1671         u16 pad;                /* Number of pad bytes to read */
1672         uint rxleft = 0;        /* Remaining number of frames allowed */
1673         int ret;                /* Return code from calls */
1674         uint rxcount = 0;       /* Total frames read */
1675         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1676         u8 head_read = 0;
1677
1678         brcmf_dbg(TRACE, "Enter\n");
1679
1680         /* Not finished unless we encounter no more frames indication */
1681         bus->rxpending = true;
1682
1683         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1684              !bus->rxskip && rxleft &&
1685              bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1686              rd->seq_num++, rxleft--) {
1687
1688                 /* Handle glomming separately */
1689                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1690                         u8 cnt;
1691                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1692                                   bus->glomd, skb_peek(&bus->glom));
1693                         cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1694                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1695                         rd->seq_num += cnt - 1;
1696                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1697                         continue;
1698                 }
1699
1700                 rd->len_left = rd->len;
1701                 /* read header first for unknow frame length */
1702                 sdio_claim_host(bus->sdiodev->func[1]);
1703                 if (!rd->len) {
1704                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1705                                                    bus->sdiodev->sbwad,
1706                                                    SDIO_FUNC_2, F2SYNC,
1707                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1708                         bus->sdcnt.f2rxhdrs++;
1709                         if (ret < 0) {
1710                                 brcmf_err("RXHEADER FAILED: %d\n",
1711                                           ret);
1712                                 bus->sdcnt.rx_hdrfail++;
1713                                 brcmf_sdbrcm_rxfail(bus, true, true);
1714                                 sdio_release_host(bus->sdiodev->func[1]);
1715                                 continue;
1716                         }
1717
1718                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1719                                            bus->rxhdr, SDPCM_HDRLEN,
1720                                            "RxHdr:\n");
1721
1722                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1723                                                BRCMF_SDIO_FT_NORMAL)) {
1724                                 sdio_release_host(bus->sdiodev->func[1]);
1725                                 if (!bus->rxpending)
1726                                         break;
1727                                 else
1728                                         continue;
1729                         }
1730
1731                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1732                                 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1733                                                           rd->len,
1734                                                           rd->dat_offset);
1735                                 /* prepare the descriptor for the next read */
1736                                 rd->len = rd->len_nxtfrm << 4;
1737                                 rd->len_nxtfrm = 0;
1738                                 /* treat all packet as event if we don't know */
1739                                 rd->channel = SDPCM_EVENT_CHANNEL;
1740                                 sdio_release_host(bus->sdiodev->func[1]);
1741                                 continue;
1742                         }
1743                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1744                                        rd->len - BRCMF_FIRSTREAD : 0;
1745                         head_read = BRCMF_FIRSTREAD;
1746                 }
1747
1748                 brcmf_pad(bus, &pad, &rd->len_left);
1749
1750                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1751                                             bus->head_align);
1752                 if (!pkt) {
1753                         /* Give up on data, request rtx of events */
1754                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1755                         brcmf_sdbrcm_rxfail(bus, false,
1756                                             RETRYCHAN(rd->channel));
1757                         sdio_release_host(bus->sdiodev->func[1]);
1758                         continue;
1759                 }
1760                 skb_pull(pkt, head_read);
1761                 pkt_align(pkt, rd->len_left, bus->head_align);
1762
1763                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1764                                            SDIO_FUNC_2, F2SYNC, pkt);
1765                 bus->sdcnt.f2rxdata++;
1766                 sdio_release_host(bus->sdiodev->func[1]);
1767
1768                 if (ret < 0) {
1769                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1770                                   rd->len, rd->channel, ret);
1771                         brcmu_pkt_buf_free_skb(pkt);
1772                         sdio_claim_host(bus->sdiodev->func[1]);
1773                         brcmf_sdbrcm_rxfail(bus, true,
1774                                             RETRYCHAN(rd->channel));
1775                         sdio_release_host(bus->sdiodev->func[1]);
1776                         continue;
1777                 }
1778
1779                 if (head_read) {
1780                         skb_push(pkt, head_read);
1781                         memcpy(pkt->data, bus->rxhdr, head_read);
1782                         head_read = 0;
1783                 } else {
1784                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1785                         rd_new.seq_num = rd->seq_num;
1786                         sdio_claim_host(bus->sdiodev->func[1]);
1787                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1788                                                BRCMF_SDIO_FT_NORMAL)) {
1789                                 rd->len = 0;
1790                                 brcmu_pkt_buf_free_skb(pkt);
1791                         }
1792                         bus->sdcnt.rx_readahead_cnt++;
1793                         if (rd->len != roundup(rd_new.len, 16)) {
1794                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1795                                           rd->len,
1796                                           roundup(rd_new.len, 16) >> 4);
1797                                 rd->len = 0;
1798                                 brcmf_sdbrcm_rxfail(bus, true, true);
1799                                 sdio_release_host(bus->sdiodev->func[1]);
1800                                 brcmu_pkt_buf_free_skb(pkt);
1801                                 continue;
1802                         }
1803                         sdio_release_host(bus->sdiodev->func[1]);
1804                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1805                         rd->channel = rd_new.channel;
1806                         rd->dat_offset = rd_new.dat_offset;
1807
1808                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1809                                              BRCMF_DATA_ON()) &&
1810                                            BRCMF_HDRS_ON(),
1811                                            bus->rxhdr, SDPCM_HDRLEN,
1812                                            "RxHdr:\n");
1813
1814                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1815                                 brcmf_err("readahead on control packet %d?\n",
1816                                           rd_new.seq_num);
1817                                 /* Force retry w/normal header read */
1818                                 rd->len = 0;
1819                                 sdio_claim_host(bus->sdiodev->func[1]);
1820                                 brcmf_sdbrcm_rxfail(bus, false, true);
1821                                 sdio_release_host(bus->sdiodev->func[1]);
1822                                 brcmu_pkt_buf_free_skb(pkt);
1823                                 continue;
1824                         }
1825                 }
1826
1827                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1828                                    pkt->data, rd->len, "Rx Data:\n");
1829
1830                 /* Save superframe descriptor and allocate packet frame */
1831                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1832                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1833                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1834                                           rd->len);
1835                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1836                                                    pkt->data, rd->len,
1837                                                    "Glom Data:\n");
1838                                 __skb_trim(pkt, rd->len);
1839                                 skb_pull(pkt, SDPCM_HDRLEN);
1840                                 bus->glomd = pkt;
1841                         } else {
1842                                 brcmf_err("%s: glom superframe w/o "
1843                                           "descriptor!\n", __func__);
1844                                 sdio_claim_host(bus->sdiodev->func[1]);
1845                                 brcmf_sdbrcm_rxfail(bus, false, false);
1846                                 sdio_release_host(bus->sdiodev->func[1]);
1847                         }
1848                         /* prepare the descriptor for the next read */
1849                         rd->len = rd->len_nxtfrm << 4;
1850                         rd->len_nxtfrm = 0;
1851                         /* treat all packet as event if we don't know */
1852                         rd->channel = SDPCM_EVENT_CHANNEL;
1853                         continue;
1854                 }
1855
1856                 /* Fill in packet len and prio, deliver upward */
1857                 __skb_trim(pkt, rd->len);
1858                 skb_pull(pkt, rd->dat_offset);
1859
1860                 /* prepare the descriptor for the next read */
1861                 rd->len = rd->len_nxtfrm << 4;
1862                 rd->len_nxtfrm = 0;
1863                 /* treat all packet as event if we don't know */
1864                 rd->channel = SDPCM_EVENT_CHANNEL;
1865
1866                 if (pkt->len == 0) {
1867                         brcmu_pkt_buf_free_skb(pkt);
1868                         continue;
1869                 }
1870
1871                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1872         }
1873
1874         rxcount = maxframes - rxleft;
1875         /* Message if we hit the limit */
1876         if (!rxleft)
1877                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1878         else
1879                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1880         /* Back off rxseq if awaiting rtx, update rx_seq */
1881         if (bus->rxskip)
1882                 rd->seq_num--;
1883         bus->rx_seq = rd->seq_num;
1884
1885         return rxcount;
1886 }
1887
1888 static void
1889 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1890 {
1891         if (waitqueue_active(&bus->ctrl_wait))
1892                 wake_up_interruptible(&bus->ctrl_wait);
1893         return;
1894 }
1895
1896 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
1897 {
1898         u16 head_pad;
1899         u8 *dat_buf;
1900
1901         dat_buf = (u8 *)(pkt->data);
1902
1903         /* Check head padding */
1904         head_pad = ((unsigned long)dat_buf % bus->head_align);
1905         if (head_pad) {
1906                 if (skb_headroom(pkt) < head_pad) {
1907                         bus->sdiodev->bus_if->tx_realloc++;
1908                         head_pad = 0;
1909                         if (skb_cow(pkt, head_pad))
1910                                 return -ENOMEM;
1911                 }
1912                 skb_push(pkt, head_pad);
1913                 dat_buf = (u8 *)(pkt->data);
1914                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1915         }
1916         return head_pad;
1917 }
1918
1919 /**
1920  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1921  * bus layer usage.
1922  */
1923 /* flag marking a dummy skb added for DMA alignment requirement */
1924 #define ALIGN_SKB_FLAG          0x8000
1925 /* bit mask of data length chopped from the previous packet */
1926 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1927
1928 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
1929                                     struct sk_buff_head *pktq,
1930                                     struct sk_buff *pkt, u16 total_len)
1931 {
1932         struct brcmf_sdio_dev *sdiodev;
1933         struct sk_buff *pkt_pad;
1934         u16 tail_pad, tail_chop, chain_pad;
1935         unsigned int blksize;
1936         bool lastfrm;
1937         int ntail, ret;
1938
1939         sdiodev = bus->sdiodev;
1940         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1941         /* sg entry alignment should be a divisor of block size */
1942         WARN_ON(blksize % bus->sgentry_align);
1943
1944         /* Check tail padding */
1945         lastfrm = skb_queue_is_last(pktq, pkt);
1946         tail_pad = 0;
1947         tail_chop = pkt->len % bus->sgentry_align;
1948         if (tail_chop)
1949                 tail_pad = bus->sgentry_align - tail_chop;
1950         chain_pad = (total_len + tail_pad) % blksize;
1951         if (lastfrm && chain_pad)
1952                 tail_pad += blksize - chain_pad;
1953         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1954                 pkt_pad = bus->txglom_sgpad;
1955                 if (pkt_pad == NULL)
1956                           brcmu_pkt_buf_get_skb(tail_pad + tail_chop);
1957                 if (pkt_pad == NULL)
1958                         return -ENOMEM;
1959                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
1960                 if (unlikely(ret < 0))
1961                         return ret;
1962                 memcpy(pkt_pad->data,
1963                        pkt->data + pkt->len - tail_chop,
1964                        tail_chop);
1965                 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1966                 skb_trim(pkt, pkt->len - tail_chop);
1967                 __skb_queue_after(pktq, pkt, pkt_pad);
1968         } else {
1969                 ntail = pkt->data_len + tail_pad -
1970                         (pkt->end - pkt->tail);
1971                 if (skb_cloned(pkt) || ntail > 0)
1972                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1973                                 return -ENOMEM;
1974                 if (skb_linearize(pkt))
1975                         return -ENOMEM;
1976                 __skb_put(pkt, tail_pad);
1977         }
1978
1979         return tail_pad;
1980 }
1981
1982 /**
1983  * brcmf_sdio_txpkt_prep - packet preparation for transmit
1984  * @bus: brcmf_sdio structure pointer
1985  * @pktq: packet list pointer
1986  * @chan: virtual channel to transmit the packet
1987  *
1988  * Processes to be applied to the packet
1989  *      - Align data buffer pointer
1990  *      - Align data buffer length
1991  *      - Prepare header
1992  * Return: negative value if there is error
1993  */
1994 static int
1995 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
1996                       uint chan)
1997 {
1998         u16 head_pad, total_len;
1999         struct sk_buff *pkt_next;
2000         u8 txseq;
2001         int ret;
2002         struct brcmf_sdio_hdrinfo hd_info = {0};
2003
2004         txseq = bus->tx_seq;
2005         total_len = 0;
2006         skb_queue_walk(pktq, pkt_next) {
2007                 /* alignment packet inserted in previous
2008                  * loop cycle can be skipped as it is
2009                  * already properly aligned and does not
2010                  * need an sdpcm header.
2011                  */
2012                 if (*(u32 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2013                         continue;
2014
2015                 /* align packet data pointer */
2016                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2017                 if (ret < 0)
2018                         return ret;
2019                 head_pad = (u16)ret;
2020                 if (head_pad)
2021                         memset(pkt_next->data, 0, head_pad + bus->tx_hdrlen);
2022
2023                 total_len += pkt_next->len;
2024
2025                 hd_info.len = pkt_next->len;
2026                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2027                 if (bus->txglom && pktq->qlen > 1) {
2028                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2029                                                        pkt_next, total_len);
2030                         if (ret < 0)
2031                                 return ret;
2032                         hd_info.tail_pad = (u16)ret;
2033                         total_len += (u16)ret;
2034                 }
2035
2036                 hd_info.channel = chan;
2037                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2038                 hd_info.seq_num = txseq++;
2039
2040                 /* Now fill the header */
2041                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2042
2043                 if (BRCMF_BYTES_ON() &&
2044                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2045                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2046                         brcmf_dbg_hex_dump(true, pkt_next, hd_info.len,
2047                                            "Tx Frame:\n");
2048                 else if (BRCMF_HDRS_ON())
2049                         brcmf_dbg_hex_dump(true, pkt_next,
2050                                            head_pad + bus->tx_hdrlen,
2051                                            "Tx Header:\n");
2052         }
2053         /* Hardware length tag of the first packet should be total
2054          * length of the chain (including padding)
2055          */
2056         if (bus->txglom)
2057                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2058         return 0;
2059 }
2060
2061 /**
2062  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2063  * @bus: brcmf_sdio structure pointer
2064  * @pktq: packet list pointer
2065  *
2066  * Processes to be applied to the packet
2067  *      - Remove head padding
2068  *      - Remove tail padding
2069  */
2070 static void
2071 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2072 {
2073         u8 *hdr;
2074         u32 dat_offset;
2075         u16 tail_pad;
2076         u32 dummy_flags, chop_len;
2077         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2078
2079         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2080                 dummy_flags = *(u32 *)(pkt_next->cb);
2081                 if (dummy_flags & ALIGN_SKB_FLAG) {
2082                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2083                         if (chop_len) {
2084                                 pkt_prev = pkt_next->prev;
2085                                 skb_put(pkt_prev, chop_len);
2086                         }
2087                         __skb_unlink(pkt_next, pktq);
2088                         brcmu_pkt_buf_free_skb(pkt_next);
2089                 } else {
2090                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2091                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2092                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2093                                      SDPCM_DOFFSET_SHIFT;
2094                         skb_pull(pkt_next, dat_offset);
2095                         if (bus->txglom) {
2096                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2097                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2098                         }
2099                 }
2100         }
2101 }
2102
2103 /* Writes a HW/SW header into the packet and sends it. */
2104 /* Assumes: (a) header space already there, (b) caller holds lock */
2105 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2106                               uint chan)
2107 {
2108         int ret;
2109         int i;
2110         struct sk_buff *pkt_next, *tmp;
2111
2112         brcmf_dbg(TRACE, "Enter\n");
2113
2114         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2115         if (ret)
2116                 goto done;
2117
2118         sdio_claim_host(bus->sdiodev->func[1]);
2119         ret = brcmf_sdiod_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2120                                    SDIO_FUNC_2, F2SYNC, pktq);
2121         bus->sdcnt.f2txdata++;
2122
2123         if (ret < 0) {
2124                 /* On failure, abort the command and terminate the frame */
2125                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2126                           ret);
2127                 bus->sdcnt.tx_sderrs++;
2128
2129                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2130                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2131                                   SFC_WF_TERM, NULL);
2132                 bus->sdcnt.f1regdata++;
2133
2134                 for (i = 0; i < 3; i++) {
2135                         u8 hi, lo;
2136                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2137                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2138                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2139                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2140                         bus->sdcnt.f1regdata += 2;
2141                         if ((hi == 0) && (lo == 0))
2142                                 break;
2143                 }
2144         }
2145         sdio_release_host(bus->sdiodev->func[1]);
2146
2147 done:
2148         brcmf_sdio_txpkt_postp(bus, pktq);
2149         if (ret == 0)
2150                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2151         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2152                 __skb_unlink(pkt_next, pktq);
2153                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2154         }
2155         return ret;
2156 }
2157
2158 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2159 {
2160         struct sk_buff *pkt;
2161         struct sk_buff_head pktq;
2162         u32 intstatus = 0;
2163         int ret = 0, prec_out, i;
2164         uint cnt = 0;
2165         u8 tx_prec_map, pkt_num;
2166
2167         brcmf_dbg(TRACE, "Enter\n");
2168
2169         tx_prec_map = ~bus->flowcontrol;
2170
2171         /* Send frames until the limit or some other event */
2172         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2173                 pkt_num = 1;
2174                 __skb_queue_head_init(&pktq);
2175                 if (bus->txglom)
2176                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2177                                         brcmf_sdio_txglomsz);
2178                 pkt_num = min_t(u32, pkt_num,
2179                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2180                 spin_lock_bh(&bus->txqlock);
2181                 for (i = 0; i < pkt_num; i++) {
2182                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2183                                               &prec_out);
2184                         if (pkt == NULL)
2185                                 break;
2186                         __skb_queue_tail(&pktq, pkt);
2187                 }
2188                 spin_unlock_bh(&bus->txqlock);
2189                 if (i == 0)
2190                         break;
2191
2192                 ret = brcmf_sdbrcm_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2193                 cnt += i;
2194
2195                 /* In poll mode, need to check for other events */
2196                 if (!bus->intr && cnt) {
2197                         /* Check device status, signal pending interrupt */
2198                         sdio_claim_host(bus->sdiodev->func[1]);
2199                         ret = r_sdreg32(bus, &intstatus,
2200                                         offsetof(struct sdpcmd_regs,
2201                                                  intstatus));
2202                         sdio_release_host(bus->sdiodev->func[1]);
2203                         bus->sdcnt.f2txdata++;
2204                         if (ret != 0)
2205                                 break;
2206                         if (intstatus & bus->hostintmask)
2207                                 atomic_set(&bus->ipend, 1);
2208                 }
2209         }
2210
2211         /* Deflow-control stack if needed */
2212         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2213             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2214                 bus->txoff = false;
2215                 brcmf_txflowblock(bus->sdiodev->dev, false);
2216         }
2217
2218         return cnt;
2219 }
2220
2221 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2222 {
2223         u32 local_hostintmask;
2224         u8 saveclk;
2225         int err;
2226         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2227         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2228         struct brcmf_sdio *bus = sdiodev->bus;
2229
2230         brcmf_dbg(TRACE, "Enter\n");
2231
2232         if (bus->watchdog_tsk) {
2233                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2234                 kthread_stop(bus->watchdog_tsk);
2235                 bus->watchdog_tsk = NULL;
2236         }
2237
2238         sdio_claim_host(bus->sdiodev->func[1]);
2239
2240         /* Enable clock for device interrupts */
2241         brcmf_sdbrcm_bus_sleep(bus, false, false);
2242
2243         /* Disable and clear interrupts at the chip level also */
2244         w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2245         local_hostintmask = bus->hostintmask;
2246         bus->hostintmask = 0;
2247
2248         /* Change our idea of bus state */
2249         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2250
2251         /* Force clocks on backplane to be sure F2 interrupt propagates */
2252         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
2253                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
2254         if (!err) {
2255                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2256                                   (saveclk | SBSDIO_FORCE_HT), &err);
2257         }
2258         if (err)
2259                 brcmf_err("Failed to force clock for F2: err %d\n", err);
2260
2261         /* Turn off the bus (F2), free any pending packets */
2262         brcmf_dbg(INTR, "disable SDIO interrupts\n");
2263         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
2264
2265         /* Clear any pending interrupts now that F2 is disabled */
2266         w_sdreg32(bus, local_hostintmask,
2267                   offsetof(struct sdpcmd_regs, intstatus));
2268
2269         /* Turn off the backplane clock (only) */
2270         brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2271         sdio_release_host(bus->sdiodev->func[1]);
2272
2273         /* Clear the data packet queues */
2274         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2275
2276         /* Clear any held glomming stuff */
2277         if (bus->glomd)
2278                 brcmu_pkt_buf_free_skb(bus->glomd);
2279         brcmf_sdbrcm_free_glom(bus);
2280
2281         /* Clear rx control and wake any waiters */
2282         spin_lock_bh(&bus->rxctl_lock);
2283         bus->rxlen = 0;
2284         spin_unlock_bh(&bus->rxctl_lock);
2285         brcmf_sdbrcm_dcmd_resp_wake(bus);
2286
2287         /* Reset some F2 state stuff */
2288         bus->rxskip = false;
2289         bus->tx_seq = bus->rx_seq = 0;
2290 }
2291
2292 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2293 {
2294         unsigned long flags;
2295
2296         if (bus->sdiodev->oob_irq_requested) {
2297                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2298                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2299                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2300                         bus->sdiodev->irq_en = true;
2301                 }
2302                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2303         }
2304 }
2305
2306 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2307 {
2308         u8 idx;
2309         u32 addr;
2310         unsigned long val;
2311         int n, ret;
2312
2313         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2314         addr = bus->ci->c_inf[idx].base +
2315                offsetof(struct sdpcmd_regs, intstatus);
2316
2317         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2318         bus->sdcnt.f1regdata++;
2319         if (ret != 0)
2320                 val = 0;
2321
2322         val &= bus->hostintmask;
2323         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2324
2325         /* Clear interrupts */
2326         if (val) {
2327                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2328                 bus->sdcnt.f1regdata++;
2329         }
2330
2331         if (ret) {
2332                 atomic_set(&bus->intstatus, 0);
2333         } else if (val) {
2334                 for_each_set_bit(n, &val, 32)
2335                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2336         }
2337
2338         return ret;
2339 }
2340
2341 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2342 {
2343         u32 newstatus = 0;
2344         unsigned long intstatus;
2345         uint rxlimit = bus->rxbound;    /* Rx frames to read before resched */
2346         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2347         uint framecnt = 0;      /* Temporary counter of tx/rx frames */
2348         int err = 0, n;
2349
2350         brcmf_dbg(TRACE, "Enter\n");
2351
2352         sdio_claim_host(bus->sdiodev->func[1]);
2353
2354         /* If waiting for HTAVAIL, check status */
2355         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2356                 u8 clkctl, devctl = 0;
2357
2358 #ifdef DEBUG
2359                 /* Check for inconsistent device control */
2360                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2361                                            SBSDIO_DEVICE_CTL, &err);
2362                 if (err) {
2363                         brcmf_err("error reading DEVCTL: %d\n", err);
2364                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2365                 }
2366 #endif                          /* DEBUG */
2367
2368                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2369                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2370                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2371                 if (err) {
2372                         brcmf_err("error reading CSR: %d\n",
2373                                   err);
2374                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2375                 }
2376
2377                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2378                           devctl, clkctl);
2379
2380                 if (SBSDIO_HTAV(clkctl)) {
2381                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2382                                                    SBSDIO_DEVICE_CTL, &err);
2383                         if (err) {
2384                                 brcmf_err("error reading DEVCTL: %d\n",
2385                                           err);
2386                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2387                         }
2388                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2389                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2390                                           devctl, &err);
2391                         if (err) {
2392                                 brcmf_err("error writing DEVCTL: %d\n",
2393                                           err);
2394                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2395                         }
2396                         bus->clkstate = CLK_AVAIL;
2397                 }
2398         }
2399
2400         /* Make sure backplane clock is on */
2401         brcmf_sdbrcm_bus_sleep(bus, false, true);
2402
2403         /* Pending interrupt indicates new device status */
2404         if (atomic_read(&bus->ipend) > 0) {
2405                 atomic_set(&bus->ipend, 0);
2406                 err = brcmf_sdio_intr_rstatus(bus);
2407         }
2408
2409         /* Start with leftover status bits */
2410         intstatus = atomic_xchg(&bus->intstatus, 0);
2411
2412         /* Handle flow-control change: read new state in case our ack
2413          * crossed another change interrupt.  If change still set, assume
2414          * FC ON for safety, let next loop through do the debounce.
2415          */
2416         if (intstatus & I_HMB_FC_CHANGE) {
2417                 intstatus &= ~I_HMB_FC_CHANGE;
2418                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2419                                 offsetof(struct sdpcmd_regs, intstatus));
2420
2421                 err = r_sdreg32(bus, &newstatus,
2422                                 offsetof(struct sdpcmd_regs, intstatus));
2423                 bus->sdcnt.f1regdata += 2;
2424                 atomic_set(&bus->fcstate,
2425                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2426                 intstatus |= (newstatus & bus->hostintmask);
2427         }
2428
2429         /* Handle host mailbox indication */
2430         if (intstatus & I_HMB_HOST_INT) {
2431                 intstatus &= ~I_HMB_HOST_INT;
2432                 intstatus |= brcmf_sdbrcm_hostmail(bus);
2433         }
2434
2435         sdio_release_host(bus->sdiodev->func[1]);
2436
2437         /* Generally don't ask for these, can get CRC errors... */
2438         if (intstatus & I_WR_OOSYNC) {
2439                 brcmf_err("Dongle reports WR_OOSYNC\n");
2440                 intstatus &= ~I_WR_OOSYNC;
2441         }
2442
2443         if (intstatus & I_RD_OOSYNC) {
2444                 brcmf_err("Dongle reports RD_OOSYNC\n");
2445                 intstatus &= ~I_RD_OOSYNC;
2446         }
2447
2448         if (intstatus & I_SBINT) {
2449                 brcmf_err("Dongle reports SBINT\n");
2450                 intstatus &= ~I_SBINT;
2451         }
2452
2453         /* Would be active due to wake-wlan in gSPI */
2454         if (intstatus & I_CHIPACTIVE) {
2455                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2456                 intstatus &= ~I_CHIPACTIVE;
2457         }
2458
2459         /* Ignore frame indications if rxskip is set */
2460         if (bus->rxskip)
2461                 intstatus &= ~I_HMB_FRAME_IND;
2462
2463         /* On frame indication, read available frames */
2464         if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2465                 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2466                 if (!bus->rxpending)
2467                         intstatus &= ~I_HMB_FRAME_IND;
2468                 rxlimit -= min(framecnt, rxlimit);
2469         }
2470
2471         /* Keep still-pending events for next scheduling */
2472         if (intstatus) {
2473                 for_each_set_bit(n, &intstatus, 32)
2474                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2475         }
2476
2477         brcmf_sdbrcm_clrintr(bus);
2478
2479         if (data_ok(bus) && bus->ctrl_frame_stat &&
2480                 (bus->clkstate == CLK_AVAIL)) {
2481                 int i;
2482
2483                 sdio_claim_host(bus->sdiodev->func[1]);
2484                 err = brcmf_sdiod_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2485                                            SDIO_FUNC_2, F2SYNC,
2486                                            bus->ctrl_frame_buf,
2487                                            (u32)bus->ctrl_frame_len);
2488
2489                 if (err < 0) {
2490                         /* On failure, abort the command and
2491                                 terminate the frame */
2492                         brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2493                                   err);
2494                         bus->sdcnt.tx_sderrs++;
2495
2496                         brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2497
2498                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2499                                           SFC_WF_TERM, &err);
2500                         bus->sdcnt.f1regdata++;
2501
2502                         for (i = 0; i < 3; i++) {
2503                                 u8 hi, lo;
2504                                 hi = brcmf_sdiod_regrb(bus->sdiodev,
2505                                                        SBSDIO_FUNC1_WFRAMEBCHI,
2506                                                        &err);
2507                                 lo = brcmf_sdiod_regrb(bus->sdiodev,
2508                                                        SBSDIO_FUNC1_WFRAMEBCLO,
2509                                                        &err);
2510                                 bus->sdcnt.f1regdata += 2;
2511                                 if ((hi == 0) && (lo == 0))
2512                                         break;
2513                         }
2514
2515                 } else {
2516                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2517                 }
2518                 sdio_release_host(bus->sdiodev->func[1]);
2519                 bus->ctrl_frame_stat = false;
2520                 brcmf_sdbrcm_wait_event_wakeup(bus);
2521         }
2522         /* Send queued frames (limit 1 if rx may still be pending) */
2523         else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2524                  brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2525                  && data_ok(bus)) {
2526                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2527                                             txlimit;
2528                 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2529                 txlimit -= framecnt;
2530         }
2531
2532         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2533                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2534                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2535                 atomic_set(&bus->intstatus, 0);
2536         } else if (atomic_read(&bus->intstatus) ||
2537                    atomic_read(&bus->ipend) > 0 ||
2538                    (!atomic_read(&bus->fcstate) &&
2539                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2540                     data_ok(bus)) || PKT_AVAILABLE()) {
2541                 atomic_inc(&bus->dpc_tskcnt);
2542         }
2543
2544         /* If we're done for now, turn off clock request. */
2545         if ((bus->clkstate != CLK_PENDING)
2546             && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2547                 bus->activity = false;
2548                 brcmf_dbg(SDIO, "idle state\n");
2549                 sdio_claim_host(bus->sdiodev->func[1]);
2550                 brcmf_sdbrcm_bus_sleep(bus, true, false);
2551                 sdio_release_host(bus->sdiodev->func[1]);
2552         }
2553 }
2554
2555 static struct pktq *brcmf_sdbrcm_bus_gettxq(struct device *dev)
2556 {
2557         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2558         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2559         struct brcmf_sdio *bus = sdiodev->bus;
2560
2561         return &bus->txq;
2562 }
2563
2564 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2565 {
2566         int ret = -EBADE;
2567         uint datalen, prec;
2568         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2569         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2570         struct brcmf_sdio *bus = sdiodev->bus;
2571         ulong flags;
2572
2573         brcmf_dbg(TRACE, "Enter\n");
2574
2575         datalen = pkt->len;
2576
2577         /* Add space for the header */
2578         skb_push(pkt, bus->tx_hdrlen);
2579         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2580
2581         prec = prio2prec((pkt->priority & PRIOMASK));
2582
2583         /* Check for existing queue, current flow-control,
2584                          pending event, or pending clock */
2585         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2586         bus->sdcnt.fcqueued++;
2587
2588         /* Priority based enq */
2589         spin_lock_irqsave(&bus->txqlock, flags);
2590         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2591                 skb_pull(pkt, bus->tx_hdrlen);
2592                 brcmf_err("out of bus->txq !!!\n");
2593                 ret = -ENOSR;
2594         } else {
2595                 ret = 0;
2596         }
2597
2598         if (pktq_len(&bus->txq) >= TXHI) {
2599                 bus->txoff = true;
2600                 brcmf_txflowblock(bus->sdiodev->dev, true);
2601         }
2602         spin_unlock_irqrestore(&bus->txqlock, flags);
2603
2604 #ifdef DEBUG
2605         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2606                 qcount[prec] = pktq_plen(&bus->txq, prec);
2607 #endif
2608
2609         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2610                 atomic_inc(&bus->dpc_tskcnt);
2611                 queue_work(bus->brcmf_wq, &bus->datawork);
2612         }
2613
2614         return ret;
2615 }
2616
2617 #ifdef DEBUG
2618 #define CONSOLE_LINE_MAX        192
2619
2620 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2621 {
2622         struct brcmf_console *c = &bus->console;
2623         u8 line[CONSOLE_LINE_MAX], ch;
2624         u32 n, idx, addr;
2625         int rv;
2626
2627         /* Don't do anything until FWREADY updates console address */
2628         if (bus->console_addr == 0)
2629                 return 0;
2630
2631         /* Read console log struct */
2632         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2633         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2634                                sizeof(c->log_le));
2635         if (rv < 0)
2636                 return rv;
2637
2638         /* Allocate console buffer (one time only) */
2639         if (c->buf == NULL) {
2640                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2641                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2642                 if (c->buf == NULL)
2643                         return -ENOMEM;
2644         }
2645
2646         idx = le32_to_cpu(c->log_le.idx);
2647
2648         /* Protect against corrupt value */
2649         if (idx > c->bufsize)
2650                 return -EBADE;
2651
2652         /* Skip reading the console buffer if the index pointer
2653          has not moved */
2654         if (idx == c->last)
2655                 return 0;
2656
2657         /* Read the console buffer */
2658         addr = le32_to_cpu(c->log_le.buf);
2659         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2660         if (rv < 0)
2661                 return rv;
2662
2663         while (c->last != idx) {
2664                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2665                         if (c->last == idx) {
2666                                 /* This would output a partial line.
2667                                  * Instead, back up
2668                                  * the buffer pointer and output this
2669                                  * line next time around.
2670                                  */
2671                                 if (c->last >= n)
2672                                         c->last -= n;
2673                                 else
2674                                         c->last = c->bufsize - n;
2675                                 goto break2;
2676                         }
2677                         ch = c->buf[c->last];
2678                         c->last = (c->last + 1) % c->bufsize;
2679                         if (ch == '\n')
2680                                 break;
2681                         line[n] = ch;
2682                 }
2683
2684                 if (n > 0) {
2685                         if (line[n - 1] == '\r')
2686                                 n--;
2687                         line[n] = 0;
2688                         pr_debug("CONSOLE: %s\n", line);
2689                 }
2690         }
2691 break2:
2692
2693         return 0;
2694 }
2695 #endif                          /* DEBUG */
2696
2697 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2698 {
2699         int i;
2700         int ret;
2701
2702         bus->ctrl_frame_stat = false;
2703         ret = brcmf_sdiod_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2704                                    SDIO_FUNC_2, F2SYNC, frame, len);
2705
2706         if (ret < 0) {
2707                 /* On failure, abort the command and terminate the frame */
2708                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2709                           ret);
2710                 bus->sdcnt.tx_sderrs++;
2711
2712                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2713
2714                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2715                                   SFC_WF_TERM, NULL);
2716                 bus->sdcnt.f1regdata++;
2717
2718                 for (i = 0; i < 3; i++) {
2719                         u8 hi, lo;
2720                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2721                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2722                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2723                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2724                         bus->sdcnt.f1regdata += 2;
2725                         if (hi == 0 && lo == 0)
2726                                 break;
2727                 }
2728                 return ret;
2729         }
2730
2731         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2732
2733         return ret;
2734 }
2735
2736 static int
2737 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2738 {
2739         u8 *frame;
2740         u16 len, pad;
2741         uint retries = 0;
2742         u8 doff = 0;
2743         int ret = -1;
2744         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2745         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2746         struct brcmf_sdio *bus = sdiodev->bus;
2747         struct brcmf_sdio_hdrinfo hd_info = {0};
2748
2749         brcmf_dbg(TRACE, "Enter\n");
2750
2751         /* Back the pointer to make a room for bus header */
2752         frame = msg - bus->tx_hdrlen;
2753         len = (msglen += bus->tx_hdrlen);
2754
2755         /* Add alignment padding (optional for ctl frames) */
2756         doff = ((unsigned long)frame % bus->head_align);
2757         if (doff) {
2758                 frame -= doff;
2759                 len += doff;
2760                 msglen += doff;
2761                 memset(frame, 0, doff + bus->tx_hdrlen);
2762         }
2763         /* precondition: doff < bus->head_align */
2764         doff += bus->tx_hdrlen;
2765
2766         /* Round send length to next SDIO block */
2767         pad = 0;
2768         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2769                 pad = bus->blocksize - (len % bus->blocksize);
2770                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2771                         pad = 0;
2772         } else if (len % bus->head_align) {
2773                 pad = bus->head_align - (len % bus->head_align);
2774         }
2775         len += pad;
2776
2777         /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2778
2779         /* Make sure backplane clock is on */
2780         sdio_claim_host(bus->sdiodev->func[1]);
2781         brcmf_sdbrcm_bus_sleep(bus, false, false);
2782         sdio_release_host(bus->sdiodev->func[1]);
2783
2784         hd_info.len = (u16)msglen;
2785         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2786         hd_info.dat_offset = doff;
2787         hd_info.seq_num = bus->tx_seq;
2788         hd_info.lastfrm = true;
2789         hd_info.tail_pad = pad;
2790         brcmf_sdio_hdpack(bus, frame, &hd_info);
2791
2792         if (bus->txglom)
2793                 brcmf_sdio_update_hwhdr(frame, len);
2794
2795         if (!data_ok(bus)) {
2796                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2797                           bus->tx_max, bus->tx_seq);
2798                 bus->ctrl_frame_stat = true;
2799                 /* Send from dpc */
2800                 bus->ctrl_frame_buf = frame;
2801                 bus->ctrl_frame_len = len;
2802
2803                 wait_event_interruptible_timeout(bus->ctrl_wait,
2804                                                  !bus->ctrl_frame_stat,
2805                                                  msecs_to_jiffies(2000));
2806
2807                 if (!bus->ctrl_frame_stat) {
2808                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2809                         ret = 0;
2810                 } else {
2811                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2812                         ret = -1;
2813                 }
2814         }
2815
2816         if (ret == -1) {
2817                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2818                                    frame, len, "Tx Frame:\n");
2819                 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2820                                    BRCMF_HDRS_ON(),
2821                                    frame, min_t(u16, len, 16), "TxHdr:\n");
2822
2823                 do {
2824                         sdio_claim_host(bus->sdiodev->func[1]);
2825                         ret = brcmf_tx_frame(bus, frame, len);
2826                         sdio_release_host(bus->sdiodev->func[1]);
2827                 } while (ret < 0 && retries++ < TXRETRIES);
2828         }
2829
2830         if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2831             atomic_read(&bus->dpc_tskcnt) == 0) {
2832                 bus->activity = false;
2833                 sdio_claim_host(bus->sdiodev->func[1]);
2834                 brcmf_dbg(INFO, "idle\n");
2835                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2836                 sdio_release_host(bus->sdiodev->func[1]);
2837         }
2838
2839         if (ret)
2840                 bus->sdcnt.tx_ctlerrs++;
2841         else
2842                 bus->sdcnt.tx_ctlpkts++;
2843
2844         return ret ? -EIO : 0;
2845 }
2846
2847 #ifdef DEBUG
2848 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2849 {
2850         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2851 }
2852
2853 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2854                                  struct sdpcm_shared *sh)
2855 {
2856         u32 addr;
2857         int rv;
2858         u32 shaddr = 0;
2859         struct sdpcm_shared_le sh_le;
2860         __le32 addr_le;
2861
2862         shaddr = bus->ci->rambase + bus->ramsize - 4;
2863
2864         /*
2865          * Read last word in socram to determine
2866          * address of sdpcm_shared structure
2867          */
2868         sdio_claim_host(bus->sdiodev->func[1]);
2869         brcmf_sdbrcm_bus_sleep(bus, false, false);
2870         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2871         sdio_release_host(bus->sdiodev->func[1]);
2872         if (rv < 0)
2873                 return rv;
2874
2875         addr = le32_to_cpu(addr_le);
2876
2877         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2878
2879         /*
2880          * Check if addr is valid.
2881          * NVRAM length at the end of memory should have been overwritten.
2882          */
2883         if (!brcmf_sdio_valid_shared_address(addr)) {
2884                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2885                                   addr);
2886                         return -EINVAL;
2887         }
2888
2889         /* Read hndrte_shared structure */
2890         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2891                                sizeof(struct sdpcm_shared_le));
2892         if (rv < 0)
2893                 return rv;
2894
2895         /* Endianness */
2896         sh->flags = le32_to_cpu(sh_le.flags);
2897         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2898         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2899         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2900         sh->assert_line = le32_to_cpu(sh_le.assert_line);
2901         sh->console_addr = le32_to_cpu(sh_le.console_addr);
2902         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2903
2904         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2905                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2906                           SDPCM_SHARED_VERSION,
2907                           sh->flags & SDPCM_SHARED_VERSION_MASK);
2908                 return -EPROTO;
2909         }
2910
2911         return 0;
2912 }
2913
2914 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2915                                    struct sdpcm_shared *sh, char __user *data,
2916                                    size_t count)
2917 {
2918         u32 addr, console_ptr, console_size, console_index;
2919         char *conbuf = NULL;
2920         __le32 sh_val;
2921         int rv;
2922         loff_t pos = 0;
2923         int nbytes = 0;
2924
2925         /* obtain console information from device memory */
2926         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2927         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2928                                (u8 *)&sh_val, sizeof(u32));
2929         if (rv < 0)
2930                 return rv;
2931         console_ptr = le32_to_cpu(sh_val);
2932
2933         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2934         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2935                                (u8 *)&sh_val, sizeof(u32));
2936         if (rv < 0)
2937                 return rv;
2938         console_size = le32_to_cpu(sh_val);
2939
2940         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2941         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2942                                (u8 *)&sh_val, sizeof(u32));
2943         if (rv < 0)
2944                 return rv;
2945         console_index = le32_to_cpu(sh_val);
2946
2947         /* allocate buffer for console data */
2948         if (console_size <= CONSOLE_BUFFER_MAX)
2949                 conbuf = vzalloc(console_size+1);
2950
2951         if (!conbuf)
2952                 return -ENOMEM;
2953
2954         /* obtain the console data from device */
2955         conbuf[console_size] = '\0';
2956         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2957                                console_size);
2958         if (rv < 0)
2959                 goto done;
2960
2961         rv = simple_read_from_buffer(data, count, &pos,
2962                                      conbuf + console_index,
2963                                      console_size - console_index);
2964         if (rv < 0)
2965                 goto done;
2966
2967         nbytes = rv;
2968         if (console_index > 0) {
2969                 pos = 0;
2970                 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2971                                              conbuf, console_index - 1);
2972                 if (rv < 0)
2973                         goto done;
2974                 rv += nbytes;
2975         }
2976 done:
2977         vfree(conbuf);
2978         return rv;
2979 }
2980
2981 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2982                                 char __user *data, size_t count)
2983 {
2984         int error, res;
2985         char buf[350];
2986         struct brcmf_trap_info tr;
2987         loff_t pos = 0;
2988
2989         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2990                 brcmf_dbg(INFO, "no trap in firmware\n");
2991                 return 0;
2992         }
2993
2994         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2995                                   sizeof(struct brcmf_trap_info));
2996         if (error < 0)
2997                 return error;
2998
2999         res = scnprintf(buf, sizeof(buf),
3000                         "dongle trap info: type 0x%x @ epc 0x%08x\n"
3001                         "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3002                         "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3003                         "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3004                         "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3005                         le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3006                         le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3007                         le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3008                         le32_to_cpu(tr.pc), sh->trap_addr,
3009                         le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3010                         le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3011                         le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3012                         le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3013
3014         return simple_read_from_buffer(data, count, &pos, buf, res);
3015 }
3016
3017 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3018                                   struct sdpcm_shared *sh, char __user *data,
3019                                   size_t count)
3020 {
3021         int error = 0;
3022         char buf[200];
3023         char file[80] = "?";
3024         char expr[80] = "<???>";
3025         int res;
3026         loff_t pos = 0;
3027
3028         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3029                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3030                 return 0;
3031         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3032                 brcmf_dbg(INFO, "no assert in dongle\n");
3033                 return 0;
3034         }
3035
3036         sdio_claim_host(bus->sdiodev->func[1]);
3037         if (sh->assert_file_addr != 0) {
3038                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3039                                           sh->assert_file_addr, (u8 *)file, 80);
3040                 if (error < 0)
3041                         return error;
3042         }
3043         if (sh->assert_exp_addr != 0) {
3044                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3045                                           sh->assert_exp_addr, (u8 *)expr, 80);
3046                 if (error < 0)
3047                         return error;
3048         }
3049         sdio_release_host(bus->sdiodev->func[1]);
3050
3051         res = scnprintf(buf, sizeof(buf),
3052                         "dongle assert: %s:%d: assert(%s)\n",
3053                         file, sh->assert_line, expr);
3054         return simple_read_from_buffer(data, count, &pos, buf, res);
3055 }
3056
3057 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3058 {
3059         int error;
3060         struct sdpcm_shared sh;
3061
3062         error = brcmf_sdio_readshared(bus, &sh);
3063
3064         if (error < 0)
3065                 return error;
3066
3067         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3068                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3069         else if (sh.flags & SDPCM_SHARED_ASSERT)
3070                 brcmf_err("assertion in dongle\n");
3071
3072         if (sh.flags & SDPCM_SHARED_TRAP)
3073                 brcmf_err("firmware trap in dongle\n");
3074
3075         return 0;
3076 }
3077
3078 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
3079                                   size_t count, loff_t *ppos)
3080 {
3081         int error = 0;
3082         struct sdpcm_shared sh;
3083         int nbytes = 0;
3084         loff_t pos = *ppos;
3085
3086         if (pos != 0)
3087                 return 0;
3088
3089         error = brcmf_sdio_readshared(bus, &sh);
3090         if (error < 0)
3091                 goto done;
3092
3093         error = brcmf_sdio_assert_info(bus, &sh, data, count);
3094         if (error < 0)
3095                 goto done;
3096         nbytes = error;
3097
3098         error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3099         if (error < 0)
3100                 goto done;
3101         nbytes += error;
3102
3103         error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3104         if (error < 0)
3105                 goto done;
3106         nbytes += error;
3107
3108         error = nbytes;
3109         *ppos += nbytes;
3110 done:
3111         return error;
3112 }
3113
3114 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3115                                         size_t count, loff_t *ppos)
3116 {
3117         struct brcmf_sdio *bus = f->private_data;
3118         int res;
3119
3120         res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
3121         if (res > 0)
3122                 *ppos += res;
3123         return (ssize_t)res;
3124 }
3125
3126 static const struct file_operations brcmf_sdio_forensic_ops = {
3127         .owner = THIS_MODULE,
3128         .open = simple_open,
3129         .read = brcmf_sdio_forensic_read
3130 };
3131
3132 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3133 {
3134         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3135         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3136
3137         if (IS_ERR_OR_NULL(dentry))
3138                 return;
3139
3140         debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3141                             &brcmf_sdio_forensic_ops);
3142         brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3143 }
3144 #else
3145 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3146 {
3147         return 0;
3148 }
3149
3150 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3151 {
3152 }
3153 #endif /* DEBUG */
3154
3155 static int
3156 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3157 {
3158         int timeleft;
3159         uint rxlen = 0;
3160         bool pending;
3161         u8 *buf;
3162         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3163         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3164         struct brcmf_sdio *bus = sdiodev->bus;
3165
3166         brcmf_dbg(TRACE, "Enter\n");
3167
3168         /* Wait until control frame is available */
3169         timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3170
3171         spin_lock_bh(&bus->rxctl_lock);
3172         rxlen = bus->rxlen;
3173         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3174         bus->rxctl = NULL;
3175         buf = bus->rxctl_orig;
3176         bus->rxctl_orig = NULL;
3177         bus->rxlen = 0;
3178         spin_unlock_bh(&bus->rxctl_lock);
3179         vfree(buf);
3180
3181         if (rxlen) {
3182                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3183                           rxlen, msglen);
3184         } else if (timeleft == 0) {
3185                 brcmf_err("resumed on timeout\n");
3186                 brcmf_sdbrcm_checkdied(bus);
3187         } else if (pending) {
3188                 brcmf_dbg(CTL, "cancelled\n");
3189                 return -ERESTARTSYS;
3190         } else {
3191                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3192                 brcmf_sdbrcm_checkdied(bus);
3193         }
3194
3195         if (rxlen)
3196                 bus->sdcnt.rx_ctlpkts++;
3197         else
3198                 bus->sdcnt.rx_ctlerrs++;
3199
3200         return rxlen ? (int)rxlen : -ETIMEDOUT;
3201 }
3202
3203 static bool brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3204 {
3205         struct chip_info *ci = bus->ci;
3206
3207         /* To enter download state, disable ARM and reset SOCRAM.
3208          * To exit download state, simply reset ARM (default is RAM boot).
3209          */
3210         if (enter) {
3211                 bus->alp_only = true;
3212
3213                 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3214         } else {
3215                 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
3216                                                    bus->varsz))
3217                         return false;
3218
3219                 /* Allow HT Clock now that the ARM is running. */
3220                 bus->alp_only = false;
3221
3222                 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3223         }
3224
3225         return true;
3226 }
3227
3228 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3229 {
3230         const struct firmware *fw;
3231         int err;
3232         int offset;
3233         int address;
3234         int len;
3235
3236         fw = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_BIN);
3237         if (fw == NULL)
3238                 return -ENOENT;
3239
3240         if (brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4) !=
3241             BRCMF_MAX_CORENUM)
3242                 memcpy(&bus->ci->rst_vec, fw->data, sizeof(bus->ci->rst_vec));
3243
3244         err = 0;
3245         offset = 0;
3246         address = bus->ci->rambase;
3247         while (offset < fw->size) {
3248                 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3249                       fw->size - offset;
3250                 err = brcmf_sdiod_ramrw(bus->sdiodev, true, address,
3251                                         (u8 *)&fw->data[offset], len);
3252                 if (err) {
3253                         brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3254                                   err, len, address);
3255                         goto failure;
3256                 }
3257                 offset += len;
3258                 address += len;
3259         }
3260
3261 failure:
3262         release_firmware(fw);
3263
3264         return err;
3265 }
3266
3267 /*
3268  * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3269  * and ending in a NUL.
3270  * Removes carriage returns, empty lines, comment lines, and converts
3271  * newlines to NULs.
3272  * Shortens buffer as needed and pads with NULs.  End of buffer is marked
3273  * by two NULs.
3274 */
3275
3276 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus,
3277                                     const struct firmware *nv)
3278 {
3279         char *varbuf;
3280         char *dp;
3281         bool findNewline;
3282         int column;
3283         int ret = 0;
3284         uint buf_len, n, len;
3285
3286         len = nv->size;
3287         varbuf = vmalloc(len);
3288         if (!varbuf)
3289                 return -ENOMEM;
3290
3291         memcpy(varbuf, nv->data, len);
3292         dp = varbuf;
3293
3294         findNewline = false;
3295         column = 0;
3296
3297         for (n = 0; n < len; n++) {
3298                 if (varbuf[n] == 0)
3299                         break;
3300                 if (varbuf[n] == '\r')
3301                         continue;
3302                 if (findNewline && varbuf[n] != '\n')
3303                         continue;
3304                 findNewline = false;
3305                 if (varbuf[n] == '#') {
3306                         findNewline = true;
3307                         continue;
3308                 }
3309                 if (varbuf[n] == '\n') {
3310                         if (column == 0)
3311                                 continue;
3312                         *dp++ = 0;
3313                         column = 0;
3314                         continue;
3315                 }
3316                 *dp++ = varbuf[n];
3317                 column++;
3318         }
3319         buf_len = dp - varbuf;
3320         while (dp < varbuf + n)
3321                 *dp++ = 0;
3322
3323         kfree(bus->vars);
3324         /* roundup needed for download to device */
3325         bus->varsz = roundup(buf_len + 1, 4);
3326         bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3327         if (bus->vars == NULL) {
3328                 bus->varsz = 0;
3329                 ret = -ENOMEM;
3330                 goto err;
3331         }
3332
3333         /* copy the processed variables and add null termination */
3334         memcpy(bus->vars, varbuf, buf_len);
3335         bus->vars[buf_len] = 0;
3336 err:
3337         vfree(varbuf);
3338         return ret;
3339 }
3340
3341 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3342 {
3343         const struct firmware *nv;
3344         int ret;
3345
3346         nv = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3347         if (nv == NULL)
3348                 return -ENOENT;
3349
3350         ret = brcmf_process_nvram_vars(bus, nv);
3351
3352         release_firmware(nv);
3353
3354         return ret;
3355 }
3356
3357 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3358 {
3359         int bcmerror = -1;
3360
3361         /* Keep arm in reset */
3362         if (!brcmf_sdbrcm_download_state(bus, true)) {
3363                 brcmf_err("error placing ARM core in reset\n");
3364                 goto err;
3365         }
3366
3367         if (brcmf_sdbrcm_download_code_file(bus)) {
3368                 brcmf_err("dongle image file download failed\n");
3369                 goto err;
3370         }
3371
3372         if (brcmf_sdbrcm_download_nvram(bus)) {
3373                 brcmf_err("dongle nvram file download failed\n");
3374                 goto err;
3375         }
3376
3377         /* Take arm out of reset */
3378         if (!brcmf_sdbrcm_download_state(bus, false)) {
3379                 brcmf_err("error getting out of ARM core reset\n");
3380                 goto err;
3381         }
3382
3383         bcmerror = 0;
3384
3385 err:
3386         return bcmerror;
3387 }
3388
3389 static bool brcmf_sdbrcm_sr_capable(struct brcmf_sdio *bus)
3390 {
3391         u32 addr, reg;
3392
3393         brcmf_dbg(TRACE, "Enter\n");
3394
3395         /* old chips with PMU version less than 17 don't support save restore */
3396         if (bus->ci->pmurev < 17)
3397                 return false;
3398
3399         /* read PMU chipcontrol register 3*/
3400         addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3401         brcmf_sdiod_regwl(bus->sdiodev, addr, 3, NULL);
3402         addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3403         reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3404
3405         return (bool)reg;
3406 }
3407
3408 static void brcmf_sdbrcm_sr_init(struct brcmf_sdio *bus)
3409 {
3410         int err = 0;
3411         u8 val;
3412
3413         brcmf_dbg(TRACE, "Enter\n");
3414
3415         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3416         if (err) {
3417                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3418                 return;
3419         }
3420
3421         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3422         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3423         if (err) {
3424                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3425                 return;
3426         }
3427
3428         /* Add CMD14 Support */
3429         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3430                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3431                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3432                           &err);
3433         if (err) {
3434                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3435                 return;
3436         }
3437
3438         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3439                           SBSDIO_FORCE_HT, &err);
3440         if (err) {
3441                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3442                 return;
3443         }
3444
3445         /* set flag */
3446         bus->sr_enabled = true;
3447         brcmf_dbg(INFO, "SR enabled\n");
3448 }
3449
3450 /* enable KSO bit */
3451 static int brcmf_sdbrcm_kso_init(struct brcmf_sdio *bus)
3452 {
3453         u8 val;
3454         int err = 0;
3455
3456         brcmf_dbg(TRACE, "Enter\n");
3457
3458         /* KSO bit added in SDIO core rev 12 */
3459         if (bus->ci->c_inf[1].rev < 12)
3460                 return 0;
3461
3462         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3463         if (err) {
3464                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3465                 return err;
3466         }
3467
3468         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3469                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3470                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3471                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3472                                   val, &err);
3473                 if (err) {
3474                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3475                         return err;
3476                 }
3477         }
3478
3479         return 0;
3480 }
3481
3482
3483 static bool
3484 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3485 {
3486         bool ret;
3487
3488         sdio_claim_host(bus->sdiodev->func[1]);
3489
3490         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3491
3492         ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3493
3494         brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3495
3496         sdio_release_host(bus->sdiodev->func[1]);
3497
3498         return ret;
3499 }
3500
3501 static int brcmf_sdbrcm_bus_preinit(struct device *dev)
3502 {
3503         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3504         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3505         struct brcmf_sdio *bus = sdiodev->bus;
3506         uint pad_size;
3507         u32 value;
3508         u8 idx;
3509         int err;
3510
3511         /* the commands below use the terms tx and rx from
3512          * a device perspective, ie. bus:txglom affects the
3513          * bus transfers from device to host.
3514          */
3515         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3516         if (bus->ci->c_inf[idx].rev < 12) {
3517                 /* for sdio core rev < 12, disable txgloming */
3518                 value = 0;
3519                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3520                                            sizeof(u32));
3521         } else {
3522                 /* otherwise, set txglomalign */
3523                 value = 4;
3524                 if (sdiodev->pdata)
3525                         value = sdiodev->pdata->sd_sgentry_align;
3526                 /* SDIO ADMA requires at least 32 bit alignment */
3527                 value = max_t(u32, value, 4);
3528                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3529                                            sizeof(u32));
3530         }
3531
3532         if (err < 0)
3533                 goto done;
3534
3535         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3536         if (sdiodev->sg_support) {
3537                 bus->txglom = false;
3538                 value = 1;
3539                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3540                 bus->txglom_sgpad = brcmu_pkt_buf_get_skb(pad_size);
3541                 if (!bus->txglom_sgpad)
3542                         brcmf_err("allocating txglom padding skb failed, reduced performance\n");
3543
3544                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3545                                            &value, sizeof(u32));
3546                 if (err < 0) {
3547                         /* bus:rxglom is allowed to fail */
3548                         err = 0;
3549                 } else {
3550                         bus->txglom = true;
3551                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3552                 }
3553         }
3554         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3555
3556 done:
3557         return err;
3558 }
3559
3560 static int brcmf_sdbrcm_bus_init(struct device *dev)
3561 {
3562         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3563         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3564         struct brcmf_sdio *bus = sdiodev->bus;
3565         int err, ret = 0;
3566         u8 saveclk;
3567
3568         brcmf_dbg(TRACE, "Enter\n");
3569
3570         /* try to download image and nvram to the dongle */
3571         if (bus_if->state == BRCMF_BUS_DOWN) {
3572                 if (!(brcmf_sdbrcm_download_firmware(bus)))
3573                         return -1;
3574         }
3575
3576         if (!bus->sdiodev->bus_if->drvr)
3577                 return 0;
3578
3579         /* Start the watchdog timer */
3580         bus->sdcnt.tickcnt = 0;
3581         brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3582
3583         sdio_claim_host(bus->sdiodev->func[1]);
3584
3585         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3586         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3587         if (bus->clkstate != CLK_AVAIL)
3588                 goto exit;
3589
3590         /* Force clocks on backplane to be sure F2 interrupt propagates */
3591         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
3592                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
3593         if (!err) {
3594                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3595                                   (saveclk | SBSDIO_FORCE_HT), &err);
3596         }
3597         if (err) {
3598                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3599                 goto exit;
3600         }
3601
3602         /* Enable function 2 (frame transfers) */
3603         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3604                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
3605         err = sdio_enable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3606
3607
3608         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
3609
3610         /* If F2 successfully enabled, set core and enable interrupts */
3611         if (!err) {
3612                 /* Set up the interrupt mask and enable interrupts */
3613                 bus->hostintmask = HOSTINTMASK;
3614                 w_sdreg32(bus, bus->hostintmask,
3615                           offsetof(struct sdpcmd_regs, hostintmask));
3616
3617                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3618         } else {
3619                 /* Disable F2 again */
3620                 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3621                 ret = -ENODEV;
3622         }
3623
3624         if (brcmf_sdbrcm_sr_capable(bus)) {
3625                 brcmf_sdbrcm_sr_init(bus);
3626         } else {
3627                 /* Restore previous clock setting */
3628                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3629                                   saveclk, &err);
3630         }
3631
3632         if (ret == 0) {
3633                 ret = brcmf_sdiod_intr_register(bus->sdiodev);
3634                 if (ret != 0)
3635                         brcmf_err("intr register failed:%d\n", ret);
3636         }
3637
3638         /* If we didn't come up, turn off backplane clock */
3639         if (bus_if->state != BRCMF_BUS_DATA)
3640                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3641
3642 exit:
3643         sdio_release_host(bus->sdiodev->func[1]);
3644
3645         return ret;
3646 }
3647
3648 void brcmf_sdbrcm_isr(struct brcmf_sdio *bus)
3649 {
3650         brcmf_dbg(TRACE, "Enter\n");
3651
3652         if (!bus) {
3653                 brcmf_err("bus is null pointer, exiting\n");
3654                 return;
3655         }
3656
3657         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3658                 brcmf_err("bus is down. we have nothing to do\n");
3659                 return;
3660         }
3661         /* Count the interrupt call */
3662         bus->sdcnt.intrcount++;
3663         if (in_interrupt())
3664                 atomic_set(&bus->ipend, 1);
3665         else
3666                 if (brcmf_sdio_intr_rstatus(bus)) {
3667                         brcmf_err("failed backplane access\n");
3668                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3669                 }
3670
3671         /* Disable additional interrupts (is this needed now)? */
3672         if (!bus->intr)
3673                 brcmf_err("isr w/o interrupt configured!\n");
3674
3675         atomic_inc(&bus->dpc_tskcnt);
3676         queue_work(bus->brcmf_wq, &bus->datawork);
3677 }
3678
3679 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3680 {
3681 #ifdef DEBUG
3682         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3683 #endif  /* DEBUG */
3684
3685         brcmf_dbg(TIMER, "Enter\n");
3686
3687         /* Poll period: check device if appropriate. */
3688         if (!bus->sr_enabled &&
3689             bus->poll && (++bus->polltick >= bus->pollrate)) {
3690                 u32 intstatus = 0;
3691
3692                 /* Reset poll tick */
3693                 bus->polltick = 0;
3694
3695                 /* Check device if no interrupts */
3696                 if (!bus->intr ||
3697                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3698
3699                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3700                                 u8 devpend;
3701
3702                                 sdio_claim_host(bus->sdiodev->func[1]);
3703                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3704                                                             SDIO_CCCR_INTx,
3705                                                             NULL);
3706                                 sdio_release_host(bus->sdiodev->func[1]);
3707                                 intstatus =
3708                                     devpend & (INTR_STATUS_FUNC1 |
3709                                                INTR_STATUS_FUNC2);
3710                         }
3711
3712                         /* If there is something, make like the ISR and
3713                                  schedule the DPC */
3714                         if (intstatus) {
3715                                 bus->sdcnt.pollcnt++;
3716                                 atomic_set(&bus->ipend, 1);
3717
3718                                 atomic_inc(&bus->dpc_tskcnt);
3719                                 queue_work(bus->brcmf_wq, &bus->datawork);
3720                         }
3721                 }
3722
3723                 /* Update interrupt tracking */
3724                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3725         }
3726 #ifdef DEBUG
3727         /* Poll for console output periodically */
3728         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3729             bus->console_interval != 0) {
3730                 bus->console.count += BRCMF_WD_POLL_MS;
3731                 if (bus->console.count >= bus->console_interval) {
3732                         bus->console.count -= bus->console_interval;
3733                         sdio_claim_host(bus->sdiodev->func[1]);
3734                         /* Make sure backplane clock is on */
3735                         brcmf_sdbrcm_bus_sleep(bus, false, false);
3736                         if (brcmf_sdbrcm_readconsole(bus) < 0)
3737                                 /* stop on error */
3738                                 bus->console_interval = 0;
3739                         sdio_release_host(bus->sdiodev->func[1]);
3740                 }
3741         }
3742 #endif                          /* DEBUG */
3743
3744         /* On idle timeout clear activity flag and/or turn off clock */
3745         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3746                 if (++bus->idlecount >= bus->idletime) {
3747                         bus->idlecount = 0;
3748                         if (bus->activity) {
3749                                 bus->activity = false;
3750                                 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3751                         } else {
3752                                 brcmf_dbg(SDIO, "idle\n");
3753                                 sdio_claim_host(bus->sdiodev->func[1]);
3754                                 brcmf_sdbrcm_bus_sleep(bus, true, false);
3755                                 sdio_release_host(bus->sdiodev->func[1]);
3756                         }
3757                 }
3758         }
3759
3760         return (atomic_read(&bus->ipend) > 0);
3761 }
3762
3763 static void brcmf_sdio_dataworker(struct work_struct *work)
3764 {
3765         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3766                                               datawork);
3767
3768         while (atomic_read(&bus->dpc_tskcnt)) {
3769                 brcmf_sdbrcm_dpc(bus);
3770                 atomic_dec(&bus->dpc_tskcnt);
3771         }
3772 }
3773
3774 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3775 {
3776         brcmf_dbg(TRACE, "Enter\n");
3777
3778         kfree(bus->rxbuf);
3779         bus->rxctl = bus->rxbuf = NULL;
3780         bus->rxlen = 0;
3781 }
3782
3783 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3784 {
3785         brcmf_dbg(TRACE, "Enter\n");
3786
3787         if (bus->sdiodev->bus_if->maxctl) {
3788                 bus->rxblen =
3789                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3790                             ALIGNMENT) + bus->head_align;
3791                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3792                 if (!(bus->rxbuf))
3793                         return false;
3794         }
3795
3796         return true;
3797 }
3798
3799 static bool
3800 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus)
3801 {
3802         u8 clkctl = 0;
3803         int err = 0;
3804         int reg_addr;
3805         u32 reg_val;
3806         u32 drivestrength;
3807
3808         bus->alp_only = true;
3809
3810         sdio_claim_host(bus->sdiodev->func[1]);
3811
3812         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3813                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3814
3815         /*
3816          * Force PLL off until brcmf_sdio_chip_attach()
3817          * programs PLL control regs
3818          */
3819
3820         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3821                           BRCMF_INIT_CLKCTL1, &err);
3822         if (!err)
3823                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3824                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3825
3826         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3827                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3828                           err, BRCMF_INIT_CLKCTL1, clkctl);
3829                 goto fail;
3830         }
3831
3832         if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci)) {
3833                 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3834                 goto fail;
3835         }
3836
3837         if (brcmf_sdbrcm_kso_init(bus)) {
3838                 brcmf_err("error enabling KSO\n");
3839                 goto fail;
3840         }
3841
3842         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3843                 drivestrength = bus->sdiodev->pdata->drive_strength;
3844         else
3845                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3846         brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3847
3848         /* Get info on the SOCRAM cores... */
3849         bus->ramsize = bus->ci->ramsize;
3850         if (!(bus->ramsize)) {
3851                 brcmf_err("failed to find SOCRAM memory!\n");
3852                 goto fail;
3853         }
3854
3855         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3856         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3857                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3858         if (err)
3859                 goto fail;
3860
3861         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3862
3863         brcmf_sdiod_regwb(bus->sdiodev,
3864                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3865         if (err)
3866                 goto fail;
3867
3868         /* set PMUControl so a backplane reset does PMU state reload */
3869         reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3870                                pmucontrol);
3871         reg_val = brcmf_sdiod_regrl(bus->sdiodev,
3872                                     reg_addr,
3873                                     &err);
3874         if (err)
3875                 goto fail;
3876
3877         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3878
3879         brcmf_sdiod_regwl(bus->sdiodev,
3880                           reg_addr,
3881                           reg_val,
3882                           &err);
3883         if (err)
3884                 goto fail;
3885
3886
3887         sdio_release_host(bus->sdiodev->func[1]);
3888
3889         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3890
3891         /* allocate header buffer */
3892         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3893         if (!bus->hdrbuf)
3894                 return false;
3895         /* Locate an appropriately-aligned portion of hdrbuf */
3896         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3897                                     bus->head_align);
3898
3899         /* Set the poll and/or interrupt flags */
3900         bus->intr = true;
3901         bus->poll = false;
3902         if (bus->poll)
3903                 bus->pollrate = 1;
3904
3905         return true;
3906
3907 fail:
3908         sdio_release_host(bus->sdiodev->func[1]);
3909         return false;
3910 }
3911
3912 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3913 {
3914         brcmf_dbg(TRACE, "Enter\n");
3915
3916         sdio_claim_host(bus->sdiodev->func[1]);
3917
3918         /* Disable F2 to clear any intermediate frame state on the dongle */
3919         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3920
3921         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3922         bus->rxflow = false;
3923
3924         /* Done with backplane-dependent accesses, can drop clock... */
3925         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3926
3927         sdio_release_host(bus->sdiodev->func[1]);
3928
3929         /* ...and initialize clock/power states */
3930         bus->clkstate = CLK_SDONLY;
3931         bus->idletime = BRCMF_IDLE_INTERVAL;
3932         bus->idleclock = BRCMF_IDLE_ACTIVE;
3933
3934         /* Query the F2 block size, set roundup accordingly */
3935         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3936         bus->roundup = min(max_roundup, bus->blocksize);
3937
3938         /* SR state */
3939         bus->sleeping = false;
3940         bus->sr_enabled = false;
3941
3942         return true;
3943 }
3944
3945 static int
3946 brcmf_sdbrcm_watchdog_thread(void *data)
3947 {
3948         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3949
3950         allow_signal(SIGTERM);
3951         /* Run until signal received */
3952         while (1) {
3953                 if (kthread_should_stop())
3954                         break;
3955                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3956                         brcmf_sdbrcm_bus_watchdog(bus);
3957                         /* Count the tick for reference */
3958                         bus->sdcnt.tickcnt++;
3959                 } else
3960                         break;
3961         }
3962         return 0;
3963 }
3964
3965 static void
3966 brcmf_sdbrcm_watchdog(unsigned long data)
3967 {
3968         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3969
3970         if (bus->watchdog_tsk) {
3971                 complete(&bus->watchdog_wait);
3972                 /* Reschedule the watchdog */
3973                 if (bus->wd_timer_valid)
3974                         mod_timer(&bus->timer,
3975                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3976         }
3977 }
3978
3979 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3980 {
3981         brcmf_dbg(TRACE, "Enter\n");
3982
3983         if (bus->ci) {
3984                 sdio_claim_host(bus->sdiodev->func[1]);
3985                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3986                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3987                 sdio_release_host(bus->sdiodev->func[1]);
3988                 brcmf_sdio_chip_detach(&bus->ci);
3989                 if (bus->vars && bus->varsz)
3990                         kfree(bus->vars);
3991                 bus->vars = NULL;
3992         }
3993
3994         brcmf_dbg(TRACE, "Disconnected\n");
3995 }
3996
3997 /* Detach and free everything */
3998 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3999 {
4000         brcmf_dbg(TRACE, "Enter\n");
4001
4002         if (bus) {
4003                 /* De-register interrupt handler */
4004                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4005
4006                 cancel_work_sync(&bus->datawork);
4007                 if (bus->brcmf_wq)
4008                         destroy_workqueue(bus->brcmf_wq);
4009
4010                 if (bus->sdiodev->bus_if->drvr) {
4011                         brcmf_detach(bus->sdiodev->dev);
4012                         brcmf_sdbrcm_release_dongle(bus);
4013                 }
4014
4015                 brcmu_pkt_buf_free_skb(bus->txglom_sgpad);
4016                 brcmf_sdbrcm_release_malloc(bus);
4017                 kfree(bus->hdrbuf);
4018                 kfree(bus);
4019         }
4020
4021         brcmf_dbg(TRACE, "Disconnected\n");
4022 }
4023
4024 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4025         .stop = brcmf_sdbrcm_bus_stop,
4026         .preinit = brcmf_sdbrcm_bus_preinit,
4027         .init = brcmf_sdbrcm_bus_init,
4028         .txdata = brcmf_sdbrcm_bus_txdata,
4029         .txctl = brcmf_sdbrcm_bus_txctl,
4030         .rxctl = brcmf_sdbrcm_bus_rxctl,
4031         .gettxq = brcmf_sdbrcm_bus_gettxq,
4032 };
4033
4034 struct brcmf_sdio *brcmf_sdbrcm_probe(struct brcmf_sdio_dev *sdiodev)
4035 {
4036         int ret;
4037         struct brcmf_sdio *bus;
4038
4039         brcmf_dbg(TRACE, "Enter\n");
4040
4041         /* Allocate private bus interface state */
4042         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4043         if (!bus)
4044                 goto fail;
4045
4046         bus->sdiodev = sdiodev;
4047         sdiodev->bus = bus;
4048         skb_queue_head_init(&bus->glom);
4049         bus->txbound = BRCMF_TXBOUND;
4050         bus->rxbound = BRCMF_RXBOUND;
4051         bus->txminmax = BRCMF_TXMINMAX;
4052         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4053
4054         /* platform specific configuration:
4055          *   alignments must be at least 4 bytes for ADMA
4056          */
4057         bus->head_align = ALIGNMENT;
4058         bus->sgentry_align = ALIGNMENT;
4059         if (sdiodev->pdata) {
4060                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
4061                         bus->head_align = sdiodev->pdata->sd_head_align;
4062                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
4063                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
4064         }
4065
4066         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4067         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
4068         if (bus->brcmf_wq == NULL) {
4069                 brcmf_err("insufficient memory to create txworkqueue\n");
4070                 goto fail;
4071         }
4072
4073         /* attempt to attach to the dongle */
4074         if (!(brcmf_sdbrcm_probe_attach(bus))) {
4075                 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
4076                 goto fail;
4077         }
4078
4079         spin_lock_init(&bus->rxctl_lock);
4080         spin_lock_init(&bus->txqlock);
4081         init_waitqueue_head(&bus->ctrl_wait);
4082         init_waitqueue_head(&bus->dcmd_resp_wait);
4083
4084         /* Set up the watchdog timer */
4085         init_timer(&bus->timer);
4086         bus->timer.data = (unsigned long)bus;
4087         bus->timer.function = brcmf_sdbrcm_watchdog;
4088
4089         /* Initialize watchdog thread */
4090         init_completion(&bus->watchdog_wait);
4091         bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
4092                                         bus, "brcmf_watchdog");
4093         if (IS_ERR(bus->watchdog_tsk)) {
4094                 pr_warn("brcmf_watchdog thread failed to start\n");
4095                 bus->watchdog_tsk = NULL;
4096         }
4097         /* Initialize DPC thread */
4098         atomic_set(&bus->dpc_tskcnt, 0);
4099
4100         /* Assign bus interface call back */
4101         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4102         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4103         bus->sdiodev->bus_if->chip = bus->ci->chip;
4104         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4105
4106         /* default sdio bus header length for tx packet */
4107         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4108
4109         /* Attach to the common layer, reserve hdr space */
4110         ret = brcmf_attach(bus->sdiodev->dev);
4111         if (ret != 0) {
4112                 brcmf_err("brcmf_attach failed\n");
4113                 goto fail;
4114         }
4115
4116         /* Allocate buffers */
4117         if (!(brcmf_sdbrcm_probe_malloc(bus))) {
4118                 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
4119                 goto fail;
4120         }
4121
4122         if (!(brcmf_sdbrcm_probe_init(bus))) {
4123                 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
4124                 goto fail;
4125         }
4126
4127         brcmf_sdio_debugfs_create(bus);
4128         brcmf_dbg(INFO, "completed!!\n");
4129
4130         /* if firmware path present try to download and bring up bus */
4131         ret = brcmf_bus_start(bus->sdiodev->dev);
4132         if (ret != 0) {
4133                 brcmf_err("dongle is not responding\n");
4134                 goto fail;
4135         }
4136
4137         return bus;
4138
4139 fail:
4140         brcmf_sdbrcm_release(bus);
4141         return NULL;
4142 }
4143
4144 void brcmf_sdbrcm_disconnect(struct brcmf_sdio *bus)
4145 {
4146         brcmf_dbg(TRACE, "Enter\n");
4147
4148         brcmf_sdbrcm_release(bus);
4149
4150         brcmf_dbg(TRACE, "Disconnected\n");
4151 }
4152
4153 void
4154 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4155 {
4156         /* Totally stop the timer */
4157         if (!wdtick && bus->wd_timer_valid) {
4158                 del_timer_sync(&bus->timer);
4159                 bus->wd_timer_valid = false;
4160                 bus->save_ms = wdtick;
4161                 return;
4162         }
4163
4164         /* don't start the wd until fw is loaded */
4165         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4166                 return;
4167
4168         if (wdtick) {
4169                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4170                         if (bus->wd_timer_valid)
4171                                 /* Stop timer and restart at new value */
4172                                 del_timer_sync(&bus->timer);
4173
4174                         /* Create timer again when watchdog period is
4175                            dynamically changed or in the first instance
4176                          */
4177                         bus->timer.expires =
4178                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4179                         add_timer(&bus->timer);
4180
4181                 } else {
4182                         /* Re arm the timer, at last watchdog period */
4183                         mod_timer(&bus->timer,
4184                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4185                 }
4186
4187                 bus->wd_timer_valid = true;
4188                 bus->save_ms = wdtick;
4189         }
4190 }