2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <linux/debugfs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/platform_data/brcmfmac-sdio.h>
35 #include <asm/unaligned.h>
37 #include <brcmu_wifi.h>
38 #include <brcmu_utils.h>
39 #include <brcm_hw_ids.h>
41 #include "sdio_host.h"
42 #include "sdio_chip.h"
44 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
48 #define BRCMF_TRAP_INFO_SIZE 80
50 #define CBUF_LEN (128)
52 /* Device console log buffer state */
53 #define CONSOLE_BUFFER_MAX 2024
56 __le32 buf; /* Can't be pointer on (64-bit) hosts */
59 char *_buf_compat; /* Redundant pointer for backward compat. */
64 * When there is no UART (e.g. Quickturn),
65 * the host should write a complete
66 * input line directly into cbuf and then write
67 * the length into vcons_in.
68 * This may also be used when there is a real UART
69 * (at risk of conflicting with
70 * the real UART). vcons_out is currently unused.
75 /* Output (logging) buffer
76 * Console output is written to a ring buffer log_buf at index log_idx.
77 * The host may read the output when it sees log_idx advance.
78 * Output will be lost if the output wraps around faster than the host
81 struct rte_log_le log_le;
83 /* Console input line buffer
84 * Characters are read one at a time into cbuf
85 * until <CR> is received, then
86 * the buffer is processed as a command line.
87 * Also used for virtual UART.
94 #include <chipcommon.h>
98 #include "tracepoint.h"
100 #define TXQLEN 2048 /* bulk tx queue length */
101 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
102 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
105 #define TXRETRIES 2 /* # of retries for tx frames */
107 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
110 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
113 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
115 #define MEMBLOCK 2048 /* Block size used for downloading
117 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
118 biggest possible glom */
120 #define BRCMF_FIRSTREAD (1 << 6)
123 /* SBSDIO_DEVICE_CTL */
125 /* 1: device will assert busy signal when receiving CMD53 */
126 #define SBSDIO_DEVCTL_SETBUSY 0x01
127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
130 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
132 * sdio bus power cycle to clear (rev 9) */
133 #define SBSDIO_DEVCTL_PADS_ISO 0x08
134 /* Force SD->SB reset mapping (rev 11) */
135 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
136 /* Determined by CoreControl bit */
137 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
138 /* Force backplane reset */
139 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
140 /* Force no backplane reset */
141 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
143 /* direct(mapped) cis space */
145 /* MAPPED common CIS address */
146 #define SBSDIO_CIS_BASE_COMMON 0x1000
147 /* maximum bytes in one CIS */
148 #define SBSDIO_CIS_SIZE_LIMIT 0x200
149 /* cis offset addr is < 17 bits */
150 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
152 /* manfid tuple length, include tuple, link bytes */
153 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
156 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
157 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
158 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
159 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
160 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
161 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
162 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
163 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
164 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
165 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
166 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
167 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
168 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
169 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
170 #define I_PC (1 << 10) /* descriptor error */
171 #define I_PD (1 << 11) /* data error */
172 #define I_DE (1 << 12) /* Descriptor protocol Error */
173 #define I_RU (1 << 13) /* Receive descriptor Underflow */
174 #define I_RO (1 << 14) /* Receive fifo Overflow */
175 #define I_XU (1 << 15) /* Transmit fifo Underflow */
176 #define I_RI (1 << 16) /* Receive Interrupt */
177 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
178 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
179 #define I_XI (1 << 24) /* Transmit Interrupt */
180 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
181 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
182 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
183 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
184 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
185 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
186 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
187 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
188 #define I_DMA (I_RI | I_XI | I_ERRORS)
191 #define CC_CISRDY (1 << 0) /* CIS Ready */
192 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
193 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
194 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
195 #define CC_XMTDATAAVAIL_MODE (1 << 4)
196 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
199 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
200 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
201 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
202 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
205 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
207 /* Total length of frame header for dongle protocol */
208 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
209 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
212 * Software allocation of To SB Mailbox resources
215 /* tosbmailbox bits corresponding to intstatus bits */
216 #define SMB_NAK (1 << 0) /* Frame NAK */
217 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
218 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
219 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
221 /* tosbmailboxdata */
222 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
225 * Software allocation of To Host Mailbox resources
229 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
230 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
231 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
232 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
234 /* tohostmailboxdata */
235 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
236 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
237 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
238 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
240 #define HMB_DATA_FCDATA_MASK 0xff000000
241 #define HMB_DATA_FCDATA_SHIFT 24
243 #define HMB_DATA_VERSION_MASK 0x00ff0000
244 #define HMB_DATA_VERSION_SHIFT 16
247 * Software-defined protocol header
250 /* Current protocol version */
251 #define SDPCM_PROT_VERSION 4
253 /* SW frame header */
254 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
256 #define SDPCM_CHANNEL_MASK 0x00000f00
257 #define SDPCM_CHANNEL_SHIFT 8
258 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
260 #define SDPCM_NEXTLEN_OFFSET 2
262 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
263 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
264 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
265 #define SDPCM_DOFFSET_MASK 0xff000000
266 #define SDPCM_DOFFSET_SHIFT 24
267 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
268 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
269 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
270 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
272 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
274 /* logical channel numbers */
275 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
276 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
277 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
278 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
279 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
281 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
283 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
286 * Shared structure between dongle and the host.
287 * The structure contains pointers to trap or assert information.
289 #define SDPCM_SHARED_VERSION 0x0003
290 #define SDPCM_SHARED_VERSION_MASK 0x00FF
291 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
292 #define SDPCM_SHARED_ASSERT 0x0200
293 #define SDPCM_SHARED_TRAP 0x0400
295 /* Space for header read, limit for data packets */
296 #define MAX_HDR_READ (1 << 6)
297 #define MAX_RX_DATASZ 2048
299 /* Maximum milliseconds to wait for F2 to come up */
300 #define BRCMF_WAIT_F2RDY 3000
302 /* Bump up limit on waiting for HT to account for first startup;
303 * if the image is doing a CRC calculation before programming the PMU
304 * for HT availability, it could take a couple hundred ms more, so
305 * max out at a 1 second (1000000us).
307 #undef PMU_MAX_TRANSITION_DLY
308 #define PMU_MAX_TRANSITION_DLY 1000000
310 /* Value for ChipClockCSR during initial setup */
311 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
312 SBSDIO_ALP_AVAIL_REQ)
314 /* Flags for SDH calls */
315 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
317 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
318 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
319 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
320 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
322 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
323 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
326 #define BRCMF_IDLE_INTERVAL 1
328 #define KSO_WAIT_US 50
329 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
332 * Conversion of 802.1D priority to precedence level
334 static uint prio2prec(u32 prio)
336 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
341 /* Device console log buffer state */
342 struct brcmf_console {
343 uint count; /* Poll interval msec counter */
344 uint log_addr; /* Log struct address (fixed) */
345 struct rte_log_le log_le; /* Log struct (host copy) */
346 uint bufsize; /* Size of log buffer */
347 u8 *buf; /* Log buffer (host copy) */
348 uint last; /* Last buffer read index */
351 struct brcmf_trap_info {
365 __le32 r9; /* sb/v6 */
366 __le32 r10; /* sl/v7 */
367 __le32 r11; /* fp/v8 */
375 struct sdpcm_shared {
379 u32 assert_file_addr;
381 u32 console_addr; /* Address of struct rte_console */
387 struct sdpcm_shared_le {
390 __le32 assert_exp_addr;
391 __le32 assert_file_addr;
393 __le32 console_addr; /* Address of struct rte_console */
394 __le32 msgtrace_addr;
399 /* SDIO read frame info */
400 struct brcmf_sdio_read {
409 /* misc chip info needed by some of the routines */
410 /* Private data for SDIO bus interaction */
412 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
413 struct chip_info *ci; /* Chip info struct */
414 char *vars; /* Variables (from CIS and/or other) */
415 uint varsz; /* Size of variables buffer */
417 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
419 u32 hostintmask; /* Copy of Host Interrupt Mask */
420 atomic_t intstatus; /* Intstatus bits (events) pending */
421 atomic_t fcstate; /* State of dongle flow-control */
423 uint blocksize; /* Block size of SDIO transfers */
424 uint roundup; /* Max roundup limit */
426 struct pktq txq; /* Queue length used for flow-control */
427 u8 flowcontrol; /* per prio flow control bitmask */
428 u8 tx_seq; /* Transmit sequence number (next) */
429 u8 tx_max; /* Maximum transmit sequence allowed */
431 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
432 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
433 u8 rx_seq; /* Receive sequence number (expected) */
434 struct brcmf_sdio_read cur_read;
435 /* info of current read frame */
436 bool rxskip; /* Skip receive (awaiting NAK ACK) */
437 bool rxpending; /* Data frame pending in dongle */
439 uint rxbound; /* Rx frames to read before resched */
440 uint txbound; /* Tx frames to send before resched */
443 struct sk_buff *glomd; /* Packet containing glomming descriptor */
444 struct sk_buff_head glom; /* Packet list for glommed superframe */
445 uint glomerr; /* Glom packet read errors */
447 u8 *rxbuf; /* Buffer for receiving control packets */
448 uint rxblen; /* Allocated length of rxbuf */
449 u8 *rxctl; /* Aligned pointer into rxbuf */
450 u8 *rxctl_orig; /* pointer for freeing rxctl */
451 u8 *databuf; /* Buffer for receiving big glom packet */
452 u8 *dataptr; /* Aligned pointer into databuf */
453 uint rxlen; /* Length of valid data in buffer */
454 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
456 u8 sdpcm_ver; /* Bus protocol reported by dongle */
458 bool intr; /* Use interrupts */
459 bool poll; /* Use polling */
460 atomic_t ipend; /* Device interrupt is pending */
461 uint spurious; /* Count of spurious interrupts */
462 uint pollrate; /* Ticks between device polls */
463 uint polltick; /* Tick counter */
466 uint console_interval;
467 struct brcmf_console console; /* Console output polling support */
468 uint console_addr; /* Console address from shared struct */
471 uint clkstate; /* State of sd and backplane clock(s) */
472 bool activity; /* Activity flag for clock down */
473 s32 idletime; /* Control for activity timeout */
474 s32 idlecount; /* Activity timeout counter */
475 s32 idleclock; /* How to set bus driver when idle */
477 bool use_rxchain; /* If brcmf should use PKT chains */
478 bool rxflow_mode; /* Rx flow control mode */
479 bool rxflow; /* Is rx flow control on */
480 bool alp_only; /* Don't use HT clock (ALP only) */
484 bool ctrl_frame_stat;
487 wait_queue_head_t ctrl_wait;
488 wait_queue_head_t dcmd_resp_wait;
490 struct timer_list timer;
491 struct completion watchdog_wait;
492 struct task_struct *watchdog_tsk;
496 struct workqueue_struct *brcmf_wq;
497 struct work_struct datawork;
498 struct list_head dpc_tsklst;
499 spinlock_t dpc_tl_lock;
501 const struct firmware *firmware;
504 bool txoff; /* Transmit flow-controlled */
505 struct brcmf_sdio_count sdcnt;
506 bool sr_enabled; /* SaveRestore enabled */
507 bool sleeping; /* SDIO bus sleeping */
513 #define CLK_PENDING 2
517 static int qcount[NUMPRIO];
518 static int tx_packets[NUMPRIO];
521 #define DEFAULT_SDIO_DRIVE_STRENGTH 6 /* in milliamps */
523 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
525 /* Retry count for register access failures */
526 static const uint retry_limit = 2;
528 /* Limit on rounding up frames */
529 static const uint max_roundup = 512;
533 enum brcmf_sdio_frmtype {
534 BRCMF_SDIO_FT_NORMAL,
539 static void pkt_align(struct sk_buff *p, int len, int align)
542 datalign = (unsigned long)(p->data);
543 datalign = roundup(datalign, (align)) - datalign;
545 skb_pull(p, datalign);
549 /* To check if there's window offered */
550 static bool data_ok(struct brcmf_sdio *bus)
552 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
553 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
557 * Reads a register in the SDIO hardware block. This block occupies a series of
558 * adresses on the 32 bit backplane bus.
561 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
563 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
566 *regvar = brcmf_sdio_regrl(bus->sdiodev,
567 bus->ci->c_inf[idx].base + offset, &ret);
573 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
575 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
578 brcmf_sdio_regwl(bus->sdiodev,
579 bus->ci->c_inf[idx].base + reg_offset,
586 brcmf_sdbrcm_kso_control(struct brcmf_sdio *bus, bool on)
588 u8 wr_val = 0, rd_val, cmp_val, bmask;
592 brcmf_dbg(TRACE, "Enter\n");
594 wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
595 /* 1st KSO write goes to AOS wake up core if device is asleep */
596 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
599 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
604 /* device WAKEUP through KSO:
605 * write bit 0 & read back until
606 * both bits 0 (kso bit) & 1 (dev on status) are set
608 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
609 SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
611 usleep_range(2000, 3000);
613 /* Put device to sleep, turn off KSO */
615 /* only check for bit0, bit1(dev on status) may not
616 * get cleared right away
618 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
622 /* reliable KSO bit set/clr:
623 * the sdiod sleep write access is synced to PMU 32khz clk
624 * just one write attempt may fail,
625 * read it back until it matches written value
627 rd_val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
629 if (((rd_val & bmask) == cmp_val) && !err)
631 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
632 try_cnt, MAX_KSO_ATTEMPTS, err);
634 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
636 } while (try_cnt++ < MAX_KSO_ATTEMPTS);
641 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
643 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
645 /* Turn backplane clock on or off */
646 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
649 u8 clkctl, clkreq, devctl;
650 unsigned long timeout;
652 brcmf_dbg(SDIO, "Enter\n");
656 if (bus->sr_enabled) {
657 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
662 /* Request HT Avail */
664 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
666 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
669 brcmf_err("HT Avail request error: %d\n", err);
673 /* Check current status */
674 clkctl = brcmf_sdio_regrb(bus->sdiodev,
675 SBSDIO_FUNC1_CHIPCLKCSR, &err);
677 brcmf_err("HT Avail read error: %d\n", err);
681 /* Go to pending and await interrupt if appropriate */
682 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
683 /* Allow only clock-available interrupt */
684 devctl = brcmf_sdio_regrb(bus->sdiodev,
685 SBSDIO_DEVICE_CTL, &err);
687 brcmf_err("Devctl error setting CA: %d\n",
692 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
693 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
695 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
696 bus->clkstate = CLK_PENDING;
699 } else if (bus->clkstate == CLK_PENDING) {
700 /* Cancel CA-only interrupt filter */
701 devctl = brcmf_sdio_regrb(bus->sdiodev,
702 SBSDIO_DEVICE_CTL, &err);
703 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
704 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
708 /* Otherwise, wait here (polling) for HT Avail */
710 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
711 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
712 clkctl = brcmf_sdio_regrb(bus->sdiodev,
713 SBSDIO_FUNC1_CHIPCLKCSR,
715 if (time_after(jiffies, timeout))
718 usleep_range(5000, 10000);
721 brcmf_err("HT Avail request error: %d\n", err);
724 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
725 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
726 PMU_MAX_TRANSITION_DLY, clkctl);
730 /* Mark clock available */
731 bus->clkstate = CLK_AVAIL;
732 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
735 if (!bus->alp_only) {
736 if (SBSDIO_ALPONLY(clkctl))
737 brcmf_err("HT Clock should be on\n");
739 #endif /* defined (DEBUG) */
741 bus->activity = true;
745 if (bus->clkstate == CLK_PENDING) {
746 /* Cancel CA-only interrupt filter */
747 devctl = brcmf_sdio_regrb(bus->sdiodev,
748 SBSDIO_DEVICE_CTL, &err);
749 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
750 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
754 bus->clkstate = CLK_SDONLY;
755 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
757 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
759 brcmf_err("Failed access turning clock off: %d\n",
767 /* Change idle/active SD state */
768 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
770 brcmf_dbg(SDIO, "Enter\n");
773 bus->clkstate = CLK_SDONLY;
775 bus->clkstate = CLK_NONE;
780 /* Transition SD and backplane clock readiness */
781 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
784 uint oldstate = bus->clkstate;
787 brcmf_dbg(SDIO, "Enter\n");
789 /* Early exit if we're already there */
790 if (bus->clkstate == target) {
791 if (target == CLK_AVAIL) {
792 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
793 bus->activity = true;
800 /* Make sure SD clock is available */
801 if (bus->clkstate == CLK_NONE)
802 brcmf_sdbrcm_sdclk(bus, true);
803 /* Now request HT Avail on the backplane */
804 brcmf_sdbrcm_htclk(bus, true, pendok);
805 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
806 bus->activity = true;
810 /* Remove HT request, or bring up SD clock */
811 if (bus->clkstate == CLK_NONE)
812 brcmf_sdbrcm_sdclk(bus, true);
813 else if (bus->clkstate == CLK_AVAIL)
814 brcmf_sdbrcm_htclk(bus, false, false);
816 brcmf_err("request for %d -> %d\n",
817 bus->clkstate, target);
818 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
822 /* Make sure to remove HT request */
823 if (bus->clkstate == CLK_AVAIL)
824 brcmf_sdbrcm_htclk(bus, false, false);
825 /* Now remove the SD clock */
826 brcmf_sdbrcm_sdclk(bus, false);
827 brcmf_sdbrcm_wd_timer(bus, 0);
831 brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
838 brcmf_sdbrcm_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
841 brcmf_dbg(TRACE, "Enter\n");
842 brcmf_dbg(SDIO, "request %s currently %s\n",
843 (sleep ? "SLEEP" : "WAKE"),
844 (bus->sleeping ? "SLEEP" : "WAKE"));
846 /* If SR is enabled control bus state with KSO */
847 if (bus->sr_enabled) {
848 /* Done if we're already in the requested state */
849 if (sleep == bus->sleeping)
854 /* Don't sleep if something is pending */
855 if (atomic_read(&bus->intstatus) ||
856 atomic_read(&bus->ipend) > 0 ||
857 (!atomic_read(&bus->fcstate) &&
858 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
861 err = brcmf_sdbrcm_kso_control(bus, false);
862 /* disable watchdog */
864 brcmf_sdbrcm_wd_timer(bus, 0);
867 err = brcmf_sdbrcm_kso_control(bus, true);
871 bus->sleeping = sleep;
872 brcmf_dbg(SDIO, "new state %s\n",
873 (sleep ? "SLEEP" : "WAKE"));
875 brcmf_err("error while changing bus sleep state %d\n",
884 if (!bus->sr_enabled)
885 brcmf_sdbrcm_clkctl(bus, CLK_NONE, pendok);
887 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, pendok);
894 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
901 brcmf_dbg(SDIO, "Enter\n");
903 /* Read mailbox data and ack that we did so */
904 ret = r_sdreg32(bus, &hmb_data,
905 offsetof(struct sdpcmd_regs, tohostmailboxdata));
908 w_sdreg32(bus, SMB_INT_ACK,
909 offsetof(struct sdpcmd_regs, tosbmailbox));
910 bus->sdcnt.f1regdata += 2;
912 /* Dongle recomposed rx frames, accept them again */
913 if (hmb_data & HMB_DATA_NAKHANDLED) {
914 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
917 brcmf_err("unexpected NAKHANDLED!\n");
920 intstatus |= I_HMB_FRAME_IND;
924 * DEVREADY does not occur with gSPI.
926 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
928 (hmb_data & HMB_DATA_VERSION_MASK) >>
929 HMB_DATA_VERSION_SHIFT;
930 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
931 brcmf_err("Version mismatch, dongle reports %d, "
933 bus->sdpcm_ver, SDPCM_PROT_VERSION);
935 brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
940 * Flow Control has been moved into the RX headers and this out of band
941 * method isn't used any more.
942 * remaining backward compatible with older dongles.
944 if (hmb_data & HMB_DATA_FC) {
945 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
946 HMB_DATA_FCDATA_SHIFT;
948 if (fcbits & ~bus->flowcontrol)
949 bus->sdcnt.fc_xoff++;
951 if (bus->flowcontrol & ~fcbits)
954 bus->sdcnt.fc_rcvd++;
955 bus->flowcontrol = fcbits;
958 /* Shouldn't be any others */
959 if (hmb_data & ~(HMB_DATA_DEVREADY |
960 HMB_DATA_NAKHANDLED |
963 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
964 brcmf_err("Unknown mailbox data content: 0x%02x\n",
970 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
977 brcmf_err("%sterminate frame%s\n",
978 abort ? "abort command, " : "",
979 rtx ? ", send NAK" : "");
982 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
984 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
986 bus->sdcnt.f1regdata++;
988 /* Wait until the packet has been flushed (device/FIFO stable) */
989 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
990 hi = brcmf_sdio_regrb(bus->sdiodev,
991 SBSDIO_FUNC1_RFRAMEBCHI, &err);
992 lo = brcmf_sdio_regrb(bus->sdiodev,
993 SBSDIO_FUNC1_RFRAMEBCLO, &err);
994 bus->sdcnt.f1regdata += 2;
996 if ((hi == 0) && (lo == 0))
999 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1000 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1001 lastrbc, (hi << 8) + lo);
1003 lastrbc = (hi << 8) + lo;
1007 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1009 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1013 err = w_sdreg32(bus, SMB_NAK,
1014 offsetof(struct sdpcmd_regs, tosbmailbox));
1016 bus->sdcnt.f1regdata++;
1021 /* Clear partial in any case */
1022 bus->cur_read.len = 0;
1024 /* If we can't reach the device, signal failure */
1026 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1029 /* copy a buffer into a pkt buffer chain */
1030 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1039 skb_queue_walk(&bus->glom, p) {
1040 n = min_t(uint, p->len, len);
1041 memcpy(p->data, buf, n);
1052 /* return total length of buffer chain */
1053 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1059 skb_queue_walk(&bus->glom, p)
1064 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1066 struct sk_buff *cur, *next;
1068 skb_queue_walk_safe(&bus->glom, cur, next) {
1069 skb_unlink(cur, &bus->glom);
1070 brcmu_pkt_buf_free_skb(cur);
1074 static int brcmf_sdio_hdparser(struct brcmf_sdio *bus, u8 *header,
1075 struct brcmf_sdio_read *rd,
1076 enum brcmf_sdio_frmtype type)
1079 u8 rx_seq, fc, tx_seq_max;
1082 * 4 bytes hardware header (frame tag)
1083 * Byte 0~1: Frame length
1084 * Byte 2~3: Checksum, bit-wise inverse of frame length
1086 len = get_unaligned_le16(header);
1087 checksum = get_unaligned_le16(header + sizeof(u16));
1088 /* All zero means no more to read */
1089 if (!(len | checksum)) {
1090 bus->rxpending = false;
1093 if ((u16)(~(len ^ checksum))) {
1094 brcmf_err("HW header checksum error\n");
1095 bus->sdcnt.rx_badhdr++;
1096 brcmf_sdbrcm_rxfail(bus, false, false);
1099 if (len < SDPCM_HDRLEN) {
1100 brcmf_err("HW header length error\n");
1103 if (type == BRCMF_SDIO_FT_SUPER &&
1104 (roundup(len, bus->blocksize) != rd->len)) {
1105 brcmf_err("HW superframe header length error\n");
1108 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1109 brcmf_err("HW subframe header length error\n");
1115 * 8 bytes hardware header
1116 * Byte 0: Rx sequence number
1117 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1118 * Byte 2: Length of next data frame
1119 * Byte 3: Data offset
1120 * Byte 4: Flow control bits
1121 * Byte 5: Maximum Sequence number allow for Tx
1122 * Byte 6~7: Reserved
1124 if (type == BRCMF_SDIO_FT_SUPER &&
1125 SDPCM_GLOMDESC(&header[SDPCM_FRAMETAG_LEN])) {
1126 brcmf_err("Glom descriptor found in superframe head\n");
1130 rx_seq = SDPCM_PACKET_SEQUENCE(&header[SDPCM_FRAMETAG_LEN]);
1131 rd->channel = SDPCM_PACKET_CHANNEL(&header[SDPCM_FRAMETAG_LEN]);
1132 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1133 type != BRCMF_SDIO_FT_SUPER) {
1134 brcmf_err("HW header length too long\n");
1135 bus->sdcnt.rx_toolong++;
1136 brcmf_sdbrcm_rxfail(bus, false, false);
1140 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1141 brcmf_err("Wrong channel for superframe\n");
1145 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1146 rd->channel != SDPCM_EVENT_CHANNEL) {
1147 brcmf_err("Wrong channel for subframe\n");
1151 rd->dat_offset = SDPCM_DOFFSET_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1152 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1153 brcmf_err("seq %d: bad data offset\n", rx_seq);
1154 bus->sdcnt.rx_badhdr++;
1155 brcmf_sdbrcm_rxfail(bus, false, false);
1159 if (rd->seq_num != rx_seq) {
1160 brcmf_err("seq %d: sequence number error, expect %d\n",
1161 rx_seq, rd->seq_num);
1162 bus->sdcnt.rx_badseq++;
1163 rd->seq_num = rx_seq;
1165 /* no need to check the reset for subframe */
1166 if (type == BRCMF_SDIO_FT_SUB)
1168 rd->len_nxtfrm = header[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1169 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1170 /* only warm for NON glom packet */
1171 if (rd->channel != SDPCM_GLOM_CHANNEL)
1172 brcmf_err("seq %d: next length error\n", rx_seq);
1175 fc = SDPCM_FCMASK_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1176 if (bus->flowcontrol != fc) {
1177 if (~bus->flowcontrol & fc)
1178 bus->sdcnt.fc_xoff++;
1179 if (bus->flowcontrol & ~fc)
1180 bus->sdcnt.fc_xon++;
1181 bus->sdcnt.fc_rcvd++;
1182 bus->flowcontrol = fc;
1184 tx_seq_max = SDPCM_WINDOW_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1185 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1186 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1187 tx_seq_max = bus->tx_seq + 2;
1189 bus->tx_max = tx_seq_max;
1194 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1200 struct sk_buff *pfirst, *pnext;
1205 bool usechain = bus->use_rxchain;
1207 struct brcmf_sdio_read rd_new;
1209 /* If packets, issue read(s) and send up packet chain */
1210 /* Return sequence numbers consumed? */
1212 brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1213 bus->glomd, skb_peek(&bus->glom));
1215 /* If there's a descriptor, generate the packet chain */
1217 pfirst = pnext = NULL;
1218 dlen = (u16) (bus->glomd->len);
1219 dptr = bus->glomd->data;
1220 if (!dlen || (dlen & 1)) {
1221 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1226 for (totlen = num = 0; dlen; num++) {
1227 /* Get (and move past) next length */
1228 sublen = get_unaligned_le16(dptr);
1229 dlen -= sizeof(u16);
1230 dptr += sizeof(u16);
1231 if ((sublen < SDPCM_HDRLEN) ||
1232 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1233 brcmf_err("descriptor len %d bad: %d\n",
1238 if (sublen % BRCMF_SDALIGN) {
1239 brcmf_err("sublen %d not multiple of %d\n",
1240 sublen, BRCMF_SDALIGN);
1245 /* For last frame, adjust read len so total
1246 is a block multiple */
1249 (roundup(totlen, bus->blocksize) - totlen);
1250 totlen = roundup(totlen, bus->blocksize);
1253 /* Allocate/chain packet for next subframe */
1254 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1255 if (pnext == NULL) {
1256 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1260 skb_queue_tail(&bus->glom, pnext);
1262 /* Adhere to start alignment requirements */
1263 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1266 /* If all allocations succeeded, save packet chain
1269 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1271 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1272 totlen != bus->cur_read.len) {
1273 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1274 bus->cur_read.len, totlen, rxseq);
1276 pfirst = pnext = NULL;
1278 brcmf_sdbrcm_free_glom(bus);
1282 /* Done with descriptor packet */
1283 brcmu_pkt_buf_free_skb(bus->glomd);
1285 bus->cur_read.len = 0;
1288 /* Ok -- either we just generated a packet chain,
1289 or had one from before */
1290 if (!skb_queue_empty(&bus->glom)) {
1291 if (BRCMF_GLOM_ON()) {
1292 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1293 skb_queue_walk(&bus->glom, pnext) {
1294 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1295 pnext, (u8 *) (pnext->data),
1296 pnext->len, pnext->len);
1300 pfirst = skb_peek(&bus->glom);
1301 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1303 /* Do an SDIO read for the superframe. Configurable iovar to
1304 * read directly into the chained packet, or allocate a large
1305 * packet and and copy into the chain.
1307 sdio_claim_host(bus->sdiodev->func[1]);
1309 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1310 bus->sdiodev->sbwad,
1311 SDIO_FUNC_2, F2SYNC, &bus->glom);
1312 } else if (bus->dataptr) {
1313 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1314 bus->sdiodev->sbwad,
1315 SDIO_FUNC_2, F2SYNC,
1316 bus->dataptr, dlen);
1317 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1318 if (sublen != dlen) {
1319 brcmf_err("FAILED TO COPY, dlen %d sublen %d\n",
1325 brcmf_err("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1329 sdio_release_host(bus->sdiodev->func[1]);
1330 bus->sdcnt.f2rxdata++;
1332 /* On failure, kill the superframe, allow a couple retries */
1334 brcmf_err("glom read of %d bytes failed: %d\n",
1337 sdio_claim_host(bus->sdiodev->func[1]);
1338 if (bus->glomerr++ < 3) {
1339 brcmf_sdbrcm_rxfail(bus, true, true);
1342 brcmf_sdbrcm_rxfail(bus, true, false);
1343 bus->sdcnt.rxglomfail++;
1344 brcmf_sdbrcm_free_glom(bus);
1346 sdio_release_host(bus->sdiodev->func[1]);
1350 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1351 pfirst->data, min_t(int, pfirst->len, 48),
1354 rd_new.seq_num = rxseq;
1356 sdio_claim_host(bus->sdiodev->func[1]);
1357 errcode = brcmf_sdio_hdparser(bus, pfirst->data, &rd_new,
1358 BRCMF_SDIO_FT_SUPER);
1359 sdio_release_host(bus->sdiodev->func[1]);
1360 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1362 /* Remove superframe header, remember offset */
1363 skb_pull(pfirst, rd_new.dat_offset);
1364 sfdoff = rd_new.dat_offset;
1367 /* Validate all the subframe headers */
1368 skb_queue_walk(&bus->glom, pnext) {
1369 /* leave when invalid subframe is found */
1373 rd_new.len = pnext->len;
1374 rd_new.seq_num = rxseq++;
1375 sdio_claim_host(bus->sdiodev->func[1]);
1376 errcode = brcmf_sdio_hdparser(bus, pnext->data, &rd_new,
1378 sdio_release_host(bus->sdiodev->func[1]);
1379 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1380 pnext->data, 32, "subframe:\n");
1386 /* Terminate frame on error, request
1388 sdio_claim_host(bus->sdiodev->func[1]);
1389 if (bus->glomerr++ < 3) {
1390 /* Restore superframe header space */
1391 skb_push(pfirst, sfdoff);
1392 brcmf_sdbrcm_rxfail(bus, true, true);
1395 brcmf_sdbrcm_rxfail(bus, true, false);
1396 bus->sdcnt.rxglomfail++;
1397 brcmf_sdbrcm_free_glom(bus);
1399 sdio_release_host(bus->sdiodev->func[1]);
1400 bus->cur_read.len = 0;
1404 /* Basic SD framing looks ok - process each packet (header) */
1406 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1407 dptr = (u8 *) (pfirst->data);
1408 sublen = get_unaligned_le16(dptr);
1409 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1411 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1413 "Rx Subframe Data:\n");
1415 __skb_trim(pfirst, sublen);
1416 skb_pull(pfirst, doff);
1418 if (pfirst->len == 0) {
1419 skb_unlink(pfirst, &bus->glom);
1420 brcmu_pkt_buf_free_skb(pfirst);
1424 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1426 min_t(int, pfirst->len, 32),
1427 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1428 bus->glom.qlen, pfirst, pfirst->data,
1429 pfirst->len, pfirst->next,
1432 /* sent any remaining packets up */
1434 brcmf_rx_frames(bus->sdiodev->dev, &bus->glom);
1436 bus->sdcnt.rxglomframes++;
1437 bus->sdcnt.rxglompkts += bus->glom.qlen;
1442 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1445 DECLARE_WAITQUEUE(wait, current);
1446 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1448 /* Wait until control frame is available */
1449 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1450 set_current_state(TASK_INTERRUPTIBLE);
1452 while (!(*condition) && (!signal_pending(current) && timeout))
1453 timeout = schedule_timeout(timeout);
1455 if (signal_pending(current))
1458 set_current_state(TASK_RUNNING);
1459 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1464 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1466 if (waitqueue_active(&bus->dcmd_resp_wait))
1467 wake_up_interruptible(&bus->dcmd_resp_wait);
1472 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1475 u8 *buf = NULL, *rbuf;
1478 brcmf_dbg(TRACE, "Enter\n");
1481 buf = vzalloc(bus->rxblen);
1486 pad = ((unsigned long)rbuf % BRCMF_SDALIGN);
1488 rbuf += (BRCMF_SDALIGN - pad);
1490 /* Copy the already-read portion over */
1491 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1492 if (len <= BRCMF_FIRSTREAD)
1495 /* Raise rdlen to next SDIO block to avoid tail command */
1496 rdlen = len - BRCMF_FIRSTREAD;
1497 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1498 pad = bus->blocksize - (rdlen % bus->blocksize);
1499 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1500 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1502 } else if (rdlen % BRCMF_SDALIGN) {
1503 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1506 /* Satisfy length-alignment requirements */
1507 if (rdlen & (ALIGNMENT - 1))
1508 rdlen = roundup(rdlen, ALIGNMENT);
1510 /* Drop if the read is too big or it exceeds our maximum */
1511 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1512 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1513 rdlen, bus->sdiodev->bus_if->maxctl);
1514 brcmf_sdbrcm_rxfail(bus, false, false);
1518 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1519 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1520 len, len - doff, bus->sdiodev->bus_if->maxctl);
1521 bus->sdcnt.rx_toolong++;
1522 brcmf_sdbrcm_rxfail(bus, false, false);
1526 /* Read remain of frame body */
1527 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1528 bus->sdiodev->sbwad,
1530 F2SYNC, rbuf, rdlen);
1531 bus->sdcnt.f2rxdata++;
1533 /* Control frame failures need retransmission */
1535 brcmf_err("read %d control bytes failed: %d\n",
1537 bus->sdcnt.rxc_errors++;
1538 brcmf_sdbrcm_rxfail(bus, true, true);
1541 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1545 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1546 buf, len, "RxCtrl:\n");
1548 /* Point to valid data and indicate its length */
1549 spin_lock_bh(&bus->rxctl_lock);
1551 brcmf_err("last control frame is being processed.\n");
1552 spin_unlock_bh(&bus->rxctl_lock);
1556 bus->rxctl = buf + doff;
1557 bus->rxctl_orig = buf;
1558 bus->rxlen = len - doff;
1559 spin_unlock_bh(&bus->rxctl_lock);
1562 /* Awake any waiters */
1563 brcmf_sdbrcm_dcmd_resp_wake(bus);
1566 /* Pad read to blocksize for efficiency */
1567 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1569 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1570 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1571 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1572 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1574 } else if (*rdlen % BRCMF_SDALIGN) {
1575 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1579 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1581 struct sk_buff *pkt; /* Packet for event or data frames */
1582 struct sk_buff_head pktlist; /* needed for bus interface */
1583 u16 pad; /* Number of pad bytes to read */
1584 uint rxleft = 0; /* Remaining number of frames allowed */
1585 int ret; /* Return code from calls */
1586 uint rxcount = 0; /* Total frames read */
1587 struct brcmf_sdio_read *rd = &bus->cur_read, rd_new;
1590 brcmf_dbg(TRACE, "Enter\n");
1592 /* Not finished unless we encounter no more frames indication */
1593 bus->rxpending = true;
1595 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1596 !bus->rxskip && rxleft &&
1597 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1598 rd->seq_num++, rxleft--) {
1600 /* Handle glomming separately */
1601 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1603 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1604 bus->glomd, skb_peek(&bus->glom));
1605 cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1606 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1607 rd->seq_num += cnt - 1;
1608 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1612 rd->len_left = rd->len;
1613 /* read header first for unknow frame length */
1614 sdio_claim_host(bus->sdiodev->func[1]);
1616 ret = brcmf_sdcard_recv_buf(bus->sdiodev,
1617 bus->sdiodev->sbwad,
1618 SDIO_FUNC_2, F2SYNC,
1621 bus->sdcnt.f2rxhdrs++;
1623 brcmf_err("RXHEADER FAILED: %d\n",
1625 bus->sdcnt.rx_hdrfail++;
1626 brcmf_sdbrcm_rxfail(bus, true, true);
1627 sdio_release_host(bus->sdiodev->func[1]);
1631 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1632 bus->rxhdr, SDPCM_HDRLEN,
1635 if (brcmf_sdio_hdparser(bus, bus->rxhdr, rd,
1636 BRCMF_SDIO_FT_NORMAL)) {
1637 sdio_release_host(bus->sdiodev->func[1]);
1638 if (!bus->rxpending)
1644 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1645 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1648 /* prepare the descriptor for the next read */
1649 rd->len = rd->len_nxtfrm << 4;
1651 /* treat all packet as event if we don't know */
1652 rd->channel = SDPCM_EVENT_CHANNEL;
1653 sdio_release_host(bus->sdiodev->func[1]);
1656 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1657 rd->len - BRCMF_FIRSTREAD : 0;
1658 head_read = BRCMF_FIRSTREAD;
1661 brcmf_pad(bus, &pad, &rd->len_left);
1663 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1666 /* Give up on data, request rtx of events */
1667 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1668 brcmf_sdbrcm_rxfail(bus, false,
1669 RETRYCHAN(rd->channel));
1670 sdio_release_host(bus->sdiodev->func[1]);
1673 skb_pull(pkt, head_read);
1674 pkt_align(pkt, rd->len_left, BRCMF_SDALIGN);
1676 ret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1677 SDIO_FUNC_2, F2SYNC, pkt);
1678 bus->sdcnt.f2rxdata++;
1679 sdio_release_host(bus->sdiodev->func[1]);
1682 brcmf_err("read %d bytes from channel %d failed: %d\n",
1683 rd->len, rd->channel, ret);
1684 brcmu_pkt_buf_free_skb(pkt);
1685 sdio_claim_host(bus->sdiodev->func[1]);
1686 brcmf_sdbrcm_rxfail(bus, true,
1687 RETRYCHAN(rd->channel));
1688 sdio_release_host(bus->sdiodev->func[1]);
1693 skb_push(pkt, head_read);
1694 memcpy(pkt->data, bus->rxhdr, head_read);
1697 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1698 rd_new.seq_num = rd->seq_num;
1699 sdio_claim_host(bus->sdiodev->func[1]);
1700 if (brcmf_sdio_hdparser(bus, bus->rxhdr, &rd_new,
1701 BRCMF_SDIO_FT_NORMAL)) {
1703 brcmu_pkt_buf_free_skb(pkt);
1705 bus->sdcnt.rx_readahead_cnt++;
1706 if (rd->len != roundup(rd_new.len, 16)) {
1707 brcmf_err("frame length mismatch:read %d, should be %d\n",
1709 roundup(rd_new.len, 16) >> 4);
1711 brcmf_sdbrcm_rxfail(bus, true, true);
1712 sdio_release_host(bus->sdiodev->func[1]);
1713 brcmu_pkt_buf_free_skb(pkt);
1716 sdio_release_host(bus->sdiodev->func[1]);
1717 rd->len_nxtfrm = rd_new.len_nxtfrm;
1718 rd->channel = rd_new.channel;
1719 rd->dat_offset = rd_new.dat_offset;
1721 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1724 bus->rxhdr, SDPCM_HDRLEN,
1727 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1728 brcmf_err("readahead on control packet %d?\n",
1730 /* Force retry w/normal header read */
1732 sdio_claim_host(bus->sdiodev->func[1]);
1733 brcmf_sdbrcm_rxfail(bus, false, true);
1734 sdio_release_host(bus->sdiodev->func[1]);
1735 brcmu_pkt_buf_free_skb(pkt);
1740 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1741 pkt->data, rd->len, "Rx Data:\n");
1743 /* Save superframe descriptor and allocate packet frame */
1744 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1745 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
1746 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1748 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1751 __skb_trim(pkt, rd->len);
1752 skb_pull(pkt, SDPCM_HDRLEN);
1755 brcmf_err("%s: glom superframe w/o "
1756 "descriptor!\n", __func__);
1757 sdio_claim_host(bus->sdiodev->func[1]);
1758 brcmf_sdbrcm_rxfail(bus, false, false);
1759 sdio_release_host(bus->sdiodev->func[1]);
1761 /* prepare the descriptor for the next read */
1762 rd->len = rd->len_nxtfrm << 4;
1764 /* treat all packet as event if we don't know */
1765 rd->channel = SDPCM_EVENT_CHANNEL;
1769 /* Fill in packet len and prio, deliver upward */
1770 __skb_trim(pkt, rd->len);
1771 skb_pull(pkt, rd->dat_offset);
1773 /* prepare the descriptor for the next read */
1774 rd->len = rd->len_nxtfrm << 4;
1776 /* treat all packet as event if we don't know */
1777 rd->channel = SDPCM_EVENT_CHANNEL;
1779 if (pkt->len == 0) {
1780 brcmu_pkt_buf_free_skb(pkt);
1784 skb_queue_head_init(&pktlist);
1785 skb_queue_tail(&pktlist, pkt);
1786 brcmf_rx_frames(bus->sdiodev->dev, &pktlist);
1789 rxcount = maxframes - rxleft;
1790 /* Message if we hit the limit */
1792 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1794 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1795 /* Back off rxseq if awaiting rtx, update rx_seq */
1798 bus->rx_seq = rd->seq_num;
1804 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1806 if (waitqueue_active(&bus->ctrl_wait))
1807 wake_up_interruptible(&bus->ctrl_wait);
1811 /* Writes a HW/SW header into the packet and sends it. */
1812 /* Assumes: (a) header space already there, (b) caller holds lock */
1813 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
1822 brcmf_dbg(TRACE, "Enter\n");
1824 frame = (u8 *) (pkt->data);
1826 /* Add alignment padding, allocate new packet if needed */
1827 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1829 if (skb_headroom(pkt) < pad) {
1830 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
1831 skb_headroom(pkt), pad);
1832 bus->sdiodev->bus_if->tx_realloc++;
1833 ret = skb_cow(pkt, BRCMF_SDALIGN);
1836 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1839 frame = (u8 *) (pkt->data);
1840 memset(frame, 0, pad + SDPCM_HDRLEN);
1842 /* precondition: pad < BRCMF_SDALIGN */
1844 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1845 len = (u16) (pkt->len);
1846 *(__le16 *) frame = cpu_to_le16(len);
1847 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
1849 /* Software tag: channel, sequence number, data offset */
1851 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1853 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1855 *(((__le32 *) frame) + 1) = cpu_to_le32(swheader);
1856 *(((__le32 *) frame) + 2) = 0;
1859 tx_packets[pkt->priority]++;
1862 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
1863 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
1864 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
1865 frame, len, "Tx Frame:\n");
1866 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1868 chan == SDPCM_CONTROL_CHANNEL) ||
1870 chan != SDPCM_CONTROL_CHANNEL))) &&
1872 frame, min_t(u16, len, 16), "TxHdr:\n");
1874 /* Raise len to next SDIO block to eliminate tail command */
1875 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1876 u16 pad = bus->blocksize - (len % bus->blocksize);
1877 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1879 } else if (len % BRCMF_SDALIGN) {
1880 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1883 /* Some controllers have trouble with odd bytes -- round to even */
1884 if (len & (ALIGNMENT - 1))
1885 len = roundup(len, ALIGNMENT);
1887 sdio_claim_host(bus->sdiodev->func[1]);
1888 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1889 SDIO_FUNC_2, F2SYNC, pkt);
1890 bus->sdcnt.f2txdata++;
1893 /* On failure, abort the command and terminate the frame */
1894 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
1896 bus->sdcnt.tx_sderrs++;
1898 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1899 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1901 bus->sdcnt.f1regdata++;
1903 for (i = 0; i < 3; i++) {
1905 hi = brcmf_sdio_regrb(bus->sdiodev,
1906 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1907 lo = brcmf_sdio_regrb(bus->sdiodev,
1908 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1909 bus->sdcnt.f1regdata += 2;
1910 if ((hi == 0) && (lo == 0))
1915 sdio_release_host(bus->sdiodev->func[1]);
1917 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1920 /* restore pkt buffer pointer before calling tx complete routine */
1921 skb_pull(pkt, SDPCM_HDRLEN + pad);
1922 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret == 0);
1926 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
1928 struct sk_buff *pkt;
1930 int ret = 0, prec_out;
1935 brcmf_dbg(TRACE, "Enter\n");
1937 tx_prec_map = ~bus->flowcontrol;
1939 /* Send frames until the limit or some other event */
1940 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
1941 spin_lock_bh(&bus->txqlock);
1942 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1944 spin_unlock_bh(&bus->txqlock);
1947 spin_unlock_bh(&bus->txqlock);
1948 datalen = pkt->len - SDPCM_HDRLEN;
1950 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL);
1952 /* In poll mode, need to check for other events */
1953 if (!bus->intr && cnt) {
1954 /* Check device status, signal pending interrupt */
1955 sdio_claim_host(bus->sdiodev->func[1]);
1956 ret = r_sdreg32(bus, &intstatus,
1957 offsetof(struct sdpcmd_regs,
1959 sdio_release_host(bus->sdiodev->func[1]);
1960 bus->sdcnt.f2txdata++;
1963 if (intstatus & bus->hostintmask)
1964 atomic_set(&bus->ipend, 1);
1968 /* Deflow-control stack if needed */
1969 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
1970 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
1972 brcmf_txflowblock(bus->sdiodev->dev, false);
1978 static void brcmf_sdbrcm_bus_stop(struct device *dev)
1980 u32 local_hostintmask;
1983 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
1984 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
1985 struct brcmf_sdio *bus = sdiodev->bus;
1987 brcmf_dbg(TRACE, "Enter\n");
1989 if (bus->watchdog_tsk) {
1990 send_sig(SIGTERM, bus->watchdog_tsk, 1);
1991 kthread_stop(bus->watchdog_tsk);
1992 bus->watchdog_tsk = NULL;
1995 sdio_claim_host(bus->sdiodev->func[1]);
1997 /* Enable clock for device interrupts */
1998 brcmf_sdbrcm_bus_sleep(bus, false, false);
2000 /* Disable and clear interrupts at the chip level also */
2001 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2002 local_hostintmask = bus->hostintmask;
2003 bus->hostintmask = 0;
2005 /* Change our idea of bus state */
2006 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2008 /* Force clocks on backplane to be sure F2 interrupt propagates */
2009 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2010 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2012 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2013 (saveclk | SBSDIO_FORCE_HT), &err);
2016 brcmf_err("Failed to force clock for F2: err %d\n", err);
2018 /* Turn off the bus (F2), free any pending packets */
2019 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2020 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2023 /* Clear any pending interrupts now that F2 is disabled */
2024 w_sdreg32(bus, local_hostintmask,
2025 offsetof(struct sdpcmd_regs, intstatus));
2027 /* Turn off the backplane clock (only) */
2028 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2029 sdio_release_host(bus->sdiodev->func[1]);
2031 /* Clear the data packet queues */
2032 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2034 /* Clear any held glomming stuff */
2036 brcmu_pkt_buf_free_skb(bus->glomd);
2037 brcmf_sdbrcm_free_glom(bus);
2039 /* Clear rx control and wake any waiters */
2040 spin_lock_bh(&bus->rxctl_lock);
2042 spin_unlock_bh(&bus->rxctl_lock);
2043 brcmf_sdbrcm_dcmd_resp_wake(bus);
2045 /* Reset some F2 state stuff */
2046 bus->rxskip = false;
2047 bus->tx_seq = bus->rx_seq = 0;
2050 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2052 unsigned long flags;
2054 if (bus->sdiodev->oob_irq_requested) {
2055 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2056 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2057 enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2058 bus->sdiodev->irq_en = true;
2060 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2064 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2066 struct list_head *new_hd;
2067 unsigned long flags;
2070 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2072 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2076 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2077 list_add_tail(new_hd, &bus->dpc_tsklst);
2078 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2081 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2088 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2089 addr = bus->ci->c_inf[idx].base +
2090 offsetof(struct sdpcmd_regs, intstatus);
2092 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2093 bus->sdcnt.f1regdata++;
2097 val &= bus->hostintmask;
2098 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2100 /* Clear interrupts */
2102 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2103 bus->sdcnt.f1regdata++;
2107 atomic_set(&bus->intstatus, 0);
2109 for_each_set_bit(n, &val, 32)
2110 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2116 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2119 unsigned long intstatus;
2120 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2121 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2122 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2125 brcmf_dbg(TRACE, "Enter\n");
2127 sdio_claim_host(bus->sdiodev->func[1]);
2129 /* If waiting for HTAVAIL, check status */
2130 if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2131 u8 clkctl, devctl = 0;
2134 /* Check for inconsistent device control */
2135 devctl = brcmf_sdio_regrb(bus->sdiodev,
2136 SBSDIO_DEVICE_CTL, &err);
2138 brcmf_err("error reading DEVCTL: %d\n", err);
2139 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2143 /* Read CSR, if clock on switch to AVAIL, else ignore */
2144 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2145 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2147 brcmf_err("error reading CSR: %d\n",
2149 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2152 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2155 if (SBSDIO_HTAV(clkctl)) {
2156 devctl = brcmf_sdio_regrb(bus->sdiodev,
2157 SBSDIO_DEVICE_CTL, &err);
2159 brcmf_err("error reading DEVCTL: %d\n",
2161 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2163 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2164 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2167 brcmf_err("error writing DEVCTL: %d\n",
2169 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2171 bus->clkstate = CLK_AVAIL;
2175 /* Make sure backplane clock is on */
2176 brcmf_sdbrcm_bus_sleep(bus, false, true);
2178 /* Pending interrupt indicates new device status */
2179 if (atomic_read(&bus->ipend) > 0) {
2180 atomic_set(&bus->ipend, 0);
2181 err = brcmf_sdio_intr_rstatus(bus);
2184 /* Start with leftover status bits */
2185 intstatus = atomic_xchg(&bus->intstatus, 0);
2187 /* Handle flow-control change: read new state in case our ack
2188 * crossed another change interrupt. If change still set, assume
2189 * FC ON for safety, let next loop through do the debounce.
2191 if (intstatus & I_HMB_FC_CHANGE) {
2192 intstatus &= ~I_HMB_FC_CHANGE;
2193 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2194 offsetof(struct sdpcmd_regs, intstatus));
2196 err = r_sdreg32(bus, &newstatus,
2197 offsetof(struct sdpcmd_regs, intstatus));
2198 bus->sdcnt.f1regdata += 2;
2199 atomic_set(&bus->fcstate,
2200 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2201 intstatus |= (newstatus & bus->hostintmask);
2204 /* Handle host mailbox indication */
2205 if (intstatus & I_HMB_HOST_INT) {
2206 intstatus &= ~I_HMB_HOST_INT;
2207 intstatus |= brcmf_sdbrcm_hostmail(bus);
2210 sdio_release_host(bus->sdiodev->func[1]);
2212 /* Generally don't ask for these, can get CRC errors... */
2213 if (intstatus & I_WR_OOSYNC) {
2214 brcmf_err("Dongle reports WR_OOSYNC\n");
2215 intstatus &= ~I_WR_OOSYNC;
2218 if (intstatus & I_RD_OOSYNC) {
2219 brcmf_err("Dongle reports RD_OOSYNC\n");
2220 intstatus &= ~I_RD_OOSYNC;
2223 if (intstatus & I_SBINT) {
2224 brcmf_err("Dongle reports SBINT\n");
2225 intstatus &= ~I_SBINT;
2228 /* Would be active due to wake-wlan in gSPI */
2229 if (intstatus & I_CHIPACTIVE) {
2230 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2231 intstatus &= ~I_CHIPACTIVE;
2234 /* Ignore frame indications if rxskip is set */
2236 intstatus &= ~I_HMB_FRAME_IND;
2238 /* On frame indication, read available frames */
2239 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2240 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2241 if (!bus->rxpending)
2242 intstatus &= ~I_HMB_FRAME_IND;
2243 rxlimit -= min(framecnt, rxlimit);
2246 /* Keep still-pending events for next scheduling */
2248 for_each_set_bit(n, &intstatus, 32)
2249 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2252 brcmf_sdbrcm_clrintr(bus);
2254 if (data_ok(bus) && bus->ctrl_frame_stat &&
2255 (bus->clkstate == CLK_AVAIL)) {
2258 sdio_claim_host(bus->sdiodev->func[1]);
2259 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2260 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2261 (u32) bus->ctrl_frame_len);
2264 /* On failure, abort the command and
2265 terminate the frame */
2266 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2268 bus->sdcnt.tx_sderrs++;
2270 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2272 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2274 bus->sdcnt.f1regdata++;
2276 for (i = 0; i < 3; i++) {
2278 hi = brcmf_sdio_regrb(bus->sdiodev,
2279 SBSDIO_FUNC1_WFRAMEBCHI,
2281 lo = brcmf_sdio_regrb(bus->sdiodev,
2282 SBSDIO_FUNC1_WFRAMEBCLO,
2284 bus->sdcnt.f1regdata += 2;
2285 if ((hi == 0) && (lo == 0))
2290 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2292 sdio_release_host(bus->sdiodev->func[1]);
2293 bus->ctrl_frame_stat = false;
2294 brcmf_sdbrcm_wait_event_wakeup(bus);
2296 /* Send queued frames (limit 1 if rx may still be pending) */
2297 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2298 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2300 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2302 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2303 txlimit -= framecnt;
2306 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2307 brcmf_err("failed backplane access over SDIO, halting operation\n");
2308 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2309 atomic_set(&bus->intstatus, 0);
2310 } else if (atomic_read(&bus->intstatus) ||
2311 atomic_read(&bus->ipend) > 0 ||
2312 (!atomic_read(&bus->fcstate) &&
2313 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2314 data_ok(bus)) || PKT_AVAILABLE()) {
2315 brcmf_sdbrcm_adddpctsk(bus);
2318 /* If we're done for now, turn off clock request. */
2319 if ((bus->clkstate != CLK_PENDING)
2320 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2321 bus->activity = false;
2322 brcmf_dbg(SDIO, "idle state\n");
2323 sdio_claim_host(bus->sdiodev->func[1]);
2324 brcmf_sdbrcm_bus_sleep(bus, true, false);
2325 sdio_release_host(bus->sdiodev->func[1]);
2329 static struct pktq *brcmf_sdbrcm_bus_gettxq(struct device *dev)
2331 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2332 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2333 struct brcmf_sdio *bus = sdiodev->bus;
2338 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2342 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2343 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2344 struct brcmf_sdio *bus = sdiodev->bus;
2345 unsigned long flags;
2347 brcmf_dbg(TRACE, "Enter\n");
2351 /* Add space for the header */
2352 skb_push(pkt, SDPCM_HDRLEN);
2353 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2355 prec = prio2prec((pkt->priority & PRIOMASK));
2357 /* Check for existing queue, current flow-control,
2358 pending event, or pending clock */
2359 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2360 bus->sdcnt.fcqueued++;
2362 /* Priority based enq */
2363 spin_lock_bh(&bus->txqlock);
2364 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2365 skb_pull(pkt, SDPCM_HDRLEN);
2366 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2367 brcmf_err("out of bus->txq !!!\n");
2372 spin_unlock_bh(&bus->txqlock);
2374 if (pktq_len(&bus->txq) >= TXHI) {
2376 brcmf_txflowblock(bus->sdiodev->dev, true);
2380 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2381 qcount[prec] = pktq_plen(&bus->txq, prec);
2384 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2385 if (list_empty(&bus->dpc_tsklst)) {
2386 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2388 brcmf_sdbrcm_adddpctsk(bus);
2389 queue_work(bus->brcmf_wq, &bus->datawork);
2391 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2398 #define CONSOLE_LINE_MAX 192
2400 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2402 struct brcmf_console *c = &bus->console;
2403 u8 line[CONSOLE_LINE_MAX], ch;
2407 /* Don't do anything until FWREADY updates console address */
2408 if (bus->console_addr == 0)
2411 /* Read console log struct */
2412 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2413 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2418 /* Allocate console buffer (one time only) */
2419 if (c->buf == NULL) {
2420 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2421 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2426 idx = le32_to_cpu(c->log_le.idx);
2428 /* Protect against corrupt value */
2429 if (idx > c->bufsize)
2432 /* Skip reading the console buffer if the index pointer
2437 /* Read the console buffer */
2438 addr = le32_to_cpu(c->log_le.buf);
2439 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2443 while (c->last != idx) {
2444 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2445 if (c->last == idx) {
2446 /* This would output a partial line.
2448 * the buffer pointer and output this
2449 * line next time around.
2454 c->last = c->bufsize - n;
2457 ch = c->buf[c->last];
2458 c->last = (c->last + 1) % c->bufsize;
2465 if (line[n - 1] == '\r')
2468 pr_debug("CONSOLE: %s\n", line);
2477 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2482 bus->ctrl_frame_stat = false;
2483 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2484 SDIO_FUNC_2, F2SYNC, frame, len);
2487 /* On failure, abort the command and terminate the frame */
2488 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2490 bus->sdcnt.tx_sderrs++;
2492 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2494 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2496 bus->sdcnt.f1regdata++;
2498 for (i = 0; i < 3; i++) {
2500 hi = brcmf_sdio_regrb(bus->sdiodev,
2501 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2502 lo = brcmf_sdio_regrb(bus->sdiodev,
2503 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2504 bus->sdcnt.f1regdata += 2;
2505 if (hi == 0 && lo == 0)
2511 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2517 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2525 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2526 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2527 struct brcmf_sdio *bus = sdiodev->bus;
2528 unsigned long flags;
2530 brcmf_dbg(TRACE, "Enter\n");
2532 /* Back the pointer to make a room for bus header */
2533 frame = msg - SDPCM_HDRLEN;
2534 len = (msglen += SDPCM_HDRLEN);
2536 /* Add alignment padding (optional for ctl frames) */
2537 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2542 memset(frame, 0, doff + SDPCM_HDRLEN);
2544 /* precondition: doff < BRCMF_SDALIGN */
2545 doff += SDPCM_HDRLEN;
2547 /* Round send length to next SDIO block */
2548 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2549 u16 pad = bus->blocksize - (len % bus->blocksize);
2550 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2552 } else if (len % BRCMF_SDALIGN) {
2553 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2556 /* Satisfy length-alignment requirements */
2557 if (len & (ALIGNMENT - 1))
2558 len = roundup(len, ALIGNMENT);
2560 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2562 /* Make sure backplane clock is on */
2563 sdio_claim_host(bus->sdiodev->func[1]);
2564 brcmf_sdbrcm_bus_sleep(bus, false, false);
2565 sdio_release_host(bus->sdiodev->func[1]);
2567 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2568 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2569 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2571 /* Software tag: channel, sequence number, data offset */
2573 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2575 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2576 SDPCM_DOFFSET_MASK);
2577 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2578 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2580 if (!data_ok(bus)) {
2581 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2582 bus->tx_max, bus->tx_seq);
2583 bus->ctrl_frame_stat = true;
2585 bus->ctrl_frame_buf = frame;
2586 bus->ctrl_frame_len = len;
2588 wait_event_interruptible_timeout(bus->ctrl_wait,
2589 !bus->ctrl_frame_stat,
2590 msecs_to_jiffies(2000));
2592 if (!bus->ctrl_frame_stat) {
2593 brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2596 brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2602 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2603 frame, len, "Tx Frame:\n");
2604 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2606 frame, min_t(u16, len, 16), "TxHdr:\n");
2609 sdio_claim_host(bus->sdiodev->func[1]);
2610 ret = brcmf_tx_frame(bus, frame, len);
2611 sdio_release_host(bus->sdiodev->func[1]);
2612 } while (ret < 0 && retries++ < TXRETRIES);
2615 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2616 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2617 list_empty(&bus->dpc_tsklst)) {
2618 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2620 bus->activity = false;
2621 sdio_claim_host(bus->sdiodev->func[1]);
2622 brcmf_dbg(INFO, "idle\n");
2623 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2624 sdio_release_host(bus->sdiodev->func[1]);
2626 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2630 bus->sdcnt.tx_ctlerrs++;
2632 bus->sdcnt.tx_ctlpkts++;
2634 return ret ? -EIO : 0;
2638 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2640 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2643 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2644 struct sdpcm_shared *sh)
2649 struct sdpcm_shared_le sh_le;
2652 shaddr = bus->ci->rambase + bus->ramsize - 4;
2655 * Read last word in socram to determine
2656 * address of sdpcm_shared structure
2658 sdio_claim_host(bus->sdiodev->func[1]);
2659 brcmf_sdbrcm_bus_sleep(bus, false, false);
2660 rv = brcmf_sdio_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2661 sdio_release_host(bus->sdiodev->func[1]);
2665 addr = le32_to_cpu(addr_le);
2667 brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2670 * Check if addr is valid.
2671 * NVRAM length at the end of memory should have been overwritten.
2673 if (!brcmf_sdio_valid_shared_address(addr)) {
2674 brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2679 /* Read hndrte_shared structure */
2680 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2681 sizeof(struct sdpcm_shared_le));
2686 sh->flags = le32_to_cpu(sh_le.flags);
2687 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2688 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2689 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2690 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2691 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2692 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2694 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2695 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2696 SDPCM_SHARED_VERSION,
2697 sh->flags & SDPCM_SHARED_VERSION_MASK);
2704 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2705 struct sdpcm_shared *sh, char __user *data,
2708 u32 addr, console_ptr, console_size, console_index;
2709 char *conbuf = NULL;
2715 /* obtain console information from device memory */
2716 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2717 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2718 (u8 *)&sh_val, sizeof(u32));
2721 console_ptr = le32_to_cpu(sh_val);
2723 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2724 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2725 (u8 *)&sh_val, sizeof(u32));
2728 console_size = le32_to_cpu(sh_val);
2730 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2731 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2732 (u8 *)&sh_val, sizeof(u32));
2735 console_index = le32_to_cpu(sh_val);
2737 /* allocate buffer for console data */
2738 if (console_size <= CONSOLE_BUFFER_MAX)
2739 conbuf = vzalloc(console_size+1);
2744 /* obtain the console data from device */
2745 conbuf[console_size] = '\0';
2746 rv = brcmf_sdio_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2751 rv = simple_read_from_buffer(data, count, &pos,
2752 conbuf + console_index,
2753 console_size - console_index);
2758 if (console_index > 0) {
2760 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2761 conbuf, console_index - 1);
2771 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2772 char __user *data, size_t count)
2776 struct brcmf_trap_info tr;
2779 if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2780 brcmf_dbg(INFO, "no trap in firmware\n");
2784 error = brcmf_sdio_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2785 sizeof(struct brcmf_trap_info));
2789 res = scnprintf(buf, sizeof(buf),
2790 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2791 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2792 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2793 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2794 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
2795 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2796 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2797 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2798 le32_to_cpu(tr.pc), sh->trap_addr,
2799 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2800 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2801 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2802 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2804 return simple_read_from_buffer(data, count, &pos, buf, res);
2807 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2808 struct sdpcm_shared *sh, char __user *data,
2813 char file[80] = "?";
2814 char expr[80] = "<???>";
2818 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2819 brcmf_dbg(INFO, "firmware not built with -assert\n");
2821 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2822 brcmf_dbg(INFO, "no assert in dongle\n");
2826 sdio_claim_host(bus->sdiodev->func[1]);
2827 if (sh->assert_file_addr != 0) {
2828 error = brcmf_sdio_ramrw(bus->sdiodev, false,
2829 sh->assert_file_addr, (u8 *)file, 80);
2833 if (sh->assert_exp_addr != 0) {
2834 error = brcmf_sdio_ramrw(bus->sdiodev, false,
2835 sh->assert_exp_addr, (u8 *)expr, 80);
2839 sdio_release_host(bus->sdiodev->func[1]);
2841 res = scnprintf(buf, sizeof(buf),
2842 "dongle assert: %s:%d: assert(%s)\n",
2843 file, sh->assert_line, expr);
2844 return simple_read_from_buffer(data, count, &pos, buf, res);
2847 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2850 struct sdpcm_shared sh;
2852 error = brcmf_sdio_readshared(bus, &sh);
2857 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2858 brcmf_dbg(INFO, "firmware not built with -assert\n");
2859 else if (sh.flags & SDPCM_SHARED_ASSERT)
2860 brcmf_err("assertion in dongle\n");
2862 if (sh.flags & SDPCM_SHARED_TRAP)
2863 brcmf_err("firmware trap in dongle\n");
2868 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
2869 size_t count, loff_t *ppos)
2872 struct sdpcm_shared sh;
2879 error = brcmf_sdio_readshared(bus, &sh);
2883 error = brcmf_sdio_assert_info(bus, &sh, data, count);
2888 error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
2893 error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
2904 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
2905 size_t count, loff_t *ppos)
2907 struct brcmf_sdio *bus = f->private_data;
2910 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
2913 return (ssize_t)res;
2916 static const struct file_operations brcmf_sdio_forensic_ops = {
2917 .owner = THIS_MODULE,
2918 .open = simple_open,
2919 .read = brcmf_sdio_forensic_read
2922 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
2924 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
2925 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
2927 if (IS_ERR_OR_NULL(dentry))
2930 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
2931 &brcmf_sdio_forensic_ops);
2932 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
2935 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2940 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
2946 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
2952 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2953 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2954 struct brcmf_sdio *bus = sdiodev->bus;
2956 brcmf_dbg(TRACE, "Enter\n");
2958 /* Wait until control frame is available */
2959 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
2961 spin_lock_bh(&bus->rxctl_lock);
2963 memcpy(msg, bus->rxctl, min(msglen, rxlen));
2965 buf = bus->rxctl_orig;
2966 bus->rxctl_orig = NULL;
2968 spin_unlock_bh(&bus->rxctl_lock);
2972 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
2974 } else if (timeleft == 0) {
2975 brcmf_err("resumed on timeout\n");
2976 brcmf_sdbrcm_checkdied(bus);
2977 } else if (pending) {
2978 brcmf_dbg(CTL, "cancelled\n");
2979 return -ERESTARTSYS;
2981 brcmf_dbg(CTL, "resumed for unknown reason?\n");
2982 brcmf_sdbrcm_checkdied(bus);
2986 bus->sdcnt.rx_ctlpkts++;
2988 bus->sdcnt.rx_ctlerrs++;
2990 return rxlen ? (int)rxlen : -ETIMEDOUT;
2993 static bool brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
2995 struct chip_info *ci = bus->ci;
2997 /* To enter download state, disable ARM and reset SOCRAM.
2998 * To exit download state, simply reset ARM (default is RAM boot).
3001 bus->alp_only = true;
3003 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3005 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
3009 /* Allow HT Clock now that the ARM is running. */
3010 bus->alp_only = false;
3012 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3018 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3020 if (bus->firmware->size < bus->fw_ptr + len)
3021 len = bus->firmware->size - bus->fw_ptr;
3023 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3028 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3032 u8 *memblock = NULL, *memptr;
3036 brcmf_dbg(INFO, "Enter\n");
3038 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3039 &bus->sdiodev->func[2]->dev);
3041 brcmf_err("Fail to request firmware %d\n", ret);
3046 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3047 if (memblock == NULL) {
3051 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3052 memptr += (BRCMF_SDALIGN -
3053 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3055 offset = bus->ci->rambase;
3057 /* Download image */
3058 len = brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus);
3059 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4);
3060 if (BRCMF_MAX_CORENUM != idx)
3061 memcpy(&bus->ci->rst_vec, memptr, sizeof(bus->ci->rst_vec));
3063 ret = brcmf_sdio_ramrw(bus->sdiodev, true, offset, memptr, len);
3065 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3066 ret, MEMBLOCK, offset);
3071 len = brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus);
3077 release_firmware(bus->firmware);
3084 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3085 * and ending in a NUL.
3086 * Removes carriage returns, empty lines, comment lines, and converts
3088 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3092 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus)
3099 uint buf_len, n, len;
3101 len = bus->firmware->size;
3102 varbuf = vmalloc(len);
3106 memcpy(varbuf, bus->firmware->data, len);
3109 findNewline = false;
3112 for (n = 0; n < len; n++) {
3115 if (varbuf[n] == '\r')
3117 if (findNewline && varbuf[n] != '\n')
3119 findNewline = false;
3120 if (varbuf[n] == '#') {
3124 if (varbuf[n] == '\n') {
3134 buf_len = dp - varbuf;
3135 while (dp < varbuf + n)
3139 /* roundup needed for download to device */
3140 bus->varsz = roundup(buf_len + 1, 4);
3141 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3142 if (bus->vars == NULL) {
3148 /* copy the processed variables and add null termination */
3149 memcpy(bus->vars, varbuf, buf_len);
3150 bus->vars[buf_len] = 0;
3156 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3160 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3161 &bus->sdiodev->func[2]->dev);
3163 brcmf_err("Fail to request nvram %d\n", ret);
3167 ret = brcmf_process_nvram_vars(bus);
3169 release_firmware(bus->firmware);
3174 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3178 /* Keep arm in reset */
3179 if (!brcmf_sdbrcm_download_state(bus, true)) {
3180 brcmf_err("error placing ARM core in reset\n");
3184 if (brcmf_sdbrcm_download_code_file(bus)) {
3185 brcmf_err("dongle image file download failed\n");
3189 if (brcmf_sdbrcm_download_nvram(bus)) {
3190 brcmf_err("dongle nvram file download failed\n");
3194 /* Take arm out of reset */
3195 if (!brcmf_sdbrcm_download_state(bus, false)) {
3196 brcmf_err("error getting out of ARM core reset\n");
3206 static bool brcmf_sdbrcm_sr_capable(struct brcmf_sdio *bus)
3210 brcmf_dbg(TRACE, "Enter\n");
3212 /* old chips with PMU version less than 17 don't support save restore */
3213 if (bus->ci->pmurev < 17)
3216 /* read PMU chipcontrol register 3*/
3217 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3218 brcmf_sdio_regwl(bus->sdiodev, addr, 3, NULL);
3219 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3220 reg = brcmf_sdio_regrl(bus->sdiodev, addr, NULL);
3225 static void brcmf_sdbrcm_sr_init(struct brcmf_sdio *bus)
3230 brcmf_dbg(TRACE, "Enter\n");
3232 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3235 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3239 val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3240 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3243 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3247 /* Add CMD14 Support */
3248 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3249 (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3250 SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3253 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3257 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3258 SBSDIO_FORCE_HT, &err);
3260 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3265 bus->sr_enabled = true;
3266 brcmf_dbg(INFO, "SR enabled\n");
3269 /* enable KSO bit */
3270 static int brcmf_sdbrcm_kso_init(struct brcmf_sdio *bus)
3275 brcmf_dbg(TRACE, "Enter\n");
3277 /* KSO bit added in SDIO core rev 12 */
3278 if (bus->ci->c_inf[1].rev < 12)
3281 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3284 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3288 if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3289 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3290 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3291 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3294 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3304 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3308 sdio_claim_host(bus->sdiodev->func[1]);
3310 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3312 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3314 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3316 sdio_release_host(bus->sdiodev->func[1]);
3321 static int brcmf_sdbrcm_bus_init(struct device *dev)
3323 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3324 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3325 struct brcmf_sdio *bus = sdiodev->bus;
3326 unsigned long timeout;
3331 brcmf_dbg(TRACE, "Enter\n");
3333 /* try to download image and nvram to the dongle */
3334 if (bus_if->state == BRCMF_BUS_DOWN) {
3335 if (!(brcmf_sdbrcm_download_firmware(bus)))
3339 if (!bus->sdiodev->bus_if->drvr)
3342 /* Start the watchdog timer */
3343 bus->sdcnt.tickcnt = 0;
3344 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3346 sdio_claim_host(bus->sdiodev->func[1]);
3348 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3349 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3350 if (bus->clkstate != CLK_AVAIL)
3353 /* Force clocks on backplane to be sure F2 interrupt propagates */
3354 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3355 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3357 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3358 (saveclk | SBSDIO_FORCE_HT), &err);
3361 brcmf_err("Failed to force clock for F2: err %d\n", err);
3365 /* Enable function 2 (frame transfers) */
3366 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3367 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3368 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3370 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3372 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3374 while (enable != ready) {
3375 ready = brcmf_sdio_regrb(bus->sdiodev,
3376 SDIO_CCCR_IORx, NULL);
3377 if (time_after(jiffies, timeout))
3379 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3380 /* prevent busy waiting if it takes too long */
3381 msleep_interruptible(20);
3384 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3386 /* If F2 successfully enabled, set core and enable interrupts */
3387 if (ready == enable) {
3388 /* Set up the interrupt mask and enable interrupts */
3389 bus->hostintmask = HOSTINTMASK;
3390 w_sdreg32(bus, bus->hostintmask,
3391 offsetof(struct sdpcmd_regs, hostintmask));
3393 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3395 /* Disable F2 again */
3396 enable = SDIO_FUNC_ENABLE_1;
3397 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3401 if (brcmf_sdbrcm_sr_capable(bus)) {
3402 brcmf_sdbrcm_sr_init(bus);
3404 /* Restore previous clock setting */
3405 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3410 ret = brcmf_sdio_intr_register(bus->sdiodev);
3412 brcmf_err("intr register failed:%d\n", ret);
3415 /* If we didn't come up, turn off backplane clock */
3416 if (bus_if->state != BRCMF_BUS_DATA)
3417 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3420 sdio_release_host(bus->sdiodev->func[1]);
3425 void brcmf_sdbrcm_isr(void *arg)
3427 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3429 brcmf_dbg(TRACE, "Enter\n");
3432 brcmf_err("bus is null pointer, exiting\n");
3436 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3437 brcmf_err("bus is down. we have nothing to do\n");
3440 /* Count the interrupt call */
3441 bus->sdcnt.intrcount++;
3443 atomic_set(&bus->ipend, 1);
3445 if (brcmf_sdio_intr_rstatus(bus)) {
3446 brcmf_err("failed backplane access\n");
3447 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3450 /* Disable additional interrupts (is this needed now)? */
3452 brcmf_err("isr w/o interrupt configured!\n");
3454 brcmf_sdbrcm_adddpctsk(bus);
3455 queue_work(bus->brcmf_wq, &bus->datawork);
3458 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3461 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3463 unsigned long flags;
3465 brcmf_dbg(TIMER, "Enter\n");
3467 /* Poll period: check device if appropriate. */
3468 if (!bus->sr_enabled &&
3469 bus->poll && (++bus->polltick >= bus->pollrate)) {
3472 /* Reset poll tick */
3475 /* Check device if no interrupts */
3477 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3479 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3480 if (list_empty(&bus->dpc_tsklst)) {
3482 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3484 sdio_claim_host(bus->sdiodev->func[1]);
3485 devpend = brcmf_sdio_regrb(bus->sdiodev,
3488 sdio_release_host(bus->sdiodev->func[1]);
3490 devpend & (INTR_STATUS_FUNC1 |
3493 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3497 /* If there is something, make like the ISR and
3500 bus->sdcnt.pollcnt++;
3501 atomic_set(&bus->ipend, 1);
3503 brcmf_sdbrcm_adddpctsk(bus);
3504 queue_work(bus->brcmf_wq, &bus->datawork);
3508 /* Update interrupt tracking */
3509 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3512 /* Poll for console output periodically */
3513 if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3514 bus->console_interval != 0) {
3515 bus->console.count += BRCMF_WD_POLL_MS;
3516 if (bus->console.count >= bus->console_interval) {
3517 bus->console.count -= bus->console_interval;
3518 sdio_claim_host(bus->sdiodev->func[1]);
3519 /* Make sure backplane clock is on */
3520 brcmf_sdbrcm_bus_sleep(bus, false, false);
3521 if (brcmf_sdbrcm_readconsole(bus) < 0)
3523 bus->console_interval = 0;
3524 sdio_release_host(bus->sdiodev->func[1]);
3529 /* On idle timeout clear activity flag and/or turn off clock */
3530 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3531 if (++bus->idlecount >= bus->idletime) {
3533 if (bus->activity) {
3534 bus->activity = false;
3535 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3537 brcmf_dbg(SDIO, "idle\n");
3538 sdio_claim_host(bus->sdiodev->func[1]);
3539 brcmf_sdbrcm_bus_sleep(bus, true, false);
3540 sdio_release_host(bus->sdiodev->func[1]);
3545 return (atomic_read(&bus->ipend) > 0);
3548 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3550 if (chipid == BCM43143_CHIP_ID)
3552 if (chipid == BCM43241_CHIP_ID)
3554 if (chipid == BCM4329_CHIP_ID)
3556 if (chipid == BCM4330_CHIP_ID)
3558 if (chipid == BCM4334_CHIP_ID)
3560 if (chipid == BCM4335_CHIP_ID)
3565 static void brcmf_sdio_dataworker(struct work_struct *work)
3567 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3569 struct list_head *cur_hd, *tmp_hd;
3570 unsigned long flags;
3572 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3573 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
3574 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3576 brcmf_sdbrcm_dpc(bus);
3578 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3582 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3585 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3587 brcmf_dbg(TRACE, "Enter\n");
3590 bus->rxctl = bus->rxbuf = NULL;
3593 kfree(bus->databuf);
3594 bus->databuf = NULL;
3597 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3599 brcmf_dbg(TRACE, "Enter\n");
3601 if (bus->sdiodev->bus_if->maxctl) {
3603 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3604 ALIGNMENT) + BRCMF_SDALIGN;
3605 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3610 /* Allocate buffer to receive glomed packet */
3611 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3612 if (!(bus->databuf)) {
3613 /* release rxbuf which was already located as above */
3619 /* Align the buffer */
3620 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3621 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3622 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3624 bus->dataptr = bus->databuf;
3633 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3641 bus->alp_only = true;
3643 sdio_claim_host(bus->sdiodev->func[1]);
3645 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3646 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3649 * Force PLL off until brcmf_sdio_chip_attach()
3650 * programs PLL control regs
3653 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3654 BRCMF_INIT_CLKCTL1, &err);
3656 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3657 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3659 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3660 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3661 err, BRCMF_INIT_CLKCTL1, clkctl);
3665 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3666 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3670 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3671 brcmf_err("unsupported chip: 0x%04x\n", bus->ci->chip);
3675 if (brcmf_sdbrcm_kso_init(bus)) {
3676 brcmf_err("error enabling KSO\n");
3680 if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3681 drivestrength = bus->sdiodev->pdata->drive_strength;
3683 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3684 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3686 /* Get info on the SOCRAM cores... */
3687 bus->ramsize = bus->ci->ramsize;
3688 if (!(bus->ramsize)) {
3689 brcmf_err("failed to find SOCRAM memory!\n");
3693 /* Set card control so an SDIO card reset does a WLAN backplane reset */
3694 reg_val = brcmf_sdio_regrb(bus->sdiodev,
3695 SDIO_CCCR_BRCM_CARDCTRL, &err);
3699 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3701 brcmf_sdio_regwb(bus->sdiodev,
3702 SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3706 /* set PMUControl so a backplane reset does PMU state reload */
3707 reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3709 reg_val = brcmf_sdio_regrl(bus->sdiodev,
3715 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3717 brcmf_sdio_regwl(bus->sdiodev,
3725 sdio_release_host(bus->sdiodev->func[1]);
3727 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3729 /* Locate an appropriately-aligned portion of hdrbuf */
3730 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3733 /* Set the poll and/or interrupt flags */
3742 sdio_release_host(bus->sdiodev->func[1]);
3746 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3748 brcmf_dbg(TRACE, "Enter\n");
3750 sdio_claim_host(bus->sdiodev->func[1]);
3752 /* Disable F2 to clear any intermediate frame state on the dongle */
3753 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3754 SDIO_FUNC_ENABLE_1, NULL);
3756 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3757 bus->rxflow = false;
3759 /* Done with backplane-dependent accesses, can drop clock... */
3760 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3762 sdio_release_host(bus->sdiodev->func[1]);
3764 /* ...and initialize clock/power states */
3765 bus->clkstate = CLK_SDONLY;
3766 bus->idletime = BRCMF_IDLE_INTERVAL;
3767 bus->idleclock = BRCMF_IDLE_ACTIVE;
3769 /* Query the F2 block size, set roundup accordingly */
3770 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3771 bus->roundup = min(max_roundup, bus->blocksize);
3773 /* bus module does not support packet chaining */
3774 bus->use_rxchain = false;
3775 bus->sd_rxchain = false;
3778 bus->sleeping = false;
3779 bus->sr_enabled = false;
3785 brcmf_sdbrcm_watchdog_thread(void *data)
3787 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3789 allow_signal(SIGTERM);
3790 /* Run until signal received */
3792 if (kthread_should_stop())
3794 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3795 brcmf_sdbrcm_bus_watchdog(bus);
3796 /* Count the tick for reference */
3797 bus->sdcnt.tickcnt++;
3805 brcmf_sdbrcm_watchdog(unsigned long data)
3807 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3809 if (bus->watchdog_tsk) {
3810 complete(&bus->watchdog_wait);
3811 /* Reschedule the watchdog */
3812 if (bus->wd_timer_valid)
3813 mod_timer(&bus->timer,
3814 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3818 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3820 brcmf_dbg(TRACE, "Enter\n");
3823 sdio_claim_host(bus->sdiodev->func[1]);
3824 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3825 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3826 sdio_release_host(bus->sdiodev->func[1]);
3827 brcmf_sdio_chip_detach(&bus->ci);
3828 if (bus->vars && bus->varsz)
3833 brcmf_dbg(TRACE, "Disconnected\n");
3836 /* Detach and free everything */
3837 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3839 brcmf_dbg(TRACE, "Enter\n");
3842 /* De-register interrupt handler */
3843 brcmf_sdio_intr_unregister(bus->sdiodev);
3845 cancel_work_sync(&bus->datawork);
3847 destroy_workqueue(bus->brcmf_wq);
3849 if (bus->sdiodev->bus_if->drvr) {
3850 brcmf_detach(bus->sdiodev->dev);
3851 brcmf_sdbrcm_release_dongle(bus);
3854 brcmf_sdbrcm_release_malloc(bus);
3859 brcmf_dbg(TRACE, "Disconnected\n");
3862 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3863 .stop = brcmf_sdbrcm_bus_stop,
3864 .init = brcmf_sdbrcm_bus_init,
3865 .txdata = brcmf_sdbrcm_bus_txdata,
3866 .txctl = brcmf_sdbrcm_bus_txctl,
3867 .rxctl = brcmf_sdbrcm_bus_rxctl,
3868 .gettxq = brcmf_sdbrcm_bus_gettxq,
3871 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3874 struct brcmf_sdio *bus;
3875 struct brcmf_bus_dcmd *dlst;
3877 u32 dngl_txglomalign;
3880 brcmf_dbg(TRACE, "Enter\n");
3882 /* We make an assumption about address window mappings:
3883 * regsva == SI_ENUM_BASE*/
3885 /* Allocate private bus interface state */
3886 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3890 bus->sdiodev = sdiodev;
3892 skb_queue_head_init(&bus->glom);
3893 bus->txbound = BRCMF_TXBOUND;
3894 bus->rxbound = BRCMF_RXBOUND;
3895 bus->txminmax = BRCMF_TXMINMAX;
3896 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3898 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3899 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3900 if (bus->brcmf_wq == NULL) {
3901 brcmf_err("insufficient memory to create txworkqueue\n");
3905 /* attempt to attach to the dongle */
3906 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3907 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
3911 spin_lock_init(&bus->rxctl_lock);
3912 spin_lock_init(&bus->txqlock);
3913 init_waitqueue_head(&bus->ctrl_wait);
3914 init_waitqueue_head(&bus->dcmd_resp_wait);
3916 /* Set up the watchdog timer */
3917 init_timer(&bus->timer);
3918 bus->timer.data = (unsigned long)bus;
3919 bus->timer.function = brcmf_sdbrcm_watchdog;
3921 /* Initialize watchdog thread */
3922 init_completion(&bus->watchdog_wait);
3923 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3924 bus, "brcmf_watchdog");
3925 if (IS_ERR(bus->watchdog_tsk)) {
3926 pr_warn("brcmf_watchdog thread failed to start\n");
3927 bus->watchdog_tsk = NULL;
3929 /* Initialize DPC thread */
3930 INIT_LIST_HEAD(&bus->dpc_tsklst);
3931 spin_lock_init(&bus->dpc_tl_lock);
3933 /* Assign bus interface call back */
3934 bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3935 bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3936 bus->sdiodev->bus_if->chip = bus->ci->chip;
3937 bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
3939 /* Attach to the brcmf/OS/network interface */
3940 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
3942 brcmf_err("brcmf_attach failed\n");
3946 /* Allocate buffers */
3947 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3948 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
3952 if (!(brcmf_sdbrcm_probe_init(bus))) {
3953 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
3957 brcmf_sdio_debugfs_create(bus);
3958 brcmf_dbg(INFO, "completed!!\n");
3960 /* sdio bus core specific dcmd */
3961 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3962 dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
3964 if (bus->ci->c_inf[idx].rev < 12) {
3965 /* for sdio core rev < 12, disable txgloming */
3967 dlst->name = "bus:txglom";
3968 dlst->param = (char *)&dngl_txglom;
3969 dlst->param_len = sizeof(u32);
3971 /* otherwise, set txglomalign */
3972 dngl_txglomalign = bus->sdiodev->bus_if->align;
3973 dlst->name = "bus:txglomalign";
3974 dlst->param = (char *)&dngl_txglomalign;
3975 dlst->param_len = sizeof(u32);
3977 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
3980 /* if firmware path present try to download and bring up bus */
3981 ret = brcmf_bus_start(bus->sdiodev->dev);
3983 brcmf_err("dongle is not responding\n");
3990 brcmf_sdbrcm_release(bus);
3994 void brcmf_sdbrcm_disconnect(void *ptr)
3996 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
3998 brcmf_dbg(TRACE, "Enter\n");
4001 brcmf_sdbrcm_release(bus);
4003 brcmf_dbg(TRACE, "Disconnected\n");
4007 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4009 /* Totally stop the timer */
4010 if (!wdtick && bus->wd_timer_valid) {
4011 del_timer_sync(&bus->timer);
4012 bus->wd_timer_valid = false;
4013 bus->save_ms = wdtick;
4017 /* don't start the wd until fw is loaded */
4018 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4022 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4023 if (bus->wd_timer_valid)
4024 /* Stop timer and restart at new value */
4025 del_timer_sync(&bus->timer);
4027 /* Create timer again when watchdog period is
4028 dynamically changed or in the first instance
4030 bus->timer.expires =
4031 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4032 add_timer(&bus->timer);
4035 /* Re arm the timer, at last watchdog period */
4036 mod_timer(&bus->timer,
4037 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4040 bus->wd_timer_valid = true;
4041 bus->save_ms = wdtick;