1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *****************************************************************************/
64 #include <linux/kernel.h>
65 #include <linux/module.h>
66 #include <linux/init.h>
68 #include <net/mac80211.h>
70 #include "iwl-commands.h"
73 #include "iwl-debug.h"
74 #include "iwl-eeprom.h"
77 /************************** EEPROM BANDS ****************************
79 * The iwl_eeprom_band definitions below provide the mapping from the
80 * EEPROM contents to the specific channel number supported for each
83 * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
84 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
85 * The specific geography and calibration information for that channel
86 * is contained in the eeprom map itself.
88 * During init, we copy the eeprom information and channel map
89 * information into priv->channel_info_24/52 and priv->channel_map_24/52
91 * channel_map_24/52 provides the index in the channel_info array for a
92 * given channel. We have to have two separate maps as there is channel
93 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
96 * A value of 0xff stored in the channel_map indicates that the channel
97 * is not supported by the hardware at all.
99 * A value of 0xfe in the channel_map indicates that the channel is not
100 * valid for Tx with the current hardware. This means that
101 * while the system can tune and receive on a given channel, it may not
102 * be able to associate or transmit any frames on that
103 * channel. There is no corresponding channel information for that
106 *********************************************************************/
109 const u8 iwl_eeprom_band_1[14] = {
110 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
114 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
115 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
118 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
119 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
122 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
123 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
126 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
127 145, 149, 153, 157, 161, 165
130 static const u8 iwl_eeprom_band_6[] = { /* 2.4 ht40 channel */
134 static const u8 iwl_eeprom_band_7[] = { /* 5.2 ht40 channel */
135 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
139 * struct iwl_txpwr_section: eeprom section information
140 * @offset: indirect address into eeprom image
141 * @count: number of "struct iwl_eeprom_enhanced_txpwr" in this section
142 * @band: band type for the section
143 * @is_common - true: common section, false: channel section
144 * @is_cck - true: cck section, false: not cck section
145 * @is_ht_40 - true: all channel in the section are HT40 channel,
146 * false: legacy or HT 20 MHz
147 * ignore if it is common section
148 * @iwl_eeprom_section_channel: channel array in the section,
149 * ignore if common section
151 struct iwl_txpwr_section {
154 enum ieee80211_band band;
158 u8 iwl_eeprom_section_channel[EEPROM_MAX_TXPOWER_SECTION_ELEMENTS];
162 * section 1 - 3 are regulatory tx power apply to all channels based on
163 * modulation: CCK, OFDM
164 * Band: 2.4GHz, 5.2GHz
165 * section 4 - 10 are regulatory tx power apply to specified channels
167 * 1L - Channel 1 Legacy
169 * (1,+1) - Channel 1 HT40 "_above_"
171 * Section 1: all CCK channels
172 * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40) channels
173 * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
174 * Section 4: 2.4 GHz 20MHz channels: 1L, 1HT, 2L, 2HT, 10L, 10HT, 11L, 11HT
175 * Section 5: 2.4 GHz 40MHz channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1)
176 * Section 6: 5.2 GHz 20MHz channels: 36L, 64L, 100L, 36HT, 64HT, 100HT
177 * Section 7: 5.2 GHz 40MHz channels: (36,+1) (60,+1) (100,+1)
178 * Section 8: 2.4 GHz channel: 13L, 13HT
179 * Section 9: 2.4 GHz channel: 140L, 140HT
180 * Section 10: 2.4 GHz 40MHz channels: (132,+1) (44,+1)
183 static const struct iwl_txpwr_section enhinfo[] = {
184 { EEPROM_LB_CCK_20_COMMON, 1, IEEE80211_BAND_2GHZ, true, true, false },
185 { EEPROM_LB_OFDM_COMMON, 3, IEEE80211_BAND_2GHZ, true, false, false },
186 { EEPROM_HB_OFDM_COMMON, 3, IEEE80211_BAND_5GHZ, true, false, false },
187 { EEPROM_LB_OFDM_20_BAND, 8, IEEE80211_BAND_2GHZ,
189 {1, 1, 2, 2, 10, 10, 11, 11 } },
190 { EEPROM_LB_OFDM_HT40_BAND, 5, IEEE80211_BAND_2GHZ,
193 { EEPROM_HB_OFDM_20_BAND, 6, IEEE80211_BAND_5GHZ,
195 { 36, 64, 100, 36, 64, 100 } },
196 { EEPROM_HB_OFDM_HT40_BAND, 3, IEEE80211_BAND_5GHZ,
199 { EEPROM_LB_OFDM_20_CHANNEL_13, 2, IEEE80211_BAND_2GHZ,
202 { EEPROM_HB_OFDM_20_CHANNEL_140, 2, IEEE80211_BAND_5GHZ,
205 { EEPROM_HB_OFDM_HT40_BAND_1, 2, IEEE80211_BAND_5GHZ,
210 /******************************************************************************
212 * EEPROM related functions
214 ******************************************************************************/
216 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
218 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
219 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
220 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
225 EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
227 static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
231 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
232 if (mode == IWL_OTP_ACCESS_ABSOLUTE)
233 iwl_clear_bit(priv, CSR_OTP_GP_REG,
234 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
236 iwl_set_bit(priv, CSR_OTP_GP_REG,
237 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
240 static int iwlcore_get_nvm_type(struct iwl_priv *priv)
245 /* OTP only valid for CP/PP and after */
246 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
247 case CSR_HW_REV_TYPE_NONE:
248 IWL_ERR(priv, "Unknown hardware type\n");
250 case CSR_HW_REV_TYPE_3945:
251 case CSR_HW_REV_TYPE_4965:
252 case CSR_HW_REV_TYPE_5300:
253 case CSR_HW_REV_TYPE_5350:
254 case CSR_HW_REV_TYPE_5100:
255 case CSR_HW_REV_TYPE_5150:
256 nvm_type = NVM_DEVICE_TYPE_EEPROM;
259 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
260 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
261 nvm_type = NVM_DEVICE_TYPE_OTP;
263 nvm_type = NVM_DEVICE_TYPE_EEPROM;
270 * The device's EEPROM semaphore prevents conflicts between driver and uCode
271 * when accessing the EEPROM; each access is a series of pulses to/from the
272 * EEPROM chip, not a single event, so even reads could conflict if they
273 * weren't arbitrated by the semaphore.
275 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
280 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
281 /* Request semaphore */
282 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
283 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
285 /* See if we got it */
286 ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG,
287 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
290 IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
298 EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
300 void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
302 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
303 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
306 EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
308 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
310 BUG_ON(offset >= priv->cfg->eeprom_size);
311 return &priv->eeprom[offset];
313 EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
315 static int iwl_init_otp_access(struct iwl_priv *priv)
319 /* Enable 40MHz radio clock */
320 _iwl_write32(priv, CSR_GP_CNTRL,
321 _iwl_read32(priv, CSR_GP_CNTRL) |
322 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
324 /* wait for clock to be ready */
325 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
326 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
329 IWL_ERR(priv, "Time out access OTP\n");
331 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
332 APMG_PS_CTRL_VAL_RESET_REQ);
334 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
335 APMG_PS_CTRL_VAL_RESET_REQ);
340 static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
346 _iwl_write32(priv, CSR_EEPROM_REG,
347 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
348 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
349 CSR_EEPROM_REG_READ_VALID_MSK,
350 IWL_EEPROM_ACCESS_TIMEOUT);
352 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
355 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
356 /* check for ECC errors: */
357 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
358 if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
359 /* stop in this case */
360 /* set the uncorrectable OTP ECC bit for acknowledgement */
361 iwl_set_bit(priv, CSR_OTP_GP_REG,
362 CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
363 IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n");
366 if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
367 /* continue in this case */
368 /* set the correctable OTP ECC bit for acknowledgement */
369 iwl_set_bit(priv, CSR_OTP_GP_REG,
370 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
371 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
373 *eeprom_data = le16_to_cpu((__force __le16)(r >> 16));
378 * iwl_is_otp_empty: check for empty OTP
380 static bool iwl_is_otp_empty(struct iwl_priv *priv)
382 u16 next_link_addr = 0, link_value;
383 bool is_empty = false;
385 /* locate the beginning of OTP link list */
386 if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) {
388 IWL_ERR(priv, "OTP is empty\n");
392 IWL_ERR(priv, "Unable to read first block of OTP list.\n");
401 * iwl_find_otp_image: find EEPROM image in OTP
402 * finding the OTP block that contains the EEPROM image.
403 * the last valid block on the link list (the block _before_ the last block)
404 * is the block we should read and used to configure the device.
405 * If all the available OTP blocks are full, the last block will be the block
406 * we should read and used to configure the device.
407 * only perform this operation if shadow RAM is disabled
409 static int iwl_find_otp_image(struct iwl_priv *priv,
412 u16 next_link_addr = 0, link_value = 0, valid_addr;
415 /* set addressing mode to absolute to traverse the link list */
416 iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE);
418 /* checking for empty OTP or error */
419 if (iwl_is_otp_empty(priv))
423 * start traverse link list
424 * until reach the max number of OTP blocks
425 * different devices have different number of OTP blocks
428 /* save current valid block address
429 * check for more block on the link list
431 valid_addr = next_link_addr;
432 next_link_addr = link_value * sizeof(u16);
433 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
434 usedblocks, next_link_addr);
435 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
439 * reach the end of link list, return success and
440 * set address point to the starting address
443 *validblockaddr = valid_addr;
444 /* skip first 2 bytes (link list pointer) */
445 *validblockaddr += 2;
448 /* more in the link list, continue */
450 } while (usedblocks <= priv->cfg->max_ll_items);
452 /* OTP has no valid blocks */
453 IWL_DEBUG_INFO(priv, "OTP has no valid blocks\n");
458 * iwl_eeprom_init - read EEPROM contents
460 * Load the EEPROM contents from adapter into priv->eeprom
462 * NOTE: This routine uses the non-debug IO access functions.
464 int iwl_eeprom_init(struct iwl_priv *priv)
467 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
471 u16 validblockaddr = 0;
474 priv->nvm_device_type = iwlcore_get_nvm_type(priv);
475 if (priv->nvm_device_type == -ENOENT)
477 /* allocate eeprom */
478 IWL_DEBUG_INFO(priv, "NVM size = %d\n", priv->cfg->eeprom_size);
479 sz = priv->cfg->eeprom_size;
480 priv->eeprom = kzalloc(sz, GFP_KERNEL);
485 e = (u16 *)priv->eeprom;
487 ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
489 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
494 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
495 ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
497 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
501 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
502 ret = iwl_init_otp_access(priv);
504 IWL_ERR(priv, "Failed to initialize OTP access.\n");
508 _iwl_write32(priv, CSR_EEPROM_GP,
509 iwl_read32(priv, CSR_EEPROM_GP) &
510 ~CSR_EEPROM_GP_IF_OWNER_MSK);
512 iwl_set_bit(priv, CSR_OTP_GP_REG,
513 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
514 CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
515 /* traversing the linked list if no shadow ram supported */
516 if (!priv->cfg->shadow_ram_support) {
517 if (iwl_find_otp_image(priv, &validblockaddr)) {
522 for (addr = validblockaddr; addr < validblockaddr + sz;
523 addr += sizeof(u16)) {
526 ret = iwl_read_otp_word(priv, addr, &eeprom_data);
529 e[cache_addr / 2] = eeprom_data;
530 cache_addr += sizeof(u16);
533 /* eeprom is an array of 16bit values */
534 for (addr = 0; addr < sz; addr += sizeof(u16)) {
537 _iwl_write32(priv, CSR_EEPROM_REG,
538 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
540 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
541 CSR_EEPROM_REG_READ_VALID_MSK,
542 IWL_EEPROM_ACCESS_TIMEOUT);
544 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
547 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
548 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
553 priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
556 iwl_eeprom_free(priv);
560 EXPORT_SYMBOL(iwl_eeprom_init);
562 void iwl_eeprom_free(struct iwl_priv *priv)
567 EXPORT_SYMBOL(iwl_eeprom_free);
569 int iwl_eeprom_check_version(struct iwl_priv *priv)
574 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
575 calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
577 if (eeprom_ver < priv->cfg->eeprom_ver ||
578 calib_ver < priv->cfg->eeprom_calib_ver)
583 IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
584 eeprom_ver, priv->cfg->eeprom_ver,
585 calib_ver, priv->cfg->eeprom_calib_ver);
589 EXPORT_SYMBOL(iwl_eeprom_check_version);
591 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
593 return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
595 EXPORT_SYMBOL(iwl_eeprom_query_addr);
597 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
601 return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
603 EXPORT_SYMBOL(iwl_eeprom_query16);
605 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
607 const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
609 memcpy(mac, addr, ETH_ALEN);
611 EXPORT_SYMBOL(iwl_eeprom_get_mac);
613 static void iwl_init_band_reference(const struct iwl_priv *priv,
614 int eep_band, int *eeprom_ch_count,
615 const struct iwl_eeprom_channel **eeprom_ch_info,
616 const u8 **eeprom_ch_index)
618 u32 offset = priv->cfg->ops->lib->
619 eeprom_ops.regulatory_bands[eep_band - 1];
621 case 1: /* 2.4GHz band */
622 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
623 *eeprom_ch_info = (struct iwl_eeprom_channel *)
624 iwl_eeprom_query_addr(priv, offset);
625 *eeprom_ch_index = iwl_eeprom_band_1;
627 case 2: /* 4.9GHz band */
628 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
629 *eeprom_ch_info = (struct iwl_eeprom_channel *)
630 iwl_eeprom_query_addr(priv, offset);
631 *eeprom_ch_index = iwl_eeprom_band_2;
633 case 3: /* 5.2GHz band */
634 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
635 *eeprom_ch_info = (struct iwl_eeprom_channel *)
636 iwl_eeprom_query_addr(priv, offset);
637 *eeprom_ch_index = iwl_eeprom_band_3;
639 case 4: /* 5.5GHz band */
640 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
641 *eeprom_ch_info = (struct iwl_eeprom_channel *)
642 iwl_eeprom_query_addr(priv, offset);
643 *eeprom_ch_index = iwl_eeprom_band_4;
645 case 5: /* 5.7GHz band */
646 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
647 *eeprom_ch_info = (struct iwl_eeprom_channel *)
648 iwl_eeprom_query_addr(priv, offset);
649 *eeprom_ch_index = iwl_eeprom_band_5;
651 case 6: /* 2.4GHz ht40 channels */
652 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
653 *eeprom_ch_info = (struct iwl_eeprom_channel *)
654 iwl_eeprom_query_addr(priv, offset);
655 *eeprom_ch_index = iwl_eeprom_band_6;
657 case 7: /* 5 GHz ht40 channels */
658 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
659 *eeprom_ch_info = (struct iwl_eeprom_channel *)
660 iwl_eeprom_query_addr(priv, offset);
661 *eeprom_ch_index = iwl_eeprom_band_7;
669 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
673 * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
675 * Does not set up a command, or touch hardware.
677 static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
678 enum ieee80211_band band, u16 channel,
679 const struct iwl_eeprom_channel *eeprom_ch,
680 u8 clear_ht40_extension_channel)
682 struct iwl_channel_info *ch_info;
684 ch_info = (struct iwl_channel_info *)
685 iwl_get_channel_info(priv, band, channel);
687 if (!is_channel_valid(ch_info))
690 IWL_DEBUG_INFO(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
691 " Ad-Hoc %ssupported\n",
693 is_channel_a_band(ch_info) ?
695 CHECK_AND_PRINT(IBSS),
696 CHECK_AND_PRINT(ACTIVE),
697 CHECK_AND_PRINT(RADAR),
698 CHECK_AND_PRINT(WIDE),
699 CHECK_AND_PRINT(DFS),
701 eeprom_ch->max_power_avg,
702 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
703 && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
706 ch_info->ht40_eeprom = *eeprom_ch;
707 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
708 ch_info->ht40_curr_txpow = eeprom_ch->max_power_avg;
709 ch_info->ht40_min_power = 0;
710 ch_info->ht40_scan_power = eeprom_ch->max_power_avg;
711 ch_info->ht40_flags = eeprom_ch->flags;
712 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
718 * iwl_get_max_txpower_avg - get the highest tx power from all chains.
719 * find the highest tx power from all chains for the channel
721 static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
722 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower, int element)
724 s8 max_txpower_avg = 0; /* (dBm) */
726 IWL_DEBUG_INFO(priv, "%d - "
727 "chain_a: %d dB chain_b: %d dB "
728 "chain_c: %d dB mimo2: %d dB mimo3: %d dB\n",
730 enhanced_txpower[element].chain_a_max >> 1,
731 enhanced_txpower[element].chain_b_max >> 1,
732 enhanced_txpower[element].chain_c_max >> 1,
733 enhanced_txpower[element].mimo2_max >> 1,
734 enhanced_txpower[element].mimo3_max >> 1);
735 /* Take the highest tx power from any valid chains */
736 if ((priv->cfg->valid_tx_ant & ANT_A) &&
737 (enhanced_txpower[element].chain_a_max > max_txpower_avg))
738 max_txpower_avg = enhanced_txpower[element].chain_a_max;
739 if ((priv->cfg->valid_tx_ant & ANT_B) &&
740 (enhanced_txpower[element].chain_b_max > max_txpower_avg))
741 max_txpower_avg = enhanced_txpower[element].chain_b_max;
742 if ((priv->cfg->valid_tx_ant & ANT_C) &&
743 (enhanced_txpower[element].chain_c_max > max_txpower_avg))
744 max_txpower_avg = enhanced_txpower[element].chain_c_max;
745 if (((priv->cfg->valid_tx_ant == ANT_AB) |
746 (priv->cfg->valid_tx_ant == ANT_BC) |
747 (priv->cfg->valid_tx_ant == ANT_AC)) &&
748 (enhanced_txpower[element].mimo2_max > max_txpower_avg))
749 max_txpower_avg = enhanced_txpower[element].mimo2_max;
750 if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
751 (enhanced_txpower[element].mimo3_max > max_txpower_avg))
752 max_txpower_avg = enhanced_txpower[element].mimo3_max;
754 /* max. tx power in EEPROM is in 1/2 dBm format
755 * convert from 1/2 dBm to dBm
757 return max_txpower_avg >> 1;
761 * iwl_update_common_txpower: update channel tx power
762 * update tx power per band based on EEPROM enhanced tx power info.
764 static s8 iwl_update_common_txpower(struct iwl_priv *priv,
765 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
766 int section, int element)
768 struct iwl_channel_info *ch_info;
770 bool is_ht40 = false;
771 s8 max_txpower_avg; /* (dBm) */
773 /* it is common section, contain all type (Legacy, HT and HT40)
774 * based on the element in the section to determine
777 if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX)
780 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
781 ch_info = priv->channel_info;
783 for (ch = 0; ch < priv->channel_count; ch++) {
784 /* find matching band and update tx power if needed */
785 if ((ch_info->band == enhinfo[section].band) &&
786 (ch_info->max_power_avg < max_txpower_avg) && (!is_ht40)) {
787 /* Update regulatory-based run-time data */
788 ch_info->max_power_avg = ch_info->curr_txpow =
790 ch_info->scan_power = max_txpower_avg;
792 if ((ch_info->band == enhinfo[section].band) && is_ht40 &&
793 ch_info->ht40_max_power_avg &&
794 (ch_info->ht40_max_power_avg < max_txpower_avg)) {
795 /* Update regulatory-based run-time data */
796 ch_info->ht40_max_power_avg = max_txpower_avg;
797 ch_info->ht40_curr_txpow = max_txpower_avg;
798 ch_info->ht40_scan_power = max_txpower_avg;
802 return max_txpower_avg;
806 * iwl_update_channel_txpower: update channel tx power
807 * update channel tx power based on EEPROM enhanced tx power info.
809 static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
810 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
811 int section, int element)
813 struct iwl_channel_info *ch_info;
816 s8 max_txpower_avg; /* (dBm) */
818 channel = enhinfo[section].iwl_eeprom_section_channel[element];
820 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
822 ch_info = priv->channel_info;
823 for (ch = 0; ch < priv->channel_count; ch++) {
824 /* find matching channel and update tx power if needed */
825 if (ch_info->channel == channel) {
826 if ((ch_info->max_power_avg < max_txpower_avg) &&
827 (!enhinfo[section].is_ht40)) {
828 /* Update regulatory-based run-time data */
829 ch_info->max_power_avg = max_txpower_avg;
830 ch_info->curr_txpow = max_txpower_avg;
831 ch_info->scan_power = max_txpower_avg;
833 if ((enhinfo[section].is_ht40) &&
834 (ch_info->ht40_max_power_avg) &&
835 (ch_info->ht40_max_power_avg < max_txpower_avg)) {
836 /* Update regulatory-based run-time data */
837 ch_info->ht40_max_power_avg = max_txpower_avg;
838 ch_info->ht40_curr_txpow = max_txpower_avg;
839 ch_info->ht40_scan_power = max_txpower_avg;
845 return max_txpower_avg;
849 * iwlcore_eeprom_enhanced_txpower: process enhanced tx power info
851 void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
853 int eeprom_section_count = 0;
854 int section, element;
855 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower;
857 s8 max_txpower_avg; /* (dBm) */
859 /* Loop through all the sections
860 * adjust bands and channel's max tx power
861 * Set the tx_power_user_lmt to the highest power
862 * supported by any channels and chains
864 for (section = 0; section < ARRAY_SIZE(enhinfo); section++) {
865 eeprom_section_count = enhinfo[section].count;
866 offset = enhinfo[section].offset;
867 enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *)
868 iwl_eeprom_query_addr(priv, offset);
870 for (element = 0; element < eeprom_section_count; element++) {
871 if (enhinfo[section].is_common)
873 iwl_update_common_txpower(priv,
874 enhanced_txpower, section, element);
877 iwl_update_channel_txpower(priv,
878 enhanced_txpower, section, element);
880 /* Update the tx_power_user_lmt to the highest power
881 * supported by any channel */
882 if (max_txpower_avg > priv->tx_power_user_lmt)
883 priv->tx_power_user_lmt = max_txpower_avg;
887 EXPORT_SYMBOL(iwlcore_eeprom_enhanced_txpower);
889 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
893 * iwl_init_channel_map - Set up driver's info for all possible channels
895 int iwl_init_channel_map(struct iwl_priv *priv)
897 int eeprom_ch_count = 0;
898 const u8 *eeprom_ch_index = NULL;
899 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
901 struct iwl_channel_info *ch_info;
903 if (priv->channel_count) {
904 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
908 IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
910 priv->channel_count =
911 ARRAY_SIZE(iwl_eeprom_band_1) +
912 ARRAY_SIZE(iwl_eeprom_band_2) +
913 ARRAY_SIZE(iwl_eeprom_band_3) +
914 ARRAY_SIZE(iwl_eeprom_band_4) +
915 ARRAY_SIZE(iwl_eeprom_band_5);
917 IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
919 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
920 priv->channel_count, GFP_KERNEL);
921 if (!priv->channel_info) {
922 IWL_ERR(priv, "Could not allocate channel_info\n");
923 priv->channel_count = 0;
927 ch_info = priv->channel_info;
929 /* Loop through the 5 EEPROM bands adding them in order to the
930 * channel map we maintain (that contains additional information than
931 * what just in the EEPROM) */
932 for (band = 1; band <= 5; band++) {
934 iwl_init_band_reference(priv, band, &eeprom_ch_count,
935 &eeprom_ch_info, &eeprom_ch_index);
937 /* Loop through each band adding each of the channels */
938 for (ch = 0; ch < eeprom_ch_count; ch++) {
939 ch_info->channel = eeprom_ch_index[ch];
940 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
943 /* permanently store EEPROM's channel regulatory flags
944 * and max power in channel info database. */
945 ch_info->eeprom = eeprom_ch_info[ch];
947 /* Copy the run-time flags so they are there even on
948 * invalid channels */
949 ch_info->flags = eeprom_ch_info[ch].flags;
950 /* First write that ht40 is not enabled, and then enable
952 ch_info->ht40_extension_channel =
953 IEEE80211_CHAN_NO_HT40;
955 if (!(is_channel_valid(ch_info))) {
956 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
960 is_channel_a_band(ch_info) ?
966 /* Initialize regulatory-based run-time data */
967 ch_info->max_power_avg = ch_info->curr_txpow =
968 eeprom_ch_info[ch].max_power_avg;
969 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
970 ch_info->min_power = 0;
972 IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
973 " Ad-Hoc %ssupported\n",
975 is_channel_a_band(ch_info) ?
977 CHECK_AND_PRINT_I(VALID),
978 CHECK_AND_PRINT_I(IBSS),
979 CHECK_AND_PRINT_I(ACTIVE),
980 CHECK_AND_PRINT_I(RADAR),
981 CHECK_AND_PRINT_I(WIDE),
982 CHECK_AND_PRINT_I(DFS),
983 eeprom_ch_info[ch].flags,
984 eeprom_ch_info[ch].max_power_avg,
985 ((eeprom_ch_info[ch].
986 flags & EEPROM_CHANNEL_IBSS)
987 && !(eeprom_ch_info[ch].
988 flags & EEPROM_CHANNEL_RADAR))
991 /* Set the tx_power_user_lmt to the highest power
992 * supported by any channel */
993 if (eeprom_ch_info[ch].max_power_avg >
994 priv->tx_power_user_lmt)
995 priv->tx_power_user_lmt =
996 eeprom_ch_info[ch].max_power_avg;
1002 /* Check if we do have HT40 channels */
1003 if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
1004 EEPROM_REGULATORY_BAND_NO_HT40 &&
1005 priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
1006 EEPROM_REGULATORY_BAND_NO_HT40)
1009 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
1010 for (band = 6; band <= 7; band++) {
1011 enum ieee80211_band ieeeband;
1013 iwl_init_band_reference(priv, band, &eeprom_ch_count,
1014 &eeprom_ch_info, &eeprom_ch_index);
1016 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1018 (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1020 /* Loop through each band adding each of the channels */
1021 for (ch = 0; ch < eeprom_ch_count; ch++) {
1022 /* Set up driver's info for lower half */
1023 iwl_mod_ht40_chan_info(priv, ieeeband,
1024 eeprom_ch_index[ch],
1025 &eeprom_ch_info[ch],
1026 IEEE80211_CHAN_NO_HT40PLUS);
1028 /* Set up driver's info for upper half */
1029 iwl_mod_ht40_chan_info(priv, ieeeband,
1030 eeprom_ch_index[ch] + 4,
1031 &eeprom_ch_info[ch],
1032 IEEE80211_CHAN_NO_HT40MINUS);
1036 /* for newer device (6000 series and up)
1037 * EEPROM contain enhanced tx power information
1038 * driver need to process addition information
1039 * to determine the max channel tx power limits
1041 if (priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower)
1042 priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower(priv);
1046 EXPORT_SYMBOL(iwl_init_channel_map);
1049 * iwl_free_channel_map - undo allocations in iwl_init_channel_map
1051 void iwl_free_channel_map(struct iwl_priv *priv)
1053 kfree(priv->channel_info);
1054 priv->channel_count = 0;
1056 EXPORT_SYMBOL(iwl_free_channel_map);
1059 * iwl_get_channel_info - Find driver's private channel info
1061 * Based on band and channel number.
1063 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
1064 enum ieee80211_band band, u16 channel)
1069 case IEEE80211_BAND_5GHZ:
1070 for (i = 14; i < priv->channel_count; i++) {
1071 if (priv->channel_info[i].channel == channel)
1072 return &priv->channel_info[i];
1075 case IEEE80211_BAND_2GHZ:
1076 if (channel >= 1 && channel <= 14)
1077 return &priv->channel_info[channel - 1];
1085 EXPORT_SYMBOL(iwl_get_channel_info);