drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 #include <linux/crc-itu-t.h>
  28 #include <linux/delay.h>
  29 #include <linux/etherdevice.h>
  30 #include <linux/init.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/usb.h>
  34
  35 #include "rt2x00.h"
  36 #include "rt2x00usb.h"
  37 #include "rt73usb.h"
  38
  39 /*
  40  * Register access.
  41  * All access to the CSR registers will go through the methods
  42  * rt73usb_register_read and rt73usb_register_write.
  43  * BBP and RF register require indirect register access,
  44  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  45  * These indirect registers work with busy bits,
  46  * and we will try maximal REGISTER_BUSY_COUNT times to access
  47  * the register while taking a REGISTER_BUSY_DELAY us delay
  48  * between each attampt. When the busy bit is still set at that time,
  49  * the access attempt is considered to have failed,
  50  * and we will print an error.
  51  * The _lock versions must be used if you already hold the usb_cache_mutex
  52  */
  53 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
  54                                          const unsigned int offset, u32 *value)
  55 {
  56         __le32 reg;
  57         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  58                                       USB_VENDOR_REQUEST_IN, offset,
  59                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  60         *value = le32_to_cpu(reg);
  61 }
  62
  63 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  64                                               const unsigned int offset, u32 *value)
  65 {
  66         __le32 reg;
  67         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  68                                        USB_VENDOR_REQUEST_IN, offset,
  69                                        &reg, sizeof(u32), REGISTER_TIMEOUT);
  70         *value = le32_to_cpu(reg);
  71 }
  72
  73 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  74                                               const unsigned int offset,
  75                                               void *value, const u32 length)
  76 {
  77         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  78                                       USB_VENDOR_REQUEST_IN, offset,
  79                                       value, length,
  80                                       REGISTER_TIMEOUT32(length));
  81 }
  82
  83 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
  84                                           const unsigned int offset, u32 value)
  85 {
  86         __le32 reg = cpu_to_le32(value);
  87         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  88                                       USB_VENDOR_REQUEST_OUT, offset,
  89                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  90 }
  91
  92 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  93                                                const unsigned int offset, u32 value)
  94 {
  95         __le32 reg = cpu_to_le32(value);
  96         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  97                                        USB_VENDOR_REQUEST_OUT, offset,
  98                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  99 }
 100
 101 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
 102                                                const unsigned int offset,
 103                                                void *value, const u32 length)
 104 {
 105         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
 106                                       USB_VENDOR_REQUEST_OUT, offset,
 107                                       value, length,
 108                                       REGISTER_TIMEOUT32(length));
 109 }
 110
 111 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
 112 {
 113         u32 reg;
 114         unsigned int i;
 115
 116         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 117                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, &reg);
 118                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 119                         break;
 120                 udelay(REGISTER_BUSY_DELAY);
 121         }
 122
 123         return reg;
 124 }
 125
 126 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
 127                               const unsigned int word, const u8 value)
 128 {
 129         u32 reg;
 130
 131         mutex_lock(&rt2x00dev->usb_cache_mutex);
 132
 133         /*
 134          * Wait until the BBP becomes ready.
 135          */
 136         reg = rt73usb_bbp_check(rt2x00dev);
 137         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 138                 goto exit_fail;
 139
 140         /*
 141          * Write the data into the BBP.
 142          */
 143         reg = 0;
 144         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 145         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 146         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 147         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 148
 149         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 150         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 151
 152         return;
 153
 154 exit_fail:
 155         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 156
 157         ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 158 }
 159
 160 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
 161                              const unsigned int word, u8 *value)
 162 {
 163         u32 reg;
 164
 165         mutex_lock(&rt2x00dev->usb_cache_mutex);
 166
 167         /*
 168          * Wait until the BBP becomes ready.
 169          */
 170         reg = rt73usb_bbp_check(rt2x00dev);
 171         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 172                 goto exit_fail;
 173
 174         /*
 175          * Write the request into the BBP.
 176          */
 177         reg = 0;
 178         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 179         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 180         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 181
 182         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 183
 184         /*
 185          * Wait until the BBP becomes ready.
 186          */
 187         reg = rt73usb_bbp_check(rt2x00dev);
 188         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 189                 goto exit_fail;
 190
 191         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 192         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 193
 194         return;
 195
 196 exit_fail:
 197         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 198
 199         ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 200         *value = 0xff;
 201 }
 202
 203 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
 204                              const unsigned int word, const u32 value)
 205 {
 206         u32 reg;
 207         unsigned int i;
 208
 209         if (!word)
 210                 return;
 211
 212         mutex_lock(&rt2x00dev->usb_cache_mutex);
 213
 214         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 215                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, &reg);
 216                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 217                         goto rf_write;
 218                 udelay(REGISTER_BUSY_DELAY);
 219         }
 220
 221         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 222         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 223         return;
 224
 225 rf_write:
 226         reg = 0;
 227         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 228
 229         /*
 230          * RF5225 and RF2527 contain 21 bits per RF register value,
 231          * all others contain 20 bits.
 232          */
 233         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 234                            20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 235                                  rt2x00_rf(&rt2x00dev->chip, RF2527)));
 236         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 237         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 238
 239         rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
 240         rt2x00_rf_write(rt2x00dev, word, value);
 241         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 242 }
 243
 244 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 245 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 246
 247 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
 248                              const unsigned int word, u32 *data)
 249 {
 250         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 251 }
 252
 253 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
 254                               const unsigned int word, u32 data)
 255 {
 256         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 257 }
 258
 259 static const struct rt2x00debug rt73usb_rt2x00debug = {
 260         .owner  = THIS_MODULE,
 261         .csr    = {
 262                 .read           = rt73usb_read_csr,
 263                 .write          = rt73usb_write_csr,
 264                 .word_size      = sizeof(u32),
 265                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 266         },
 267         .eeprom = {
 268                 .read           = rt2x00_eeprom_read,
 269                 .write          = rt2x00_eeprom_write,
 270                 .word_size      = sizeof(u16),
 271                 .word_count     = EEPROM_SIZE / sizeof(u16),
 272         },
 273         .bbp    = {
 274                 .read           = rt73usb_bbp_read,
 275                 .write          = rt73usb_bbp_write,
 276                 .word_size      = sizeof(u8),
 277                 .word_count     = BBP_SIZE / sizeof(u8),
 278         },
 279         .rf     = {
 280                 .read           = rt2x00_rf_read,
 281                 .write          = rt73usb_rf_write,
 282                 .word_size      = sizeof(u32),
 283                 .word_count     = RF_SIZE / sizeof(u32),
 284         },
 285 };
 286 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 287
 288 #ifdef CONFIG_RT73USB_LEDS
 289 static void rt73usb_brightness_set(struct led_classdev *led_cdev,
 290                                    enum led_brightness brightness)
 291 {
 292         struct rt2x00_led *led =
 293            container_of(led_cdev, struct rt2x00_led, led_dev);
 294         unsigned int enabled = brightness != LED_OFF;
 295         unsigned int a_mode =
 296             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_5GHZ);
 297         unsigned int bg_mode =
 298             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
 299
 300         if (led->type == LED_TYPE_RADIO) {
 301                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 302                                    MCU_LEDCS_RADIO_STATUS, enabled);
 303
 304                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 305                                             0, led->rt2x00dev->led_mcu_reg,
 306                                             REGISTER_TIMEOUT);
 307         } else if (led->type == LED_TYPE_ASSOC) {
 308                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 309                                    MCU_LEDCS_LINK_BG_STATUS, bg_mode);
 310                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 311                                    MCU_LEDCS_LINK_A_STATUS, a_mode);
 312
 313                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 314                                             0, led->rt2x00dev->led_mcu_reg,
 315                                             REGISTER_TIMEOUT);
 316         } else if (led->type == LED_TYPE_QUALITY) {
 317                 /*
 318                  * The brightness is divided into 6 levels (0 - 5),
 319                  * this means we need to convert the brightness
 320                  * argument into the matching level within that range.
 321                  */
 322                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 323                                             brightness / (LED_FULL / 6),
 324                                             led->rt2x00dev->led_mcu_reg,
 325                                             REGISTER_TIMEOUT);
 326         }
 327 }
 328
 329 static int rt73usb_blink_set(struct led_classdev *led_cdev,
 330                              unsigned long *delay_on,
 331                              unsigned long *delay_off)
 332 {
 333         struct rt2x00_led *led =
 334             container_of(led_cdev, struct rt2x00_led, led_dev);
 335         u32 reg;
 336
 337         rt73usb_register_read(led->rt2x00dev, MAC_CSR14, &reg);
 338         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, *delay_on);
 339         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, *delay_off);
 340         rt73usb_register_write(led->rt2x00dev, MAC_CSR14, reg);
 341
 342         return 0;
 343 }
 344
 345 static void rt73usb_init_led(struct rt2x00_dev *rt2x00dev,
 346                              struct rt2x00_led *led,
 347                              enum led_type type)
 348 {
 349         led->rt2x00dev = rt2x00dev;
 350         led->type = type;
 351         led->led_dev.brightness_set = rt73usb_brightness_set;
 352         led->led_dev.blink_set = rt73usb_blink_set;
 353         led->flags = LED_INITIALIZED;
 354 }
 355 #endif /* CONFIG_RT73USB_LEDS */
 356
 357 /*
 358  * Configuration handlers.
 359  */
 360 static void rt73usb_config_filter(struct rt2x00_dev *rt2x00dev,
 361                                   const unsigned int filter_flags)
 362 {
 363         u32 reg;
 364
 365         /*
 366          * Start configuration steps.
 367          * Note that the version error will always be dropped
 368          * and broadcast frames will always be accepted since
 369          * there is no filter for it at this time.
 370          */
 371         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 372         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
 373                            !(filter_flags & FIF_FCSFAIL));
 374         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
 375                            !(filter_flags & FIF_PLCPFAIL));
 376         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
 377                            !(filter_flags & FIF_CONTROL));
 378         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
 379                            !(filter_flags & FIF_PROMISC_IN_BSS));
 380         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
 381                            !(filter_flags & FIF_PROMISC_IN_BSS) &&
 382                            !rt2x00dev->intf_ap_count);
 383         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
 384         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
 385                            !(filter_flags & FIF_ALLMULTI));
 386         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
 387         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS,
 388                            !(filter_flags & FIF_CONTROL));
 389         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 390 }
 391
 392 static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
 393                                 struct rt2x00_intf *intf,
 394                                 struct rt2x00intf_conf *conf,
 395                                 const unsigned int flags)
 396 {
 397         unsigned int beacon_base;
 398         u32 reg;
 399
 400         if (flags & CONFIG_UPDATE_TYPE) {
 401                 /*
 402                  * Clear current synchronisation setup.
 403                  * For the Beacon base registers we only need to clear
 404                  * the first byte since that byte contains the VALID and OWNER
 405                  * bits which (when set to 0) will invalidate the entire beacon.
 406                  */
 407                 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
 408                 rt73usb_register_write(rt2x00dev, beacon_base, 0);
 409
 410                 /*
 411                  * Enable synchronisation.
 412                  */
 413                 rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 414                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 415                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, conf->sync);
 416                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 417                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 418         }
 419
 420         if (flags & CONFIG_UPDATE_MAC) {
 421                 reg = le32_to_cpu(conf->mac[1]);
 422                 rt2x00_set_field32(&reg, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 423                 conf->mac[1] = cpu_to_le32(reg);
 424
 425                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2,
 426                                             conf->mac, sizeof(conf->mac));
 427         }
 428
 429         if (flags & CONFIG_UPDATE_BSSID) {
 430                 reg = le32_to_cpu(conf->bssid[1]);
 431                 rt2x00_set_field32(&reg, MAC_CSR5_BSS_ID_MASK, 3);
 432                 conf->bssid[1] = cpu_to_le32(reg);
 433
 434                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4,
 435                                             conf->bssid, sizeof(conf->bssid));
 436         }
 437 }
 438
 439 static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
 440                                struct rt2x00lib_erp *erp)
 441 {
 442         u32 reg;
 443
 444         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 445         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout);
 446         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 447
 448         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 449         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 450                            !!erp->short_preamble);
 451         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 452 }
 453
 454 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 455                                    const int basic_rate_mask)
 456 {
 457         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 458 }
 459
 460 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 461                                    struct rf_channel *rf, const int txpower)
 462 {
 463         u8 r3;
 464         u8 r94;
 465         u8 smart;
 466
 467         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 468         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 469
 470         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 471                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 472
 473         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 474         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 475         rt73usb_bbp_write(rt2x00dev, 3, r3);
 476
 477         r94 = 6;
 478         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 479                 r94 += txpower - MAX_TXPOWER;
 480         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 481                 r94 += txpower;
 482         rt73usb_bbp_write(rt2x00dev, 94, r94);
 483
 484         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 485         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 486         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 487         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 488
 489         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 490         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 491         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 492         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 493
 494         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 495         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 496         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 497         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 498
 499         udelay(10);
 500 }
 501
 502 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 503                                    const int txpower)
 504 {
 505         struct rf_channel rf;
 506
 507         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 508         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 509         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 510         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 511
 512         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 513 }
 514
 515 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 516                                       struct antenna_setup *ant)
 517 {
 518         u8 r3;
 519         u8 r4;
 520         u8 r77;
 521         u8 temp;
 522
 523         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 524         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 525         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 526
 527         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 528
 529         /*
 530          * Configure the RX antenna.
 531          */
 532         switch (ant->rx) {
 533         case ANTENNA_HW_DIVERSITY:
 534                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 535                 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
 536                        && (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ);
 537                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
 538                 break;
 539         case ANTENNA_A:
 540                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 541                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 542                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 543                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 544                 else
 545                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 546                 break;
 547         case ANTENNA_B:
 548         default:
 549                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 550                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 551                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 552                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 553                 else
 554                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 555                 break;
 556         }
 557
 558         rt73usb_bbp_write(rt2x00dev, 77, r77);
 559         rt73usb_bbp_write(rt2x00dev, 3, r3);
 560         rt73usb_bbp_write(rt2x00dev, 4, r4);
 561 }
 562
 563 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 564                                       struct antenna_setup *ant)
 565 {
 566         u8 r3;
 567         u8 r4;
 568         u8 r77;
 569
 570         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 571         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 572         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 573
 574         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 575         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 576                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 577
 578         /*
 579          * Configure the RX antenna.
 580          */
 581         switch (ant->rx) {
 582         case ANTENNA_HW_DIVERSITY:
 583                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 584                 break;
 585         case ANTENNA_A:
 586                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 587                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 588                 break;
 589         case ANTENNA_B:
 590         default:
 591                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 592                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 593                 break;
 594         }
 595
 596         rt73usb_bbp_write(rt2x00dev, 77, r77);
 597         rt73usb_bbp_write(rt2x00dev, 3, r3);
 598         rt73usb_bbp_write(rt2x00dev, 4, r4);
 599 }
 600
 601 struct antenna_sel {
 602         u8 word;
 603         /*
 604          * value[0] -> non-LNA
 605          * value[1] -> LNA
 606          */
 607         u8 value[2];
 608 };
 609
 610 static const struct antenna_sel antenna_sel_a[] = {
 611         { 96,  { 0x58, 0x78 } },
 612         { 104, { 0x38, 0x48 } },
 613         { 75,  { 0xfe, 0x80 } },
 614         { 86,  { 0xfe, 0x80 } },
 615         { 88,  { 0xfe, 0x80 } },
 616         { 35,  { 0x60, 0x60 } },
 617         { 97,  { 0x58, 0x58 } },
 618         { 98,  { 0x58, 0x58 } },
 619 };
 620
 621 static const struct antenna_sel antenna_sel_bg[] = {
 622         { 96,  { 0x48, 0x68 } },
 623         { 104, { 0x2c, 0x3c } },
 624         { 75,  { 0xfe, 0x80 } },
 625         { 86,  { 0xfe, 0x80 } },
 626         { 88,  { 0xfe, 0x80 } },
 627         { 35,  { 0x50, 0x50 } },
 628         { 97,  { 0x48, 0x48 } },
 629         { 98,  { 0x48, 0x48 } },
 630 };
 631
 632 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 633                                    struct antenna_setup *ant)
 634 {
 635         const struct antenna_sel *sel;
 636         unsigned int lna;
 637         unsigned int i;
 638         u32 reg;
 639
 640         /*
 641          * We should never come here because rt2x00lib is supposed
 642          * to catch this and send us the correct antenna explicitely.
 643          */
 644         BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
 645                ant->tx == ANTENNA_SW_DIVERSITY);
 646
 647         if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
 648                 sel = antenna_sel_a;
 649                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 650         } else {
 651                 sel = antenna_sel_bg;
 652                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 653         }
 654
 655         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 656                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 657
 658         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 659
 660         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
 661                            (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ));
 662         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
 663                            (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ));
 664
 665         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 666
 667         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 668             rt2x00_rf(&rt2x00dev->chip, RF5225))
 669                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 670         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 671                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 672                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 673 }
 674
 675 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 676                                     struct rt2x00lib_conf *libconf)
 677 {
 678         u32 reg;
 679
 680         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 681         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 682         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 683
 684         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 685         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 686         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 687         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 688         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 689
 690         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 691         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 692         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 693
 694         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 695         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 696         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 697
 698         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 699         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 700                            libconf->conf->beacon_int * 16);
 701         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 702 }
 703
 704 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 705                            struct rt2x00lib_conf *libconf,
 706                            const unsigned int flags)
 707 {
 708         if (flags & CONFIG_UPDATE_PHYMODE)
 709                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 710         if (flags & CONFIG_UPDATE_CHANNEL)
 711                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 712                                        libconf->conf->power_level);
 713         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 714                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 715         if (flags & CONFIG_UPDATE_ANTENNA)
 716                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 717         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 718                 rt73usb_config_duration(rt2x00dev, libconf);
 719 }
 720
 721 /*
 722  * Link tuning
 723  */
 724 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 725                                struct link_qual *qual)
 726 {
 727         u32 reg;
 728
 729         /*
 730          * Update FCS error count from register.
 731          */
 732         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 733         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 734
 735         /*
 736          * Update False CCA count from register.
 737          */
 738         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 739         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 740 }
 741
 742 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 743 {
 744         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 745         rt2x00dev->link.vgc_level = 0x20;
 746 }
 747
 748 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 749 {
 750         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 751         u8 r17;
 752         u8 up_bound;
 753         u8 low_bound;
 754
 755         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 756
 757         /*
 758          * Determine r17 bounds.
 759          */
 760         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
 761                 low_bound = 0x28;
 762                 up_bound = 0x48;
 763
 764                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 765                         low_bound += 0x10;
 766                         up_bound += 0x10;
 767                 }
 768         } else {
 769                 if (rssi > -82) {
 770                         low_bound = 0x1c;
 771                         up_bound = 0x40;
 772                 } else if (rssi > -84) {
 773                         low_bound = 0x1c;
 774                         up_bound = 0x20;
 775                 } else {
 776                         low_bound = 0x1c;
 777                         up_bound = 0x1c;
 778                 }
 779
 780                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 781                         low_bound += 0x14;
 782                         up_bound += 0x10;
 783                 }
 784         }
 785
 786         /*
 787          * If we are not associated, we should go straight to the
 788          * dynamic CCA tuning.
 789          */
 790         if (!rt2x00dev->intf_associated)
 791                 goto dynamic_cca_tune;
 792
 793         /*
 794          * Special big-R17 for very short distance
 795          */
 796         if (rssi > -35) {
 797                 if (r17 != 0x60)
 798                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 799                 return;
 800         }
 801
 802         /*
 803          * Special big-R17 for short distance
 804          */
 805         if (rssi >= -58) {
 806                 if (r17 != up_bound)
 807                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 808                 return;
 809         }
 810
 811         /*
 812          * Special big-R17 for middle-short distance
 813          */
 814         if (rssi >= -66) {
 815                 low_bound += 0x10;
 816                 if (r17 != low_bound)
 817                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 818                 return;
 819         }
 820
 821         /*
 822          * Special mid-R17 for middle distance
 823          */
 824         if (rssi >= -74) {
 825                 if (r17 != (low_bound + 0x10))
 826                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 827                 return;
 828         }
 829
 830         /*
 831          * Special case: Change up_bound based on the rssi.
 832          * Lower up_bound when rssi is weaker then -74 dBm.
 833          */
 834         up_bound -= 2 * (-74 - rssi);
 835         if (low_bound > up_bound)
 836                 up_bound = low_bound;
 837
 838         if (r17 > up_bound) {
 839                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 840                 return;
 841         }
 842
 843 dynamic_cca_tune:
 844
 845         /*
 846          * r17 does not yet exceed upper limit, continue and base
 847          * the r17 tuning on the false CCA count.
 848          */
 849         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 850                 r17 += 4;
 851                 if (r17 > up_bound)
 852                         r17 = up_bound;
 853                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 854         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 855                 r17 -= 4;
 856                 if (r17 < low_bound)
 857                         r17 = low_bound;
 858                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 859         }
 860 }
 861
 862 /*
 863  * Firmware functions
 864  */
 865 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 866 {
 867         return FIRMWARE_RT2571;
 868 }
 869
 870 static u16 rt73usb_get_firmware_crc(const void *data, const size_t len)
 871 {
 872         u16 crc;
 873
 874         /*
 875          * Use the crc itu-t algorithm.
 876          * The last 2 bytes in the firmware array are the crc checksum itself,
 877          * this means that we should never pass those 2 bytes to the crc
 878          * algorithm.
 879          */
 880         crc = crc_itu_t(0, data, len - 2);
 881         crc = crc_itu_t_byte(crc, 0);
 882         crc = crc_itu_t_byte(crc, 0);
 883
 884         return crc;
 885 }
 886
 887 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, const void *data,
 888                                  const size_t len)
 889 {
 890         unsigned int i;
 891         int status;
 892         u32 reg;
 893
 894         /*
 895          * Wait for stable hardware.
 896          */
 897         for (i = 0; i < 100; i++) {
 898                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 899                 if (reg)
 900                         break;
 901                 msleep(1);
 902         }
 903
 904         if (!reg) {
 905                 ERROR(rt2x00dev, "Unstable hardware.\n");
 906                 return -EBUSY;
 907         }
 908
 909         /*
 910          * Write firmware to device.
 911          */
 912         rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
 913                                             USB_VENDOR_REQUEST_OUT,
 914                                             FIRMWARE_IMAGE_BASE,
 915                                             data, len,
 916                                             REGISTER_TIMEOUT32(len));
 917
 918         /*
 919          * Send firmware request to device to load firmware,
 920          * we need to specify a long timeout time.
 921          */
 922         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 923                                              0, USB_MODE_FIRMWARE,
 924                                              REGISTER_TIMEOUT_FIRMWARE);
 925         if (status < 0) {
 926                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 927                 return status;
 928         }
 929
 930         return 0;
 931 }
 932
 933 /*
 934  * Initialization functions.
 935  */
 936 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 937 {
 938         u32 reg;
 939
 940         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 941         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 942         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 943         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 944         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 945
 946         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 947         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 948         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 949         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 950         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 951         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 952         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 953         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 954         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 955         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 956
 957         /*
 958          * CCK TXD BBP registers
 959          */
 960         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 961         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 962         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 963         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 964         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 965         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 966         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 967         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 968         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 969         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 970
 971         /*
 972          * OFDM TXD BBP registers
 973          */
 974         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 975         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 976         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 977         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 978         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 979         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 980         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 981         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 982
 983         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 984         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 985         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 986         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 987         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 988         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 989
 990         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 991         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 992         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 993         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 994         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
 995         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
 996
 997         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 998         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL, 0);
 999         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 0);
1000         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, 0);
1001         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 0);
1002         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
1003         rt2x00_set_field32(&reg, TXRX_CSR9_TIMESTAMP_COMPENSATE, 0);
1004         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1005
1006         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
1007
1008         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
1009         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
1010         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
1011
1012         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
1013
1014         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
1015                 return -EBUSY;
1016
1017         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
1018
1019         /*
1020          * Invalidate all Shared Keys (SEC_CSR0),
1021          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
1022          */
1023         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1024         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1025         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1026
1027         reg = 0x000023b0;
1028         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1029             rt2x00_rf(&rt2x00dev->chip, RF2527))
1030                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1031         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1032
1033         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1034         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1035         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1036
1037         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1038         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1039         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1040         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1041
1042         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1043         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1044         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1045         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1046
1047         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1048         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1049         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1050
1051         /*
1052          * Clear all beacons
1053          * For the Beacon base registers we only need to clear
1054          * the first byte since that byte contains the VALID and OWNER
1055          * bits which (when set to 0) will invalidate the entire beacon.
1056          */
1057         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1058         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1059         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1060         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1061
1062         /*
1063          * We must clear the error counters.
1064          * These registers are cleared on read,
1065          * so we may pass a useless variable to store the value.
1066          */
1067         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1068         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1069         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1070
1071         /*
1072          * Reset MAC and BBP registers.
1073          */
1074         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1075         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1076         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1077         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1078
1079         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1080         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1081         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1082         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1083
1084         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1085         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1086         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1087
1088         return 0;
1089 }
1090
1091 static int rt73usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
1092 {
1093         unsigned int i;
1094         u8 value;
1095
1096         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1097                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1098                 if ((value != 0xff) && (value != 0x00))
1099                         return 0;
1100                 udelay(REGISTER_BUSY_DELAY);
1101         }
1102
1103         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1104         return -EACCES;
1105 }
1106
1107 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1108 {
1109         unsigned int i;
1110         u16 eeprom;
1111         u8 reg_id;
1112         u8 value;
1113
1114         if (unlikely(rt73usb_wait_bbp_ready(rt2x00dev)))
1115                 return -EACCES;
1116
1117         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1118         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1119         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1120         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1121         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1122         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1123         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1124         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1125         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1126         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1127         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1128         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1129         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1130         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1131         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1132         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1133         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1134         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1135         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1136         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1137         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1138         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1139         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1140         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1141         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1142
1143         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1144                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1145
1146                 if (eeprom != 0xffff && eeprom != 0x0000) {
1147                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1148                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1149                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1150                 }
1151         }
1152
1153         return 0;
1154 }
1155
1156 /*
1157  * Device state switch handlers.
1158  */
1159 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1160                               enum dev_state state)
1161 {
1162         u32 reg;
1163
1164         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1165         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1166                            (state == STATE_RADIO_RX_OFF) ||
1167                            (state == STATE_RADIO_RX_OFF_LINK));
1168         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1169 }
1170
1171 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1172 {
1173         /*
1174          * Initialize all registers.
1175          */
1176         if (unlikely(rt73usb_init_registers(rt2x00dev) ||
1177                      rt73usb_init_bbp(rt2x00dev)))
1178                 return -EIO;
1179
1180         return 0;
1181 }
1182
1183 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1184 {
1185         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1186
1187         /*
1188          * Disable synchronisation.
1189          */
1190         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1191
1192         rt2x00usb_disable_radio(rt2x00dev);
1193 }
1194
1195 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1196 {
1197         u32 reg;
1198         unsigned int i;
1199         char put_to_sleep;
1200
1201         put_to_sleep = (state != STATE_AWAKE);
1202
1203         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1204         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1205         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1206         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1207
1208         /*
1209          * Device is not guaranteed to be in the requested state yet.
1210          * We must wait until the register indicates that the
1211          * device has entered the correct state.
1212          */
1213         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1214                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1215                 state = rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1216                 if (state == !put_to_sleep)
1217                         return 0;
1218                 msleep(10);
1219         }
1220
1221         return -EBUSY;
1222 }
1223
1224 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1225                                     enum dev_state state)
1226 {
1227         int retval = 0;
1228
1229         switch (state) {
1230         case STATE_RADIO_ON:
1231                 retval = rt73usb_enable_radio(rt2x00dev);
1232                 break;
1233         case STATE_RADIO_OFF:
1234                 rt73usb_disable_radio(rt2x00dev);
1235                 break;
1236         case STATE_RADIO_RX_ON:
1237         case STATE_RADIO_RX_ON_LINK:
1238         case STATE_RADIO_RX_OFF:
1239         case STATE_RADIO_RX_OFF_LINK:
1240                 rt73usb_toggle_rx(rt2x00dev, state);
1241                 break;
1242         case STATE_RADIO_IRQ_ON:
1243         case STATE_RADIO_IRQ_OFF:
1244                 /* No support, but no error either */
1245                 break;
1246         case STATE_DEEP_SLEEP:
1247         case STATE_SLEEP:
1248         case STATE_STANDBY:
1249         case STATE_AWAKE:
1250                 retval = rt73usb_set_state(rt2x00dev, state);
1251                 break;
1252         default:
1253                 retval = -ENOTSUPP;
1254                 break;
1255         }
1256
1257         if (unlikely(retval))
1258                 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1259                       state, retval);
1260
1261         return retval;
1262 }
1263
1264 /*
1265  * TX descriptor initialization
1266  */
1267 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1268                                     struct sk_buff *skb,
1269                                     struct txentry_desc *txdesc)
1270 {
1271         struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1272         __le32 *txd = skbdesc->desc;
1273         u32 word;
1274
1275         /*
1276          * Start writing the descriptor words.
1277          */
1278         rt2x00_desc_read(txd, 1, &word);
1279         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue);
1280         rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs);
1281         rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1282         rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1283         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1284         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1285         rt2x00_desc_write(txd, 1, word);
1286
1287         rt2x00_desc_read(txd, 2, &word);
1288         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1289         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1290         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1291         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1292         rt2x00_desc_write(txd, 2, word);
1293
1294         rt2x00_desc_read(txd, 5, &word);
1295         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1296                            TXPOWER_TO_DEV(rt2x00dev->tx_power));
1297         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1298         rt2x00_desc_write(txd, 5, word);
1299
1300         rt2x00_desc_read(txd, 0, &word);
1301         rt2x00_set_field32(&word, TXD_W0_BURST,
1302                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1303         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1304         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1305                            test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1306         rt2x00_set_field32(&word, TXD_W0_ACK,
1307                            test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1308         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1309                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1310         rt2x00_set_field32(&word, TXD_W0_OFDM,
1311                            test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
1312         rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1313         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1314                            test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags));
1315         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1316         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT,
1317                            skb->len - skbdesc->desc_len);
1318         rt2x00_set_field32(&word, TXD_W0_BURST2,
1319                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1320         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1321         rt2x00_desc_write(txd, 0, word);
1322 }
1323
1324 /*
1325  * TX data initialization
1326  */
1327 static void rt73usb_write_beacon(struct queue_entry *entry)
1328 {
1329         struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1330         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1331         unsigned int beacon_base;
1332         u32 reg;
1333         u32 word, len;
1334
1335         /*
1336          * Add the descriptor in front of the skb.
1337          */
1338         skb_push(entry->skb, entry->queue->desc_size);
1339         memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1340         skbdesc->desc = entry->skb->data;
1341
1342         /*
1343          * Adjust the beacon databyte count. The current number is
1344          * calculated before this function gets called, but falsely
1345          * assumes that the descriptor was already present in the SKB.
1346          */
1347         rt2x00_desc_read(skbdesc->desc, 0, &word);
1348         len  = rt2x00_get_field32(word, TXD_W0_DATABYTE_COUNT);
1349         len += skbdesc->desc_len;
1350         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, len);
1351         rt2x00_desc_write(skbdesc->desc, 0, word);
1352
1353         /*
1354          * Disable beaconing while we are reloading the beacon data,
1355          * otherwise we might be sending out invalid data.
1356          */
1357         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1358         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 0);
1359         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 0);
1360         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
1361         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1362
1363         /*
1364          * Write entire beacon with descriptor to register.
1365          */
1366         beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
1367         rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
1368                                             USB_VENDOR_REQUEST_OUT, beacon_base,
1369                                             entry->skb->data, entry->skb->len,
1370                                             REGISTER_TIMEOUT32(entry->skb->len));
1371
1372         /*
1373          * Clean up the beacon skb.
1374          */
1375         dev_kfree_skb(entry->skb);
1376         entry->skb = NULL;
1377 }
1378
1379 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1380                                    struct sk_buff *skb)
1381 {
1382         int length;
1383
1384         /*
1385          * The length _must_ be a multiple of 4,
1386          * but it must _not_ be a multiple of the USB packet size.
1387          */
1388         length = roundup(skb->len, 4);
1389         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1390
1391         return length;
1392 }
1393
1394 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1395                                   const enum data_queue_qid queue)
1396 {
1397         u32 reg;
1398
1399         if (queue != QID_BEACON) {
1400                 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
1401                 return;
1402         }
1403
1404         /*
1405          * For Wi-Fi faily generated beacons between participating stations.
1406          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1407          */
1408         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1409
1410         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1411         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1412                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1413                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
1414                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1415                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1416         }
1417 }
1418
1419 /*
1420  * RX control handlers
1421  */
1422 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1423 {
1424         u16 eeprom;
1425         u8 offset;
1426         u8 lna;
1427
1428         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1429         switch (lna) {
1430         case 3:
1431                 offset = 90;
1432                 break;
1433         case 2:
1434                 offset = 74;
1435                 break;
1436         case 1:
1437                 offset = 64;
1438                 break;
1439         default:
1440                 return 0;
1441         }
1442
1443         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
1444                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1445                         if (lna == 3 || lna == 2)
1446                                 offset += 10;
1447                 } else {
1448                         if (lna == 3)
1449                                 offset += 6;
1450                         else if (lna == 2)
1451                                 offset += 8;
1452                 }
1453
1454                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1455                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1456         } else {
1457                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1458                         offset += 14;
1459
1460                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1461                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1462         }
1463
1464         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1465 }
1466
1467 static void rt73usb_fill_rxdone(struct queue_entry *entry,
1468                                 struct rxdone_entry_desc *rxdesc)
1469 {
1470         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1471         __le32 *rxd = (__le32 *)entry->skb->data;
1472         u32 word0;
1473         u32 word1;
1474
1475         /*
1476          * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1477          * frame data in rt2x00usb.
1478          */
1479         memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1480         rxd = (__le32 *)skbdesc->desc;
1481
1482         /*
1483          * It is now safe to read the descriptor on all architectures.
1484          */
1485         rt2x00_desc_read(rxd, 0, &word0);
1486         rt2x00_desc_read(rxd, 1, &word1);
1487
1488         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1489                 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1490
1491         /*
1492          * Obtain the status about this packet.
1493          * When frame was received with an OFDM bitrate,
1494          * the signal is the PLCP value. If it was received with
1495          * a CCK bitrate the signal is the rate in 100kbit/s.
1496          */
1497         rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1498         rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1);
1499         rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1500
1501         if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1502                 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1503         if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1504                 rxdesc->dev_flags |= RXDONE_MY_BSS;
1505
1506         /*
1507          * Set skb pointers, and update frame information.
1508          */
1509         skb_pull(entry->skb, entry->queue->desc_size);
1510         skb_trim(entry->skb, rxdesc->size);
1511 }
1512
1513 /*
1514  * Device probe functions.
1515  */
1516 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1517 {
1518         u16 word;
1519         u8 *mac;
1520         s8 value;
1521
1522         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1523
1524         /*
1525          * Start validation of the data that has been read.
1526          */
1527         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1528         if (!is_valid_ether_addr(mac)) {
1529                 DECLARE_MAC_BUF(macbuf);
1530
1531                 random_ether_addr(mac);
1532                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1533         }
1534
1535         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1536         if (word == 0xffff) {
1537                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1538                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1539                                    ANTENNA_B);
1540                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1541                                    ANTENNA_B);
1542                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1543                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1544                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1545                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1546                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1547                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1548         }
1549
1550         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1551         if (word == 0xffff) {
1552                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1553                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1554                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1555         }
1556
1557         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1558         if (word == 0xffff) {
1559                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1560                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1561                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1562                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1563                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1564                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1565                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1566                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1567                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1568                                    LED_MODE_DEFAULT);
1569                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1570                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1571         }
1572
1573         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1574         if (word == 0xffff) {
1575                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1576                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1577                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1578                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1579         }
1580
1581         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1582         if (word == 0xffff) {
1583                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1584                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1585                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1586                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1587         } else {
1588                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1589                 if (value < -10 || value > 10)
1590                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1591                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1592                 if (value < -10 || value > 10)
1593                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1594                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1595         }
1596
1597         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1598         if (word == 0xffff) {
1599                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1600                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1601                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1602                 EEPROM(rt2x00dev, "RSSI OFFSET A: 0x%04x\n", word);
1603         } else {
1604                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1605                 if (value < -10 || value > 10)
1606                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1607                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1608                 if (value < -10 || value > 10)
1609                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1610                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1611         }
1612
1613         return 0;
1614 }
1615
1616 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1617 {
1618         u32 reg;
1619         u16 value;
1620         u16 eeprom;
1621
1622         /*
1623          * Read EEPROM word for configuration.
1624          */
1625         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1626
1627         /*
1628          * Identify RF chipset.
1629          */
1630         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1631         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1632         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1633
1634         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1635                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1636                 return -ENODEV;
1637         }
1638
1639         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1640             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1641             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1642             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1643                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1644                 return -ENODEV;
1645         }
1646
1647         /*
1648          * Identify default antenna configuration.
1649          */
1650         rt2x00dev->default_ant.tx =
1651             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1652         rt2x00dev->default_ant.rx =
1653             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1654
1655         /*
1656          * Read the Frame type.
1657          */
1658         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1659                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1660
1661         /*
1662          * Read frequency offset.
1663          */
1664         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1665         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1666
1667         /*
1668          * Read external LNA informations.
1669          */
1670         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1671
1672         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1673                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1674                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1675         }
1676
1677         /*
1678          * Store led settings, for correct led behaviour.
1679          */
1680 #ifdef CONFIG_RT73USB_LEDS
1681         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1682
1683         rt73usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1684         rt73usb_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
1685         if (value == LED_MODE_SIGNAL_STRENGTH)
1686                 rt73usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1687                                  LED_TYPE_QUALITY);
1688
1689         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value);
1690         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0,
1691                            rt2x00_get_field16(eeprom,
1692                                               EEPROM_LED_POLARITY_GPIO_0));
1693         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_1,
1694                            rt2x00_get_field16(eeprom,
1695                                               EEPROM_LED_POLARITY_GPIO_1));
1696         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_2,
1697                            rt2x00_get_field16(eeprom,
1698                                               EEPROM_LED_POLARITY_GPIO_2));
1699         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_3,
1700                            rt2x00_get_field16(eeprom,
1701                                               EEPROM_LED_POLARITY_GPIO_3));
1702         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_4,
1703                            rt2x00_get_field16(eeprom,
1704                                               EEPROM_LED_POLARITY_GPIO_4));
1705         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_ACT,
1706                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1707         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_BG,
1708                            rt2x00_get_field16(eeprom,
1709                                               EEPROM_LED_POLARITY_RDY_G));
1710         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_A,
1711                            rt2x00_get_field16(eeprom,
1712                                               EEPROM_LED_POLARITY_RDY_A));
1713 #endif /* CONFIG_RT73USB_LEDS */
1714
1715         return 0;
1716 }
1717
1718 /*
1719  * RF value list for RF2528
1720  * Supports: 2.4 GHz
1721  */
1722 static const struct rf_channel rf_vals_bg_2528[] = {
1723         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1724         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1725         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1726         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1727         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1728         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1729         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1730         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1731         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1732         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1733         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1734         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1735         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1736         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1737 };
1738
1739 /*
1740  * RF value list for RF5226
1741  * Supports: 2.4 GHz & 5.2 GHz
1742  */
1743 static const struct rf_channel rf_vals_5226[] = {
1744         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1745         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1746         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1747         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1748         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1749         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1750         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1751         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1752         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1753         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1754         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1755         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1756         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1757         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1758
1759         /* 802.11 UNI / HyperLan 2 */
1760         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1761         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1762         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1763         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1764         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1765         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1766         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1767         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1768
1769         /* 802.11 HyperLan 2 */
1770         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1771         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1772         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1773         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1774         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1775         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1776         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1777         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1778         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1779         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1780
1781         /* 802.11 UNII */
1782         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1783         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1784         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1785         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1786         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1787         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1788
1789         /* MMAC(Japan)J52 ch 34,38,42,46 */
1790         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1791         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1792         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1793         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1794 };
1795
1796 /*
1797  * RF value list for RF5225 & RF2527
1798  * Supports: 2.4 GHz & 5.2 GHz
1799  */
1800 static const struct rf_channel rf_vals_5225_2527[] = {
1801         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1802         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1803         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1804         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1805         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1806         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1807         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1808         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1809         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1810         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1811         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1812         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1813         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1814         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1815
1816         /* 802.11 UNI / HyperLan 2 */
1817         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1818         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1819         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1820         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1821         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1822         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1823         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1824         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1825
1826         /* 802.11 HyperLan 2 */
1827         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1828         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1829         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1830         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1831         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1832         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1833         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1834         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1835         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1836         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1837
1838         /* 802.11 UNII */
1839         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1840         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1841         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1842         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1843         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1844         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1845
1846         /* MMAC(Japan)J52 ch 34,38,42,46 */
1847         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1848         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1849         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1850         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1851 };
1852
1853
1854 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1855 {
1856         struct hw_mode_spec *spec = &rt2x00dev->spec;
1857         u8 *txpower;
1858         unsigned int i;
1859
1860         /*
1861          * Initialize all hw fields.
1862          */
1863         rt2x00dev->hw->flags =
1864             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1865             IEEE80211_HW_SIGNAL_DBM;
1866         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1867
1868         SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1869         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1870                                 rt2x00_eeprom_addr(rt2x00dev,
1871                                                    EEPROM_MAC_ADDR_0));
1872
1873         /*
1874          * Convert tx_power array in eeprom.
1875          */
1876         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1877         for (i = 0; i < 14; i++)
1878                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1879
1880         /*
1881          * Initialize hw_mode information.
1882          */
1883         spec->supported_bands = SUPPORT_BAND_2GHZ;
1884         spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1885         spec->tx_power_a = NULL;
1886         spec->tx_power_bg = txpower;
1887         spec->tx_power_default = DEFAULT_TXPOWER;
1888
1889         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1890                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1891                 spec->channels = rf_vals_bg_2528;
1892         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1893                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1894                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1895                 spec->channels = rf_vals_5226;
1896         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1897                 spec->num_channels = 14;
1898                 spec->channels = rf_vals_5225_2527;
1899         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1900                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1901                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1902                 spec->channels = rf_vals_5225_2527;
1903         }
1904
1905         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1906             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1907                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1908                 for (i = 0; i < 14; i++)
1909                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1910
1911                 spec->tx_power_a = txpower;
1912         }
1913 }
1914
1915 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1916 {
1917         int retval;
1918
1919         /*
1920          * Allocate eeprom data.
1921          */
1922         retval = rt73usb_validate_eeprom(rt2x00dev);
1923         if (retval)
1924                 return retval;
1925
1926         retval = rt73usb_init_eeprom(rt2x00dev);
1927         if (retval)
1928                 return retval;
1929
1930         /*
1931          * Initialize hw specifications.
1932          */
1933         rt73usb_probe_hw_mode(rt2x00dev);
1934
1935         /*
1936          * This device requires firmware.
1937          */
1938         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1939         __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
1940
1941         /*
1942          * Set the rssi offset.
1943          */
1944         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1945
1946         return 0;
1947 }
1948
1949 /*
1950  * IEEE80211 stack callback functions.
1951  */
1952 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1953                                    u32 short_retry, u32 long_retry)
1954 {
1955         struct rt2x00_dev *rt2x00dev = hw->priv;
1956         u32 reg;
1957
1958         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1959         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1960         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1961         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1962
1963         return 0;
1964 }
1965
1966 #if 0
1967 /*
1968  * Mac80211 demands get_tsf must be atomic.
1969  * This is not possible for rt73usb since all register access
1970  * functions require sleeping. Untill mac80211 no longer needs
1971  * get_tsf to be atomic, this function should be disabled.
1972  */
1973 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1974 {
1975         struct rt2x00_dev *rt2x00dev = hw->priv;
1976         u64 tsf;
1977         u32 reg;
1978
1979         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1980         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1981         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1982         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1983
1984         return tsf;
1985 }
1986 #else
1987 #define rt73usb_get_tsf NULL
1988 #endif
1989
1990 static const struct ieee80211_ops rt73usb_mac80211_ops = {
1991         .tx                     = rt2x00mac_tx,
1992         .start                  = rt2x00mac_start,
1993         .stop                   = rt2x00mac_stop,
1994         .add_interface          = rt2x00mac_add_interface,
1995         .remove_interface       = rt2x00mac_remove_interface,
1996         .config                 = rt2x00mac_config,
1997         .config_interface       = rt2x00mac_config_interface,
1998         .configure_filter       = rt2x00mac_configure_filter,
1999         .get_stats              = rt2x00mac_get_stats,
2000         .set_retry_limit        = rt73usb_set_retry_limit,
2001         .bss_info_changed       = rt2x00mac_bss_info_changed,
2002         .conf_tx                = rt2x00mac_conf_tx,
2003         .get_tx_stats           = rt2x00mac_get_tx_stats,
2004         .get_tsf                = rt73usb_get_tsf,
2005 };
2006
2007 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2008         .probe_hw               = rt73usb_probe_hw,
2009         .get_firmware_name      = rt73usb_get_firmware_name,
2010         .get_firmware_crc       = rt73usb_get_firmware_crc,
2011         .load_firmware          = rt73usb_load_firmware,
2012         .initialize             = rt2x00usb_initialize,
2013         .uninitialize           = rt2x00usb_uninitialize,
2014         .init_rxentry           = rt2x00usb_init_rxentry,
2015         .init_txentry           = rt2x00usb_init_txentry,
2016         .set_device_state       = rt73usb_set_device_state,
2017         .link_stats             = rt73usb_link_stats,
2018         .reset_tuner            = rt73usb_reset_tuner,
2019         .link_tuner             = rt73usb_link_tuner,
2020         .write_tx_desc          = rt73usb_write_tx_desc,
2021         .write_tx_data          = rt2x00usb_write_tx_data,
2022         .write_beacon           = rt73usb_write_beacon,
2023         .get_tx_data_len        = rt73usb_get_tx_data_len,
2024         .kick_tx_queue          = rt73usb_kick_tx_queue,
2025         .fill_rxdone            = rt73usb_fill_rxdone,
2026         .config_filter          = rt73usb_config_filter,
2027         .config_intf            = rt73usb_config_intf,
2028         .config_erp             = rt73usb_config_erp,
2029         .config                 = rt73usb_config,
2030 };
2031
2032 static const struct data_queue_desc rt73usb_queue_rx = {
2033         .entry_num              = RX_ENTRIES,
2034         .data_size              = DATA_FRAME_SIZE,
2035         .desc_size              = RXD_DESC_SIZE,
2036         .priv_size              = sizeof(struct queue_entry_priv_usb),
2037 };
2038
2039 static const struct data_queue_desc rt73usb_queue_tx = {
2040         .entry_num              = TX_ENTRIES,
2041         .data_size              = DATA_FRAME_SIZE,
2042         .desc_size              = TXD_DESC_SIZE,
2043         .priv_size              = sizeof(struct queue_entry_priv_usb),
2044 };
2045
2046 static const struct data_queue_desc rt73usb_queue_bcn = {
2047         .entry_num              = 4 * BEACON_ENTRIES,
2048         .data_size              = MGMT_FRAME_SIZE,
2049         .desc_size              = TXINFO_SIZE,
2050         .priv_size              = sizeof(struct queue_entry_priv_usb),
2051 };
2052
2053 static const struct rt2x00_ops rt73usb_ops = {
2054         .name           = KBUILD_MODNAME,
2055         .max_sta_intf   = 1,
2056         .max_ap_intf    = 4,
2057         .eeprom_size    = EEPROM_SIZE,
2058         .rf_size        = RF_SIZE,
2059         .tx_queues      = NUM_TX_QUEUES,
2060         .rx             = &rt73usb_queue_rx,
2061         .tx             = &rt73usb_queue_tx,
2062         .bcn            = &rt73usb_queue_bcn,
2063         .lib            = &rt73usb_rt2x00_ops,
2064         .hw             = &rt73usb_mac80211_ops,
2065 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2066         .debugfs        = &rt73usb_rt2x00debug,
2067 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2068 };
2069
2070 /*
2071  * rt73usb module information.
2072  */
2073 static struct usb_device_id rt73usb_device_table[] = {
2074         /* AboCom */
2075         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2076         /* Askey */
2077         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2078         /* ASUS */
2079         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2080         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2081         /* Belkin */
2082         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2083         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2084         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2085         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2086         /* Billionton */
2087         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2088         /* Buffalo */
2089         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2090         /* CNet */
2091         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2092         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2093         /* Conceptronic */
2094         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2095         /* Corega */
2096         { USB_DEVICE(0x07aa, 0x002e), USB_DEVICE_DATA(&rt73usb_ops) },
2097         /* D-Link */
2098         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2099         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2100         { USB_DEVICE(0x07d1, 0x3c06), USB_DEVICE_DATA(&rt73usb_ops) },
2101         { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops) },
2102         /* Gemtek */
2103         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2104         /* Gigabyte */
2105         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2106         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2107         /* Huawei-3Com */
2108         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2109         /* Hercules */
2110         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2111         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2112         /* Linksys */
2113         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2114         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2115         /* MSI */
2116         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2117         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2118         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2119         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2120         /* Ralink */
2121         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2122         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2123         /* Qcom */
2124         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2125         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2126         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2127         /* Senao */
2128         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2129         /* Sitecom */
2130         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2131         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2132         /* Surecom */
2133         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2134         /* Planex */
2135         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2136         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2137         { 0, }
2138 };
2139
2140 MODULE_AUTHOR(DRV_PROJECT);
2141 MODULE_VERSION(DRV_VERSION);
2142 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2143 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2144 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2145 MODULE_FIRMWARE(FIRMWARE_RT2571);
2146 MODULE_LICENSE("GPL");
2147
2148 static struct usb_driver rt73usb_driver = {
2149         .name           = KBUILD_MODNAME,
2150         .id_table       = rt73usb_device_table,
2151         .probe          = rt2x00usb_probe,
2152         .disconnect     = rt2x00usb_disconnect,
2153         .suspend        = rt2x00usb_suspend,
2154         .resume         = rt2x00usb_resume,
2155 };
2156
2157 static int __init rt73usb_init(void)
2158 {
2159         return usb_register(&rt73usb_driver);
2160 }
2161
2162 static void __exit rt73usb_exit(void)
2163 {
2164         usb_deregister(&rt73usb_driver);
2165 }
2166
2167 module_init(rt73usb_init);
2168 module_exit(rt73usb_exit);