drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "wifi.h"
  31 #include "core.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36 #include <linux/interrupt.h>
  37 #include <linux/export.h>
  38 #include <linux/kmemleak.h>
  39 #include <linux/module.h>
  40
  41 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  42 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  43 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  44 MODULE_LICENSE("GPL");
  45 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  46
  47 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  48         INTEL_VENDOR_ID,
  49         ATI_VENDOR_ID,
  50         AMD_VENDOR_ID,
  51         SIS_VENDOR_ID
  52 };
  53
  54 static const u8 ac_to_hwq[] = {
  55         VO_QUEUE,
  56         VI_QUEUE,
  57         BE_QUEUE,
  58         BK_QUEUE
  59 };
  60
  61 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  62                        struct sk_buff *skb)
  63 {
  64         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  65         __le16 fc = rtl_get_fc(skb);
  66         u8 queue_index = skb_get_queue_mapping(skb);
  67
  68         if (unlikely(ieee80211_is_beacon(fc)))
  69                 return BEACON_QUEUE;
  70         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  71                 return MGNT_QUEUE;
  72         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  73                 if (ieee80211_is_nullfunc(fc))
  74                         return HIGH_QUEUE;
  75
  76         return ac_to_hwq[queue_index];
  77 }
  78
  79 /* Update PCI dependent default settings*/
  80 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  81 {
  82         struct rtl_priv *rtlpriv = rtl_priv(hw);
  83         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  84         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  85         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  86         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  87         u8 init_aspm;
  88
  89         ppsc->reg_rfps_level = 0;
  90         ppsc->support_aspm = false;
  91
  92         /*Update PCI ASPM setting */
  93         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  94         switch (rtlpci->const_pci_aspm) {
  95         case 0:
  96                 /*No ASPM */
  97                 break;
  98
  99         case 1:
 100                 /*ASPM dynamically enabled/disable. */
 101                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
 102                 break;
 103
 104         case 2:
 105                 /*ASPM with Clock Req dynamically enabled/disable. */
 106                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 3:
 111                 /*
 112                  * Always enable ASPM and Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 116                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 117                                          RT_RF_OFF_LEVL_CLK_REQ);
 118                 break;
 119
 120         case 4:
 121                 /*
 122                  * Always enable ASPM without Clock Req
 123                  * from initialization to halt.
 124                  * */
 125                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 126                                           RT_RF_OFF_LEVL_CLK_REQ);
 127                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 128                 break;
 129         }
 130
 131         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 132
 133         /*Update Radio OFF setting */
 134         switch (rtlpci->const_hwsw_rfoff_d3) {
 135         case 1:
 136                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 137                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 138                 break;
 139
 140         case 2:
 141                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 142                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 143                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 144                 break;
 145
 146         case 3:
 147                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 148                 break;
 149         }
 150
 151         /*Set HW definition to determine if it supports ASPM. */
 152         switch (rtlpci->const_support_pciaspm) {
 153         case 0:{
 154                         /*Not support ASPM. */
 155                         bool support_aspm = false;
 156                         ppsc->support_aspm = support_aspm;
 157                         break;
 158                 }
 159         case 1:{
 160                         /*Support ASPM. */
 161                         bool support_aspm = true;
 162                         bool support_backdoor = true;
 163                         ppsc->support_aspm = support_aspm;
 164
 165                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 166                            !priv->ndis_adapter.amd_l1_patch)
 167                            support_backdoor = false; */
 168
 169                         ppsc->support_backdoor = support_backdoor;
 170
 171                         break;
 172                 }
 173         case 2:
 174                 /*ASPM value set by chipset. */
 175                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 176                         bool support_aspm = true;
 177                         ppsc->support_aspm = support_aspm;
 178                 }
 179                 break;
 180         default:
 181                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 182                          "switch case not processed\n");
 183                 break;
 184         }
 185
 186         /* toshiba aspm issue, toshiba will set aspm selfly
 187          * so we should not set aspm in driver */
 188         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 189         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 190                 init_aspm == 0x43)
 191                 ppsc->support_aspm = false;
 192 }
 193
 194 static bool _rtl_pci_platform_switch_device_pci_aspm(
 195                         struct ieee80211_hw *hw,
 196                         u8 value)
 197 {
 198         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 199         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 200
 201         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 202                 value |= 0x40;
 203
 204         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 205
 206         return false;
 207 }
 208
 209 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 210 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 211 {
 212         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 213         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 214
 215         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 216
 217         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 218                 udelay(100);
 219 }
 220
 221 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 222 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 223 {
 224         struct rtl_priv *rtlpriv = rtl_priv(hw);
 225         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 226         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 227         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 228         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 229         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 230         /*Retrieve original configuration settings. */
 231         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 232         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 233                                 pcibridge_linkctrlreg;
 234         u16 aspmlevel = 0;
 235         u8 tmp_u1b = 0;
 236
 237         if (!ppsc->support_aspm)
 238                 return;
 239
 240         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 241                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 242                          "PCI(Bridge) UNKNOWN\n");
 243
 244                 return;
 245         }
 246
 247         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 248                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 249                 _rtl_pci_switch_clk_req(hw, 0x0);
 250         }
 251
 252         /*for promising device will in L0 state after an I/O. */
 253         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 254
 255         /*Set corresponding value. */
 256         aspmlevel |= BIT(0) | BIT(1);
 257         linkctrl_reg &= ~aspmlevel;
 258         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 259
 260         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 261         udelay(50);
 262
 263         /*4 Disable Pci Bridge ASPM */
 264         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 265                               pcibridge_linkctrlreg);
 266
 267         udelay(50);
 268 }
 269
 270 /*
 271  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 272  *power saving We should follow the sequence to enable
 273  *RTL8192SE first then enable Pci Bridge ASPM
 274  *or the system will show bluescreen.
 275  */
 276 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 277 {
 278         struct rtl_priv *rtlpriv = rtl_priv(hw);
 279         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 280         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 281         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 282         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 283         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 284         u16 aspmlevel;
 285         u8 u_pcibridge_aspmsetting;
 286         u8 u_device_aspmsetting;
 287
 288         if (!ppsc->support_aspm)
 289                 return;
 290
 291         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 292                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 293                          "PCI(Bridge) UNKNOWN\n");
 294                 return;
 295         }
 296
 297         /*4 Enable Pci Bridge ASPM */
 298
 299         u_pcibridge_aspmsetting =
 300             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 301             rtlpci->const_hostpci_aspm_setting;
 302
 303         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 304                 u_pcibridge_aspmsetting &= ~BIT(0);
 305
 306         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 307                               u_pcibridge_aspmsetting);
 308
 309         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 310                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 311                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 312                  u_pcibridge_aspmsetting);
 313
 314         udelay(50);
 315
 316         /*Get ASPM level (with/without Clock Req) */
 317         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 318         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 319
 320         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 321         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 322
 323         u_device_aspmsetting |= aspmlevel;
 324
 325         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 326
 327         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 328                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 329                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 330                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 331         }
 332         udelay(100);
 333 }
 334
 335 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 336 {
 337         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 338
 339         bool status = false;
 340         u8 offset_e0;
 341         unsigned offset_e4;
 342
 343         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 344
 345         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 346
 347         if (offset_e0 == 0xA0) {
 348                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 349                 if (offset_e4 & BIT(23))
 350                         status = true;
 351         }
 352
 353         return status;
 354 }
 355
 356 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 357                                      struct rtl_priv **buddy_priv)
 358 {
 359         struct rtl_priv *rtlpriv = rtl_priv(hw);
 360         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 361         bool find_buddy_priv = false;
 362         struct rtl_priv *tpriv = NULL;
 363         struct rtl_pci_priv *tpcipriv = NULL;
 364
 365         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 366                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 367                                     list) {
 368                         if (tpriv) {
 369                                 tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 370                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 371                                          "pcipriv->ndis_adapter.funcnumber %x\n",
 372                                         pcipriv->ndis_adapter.funcnumber);
 373                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 374                                          "tpcipriv->ndis_adapter.funcnumber %x\n",
 375                                         tpcipriv->ndis_adapter.funcnumber);
 376
 377                                 if ((pcipriv->ndis_adapter.busnumber ==
 378                                      tpcipriv->ndis_adapter.busnumber) &&
 379                                     (pcipriv->ndis_adapter.devnumber ==
 380                                     tpcipriv->ndis_adapter.devnumber) &&
 381                                     (pcipriv->ndis_adapter.funcnumber !=
 382                                     tpcipriv->ndis_adapter.funcnumber)) {
 383                                         find_buddy_priv = true;
 384                                         break;
 385                                 }
 386                         }
 387                 }
 388         }
 389
 390         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 391                  "find_buddy_priv %d\n", find_buddy_priv);
 392
 393         if (find_buddy_priv)
 394                 *buddy_priv = tpriv;
 395
 396         return find_buddy_priv;
 397 }
 398
 399 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 400 {
 401         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 402         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 403         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 404         u8 linkctrl_reg;
 405         u8 num4bbytes;
 406
 407         num4bbytes = (capabilityoffset + 0x10) / 4;
 408
 409         /*Read  Link Control Register */
 410         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 411
 412         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 413 }
 414
 415 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 416                 struct ieee80211_hw *hw)
 417 {
 418         struct rtl_priv *rtlpriv = rtl_priv(hw);
 419         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 420
 421         u8 tmp;
 422         u16 linkctrl_reg;
 423
 424         /*Link Control Register */
 425         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 426         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 427
 428         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 429                  pcipriv->ndis_adapter.linkctrl_reg);
 430
 431         pci_read_config_byte(pdev, 0x98, &tmp);
 432         tmp |= BIT(4);
 433         pci_write_config_byte(pdev, 0x98, tmp);
 434
 435         tmp = 0x17;
 436         pci_write_config_byte(pdev, 0x70f, tmp);
 437 }
 438
 439 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 440 {
 441         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 442
 443         _rtl_pci_update_default_setting(hw);
 444
 445         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 446                 /*Always enable ASPM & Clock Req. */
 447                 rtl_pci_enable_aspm(hw);
 448                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 449         }
 450
 451 }
 452
 453 static void _rtl_pci_io_handler_init(struct device *dev,
 454                                      struct ieee80211_hw *hw)
 455 {
 456         struct rtl_priv *rtlpriv = rtl_priv(hw);
 457
 458         rtlpriv->io.dev = dev;
 459
 460         rtlpriv->io.write8_async = pci_write8_async;
 461         rtlpriv->io.write16_async = pci_write16_async;
 462         rtlpriv->io.write32_async = pci_write32_async;
 463
 464         rtlpriv->io.read8_sync = pci_read8_sync;
 465         rtlpriv->io.read16_sync = pci_read16_sync;
 466         rtlpriv->io.read32_sync = pci_read32_sync;
 467
 468 }
 469
 470 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 471                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 472 {
 473         struct rtl_priv *rtlpriv = rtl_priv(hw);
 474         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 475         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 476         struct sk_buff *next_skb;
 477         u8 additionlen = FCS_LEN;
 478
 479         /* here open is 4, wep/tkip is 8, aes is 12*/
 480         if (info->control.hw_key)
 481                 additionlen += info->control.hw_key->icv_len;
 482
 483         /* The most skb num is 6 */
 484         tcb_desc->empkt_num = 0;
 485         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 486         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 487                 struct ieee80211_tx_info *next_info;
 488
 489                 next_info = IEEE80211_SKB_CB(next_skb);
 490                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 491                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 492                                 next_skb->len + additionlen;
 493                         tcb_desc->empkt_num++;
 494                 } else {
 495                         break;
 496                 }
 497
 498                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 499                                       next_skb))
 500                         break;
 501
 502                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 503                         break;
 504         }
 505         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 506
 507         return true;
 508 }
 509
 510 /* just for early mode now */
 511 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 512 {
 513         struct rtl_priv *rtlpriv = rtl_priv(hw);
 514         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 515         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 516         struct sk_buff *skb = NULL;
 517         struct ieee80211_tx_info *info = NULL;
 518         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 519         int tid;
 520
 521         if (!rtlpriv->rtlhal.earlymode_enable)
 522                 return;
 523
 524         if (rtlpriv->dm.supp_phymode_switch &&
 525             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 526             (rtlpriv->buddy_priv &&
 527             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 528                 return;
 529         /* we juse use em for BE/BK/VI/VO */
 530         for (tid = 7; tid >= 0; tid--) {
 531                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 532                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 533                 while (!mac->act_scanning &&
 534                        rtlpriv->psc.rfpwr_state == ERFON) {
 535                         struct rtl_tcb_desc tcb_desc;
 536                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 537
 538                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 539                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 540                             (ring->entries - skb_queue_len(&ring->queue) >
 541                              rtlhal->max_earlymode_num)) {
 542                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 543                         } else {
 544                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 545                                 break;
 546                         }
 547                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 548
 549                         /* Some macaddr can't do early mode. like
 550                          * multicast/broadcast/no_qos data */
 551                         info = IEEE80211_SKB_CB(skb);
 552                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 553                                 _rtl_update_earlymode_info(hw, skb,
 554                                                            &tcb_desc, tid);
 555
 556                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 557                 }
 558         }
 559 }
 560
 561
 562 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 563 {
 564         struct rtl_priv *rtlpriv = rtl_priv(hw);
 565         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 566
 567         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 568
 569         while (skb_queue_len(&ring->queue)) {
 570                 struct sk_buff *skb;
 571                 struct ieee80211_tx_info *info;
 572                 __le16 fc;
 573                 u8 tid;
 574                 u8 *entry;
 575
 576                 if (rtlpriv->use_new_trx_flow)
 577                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 578                 else
 579                         entry = (u8 *)(&ring->desc[ring->idx]);
 580
 581                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 582                         return;
 583                 ring->idx = (ring->idx + 1) % ring->entries;
 584
 585                 skb = __skb_dequeue(&ring->queue);
 586                 pci_unmap_single(rtlpci->pdev,
 587                                  rtlpriv->cfg->ops->
 588                                              get_desc((u8 *)entry, true,
 589                                                       HW_DESC_TXBUFF_ADDR),
 590                                  skb->len, PCI_DMA_TODEVICE);
 591
 592                 /* remove early mode header */
 593                 if (rtlpriv->rtlhal.earlymode_enable)
 594                         skb_pull(skb, EM_HDR_LEN);
 595
 596                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 597                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 598                          ring->idx,
 599                          skb_queue_len(&ring->queue),
 600                          *(u16 *)(skb->data + 22));
 601
 602                 if (prio == TXCMD_QUEUE) {
 603                         dev_kfree_skb(skb);
 604                         goto tx_status_ok;
 605
 606                 }
 607
 608                 /* for sw LPS, just after NULL skb send out, we can
 609                  * sure AP knows we are sleeping, we should not let
 610                  * rf sleep
 611                  */
 612                 fc = rtl_get_fc(skb);
 613                 if (ieee80211_is_nullfunc(fc)) {
 614                         if (ieee80211_has_pm(fc)) {
 615                                 rtlpriv->mac80211.offchan_delay = true;
 616                                 rtlpriv->psc.state_inap = true;
 617                         } else {
 618                                 rtlpriv->psc.state_inap = false;
 619                         }
 620                 }
 621                 if (ieee80211_is_action(fc)) {
 622                         struct ieee80211_mgmt *action_frame =
 623                                 (struct ieee80211_mgmt *)skb->data;
 624                         if (action_frame->u.action.u.ht_smps.action ==
 625                             WLAN_HT_ACTION_SMPS) {
 626                                 dev_kfree_skb(skb);
 627                                 goto tx_status_ok;
 628                         }
 629                 }
 630
 631                 /* update tid tx pkt num */
 632                 tid = rtl_get_tid(skb);
 633                 if (tid <= 7)
 634                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 635
 636                 info = IEEE80211_SKB_CB(skb);
 637                 ieee80211_tx_info_clear_status(info);
 638
 639                 info->flags |= IEEE80211_TX_STAT_ACK;
 640                 /*info->status.rates[0].count = 1; */
 641
 642                 ieee80211_tx_status_irqsafe(hw, skb);
 643
 644                 if ((ring->entries - skb_queue_len(&ring->queue))
 645                                 == 2) {
 646
 647                         RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
 648                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 649                                  prio, ring->idx,
 650                                  skb_queue_len(&ring->queue));
 651
 652                         ieee80211_wake_queue(hw,
 653                                         skb_get_queue_mapping
 654                                         (skb));
 655                 }
 656 tx_status_ok:
 657                 skb = NULL;
 658         }
 659
 660         if (((rtlpriv->link_info.num_rx_inperiod +
 661                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 662                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 663                 rtlpriv->enter_ps = false;
 664                 schedule_work(&rtlpriv->works.lps_change_work);
 665         }
 666 }
 667
 668 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 669                                     struct sk_buff *new_skb, u8 *entry,
 670                                     int rxring_idx, int desc_idx)
 671 {
 672         struct rtl_priv *rtlpriv = rtl_priv(hw);
 673         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 674         u32 bufferaddress;
 675         u8 tmp_one = 1;
 676         struct sk_buff *skb;
 677
 678         if (likely(new_skb)) {
 679                 skb = new_skb;
 680                 goto remap;
 681         }
 682         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 683         if (!skb)
 684                 return 0;
 685
 686 remap:
 687         /* just set skb->cb to mapping addr for pci_unmap_single use */
 688         *((dma_addr_t *)skb->cb) =
 689                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 690                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 691         bufferaddress = *((dma_addr_t *)skb->cb);
 692         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 693                 return 0;
 694         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 695         if (rtlpriv->use_new_trx_flow) {
 696                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 697                                             HW_DESC_RX_PREPARE,
 698                                             (u8 *)&bufferaddress);
 699         } else {
 700                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 701                                             HW_DESC_RXBUFF_ADDR,
 702                                             (u8 *)&bufferaddress);
 703                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 704                                             HW_DESC_RXPKT_LEN,
 705                                             (u8 *)&rtlpci->rxbuffersize);
 706                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 707                                             HW_DESC_RXOWN,
 708                                             (u8 *)&tmp_one);
 709         }
 710         return 1;
 711 }
 712
 713 /* inorder to receive 8K AMSDU we have set skb to
 714  * 9100bytes in init rx ring, but if this packet is
 715  * not a AMSDU, this large packet will be sent to
 716  * TCP/IP directly, this cause big packet ping fail
 717  * like: "ping -s 65507", so here we will realloc skb
 718  * based on the true size of packet, Mac80211
 719  * Probably will do it better, but does not yet.
 720  *
 721  * Some platform will fail when alloc skb sometimes.
 722  * in this condition, we will send the old skb to
 723  * mac80211 directly, this will not cause any other
 724  * issues, but only this packet will be lost by TCP/IP
 725  */
 726 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 727                                     struct sk_buff *skb,
 728                                     struct ieee80211_rx_status rx_status)
 729 {
 730         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 731                 dev_kfree_skb_any(skb);
 732         } else {
 733                 struct sk_buff *uskb = NULL;
 734                 u8 *pdata;
 735
 736                 uskb = dev_alloc_skb(skb->len + 128);
 737                 if (likely(uskb)) {
 738                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 739                                sizeof(rx_status));
 740                         pdata = (u8 *)skb_put(uskb, skb->len);
 741                         memcpy(pdata, skb->data, skb->len);
 742                         dev_kfree_skb_any(skb);
 743                         ieee80211_rx_irqsafe(hw, uskb);
 744                 } else {
 745                         ieee80211_rx_irqsafe(hw, skb);
 746                 }
 747         }
 748 }
 749
 750 /*hsisr interrupt handler*/
 751 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 752 {
 753         struct rtl_priv *rtlpriv = rtl_priv(hw);
 754         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 755
 756         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 757                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 758                        rtlpci->sys_irq_mask);
 759 }
 760
 761 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 762 {
 763         struct rtl_priv *rtlpriv = rtl_priv(hw);
 764         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 765         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 766         struct ieee80211_rx_status rx_status = { 0 };
 767         unsigned int count = rtlpci->rxringcount;
 768         u8 own;
 769         u8 tmp_one;
 770         bool unicast = false;
 771         u8 hw_queue = 0;
 772         unsigned int rx_remained_cnt;
 773         struct rtl_stats stats = {
 774                 .signal = 0,
 775                 .rate = 0,
 776         };
 777
 778         /*RX NORMAL PKT */
 779         while (count--) {
 780                 struct ieee80211_hdr *hdr;
 781                 __le16 fc;
 782                 u16 len;
 783                 /*rx buffer descriptor */
 784                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 785                 /*if use new trx flow, it means wifi info */
 786                 struct rtl_rx_desc *pdesc = NULL;
 787                 /*rx pkt */
 788                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 789                                       rtlpci->rx_ring[rxring_idx].idx];
 790                 struct sk_buff *new_skb;
 791
 792                 if (rtlpriv->use_new_trx_flow) {
 793                         rx_remained_cnt =
 794                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 795                                                                       hw_queue);
 796                         if (rx_remained_cnt < 1)
 797                                 return;
 798
 799                 } else {        /* rx descriptor */
 800                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 801                                 rtlpci->rx_ring[rxring_idx].idx];
 802
 803                         own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
 804                                                               false,
 805                                                               HW_DESC_OWN);
 806                         if (own) /* wait data to be filled by hardware */
 807                                 return;
 808                 }
 809
 810                 /* Reaching this point means: data is filled already
 811                  * AAAAAAttention !!!
 812                  * We can NOT access 'skb' before 'pci_unmap_single'
 813                  */
 814                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 815                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 816
 817                 /* get a new skb - if fail, old one will be reused */
 818                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 819                 if (unlikely(!new_skb)) {
 820                         pr_err("Allocation of new skb failed in %s\n",
 821                                __func__);
 822                         goto no_new;
 823                 }
 824                 if (rtlpriv->use_new_trx_flow) {
 825                         buffer_desc =
 826                           &rtlpci->rx_ring[rxring_idx].buffer_desc
 827                                 [rtlpci->rx_ring[rxring_idx].idx];
 828                         /*means rx wifi info*/
 829                         pdesc = (struct rtl_rx_desc *)skb->data;
 830                 }
 831                 memset(&rx_status , 0 , sizeof(rx_status));
 832                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 833                                                  &rx_status, (u8 *)pdesc, skb);
 834
 835                 if (rtlpriv->use_new_trx_flow)
 836                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 837                                                            (u8 *)buffer_desc,
 838                                                            hw_queue);
 839
 840                 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false,
 841                                                   HW_DESC_RXPKT_LEN);
 842
 843                 if (skb->end - skb->tail > len) {
 844                         skb_put(skb, len);
 845                         if (rtlpriv->use_new_trx_flow)
 846                                 skb_reserve(skb, stats.rx_drvinfo_size +
 847                                             stats.rx_bufshift + 24);
 848                         else
 849                                 skb_reserve(skb, stats.rx_drvinfo_size +
 850                                             stats.rx_bufshift);
 851
 852                 } else {
 853                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 854                                  "skb->end - skb->tail = %d, len is %d\n",
 855                                  skb->end - skb->tail, len);
 856                         break;
 857                 }
 858                 /* handle command packet here */
 859                 if (rtlpriv->cfg->ops->rx_command_packet &&
 860                     rtlpriv->cfg->ops->rx_command_packet(hw, stats, skb)) {
 861                                 dev_kfree_skb_any(skb);
 862                                 goto end;
 863                 }
 864
 865                 /*
 866                  * NOTICE This can not be use for mac80211,
 867                  * this is done in mac80211 code,
 868                  * if done here sec DHCP will fail
 869                  * skb_trim(skb, skb->len - 4);
 870                  */
 871
 872                 hdr = rtl_get_hdr(skb);
 873                 fc = rtl_get_fc(skb);
 874
 875                 if (!stats.crc && !stats.hwerror) {
 876                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 877                                sizeof(rx_status));
 878
 879                         if (is_broadcast_ether_addr(hdr->addr1)) {
 880                                 ;/*TODO*/
 881                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 882                                 ;/*TODO*/
 883                         } else {
 884                                 unicast = true;
 885                                 rtlpriv->stats.rxbytesunicast += skb->len;
 886                         }
 887                         rtl_is_special_data(hw, skb, false);
 888
 889                         if (ieee80211_is_data(fc)) {
 890                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 891                                 if (unicast)
 892                                         rtlpriv->link_info.num_rx_inperiod++;
 893                         }
 894                         /* static bcn for roaming */
 895                         rtl_beacon_statistic(hw, skb);
 896                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 897                         /* for sw lps */
 898                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 899                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 900                         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 901                             (rtlpriv->rtlhal.current_bandtype ==
 902                              BAND_ON_2_4G) &&
 903                             (ieee80211_is_beacon(fc) ||
 904                              ieee80211_is_probe_resp(fc))) {
 905                                 dev_kfree_skb_any(skb);
 906                         } else {
 907                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 908                         }
 909                 } else {
 910                         dev_kfree_skb_any(skb);
 911                 }
 912                 if (rtlpriv->use_new_trx_flow) {
 913                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 914                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 915                                         RTL_PCI_MAX_RX_COUNT;
 916
 917                         rx_remained_cnt--;
 918                         rtl_write_word(rtlpriv, 0x3B4,
 919                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 920                 }
 921                 if (((rtlpriv->link_info.num_rx_inperiod +
 922                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 923                       (rtlpriv->link_info.num_rx_inperiod > 2)) {
 924                         rtlpriv->enter_ps = false;
 925                         schedule_work(&rtlpriv->works.lps_change_work);
 926                 }
 927 end:
 928                 skb = new_skb;
 929 no_new:
 930                 if (rtlpriv->use_new_trx_flow) {
 931                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 932                                                  rxring_idx,
 933                                                  rtlpci->rx_ring[rxring_idx].idx);
 934                 } else {
 935                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 936                                                  rxring_idx,
 937                                                  rtlpci->rx_ring[rxring_idx].idx);
 938                         if (rtlpci->rx_ring[rxring_idx].idx ==
 939                             rtlpci->rxringcount - 1)
 940                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 941                                                             false,
 942                                                             HW_DESC_RXERO,
 943                                                             (u8 *)&tmp_one);
 944                 }
 945                 rtlpci->rx_ring[rxring_idx].idx =
 946                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 947                                 rtlpci->rxringcount;
 948         }
 949 }
 950
 951 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 952 {
 953         struct ieee80211_hw *hw = dev_id;
 954         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 955         struct rtl_priv *rtlpriv = rtl_priv(hw);
 956         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 957         unsigned long flags;
 958         u32 inta = 0;
 959         u32 intb = 0;
 960         irqreturn_t ret = IRQ_HANDLED;
 961
 962         if (rtlpci->irq_enabled == 0)
 963                 return ret;
 964
 965         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock , flags);
 966         rtlpriv->cfg->ops->disable_interrupt(hw);
 967
 968         /*read ISR: 4/8bytes */
 969         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 970
 971         /*Shared IRQ or HW disappared */
 972         if (!inta || inta == 0xffff)
 973                 goto done;
 974
 975         /*<1> beacon related */
 976         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 977                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 978                          "beacon ok interrupt!\n");
 979         }
 980
 981         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 982                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 983                          "beacon err interrupt!\n");
 984         }
 985
 986         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 987                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 988         }
 989
 990         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 991                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 992                          "prepare beacon for interrupt!\n");
 993                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 994         }
 995
 996         /*<2> Tx related */
 997         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 998                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 999
1000         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
1001                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1002                          "Manage ok interrupt!\n");
1003                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
1004         }
1005
1006         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
1007                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1008                          "HIGH_QUEUE ok interrupt!\n");
1009                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
1010         }
1011
1012         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
1013                 rtlpriv->link_info.num_tx_inperiod++;
1014
1015                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1016                          "BK Tx OK interrupt!\n");
1017                 _rtl_pci_tx_isr(hw, BK_QUEUE);
1018         }
1019
1020         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1021                 rtlpriv->link_info.num_tx_inperiod++;
1022
1023                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1024                          "BE TX OK interrupt!\n");
1025                 _rtl_pci_tx_isr(hw, BE_QUEUE);
1026         }
1027
1028         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1029                 rtlpriv->link_info.num_tx_inperiod++;
1030
1031                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1032                          "VI TX OK interrupt!\n");
1033                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1034         }
1035
1036         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1037                 rtlpriv->link_info.num_tx_inperiod++;
1038
1039                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1040                          "Vo TX OK interrupt!\n");
1041                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1042         }
1043
1044         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1045                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1046                         rtlpriv->link_info.num_tx_inperiod++;
1047
1048                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1049                                  "CMD TX OK interrupt!\n");
1050                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1051                 }
1052         }
1053
1054         /*<3> Rx related */
1055         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1056                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1057                 _rtl_pci_rx_interrupt(hw);
1058         }
1059
1060         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1061                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1062                          "rx descriptor unavailable!\n");
1063                 _rtl_pci_rx_interrupt(hw);
1064         }
1065
1066         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1067                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1068                 _rtl_pci_rx_interrupt(hw);
1069         }
1070
1071         /*<4> fw related*/
1072         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1073                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1074                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1075                                  "firmware interrupt!\n");
1076                         queue_delayed_work(rtlpriv->works.rtl_wq,
1077                                            &rtlpriv->works.fwevt_wq, 0);
1078                 }
1079         }
1080
1081         /*<5> hsisr related*/
1082         /* Only 8188EE & 8723BE Supported.
1083          * If Other ICs Come in, System will corrupt,
1084          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1085          * are not initialized
1086          */
1087         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1088             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1089                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1090                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1091                                  "hsisr interrupt!\n");
1092                         _rtl_pci_hs_interrupt(hw);
1093                 }
1094         }
1095
1096         if (rtlpriv->rtlhal.earlymode_enable)
1097                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1098
1099 done:
1100         rtlpriv->cfg->ops->enable_interrupt(hw);
1101         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1102         return ret;
1103 }
1104
1105 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1106 {
1107         _rtl_pci_tx_chk_waitq(hw);
1108 }
1109
1110 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1111 {
1112         struct rtl_priv *rtlpriv = rtl_priv(hw);
1113         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1114         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1115         struct rtl8192_tx_ring *ring = NULL;
1116         struct ieee80211_hdr *hdr = NULL;
1117         struct ieee80211_tx_info *info = NULL;
1118         struct sk_buff *pskb = NULL;
1119         struct rtl_tx_desc *pdesc = NULL;
1120         struct rtl_tcb_desc tcb_desc;
1121         /*This is for new trx flow*/
1122         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1123         u8 temp_one = 1;
1124
1125         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1126         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1127         pskb = __skb_dequeue(&ring->queue);
1128         if (pskb)
1129                 kfree_skb(pskb);
1130
1131         /*NB: the beacon data buffer must be 32-bit aligned. */
1132         pskb = ieee80211_beacon_get(hw, mac->vif);
1133         if (pskb == NULL)
1134                 return;
1135         hdr = rtl_get_hdr(pskb);
1136         info = IEEE80211_SKB_CB(pskb);
1137         pdesc = &ring->desc[0];
1138         if (rtlpriv->use_new_trx_flow)
1139                 pbuffer_desc = &ring->buffer_desc[0];
1140
1141         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1142                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1143                                         BEACON_QUEUE, &tcb_desc);
1144
1145         __skb_queue_tail(&ring->queue, pskb);
1146
1147         if (rtlpriv->use_new_trx_flow) {
1148                 temp_one = 4;
1149                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1150                                             HW_DESC_OWN, (u8 *)&temp_one);
1151         } else {
1152                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1153                                             &temp_one);
1154         }
1155         return;
1156 }
1157
1158 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1159 {
1160         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1161         struct rtl_priv *rtlpriv = rtl_priv(hw);
1162         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1163         u8 i;
1164         u16 desc_num;
1165
1166         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1167                 desc_num = TX_DESC_NUM_92E;
1168         else
1169                 desc_num = RT_TXDESC_NUM;
1170
1171         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1172                 rtlpci->txringcount[i] = desc_num;
1173
1174         /*
1175          *we just alloc 2 desc for beacon queue,
1176          *because we just need first desc in hw beacon.
1177          */
1178         rtlpci->txringcount[BEACON_QUEUE] = 2;
1179
1180         /*BE queue need more descriptor for performance
1181          *consideration or, No more tx desc will happen,
1182          *and may cause mac80211 mem leakage.
1183          */
1184         if (!rtl_priv(hw)->use_new_trx_flow)
1185                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1186
1187         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1188         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1189 }
1190
1191 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1192                 struct pci_dev *pdev)
1193 {
1194         struct rtl_priv *rtlpriv = rtl_priv(hw);
1195         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1196         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1197         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1198
1199         rtlpci->up_first_time = true;
1200         rtlpci->being_init_adapter = false;
1201
1202         rtlhal->hw = hw;
1203         rtlpci->pdev = pdev;
1204
1205         /*Tx/Rx related var */
1206         _rtl_pci_init_trx_var(hw);
1207
1208         /*IBSS*/ mac->beacon_interval = 100;
1209
1210         /*AMPDU*/
1211         mac->min_space_cfg = 0;
1212         mac->max_mss_density = 0;
1213         /*set sane AMPDU defaults */
1214         mac->current_ampdu_density = 7;
1215         mac->current_ampdu_factor = 3;
1216
1217         /*QOS*/
1218         rtlpci->acm_method = EACMWAY2_SW;
1219
1220         /*task */
1221         tasklet_init(&rtlpriv->works.irq_tasklet,
1222                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1223                      (unsigned long)hw);
1224         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1225                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1226                      (unsigned long)hw);
1227         INIT_WORK(&rtlpriv->works.lps_change_work,
1228                   rtl_lps_change_work_callback);
1229 }
1230
1231 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1232                                  unsigned int prio, unsigned int entries)
1233 {
1234         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1235         struct rtl_priv *rtlpriv = rtl_priv(hw);
1236         struct rtl_tx_buffer_desc *buffer_desc;
1237         struct rtl_tx_desc *desc;
1238         dma_addr_t buffer_desc_dma, desc_dma;
1239         u32 nextdescaddress;
1240         int i;
1241
1242         /* alloc tx buffer desc for new trx flow*/
1243         if (rtlpriv->use_new_trx_flow) {
1244                 buffer_desc =
1245                    pci_zalloc_consistent(rtlpci->pdev,
1246                                          sizeof(*buffer_desc) * entries,
1247                                          &buffer_desc_dma);
1248
1249                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1250                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1251                                  "Cannot allocate TX ring (prio = %d)\n",
1252                                  prio);
1253                         return -ENOMEM;
1254                 }
1255
1256                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1257                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1258
1259                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1260                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1261                 rtlpci->tx_ring[prio].avl_desc = entries;
1262         }
1263
1264         /* alloc dma for this ring */
1265         desc = pci_zalloc_consistent(rtlpci->pdev,
1266                                      sizeof(*desc) * entries, &desc_dma);
1267
1268         if (!desc || (unsigned long)desc & 0xFF) {
1269                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1270                          "Cannot allocate TX ring (prio = %d)\n", prio);
1271                 return -ENOMEM;
1272         }
1273
1274         rtlpci->tx_ring[prio].desc = desc;
1275         rtlpci->tx_ring[prio].dma = desc_dma;
1276
1277         rtlpci->tx_ring[prio].idx = 0;
1278         rtlpci->tx_ring[prio].entries = entries;
1279         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1280
1281         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1282                  prio, desc);
1283
1284         /* init every desc in this ring */
1285         if (!rtlpriv->use_new_trx_flow) {
1286                 for (i = 0; i < entries; i++) {
1287                         nextdescaddress = (u32)desc_dma +
1288                                           ((i + 1) % entries) *
1289                                           sizeof(*desc);
1290
1291                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1292                                                     true,
1293                                                     HW_DESC_TX_NEXTDESC_ADDR,
1294                                                     (u8 *)&nextdescaddress);
1295                 }
1296         }
1297         return 0;
1298 }
1299
1300 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1301 {
1302         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1303         struct rtl_priv *rtlpriv = rtl_priv(hw);
1304         int i;
1305
1306         if (rtlpriv->use_new_trx_flow) {
1307                 struct rtl_rx_buffer_desc *entry = NULL;
1308                 /* alloc dma for this ring */
1309                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1310                     pci_zalloc_consistent(rtlpci->pdev,
1311                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1312                                                  buffer_desc) *
1313                                                  rtlpci->rxringcount,
1314                                           &rtlpci->rx_ring[rxring_idx].dma);
1315                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1316                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1317                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1318                                  "Cannot allocate RX ring\n");
1319                         return -ENOMEM;
1320                 }
1321
1322                 /* init every desc in this ring */
1323                 rtlpci->rx_ring[rxring_idx].idx = 0;
1324                 for (i = 0; i < rtlpci->rxringcount; i++) {
1325                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1326                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1327                                                       rxring_idx, i))
1328                                 return -ENOMEM;
1329                 }
1330         } else {
1331                 struct rtl_rx_desc *entry = NULL;
1332                 u8 tmp_one = 1;
1333                 /* alloc dma for this ring */
1334                 rtlpci->rx_ring[rxring_idx].desc =
1335                     pci_zalloc_consistent(rtlpci->pdev,
1336                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1337                                           desc) * rtlpci->rxringcount,
1338                                           &rtlpci->rx_ring[rxring_idx].dma);
1339                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1340                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1341                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1342                                  "Cannot allocate RX ring\n");
1343                         return -ENOMEM;
1344                 }
1345
1346                 /* init every desc in this ring */
1347                 rtlpci->rx_ring[rxring_idx].idx = 0;
1348
1349                 for (i = 0; i < rtlpci->rxringcount; i++) {
1350                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1351                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1352                                                       rxring_idx, i))
1353                                 return -ENOMEM;
1354                 }
1355
1356                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1357                                             HW_DESC_RXERO, &tmp_one);
1358         }
1359         return 0;
1360 }
1361
1362 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1363                 unsigned int prio)
1364 {
1365         struct rtl_priv *rtlpriv = rtl_priv(hw);
1366         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1367         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1368
1369         /* free every desc in this ring */
1370         while (skb_queue_len(&ring->queue)) {
1371                 u8 *entry;
1372                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1373
1374                 if (rtlpriv->use_new_trx_flow)
1375                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1376                 else
1377                         entry = (u8 *)(&ring->desc[ring->idx]);
1378
1379                 pci_unmap_single(rtlpci->pdev,
1380                                  rtlpriv->cfg->
1381                                              ops->get_desc((u8 *)entry, true,
1382                                                    HW_DESC_TXBUFF_ADDR),
1383                                  skb->len, PCI_DMA_TODEVICE);
1384                 kfree_skb(skb);
1385                 ring->idx = (ring->idx + 1) % ring->entries;
1386         }
1387
1388         /* free dma of this ring */
1389         pci_free_consistent(rtlpci->pdev,
1390                             sizeof(*ring->desc) * ring->entries,
1391                             ring->desc, ring->dma);
1392         ring->desc = NULL;
1393         if (rtlpriv->use_new_trx_flow) {
1394                 pci_free_consistent(rtlpci->pdev,
1395                                     sizeof(*ring->buffer_desc) * ring->entries,
1396                                     ring->buffer_desc, ring->buffer_desc_dma);
1397                 ring->buffer_desc = NULL;
1398         }
1399 }
1400
1401 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1402 {
1403         struct rtl_priv *rtlpriv = rtl_priv(hw);
1404         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1405         int i;
1406
1407         /* free every desc in this ring */
1408         for (i = 0; i < rtlpci->rxringcount; i++) {
1409                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1410
1411                 if (!skb)
1412                         continue;
1413                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1414                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1415                 kfree_skb(skb);
1416         }
1417
1418         /* free dma of this ring */
1419         if (rtlpriv->use_new_trx_flow) {
1420                 pci_free_consistent(rtlpci->pdev,
1421                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1422                                     buffer_desc) * rtlpci->rxringcount,
1423                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1424                                     rtlpci->rx_ring[rxring_idx].dma);
1425                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1426         } else {
1427                 pci_free_consistent(rtlpci->pdev,
1428                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1429                                     rtlpci->rxringcount,
1430                                     rtlpci->rx_ring[rxring_idx].desc,
1431                                     rtlpci->rx_ring[rxring_idx].dma);
1432                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1433         }
1434 }
1435
1436 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1437 {
1438         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1439         int ret;
1440         int i, rxring_idx;
1441
1442         /* rxring_idx 0:RX_MPDU_QUEUE
1443          * rxring_idx 1:RX_CMD_QUEUE
1444          */
1445         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1446                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1447                 if (ret)
1448                         return ret;
1449         }
1450
1451         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1452                 ret = _rtl_pci_init_tx_ring(hw, i,
1453                                  rtlpci->txringcount[i]);
1454                 if (ret)
1455                         goto err_free_rings;
1456         }
1457
1458         return 0;
1459
1460 err_free_rings:
1461         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1462                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1463
1464         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1465                 if (rtlpci->tx_ring[i].desc ||
1466                     rtlpci->tx_ring[i].buffer_desc)
1467                         _rtl_pci_free_tx_ring(hw, i);
1468
1469         return 1;
1470 }
1471
1472 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1473 {
1474         u32 i, rxring_idx;
1475
1476         /*free rx rings */
1477         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1478                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1479
1480         /*free tx rings */
1481         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1482                 _rtl_pci_free_tx_ring(hw, i);
1483
1484         return 0;
1485 }
1486
1487 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1488 {
1489         struct rtl_priv *rtlpriv = rtl_priv(hw);
1490         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1491         int i, rxring_idx;
1492         unsigned long flags;
1493         u8 tmp_one = 1;
1494         u32 bufferaddress;
1495         /* rxring_idx 0:RX_MPDU_QUEUE */
1496         /* rxring_idx 1:RX_CMD_QUEUE */
1497         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1498                 /* force the rx_ring[RX_MPDU_QUEUE/
1499                  * RX_CMD_QUEUE].idx to the first one
1500                  *new trx flow, do nothing
1501                 */
1502                 if (!rtlpriv->use_new_trx_flow &&
1503                     rtlpci->rx_ring[rxring_idx].desc) {
1504                         struct rtl_rx_desc *entry = NULL;
1505
1506                         rtlpci->rx_ring[rxring_idx].idx = 0;
1507                         for (i = 0; i < rtlpci->rxringcount; i++) {
1508                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1509                                 bufferaddress =
1510                                   rtlpriv->cfg->ops->get_desc((u8 *)entry,
1511                                   false , HW_DESC_RXBUFF_ADDR);
1512                                 memset((u8 *)entry , 0 ,
1513                                        sizeof(*rtlpci->rx_ring
1514                                        [rxring_idx].desc));/*clear one entry*/
1515                                 if (rtlpriv->use_new_trx_flow) {
1516                                         rtlpriv->cfg->ops->set_desc(hw,
1517                                             (u8 *)entry, false,
1518                                             HW_DESC_RX_PREPARE,
1519                                             (u8 *)&bufferaddress);
1520                                 } else {
1521                                         rtlpriv->cfg->ops->set_desc(hw,
1522                                             (u8 *)entry, false,
1523                                             HW_DESC_RXBUFF_ADDR,
1524                                             (u8 *)&bufferaddress);
1525                                         rtlpriv->cfg->ops->set_desc(hw,
1526                                             (u8 *)entry, false,
1527                                             HW_DESC_RXPKT_LEN,
1528                                             (u8 *)&rtlpci->rxbuffersize);
1529                                         rtlpriv->cfg->ops->set_desc(hw,
1530                                             (u8 *)entry, false,
1531                                             HW_DESC_RXOWN,
1532                                             (u8 *)&tmp_one);
1533                                 }
1534                         }
1535                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1536                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1537                 }
1538                 rtlpci->rx_ring[rxring_idx].idx = 0;
1539         }
1540
1541         /*
1542          *after reset, release previous pending packet,
1543          *and force the  tx idx to the first one
1544          */
1545         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1546         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1547                 if (rtlpci->tx_ring[i].desc ||
1548                     rtlpci->tx_ring[i].buffer_desc) {
1549                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1550
1551                         while (skb_queue_len(&ring->queue)) {
1552                                 u8 *entry;
1553                                 struct sk_buff *skb =
1554                                         __skb_dequeue(&ring->queue);
1555                                 if (rtlpriv->use_new_trx_flow)
1556                                         entry = (u8 *)(&ring->buffer_desc
1557                                                                 [ring->idx]);
1558                                 else
1559                                         entry = (u8 *)(&ring->desc[ring->idx]);
1560
1561                                 pci_unmap_single(rtlpci->pdev,
1562                                                  rtlpriv->cfg->ops->
1563                                                          get_desc((u8 *)
1564                                                          entry,
1565                                                          true,
1566                                                          HW_DESC_TXBUFF_ADDR),
1567                                                  skb->len, PCI_DMA_TODEVICE);
1568                                 kfree_skb(skb);
1569                                 ring->idx = (ring->idx + 1) % ring->entries;
1570                         }
1571                         ring->idx = 0;
1572                 }
1573         }
1574         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1575
1576         return 0;
1577 }
1578
1579 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1580                                         struct ieee80211_sta *sta,
1581                                         struct sk_buff *skb)
1582 {
1583         struct rtl_priv *rtlpriv = rtl_priv(hw);
1584         struct rtl_sta_info *sta_entry = NULL;
1585         u8 tid = rtl_get_tid(skb);
1586         __le16 fc = rtl_get_fc(skb);
1587
1588         if (!sta)
1589                 return false;
1590         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1591
1592         if (!rtlpriv->rtlhal.earlymode_enable)
1593                 return false;
1594         if (ieee80211_is_nullfunc(fc))
1595                 return false;
1596         if (ieee80211_is_qos_nullfunc(fc))
1597                 return false;
1598         if (ieee80211_is_pspoll(fc))
1599                 return false;
1600         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1601                 return false;
1602         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1603                 return false;
1604         if (tid > 7)
1605                 return false;
1606
1607         /* maybe every tid should be checked */
1608         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1609                 return false;
1610
1611         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1612         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1613         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1614
1615         return true;
1616 }
1617
1618 static int rtl_pci_tx(struct ieee80211_hw *hw,
1619                       struct ieee80211_sta *sta,
1620                       struct sk_buff *skb,
1621                       struct rtl_tcb_desc *ptcb_desc)
1622 {
1623         struct rtl_priv *rtlpriv = rtl_priv(hw);
1624         struct rtl_sta_info *sta_entry = NULL;
1625         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1626         struct rtl8192_tx_ring *ring;
1627         struct rtl_tx_desc *pdesc;
1628         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1629         u16 idx;
1630         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1631         unsigned long flags;
1632         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1633         __le16 fc = rtl_get_fc(skb);
1634         u8 *pda_addr = hdr->addr1;
1635         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1636         /*ssn */
1637         u8 tid = 0;
1638         u16 seq_number = 0;
1639         u8 own;
1640         u8 temp_one = 1;
1641
1642         if (ieee80211_is_mgmt(fc))
1643                 rtl_tx_mgmt_proc(hw, skb);
1644
1645         if (rtlpriv->psc.sw_ps_enabled) {
1646                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1647                         !ieee80211_has_pm(fc))
1648                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1649         }
1650
1651         rtl_action_proc(hw, skb, true);
1652
1653         if (is_multicast_ether_addr(pda_addr))
1654                 rtlpriv->stats.txbytesmulticast += skb->len;
1655         else if (is_broadcast_ether_addr(pda_addr))
1656                 rtlpriv->stats.txbytesbroadcast += skb->len;
1657         else
1658                 rtlpriv->stats.txbytesunicast += skb->len;
1659
1660         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1661         ring = &rtlpci->tx_ring[hw_queue];
1662         if (hw_queue != BEACON_QUEUE) {
1663                 if (rtlpriv->use_new_trx_flow)
1664                         idx = ring->cur_tx_wp;
1665                 else
1666                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1667                               ring->entries;
1668         } else {
1669                 idx = 0;
1670         }
1671
1672         pdesc = &ring->desc[idx];
1673         if (rtlpriv->use_new_trx_flow) {
1674                 ptx_bd_desc = &ring->buffer_desc[idx];
1675         } else {
1676                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
1677                                 true, HW_DESC_OWN);
1678
1679                 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1680                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1681                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1682                                  hw_queue, ring->idx, idx,
1683                                  skb_queue_len(&ring->queue));
1684
1685                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1686                                                flags);
1687                         return skb->len;
1688                 }
1689         }
1690
1691         if (ieee80211_is_data_qos(fc)) {
1692                 tid = rtl_get_tid(skb);
1693                 if (sta) {
1694                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1695                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1696                                       IEEE80211_SCTL_SEQ) >> 4;
1697                         seq_number += 1;
1698
1699                         if (!ieee80211_has_morefrags(hdr->frame_control))
1700                                 sta_entry->tids[tid].seq_number = seq_number;
1701                 }
1702         }
1703
1704         if (ieee80211_is_data(fc))
1705                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1706
1707         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1708                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1709
1710         __skb_queue_tail(&ring->queue, skb);
1711
1712         if (rtlpriv->use_new_trx_flow) {
1713                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1714                                             HW_DESC_OWN, &hw_queue);
1715         } else {
1716                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1717                                             HW_DESC_OWN, &temp_one);
1718         }
1719
1720         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1721             hw_queue != BEACON_QUEUE) {
1722                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1723                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1724                          hw_queue, ring->idx, idx,
1725                          skb_queue_len(&ring->queue));
1726
1727                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1728         }
1729
1730         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1731
1732         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1733
1734         return 0;
1735 }
1736
1737 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1738 {
1739         struct rtl_priv *rtlpriv = rtl_priv(hw);
1740         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1741         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1742         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1743         u16 i = 0;
1744         int queue_id;
1745         struct rtl8192_tx_ring *ring;
1746
1747         if (mac->skip_scan)
1748                 return;
1749
1750         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1751                 u32 queue_len;
1752
1753                 if (((queues >> queue_id) & 0x1) == 0) {
1754                         queue_id--;
1755                         continue;
1756                 }
1757                 ring = &pcipriv->dev.tx_ring[queue_id];
1758                 queue_len = skb_queue_len(&ring->queue);
1759                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1760                         queue_id == TXCMD_QUEUE) {
1761                         queue_id--;
1762                         continue;
1763                 } else {
1764                         msleep(20);
1765                         i++;
1766                 }
1767
1768                 /* we just wait 1s for all queues */
1769                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1770                         is_hal_stop(rtlhal) || i >= 200)
1771                         return;
1772         }
1773 }
1774
1775 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1776 {
1777         struct rtl_priv *rtlpriv = rtl_priv(hw);
1778         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1779
1780         _rtl_pci_deinit_trx_ring(hw);
1781
1782         synchronize_irq(rtlpci->pdev->irq);
1783         tasklet_kill(&rtlpriv->works.irq_tasklet);
1784         cancel_work_sync(&rtlpriv->works.lps_change_work);
1785
1786         flush_workqueue(rtlpriv->works.rtl_wq);
1787         destroy_workqueue(rtlpriv->works.rtl_wq);
1788
1789 }
1790
1791 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1792 {
1793         struct rtl_priv *rtlpriv = rtl_priv(hw);
1794         int err;
1795
1796         _rtl_pci_init_struct(hw, pdev);
1797
1798         err = _rtl_pci_init_trx_ring(hw);
1799         if (err) {
1800                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1801                          "tx ring initialization failed\n");
1802                 return err;
1803         }
1804
1805         return 0;
1806 }
1807
1808 static int rtl_pci_start(struct ieee80211_hw *hw)
1809 {
1810         struct rtl_priv *rtlpriv = rtl_priv(hw);
1811         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1812         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1813         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1814
1815         int err;
1816
1817         rtl_pci_reset_trx_ring(hw);
1818
1819         rtlpci->driver_is_goingto_unload = false;
1820         if (rtlpriv->cfg->ops->get_btc_status &&
1821             rtlpriv->cfg->ops->get_btc_status()) {
1822                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1823                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1824         }
1825         err = rtlpriv->cfg->ops->hw_init(hw);
1826         if (err) {
1827                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1828                          "Failed to config hardware!\n");
1829                 return err;
1830         }
1831
1832         rtlpriv->cfg->ops->enable_interrupt(hw);
1833         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1834
1835         rtl_init_rx_config(hw);
1836
1837         /*should be after adapter start and interrupt enable. */
1838         set_hal_start(rtlhal);
1839
1840         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1841
1842         rtlpci->up_first_time = false;
1843
1844         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "rtl_pci_start OK\n");
1845         return 0;
1846 }
1847
1848 static void rtl_pci_stop(struct ieee80211_hw *hw)
1849 {
1850         struct rtl_priv *rtlpriv = rtl_priv(hw);
1851         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1852         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1853         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1854         unsigned long flags;
1855         u8 RFInProgressTimeOut = 0;
1856
1857         if (rtlpriv->cfg->ops->get_btc_status())
1858                 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1859
1860         /*
1861          *should be before disable interrupt&adapter
1862          *and will do it immediately.
1863          */
1864         set_hal_stop(rtlhal);
1865
1866         rtlpci->driver_is_goingto_unload = true;
1867         rtlpriv->cfg->ops->disable_interrupt(hw);
1868         cancel_work_sync(&rtlpriv->works.lps_change_work);
1869
1870         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1871         while (ppsc->rfchange_inprogress) {
1872                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1873                 if (RFInProgressTimeOut > 100) {
1874                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1875                         break;
1876                 }
1877                 mdelay(1);
1878                 RFInProgressTimeOut++;
1879                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1880         }
1881         ppsc->rfchange_inprogress = true;
1882         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1883
1884         rtlpriv->cfg->ops->hw_disable(hw);
1885         /* some things are not needed if firmware not available */
1886         if (!rtlpriv->max_fw_size)
1887                 return;
1888         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1889
1890         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1891         ppsc->rfchange_inprogress = false;
1892         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1893
1894         rtl_pci_enable_aspm(hw);
1895 }
1896
1897 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1898                 struct ieee80211_hw *hw)
1899 {
1900         struct rtl_priv *rtlpriv = rtl_priv(hw);
1901         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1902         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1903         struct pci_dev *bridge_pdev = pdev->bus->self;
1904         u16 venderid;
1905         u16 deviceid;
1906         u8 revisionid;
1907         u16 irqline;
1908         u8 tmp;
1909
1910         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1911         venderid = pdev->vendor;
1912         deviceid = pdev->device;
1913         pci_read_config_byte(pdev, 0x8, &revisionid);
1914         pci_read_config_word(pdev, 0x3C, &irqline);
1915
1916         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1917          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1918          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1919          * the correct driver is r8192e_pci, thus this routine should
1920          * return false.
1921          */
1922         if (deviceid == RTL_PCI_8192SE_DID &&
1923             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1924                 return false;
1925
1926         if (deviceid == RTL_PCI_8192_DID ||
1927             deviceid == RTL_PCI_0044_DID ||
1928             deviceid == RTL_PCI_0047_DID ||
1929             deviceid == RTL_PCI_8192SE_DID ||
1930             deviceid == RTL_PCI_8174_DID ||
1931             deviceid == RTL_PCI_8173_DID ||
1932             deviceid == RTL_PCI_8172_DID ||
1933             deviceid == RTL_PCI_8171_DID) {
1934                 switch (revisionid) {
1935                 case RTL_PCI_REVISION_ID_8192PCIE:
1936                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1937                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1938                                  venderid, deviceid);
1939                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1940                         return false;
1941                 case RTL_PCI_REVISION_ID_8192SE:
1942                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1943                                  "8192SE is found - vid/did=%x/%x\n",
1944                                  venderid, deviceid);
1945                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1946                         break;
1947                 default:
1948                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1949                                  "Err: Unknown device - vid/did=%x/%x\n",
1950                                  venderid, deviceid);
1951                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1952                         break;
1953
1954                 }
1955         } else if (deviceid == RTL_PCI_8723AE_DID) {
1956                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1957                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1958                          "8723AE PCI-E is found - "
1959                          "vid/did=%x/%x\n", venderid, deviceid);
1960         } else if (deviceid == RTL_PCI_8192CET_DID ||
1961                    deviceid == RTL_PCI_8192CE_DID ||
1962                    deviceid == RTL_PCI_8191CE_DID ||
1963                    deviceid == RTL_PCI_8188CE_DID) {
1964                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1965                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1966                          "8192C PCI-E is found - vid/did=%x/%x\n",
1967                          venderid, deviceid);
1968         } else if (deviceid == RTL_PCI_8192DE_DID ||
1969                    deviceid == RTL_PCI_8192DE_DID2) {
1970                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1971                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1972                          "8192D PCI-E is found - vid/did=%x/%x\n",
1973                          venderid, deviceid);
1974         } else if (deviceid == RTL_PCI_8188EE_DID) {
1975                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1976                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1977                          "Find adapter, Hardware type is 8188EE\n");
1978         } else if (deviceid == RTL_PCI_8723BE_DID) {
1979                         rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1980                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1981                                  "Find adapter, Hardware type is 8723BE\n");
1982         } else if (deviceid == RTL_PCI_8192EE_DID) {
1983                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
1984                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1985                                  "Find adapter, Hardware type is 8192EE\n");
1986         } else if (deviceid == RTL_PCI_8821AE_DID) {
1987                         rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
1988                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1989                                  "Find adapter, Hardware type is 8821AE\n");
1990         } else if (deviceid == RTL_PCI_8812AE_DID) {
1991                         rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
1992                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1993                                  "Find adapter, Hardware type is 8812AE\n");
1994         } else {
1995                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1996                          "Err: Unknown device - vid/did=%x/%x\n",
1997                          venderid, deviceid);
1998
1999                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
2000         }
2001
2002         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2003                 if (revisionid == 0 || revisionid == 1) {
2004                         if (revisionid == 0) {
2005                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2006                                          "Find 92DE MAC0\n");
2007                                 rtlhal->interfaceindex = 0;
2008                         } else if (revisionid == 1) {
2009                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2010                                          "Find 92DE MAC1\n");
2011                                 rtlhal->interfaceindex = 1;
2012                         }
2013                 } else {
2014                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2015                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2016                                  venderid, deviceid, revisionid);
2017                         rtlhal->interfaceindex = 0;
2018                 }
2019         }
2020
2021         /* 92ee use new trx flow */
2022         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
2023                 rtlpriv->use_new_trx_flow = true;
2024         else
2025                 rtlpriv->use_new_trx_flow = false;
2026
2027         /*find bus info */
2028         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2029         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2030         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2031
2032         /*find bridge info */
2033         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2034         /* some ARM have no bridge_pdev and will crash here
2035          * so we should check if bridge_pdev is NULL
2036          */
2037         if (bridge_pdev) {
2038                 /*find bridge info if available */
2039                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2040                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2041                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2042                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2043                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2044                                          "Pci Bridge Vendor is found index: %d\n",
2045                                          tmp);
2046                                 break;
2047                         }
2048                 }
2049         }
2050
2051         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2052                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2053                 pcipriv->ndis_adapter.pcibridge_busnum =
2054                     bridge_pdev->bus->number;
2055                 pcipriv->ndis_adapter.pcibridge_devnum =
2056                     PCI_SLOT(bridge_pdev->devfn);
2057                 pcipriv->ndis_adapter.pcibridge_funcnum =
2058                     PCI_FUNC(bridge_pdev->devfn);
2059                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2060                     pci_pcie_cap(bridge_pdev);
2061                 pcipriv->ndis_adapter.num4bytes =
2062                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2063
2064                 rtl_pci_get_linkcontrol_field(hw);
2065
2066                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2067                     PCI_BRIDGE_VENDOR_AMD) {
2068                         pcipriv->ndis_adapter.amd_l1_patch =
2069                             rtl_pci_get_amd_l1_patch(hw);
2070                 }
2071         }
2072
2073         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2074                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2075                  pcipriv->ndis_adapter.busnumber,
2076                  pcipriv->ndis_adapter.devnumber,
2077                  pcipriv->ndis_adapter.funcnumber,
2078                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2079
2080         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2081                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2082                  pcipriv->ndis_adapter.pcibridge_busnum,
2083                  pcipriv->ndis_adapter.pcibridge_devnum,
2084                  pcipriv->ndis_adapter.pcibridge_funcnum,
2085                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2086                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2087                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2088                  pcipriv->ndis_adapter.amd_l1_patch);
2089
2090         rtl_pci_parse_configuration(pdev, hw);
2091         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2092
2093         return true;
2094 }
2095
2096 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2097 {
2098         struct rtl_priv *rtlpriv = rtl_priv(hw);
2099         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2100         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2101         int ret;
2102
2103         ret = pci_enable_msi(rtlpci->pdev);
2104         if (ret < 0)
2105                 return ret;
2106
2107         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2108                           IRQF_SHARED, KBUILD_MODNAME, hw);
2109         if (ret < 0) {
2110                 pci_disable_msi(rtlpci->pdev);
2111                 return ret;
2112         }
2113
2114         rtlpci->using_msi = true;
2115
2116         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2117                  "MSI Interrupt Mode!\n");
2118         return 0;
2119 }
2120
2121 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2122 {
2123         struct rtl_priv *rtlpriv = rtl_priv(hw);
2124         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2125         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2126         int ret;
2127
2128         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2129                           IRQF_SHARED, KBUILD_MODNAME, hw);
2130         if (ret < 0)
2131                 return ret;
2132
2133         rtlpci->using_msi = false;
2134         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2135                  "Pin-based Interrupt Mode!\n");
2136         return 0;
2137 }
2138
2139 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2140 {
2141         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2142         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2143         int ret;
2144
2145         if (rtlpci->msi_support) {
2146                 ret = rtl_pci_intr_mode_msi(hw);
2147                 if (ret < 0)
2148                         ret = rtl_pci_intr_mode_legacy(hw);
2149         } else {
2150                 ret = rtl_pci_intr_mode_legacy(hw);
2151         }
2152         return ret;
2153 }
2154
2155 int rtl_pci_probe(struct pci_dev *pdev,
2156                             const struct pci_device_id *id)
2157 {
2158         struct ieee80211_hw *hw = NULL;
2159
2160         struct rtl_priv *rtlpriv = NULL;
2161         struct rtl_pci_priv *pcipriv = NULL;
2162         struct rtl_pci *rtlpci;
2163         unsigned long pmem_start, pmem_len, pmem_flags;
2164         int err;
2165
2166         err = pci_enable_device(pdev);
2167         if (err) {
2168                 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
2169                           pci_name(pdev));
2170                 return err;
2171         }
2172
2173         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2174                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2175                         RT_ASSERT(false,
2176                                   "Unable to obtain 32bit DMA for consistent allocations\n");
2177                         err = -ENOMEM;
2178                         goto fail1;
2179                 }
2180         }
2181
2182         pci_set_master(pdev);
2183
2184         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2185                                 sizeof(struct rtl_priv), &rtl_ops);
2186         if (!hw) {
2187                 RT_ASSERT(false,
2188                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2189                 err = -ENOMEM;
2190                 goto fail1;
2191         }
2192
2193         SET_IEEE80211_DEV(hw, &pdev->dev);
2194         pci_set_drvdata(pdev, hw);
2195
2196         rtlpriv = hw->priv;
2197         rtlpriv->hw = hw;
2198         pcipriv = (void *)rtlpriv->priv;
2199         pcipriv->dev.pdev = pdev;
2200         init_completion(&rtlpriv->firmware_loading_complete);
2201         /*proximity init here*/
2202         rtlpriv->proximity.proxim_on = false;
2203
2204         pcipriv = (void *)rtlpriv->priv;
2205         pcipriv->dev.pdev = pdev;
2206
2207         /* init cfg & intf_ops */
2208         rtlpriv->rtlhal.interface = INTF_PCI;
2209         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2210         rtlpriv->intf_ops = &rtl_pci_ops;
2211         rtlpriv->glb_var = &rtl_global_var;
2212
2213         /*
2214          *init dbgp flags before all
2215          *other functions, because we will
2216          *use it in other funtions like
2217          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
2218          *you can not use these macro
2219          *before this
2220          */
2221         rtl_dbgp_flag_init(hw);
2222
2223         /* MEM map */
2224         err = pci_request_regions(pdev, KBUILD_MODNAME);
2225         if (err) {
2226                 RT_ASSERT(false, "Can't obtain PCI resources\n");
2227                 goto fail1;
2228         }
2229
2230         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2231         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2232         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2233
2234         /*shared mem start */
2235         rtlpriv->io.pci_mem_start =
2236                         (unsigned long)pci_iomap(pdev,
2237                         rtlpriv->cfg->bar_id, pmem_len);
2238         if (rtlpriv->io.pci_mem_start == 0) {
2239                 RT_ASSERT(false, "Can't map PCI mem\n");
2240                 err = -ENOMEM;
2241                 goto fail2;
2242         }
2243
2244         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2245                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2246                  pmem_start, pmem_len, pmem_flags,
2247                  rtlpriv->io.pci_mem_start);
2248
2249         /* Disable Clk Request */
2250         pci_write_config_byte(pdev, 0x81, 0);
2251         /* leave D3 mode */
2252         pci_write_config_byte(pdev, 0x44, 0);
2253         pci_write_config_byte(pdev, 0x04, 0x06);
2254         pci_write_config_byte(pdev, 0x04, 0x07);
2255
2256         /* find adapter */
2257         if (!_rtl_pci_find_adapter(pdev, hw)) {
2258                 err = -ENODEV;
2259                 goto fail3;
2260         }
2261
2262         /* Init IO handler */
2263         _rtl_pci_io_handler_init(&pdev->dev, hw);
2264
2265         /*like read eeprom and so on */
2266         rtlpriv->cfg->ops->read_eeprom_info(hw);
2267
2268         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2269                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
2270                 err = -ENODEV;
2271                 goto fail3;
2272         }
2273         rtlpriv->cfg->ops->init_sw_leds(hw);
2274
2275         /*aspm */
2276         rtl_pci_init_aspm(hw);
2277
2278         /* Init mac80211 sw */
2279         err = rtl_init_core(hw);
2280         if (err) {
2281                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2282                          "Can't allocate sw for mac80211\n");
2283                 goto fail3;
2284         }
2285
2286         /* Init PCI sw */
2287         err = rtl_pci_init(hw, pdev);
2288         if (err) {
2289                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
2290                 goto fail3;
2291         }
2292
2293         err = ieee80211_register_hw(hw);
2294         if (err) {
2295                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2296                          "Can't register mac80211 hw.\n");
2297                 err = -ENODEV;
2298                 goto fail3;
2299         }
2300         rtlpriv->mac80211.mac80211_registered = 1;
2301
2302         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
2303         if (err) {
2304                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2305                          "failed to create sysfs device attributes\n");
2306                 goto fail3;
2307         }
2308
2309         /*init rfkill */
2310         rtl_init_rfkill(hw);    /* Init PCI sw */
2311
2312         rtlpci = rtl_pcidev(pcipriv);
2313         err = rtl_pci_intr_mode_decide(hw);
2314         if (err) {
2315                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2316                          "%s: failed to register IRQ handler\n",
2317                          wiphy_name(hw->wiphy));
2318                 goto fail3;
2319         }
2320         rtlpci->irq_alloc = 1;
2321
2322         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2323         return 0;
2324
2325 fail3:
2326         pci_set_drvdata(pdev, NULL);
2327         rtl_deinit_core(hw);
2328
2329         if (rtlpriv->io.pci_mem_start != 0)
2330                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2331
2332 fail2:
2333         pci_release_regions(pdev);
2334         complete(&rtlpriv->firmware_loading_complete);
2335
2336 fail1:
2337         if (hw)
2338                 ieee80211_free_hw(hw);
2339         pci_disable_device(pdev);
2340
2341         return err;
2342
2343 }
2344 EXPORT_SYMBOL(rtl_pci_probe);
2345
2346 void rtl_pci_disconnect(struct pci_dev *pdev)
2347 {
2348         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2349         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2350         struct rtl_priv *rtlpriv = rtl_priv(hw);
2351         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2352         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2353
2354         /* just in case driver is removed before firmware callback */
2355         wait_for_completion(&rtlpriv->firmware_loading_complete);
2356         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2357
2358         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
2359
2360         /*ieee80211_unregister_hw will call ops_stop */
2361         if (rtlmac->mac80211_registered == 1) {
2362                 ieee80211_unregister_hw(hw);
2363                 rtlmac->mac80211_registered = 0;
2364         } else {
2365                 rtl_deinit_deferred_work(hw);
2366                 rtlpriv->intf_ops->adapter_stop(hw);
2367         }
2368         rtlpriv->cfg->ops->disable_interrupt(hw);
2369
2370         /*deinit rfkill */
2371         rtl_deinit_rfkill(hw);
2372
2373         rtl_pci_deinit(hw);
2374         rtl_deinit_core(hw);
2375         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2376
2377         if (rtlpci->irq_alloc) {
2378                 synchronize_irq(rtlpci->pdev->irq);
2379                 free_irq(rtlpci->pdev->irq, hw);
2380                 rtlpci->irq_alloc = 0;
2381         }
2382
2383         if (rtlpci->using_msi)
2384                 pci_disable_msi(rtlpci->pdev);
2385
2386         list_del(&rtlpriv->list);
2387         if (rtlpriv->io.pci_mem_start != 0) {
2388                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2389                 pci_release_regions(pdev);
2390         }
2391
2392         pci_disable_device(pdev);
2393
2394         rtl_pci_disable_aspm(hw);
2395
2396         pci_set_drvdata(pdev, NULL);
2397
2398         ieee80211_free_hw(hw);
2399 }
2400 EXPORT_SYMBOL(rtl_pci_disconnect);
2401
2402 #ifdef CONFIG_PM_SLEEP
2403 /***************************************
2404 kernel pci power state define:
2405 PCI_D0         ((pci_power_t __force) 0)
2406 PCI_D1         ((pci_power_t __force) 1)
2407 PCI_D2         ((pci_power_t __force) 2)
2408 PCI_D3hot      ((pci_power_t __force) 3)
2409 PCI_D3cold     ((pci_power_t __force) 4)
2410 PCI_UNKNOWN    ((pci_power_t __force) 5)
2411
2412 This function is called when system
2413 goes into suspend state mac80211 will
2414 call rtl_mac_stop() from the mac80211
2415 suspend function first, So there is
2416 no need to call hw_disable here.
2417 ****************************************/
2418 int rtl_pci_suspend(struct device *dev)
2419 {
2420         struct pci_dev *pdev = to_pci_dev(dev);
2421         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2422         struct rtl_priv *rtlpriv = rtl_priv(hw);
2423
2424         rtlpriv->cfg->ops->hw_suspend(hw);
2425         rtl_deinit_rfkill(hw);
2426
2427         return 0;
2428 }
2429 EXPORT_SYMBOL(rtl_pci_suspend);
2430
2431 int rtl_pci_resume(struct device *dev)
2432 {
2433         struct pci_dev *pdev = to_pci_dev(dev);
2434         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2435         struct rtl_priv *rtlpriv = rtl_priv(hw);
2436
2437         rtlpriv->cfg->ops->hw_resume(hw);
2438         rtl_init_rfkill(hw);
2439         return 0;
2440 }
2441 EXPORT_SYMBOL(rtl_pci_resume);
2442 #endif /* CONFIG_PM_SLEEP */
2443
2444 struct rtl_intf_ops rtl_pci_ops = {
2445         .read_efuse_byte = read_efuse_byte,
2446         .adapter_start = rtl_pci_start,
2447         .adapter_stop = rtl_pci_stop,
2448         .check_buddy_priv = rtl_pci_check_buddy_priv,
2449         .adapter_tx = rtl_pci_tx,
2450         .flush = rtl_pci_flush,
2451         .reset_trx_ring = rtl_pci_reset_trx_ring,
2452         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2453
2454         .disable_aspm = rtl_pci_disable_aspm,
2455         .enable_aspm = rtl_pci_enable_aspm,
2456 };