2 * PCIe AER software error injection support.
4 * Debuging PCIe AER code is quite difficult because it is hard to
5 * trigger various real hardware errors. Software based error
6 * injection can fake almost all kinds of errors with the help of a
7 * user space helper tool aer-inject, which can be gotten from:
8 * http://www.kernel.org/pub/linux/utils/pci/aer-inject/
10 * Copyright 2009 Intel Corporation.
11 * Huang Ying <ying.huang@intel.com>
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; version 2
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/miscdevice.h>
23 #include <linux/pci.h>
24 #include <linux/slab.h>
26 #include <linux/uaccess.h>
27 #include <linux/stddef.h>
30 /* Override the existing corrected and uncorrected error masks */
31 static bool aer_mask_override;
32 module_param(aer_mask_override, bool, 0);
34 struct aer_error_inj {
48 struct list_head list;
65 struct list_head list;
70 static LIST_HEAD(einjected);
72 static LIST_HEAD(pci_bus_ops_list);
74 /* Protect einjected and pci_bus_ops_list */
75 static DEFINE_SPINLOCK(inject_lock);
77 static void aer_error_init(struct aer_error *err, u32 domain,
78 unsigned int bus, unsigned int devfn,
81 INIT_LIST_HEAD(&err->list);
85 err->pos_cap_err = pos_cap_err;
88 /* inject_lock must be held before calling */
89 static struct aer_error *__find_aer_error(u32 domain, unsigned int bus,
92 struct aer_error *err;
94 list_for_each_entry(err, &einjected, list) {
95 if (domain == err->domain &&
103 /* inject_lock must be held before calling */
104 static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev)
106 int domain = pci_domain_nr(dev->bus);
109 return __find_aer_error(domain, dev->bus->number, dev->devfn);
112 /* inject_lock must be held before calling */
113 static struct pci_ops *__find_pci_bus_ops(struct pci_bus *bus)
115 struct pci_bus_ops *bus_ops;
117 list_for_each_entry(bus_ops, &pci_bus_ops_list, list) {
118 if (bus_ops->bus == bus)
124 static struct pci_bus_ops *pci_bus_ops_pop(void)
127 struct pci_bus_ops *bus_ops = NULL;
129 spin_lock_irqsave(&inject_lock, flags);
130 if (list_empty(&pci_bus_ops_list))
133 struct list_head *lh = pci_bus_ops_list.next;
135 bus_ops = list_entry(lh, struct pci_bus_ops, list);
137 spin_unlock_irqrestore(&inject_lock, flags);
141 static u32 *find_pci_config_dword(struct aer_error *err, int where,
147 if (err->pos_cap_err == -1)
150 switch (where - err->pos_cap_err) {
151 case PCI_ERR_UNCOR_STATUS:
152 target = &err->uncor_status;
155 case PCI_ERR_COR_STATUS:
156 target = &err->cor_status;
159 case PCI_ERR_HEADER_LOG:
160 target = &err->header_log0;
162 case PCI_ERR_HEADER_LOG+4:
163 target = &err->header_log1;
165 case PCI_ERR_HEADER_LOG+8:
166 target = &err->header_log2;
168 case PCI_ERR_HEADER_LOG+12:
169 target = &err->header_log3;
171 case PCI_ERR_ROOT_STATUS:
172 target = &err->root_status;
175 case PCI_ERR_ROOT_ERR_SRC:
176 target = &err->source_id;
184 static int aer_inj_read_config(struct pci_bus *bus, unsigned int devfn,
185 int where, int size, u32 *val)
188 struct aer_error *err;
191 struct pci_ops *my_ops;
195 spin_lock_irqsave(&inject_lock, flags);
196 if (size != sizeof(u32))
198 domain = pci_domain_nr(bus);
201 err = __find_aer_error(domain, bus->number, devfn);
205 sim = find_pci_config_dword(err, where, NULL);
208 spin_unlock_irqrestore(&inject_lock, flags);
212 ops = __find_pci_bus_ops(bus);
214 * pci_lock must already be held, so we can directly
215 * manipulate bus->ops. Many config access functions,
216 * including pci_generic_config_read() require the original
217 * bus->ops be installed to function, so temporarily put them
222 rv = ops->read(bus, devfn, where, size, val);
224 spin_unlock_irqrestore(&inject_lock, flags);
228 static int aer_inj_write_config(struct pci_bus *bus, unsigned int devfn,
229 int where, int size, u32 val)
232 struct aer_error *err;
236 struct pci_ops *my_ops;
240 spin_lock_irqsave(&inject_lock, flags);
241 if (size != sizeof(u32))
243 domain = pci_domain_nr(bus);
246 err = __find_aer_error(domain, bus->number, devfn);
250 sim = find_pci_config_dword(err, where, &rw1cs);
256 spin_unlock_irqrestore(&inject_lock, flags);
260 ops = __find_pci_bus_ops(bus);
262 * pci_lock must already be held, so we can directly
263 * manipulate bus->ops. Many config access functions,
264 * including pci_generic_config_write() require the original
265 * bus->ops be installed to function, so temporarily put them
270 rv = ops->write(bus, devfn, where, size, val);
272 spin_unlock_irqrestore(&inject_lock, flags);
276 static struct pci_ops aer_inj_pci_ops = {
277 .read = aer_inj_read_config,
278 .write = aer_inj_write_config,
281 static void pci_bus_ops_init(struct pci_bus_ops *bus_ops,
285 INIT_LIST_HEAD(&bus_ops->list);
290 static int pci_bus_set_aer_ops(struct pci_bus *bus)
293 struct pci_bus_ops *bus_ops;
296 bus_ops = kmalloc(sizeof(*bus_ops), GFP_KERNEL);
299 ops = pci_bus_set_ops(bus, &aer_inj_pci_ops);
300 spin_lock_irqsave(&inject_lock, flags);
301 if (ops == &aer_inj_pci_ops)
303 pci_bus_ops_init(bus_ops, bus, ops);
304 list_add(&bus_ops->list, &pci_bus_ops_list);
307 spin_unlock_irqrestore(&inject_lock, flags);
312 static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
315 if (!pci_is_pcie(dev))
317 if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
321 dev = dev->bus->self;
326 static int find_aer_device_iter(struct device *device, void *data)
328 struct pcie_device **result = data;
329 struct pcie_device *pcie_dev;
331 if (device->bus == &pcie_port_bus_type) {
332 pcie_dev = to_pcie_device(device);
333 if (pcie_dev->service & PCIE_PORT_SERVICE_AER) {
341 static int find_aer_device(struct pci_dev *dev, struct pcie_device **result)
343 return device_for_each_child(&dev->dev, result, find_aer_device_iter);
346 static int aer_inject(struct aer_error_inj *einj)
348 struct aer_error *err, *rperr;
349 struct aer_error *err_alloc = NULL, *rperr_alloc = NULL;
350 struct pci_dev *dev, *rpdev;
351 struct pcie_device *edev;
353 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
354 int pos_cap_err, rp_pos_cap_err;
355 u32 sever, cor_mask, uncor_mask, cor_mask_orig = 0, uncor_mask_orig = 0;
358 dev = pci_get_domain_bus_and_slot(einj->domain, einj->bus, devfn);
361 rpdev = pcie_find_root_port(dev);
367 pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
372 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
373 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask);
374 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
377 rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
378 if (!rp_pos_cap_err) {
383 err_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
388 rperr_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
394 if (aer_mask_override) {
395 cor_mask_orig = cor_mask;
396 cor_mask &= !(einj->cor_status);
397 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
400 uncor_mask_orig = uncor_mask;
401 uncor_mask &= !(einj->uncor_status);
402 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
406 spin_lock_irqsave(&inject_lock, flags);
408 err = __find_aer_error_by_dev(dev);
412 aer_error_init(err, einj->domain, einj->bus, devfn,
414 list_add(&err->list, &einjected);
416 err->uncor_status |= einj->uncor_status;
417 err->cor_status |= einj->cor_status;
418 err->header_log0 = einj->header_log0;
419 err->header_log1 = einj->header_log1;
420 err->header_log2 = einj->header_log2;
421 err->header_log3 = einj->header_log3;
423 if (!aer_mask_override && einj->cor_status &&
424 !(einj->cor_status & ~cor_mask)) {
426 printk(KERN_WARNING "The correctable error(s) is masked by device\n");
427 spin_unlock_irqrestore(&inject_lock, flags);
430 if (!aer_mask_override && einj->uncor_status &&
431 !(einj->uncor_status & ~uncor_mask)) {
433 printk(KERN_WARNING "The uncorrectable error(s) is masked by device\n");
434 spin_unlock_irqrestore(&inject_lock, flags);
438 rperr = __find_aer_error_by_dev(rpdev);
442 aer_error_init(rperr, pci_domain_nr(rpdev->bus),
443 rpdev->bus->number, rpdev->devfn,
445 list_add(&rperr->list, &einjected);
447 if (einj->cor_status) {
448 if (rperr->root_status & PCI_ERR_ROOT_COR_RCV)
449 rperr->root_status |= PCI_ERR_ROOT_MULTI_COR_RCV;
451 rperr->root_status |= PCI_ERR_ROOT_COR_RCV;
452 rperr->source_id &= 0xffff0000;
453 rperr->source_id |= (einj->bus << 8) | devfn;
455 if (einj->uncor_status) {
456 if (rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV)
457 rperr->root_status |= PCI_ERR_ROOT_MULTI_UNCOR_RCV;
458 if (sever & einj->uncor_status) {
459 rperr->root_status |= PCI_ERR_ROOT_FATAL_RCV;
460 if (!(rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV))
461 rperr->root_status |= PCI_ERR_ROOT_FIRST_FATAL;
463 rperr->root_status |= PCI_ERR_ROOT_NONFATAL_RCV;
464 rperr->root_status |= PCI_ERR_ROOT_UNCOR_RCV;
465 rperr->source_id &= 0x0000ffff;
466 rperr->source_id |= ((einj->bus << 8) | devfn) << 16;
468 spin_unlock_irqrestore(&inject_lock, flags);
470 if (aer_mask_override) {
471 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
473 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
477 ret = pci_bus_set_aer_ops(dev->bus);
480 ret = pci_bus_set_aer_ops(rpdev->bus);
484 if (find_aer_device(rpdev, &edev)) {
485 if (!get_service_data(edev)) {
486 printk(KERN_WARNING "AER service is not initialized\n");
500 static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf,
501 size_t usize, loff_t *off)
503 struct aer_error_inj einj;
506 if (!capable(CAP_SYS_ADMIN))
508 if (usize < offsetof(struct aer_error_inj, domain) ||
509 usize > sizeof(einj))
512 memset(&einj, 0, sizeof(einj));
513 if (copy_from_user(&einj, ubuf, usize))
516 ret = aer_inject(&einj);
517 return ret ? ret : usize;
520 static const struct file_operations aer_inject_fops = {
521 .write = aer_inject_write,
522 .owner = THIS_MODULE,
523 .llseek = noop_llseek,
526 static struct miscdevice aer_inject_device = {
527 .minor = MISC_DYNAMIC_MINOR,
528 .name = "aer_inject",
529 .fops = &aer_inject_fops,
532 static int __init aer_inject_init(void)
534 return misc_register(&aer_inject_device);
537 static void __exit aer_inject_exit(void)
539 struct aer_error *err, *err_next;
541 struct pci_bus_ops *bus_ops;
543 misc_deregister(&aer_inject_device);
545 while ((bus_ops = pci_bus_ops_pop())) {
546 pci_bus_set_ops(bus_ops->bus, bus_ops->ops);
550 spin_lock_irqsave(&inject_lock, flags);
551 list_for_each_entry_safe(err, err_next, &einjected, list) {
552 list_del(&err->list);
555 spin_unlock_irqrestore(&inject_lock, flags);
558 module_init(aer_inject_init);
559 module_exit(aer_inject_exit);
561 MODULE_DESCRIPTION("PCIe AER software error injector");
562 MODULE_LICENSE("GPL");