drivers/pinctrl/pinctrl-lpc18xx.c

   1 /*
   2  * Pinctrl driver for NXP LPC18xx/LPC43xx System Control Unit (SCU)
   3  *
   4  * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2. This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/bitops.h>
  12 #include <linux/clk.h>
  13 #include <linux/io.h>
  14 #include <linux/module.h>
  15 #include <linux/of.h>
  16 #include <linux/of_device.h>
  17 #include <linux/pinctrl/pinctrl.h>
  18 #include <linux/pinctrl/pinmux.h>
  19 #include <linux/pinctrl/pinconf-generic.h>
  20
  21 #include "core.h"
  22 #include "pinctrl-utils.h"
  23
  24 /* LPC18XX SCU analog function registers */
  25 #define LPC18XX_SCU_REG_ENAIO0          0xc88
  26 #define LPC18XX_SCU_REG_ENAIO1          0xc8c
  27 #define LPC18XX_SCU_REG_ENAIO2          0xc90
  28 #define LPC18XX_SCU_REG_ENAIO2_DAC      BIT(0)
  29
  30 /* LPC18XX SCU pin register definitions */
  31 #define LPC18XX_SCU_PIN_MODE_MASK       0x7
  32 #define LPC18XX_SCU_PIN_EPD             BIT(3)
  33 #define LPC18XX_SCU_PIN_EPUN            BIT(4)
  34 #define LPC18XX_SCU_PIN_EHS             BIT(5)
  35 #define LPC18XX_SCU_PIN_EZI             BIT(6)
  36 #define LPC18XX_SCU_PIN_ZIF             BIT(7)
  37 #define LPC18XX_SCU_PIN_EHD_MASK        0x300
  38 #define LPC18XX_SCU_PIN_EHD_POS         8
  39
  40 #define LPC18XX_SCU_I2C0_EFP            BIT(0)
  41 #define LPC18XX_SCU_I2C0_EHD            BIT(2)
  42 #define LPC18XX_SCU_I2C0_EZI            BIT(3)
  43 #define LPC18XX_SCU_I2C0_ZIF            BIT(7)
  44 #define LPC18XX_SCU_I2C0_SCL_SHIFT      0
  45 #define LPC18XX_SCU_I2C0_SDA_SHIFT      8
  46
  47 #define LPC18XX_SCU_FUNC_PER_PIN        8
  48
  49 /* LPC18xx pin types */
  50 enum {
  51         TYPE_ND,        /* Normal-drive */
  52         TYPE_HD,        /* High-drive */
  53         TYPE_HS,        /* High-speed */
  54         TYPE_I2C0,
  55         TYPE_USB1,
  56 };
  57
  58 /* LPC18xx pin functions */
  59 enum {
  60         FUNC_R,         /* Reserved */
  61         FUNC_ADC,
  62         FUNC_ADCTRIG,
  63         FUNC_CAN0,
  64         FUNC_CAN1,
  65         FUNC_CGU_OUT,
  66         FUNC_CLKIN,
  67         FUNC_CLKOUT,
  68         FUNC_CTIN,
  69         FUNC_CTOUT,
  70         FUNC_DAC,
  71         FUNC_EMC,
  72         FUNC_EMC_ALT,
  73         FUNC_ENET,
  74         FUNC_ENET_ALT,
  75         FUNC_GPIO,
  76         FUNC_I2C0,
  77         FUNC_I2C1,
  78         FUNC_I2S0_RX_MCLK,
  79         FUNC_I2S0_RX_SCK,
  80         FUNC_I2S0_RX_SDA,
  81         FUNC_I2S0_RX_WS,
  82         FUNC_I2S0_TX_MCLK,
  83         FUNC_I2S0_TX_SCK,
  84         FUNC_I2S0_TX_SDA,
  85         FUNC_I2S0_TX_WS,
  86         FUNC_I2S1,
  87         FUNC_LCD,
  88         FUNC_LCD_ALT,
  89         FUNC_MCTRL,
  90         FUNC_NMI,
  91         FUNC_QEI,
  92         FUNC_SDMMC,
  93         FUNC_SGPIO,
  94         FUNC_SPI,
  95         FUNC_SPIFI,
  96         FUNC_SSP0,
  97         FUNC_SSP0_ALT,
  98         FUNC_SSP1,
  99         FUNC_TIMER0,
 100         FUNC_TIMER1,
 101         FUNC_TIMER2,
 102         FUNC_TIMER3,
 103         FUNC_TRACE,
 104         FUNC_UART0,
 105         FUNC_UART1,
 106         FUNC_UART2,
 107         FUNC_UART3,
 108         FUNC_USB0,
 109         FUNC_USB1,
 110         FUNC_MAX
 111 };
 112
 113 static const char *const lpc18xx_function_names[] = {
 114         [FUNC_R]                = "reserved",
 115         [FUNC_ADC]              = "adc",
 116         [FUNC_ADCTRIG]          = "adctrig",
 117         [FUNC_CAN0]             = "can0",
 118         [FUNC_CAN1]             = "can1",
 119         [FUNC_CGU_OUT]          = "cgu_out",
 120         [FUNC_CLKIN]            = "clkin",
 121         [FUNC_CLKOUT]           = "clkout",
 122         [FUNC_CTIN]             = "ctin",
 123         [FUNC_CTOUT]            = "ctout",
 124         [FUNC_DAC]              = "dac",
 125         [FUNC_EMC]              = "emc",
 126         [FUNC_EMC_ALT]          = "emc_alt",
 127         [FUNC_ENET]             = "enet",
 128         [FUNC_ENET_ALT]         = "enet_alt",
 129         [FUNC_GPIO]             = "gpio",
 130         [FUNC_I2C0]             = "i2c0",
 131         [FUNC_I2C1]             = "i2c1",
 132         [FUNC_I2S0_RX_MCLK]     = "i2s0_rx_mclk",
 133         [FUNC_I2S0_RX_SCK]      = "i2s0_rx_sck",
 134         [FUNC_I2S0_RX_SDA]      = "i2s0_rx_sda",
 135         [FUNC_I2S0_RX_WS]       = "i2s0_rx_ws",
 136         [FUNC_I2S0_TX_MCLK]     = "i2s0_tx_mclk",
 137         [FUNC_I2S0_TX_SCK]      = "i2s0_tx_sck",
 138         [FUNC_I2S0_TX_SDA]      = "i2s0_tx_sda",
 139         [FUNC_I2S0_TX_WS]       = "i2s0_tx_ws",
 140         [FUNC_I2S1]             = "i2s1",
 141         [FUNC_LCD]              = "lcd",
 142         [FUNC_LCD_ALT]          = "lcd_alt",
 143         [FUNC_MCTRL]            = "mctrl",
 144         [FUNC_NMI]              = "nmi",
 145         [FUNC_QEI]              = "qei",
 146         [FUNC_SDMMC]            = "sdmmc",
 147         [FUNC_SGPIO]            = "sgpio",
 148         [FUNC_SPI]              = "spi",
 149         [FUNC_SPIFI]            = "spifi",
 150         [FUNC_SSP0]             = "ssp0",
 151         [FUNC_SSP0_ALT]         = "ssp0_alt",
 152         [FUNC_SSP1]             = "ssp1",
 153         [FUNC_TIMER0]           = "timer0",
 154         [FUNC_TIMER1]           = "timer1",
 155         [FUNC_TIMER2]           = "timer2",
 156         [FUNC_TIMER3]           = "timer3",
 157         [FUNC_TRACE]            = "trace",
 158         [FUNC_UART0]            = "uart0",
 159         [FUNC_UART1]            = "uart1",
 160         [FUNC_UART2]            = "uart2",
 161         [FUNC_UART3]            = "uart3",
 162         [FUNC_USB0]             = "usb0",
 163         [FUNC_USB1]             = "usb1",
 164 };
 165
 166 struct lpc18xx_pmx_func {
 167         const char **groups;
 168         unsigned ngroups;
 169 };
 170
 171 struct lpc18xx_scu_data {
 172         struct pinctrl_dev *pctl;
 173         void __iomem *base;
 174         struct clk *clk;
 175         struct lpc18xx_pmx_func func[FUNC_MAX];
 176 };
 177
 178 struct lpc18xx_pin_caps {
 179         unsigned int offset;
 180         unsigned char functions[LPC18XX_SCU_FUNC_PER_PIN];
 181         unsigned char analog;
 182         unsigned char type;
 183 };
 184
 185 /* Analog pins are required to have both bias and input disabled */
 186 #define LPC18XX_SCU_ANALOG_PIN_CFG      0x10
 187
 188 /* Macros to maniupluate analog member in lpc18xx_pin_caps */
 189 #define LPC18XX_ANALOG_PIN              BIT(7)
 190 #define LPC18XX_ANALOG_ADC(a)           ((a >> 5) & 0x3)
 191 #define LPC18XX_ANALOG_BIT_MASK         0x1f
 192 #define ADC0                            (LPC18XX_ANALOG_PIN | (0x00 << 5))
 193 #define ADC1                            (LPC18XX_ANALOG_PIN | (0x01 << 5))
 194 #define DAC                             LPC18XX_ANALOG_PIN
 195
 196 #define LPC_P(port, pin, f0, f1, f2, f3, f4, f5, f6, f7, a, t)  \
 197 static struct lpc18xx_pin_caps lpc18xx_pin_p##port##_##pin = {  \
 198         .offset = 0x##port * 32 * 4 + pin * 4,                  \
 199         .functions = {                                          \
 200                         FUNC_##f0, FUNC_##f1, FUNC_##f2,        \
 201                         FUNC_##f3, FUNC_##f4, FUNC_##f5,        \
 202                         FUNC_##f6, FUNC_##f7,                   \
 203         },                                                      \
 204         .analog = a,                                            \
 205         .type = TYPE_##t,                                       \
 206 }
 207
 208 #define LPC_N(pname, off, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \
 209 static struct lpc18xx_pin_caps lpc18xx_pin_##pname = {          \
 210         .offset = off,                                          \
 211         .functions = {                                          \
 212                         FUNC_##f0, FUNC_##f1, FUNC_##f2,        \
 213                         FUNC_##f3, FUNC_##f4, FUNC_##f5,        \
 214                         FUNC_##f6, FUNC_##f7,                   \
 215         },                                                      \
 216         .analog = a,                                            \
 217         .type = TYPE_##t,                                       \
 218 }
 219
 220
 221 /* Pinmuxing table taken from data sheet */
 222 /*    Pin    FUNC0  FUNC1  FUNC2  FUNC3   FUNC4   FUNC5   FUNC6    FUNC7 ANALOG TYPE */
 223 LPC_P(0,0,   GPIO,  SSP1,  ENET,  SGPIO,      R,      R, I2S0_TX_WS,I2S1,     0, ND);
 224 LPC_P(0,1,   GPIO,  SSP1,ENET_ALT,SGPIO,      R,      R,   ENET,    I2S1,     0, ND);
 225 LPC_P(1,0,   GPIO,  CTIN,   EMC,      R,      R,   SSP0,  SGPIO,       R,     0, ND);
 226 LPC_P(1,1,   GPIO, CTOUT,   EMC,  SGPIO,      R,   SSP0,      R,       R,     0, ND);
 227 LPC_P(1,2,   GPIO, CTOUT,   EMC,  SGPIO,      R,   SSP0,      R,       R,     0, ND);
 228 LPC_P(1,3,   GPIO, CTOUT, SGPIO,    EMC,   USB0,   SSP1,      R,   SDMMC,     0, ND);
 229 LPC_P(1,4,   GPIO, CTOUT, SGPIO,    EMC,   USB0,   SSP1,      R,   SDMMC,     0, ND);
 230 LPC_P(1,5,   GPIO, CTOUT,     R,    EMC,   USB0,   SSP1,  SGPIO,   SDMMC,     0, ND);
 231 LPC_P(1,6,   GPIO,  CTIN,     R,    EMC,      R,      R,  SGPIO,   SDMMC,     0, ND);
 232 LPC_P(1,7,   GPIO, UART1, CTOUT,    EMC,   USB0,      R,      R,       R,     0, ND);
 233 LPC_P(1,8,   GPIO, UART1, CTOUT,    EMC,      R,      R,      R,   SDMMC,     0, ND);
 234 LPC_P(1,9,   GPIO, UART1, CTOUT,    EMC,      R,      R,      R,   SDMMC,     0, ND);
 235 LPC_P(1,10,  GPIO, UART1, CTOUT,    EMC,      R,      R,      R,   SDMMC,     0, ND);
 236 LPC_P(1,11,  GPIO, UART1, CTOUT,    EMC,      R,      R,      R,   SDMMC,     0, ND);
 237 LPC_P(1,12,  GPIO, UART1,     R,    EMC, TIMER0,      R,  SGPIO,   SDMMC,     0, ND);
 238 LPC_P(1,13,  GPIO, UART1,     R,    EMC, TIMER0,      R,  SGPIO,   SDMMC,     0, ND);
 239 LPC_P(1,14,  GPIO, UART1,     R,    EMC, TIMER0,      R,  SGPIO,       R,     0, ND);
 240 LPC_P(1,15,  GPIO, UART2, SGPIO,   ENET, TIMER0,      R,      R,       R,     0, ND);
 241 LPC_P(1,16,  GPIO, UART2, SGPIO,ENET_ALT,TIMER0,      R,      R,    ENET,     0, ND);
 242 LPC_P(1,17,  GPIO, UART2,     R,   ENET, TIMER0,   CAN1,  SGPIO,       R,     0, HD);
 243 LPC_P(1,18,  GPIO, UART2,     R,   ENET, TIMER0,   CAN1,  SGPIO,       R,     0, ND);
 244 LPC_P(1,19,  ENET,  SSP1,     R,      R, CLKOUT,      R, I2S0_RX_MCLK,I2S1,   0, ND);
 245 LPC_P(1,20,  GPIO,  SSP1,     R,   ENET, TIMER0,      R,  SGPIO,       R,     0, ND);
 246 LPC_P(2,0,  SGPIO, UART0,   EMC,   USB0,   GPIO,      R, TIMER3,    ENET,     0, ND);
 247 LPC_P(2,1,  SGPIO, UART0,   EMC,   USB0,   GPIO,      R, TIMER3,       R,     0, ND);
 248 LPC_P(2,2,  SGPIO, UART0,   EMC,   USB0,   GPIO,   CTIN, TIMER3,       R,     0, ND);
 249 LPC_P(2,3,  SGPIO,  I2C1, UART3,   CTIN,   GPIO,      R, TIMER3,    USB0,     0, HD);
 250 LPC_P(2,4,  SGPIO,  I2C1, UART3,   CTIN,   GPIO,      R, TIMER3,    USB0,     0, HD);
 251 LPC_P(2,5,  SGPIO,  CTIN,  USB1, ADCTRIG,  GPIO,      R, TIMER3,    USB0,     0, HD);
 252 LPC_P(2,6,  SGPIO, UART0,   EMC,   USB0,   GPIO,   CTIN, TIMER3,       R,     0, ND);
 253 LPC_P(2,7,   GPIO, CTOUT, UART3,    EMC,      R,      R, TIMER3,       R,     0, ND);
 254 LPC_P(2,8,  SGPIO, CTOUT, UART3,    EMC,   GPIO,      R,      R,       R,     0, ND);
 255 LPC_P(2,9,   GPIO, CTOUT, UART3,    EMC,      R,      R,      R,       R,     0, ND);
 256 LPC_P(2,10,  GPIO, CTOUT, UART2,    EMC,      R,      R,      R,       R,     0, ND);
 257 LPC_P(2,11,  GPIO, CTOUT, UART2,    EMC,      R,      R,      R,       R,     0, ND);
 258 LPC_P(2,12,  GPIO, CTOUT,     R,    EMC,      R,      R,      R,   UART2,     0, ND);
 259 LPC_P(2,13,  GPIO,  CTIN,     R,    EMC,      R,      R,      R,   UART2,     0, ND);
 260 LPC_P(3,0,  I2S0_RX_SCK, I2S0_RX_MCLK, I2S0_TX_SCK, I2S0_TX_MCLK,SSP0,R,R,R,  0, ND);
 261 LPC_P(3,1,  I2S0_TX_WS, I2S0_RX_WS,CAN0,USB1,GPIO,    R,    LCD,       R,     0, ND);
 262 LPC_P(3,2,  I2S0_TX_SDA, I2S0_RX_SDA,CAN0,USB1,GPIO,  R,    LCD,      R,      0, ND);
 263 LPC_P(3,3,      R,   SPI,  SSP0,  SPIFI, CGU_OUT,R, I2S0_TX_MCLK,  I2S1,      0, HS);
 264 LPC_P(3,4,   GPIO,     R,     R,  SPIFI,  UART1, I2S0_TX_WS, I2S1,  LCD,      0, ND);
 265 LPC_P(3,5,   GPIO,     R,     R,  SPIFI,  UART1, I2S0_TX_SDA,I2S1,  LCD,      0, ND);
 266 LPC_P(3,6,   GPIO,   SPI,  SSP0,  SPIFI,      R,  SSP0_ALT,   R,      R,      0, ND);
 267 LPC_P(3,7,      R,   SPI,  SSP0,  SPIFI,   GPIO,  SSP0_ALT,   R,      R,      0, ND);
 268 LPC_P(3,8,      R,   SPI,  SSP0,  SPIFI,   GPIO,  SSP0_ALT,   R,      R,      0, ND);
 269 LPC_P(4,0,   GPIO, MCTRL,   NMI,      R,      R,    LCD,  UART3,      R,      0, ND);
 270 LPC_P(4,1,   GPIO, CTOUT,   LCD,      R,      R, LCD_ALT, UART3,   ENET, ADC0|1, ND);
 271 LPC_P(4,2,   GPIO, CTOUT,   LCD,      R,      R, LCD_ALT, UART3,  SGPIO,      0, ND);
 272 LPC_P(4,3,   GPIO, CTOUT,   LCD,      R,      R, LCD_ALT, UART3,  SGPIO, ADC0|0, ND);
 273 LPC_P(4,4,   GPIO, CTOUT,   LCD,      R,      R, LCD_ALT, UART3,  SGPIO,    DAC, ND);
 274 LPC_P(4,5,   GPIO, CTOUT,   LCD,      R,      R,      R,      R,  SGPIO,      0, ND);
 275 LPC_P(4,6,   GPIO, CTOUT,   LCD,      R,      R,      R,      R,  SGPIO,      0, ND);
 276 LPC_P(4,7,    LCD, CLKIN,     R,      R,      R,      R,   I2S1,I2S0_TX_SCK,  0, ND);
 277 LPC_P(4,8,      R,  CTIN,   LCD,      R,   GPIO, LCD_ALT,  CAN1,  SGPIO,      0, ND);
 278 LPC_P(4,9,      R,  CTIN,   LCD,      R,   GPIO, LCD_ALT,  CAN1,  SGPIO,      0, ND);
 279 LPC_P(4,10,     R,  CTIN,   LCD,      R,   GPIO, LCD_ALT,     R,  SGPIO,      0, ND);
 280 LPC_P(5,0,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
 281 LPC_P(5,1,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
 282 LPC_P(5,2,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
 283 LPC_P(5,3,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
 284 LPC_P(5,4,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
 285 LPC_P(5,5,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
 286 LPC_P(5,6,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
 287 LPC_P(5,7,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
 288 LPC_P(6,0,      R, I2S0_RX_MCLK,R,    R, I2S0_RX_SCK, R,      R,      R,      0, ND);
 289 LPC_P(6,1,   GPIO,   EMC, UART0, I2S0_RX_WS,  R, TIMER2,      R,      R,      0, ND);
 290 LPC_P(6,2,   GPIO,   EMC, UART0, I2S0_RX_SDA, R, TIMER2,      R,      R,      0, ND);
 291 LPC_P(6,3,   GPIO,  USB0, SGPIO,    EMC,      R, TIMER2,      R,      R,      0, ND);
 292 LPC_P(6,4,   GPIO,  CTIN, UART0,    EMC,      R,      R,      R,      R,      0, ND);
 293 LPC_P(6,5,   GPIO, CTOUT, UART0,    EMC,      R,      R,      R,      R,      0, ND);
 294 LPC_P(6,6,   GPIO,   EMC, SGPIO,   USB0,      R, TIMER2,      R,      R,      0, ND);
 295 LPC_P(6,7,      R,   EMC, SGPIO,   USB0,   GPIO, TIMER2,      R,      R,      0, ND);
 296 LPC_P(6,8,      R,   EMC, SGPIO,   USB0,   GPIO, TIMER2,      R,      R,      0, ND);
 297 LPC_P(6,9,   GPIO,     R,     R,    EMC,      R, TIMER2,      R,      R,      0, ND);
 298 LPC_P(6,10,  GPIO, MCTRL,     R,    EMC,      R,      R,      R,      R,      0, ND);
 299 LPC_P(6,11,  GPIO,     R,     R,    EMC,      R, TIMER2,      R,      R,      0, ND);
 300 LPC_P(6,12,  GPIO, CTOUT,     R,    EMC,      R,      R,      R,      R,      0, ND);
 301 LPC_P(7,0,   GPIO, CTOUT,     R,    LCD,      R,      R,      R,  SGPIO,      0, ND);
 302 LPC_P(7,1,   GPIO, CTOUT,I2S0_TX_WS,LCD,LCD_ALT,      R,  UART2,  SGPIO,      0, ND);
 303 LPC_P(7,2,   GPIO, CTIN,I2S0_TX_SDA,LCD,LCD_ALT,      R,  UART2,  SGPIO,      0, ND);
 304 LPC_P(7,3,   GPIO, CTIN,      R,    LCD,LCD_ALT,      R,      R,      R,      0, ND);
 305 LPC_P(7,4,   GPIO, CTOUT,     R,    LCD,LCD_ALT,  TRACE,      R,      R, ADC0|4, ND);
 306 LPC_P(7,5,   GPIO, CTOUT,     R,    LCD,LCD_ALT,  TRACE,      R,      R, ADC0|3, ND);
 307 LPC_P(7,6,   GPIO, CTOUT,     R,    LCD,      R,  TRACE,      R,      R,      0, ND);
 308 LPC_P(7,7,   GPIO, CTOUT,     R,    LCD,      R,  TRACE,   ENET,  SGPIO, ADC1|6, ND);
 309 LPC_P(8,0,   GPIO,  USB0,     R,  MCTRL,  SGPIO,      R,      R, TIMER0,      0, HD);
 310 LPC_P(8,1,   GPIO,  USB0,     R,  MCTRL,  SGPIO,      R,      R, TIMER0,      0, HD);
 311 LPC_P(8,2,   GPIO,  USB0,     R,  MCTRL,  SGPIO,      R,      R, TIMER0,      0, HD);
 312 LPC_P(8,3,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
 313 LPC_P(8,4,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
 314 LPC_P(8,5,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
 315 LPC_P(8,6,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
 316 LPC_P(8,7,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
 317 LPC_P(8,8,      R,  USB1,     R,      R,      R,      R,CGU_OUT,   I2S1,      0, ND);
 318 LPC_P(9,0,   GPIO, MCTRL,     R,      R,      R,   ENET,  SGPIO,   SSP0,      0, ND);
 319 LPC_P(9,1,   GPIO, MCTRL,     R,      R, I2S0_TX_WS,ENET, SGPIO,   SSP0,      0, ND);
 320 LPC_P(9,2,   GPIO, MCTRL,     R,      R, I2S0_TX_SDA,ENET,SGPIO,   SSP0,      0, ND);
 321 LPC_P(9,3,   GPIO, MCTRL,  USB1,      R,      R,   ENET,  SGPIO,  UART3,      0, ND);
 322 LPC_P(9,4,      R, MCTRL,  USB1,      R,   GPIO,   ENET,  SGPIO,  UART3,      0, ND);
 323 LPC_P(9,5,      R, MCTRL,  USB1,      R,   GPIO,   ENET,  SGPIO,  UART0,      0, ND);
 324 LPC_P(9,6,   GPIO, MCTRL,  USB1,      R,      R,   ENET,  SGPIO,  UART0,      0, ND);
 325 LPC_P(a,0,      R,     R,     R,      R,      R,   I2S1, CGU_OUT,     R,      0, ND);
 326 LPC_P(a,1,   GPIO,   QEI,     R,  UART2,      R,      R,      R,      R,      0, HD);
 327 LPC_P(a,2,   GPIO,   QEI,     R,  UART2,      R,      R,      R,      R,      0, HD);
 328 LPC_P(a,3,   GPIO,   QEI,     R,      R,      R,      R,      R,      R,      0, HD);
 329 LPC_P(a,4,      R, CTOUT,     R,    EMC,   GPIO,      R,      R,      R,      0, ND);
 330 LPC_P(b,0,      R, CTOUT,   LCD,      R,   GPIO,      R,      R,      R,      0, ND);
 331 LPC_P(b,1,      R,  USB1,   LCD,      R,   GPIO,  CTOUT,      R,      R,      0, ND);
 332 LPC_P(b,2,      R,  USB1,   LCD,      R,   GPIO,  CTOUT,      R,      R,      0, ND);
 333 LPC_P(b,3,      R,  USB1,   LCD,      R,   GPIO,  CTOUT,      R,      R,      0, ND);
 334 LPC_P(b,4,      R,  USB1,   LCD,      R,   GPIO,   CTIN,      R,      R,      0, ND);
 335 LPC_P(b,5,      R,  USB1,   LCD,      R,   GPIO,   CTIN, LCD_ALT,     R,      0, ND);
 336 LPC_P(b,6,      R,  USB1,   LCD,      R,   GPIO,   CTIN, LCD_ALT,     R, ADC0|6, ND);
 337 LPC_P(c,0,      R,  USB1,     R,   ENET,    LCD,      R,      R,  SDMMC, ADC1|1, ND);
 338 LPC_P(c,1,   USB1,     R, UART1,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
 339 LPC_P(c,2,   USB1,     R, UART1,   ENET,   GPIO,      R,      R,  SDMMC,      0, ND);
 340 LPC_P(c,3,   USB1,     R, UART1,   ENET,   GPIO,      R,      R,  SDMMC, ADC1|0, ND);
 341 LPC_P(c,4,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
 342 LPC_P(c,5,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
 343 LPC_P(c,6,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
 344 LPC_P(c,7,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
 345 LPC_P(c,8,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
 346 LPC_P(c,9,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
 347 LPC_P(c,10,     R,  USB1, UART1,      R,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
 348 LPC_P(c,11,     R,  USB1, UART1,      R,   GPIO,      R,      R,  SDMMC,      0, ND);
 349 LPC_P(c,12,     R,     R, UART1,      R,   GPIO,  SGPIO, I2S0_TX_SDA,SDMMC,   0, ND);
 350 LPC_P(c,13,     R,     R, UART1,      R,   GPIO,  SGPIO, I2S0_TX_WS, SDMMC,   0, ND);
 351 LPC_P(c,14,     R,     R, UART1,      R,   GPIO,  SGPIO,   ENET,  SDMMC,      0, ND);
 352 LPC_P(d,0,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
 353 LPC_P(d,1,      R,     R,   EMC,      R,   GPIO,  SDMMC,      R,  SGPIO,      0, ND);
 354 LPC_P(d,2,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
 355 LPC_P(d,3,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
 356 LPC_P(d,4,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
 357 LPC_P(d,5,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
 358 LPC_P(d,6,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
 359 LPC_P(d,7,      R,  CTIN,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
 360 LPC_P(d,8,      R,  CTIN,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
 361 LPC_P(d,9,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
 362 LPC_P(d,10,     R,  CTIN,   EMC,      R,   GPIO,      R,      R,      R,      0, ND);
 363 LPC_P(d,11,     R,     R,   EMC,      R,   GPIO,   USB1,  CTOUT,      R,      0, ND);
 364 LPC_P(d,12,     R,     R,   EMC,      R,   GPIO,      R,  CTOUT,      R,      0, ND);
 365 LPC_P(d,13,     R,  CTIN,   EMC,      R,   GPIO,      R,  CTOUT,      R,      0, ND);
 366 LPC_P(d,14,     R,     R,   EMC,      R,   GPIO,      R,  CTOUT,      R,      0, ND);
 367 LPC_P(d,15,     R,     R,   EMC,      R,   GPIO,  SDMMC,  CTOUT,      R,      0, ND);
 368 LPC_P(d,16,     R,     R,   EMC,      R,   GPIO,  SDMMC,  CTOUT,      R,      0, ND);
 369 LPC_P(e,0,      R,     R,     R,    EMC,   GPIO,   CAN1,      R,      R,      0, ND);
 370 LPC_P(e,1,      R,     R,     R,    EMC,   GPIO,   CAN1,      R,      R,      0, ND);
 371 LPC_P(e,2,ADCTRIG,  CAN0,     R,    EMC,   GPIO,      R,      R,      R,      0, ND);
 372 LPC_P(e,3,      R,  CAN0,ADCTRIG,   EMC,   GPIO,      R,      R,      R,      0, ND);
 373 LPC_P(e,4,      R,   NMI,     R,    EMC,   GPIO,      R,      R,      R,      0, ND);
 374 LPC_P(e,5,      R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 375 LPC_P(e,6,      R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 376 LPC_P(e,7,      R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 377 LPC_P(e,8,      R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 378 LPC_P(e,9,      R,  CTIN, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 379 LPC_P(e,10,     R,  CTIN, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 380 LPC_P(e,11,     R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 381 LPC_P(e,12,     R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 382 LPC_P(e,13,     R, CTOUT,  I2C1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 383 LPC_P(e,14,     R,     R,     R,    EMC,   GPIO,      R,      R,      R,      0, ND);
 384 LPC_P(e,15,     R, CTOUT,  I2C1,    EMC,   GPIO,      R,      R,      R,      0, ND);
 385 LPC_P(f,0,   SSP0, CLKIN,     R,      R,      R,      R,      R,   I2S1,      0, ND);
 386 LPC_P(f,1,      R,     R,  SSP0,      R,   GPIO,      R,  SGPIO,      R,      0, ND);
 387 LPC_P(f,2,      R, UART3,  SSP0,      R,   GPIO,      R,  SGPIO,      R,      0, ND);
 388 LPC_P(f,3,      R, UART3,  SSP0,      R,   GPIO,      R,  SGPIO,      R,      0, ND);
 389 LPC_P(f,4,   SSP1, CLKIN, TRACE,      R,      R, R, I2S0_TX_MCLK,I2S0_RX_SCK, 0, ND);
 390 LPC_P(f,5,      R, UART3,  SSP1,  TRACE,   GPIO,      R,  SGPIO,      R, ADC1|4, ND);
 391 LPC_P(f,6,      R, UART3,  SSP1,  TRACE,   GPIO,      R,  SGPIO,   I2S1, ADC1|3, ND);
 392 LPC_P(f,7,      R, UART3,  SSP1,  TRACE,   GPIO,      R,  SGPIO,   I2S1, ADC1|7, ND);
 393 LPC_P(f,8,      R, UART0,  CTIN,  TRACE,   GPIO,      R,  SGPIO,      R, ADC0|2, ND);
 394 LPC_P(f,9,      R, UART0, CTOUT,      R,   GPIO,      R,  SGPIO,      R, ADC1|2, ND);
 395 LPC_P(f,10,     R, UART0,     R,      R,   GPIO,      R,  SDMMC,      R, ADC0|5, ND);
 396 LPC_P(f,11,     R, UART0,     R,      R,   GPIO,      R,  SDMMC,      R, ADC1|5, ND);
 397
 398 /*    Pin      Offset FUNC0  FUNC1  FUNC2  FUNC3  FUNC4    FUNC5   FUNC6      FUNC7 ANALOG TYPE */
 399 LPC_N(clk0,     0xc00, EMC, CLKOUT,   R,     R,  SDMMC,   EMC_ALT,  SSP1,      ENET,  0, HS);
 400 LPC_N(clk1,     0xc04, EMC, CLKOUT,   R,     R,      R,   CGU_OUT,   R,        I2S1,  0, HS);
 401 LPC_N(clk2,     0xc08, EMC, CLKOUT,   R,     R,  SDMMC,   EMC_ALT,I2S0_TX_MCLK,I2S1,  0, HS);
 402 LPC_N(clk3,     0xc0c, EMC, CLKOUT,   R,     R,      R,   CGU_OUT,   R,        I2S1,  0, HS);
 403 LPC_N(usb1_dm,  0xc80, R,      R,     R,     R,      R,      R,      R,          R,   0, USB1);
 404 LPC_N(usb1_dp,  0xc80, R,      R,     R,     R,      R,      R,      R,          R,   0, USB1);
 405 LPC_N(i2c0_scl, 0xc84, R,      R,     R,     R,      R,      R,      R,          R,   0, I2C0);
 406 LPC_N(i2c0_sda, 0xc84, R,      R,     R,     R,      R,      R,      R,          R,   0, I2C0);
 407
 408 #define LPC18XX_PIN_P(port, pin) {                      \
 409         .number = 0x##port * 32 + pin,                  \
 410         .name = "p"#port"_"#pin,                        \
 411         .drv_data = &lpc18xx_pin_p##port##_##pin        \
 412 }
 413
 414 /* Pin numbers for special pins */
 415 enum {
 416         PIN_CLK0 = 600,
 417         PIN_CLK1,
 418         PIN_CLK2,
 419         PIN_CLK3,
 420         PIN_USB1_DM,
 421         PIN_USB1_DP,
 422         PIN_I2C0_SCL,
 423         PIN_I2C0_SDA,
 424 };
 425
 426 #define LPC18XX_PIN(pname, n) {                         \
 427         .number = n,                                    \
 428         .name = #pname,                                 \
 429         .drv_data = &lpc18xx_pin_##pname                \
 430 }
 431
 432 static const struct pinctrl_pin_desc lpc18xx_pins[] = {
 433         LPC18XX_PIN_P(0,0),
 434         LPC18XX_PIN_P(0,1),
 435         LPC18XX_PIN_P(1,0),
 436         LPC18XX_PIN_P(1,1),
 437         LPC18XX_PIN_P(1,2),
 438         LPC18XX_PIN_P(1,3),
 439         LPC18XX_PIN_P(1,4),
 440         LPC18XX_PIN_P(1,5),
 441         LPC18XX_PIN_P(1,6),
 442         LPC18XX_PIN_P(1,7),
 443         LPC18XX_PIN_P(1,8),
 444         LPC18XX_PIN_P(1,9),
 445         LPC18XX_PIN_P(1,10),
 446         LPC18XX_PIN_P(1,11),
 447         LPC18XX_PIN_P(1,12),
 448         LPC18XX_PIN_P(1,13),
 449         LPC18XX_PIN_P(1,14),
 450         LPC18XX_PIN_P(1,15),
 451         LPC18XX_PIN_P(1,16),
 452         LPC18XX_PIN_P(1,17),
 453         LPC18XX_PIN_P(1,18),
 454         LPC18XX_PIN_P(1,19),
 455         LPC18XX_PIN_P(1,20),
 456         LPC18XX_PIN_P(2,0),
 457         LPC18XX_PIN_P(2,1),
 458         LPC18XX_PIN_P(2,2),
 459         LPC18XX_PIN_P(2,3),
 460         LPC18XX_PIN_P(2,4),
 461         LPC18XX_PIN_P(2,5),
 462         LPC18XX_PIN_P(2,6),
 463         LPC18XX_PIN_P(2,7),
 464         LPC18XX_PIN_P(2,8),
 465         LPC18XX_PIN_P(2,9),
 466         LPC18XX_PIN_P(2,10),
 467         LPC18XX_PIN_P(2,11),
 468         LPC18XX_PIN_P(2,12),
 469         LPC18XX_PIN_P(2,13),
 470         LPC18XX_PIN_P(3,0),
 471         LPC18XX_PIN_P(3,1),
 472         LPC18XX_PIN_P(3,2),
 473         LPC18XX_PIN_P(3,3),
 474         LPC18XX_PIN_P(3,4),
 475         LPC18XX_PIN_P(3,5),
 476         LPC18XX_PIN_P(3,6),
 477         LPC18XX_PIN_P(3,7),
 478         LPC18XX_PIN_P(3,8),
 479         LPC18XX_PIN_P(4,0),
 480         LPC18XX_PIN_P(4,1),
 481         LPC18XX_PIN_P(4,2),
 482         LPC18XX_PIN_P(4,3),
 483         LPC18XX_PIN_P(4,4),
 484         LPC18XX_PIN_P(4,5),
 485         LPC18XX_PIN_P(4,6),
 486         LPC18XX_PIN_P(4,7),
 487         LPC18XX_PIN_P(4,8),
 488         LPC18XX_PIN_P(4,9),
 489         LPC18XX_PIN_P(4,10),
 490         LPC18XX_PIN_P(5,0),
 491         LPC18XX_PIN_P(5,1),
 492         LPC18XX_PIN_P(5,2),
 493         LPC18XX_PIN_P(5,3),
 494         LPC18XX_PIN_P(5,4),
 495         LPC18XX_PIN_P(5,5),
 496         LPC18XX_PIN_P(5,6),
 497         LPC18XX_PIN_P(5,7),
 498         LPC18XX_PIN_P(6,0),
 499         LPC18XX_PIN_P(6,1),
 500         LPC18XX_PIN_P(6,2),
 501         LPC18XX_PIN_P(6,3),
 502         LPC18XX_PIN_P(6,4),
 503         LPC18XX_PIN_P(6,5),
 504         LPC18XX_PIN_P(6,6),
 505         LPC18XX_PIN_P(6,7),
 506         LPC18XX_PIN_P(6,8),
 507         LPC18XX_PIN_P(6,9),
 508         LPC18XX_PIN_P(6,10),
 509         LPC18XX_PIN_P(6,11),
 510         LPC18XX_PIN_P(6,12),
 511         LPC18XX_PIN_P(7,0),
 512         LPC18XX_PIN_P(7,1),
 513         LPC18XX_PIN_P(7,2),
 514         LPC18XX_PIN_P(7,3),
 515         LPC18XX_PIN_P(7,4),
 516         LPC18XX_PIN_P(7,5),
 517         LPC18XX_PIN_P(7,6),
 518         LPC18XX_PIN_P(7,7),
 519         LPC18XX_PIN_P(8,0),
 520         LPC18XX_PIN_P(8,1),
 521         LPC18XX_PIN_P(8,2),
 522         LPC18XX_PIN_P(8,3),
 523         LPC18XX_PIN_P(8,4),
 524         LPC18XX_PIN_P(8,5),
 525         LPC18XX_PIN_P(8,6),
 526         LPC18XX_PIN_P(8,7),
 527         LPC18XX_PIN_P(8,8),
 528         LPC18XX_PIN_P(9,0),
 529         LPC18XX_PIN_P(9,1),
 530         LPC18XX_PIN_P(9,2),
 531         LPC18XX_PIN_P(9,3),
 532         LPC18XX_PIN_P(9,4),
 533         LPC18XX_PIN_P(9,5),
 534         LPC18XX_PIN_P(9,6),
 535         LPC18XX_PIN_P(a,0),
 536         LPC18XX_PIN_P(a,1),
 537         LPC18XX_PIN_P(a,2),
 538         LPC18XX_PIN_P(a,3),
 539         LPC18XX_PIN_P(a,4),
 540         LPC18XX_PIN_P(b,0),
 541         LPC18XX_PIN_P(b,1),
 542         LPC18XX_PIN_P(b,2),
 543         LPC18XX_PIN_P(b,3),
 544         LPC18XX_PIN_P(b,4),
 545         LPC18XX_PIN_P(b,5),
 546         LPC18XX_PIN_P(b,6),
 547         LPC18XX_PIN_P(c,0),
 548         LPC18XX_PIN_P(c,1),
 549         LPC18XX_PIN_P(c,2),
 550         LPC18XX_PIN_P(c,3),
 551         LPC18XX_PIN_P(c,4),
 552         LPC18XX_PIN_P(c,5),
 553         LPC18XX_PIN_P(c,6),
 554         LPC18XX_PIN_P(c,7),
 555         LPC18XX_PIN_P(c,8),
 556         LPC18XX_PIN_P(c,9),
 557         LPC18XX_PIN_P(c,10),
 558         LPC18XX_PIN_P(c,11),
 559         LPC18XX_PIN_P(c,12),
 560         LPC18XX_PIN_P(c,13),
 561         LPC18XX_PIN_P(c,14),
 562         LPC18XX_PIN_P(d,0),
 563         LPC18XX_PIN_P(d,1),
 564         LPC18XX_PIN_P(d,2),
 565         LPC18XX_PIN_P(d,3),
 566         LPC18XX_PIN_P(d,4),
 567         LPC18XX_PIN_P(d,5),
 568         LPC18XX_PIN_P(d,6),
 569         LPC18XX_PIN_P(d,7),
 570         LPC18XX_PIN_P(d,8),
 571         LPC18XX_PIN_P(d,9),
 572         LPC18XX_PIN_P(d,10),
 573         LPC18XX_PIN_P(d,11),
 574         LPC18XX_PIN_P(d,12),
 575         LPC18XX_PIN_P(d,13),
 576         LPC18XX_PIN_P(d,14),
 577         LPC18XX_PIN_P(d,15),
 578         LPC18XX_PIN_P(d,16),
 579         LPC18XX_PIN_P(e,0),
 580         LPC18XX_PIN_P(e,1),
 581         LPC18XX_PIN_P(e,2),
 582         LPC18XX_PIN_P(e,3),
 583         LPC18XX_PIN_P(e,4),
 584         LPC18XX_PIN_P(e,5),
 585         LPC18XX_PIN_P(e,6),
 586         LPC18XX_PIN_P(e,7),
 587         LPC18XX_PIN_P(e,8),
 588         LPC18XX_PIN_P(e,9),
 589         LPC18XX_PIN_P(e,10),
 590         LPC18XX_PIN_P(e,11),
 591         LPC18XX_PIN_P(e,12),
 592         LPC18XX_PIN_P(e,13),
 593         LPC18XX_PIN_P(e,14),
 594         LPC18XX_PIN_P(e,15),
 595         LPC18XX_PIN_P(f,0),
 596         LPC18XX_PIN_P(f,1),
 597         LPC18XX_PIN_P(f,2),
 598         LPC18XX_PIN_P(f,3),
 599         LPC18XX_PIN_P(f,4),
 600         LPC18XX_PIN_P(f,5),
 601         LPC18XX_PIN_P(f,6),
 602         LPC18XX_PIN_P(f,7),
 603         LPC18XX_PIN_P(f,8),
 604         LPC18XX_PIN_P(f,9),
 605         LPC18XX_PIN_P(f,10),
 606         LPC18XX_PIN_P(f,11),
 607
 608         LPC18XX_PIN(clk0, PIN_CLK0),
 609         LPC18XX_PIN(clk1, PIN_CLK1),
 610         LPC18XX_PIN(clk2, PIN_CLK2),
 611         LPC18XX_PIN(clk3, PIN_CLK3),
 612         LPC18XX_PIN(usb1_dm,  PIN_USB1_DM),
 613         LPC18XX_PIN(usb1_dp,  PIN_USB1_DP),
 614         LPC18XX_PIN(i2c0_scl, PIN_I2C0_SCL),
 615         LPC18XX_PIN(i2c0_sda, PIN_I2C0_SDA),
 616 };
 617
 618 static int lpc18xx_pconf_get_usb1(enum pin_config_param param, int *arg, u32 reg)
 619 {
 620         /* TODO */
 621         return -ENOTSUPP;
 622 }
 623
 624 static int lpc18xx_pconf_get_i2c0(enum pin_config_param param, int *arg, u32 reg,
 625                                   unsigned pin)
 626 {
 627         u8 shift;
 628
 629         if (pin == PIN_I2C0_SCL)
 630                 shift = LPC18XX_SCU_I2C0_SCL_SHIFT;
 631         else
 632                 shift = LPC18XX_SCU_I2C0_SDA_SHIFT;
 633
 634         switch (param) {
 635         case PIN_CONFIG_INPUT_ENABLE:
 636                 if (reg & (LPC18XX_SCU_I2C0_EZI << shift))
 637                         *arg = 1;
 638                 else
 639                         return -EINVAL;
 640                 break;
 641
 642         case PIN_CONFIG_SLEW_RATE:
 643                 if (reg & (LPC18XX_SCU_I2C0_EHD << shift))
 644                         *arg = 1;
 645                 else
 646                         *arg = 0;
 647                 break;
 648
 649         case PIN_CONFIG_INPUT_SCHMITT:
 650                 if (reg & (LPC18XX_SCU_I2C0_EFP << shift))
 651                         *arg = 3;
 652                 else
 653                         *arg = 50;
 654                 break;
 655
 656         case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 657                 if (reg & (LPC18XX_SCU_I2C0_ZIF << shift))
 658                         return -EINVAL;
 659                 else
 660                         *arg = 1;
 661                 break;
 662
 663         default:
 664                 return -ENOTSUPP;
 665         }
 666
 667         return 0;
 668 }
 669
 670 static int lpc18xx_pconf_get_pin(enum pin_config_param param, int *arg, u32 reg,
 671                                  struct lpc18xx_pin_caps *pin_cap)
 672 {
 673         switch (param) {
 674         case PIN_CONFIG_BIAS_DISABLE:
 675                 if ((!(reg & LPC18XX_SCU_PIN_EPD)) && (reg & LPC18XX_SCU_PIN_EPUN))
 676                         ;
 677                 else
 678                         return -EINVAL;
 679                 break;
 680
 681         case PIN_CONFIG_BIAS_PULL_UP:
 682                 if (reg & LPC18XX_SCU_PIN_EPUN)
 683                         return -EINVAL;
 684                 else
 685                         *arg = 1;
 686                 break;
 687
 688         case PIN_CONFIG_BIAS_PULL_DOWN:
 689                 if (reg & LPC18XX_SCU_PIN_EPD)
 690                         *arg = 1;
 691                 else
 692                         return -EINVAL;
 693                 break;
 694
 695         case PIN_CONFIG_INPUT_ENABLE:
 696                 if (reg & LPC18XX_SCU_PIN_EZI)
 697                         *arg = 1;
 698                 else
 699                         return -EINVAL;
 700                 break;
 701
 702         case PIN_CONFIG_SLEW_RATE:
 703                 if (pin_cap->type == TYPE_HD)
 704                         return -ENOTSUPP;
 705
 706                 if (reg & LPC18XX_SCU_PIN_EHS)
 707                         *arg = 1;
 708                 else
 709                         *arg = 0;
 710                 break;
 711
 712         case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 713                 if (reg & LPC18XX_SCU_PIN_ZIF)
 714                         return -EINVAL;
 715                 else
 716                         *arg = 1;
 717                 break;
 718
 719         case PIN_CONFIG_DRIVE_STRENGTH:
 720                 if (pin_cap->type != TYPE_HD)
 721                         return -ENOTSUPP;
 722
 723                 *arg = (reg & LPC18XX_SCU_PIN_EHD_MASK) >> LPC18XX_SCU_PIN_EHD_POS;
 724                 switch (*arg) {
 725                 case 3: *arg += 5;
 726                 case 2: *arg += 5;
 727                 case 1: *arg += 3;
 728                 case 0: *arg += 4;
 729                 }
 730                 break;
 731
 732         default:
 733                 return -ENOTSUPP;
 734         }
 735
 736         return 0;
 737 }
 738
 739 static struct lpc18xx_pin_caps *lpc18xx_get_pin_caps(unsigned pin)
 740 {
 741         int i;
 742
 743         for (i = 0; i < ARRAY_SIZE(lpc18xx_pins); i++) {
 744                 if (lpc18xx_pins[i].number == pin)
 745                         return lpc18xx_pins[i].drv_data;
 746         }
 747
 748         return NULL;
 749 }
 750
 751 static int lpc18xx_pconf_get(struct pinctrl_dev *pctldev, unsigned pin,
 752                              unsigned long *config)
 753 {
 754         struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
 755         enum pin_config_param param = pinconf_to_config_param(*config);
 756         struct lpc18xx_pin_caps *pin_cap;
 757         int ret, arg = 0;
 758         u32 reg;
 759
 760         pin_cap = lpc18xx_get_pin_caps(pin);
 761         if (!pin_cap)
 762                 return -EINVAL;
 763
 764         reg = readl(scu->base + pin_cap->offset);
 765
 766         if (pin_cap->type == TYPE_I2C0)
 767                 ret = lpc18xx_pconf_get_i2c0(param, &arg, reg, pin);
 768         else if (pin_cap->type == TYPE_USB1)
 769                 ret = lpc18xx_pconf_get_usb1(param, &arg, reg);
 770         else
 771                 ret = lpc18xx_pconf_get_pin(param, &arg, reg, pin_cap);
 772
 773         if (ret < 0)
 774                 return ret;
 775
 776         *config = pinconf_to_config_packed(param, (u16)arg);
 777
 778         return 0;
 779 }
 780
 781 static int lpc18xx_pconf_set_usb1(struct pinctrl_dev *pctldev,
 782                                   enum pin_config_param param,
 783                                   u16 param_val, u32 *reg)
 784 {
 785         /* TODO */
 786         return -ENOTSUPP;
 787 }
 788
 789 static int lpc18xx_pconf_set_i2c0(struct pinctrl_dev *pctldev,
 790                                   enum pin_config_param param,
 791                                   u16 param_val, u32 *reg,
 792                                   unsigned pin)
 793 {
 794         u8 shift;
 795
 796         if (pin == PIN_I2C0_SCL)
 797                 shift = LPC18XX_SCU_I2C0_SCL_SHIFT;
 798         else
 799                 shift = LPC18XX_SCU_I2C0_SDA_SHIFT;
 800
 801         switch (param) {
 802         case PIN_CONFIG_INPUT_ENABLE:
 803                 if (param_val)
 804                         *reg |= (LPC18XX_SCU_I2C0_EZI << shift);
 805                 else
 806                         *reg &= ~(LPC18XX_SCU_I2C0_EZI << shift);
 807                 break;
 808
 809         case PIN_CONFIG_SLEW_RATE:
 810                 if (param_val)
 811                         *reg |= (LPC18XX_SCU_I2C0_EHD << shift);
 812                 else
 813                         *reg &= ~(LPC18XX_SCU_I2C0_EHD << shift);
 814                 break;
 815
 816         case PIN_CONFIG_INPUT_SCHMITT:
 817                 if (param_val == 3)
 818                         *reg |= (LPC18XX_SCU_I2C0_EFP << shift);
 819                 else if (param_val == 50)
 820                         *reg &= ~(LPC18XX_SCU_I2C0_EFP << shift);
 821                 else
 822                         return -ENOTSUPP;
 823                 break;
 824
 825         case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 826                 if (param)
 827                         *reg &= ~(LPC18XX_SCU_I2C0_ZIF << shift);
 828                 else
 829                         *reg |= (LPC18XX_SCU_I2C0_ZIF << shift);
 830                 break;
 831
 832         default:
 833                 dev_err(pctldev->dev, "Property not supported\n");
 834                 return -ENOTSUPP;
 835         }
 836
 837         return 0;
 838 }
 839
 840 static int lpc18xx_pconf_set_pin(struct pinctrl_dev *pctldev,
 841                                  enum pin_config_param param,
 842                                  u16 param_val, u32 *reg,
 843                                  struct lpc18xx_pin_caps *pin_cap)
 844 {
 845         switch (param) {
 846         case PIN_CONFIG_BIAS_DISABLE:
 847                 *reg &= ~LPC18XX_SCU_PIN_EPD;
 848                 *reg |= LPC18XX_SCU_PIN_EPUN;
 849                 break;
 850
 851         case PIN_CONFIG_BIAS_PULL_UP:
 852                 *reg &= ~LPC18XX_SCU_PIN_EPUN;
 853                 break;
 854
 855         case PIN_CONFIG_BIAS_PULL_DOWN:
 856                 *reg |= LPC18XX_SCU_PIN_EPD;
 857                 break;
 858
 859         case PIN_CONFIG_INPUT_ENABLE:
 860                 if (param_val)
 861                         *reg |= LPC18XX_SCU_PIN_EZI;
 862                 else
 863                         *reg &= ~LPC18XX_SCU_PIN_EZI;
 864                 break;
 865
 866         case PIN_CONFIG_SLEW_RATE:
 867                 if (pin_cap->type == TYPE_HD) {
 868                         dev_err(pctldev->dev, "Slew rate unsupported on high-drive pins\n");
 869                         return -ENOTSUPP;
 870                 }
 871
 872                 if (param_val == 0)
 873                         *reg &= ~LPC18XX_SCU_PIN_EHS;
 874                 else
 875                         *reg |= LPC18XX_SCU_PIN_EHS;
 876                 break;
 877
 878         case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 879                 if (param)
 880                         *reg &= ~LPC18XX_SCU_PIN_ZIF;
 881                 else
 882                         *reg |= LPC18XX_SCU_PIN_ZIF;
 883                 break;
 884
 885         case PIN_CONFIG_DRIVE_STRENGTH:
 886                 if (pin_cap->type != TYPE_HD) {
 887                         dev_err(pctldev->dev, "Drive strength available only on high-drive pins\n");
 888                         return -ENOTSUPP;
 889                 }
 890                 *reg &= ~LPC18XX_SCU_PIN_EHD_MASK;
 891
 892                 switch (param_val) {
 893                 case 20: param_val -= 5;
 894                 case 14: param_val -= 5;
 895                 case  8: param_val -= 3;
 896                 case  4: param_val -= 4;
 897                          break;
 898                 default:
 899                         dev_err(pctldev->dev, "Drive strength %u unsupported\n", param_val);
 900                         return -ENOTSUPP;
 901                 }
 902                 *reg |= param_val << LPC18XX_SCU_PIN_EHD_POS;
 903                 break;
 904
 905         default:
 906                 dev_err(pctldev->dev, "Property not supported\n");
 907                 return -ENOTSUPP;
 908         }
 909
 910         return 0;
 911 }
 912
 913 static int lpc18xx_pconf_set(struct pinctrl_dev *pctldev, unsigned pin,
 914                              unsigned long *configs, unsigned num_configs)
 915 {
 916         struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
 917         struct lpc18xx_pin_caps *pin_cap;
 918         enum pin_config_param param;
 919         u16 param_val;
 920         u32 reg;
 921         int ret;
 922         int i;
 923
 924         pin_cap = lpc18xx_get_pin_caps(pin);
 925         if (!pin_cap)
 926                 return -EINVAL;
 927
 928         reg = readl(scu->base + pin_cap->offset);
 929
 930         for (i = 0; i < num_configs; i++) {
 931                 param = pinconf_to_config_param(configs[i]);
 932                 param_val = pinconf_to_config_argument(configs[i]);
 933
 934                 if (pin_cap->type == TYPE_I2C0)
 935                         ret = lpc18xx_pconf_set_i2c0(pctldev, param, param_val, &reg, pin);
 936                 else if (pin_cap->type == TYPE_USB1)
 937                         ret = lpc18xx_pconf_set_usb1(pctldev, param, param_val, &reg);
 938                 else
 939                         ret = lpc18xx_pconf_set_pin(pctldev, param, param_val, &reg, pin_cap);
 940
 941                 if (ret)
 942                         return ret;
 943         }
 944
 945         writel(reg, scu->base + pin_cap->offset);
 946
 947         return 0;
 948 }
 949
 950 static const struct pinconf_ops lpc18xx_pconf_ops = {
 951         .is_generic     = true,
 952         .pin_config_get = lpc18xx_pconf_get,
 953         .pin_config_set = lpc18xx_pconf_set,
 954 };
 955
 956 static int lpc18xx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
 957 {
 958         return ARRAY_SIZE(lpc18xx_function_names);
 959 }
 960
 961 static const char *lpc18xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
 962                                              unsigned function)
 963 {
 964         return lpc18xx_function_names[function];
 965 }
 966
 967 static int lpc18xx_pmx_get_func_groups(struct pinctrl_dev *pctldev,
 968                                        unsigned function,
 969                                        const char *const **groups,
 970                                        unsigned *const num_groups)
 971 {
 972         struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
 973
 974         *groups  = scu->func[function].groups;
 975         *num_groups = scu->func[function].ngroups;
 976
 977         return 0;
 978 }
 979
 980 static int lpc18xx_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
 981                            unsigned group)
 982 {
 983         struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
 984         struct lpc18xx_pin_caps *pin = lpc18xx_pins[group].drv_data;
 985         int func;
 986         u32 reg;
 987
 988         /* Dedicated USB1 and I2C0 pins doesn't support muxing */
 989         if (pin->type == TYPE_USB1) {
 990                 if (function == FUNC_USB1)
 991                         return 0;
 992
 993                 goto fail;
 994         }
 995
 996         if (pin->type == TYPE_I2C0) {
 997                 if (function == FUNC_I2C0)
 998                         return 0;
 999
1000                 goto fail;
1001         }
1002
1003         if (function == FUNC_ADC && (pin->analog & LPC18XX_ANALOG_PIN)) {
1004                 u32 offset;
1005
1006                 writel(LPC18XX_SCU_ANALOG_PIN_CFG, scu->base + pin->offset);
1007
1008                 if (LPC18XX_ANALOG_ADC(pin->analog) == 0)
1009                         offset = LPC18XX_SCU_REG_ENAIO0;
1010                 else
1011                         offset = LPC18XX_SCU_REG_ENAIO1;
1012
1013                 reg = readl(scu->base + offset);
1014                 reg |= pin->analog & LPC18XX_ANALOG_BIT_MASK;
1015                 writel(reg, scu->base + offset);
1016
1017                 return 0;
1018         }
1019
1020         if (function == FUNC_DAC && (pin->analog & LPC18XX_ANALOG_PIN)) {
1021                 writel(LPC18XX_SCU_ANALOG_PIN_CFG, scu->base + pin->offset);
1022
1023                 reg = readl(scu->base + LPC18XX_SCU_REG_ENAIO2);
1024                 reg |= LPC18XX_SCU_REG_ENAIO2_DAC;
1025                 writel(reg, scu->base + LPC18XX_SCU_REG_ENAIO2);
1026
1027                 return 0;
1028         }
1029
1030         for (func = 0; func < LPC18XX_SCU_FUNC_PER_PIN; func++) {
1031                 if (function == pin->functions[func])
1032                         break;
1033         }
1034
1035         if (func >= LPC18XX_SCU_FUNC_PER_PIN)
1036                 goto fail;
1037
1038         reg = readl(scu->base + pin->offset);
1039         reg &= ~LPC18XX_SCU_PIN_MODE_MASK;
1040         writel(reg | func, scu->base + pin->offset);
1041
1042         return 0;
1043 fail:
1044         dev_err(pctldev->dev, "Pin %s can't be %s\n", lpc18xx_pins[group].name,
1045                                                       lpc18xx_function_names[function]);
1046         return -EINVAL;
1047 }
1048
1049 static const struct pinmux_ops lpc18xx_pmx_ops = {
1050         .get_functions_count    = lpc18xx_pmx_get_funcs_count,
1051         .get_function_name      = lpc18xx_pmx_get_func_name,
1052         .get_function_groups    = lpc18xx_pmx_get_func_groups,
1053         .set_mux                = lpc18xx_pmx_set,
1054 };
1055
1056 static int lpc18xx_pctl_get_groups_count(struct pinctrl_dev *pctldev)
1057 {
1058         return ARRAY_SIZE(lpc18xx_pins);
1059 }
1060
1061 static const char *lpc18xx_pctl_get_group_name(struct pinctrl_dev *pctldev,
1062                                                unsigned group)
1063 {
1064         return lpc18xx_pins[group].name;
1065 }
1066
1067 static int lpc18xx_pctl_get_group_pins(struct pinctrl_dev *pctldev,
1068                                        unsigned group,
1069                                        const unsigned **pins,
1070                                        unsigned *num_pins)
1071 {
1072         *pins = &lpc18xx_pins[group].number;
1073         *num_pins = 1;
1074
1075         return 0;
1076 }
1077
1078 static const struct pinctrl_ops lpc18xx_pctl_ops = {
1079         .get_groups_count       = lpc18xx_pctl_get_groups_count,
1080         .get_group_name         = lpc18xx_pctl_get_group_name,
1081         .get_group_pins         = lpc18xx_pctl_get_group_pins,
1082         .dt_node_to_map         = pinconf_generic_dt_node_to_map_pin,
1083         .dt_free_map            = pinctrl_utils_dt_free_map,
1084 };
1085
1086 static struct pinctrl_desc lpc18xx_scu_desc = {
1087         .name = "lpc18xx/43xx-scu",
1088         .pins = lpc18xx_pins,
1089         .npins = ARRAY_SIZE(lpc18xx_pins),
1090         .pctlops = &lpc18xx_pctl_ops,
1091         .pmxops = &lpc18xx_pmx_ops,
1092         .confops = &lpc18xx_pconf_ops,
1093         .owner = THIS_MODULE,
1094 };
1095
1096 static bool lpc18xx_valid_pin_function(unsigned pin, unsigned function)
1097 {
1098         struct lpc18xx_pin_caps *p = lpc18xx_pins[pin].drv_data;
1099         int i;
1100
1101         if (function == FUNC_DAC && p->analog == DAC)
1102                 return true;
1103
1104         if (function == FUNC_ADC && p->analog)
1105                 return true;
1106
1107         if (function == FUNC_I2C0 && p->type == TYPE_I2C0)
1108                 return true;
1109
1110         if (function == FUNC_USB1 && p->type == TYPE_USB1)
1111                 return true;
1112
1113         for (i = 0; i < LPC18XX_SCU_FUNC_PER_PIN; i++) {
1114                 if (function == p->functions[i])
1115                         return true;
1116         }
1117
1118         return false;
1119 }
1120
1121 static int lpc18xx_create_group_func_map(struct device *dev,
1122                                          struct lpc18xx_scu_data *scu)
1123 {
1124         u16 pins[ARRAY_SIZE(lpc18xx_pins)];
1125         int func, ngroups, i;
1126
1127         for (func = 0; func < FUNC_MAX; ngroups = 0, func++) {
1128
1129                 for (i = 0; i < ARRAY_SIZE(lpc18xx_pins); i++) {
1130                         if (lpc18xx_valid_pin_function(i, func))
1131                                 pins[ngroups++] = i;
1132                 }
1133
1134                 scu->func[func].ngroups = ngroups;
1135                 scu->func[func].groups = devm_kzalloc(dev, ngroups *
1136                                                       sizeof(char *), GFP_KERNEL);
1137                 if (!scu->func[func].groups)
1138                         return -ENOMEM;
1139
1140                 for (i = 0; i < ngroups; i++)
1141                         scu->func[func].groups[i] = lpc18xx_pins[pins[i]].name;
1142         }
1143
1144         return 0;
1145 }
1146
1147 static int lpc18xx_scu_probe(struct platform_device *pdev)
1148 {
1149         struct lpc18xx_scu_data *scu;
1150         struct resource *res;
1151         int ret;
1152
1153         scu = devm_kzalloc(&pdev->dev, sizeof(*scu), GFP_KERNEL);
1154         if (!scu)
1155                 return -ENOMEM;
1156
1157         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1158         scu->base = devm_ioremap_resource(&pdev->dev, res);
1159         if (IS_ERR(scu->base))
1160                 return PTR_ERR(scu->base);
1161
1162         scu->clk = devm_clk_get(&pdev->dev, NULL);
1163         if (IS_ERR(scu->clk)) {
1164                 dev_err(&pdev->dev, "Input clock not found.\n");
1165                 return PTR_ERR(scu->clk);
1166         }
1167
1168         ret = lpc18xx_create_group_func_map(&pdev->dev, scu);
1169         if (ret) {
1170                 dev_err(&pdev->dev, "Unable to create group func map.\n");
1171                 return ret;
1172         }
1173
1174         ret = clk_prepare_enable(scu->clk);
1175         if (ret) {
1176                 dev_err(&pdev->dev, "Unable to enable clock.\n");
1177                 return ret;
1178         }
1179
1180         platform_set_drvdata(pdev, scu);
1181
1182         scu->pctl = pinctrl_register(&lpc18xx_scu_desc, &pdev->dev, scu);
1183         if (IS_ERR(scu->pctl)) {
1184                 dev_err(&pdev->dev, "Could not register pinctrl driver\n");
1185                 clk_disable_unprepare(scu->clk);
1186                 return PTR_ERR(scu->pctl);
1187         }
1188
1189         return 0;
1190 }
1191
1192 static int lpc18xx_scu_remove(struct platform_device *pdev)
1193 {
1194         struct lpc18xx_scu_data *scu = platform_get_drvdata(pdev);
1195
1196         pinctrl_unregister(scu->pctl);
1197         clk_disable_unprepare(scu->clk);
1198
1199         return 0;
1200 }
1201
1202 static const struct of_device_id lpc18xx_scu_match[] = {
1203         { .compatible = "nxp,lpc1850-scu" },
1204         {},
1205 };
1206 MODULE_DEVICE_TABLE(of, lpc18xx_scu_match);
1207
1208 static struct platform_driver lpc18xx_scu_driver = {
1209         .probe          = lpc18xx_scu_probe,
1210         .remove         = lpc18xx_scu_remove,
1211         .driver = {
1212                 .name           = "lpc18xx-scu",
1213                 .of_match_table = lpc18xx_scu_match,
1214         },
1215 };
1216 module_platform_driver(lpc18xx_scu_driver);
1217
1218 MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
1219 MODULE_DESCRIPTION("Pinctrl driver for NXP LPC18xx/43xx SCU");
1220 MODULE_LICENSE("GPL v2");