drivers/rtc/rtc-omap.c

   1 /*
   2  * TI OMAP1 Real Time Clock interface for Linux
   3  *
   4  * Copyright (C) 2003 MontaVista Software, Inc.
   5  * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
   6  *
   7  * Copyright (C) 2006 David Brownell (new RTC framework)
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/ioport.h>
  19 #include <linux/delay.h>
  20 #include <linux/rtc.h>
  21 #include <linux/bcd.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/of.h>
  24 #include <linux/of_device.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/io.h>
  27
  28 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  29  * with century-range alarm matching, driven by the 32kHz clock.
  30  *
  31  * The main user-visible ways it differs from PC RTCs are by omitting
  32  * "don't care" alarm fields and sub-second periodic IRQs, and having
  33  * an autoadjust mechanism to calibrate to the true oscillator rate.
  34  *
  35  * Board-specific wiring options include using split power mode with
  36  * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  37  * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  38  * low power modes) for OMAP1 boards (OMAP-L138 has this built into
  39  * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  40  */
  41
  42 /* RTC registers */
  43 #define OMAP_RTC_SECONDS_REG            0x00
  44 #define OMAP_RTC_MINUTES_REG            0x04
  45 #define OMAP_RTC_HOURS_REG              0x08
  46 #define OMAP_RTC_DAYS_REG               0x0C
  47 #define OMAP_RTC_MONTHS_REG             0x10
  48 #define OMAP_RTC_YEARS_REG              0x14
  49 #define OMAP_RTC_WEEKS_REG              0x18
  50
  51 #define OMAP_RTC_ALARM_SECONDS_REG      0x20
  52 #define OMAP_RTC_ALARM_MINUTES_REG      0x24
  53 #define OMAP_RTC_ALARM_HOURS_REG        0x28
  54 #define OMAP_RTC_ALARM_DAYS_REG         0x2c
  55 #define OMAP_RTC_ALARM_MONTHS_REG       0x30
  56 #define OMAP_RTC_ALARM_YEARS_REG        0x34
  57
  58 #define OMAP_RTC_CTRL_REG               0x40
  59 #define OMAP_RTC_STATUS_REG             0x44
  60 #define OMAP_RTC_INTERRUPTS_REG         0x48
  61
  62 #define OMAP_RTC_COMP_LSB_REG           0x4c
  63 #define OMAP_RTC_COMP_MSB_REG           0x50
  64 #define OMAP_RTC_OSC_REG                0x54
  65
  66 #define OMAP_RTC_KICK0_REG              0x6c
  67 #define OMAP_RTC_KICK1_REG              0x70
  68
  69 #define OMAP_RTC_IRQWAKEEN              0x7c
  70
  71 /* OMAP_RTC_CTRL_REG bit fields: */
  72 #define OMAP_RTC_CTRL_SPLIT             BIT(7)
  73 #define OMAP_RTC_CTRL_DISABLE           BIT(6)
  74 #define OMAP_RTC_CTRL_SET_32_COUNTER    BIT(5)
  75 #define OMAP_RTC_CTRL_TEST              BIT(4)
  76 #define OMAP_RTC_CTRL_MODE_12_24        BIT(3)
  77 #define OMAP_RTC_CTRL_AUTO_COMP         BIT(2)
  78 #define OMAP_RTC_CTRL_ROUND_30S         BIT(1)
  79 #define OMAP_RTC_CTRL_STOP              BIT(0)
  80
  81 /* OMAP_RTC_STATUS_REG bit fields: */
  82 #define OMAP_RTC_STATUS_POWER_UP        BIT(7)
  83 #define OMAP_RTC_STATUS_ALARM           BIT(6)
  84 #define OMAP_RTC_STATUS_1D_EVENT        BIT(5)
  85 #define OMAP_RTC_STATUS_1H_EVENT        BIT(4)
  86 #define OMAP_RTC_STATUS_1M_EVENT        BIT(3)
  87 #define OMAP_RTC_STATUS_1S_EVENT        BIT(2)
  88 #define OMAP_RTC_STATUS_RUN             BIT(1)
  89 #define OMAP_RTC_STATUS_BUSY            BIT(0)
  90
  91 /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  92 #define OMAP_RTC_INTERRUPTS_IT_ALARM    BIT(3)
  93 #define OMAP_RTC_INTERRUPTS_IT_TIMER    BIT(2)
  94
  95 /* OMAP_RTC_OSC_REG bit fields: */
  96 #define OMAP_RTC_OSC_32KCLK_EN          BIT(6)
  97
  98 /* OMAP_RTC_IRQWAKEEN bit fields: */
  99 #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
 100
 101 /* OMAP_RTC_KICKER values */
 102 #define KICK0_VALUE                     0x83e70b13
 103 #define KICK1_VALUE                     0x95a4f1e0
 104
 105 struct omap_rtc_device_type {
 106         bool has_32kclk_en;
 107         bool has_kicker;
 108         bool has_irqwakeen;
 109         bool has_power_up_reset;
 110 };
 111
 112 struct omap_rtc {
 113         struct rtc_device *rtc;
 114         void __iomem *base;
 115         int irq_alarm;
 116         int irq_timer;
 117         u8 interrupts_reg;
 118         const struct omap_rtc_device_type *type;
 119 };
 120
 121 static inline u8 rtc_read(struct omap_rtc *rtc, unsigned int reg)
 122 {
 123         return readb(rtc->base + reg);
 124 }
 125
 126 static inline u32 rtc_readl(struct omap_rtc *rtc, unsigned int reg)
 127 {
 128         return readl(rtc->base + reg);
 129 }
 130
 131 static inline void rtc_write(struct omap_rtc *rtc, unsigned int reg, u8 val)
 132 {
 133         writeb(val, rtc->base + reg);
 134 }
 135
 136 static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val)
 137 {
 138         writel(val, rtc->base + reg);
 139 }
 140
 141 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
 142  * so the only other requirement is that register accesses which
 143  * require BUSY to be clear are made with IRQs locally disabled
 144  */
 145 static void rtc_wait_not_busy(struct omap_rtc *rtc)
 146 {
 147         int     count = 0;
 148         u8      status;
 149
 150         /* BUSY may stay active for 1/32768 second (~30 usec) */
 151         for (count = 0; count < 50; count++) {
 152                 status = rtc_read(rtc, OMAP_RTC_STATUS_REG);
 153                 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
 154                         break;
 155                 udelay(1);
 156         }
 157         /* now we have ~15 usec to read/write various registers */
 158 }
 159
 160 static irqreturn_t rtc_irq(int irq, void *dev_id)
 161 {
 162         struct omap_rtc         *rtc = dev_id;
 163         unsigned long           events = 0;
 164         u8                      irq_data;
 165
 166         irq_data = rtc_read(rtc, OMAP_RTC_STATUS_REG);
 167
 168         /* alarm irq? */
 169         if (irq_data & OMAP_RTC_STATUS_ALARM) {
 170                 rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
 171                 events |= RTC_IRQF | RTC_AF;
 172         }
 173
 174         /* 1/sec periodic/update irq? */
 175         if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
 176                 events |= RTC_IRQF | RTC_UF;
 177
 178         rtc_update_irq(rtc->rtc, 1, events);
 179
 180         return IRQ_HANDLED;
 181 }
 182
 183 static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 184 {
 185         struct omap_rtc *rtc = dev_get_drvdata(dev);
 186         u8 reg, irqwake_reg = 0;
 187
 188         local_irq_disable();
 189         rtc_wait_not_busy(rtc);
 190         reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
 191         if (rtc->type->has_irqwakeen)
 192                 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
 193
 194         if (enabled) {
 195                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
 196                 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 197         } else {
 198                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
 199                 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 200         }
 201         rtc_wait_not_busy(rtc);
 202         rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
 203         if (rtc->type->has_irqwakeen)
 204                 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
 205         local_irq_enable();
 206
 207         return 0;
 208 }
 209
 210 /* this hardware doesn't support "don't care" alarm fields */
 211 static int tm2bcd(struct rtc_time *tm)
 212 {
 213         if (rtc_valid_tm(tm) != 0)
 214                 return -EINVAL;
 215
 216         tm->tm_sec = bin2bcd(tm->tm_sec);
 217         tm->tm_min = bin2bcd(tm->tm_min);
 218         tm->tm_hour = bin2bcd(tm->tm_hour);
 219         tm->tm_mday = bin2bcd(tm->tm_mday);
 220
 221         tm->tm_mon = bin2bcd(tm->tm_mon + 1);
 222
 223         /* epoch == 1900 */
 224         if (tm->tm_year < 100 || tm->tm_year > 199)
 225                 return -EINVAL;
 226         tm->tm_year = bin2bcd(tm->tm_year - 100);
 227
 228         return 0;
 229 }
 230
 231 static void bcd2tm(struct rtc_time *tm)
 232 {
 233         tm->tm_sec = bcd2bin(tm->tm_sec);
 234         tm->tm_min = bcd2bin(tm->tm_min);
 235         tm->tm_hour = bcd2bin(tm->tm_hour);
 236         tm->tm_mday = bcd2bin(tm->tm_mday);
 237         tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
 238         /* epoch == 1900 */
 239         tm->tm_year = bcd2bin(tm->tm_year) + 100;
 240 }
 241
 242 static void omap_rtc_read_time_raw(struct omap_rtc *rtc, struct rtc_time *tm)
 243 {
 244         tm->tm_sec = rtc_read(rtc, OMAP_RTC_SECONDS_REG);
 245         tm->tm_min = rtc_read(rtc, OMAP_RTC_MINUTES_REG);
 246         tm->tm_hour = rtc_read(rtc, OMAP_RTC_HOURS_REG);
 247         tm->tm_mday = rtc_read(rtc, OMAP_RTC_DAYS_REG);
 248         tm->tm_mon = rtc_read(rtc, OMAP_RTC_MONTHS_REG);
 249         tm->tm_year = rtc_read(rtc, OMAP_RTC_YEARS_REG);
 250 }
 251
 252 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
 253 {
 254         struct omap_rtc *rtc = dev_get_drvdata(dev);
 255
 256         /* we don't report wday/yday/isdst ... */
 257         local_irq_disable();
 258         rtc_wait_not_busy(rtc);
 259         omap_rtc_read_time_raw(rtc, tm);
 260         local_irq_enable();
 261
 262         bcd2tm(tm);
 263         return 0;
 264 }
 265
 266 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
 267 {
 268         struct omap_rtc *rtc = dev_get_drvdata(dev);
 269
 270         if (tm2bcd(tm) < 0)
 271                 return -EINVAL;
 272         local_irq_disable();
 273         rtc_wait_not_busy(rtc);
 274
 275         rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year);
 276         rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon);
 277         rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday);
 278         rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour);
 279         rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min);
 280         rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec);
 281
 282         local_irq_enable();
 283
 284         return 0;
 285 }
 286
 287 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
 288 {
 289         struct omap_rtc *rtc = dev_get_drvdata(dev);
 290
 291         local_irq_disable();
 292         rtc_wait_not_busy(rtc);
 293
 294         alm->time.tm_sec = rtc_read(rtc, OMAP_RTC_ALARM_SECONDS_REG);
 295         alm->time.tm_min = rtc_read(rtc, OMAP_RTC_ALARM_MINUTES_REG);
 296         alm->time.tm_hour = rtc_read(rtc, OMAP_RTC_ALARM_HOURS_REG);
 297         alm->time.tm_mday = rtc_read(rtc, OMAP_RTC_ALARM_DAYS_REG);
 298         alm->time.tm_mon = rtc_read(rtc, OMAP_RTC_ALARM_MONTHS_REG);
 299         alm->time.tm_year = rtc_read(rtc, OMAP_RTC_ALARM_YEARS_REG);
 300
 301         local_irq_enable();
 302
 303         bcd2tm(&alm->time);
 304         alm->enabled = !!(rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG)
 305                         & OMAP_RTC_INTERRUPTS_IT_ALARM);
 306
 307         return 0;
 308 }
 309
 310 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
 311 {
 312         struct omap_rtc *rtc = dev_get_drvdata(dev);
 313         u8 reg, irqwake_reg = 0;
 314
 315         if (tm2bcd(&alm->time) < 0)
 316                 return -EINVAL;
 317
 318         local_irq_disable();
 319         rtc_wait_not_busy(rtc);
 320
 321         rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year);
 322         rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon);
 323         rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday);
 324         rtc_write(rtc, OMAP_RTC_ALARM_HOURS_REG, alm->time.tm_hour);
 325         rtc_write(rtc, OMAP_RTC_ALARM_MINUTES_REG, alm->time.tm_min);
 326         rtc_write(rtc, OMAP_RTC_ALARM_SECONDS_REG, alm->time.tm_sec);
 327
 328         reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
 329         if (rtc->type->has_irqwakeen)
 330                 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
 331
 332         if (alm->enabled) {
 333                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
 334                 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 335         } else {
 336                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
 337                 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 338         }
 339         rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
 340         if (rtc->type->has_irqwakeen)
 341                 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
 342
 343         local_irq_enable();
 344
 345         return 0;
 346 }
 347
 348 static struct rtc_class_ops omap_rtc_ops = {
 349         .read_time      = omap_rtc_read_time,
 350         .set_time       = omap_rtc_set_time,
 351         .read_alarm     = omap_rtc_read_alarm,
 352         .set_alarm      = omap_rtc_set_alarm,
 353         .alarm_irq_enable = omap_rtc_alarm_irq_enable,
 354 };
 355
 356 static const struct omap_rtc_device_type omap_rtc_default_type = {
 357         .has_power_up_reset = true,
 358 };
 359
 360 static const struct omap_rtc_device_type omap_rtc_am3352_type = {
 361         .has_32kclk_en  = true,
 362         .has_kicker     = true,
 363         .has_irqwakeen  = true,
 364 };
 365
 366 static const struct omap_rtc_device_type omap_rtc_da830_type = {
 367         .has_kicker     = true,
 368 };
 369
 370 static const struct platform_device_id omap_rtc_id_table[] = {
 371         {
 372                 .name   = "omap_rtc",
 373                 .driver_data = (kernel_ulong_t)&omap_rtc_default_type,
 374         }, {
 375                 .name   = "am3352-rtc",
 376                 .driver_data = (kernel_ulong_t)&omap_rtc_am3352_type,
 377         }, {
 378                 .name   = "da830-rtc",
 379                 .driver_data = (kernel_ulong_t)&omap_rtc_da830_type,
 380         }, {
 381                 /* sentinel */
 382         }
 383 };
 384 MODULE_DEVICE_TABLE(platform, omap_rtc_id_table);
 385
 386 static const struct of_device_id omap_rtc_of_match[] = {
 387         {
 388                 .compatible     = "ti,am3352-rtc",
 389                 .data           = &omap_rtc_am3352_type,
 390         }, {
 391                 .compatible     = "ti,da830-rtc",
 392                 .data           = &omap_rtc_da830_type,
 393         }, {
 394                 /* sentinel */
 395         }
 396 };
 397 MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
 398
 399 static int __init omap_rtc_probe(struct platform_device *pdev)
 400 {
 401         struct omap_rtc         *rtc;
 402         struct resource         *res;
 403         u8                      reg, mask, new_ctrl;
 404         const struct platform_device_id *id_entry;
 405         const struct of_device_id *of_id;
 406         int ret;
 407
 408         rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
 409         if (!rtc)
 410                 return -ENOMEM;
 411
 412         of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
 413         if (of_id) {
 414                 rtc->type = of_id->data;
 415         } else {
 416                 id_entry = platform_get_device_id(pdev);
 417                 rtc->type = (void *)id_entry->driver_data;
 418         }
 419
 420         rtc->irq_timer = platform_get_irq(pdev, 0);
 421         if (rtc->irq_timer <= 0)
 422                 return -ENOENT;
 423
 424         rtc->irq_alarm = platform_get_irq(pdev, 1);
 425         if (rtc->irq_alarm <= 0)
 426                 return -ENOENT;
 427
 428         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 429         rtc->base = devm_ioremap_resource(&pdev->dev, res);
 430         if (IS_ERR(rtc->base))
 431                 return PTR_ERR(rtc->base);
 432
 433         platform_set_drvdata(pdev, rtc);
 434
 435         /* Enable the clock/module so that we can access the registers */
 436         pm_runtime_enable(&pdev->dev);
 437         pm_runtime_get_sync(&pdev->dev);
 438
 439         if (rtc->type->has_kicker) {
 440                 rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
 441                 rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
 442         }
 443
 444         /*
 445          * disable interrupts
 446          *
 447          * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
 448          */
 449         rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
 450
 451         /* enable RTC functional clock */
 452         if (rtc->type->has_32kclk_en) {
 453                 reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
 454                 rtc_writel(rtc, OMAP_RTC_OSC_REG,
 455                                 reg | OMAP_RTC_OSC_32KCLK_EN);
 456         }
 457
 458         /* clear old status */
 459         reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);
 460
 461         mask = OMAP_RTC_STATUS_ALARM;
 462
 463         if (rtc->type->has_power_up_reset) {
 464                 mask |= OMAP_RTC_STATUS_POWER_UP;
 465                 if (reg & OMAP_RTC_STATUS_POWER_UP)
 466                         dev_info(&pdev->dev, "RTC power up reset detected\n");
 467         }
 468
 469         if (reg & mask)
 470                 rtc_write(rtc, OMAP_RTC_STATUS_REG, reg & mask);
 471
 472         /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
 473         reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
 474         if (reg & (u8) OMAP_RTC_CTRL_STOP)
 475                 dev_info(&pdev->dev, "already running\n");
 476
 477         /* force to 24 hour mode */
 478         new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
 479         new_ctrl |= OMAP_RTC_CTRL_STOP;
 480
 481         /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
 482          *
 483          *  - Device wake-up capability setting should come through chip
 484          *    init logic. OMAP1 boards should initialize the "wakeup capable"
 485          *    flag in the platform device if the board is wired right for
 486          *    being woken up by RTC alarm. For OMAP-L138, this capability
 487          *    is built into the SoC by the "Deep Sleep" capability.
 488          *
 489          *  - Boards wired so RTC_ON_nOFF is used as the reset signal,
 490          *    rather than nPWRON_RESET, should forcibly enable split
 491          *    power mode.  (Some chip errata report that RTC_CTRL_SPLIT
 492          *    is write-only, and always reads as zero...)
 493          */
 494
 495         if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
 496                 dev_info(&pdev->dev, "split power mode\n");
 497
 498         if (reg != new_ctrl)
 499                 rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
 500
 501         device_init_wakeup(&pdev->dev, true);
 502
 503         rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
 504                         &omap_rtc_ops, THIS_MODULE);
 505         if (IS_ERR(rtc->rtc)) {
 506                 ret = PTR_ERR(rtc->rtc);
 507                 goto err;
 508         }
 509
 510         /* handle periodic and alarm irqs */
 511         ret = devm_request_irq(&pdev->dev, rtc->irq_timer, rtc_irq, 0,
 512                         dev_name(&rtc->rtc->dev), rtc);
 513         if (ret)
 514                 goto err;
 515
 516         if (rtc->irq_timer != rtc->irq_alarm) {
 517                 ret = devm_request_irq(&pdev->dev, rtc->irq_alarm, rtc_irq, 0,
 518                                 dev_name(&rtc->rtc->dev), rtc);
 519                 if (ret)
 520                         goto err;
 521         }
 522
 523         return 0;
 524
 525 err:
 526         device_init_wakeup(&pdev->dev, false);
 527         if (rtc->type->has_kicker)
 528                 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
 529         pm_runtime_put_sync(&pdev->dev);
 530         pm_runtime_disable(&pdev->dev);
 531
 532         return ret;
 533 }
 534
 535 static int __exit omap_rtc_remove(struct platform_device *pdev)
 536 {
 537         struct omap_rtc *rtc = platform_get_drvdata(pdev);
 538
 539         device_init_wakeup(&pdev->dev, 0);
 540
 541         /* leave rtc running, but disable irqs */
 542         rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
 543
 544         if (rtc->type->has_kicker)
 545                 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
 546
 547         /* Disable the clock/module */
 548         pm_runtime_put_sync(&pdev->dev);
 549         pm_runtime_disable(&pdev->dev);
 550
 551         return 0;
 552 }
 553
 554 #ifdef CONFIG_PM_SLEEP
 555 static int omap_rtc_suspend(struct device *dev)
 556 {
 557         struct omap_rtc *rtc = dev_get_drvdata(dev);
 558
 559         rtc->interrupts_reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
 560
 561         /* FIXME the RTC alarm is not currently acting as a wakeup event
 562          * source on some platforms, and in fact this enable() call is just
 563          * saving a flag that's never used...
 564          */
 565         if (device_may_wakeup(dev))
 566                 enable_irq_wake(rtc->irq_alarm);
 567         else
 568                 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
 569
 570         /* Disable the clock/module */
 571         pm_runtime_put_sync(dev);
 572
 573         return 0;
 574 }
 575
 576 static int omap_rtc_resume(struct device *dev)
 577 {
 578         struct omap_rtc *rtc = dev_get_drvdata(dev);
 579
 580         /* Enable the clock/module so that we can access the registers */
 581         pm_runtime_get_sync(dev);
 582
 583         if (device_may_wakeup(dev))
 584                 disable_irq_wake(rtc->irq_alarm);
 585         else
 586                 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, rtc->interrupts_reg);
 587
 588         return 0;
 589 }
 590 #endif
 591
 592 static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
 593
 594 static void omap_rtc_shutdown(struct platform_device *pdev)
 595 {
 596         struct omap_rtc *rtc = platform_get_drvdata(pdev);
 597
 598         rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
 599 }
 600
 601 static struct platform_driver omap_rtc_driver = {
 602         .remove         = __exit_p(omap_rtc_remove),
 603         .shutdown       = omap_rtc_shutdown,
 604         .driver         = {
 605                 .name   = "omap_rtc",
 606                 .owner  = THIS_MODULE,
 607                 .pm     = &omap_rtc_pm_ops,
 608                 .of_match_table = omap_rtc_of_match,
 609         },
 610         .id_table       = omap_rtc_id_table,
 611 };
 612
 613 module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
 614
 615 MODULE_ALIAS("platform:omap_rtc");
 616 MODULE_AUTHOR("George G. Davis (and others)");
 617 MODULE_LICENSE("GPL");