1 /* drivers/rtc/rtc-s3c.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
17 #include <linux/module.h>
19 #include <linux/string.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/rtc.h>
24 #include <linux/bcd.h>
25 #include <linux/clk.h>
26 #include <linux/log2.h>
27 #include <linux/slab.h>
29 #include <linux/uaccess.h>
32 #include <mach/hardware.h>
34 #include <plat/regs-rtc.h>
43 struct s3c_rtc_drv_data {
47 /* I have yet to find an S3C implementation with more than one
48 * of these rtc blocks in */
50 static struct clk *rtc_clk;
51 static void __iomem *s3c_rtc_base;
52 static int s3c_rtc_alarmno = NO_IRQ;
53 static int s3c_rtc_tickno = NO_IRQ;
54 static enum s3c_cpu_type s3c_rtc_cpu_type;
56 static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
58 static void s3c_rtc_alarm_clk_enable(bool enable)
60 static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
61 static bool alarm_clk_enabled;
62 unsigned long irq_flags;
64 spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
66 if (!alarm_clk_enabled) {
68 alarm_clk_enabled = true;
71 if (alarm_clk_enabled) {
73 alarm_clk_enabled = false;
76 spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
81 static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
83 struct rtc_device *rdev = id;
86 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
88 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
89 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
93 s3c_rtc_alarm_clk_enable(false);
98 static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
100 struct rtc_device *rdev = id;
103 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
105 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
106 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
108 clk_disable(rtc_clk);
112 /* Update control registers */
113 static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
117 dev_dbg(dev, "%s: aie=%d\n", __func__, enabled);
120 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
123 tmp |= S3C2410_RTCALM_ALMEN;
125 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
126 clk_disable(rtc_clk);
128 s3c_rtc_alarm_clk_enable(enabled);
133 static int s3c_rtc_setfreq(struct device *dev, int freq)
135 struct platform_device *pdev = to_platform_device(dev);
136 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
137 unsigned int tmp = 0;
140 if (!is_power_of_2(freq))
144 spin_lock_irq(&s3c_rtc_pie_lock);
146 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
147 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
148 tmp &= S3C2410_TICNT_ENABLE;
151 val = (rtc_dev->max_user_freq / freq) - 1;
153 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
154 tmp |= S3C2443_TICNT_PART(val);
155 writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
157 if (s3c_rtc_cpu_type == TYPE_S3C2416)
158 writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
163 writel(tmp, s3c_rtc_base + S3C2410_TICNT);
164 spin_unlock_irq(&s3c_rtc_pie_lock);
165 clk_disable(rtc_clk);
170 /* Time read/write */
172 static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
174 unsigned int have_retried = 0;
175 void __iomem *base = s3c_rtc_base;
179 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
180 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
181 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
182 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
183 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
184 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
186 /* the only way to work out whether the system was mid-update
187 * when we read it is to check the second counter, and if it
188 * is zero, then we re-try the entire read
191 if (rtc_tm->tm_sec == 0 && !have_retried) {
196 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
197 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
198 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
199 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
200 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
201 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
203 rtc_tm->tm_year += 100;
205 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
206 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
207 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
211 clk_disable(rtc_clk);
212 return rtc_valid_tm(rtc_tm);
215 static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
217 void __iomem *base = s3c_rtc_base;
218 int year = tm->tm_year - 100;
220 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
221 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
222 tm->tm_hour, tm->tm_min, tm->tm_sec);
224 /* we get around y2k by simply not supporting it */
226 if (year < 0 || year >= 100) {
227 dev_err(dev, "rtc only supports 100 years\n");
232 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
233 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
234 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
235 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
236 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
237 writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
238 clk_disable(rtc_clk);
243 static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
245 struct rtc_time *alm_tm = &alrm->time;
246 void __iomem *base = s3c_rtc_base;
250 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
251 alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
252 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
253 alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
254 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
255 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
257 alm_en = readb(base + S3C2410_RTCALM);
259 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
261 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
263 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
264 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
267 /* decode the alarm enable field */
269 if (alm_en & S3C2410_RTCALM_SECEN)
270 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
274 if (alm_en & S3C2410_RTCALM_MINEN)
275 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
279 if (alm_en & S3C2410_RTCALM_HOUREN)
280 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
282 alm_tm->tm_hour = -1;
284 if (alm_en & S3C2410_RTCALM_DAYEN)
285 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
287 alm_tm->tm_mday = -1;
289 if (alm_en & S3C2410_RTCALM_MONEN) {
290 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
296 if (alm_en & S3C2410_RTCALM_YEAREN)
297 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
299 alm_tm->tm_year = -1;
301 clk_disable(rtc_clk);
305 static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
307 struct rtc_time *tm = &alrm->time;
308 void __iomem *base = s3c_rtc_base;
309 unsigned int alrm_en;
312 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
314 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
315 tm->tm_hour, tm->tm_min, tm->tm_sec);
317 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
318 writeb(0x00, base + S3C2410_RTCALM);
320 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
321 alrm_en |= S3C2410_RTCALM_SECEN;
322 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
325 if (tm->tm_min < 60 && tm->tm_min >= 0) {
326 alrm_en |= S3C2410_RTCALM_MINEN;
327 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
330 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
331 alrm_en |= S3C2410_RTCALM_HOUREN;
332 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
335 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
337 writeb(alrm_en, base + S3C2410_RTCALM);
339 s3c_rtc_setaie(dev, alrm->enabled);
341 clk_disable(rtc_clk);
345 static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
350 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
351 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
352 ticnt &= S3C64XX_RTCCON_TICEN;
354 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
355 ticnt &= S3C2410_TICNT_ENABLE;
358 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
359 clk_disable(rtc_clk);
363 static const struct rtc_class_ops s3c_rtcops = {
364 .read_time = s3c_rtc_gettime,
365 .set_time = s3c_rtc_settime,
366 .read_alarm = s3c_rtc_getalarm,
367 .set_alarm = s3c_rtc_setalarm,
368 .proc = s3c_rtc_proc,
369 .alarm_irq_enable = s3c_rtc_setaie,
372 static void s3c_rtc_enable(struct platform_device *pdev, int en)
374 void __iomem *base = s3c_rtc_base;
377 if (s3c_rtc_base == NULL)
382 tmp = readw(base + S3C2410_RTCCON);
383 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
384 tmp &= ~S3C64XX_RTCCON_TICEN;
385 tmp &= ~S3C2410_RTCCON_RTCEN;
386 writew(tmp, base + S3C2410_RTCCON);
388 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
389 tmp = readb(base + S3C2410_TICNT);
390 tmp &= ~S3C2410_TICNT_ENABLE;
391 writeb(tmp, base + S3C2410_TICNT);
394 /* re-enable the device, and check it is ok */
396 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
397 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
399 tmp = readw(base + S3C2410_RTCCON);
400 writew(tmp | S3C2410_RTCCON_RTCEN,
401 base + S3C2410_RTCCON);
404 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
405 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
407 tmp = readw(base + S3C2410_RTCCON);
408 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
409 base + S3C2410_RTCCON);
412 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
413 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
415 tmp = readw(base + S3C2410_RTCCON);
416 writew(tmp & ~S3C2410_RTCCON_CLKRST,
417 base + S3C2410_RTCCON);
420 clk_disable(rtc_clk);
423 static int s3c_rtc_remove(struct platform_device *dev)
425 platform_set_drvdata(dev, NULL);
427 s3c_rtc_setaie(&dev->dev, 0);
429 clk_unprepare(rtc_clk);
435 static const struct of_device_id s3c_rtc_dt_match[];
437 static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
440 struct s3c_rtc_drv_data *data;
441 if (pdev->dev.of_node) {
442 const struct of_device_id *match;
443 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
444 data = (struct s3c_rtc_drv_data *) match->data;
445 return data->cpu_type;
448 return platform_get_device_id(pdev)->driver_data;
451 static int s3c_rtc_probe(struct platform_device *pdev)
453 struct rtc_device *rtc;
454 struct rtc_time rtc_tm;
455 struct resource *res;
459 dev_dbg(&pdev->dev, "%s: probe=%p\n", __func__, pdev);
463 s3c_rtc_tickno = platform_get_irq(pdev, 1);
464 if (s3c_rtc_tickno < 0) {
465 dev_err(&pdev->dev, "no irq for rtc tick\n");
466 return s3c_rtc_tickno;
469 s3c_rtc_alarmno = platform_get_irq(pdev, 0);
470 if (s3c_rtc_alarmno < 0) {
471 dev_err(&pdev->dev, "no irq for alarm\n");
472 return s3c_rtc_alarmno;
475 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
476 s3c_rtc_tickno, s3c_rtc_alarmno);
478 /* get the memory region */
480 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
482 dev_err(&pdev->dev, "failed to get memory region resource\n");
486 s3c_rtc_base = devm_ioremap_resource(&pdev->dev, res);
487 if (IS_ERR(s3c_rtc_base))
488 return PTR_ERR(s3c_rtc_base);
490 rtc_clk = devm_clk_get(&pdev->dev, "rtc");
491 if (IS_ERR(rtc_clk)) {
492 dev_err(&pdev->dev, "failed to find rtc clock source\n");
493 ret = PTR_ERR(rtc_clk);
498 clk_prepare_enable(rtc_clk);
500 /* check to see if everything is setup correctly */
502 s3c_rtc_enable(pdev, 1);
504 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
505 readw(s3c_rtc_base + S3C2410_RTCCON));
507 device_init_wakeup(&pdev->dev, 1);
509 /* register RTC and exit */
511 rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
515 dev_err(&pdev->dev, "cannot attach rtc\n");
520 s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
524 s3c_rtc_gettime(NULL, &rtc_tm);
526 if (rtc_valid_tm(&rtc_tm)) {
527 rtc_tm.tm_year = 100;
534 s3c_rtc_settime(NULL, &rtc_tm);
536 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
539 if (s3c_rtc_cpu_type != TYPE_S3C2410)
540 rtc->max_user_freq = 32768;
542 rtc->max_user_freq = 128;
544 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
545 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
546 tmp |= S3C2443_RTCCON_TICSEL;
547 writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
550 platform_set_drvdata(pdev, rtc);
552 s3c_rtc_setfreq(&pdev->dev, 1);
554 ret = devm_request_irq(&pdev->dev, s3c_rtc_alarmno, s3c_rtc_alarmirq,
555 0, "s3c2410-rtc alarm", rtc);
557 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
561 ret = devm_request_irq(&pdev->dev, s3c_rtc_tickno, s3c_rtc_tickirq,
562 0, "s3c2410-rtc tick", rtc);
564 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
568 clk_disable(rtc_clk);
573 platform_set_drvdata(pdev, NULL);
576 s3c_rtc_enable(pdev, 0);
577 clk_disable_unprepare(rtc_clk);
582 #ifdef CONFIG_PM_SLEEP
583 /* RTC Power management control */
585 static int ticnt_save, ticnt_en_save;
588 static int s3c_rtc_suspend(struct device *dev)
590 struct platform_device *pdev = to_platform_device(dev);
593 /* save TICNT for anyone using periodic interrupts */
594 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
595 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
596 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
597 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
599 s3c_rtc_enable(pdev, 0);
601 if (device_may_wakeup(dev) && !wake_en) {
602 if (enable_irq_wake(s3c_rtc_alarmno) == 0)
605 dev_err(dev, "enable_irq_wake failed\n");
607 clk_disable(rtc_clk);
612 static int s3c_rtc_resume(struct device *dev)
614 struct platform_device *pdev = to_platform_device(dev);
618 s3c_rtc_enable(pdev, 1);
619 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
620 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
621 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
622 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
625 if (device_may_wakeup(dev) && wake_en) {
626 disable_irq_wake(s3c_rtc_alarmno);
629 clk_disable(rtc_clk);
635 static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
638 static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {
639 [TYPE_S3C2410] = { TYPE_S3C2410 },
640 [TYPE_S3C2416] = { TYPE_S3C2416 },
641 [TYPE_S3C2443] = { TYPE_S3C2443 },
642 [TYPE_S3C64XX] = { TYPE_S3C64XX },
645 static const struct of_device_id s3c_rtc_dt_match[] = {
647 .compatible = "samsung,s3c2410-rtc",
648 .data = &s3c_rtc_drv_data_array[TYPE_S3C2410],
650 .compatible = "samsung,s3c2416-rtc",
651 .data = &s3c_rtc_drv_data_array[TYPE_S3C2416],
653 .compatible = "samsung,s3c2443-rtc",
654 .data = &s3c_rtc_drv_data_array[TYPE_S3C2443],
656 .compatible = "samsung,s3c6410-rtc",
657 .data = &s3c_rtc_drv_data_array[TYPE_S3C64XX],
661 MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
664 static struct platform_device_id s3c_rtc_driver_ids[] = {
666 .name = "s3c2410-rtc",
667 .driver_data = TYPE_S3C2410,
669 .name = "s3c2416-rtc",
670 .driver_data = TYPE_S3C2416,
672 .name = "s3c2443-rtc",
673 .driver_data = TYPE_S3C2443,
675 .name = "s3c64xx-rtc",
676 .driver_data = TYPE_S3C64XX,
681 MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
683 static struct platform_driver s3c_rtc_driver = {
684 .probe = s3c_rtc_probe,
685 .remove = s3c_rtc_remove,
686 .id_table = s3c_rtc_driver_ids,
689 .owner = THIS_MODULE,
690 .pm = &s3c_rtc_pm_ops,
691 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
695 module_platform_driver(s3c_rtc_driver);
697 MODULE_DESCRIPTION("Samsung S3C RTC Driver");
698 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
699 MODULE_LICENSE("GPL");
700 MODULE_ALIAS("platform:s3c2410-rtc");