2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
4 * Copyright (c) 2000 Nils Faerber
6 * Based on rtc.c by Paul Gortmaker
8 * Original Driver by Nils Faerber <nils@kernelconcepts.de>
11 * CIH <cih@coventive.com>
12 * Nicolas Pitre <nico@fluxnic.net>
13 * Andrew Christian <andrew.christian@hp.com>
15 * Converted to the RTC subsystem and Driver Model
16 * by Richard Purdie <rpurdie@rpsys.net>
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
24 #include <linux/platform_device.h>
25 #include <linux/module.h>
26 #include <linux/rtc.h>
27 #include <linux/init.h>
29 #include <linux/interrupt.h>
30 #include <linux/slab.h>
31 #include <linux/string.h>
33 #include <linux/bitops.h>
35 #include <mach/hardware.h>
38 #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
39 #include <mach/regs-rtc.h>
42 #define RTC_DEF_DIVIDER (32768 - 1)
43 #define RTC_DEF_TRIM 0
50 struct rtc_device *rtc;
53 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
55 struct sa1100_rtc *info = dev_get_drvdata(dev_id);
56 struct rtc_device *rtc = info->rtc;
58 unsigned long events = 0;
60 spin_lock(&info->lock);
63 /* clear interrupt sources */
65 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
66 * See also the comments in sa1100_rtc_probe(). */
67 if (rtsr & (RTSR_ALE | RTSR_HZE)) {
68 /* This is the original code, before there was the if test
69 * above. This code does not clear interrupts that were not
71 RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
73 /* For some reason, it is possible to enter this routine
74 * without interruptions enabled, it has been tested with
75 * several units (Bug in SA11xx chip?).
77 * This situation leads to an infinite "loop" of interrupt
78 * routine calling and as a result the processor seems to
79 * lock on its first call to open(). */
80 RTSR = RTSR_AL | RTSR_HZ;
83 /* clear alarm interrupt if it has occurred */
86 RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
88 /* update irq data & counter */
90 events |= RTC_AF | RTC_IRQF;
92 events |= RTC_UF | RTC_IRQF;
94 rtc_update_irq(rtc, 1, events);
96 spin_unlock(&info->lock);
101 static int sa1100_rtc_open(struct device *dev)
103 struct sa1100_rtc *info = dev_get_drvdata(dev);
104 struct rtc_device *rtc = info->rtc;
107 ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, IRQF_DISABLED,
110 dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz);
113 ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, IRQF_DISABLED,
116 dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm);
119 rtc->max_user_freq = RTC_FREQ;
120 rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
125 free_irq(info->irq_1hz, dev);
130 static void sa1100_rtc_release(struct device *dev)
132 struct sa1100_rtc *info = dev_get_drvdata(dev);
134 spin_lock_irq(&info->lock);
136 spin_unlock_irq(&info->lock);
138 free_irq(info->irq_alarm, dev);
139 free_irq(info->irq_1hz, dev);
142 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
144 struct sa1100_rtc *info = dev_get_drvdata(dev);
146 spin_lock_irq(&info->lock);
151 spin_unlock_irq(&info->lock);
155 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
157 rtc_time_to_tm(RCNR, tm);
161 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
166 ret = rtc_tm_to_time(tm, &time);
172 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
177 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
178 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
182 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
184 struct sa1100_rtc *info = dev_get_drvdata(dev);
188 spin_lock_irq(&info->lock);
189 ret = rtc_tm_to_time(&alrm->time, &time);
192 RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
199 spin_unlock_irq(&info->lock);
204 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
206 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
207 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
212 static const struct rtc_class_ops sa1100_rtc_ops = {
213 .open = sa1100_rtc_open,
214 .release = sa1100_rtc_release,
215 .read_time = sa1100_rtc_read_time,
216 .set_time = sa1100_rtc_set_time,
217 .read_alarm = sa1100_rtc_read_alarm,
218 .set_alarm = sa1100_rtc_set_alarm,
219 .proc = sa1100_rtc_proc,
220 .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
223 static int sa1100_rtc_probe(struct platform_device *pdev)
225 struct rtc_device *rtc;
226 struct sa1100_rtc *info;
227 int irq_1hz, irq_alarm, ret = 0;
229 irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
230 irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
231 if (irq_1hz < 0 || irq_alarm < 0)
234 info = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
237 info->irq_1hz = irq_1hz;
238 info->irq_alarm = irq_alarm;
239 spin_lock_init(&info->lock);
240 platform_set_drvdata(pdev, info);
243 * According to the manual we should be able to let RTTR be zero
244 * and then a default diviser for a 32.768KHz clock is used.
245 * Apparently this doesn't work, at least for my SA1110 rev 5.
246 * If the clock divider is uninitialized then reset it to the
247 * default value to get the 1Hz clock.
250 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
251 dev_warn(&pdev->dev, "warning: "
252 "initializing default clock divider/trim value\n");
253 /* The current RTC value probably doesn't make sense either */
257 device_init_wakeup(&pdev->dev, 1);
259 rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
268 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
269 * See also the comments in sa1100_rtc_interrupt().
271 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
272 * interrupt pending, even though interrupts were never enabled.
273 * In this case, this bit it must be reset before enabling
274 * interruptions to avoid a nonexistent interrupt to occur.
276 * In principle, the same problem would apply to bit 0, although it has
277 * never been observed to happen.
279 * This issue is addressed both here and in sa1100_rtc_interrupt().
280 * If the issue is not addressed here, in the times when the processor
281 * wakes up with the bit set there will be one spurious interrupt.
283 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
284 * safe side, once the condition that lead to this strange
285 * initialization is unknown and could in principle happen during
288 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
289 * the corresponding bits in RTSR. */
290 RTSR = RTSR_AL | RTSR_HZ;
294 platform_set_drvdata(pdev, NULL);
299 static int sa1100_rtc_remove(struct platform_device *pdev)
301 struct sa1100_rtc *info = platform_get_drvdata(pdev);
304 rtc_device_unregister(info->rtc);
305 platform_set_drvdata(pdev, NULL);
313 static int sa1100_rtc_suspend(struct device *dev)
315 struct sa1100_rtc *info = dev_get_drvdata(dev);
316 if (device_may_wakeup(dev))
317 enable_irq_wake(info->irq_alarm);
321 static int sa1100_rtc_resume(struct device *dev)
323 struct sa1100_rtc *info = dev_get_drvdata(dev);
324 if (device_may_wakeup(dev))
325 disable_irq_wake(info->irq_alarm);
329 static const struct dev_pm_ops sa1100_rtc_pm_ops = {
330 .suspend = sa1100_rtc_suspend,
331 .resume = sa1100_rtc_resume,
335 static struct platform_driver sa1100_rtc_driver = {
336 .probe = sa1100_rtc_probe,
337 .remove = sa1100_rtc_remove,
339 .name = "sa1100-rtc",
341 .pm = &sa1100_rtc_pm_ops,
346 module_platform_driver(sa1100_rtc_driver);
348 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
349 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
350 MODULE_LICENSE("GPL");
351 MODULE_ALIAS("platform:sa1100-rtc");