drivers/scsi/be2iscsi/be_main.c

   1 /**
   2  * Copyright (C) 2005 - 2015 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Written by: Jayamohan Kallickal (jayamohan.kallickal@avagotech.com)
  11  *
  12  * Contact Information:
  13  * linux-drivers@avagotech.com
  14  *
  15  * Emulex
  16  * 3333 Susan Street
  17  * Costa Mesa, CA 92626
  18  */
  19
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/blkdev.h>
  25 #include <linux/pci.h>
  26 #include <linux/string.h>
  27 #include <linux/kernel.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/iscsi_boot_sysfs.h>
  30 #include <linux/module.h>
  31 #include <linux/bsg-lib.h>
  32 #include <linux/irq_poll.h>
  33
  34 #include <scsi/libiscsi.h>
  35 #include <scsi/scsi_bsg_iscsi.h>
  36 #include <scsi/scsi_netlink.h>
  37 #include <scsi/scsi_transport_iscsi.h>
  38 #include <scsi/scsi_transport.h>
  39 #include <scsi/scsi_cmnd.h>
  40 #include <scsi/scsi_device.h>
  41 #include <scsi/scsi_host.h>
  42 #include <scsi/scsi.h>
  43 #include "be_main.h"
  44 #include "be_iscsi.h"
  45 #include "be_mgmt.h"
  46 #include "be_cmds.h"
  47
  48 static unsigned int be_iopoll_budget = 10;
  49 static unsigned int be_max_phys_size = 64;
  50 static unsigned int enable_msix = 1;
  51
  52 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  53 MODULE_VERSION(BUILD_STR);
  54 MODULE_AUTHOR("Emulex Corporation");
  55 MODULE_LICENSE("GPL");
  56 module_param(be_iopoll_budget, int, 0);
  57 module_param(enable_msix, int, 0);
  58 module_param(be_max_phys_size, uint, S_IRUGO);
  59 MODULE_PARM_DESC(be_max_phys_size,
  60                 "Maximum Size (In Kilobytes) of physically contiguous "
  61                 "memory that can be allocated. Range is 16 - 128");
  62
  63 #define beiscsi_disp_param(_name)\
  64 ssize_t \
  65 beiscsi_##_name##_disp(struct device *dev,\
  66                         struct device_attribute *attrib, char *buf)     \
  67 {       \
  68         struct Scsi_Host *shost = class_to_shost(dev);\
  69         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  70         uint32_t param_val = 0; \
  71         param_val = phba->attr_##_name;\
  72         return snprintf(buf, PAGE_SIZE, "%d\n",\
  73                         phba->attr_##_name);\
  74 }
  75
  76 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  77 int \
  78 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  79 {\
  80         if (val >= _minval && val <= _maxval) {\
  81                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  82                             "BA_%d : beiscsi_"#_name" updated "\
  83                             "from 0x%x ==> 0x%x\n",\
  84                             phba->attr_##_name, val); \
  85                 phba->attr_##_name = val;\
  86                 return 0;\
  87         } \
  88         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  89                     "BA_%d beiscsi_"#_name" attribute "\
  90                     "cannot be updated to 0x%x, "\
  91                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  92                 return -EINVAL;\
  93 }
  94
  95 #define beiscsi_store_param(_name)  \
  96 ssize_t \
  97 beiscsi_##_name##_store(struct device *dev,\
  98                          struct device_attribute *attr, const char *buf,\
  99                          size_t count) \
 100 { \
 101         struct Scsi_Host  *shost = class_to_shost(dev);\
 102         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
 103         uint32_t param_val = 0;\
 104         if (!isdigit(buf[0]))\
 105                 return -EINVAL;\
 106         if (sscanf(buf, "%i", &param_val) != 1)\
 107                 return -EINVAL;\
 108         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 109                 return strlen(buf);\
 110         else \
 111                 return -EINVAL;\
 112 }
 113
 114 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 115 int \
 116 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 117 { \
 118         if (val >= _minval && val <= _maxval) {\
 119                 phba->attr_##_name = val;\
 120                 return 0;\
 121         } \
 122         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 123                     "BA_%d beiscsi_"#_name" attribute " \
 124                     "cannot be updated to 0x%x, "\
 125                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 126         phba->attr_##_name = _defval;\
 127         return -EINVAL;\
 128 }
 129
 130 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 131 static uint beiscsi_##_name = _defval;\
 132 module_param(beiscsi_##_name, uint, S_IRUGO);\
 133 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 134 beiscsi_disp_param(_name)\
 135 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 136 beiscsi_store_param(_name)\
 137 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 138 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 139               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 140
 141 /*
 142  * When new log level added update the
 143  * the MAX allowed value for log_enable
 144  */
 145 BEISCSI_RW_ATTR(log_enable, 0x00,
 146                 0xFF, 0x00, "Enable logging Bit Mask\n"
 147                 "\t\t\t\tInitialization Events  : 0x01\n"
 148                 "\t\t\t\tMailbox Events         : 0x02\n"
 149                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 150                 "\t\t\t\tError Handling         : 0x08\n"
 151                 "\t\t\t\tIO Path Events         : 0x10\n"
 152                 "\t\t\t\tConfiguration Path     : 0x20\n"
 153                 "\t\t\t\tiSCSI Protocol         : 0x40\n");
 154
 155 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
 156 DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
 157 DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
 158 DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
 159 DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
 160              beiscsi_active_session_disp, NULL);
 161 DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
 162              beiscsi_free_session_disp, NULL);
 163 struct device_attribute *beiscsi_attrs[] = {
 164         &dev_attr_beiscsi_log_enable,
 165         &dev_attr_beiscsi_drvr_ver,
 166         &dev_attr_beiscsi_adapter_family,
 167         &dev_attr_beiscsi_fw_ver,
 168         &dev_attr_beiscsi_active_session_count,
 169         &dev_attr_beiscsi_free_session_count,
 170         &dev_attr_beiscsi_phys_port,
 171         NULL,
 172 };
 173
 174 static char const *cqe_desc[] = {
 175         "RESERVED_DESC",
 176         "SOL_CMD_COMPLETE",
 177         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 178         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 179         "CXN_KILLED_BURST_LEN_MISMATCH",
 180         "CXN_KILLED_AHS_RCVD",
 181         "CXN_KILLED_HDR_DIGEST_ERR",
 182         "CXN_KILLED_UNKNOWN_HDR",
 183         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 184         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 185         "CXN_KILLED_RST_RCVD",
 186         "CXN_KILLED_TIMED_OUT",
 187         "CXN_KILLED_RST_SENT",
 188         "CXN_KILLED_FIN_RCVD",
 189         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 190         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 191         "CXN_KILLED_OVER_RUN_RESIDUAL",
 192         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 193         "CMD_KILLED_INVALID_STATSN_RCVD",
 194         "CMD_KILLED_INVALID_R2T_RCVD",
 195         "CMD_CXN_KILLED_LUN_INVALID",
 196         "CMD_CXN_KILLED_ICD_INVALID",
 197         "CMD_CXN_KILLED_ITT_INVALID",
 198         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 199         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 200         "CXN_INVALIDATE_NOTIFY",
 201         "CXN_INVALIDATE_INDEX_NOTIFY",
 202         "CMD_INVALIDATED_NOTIFY",
 203         "UNSOL_HDR_NOTIFY",
 204         "UNSOL_DATA_NOTIFY",
 205         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 206         "DRIVERMSG_NOTIFY",
 207         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 208         "SOL_CMD_KILLED_DIF_ERR",
 209         "CXN_KILLED_SYN_RCVD",
 210         "CXN_KILLED_IMM_DATA_RCVD"
 211 };
 212
 213 static int beiscsi_slave_configure(struct scsi_device *sdev)
 214 {
 215         blk_queue_max_segment_size(sdev->request_queue, 65536);
 216         return 0;
 217 }
 218
 219 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 220 {
 221         struct iscsi_cls_session *cls_session;
 222         struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
 223         struct beiscsi_io_task *aborted_io_task;
 224         struct iscsi_conn *conn;
 225         struct beiscsi_conn *beiscsi_conn;
 226         struct beiscsi_hba *phba;
 227         struct iscsi_session *session;
 228         struct invalidate_command_table *inv_tbl;
 229         struct be_dma_mem nonemb_cmd;
 230         unsigned int cid, tag, num_invalidate;
 231         int rc;
 232
 233         cls_session = starget_to_session(scsi_target(sc->device));
 234         session = cls_session->dd_data;
 235
 236         spin_lock_bh(&session->frwd_lock);
 237         if (!aborted_task || !aborted_task->sc) {
 238                 /* we raced */
 239                 spin_unlock_bh(&session->frwd_lock);
 240                 return SUCCESS;
 241         }
 242
 243         aborted_io_task = aborted_task->dd_data;
 244         if (!aborted_io_task->scsi_cmnd) {
 245                 /* raced or invalid command */
 246                 spin_unlock_bh(&session->frwd_lock);
 247                 return SUCCESS;
 248         }
 249         spin_unlock_bh(&session->frwd_lock);
 250         /* Invalidate WRB Posted for this Task */
 251         AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 252                       aborted_io_task->pwrb_handle->pwrb,
 253                       1);
 254
 255         conn = aborted_task->conn;
 256         beiscsi_conn = conn->dd_data;
 257         phba = beiscsi_conn->phba;
 258
 259         /* invalidate iocb */
 260         cid = beiscsi_conn->beiscsi_conn_cid;
 261         inv_tbl = phba->inv_tbl;
 262         memset(inv_tbl, 0x0, sizeof(*inv_tbl));
 263         inv_tbl->cid = cid;
 264         inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
 265         num_invalidate = 1;
 266         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 267                                 sizeof(struct invalidate_commands_params_in),
 268                                 &nonemb_cmd.dma);
 269         if (nonemb_cmd.va == NULL) {
 270                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 271                             "BM_%d : Failed to allocate memory for"
 272                             "mgmt_invalidate_icds\n");
 273                 return FAILED;
 274         }
 275         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 276
 277         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 278                                    cid, &nonemb_cmd);
 279         if (!tag) {
 280                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 281                             "BM_%d : mgmt_invalidate_icds could not be"
 282                             "submitted\n");
 283                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 284                                     nonemb_cmd.va, nonemb_cmd.dma);
 285
 286                 return FAILED;
 287         }
 288
 289         rc = beiscsi_mccq_compl(phba, tag, NULL, &nonemb_cmd);
 290         if (rc != -EBUSY)
 291                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 292                                     nonemb_cmd.va, nonemb_cmd.dma);
 293
 294         return iscsi_eh_abort(sc);
 295 }
 296
 297 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 298 {
 299         struct iscsi_task *abrt_task;
 300         struct beiscsi_io_task *abrt_io_task;
 301         struct iscsi_conn *conn;
 302         struct beiscsi_conn *beiscsi_conn;
 303         struct beiscsi_hba *phba;
 304         struct iscsi_session *session;
 305         struct iscsi_cls_session *cls_session;
 306         struct invalidate_command_table *inv_tbl;
 307         struct be_dma_mem nonemb_cmd;
 308         unsigned int cid, tag, i, num_invalidate;
 309         int rc;
 310
 311         /* invalidate iocbs */
 312         cls_session = starget_to_session(scsi_target(sc->device));
 313         session = cls_session->dd_data;
 314         spin_lock_bh(&session->frwd_lock);
 315         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 316                 spin_unlock_bh(&session->frwd_lock);
 317                 return FAILED;
 318         }
 319         conn = session->leadconn;
 320         beiscsi_conn = conn->dd_data;
 321         phba = beiscsi_conn->phba;
 322         cid = beiscsi_conn->beiscsi_conn_cid;
 323         inv_tbl = phba->inv_tbl;
 324         memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
 325         num_invalidate = 0;
 326         for (i = 0; i < conn->session->cmds_max; i++) {
 327                 abrt_task = conn->session->cmds[i];
 328                 abrt_io_task = abrt_task->dd_data;
 329                 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
 330                         continue;
 331
 332                 if (sc->device->lun != abrt_task->sc->device->lun)
 333                         continue;
 334
 335                 /* Invalidate WRB Posted for this Task */
 336                 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 337                               abrt_io_task->pwrb_handle->pwrb,
 338                               1);
 339
 340                 inv_tbl->cid = cid;
 341                 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
 342                 num_invalidate++;
 343                 inv_tbl++;
 344         }
 345         spin_unlock_bh(&session->frwd_lock);
 346         inv_tbl = phba->inv_tbl;
 347
 348         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 349                                 sizeof(struct invalidate_commands_params_in),
 350                                 &nonemb_cmd.dma);
 351         if (nonemb_cmd.va == NULL) {
 352                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 353                             "BM_%d : Failed to allocate memory for"
 354                             "mgmt_invalidate_icds\n");
 355                 return FAILED;
 356         }
 357         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 358         memset(nonemb_cmd.va, 0, nonemb_cmd.size);
 359         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 360                                    cid, &nonemb_cmd);
 361         if (!tag) {
 362                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 363                             "BM_%d : mgmt_invalidate_icds could not be"
 364                             " submitted\n");
 365                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 366                                     nonemb_cmd.va, nonemb_cmd.dma);
 367                 return FAILED;
 368         }
 369
 370         rc = beiscsi_mccq_compl(phba, tag, NULL, &nonemb_cmd);
 371         if (rc != -EBUSY)
 372                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 373                                     nonemb_cmd.va, nonemb_cmd.dma);
 374         return iscsi_eh_device_reset(sc);
 375 }
 376
 377 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
 378 {
 379         struct beiscsi_hba *phba = data;
 380         struct mgmt_session_info *boot_sess = &phba->boot_sess;
 381         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
 382         char *str = buf;
 383         int rc;
 384
 385         switch (type) {
 386         case ISCSI_BOOT_TGT_NAME:
 387                 rc = sprintf(buf, "%.*s\n",
 388                             (int)strlen(boot_sess->target_name),
 389                             (char *)&boot_sess->target_name);
 390                 break;
 391         case ISCSI_BOOT_TGT_IP_ADDR:
 392                 if (boot_conn->dest_ipaddr.ip_type == 0x1)
 393                         rc = sprintf(buf, "%pI4\n",
 394                                 (char *)&boot_conn->dest_ipaddr.addr);
 395                 else
 396                         rc = sprintf(str, "%pI6\n",
 397                                 (char *)&boot_conn->dest_ipaddr.addr);
 398                 break;
 399         case ISCSI_BOOT_TGT_PORT:
 400                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
 401                 break;
 402
 403         case ISCSI_BOOT_TGT_CHAP_NAME:
 404                 rc = sprintf(str,  "%.*s\n",
 405                              boot_conn->negotiated_login_options.auth_data.chap.
 406                              target_chap_name_length,
 407                              (char *)&boot_conn->negotiated_login_options.
 408                              auth_data.chap.target_chap_name);
 409                 break;
 410         case ISCSI_BOOT_TGT_CHAP_SECRET:
 411                 rc = sprintf(str,  "%.*s\n",
 412                              boot_conn->negotiated_login_options.auth_data.chap.
 413                              target_secret_length,
 414                              (char *)&boot_conn->negotiated_login_options.
 415                              auth_data.chap.target_secret);
 416                 break;
 417         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 418                 rc = sprintf(str,  "%.*s\n",
 419                              boot_conn->negotiated_login_options.auth_data.chap.
 420                              intr_chap_name_length,
 421                              (char *)&boot_conn->negotiated_login_options.
 422                              auth_data.chap.intr_chap_name);
 423                 break;
 424         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 425                 rc = sprintf(str,  "%.*s\n",
 426                              boot_conn->negotiated_login_options.auth_data.chap.
 427                              intr_secret_length,
 428                              (char *)&boot_conn->negotiated_login_options.
 429                              auth_data.chap.intr_secret);
 430                 break;
 431         case ISCSI_BOOT_TGT_FLAGS:
 432                 rc = sprintf(str, "2\n");
 433                 break;
 434         case ISCSI_BOOT_TGT_NIC_ASSOC:
 435                 rc = sprintf(str, "0\n");
 436                 break;
 437         default:
 438                 rc = -ENOSYS;
 439                 break;
 440         }
 441         return rc;
 442 }
 443
 444 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
 445 {
 446         struct beiscsi_hba *phba = data;
 447         char *str = buf;
 448         int rc;
 449
 450         switch (type) {
 451         case ISCSI_BOOT_INI_INITIATOR_NAME:
 452                 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
 453                 break;
 454         default:
 455                 rc = -ENOSYS;
 456                 break;
 457         }
 458         return rc;
 459 }
 460
 461 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
 462 {
 463         struct beiscsi_hba *phba = data;
 464         char *str = buf;
 465         int rc;
 466
 467         switch (type) {
 468         case ISCSI_BOOT_ETH_FLAGS:
 469                 rc = sprintf(str, "2\n");
 470                 break;
 471         case ISCSI_BOOT_ETH_INDEX:
 472                 rc = sprintf(str, "0\n");
 473                 break;
 474         case ISCSI_BOOT_ETH_MAC:
 475                 rc  = beiscsi_get_macaddr(str, phba);
 476                 break;
 477         default:
 478                 rc = -ENOSYS;
 479                 break;
 480         }
 481         return rc;
 482 }
 483
 484
 485 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
 486 {
 487         umode_t rc;
 488
 489         switch (type) {
 490         case ISCSI_BOOT_TGT_NAME:
 491         case ISCSI_BOOT_TGT_IP_ADDR:
 492         case ISCSI_BOOT_TGT_PORT:
 493         case ISCSI_BOOT_TGT_CHAP_NAME:
 494         case ISCSI_BOOT_TGT_CHAP_SECRET:
 495         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 496         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 497         case ISCSI_BOOT_TGT_NIC_ASSOC:
 498         case ISCSI_BOOT_TGT_FLAGS:
 499                 rc = S_IRUGO;
 500                 break;
 501         default:
 502                 rc = 0;
 503                 break;
 504         }
 505         return rc;
 506 }
 507
 508 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
 509 {
 510         umode_t rc;
 511
 512         switch (type) {
 513         case ISCSI_BOOT_INI_INITIATOR_NAME:
 514                 rc = S_IRUGO;
 515                 break;
 516         default:
 517                 rc = 0;
 518                 break;
 519         }
 520         return rc;
 521 }
 522
 523
 524 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
 525 {
 526         umode_t rc;
 527
 528         switch (type) {
 529         case ISCSI_BOOT_ETH_FLAGS:
 530         case ISCSI_BOOT_ETH_MAC:
 531         case ISCSI_BOOT_ETH_INDEX:
 532                 rc = S_IRUGO;
 533                 break;
 534         default:
 535                 rc = 0;
 536                 break;
 537         }
 538         return rc;
 539 }
 540
 541 /*------------------- PCI Driver operations and data ----------------- */
 542 static const struct pci_device_id beiscsi_pci_id_table[] = {
 543         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 544         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 545         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 546         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 547         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 548         { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
 549         { 0 }
 550 };
 551 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 552
 553
 554 static struct scsi_host_template beiscsi_sht = {
 555         .module = THIS_MODULE,
 556         .name = "Emulex 10Gbe open-iscsi Initiator Driver",
 557         .proc_name = DRV_NAME,
 558         .queuecommand = iscsi_queuecommand,
 559         .change_queue_depth = scsi_change_queue_depth,
 560         .slave_configure = beiscsi_slave_configure,
 561         .target_alloc = iscsi_target_alloc,
 562         .eh_abort_handler = beiscsi_eh_abort,
 563         .eh_device_reset_handler = beiscsi_eh_device_reset,
 564         .eh_target_reset_handler = iscsi_eh_session_reset,
 565         .shost_attrs = beiscsi_attrs,
 566         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 567         .can_queue = BE2_IO_DEPTH,
 568         .this_id = -1,
 569         .max_sectors = BEISCSI_MAX_SECTORS,
 570         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 571         .use_clustering = ENABLE_CLUSTERING,
 572         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 573         .track_queue_depth = 1,
 574 };
 575
 576 static struct scsi_transport_template *beiscsi_scsi_transport;
 577
 578 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 579 {
 580         struct beiscsi_hba *phba;
 581         struct Scsi_Host *shost;
 582
 583         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 584         if (!shost) {
 585                 dev_err(&pcidev->dev,
 586                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 587                 return NULL;
 588         }
 589         shost->max_id = BE2_MAX_SESSIONS;
 590         shost->max_channel = 0;
 591         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 592         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 593         shost->transportt = beiscsi_scsi_transport;
 594         phba = iscsi_host_priv(shost);
 595         memset(phba, 0, sizeof(*phba));
 596         phba->shost = shost;
 597         phba->pcidev = pci_dev_get(pcidev);
 598         pci_set_drvdata(pcidev, phba);
 599         phba->interface_handle = 0xFFFFFFFF;
 600
 601         return phba;
 602 }
 603
 604 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 605 {
 606         if (phba->csr_va) {
 607                 iounmap(phba->csr_va);
 608                 phba->csr_va = NULL;
 609         }
 610         if (phba->db_va) {
 611                 iounmap(phba->db_va);
 612                 phba->db_va = NULL;
 613         }
 614         if (phba->pci_va) {
 615                 iounmap(phba->pci_va);
 616                 phba->pci_va = NULL;
 617         }
 618 }
 619
 620 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 621                                 struct pci_dev *pcidev)
 622 {
 623         u8 __iomem *addr;
 624         int pcicfg_reg;
 625
 626         addr = ioremap_nocache(pci_resource_start(pcidev, 2),
 627                                pci_resource_len(pcidev, 2));
 628         if (addr == NULL)
 629                 return -ENOMEM;
 630         phba->ctrl.csr = addr;
 631         phba->csr_va = addr;
 632         phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
 633
 634         addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
 635         if (addr == NULL)
 636                 goto pci_map_err;
 637         phba->ctrl.db = addr;
 638         phba->db_va = addr;
 639         phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);
 640
 641         if (phba->generation == BE_GEN2)
 642                 pcicfg_reg = 1;
 643         else
 644                 pcicfg_reg = 0;
 645
 646         addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
 647                                pci_resource_len(pcidev, pcicfg_reg));
 648
 649         if (addr == NULL)
 650                 goto pci_map_err;
 651         phba->ctrl.pcicfg = addr;
 652         phba->pci_va = addr;
 653         phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
 654         return 0;
 655
 656 pci_map_err:
 657         beiscsi_unmap_pci_function(phba);
 658         return -ENOMEM;
 659 }
 660
 661 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 662 {
 663         int ret;
 664
 665         ret = pci_enable_device(pcidev);
 666         if (ret) {
 667                 dev_err(&pcidev->dev,
 668                         "beiscsi_enable_pci - enable device failed\n");
 669                 return ret;
 670         }
 671
 672         ret = pci_request_regions(pcidev, DRV_NAME);
 673         if (ret) {
 674                 dev_err(&pcidev->dev,
 675                                 "beiscsi_enable_pci - request region failed\n");
 676                 goto pci_dev_disable;
 677         }
 678
 679         pci_set_master(pcidev);
 680         ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
 681         if (ret) {
 682                 ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
 683                 if (ret) {
 684                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 685                         goto pci_region_release;
 686                 } else {
 687                         ret = pci_set_consistent_dma_mask(pcidev,
 688                                                           DMA_BIT_MASK(32));
 689                 }
 690         } else {
 691                 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
 692                 if (ret) {
 693                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 694                         goto pci_region_release;
 695                 }
 696         }
 697         return 0;
 698
 699 pci_region_release:
 700         pci_release_regions(pcidev);
 701 pci_dev_disable:
 702         pci_disable_device(pcidev);
 703
 704         return ret;
 705 }
 706
 707 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 708 {
 709         struct be_ctrl_info *ctrl = &phba->ctrl;
 710         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 711         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 712         int status = 0;
 713
 714         ctrl->pdev = pdev;
 715         status = beiscsi_map_pci_bars(phba, pdev);
 716         if (status)
 717                 return status;
 718         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 719         mbox_mem_alloc->va = pci_alloc_consistent(pdev,
 720                                                   mbox_mem_alloc->size,
 721                                                   &mbox_mem_alloc->dma);
 722         if (!mbox_mem_alloc->va) {
 723                 beiscsi_unmap_pci_function(phba);
 724                 return -ENOMEM;
 725         }
 726
 727         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 728         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 729         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 730         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 731         mutex_init(&ctrl->mbox_lock);
 732         spin_lock_init(&phba->ctrl.mcc_lock);
 733         spin_lock_init(&phba->ctrl.mcc_cq_lock);
 734
 735         return status;
 736 }
 737
 738 /**
 739  * beiscsi_get_params()- Set the config paramters
 740  * @phba: ptr  device priv structure
 741  **/
 742 static void beiscsi_get_params(struct beiscsi_hba *phba)
 743 {
 744         uint32_t total_cid_count = 0;
 745         uint32_t total_icd_count = 0;
 746         uint8_t ulp_num = 0;
 747
 748         total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
 749                           BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
 750
 751         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
 752                 uint32_t align_mask = 0;
 753                 uint32_t icd_post_per_page = 0;
 754                 uint32_t icd_count_unavailable = 0;
 755                 uint32_t icd_start = 0, icd_count = 0;
 756                 uint32_t icd_start_align = 0, icd_count_align = 0;
 757
 758                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
 759                         icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
 760                         icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 761
 762                         /* Get ICD count that can be posted on each page */
 763                         icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
 764                                              sizeof(struct iscsi_sge)));
 765                         align_mask = (icd_post_per_page - 1);
 766
 767                         /* Check if icd_start is aligned ICD per page posting */
 768                         if (icd_start % icd_post_per_page) {
 769                                 icd_start_align = ((icd_start +
 770                                                     icd_post_per_page) &
 771                                                     ~(align_mask));
 772                                 phba->fw_config.
 773                                         iscsi_icd_start[ulp_num] =
 774                                         icd_start_align;
 775                         }
 776
 777                         icd_count_align = (icd_count & ~align_mask);
 778
 779                         /* ICD discarded in the process of alignment */
 780                         if (icd_start_align)
 781                                 icd_count_unavailable = ((icd_start_align -
 782                                                           icd_start) +
 783                                                          (icd_count -
 784                                                           icd_count_align));
 785
 786                         /* Updated ICD count available */
 787                         phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
 788                                         icd_count_unavailable);
 789
 790                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 791                                         "BM_%d : Aligned ICD values\n"
 792                                         "\t ICD Start : %d\n"
 793                                         "\t ICD Count : %d\n"
 794                                         "\t ICD Discarded : %d\n",
 795                                         phba->fw_config.
 796                                         iscsi_icd_start[ulp_num],
 797                                         phba->fw_config.
 798                                         iscsi_icd_count[ulp_num],
 799                                         icd_count_unavailable);
 800                         break;
 801                 }
 802         }
 803
 804         total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 805         phba->params.ios_per_ctrl = (total_icd_count -
 806                                     (total_cid_count +
 807                                      BE2_TMFS + BE2_NOPOUT_REQ));
 808         phba->params.cxns_per_ctrl = total_cid_count;
 809         phba->params.asyncpdus_per_ctrl = total_cid_count;
 810         phba->params.icds_per_ctrl = total_icd_count;
 811         phba->params.num_sge_per_io = BE2_SGE;
 812         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 813         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 814         phba->params.eq_timer = 64;
 815         phba->params.num_eq_entries = 1024;
 816         phba->params.num_cq_entries = 1024;
 817         phba->params.wrbs_per_cxn = 256;
 818 }
 819
 820 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 821                            unsigned int id, unsigned int clr_interrupt,
 822                            unsigned int num_processed,
 823                            unsigned char rearm, unsigned char event)
 824 {
 825         u32 val = 0;
 826
 827         if (rearm)
 828                 val |= 1 << DB_EQ_REARM_SHIFT;
 829         if (clr_interrupt)
 830                 val |= 1 << DB_EQ_CLR_SHIFT;
 831         if (event)
 832                 val |= 1 << DB_EQ_EVNT_SHIFT;
 833
 834         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 835         /* Setting lower order EQ_ID Bits */
 836         val |= (id & DB_EQ_RING_ID_LOW_MASK);
 837
 838         /* Setting Higher order EQ_ID Bits */
 839         val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
 840                   DB_EQ_RING_ID_HIGH_MASK)
 841                   << DB_EQ_HIGH_SET_SHIFT);
 842
 843         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 844 }
 845
 846 /**
 847  * be_isr_mcc - The isr routine of the driver.
 848  * @irq: Not used
 849  * @dev_id: Pointer to host adapter structure
 850  */
 851 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 852 {
 853         struct beiscsi_hba *phba;
 854         struct be_eq_entry *eqe = NULL;
 855         struct be_queue_info *eq;
 856         struct be_queue_info *mcc;
 857         unsigned int num_eq_processed;
 858         struct be_eq_obj *pbe_eq;
 859         unsigned long flags;
 860
 861         pbe_eq = dev_id;
 862         eq = &pbe_eq->q;
 863         phba =  pbe_eq->phba;
 864         mcc = &phba->ctrl.mcc_obj.cq;
 865         eqe = queue_tail_node(eq);
 866
 867         num_eq_processed = 0;
 868
 869         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 870                                 & EQE_VALID_MASK) {
 871                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 872                      resource_id) / 32] &
 873                      EQE_RESID_MASK) >> 16) == mcc->id) {
 874                         spin_lock_irqsave(&phba->isr_lock, flags);
 875                         pbe_eq->todo_mcc_cq = true;
 876                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 877                 }
 878                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 879                 queue_tail_inc(eq);
 880                 eqe = queue_tail_node(eq);
 881                 num_eq_processed++;
 882         }
 883         if (pbe_eq->todo_mcc_cq)
 884                 queue_work(phba->wq, &pbe_eq->work_cqs);
 885         if (num_eq_processed)
 886                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
 887
 888         return IRQ_HANDLED;
 889 }
 890
 891 /**
 892  * be_isr_msix - The isr routine of the driver.
 893  * @irq: Not used
 894  * @dev_id: Pointer to host adapter structure
 895  */
 896 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 897 {
 898         struct beiscsi_hba *phba;
 899         struct be_queue_info *eq;
 900         struct be_eq_obj *pbe_eq;
 901
 902         pbe_eq = dev_id;
 903         eq = &pbe_eq->q;
 904
 905         phba = pbe_eq->phba;
 906
 907         /* disable interrupt till iopoll completes */
 908         hwi_ring_eq_db(phba, eq->id, 1, 0, 0, 1);
 909         irq_poll_sched(&pbe_eq->iopoll);
 910
 911         return IRQ_HANDLED;
 912 }
 913
 914 /**
 915  * be_isr - The isr routine of the driver.
 916  * @irq: Not used
 917  * @dev_id: Pointer to host adapter structure
 918  */
 919 static irqreturn_t be_isr(int irq, void *dev_id)
 920 {
 921         struct beiscsi_hba *phba;
 922         struct hwi_controller *phwi_ctrlr;
 923         struct hwi_context_memory *phwi_context;
 924         struct be_eq_entry *eqe = NULL;
 925         struct be_queue_info *eq;
 926         struct be_queue_info *mcc;
 927         unsigned long flags, index;
 928         unsigned int num_mcceq_processed, num_ioeq_processed;
 929         struct be_ctrl_info *ctrl;
 930         struct be_eq_obj *pbe_eq;
 931         int isr;
 932
 933         phba = dev_id;
 934         ctrl = &phba->ctrl;
 935         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 936                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 937         if (!isr)
 938                 return IRQ_NONE;
 939
 940         phwi_ctrlr = phba->phwi_ctrlr;
 941         phwi_context = phwi_ctrlr->phwi_ctxt;
 942         pbe_eq = &phwi_context->be_eq[0];
 943
 944         eq = &phwi_context->be_eq[0].q;
 945         mcc = &phba->ctrl.mcc_obj.cq;
 946         index = 0;
 947         eqe = queue_tail_node(eq);
 948
 949         num_ioeq_processed = 0;
 950         num_mcceq_processed = 0;
 951         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 952                                 & EQE_VALID_MASK) {
 953                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 954                      resource_id) / 32] &
 955                      EQE_RESID_MASK) >> 16) == mcc->id) {
 956                         spin_lock_irqsave(&phba->isr_lock, flags);
 957                         pbe_eq->todo_mcc_cq = true;
 958                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 959                         num_mcceq_processed++;
 960                 } else {
 961                         irq_poll_sched(&pbe_eq->iopoll);
 962                         num_ioeq_processed++;
 963                 }
 964                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 965                 queue_tail_inc(eq);
 966                 eqe = queue_tail_node(eq);
 967         }
 968         if (num_ioeq_processed || num_mcceq_processed) {
 969                 if (pbe_eq->todo_mcc_cq)
 970                         queue_work(phba->wq, &pbe_eq->work_cqs);
 971
 972                 if ((num_mcceq_processed) && (!num_ioeq_processed))
 973                         hwi_ring_eq_db(phba, eq->id, 0,
 974                                       (num_ioeq_processed +
 975                                        num_mcceq_processed) , 1, 1);
 976                 else
 977                         hwi_ring_eq_db(phba, eq->id, 0,
 978                                        (num_ioeq_processed +
 979                                         num_mcceq_processed), 0, 1);
 980
 981                 return IRQ_HANDLED;
 982         } else
 983                 return IRQ_NONE;
 984 }
 985
 986
 987 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
 988 {
 989         struct pci_dev *pcidev = phba->pcidev;
 990         struct hwi_controller *phwi_ctrlr;
 991         struct hwi_context_memory *phwi_context;
 992         int ret, msix_vec, i, j;
 993
 994         phwi_ctrlr = phba->phwi_ctrlr;
 995         phwi_context = phwi_ctrlr->phwi_ctxt;
 996
 997         if (phba->msix_enabled) {
 998                 for (i = 0; i < phba->num_cpus; i++) {
 999                         phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
1000                                                     GFP_KERNEL);
1001                         if (!phba->msi_name[i]) {
1002                                 ret = -ENOMEM;
1003                                 goto free_msix_irqs;
1004                         }
1005
1006                         sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
1007                                 phba->shost->host_no, i);
1008                         msix_vec = phba->msix_entries[i].vector;
1009                         ret = request_irq(msix_vec, be_isr_msix, 0,
1010                                           phba->msi_name[i],
1011                                           &phwi_context->be_eq[i]);
1012                         if (ret) {
1013                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1014                                             "BM_%d : beiscsi_init_irqs-Failed to"
1015                                             "register msix for i = %d\n",
1016                                             i);
1017                                 kfree(phba->msi_name[i]);
1018                                 goto free_msix_irqs;
1019                         }
1020                 }
1021                 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
1022                 if (!phba->msi_name[i]) {
1023                         ret = -ENOMEM;
1024                         goto free_msix_irqs;
1025                 }
1026                 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
1027                         phba->shost->host_no);
1028                 msix_vec = phba->msix_entries[i].vector;
1029                 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
1030                                   &phwi_context->be_eq[i]);
1031                 if (ret) {
1032                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
1033                                     "BM_%d : beiscsi_init_irqs-"
1034                                     "Failed to register beiscsi_msix_mcc\n");
1035                         kfree(phba->msi_name[i]);
1036                         goto free_msix_irqs;
1037                 }
1038
1039         } else {
1040                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1041                                   "beiscsi", phba);
1042                 if (ret) {
1043                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1044                                     "BM_%d : beiscsi_init_irqs-"
1045                                     "Failed to register irq\\n");
1046                         return ret;
1047                 }
1048         }
1049         return 0;
1050 free_msix_irqs:
1051         for (j = i - 1; j >= 0; j--) {
1052                 kfree(phba->msi_name[j]);
1053                 msix_vec = phba->msix_entries[j].vector;
1054                 free_irq(msix_vec, &phwi_context->be_eq[j]);
1055         }
1056         return ret;
1057 }
1058
1059 void hwi_ring_cq_db(struct beiscsi_hba *phba,
1060                            unsigned int id, unsigned int num_processed,
1061                            unsigned char rearm)
1062 {
1063         u32 val = 0;
1064
1065         if (rearm)
1066                 val |= 1 << DB_CQ_REARM_SHIFT;
1067
1068         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1069
1070         /* Setting lower order CQ_ID Bits */
1071         val |= (id & DB_CQ_RING_ID_LOW_MASK);
1072
1073         /* Setting Higher order CQ_ID Bits */
1074         val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
1075                   DB_CQ_RING_ID_HIGH_MASK)
1076                   << DB_CQ_HIGH_SET_SHIFT);
1077
1078         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1079 }
1080
1081 static unsigned int
1082 beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1083                           struct beiscsi_hba *phba,
1084                           struct pdu_base *ppdu,
1085                           unsigned long pdu_len,
1086                           void *pbuffer, unsigned long buf_len)
1087 {
1088         struct iscsi_conn *conn = beiscsi_conn->conn;
1089         struct iscsi_session *session = conn->session;
1090         struct iscsi_task *task;
1091         struct beiscsi_io_task *io_task;
1092         struct iscsi_hdr *login_hdr;
1093
1094         switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1095                                                 PDUBASE_OPCODE_MASK) {
1096         case ISCSI_OP_NOOP_IN:
1097                 pbuffer = NULL;
1098                 buf_len = 0;
1099                 break;
1100         case ISCSI_OP_ASYNC_EVENT:
1101                 break;
1102         case ISCSI_OP_REJECT:
1103                 WARN_ON(!pbuffer);
1104                 WARN_ON(!(buf_len == 48));
1105                 beiscsi_log(phba, KERN_ERR,
1106                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1107                             "BM_%d : In ISCSI_OP_REJECT\n");
1108                 break;
1109         case ISCSI_OP_LOGIN_RSP:
1110         case ISCSI_OP_TEXT_RSP:
1111                 task = conn->login_task;
1112                 io_task = task->dd_data;
1113                 login_hdr = (struct iscsi_hdr *)ppdu;
1114                 login_hdr->itt = io_task->libiscsi_itt;
1115                 break;
1116         default:
1117                 beiscsi_log(phba, KERN_WARNING,
1118                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1119                             "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1120                             (ppdu->
1121                              dw[offsetof(struct amap_pdu_base, opcode) / 32]
1122                              & PDUBASE_OPCODE_MASK));
1123                 return 1;
1124         }
1125
1126         spin_lock_bh(&session->back_lock);
1127         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1128         spin_unlock_bh(&session->back_lock);
1129         return 0;
1130 }
1131
1132 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1133 {
1134         struct sgl_handle *psgl_handle;
1135
1136         if (phba->io_sgl_hndl_avbl) {
1137                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1138                             "BM_%d : In alloc_io_sgl_handle,"
1139                             " io_sgl_alloc_index=%d\n",
1140                             phba->io_sgl_alloc_index);
1141
1142                 psgl_handle = phba->io_sgl_hndl_base[phba->
1143                                                 io_sgl_alloc_index];
1144                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1145                 phba->io_sgl_hndl_avbl--;
1146                 if (phba->io_sgl_alloc_index == (phba->params.
1147                                                  ios_per_ctrl - 1))
1148                         phba->io_sgl_alloc_index = 0;
1149                 else
1150                         phba->io_sgl_alloc_index++;
1151         } else
1152                 psgl_handle = NULL;
1153         return psgl_handle;
1154 }
1155
1156 static void
1157 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1158 {
1159         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1160                     "BM_%d : In free_,io_sgl_free_index=%d\n",
1161                     phba->io_sgl_free_index);
1162
1163         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1164                 /*
1165                  * this can happen if clean_task is called on a task that
1166                  * failed in xmit_task or alloc_pdu.
1167                  */
1168                  beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1169                              "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1170                              "value there=%p\n", phba->io_sgl_free_index,
1171                              phba->io_sgl_hndl_base
1172                              [phba->io_sgl_free_index]);
1173                 return;
1174         }
1175         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1176         phba->io_sgl_hndl_avbl++;
1177         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1178                 phba->io_sgl_free_index = 0;
1179         else
1180                 phba->io_sgl_free_index++;
1181 }
1182
1183 static inline struct wrb_handle *
1184 beiscsi_get_wrb_handle(struct hwi_wrb_context *pwrb_context,
1185                        unsigned int wrbs_per_cxn)
1186 {
1187         struct wrb_handle *pwrb_handle;
1188
1189         pwrb_handle = pwrb_context->pwrb_handle_base[pwrb_context->alloc_index];
1190         pwrb_context->wrb_handles_available--;
1191         if (pwrb_context->alloc_index == (wrbs_per_cxn - 1))
1192                 pwrb_context->alloc_index = 0;
1193         else
1194                 pwrb_context->alloc_index++;
1195
1196         return pwrb_handle;
1197 }
1198
1199 /**
1200  * alloc_wrb_handle - To allocate a wrb handle
1201  * @phba: The hba pointer
1202  * @cid: The cid to use for allocation
1203  * @pwrb_context: ptr to ptr to wrb context
1204  *
1205  * This happens under session_lock until submission to chip
1206  */
1207 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
1208                                     struct hwi_wrb_context **pcontext)
1209 {
1210         struct hwi_wrb_context *pwrb_context;
1211         struct hwi_controller *phwi_ctrlr;
1212         uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
1213
1214         phwi_ctrlr = phba->phwi_ctrlr;
1215         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1216         /* return the context address */
1217         *pcontext = pwrb_context;
1218         return beiscsi_get_wrb_handle(pwrb_context, phba->params.wrbs_per_cxn);
1219 }
1220
1221 static inline void
1222 beiscsi_put_wrb_handle(struct hwi_wrb_context *pwrb_context,
1223                        struct wrb_handle *pwrb_handle,
1224                        unsigned int wrbs_per_cxn)
1225 {
1226         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1227         pwrb_context->wrb_handles_available++;
1228         if (pwrb_context->free_index == (wrbs_per_cxn - 1))
1229                 pwrb_context->free_index = 0;
1230         else
1231                 pwrb_context->free_index++;
1232 }
1233
1234 /**
1235  * free_wrb_handle - To free the wrb handle back to pool
1236  * @phba: The hba pointer
1237  * @pwrb_context: The context to free from
1238  * @pwrb_handle: The wrb_handle to free
1239  *
1240  * This happens under session_lock until submission to chip
1241  */
1242 static void
1243 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1244                 struct wrb_handle *pwrb_handle)
1245 {
1246         beiscsi_put_wrb_handle(pwrb_context,
1247                                pwrb_handle,
1248                                phba->params.wrbs_per_cxn);
1249         beiscsi_log(phba, KERN_INFO,
1250                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1251                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1252                     "wrb_handles_available=%d\n",
1253                     pwrb_handle, pwrb_context->free_index,
1254                     pwrb_context->wrb_handles_available);
1255 }
1256
1257 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1258 {
1259         struct sgl_handle *psgl_handle;
1260
1261         if (phba->eh_sgl_hndl_avbl) {
1262                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1263                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1264                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1265                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1266                             phba->eh_sgl_alloc_index,
1267                             phba->eh_sgl_alloc_index);
1268
1269                 phba->eh_sgl_hndl_avbl--;
1270                 if (phba->eh_sgl_alloc_index ==
1271                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1272                      1))
1273                         phba->eh_sgl_alloc_index = 0;
1274                 else
1275                         phba->eh_sgl_alloc_index++;
1276         } else
1277                 psgl_handle = NULL;
1278         return psgl_handle;
1279 }
1280
1281 void
1282 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1283 {
1284
1285         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1286                     "BM_%d : In  free_mgmt_sgl_handle,"
1287                     "eh_sgl_free_index=%d\n",
1288                     phba->eh_sgl_free_index);
1289
1290         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1291                 /*
1292                  * this can happen if clean_task is called on a task that
1293                  * failed in xmit_task or alloc_pdu.
1294                  */
1295                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1296                             "BM_%d : Double Free in eh SGL ,"
1297                             "eh_sgl_free_index=%d\n",
1298                             phba->eh_sgl_free_index);
1299                 return;
1300         }
1301         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1302         phba->eh_sgl_hndl_avbl++;
1303         if (phba->eh_sgl_free_index ==
1304             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1305                 phba->eh_sgl_free_index = 0;
1306         else
1307                 phba->eh_sgl_free_index++;
1308 }
1309
1310 static void
1311 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1312                 struct iscsi_task *task,
1313                 struct common_sol_cqe *csol_cqe)
1314 {
1315         struct beiscsi_io_task *io_task = task->dd_data;
1316         struct be_status_bhs *sts_bhs =
1317                                 (struct be_status_bhs *)io_task->cmd_bhs;
1318         struct iscsi_conn *conn = beiscsi_conn->conn;
1319         unsigned char *sense;
1320         u32 resid = 0, exp_cmdsn, max_cmdsn;
1321         u8 rsp, status, flags;
1322
1323         exp_cmdsn = csol_cqe->exp_cmdsn;
1324         max_cmdsn = (csol_cqe->exp_cmdsn +
1325                      csol_cqe->cmd_wnd - 1);
1326         rsp = csol_cqe->i_resp;
1327         status = csol_cqe->i_sts;
1328         flags = csol_cqe->i_flags;
1329         resid = csol_cqe->res_cnt;
1330
1331         if (!task->sc) {
1332                 if (io_task->scsi_cmnd) {
1333                         scsi_dma_unmap(io_task->scsi_cmnd);
1334                         io_task->scsi_cmnd = NULL;
1335                 }
1336
1337                 return;
1338         }
1339         task->sc->result = (DID_OK << 16) | status;
1340         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1341                 task->sc->result = DID_ERROR << 16;
1342                 goto unmap;
1343         }
1344
1345         /* bidi not initially supported */
1346         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1347                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1348                         task->sc->result = DID_ERROR << 16;
1349
1350                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1351                         scsi_set_resid(task->sc, resid);
1352                         if (!status && (scsi_bufflen(task->sc) - resid <
1353                             task->sc->underflow))
1354                                 task->sc->result = DID_ERROR << 16;
1355                 }
1356         }
1357
1358         if (status == SAM_STAT_CHECK_CONDITION) {
1359                 u16 sense_len;
1360                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1361
1362                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1363                 sense_len = be16_to_cpu(*slen);
1364                 memcpy(task->sc->sense_buffer, sense,
1365                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1366         }
1367
1368         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1369                 conn->rxdata_octets += resid;
1370 unmap:
1371         if (io_task->scsi_cmnd) {
1372                 scsi_dma_unmap(io_task->scsi_cmnd);
1373                 io_task->scsi_cmnd = NULL;
1374         }
1375         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1376 }
1377
1378 static void
1379 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1380                     struct iscsi_task *task,
1381                     struct common_sol_cqe *csol_cqe)
1382 {
1383         struct iscsi_logout_rsp *hdr;
1384         struct beiscsi_io_task *io_task = task->dd_data;
1385         struct iscsi_conn *conn = beiscsi_conn->conn;
1386
1387         hdr = (struct iscsi_logout_rsp *)task->hdr;
1388         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1389         hdr->t2wait = 5;
1390         hdr->t2retain = 0;
1391         hdr->flags = csol_cqe->i_flags;
1392         hdr->response = csol_cqe->i_resp;
1393         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1394         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1395                                      csol_cqe->cmd_wnd - 1);
1396
1397         hdr->dlength[0] = 0;
1398         hdr->dlength[1] = 0;
1399         hdr->dlength[2] = 0;
1400         hdr->hlength = 0;
1401         hdr->itt = io_task->libiscsi_itt;
1402         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1403 }
1404
1405 static void
1406 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1407                  struct iscsi_task *task,
1408                  struct common_sol_cqe *csol_cqe)
1409 {
1410         struct iscsi_tm_rsp *hdr;
1411         struct iscsi_conn *conn = beiscsi_conn->conn;
1412         struct beiscsi_io_task *io_task = task->dd_data;
1413
1414         hdr = (struct iscsi_tm_rsp *)task->hdr;
1415         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1416         hdr->flags = csol_cqe->i_flags;
1417         hdr->response = csol_cqe->i_resp;
1418         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1419         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1420                                      csol_cqe->cmd_wnd - 1);
1421
1422         hdr->itt = io_task->libiscsi_itt;
1423         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1424 }
1425
1426 static void
1427 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1428                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1429 {
1430         struct hwi_wrb_context *pwrb_context;
1431         struct wrb_handle *pwrb_handle = NULL;
1432         struct hwi_controller *phwi_ctrlr;
1433         struct iscsi_task *task;
1434         struct beiscsi_io_task *io_task;
1435         uint16_t wrb_index, cid, cri_index;
1436
1437         phwi_ctrlr = phba->phwi_ctrlr;
1438         if (is_chip_be2_be3r(phba)) {
1439                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1440                                           wrb_idx, psol);
1441                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1442                                     cid, psol);
1443         } else {
1444                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1445                                           wrb_idx, psol);
1446                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1447                                     cid, psol);
1448         }
1449
1450         cri_index = BE_GET_CRI_FROM_CID(cid);
1451         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1452         pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1453         task = pwrb_handle->pio_handle;
1454
1455         io_task = task->dd_data;
1456         memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
1457         iscsi_put_task(task);
1458 }
1459
1460 static void
1461 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1462                         struct iscsi_task *task,
1463                         struct common_sol_cqe *csol_cqe)
1464 {
1465         struct iscsi_nopin *hdr;
1466         struct iscsi_conn *conn = beiscsi_conn->conn;
1467         struct beiscsi_io_task *io_task = task->dd_data;
1468
1469         hdr = (struct iscsi_nopin *)task->hdr;
1470         hdr->flags = csol_cqe->i_flags;
1471         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1472         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1473                                      csol_cqe->cmd_wnd - 1);
1474
1475         hdr->opcode = ISCSI_OP_NOOP_IN;
1476         hdr->itt = io_task->libiscsi_itt;
1477         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1478 }
1479
1480 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1481                 struct sol_cqe *psol,
1482                 struct common_sol_cqe *csol_cqe)
1483 {
1484         if (is_chip_be2_be3r(phba)) {
1485                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1486                                                     i_exp_cmd_sn, psol);
1487                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1488                                                   i_res_cnt, psol);
1489                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1490                                                   i_cmd_wnd, psol);
1491                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1492                                                     wrb_index, psol);
1493                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1494                                               cid, psol);
1495                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1496                                                  hw_sts, psol);
1497                 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1498                                                  i_resp, psol);
1499                 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1500                                                 i_sts, psol);
1501                 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1502                                                   i_flags, psol);
1503         } else {
1504                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1505                                                     i_exp_cmd_sn, psol);
1506                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1507                                                   i_res_cnt, psol);
1508                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1509                                                     wrb_index, psol);
1510                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1511                                               cid, psol);
1512                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1513                                                  hw_sts, psol);
1514                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1515                                                   i_cmd_wnd, psol);
1516                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1517                                   cmd_cmpl, psol))
1518                         csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1519                                                         i_sts, psol);
1520                 else
1521                         csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1522                                                          i_sts, psol);
1523                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1524                                   u, psol))
1525                         csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1526
1527                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1528                                   o, psol))
1529                         csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
1530         }
1531 }
1532
1533
1534 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1535                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1536 {
1537         struct hwi_wrb_context *pwrb_context;
1538         struct wrb_handle *pwrb_handle;
1539         struct iscsi_wrb *pwrb = NULL;
1540         struct hwi_controller *phwi_ctrlr;
1541         struct iscsi_task *task;
1542         unsigned int type;
1543         struct iscsi_conn *conn = beiscsi_conn->conn;
1544         struct iscsi_session *session = conn->session;
1545         struct common_sol_cqe csol_cqe = {0};
1546         uint16_t cri_index = 0;
1547
1548         phwi_ctrlr = phba->phwi_ctrlr;
1549
1550         /* Copy the elements to a common structure */
1551         adapter_get_sol_cqe(phba, psol, &csol_cqe);
1552
1553         cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1554         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1555
1556         pwrb_handle = pwrb_context->pwrb_handle_basestd[
1557                       csol_cqe.wrb_index];
1558
1559         task = pwrb_handle->pio_handle;
1560         pwrb = pwrb_handle->pwrb;
1561         type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1562
1563         spin_lock_bh(&session->back_lock);
1564         switch (type) {
1565         case HWH_TYPE_IO:
1566         case HWH_TYPE_IO_RD:
1567                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1568                      ISCSI_OP_NOOP_OUT)
1569                         be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1570                 else
1571                         be_complete_io(beiscsi_conn, task, &csol_cqe);
1572                 break;
1573
1574         case HWH_TYPE_LOGOUT:
1575                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1576                         be_complete_logout(beiscsi_conn, task, &csol_cqe);
1577                 else
1578                         be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1579                 break;
1580
1581         case HWH_TYPE_LOGIN:
1582                 beiscsi_log(phba, KERN_ERR,
1583                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1584                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1585                             " hwi_complete_cmd- Solicited path\n");
1586                 break;
1587
1588         case HWH_TYPE_NOP:
1589                 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1590                 break;
1591
1592         default:
1593                 beiscsi_log(phba, KERN_WARNING,
1594                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1595                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1596                             "wrb_index 0x%x CID 0x%x\n", type,
1597                             csol_cqe.wrb_index,
1598                             csol_cqe.cid);
1599                 break;
1600         }
1601
1602         spin_unlock_bh(&session->back_lock);
1603 }
1604
1605 static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1606                                           *pasync_ctx, unsigned int is_header,
1607                                           unsigned int host_write_ptr)
1608 {
1609         if (is_header)
1610                 return &pasync_ctx->async_entry[host_write_ptr].
1611                     header_busy_list;
1612         else
1613                 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1614 }
1615
1616 static struct async_pdu_handle *
1617 hwi_get_async_handle(struct beiscsi_hba *phba,
1618                      struct beiscsi_conn *beiscsi_conn,
1619                      struct hwi_async_pdu_context *pasync_ctx,
1620                      struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1621 {
1622         struct be_bus_address phys_addr;
1623         struct list_head *pbusy_list;
1624         struct async_pdu_handle *pasync_handle = NULL;
1625         unsigned char is_header = 0;
1626         unsigned int index, dpl;
1627
1628         if (is_chip_be2_be3r(phba)) {
1629                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1630                                     dpl, pdpdu_cqe);
1631                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1632                                       index, pdpdu_cqe);
1633         } else {
1634                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1635                                     dpl, pdpdu_cqe);
1636                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1637                                       index, pdpdu_cqe);
1638         }
1639
1640         phys_addr.u.a32.address_lo =
1641                 (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1642                                         db_addr_lo) / 32] - dpl);
1643         phys_addr.u.a32.address_hi =
1644                 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1645                                        db_addr_hi) / 32];
1646
1647         phys_addr.u.a64.address =
1648                         *((unsigned long long *)(&phys_addr.u.a64.address));
1649
1650         switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1651                         & PDUCQE_CODE_MASK) {
1652         case UNSOL_HDR_NOTIFY:
1653                 is_header = 1;
1654
1655                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1656                                                       is_header, index);
1657                 break;
1658         case UNSOL_DATA_NOTIFY:
1659                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1660                                                       is_header, index);
1661                 break;
1662         default:
1663                 pbusy_list = NULL;
1664                 beiscsi_log(phba, KERN_WARNING,
1665                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1666                             "BM_%d : Unexpected code=%d\n",
1667                             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1668                             code) / 32] & PDUCQE_CODE_MASK);
1669                 return NULL;
1670         }
1671
1672         WARN_ON(list_empty(pbusy_list));
1673         list_for_each_entry(pasync_handle, pbusy_list, link) {
1674                 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1675                         break;
1676         }
1677
1678         WARN_ON(!pasync_handle);
1679
1680         pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
1681                              beiscsi_conn->beiscsi_conn_cid);
1682         pasync_handle->is_header = is_header;
1683         pasync_handle->buffer_len = dpl;
1684         *pcq_index = index;
1685
1686         return pasync_handle;
1687 }
1688
1689 static unsigned int
1690 hwi_update_async_writables(struct beiscsi_hba *phba,
1691                             struct hwi_async_pdu_context *pasync_ctx,
1692                             unsigned int is_header, unsigned int cq_index)
1693 {
1694         struct list_head *pbusy_list;
1695         struct async_pdu_handle *pasync_handle;
1696         unsigned int num_entries, writables = 0;
1697         unsigned int *pep_read_ptr, *pwritables;
1698
1699         num_entries = pasync_ctx->num_entries;
1700         if (is_header) {
1701                 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1702                 pwritables = &pasync_ctx->async_header.writables;
1703         } else {
1704                 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1705                 pwritables = &pasync_ctx->async_data.writables;
1706         }
1707
1708         while ((*pep_read_ptr) != cq_index) {
1709                 (*pep_read_ptr)++;
1710                 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1711
1712                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1713                                                      *pep_read_ptr);
1714                 if (writables == 0)
1715                         WARN_ON(list_empty(pbusy_list));
1716
1717                 if (!list_empty(pbusy_list)) {
1718                         pasync_handle = list_entry(pbusy_list->next,
1719                                                    struct async_pdu_handle,
1720                                                    link);
1721                         WARN_ON(!pasync_handle);
1722                         pasync_handle->consumed = 1;
1723                 }
1724
1725                 writables++;
1726         }
1727
1728         if (!writables) {
1729                 beiscsi_log(phba, KERN_ERR,
1730                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1731                             "BM_%d : Duplicate notification received - index 0x%x!!\n",
1732                             cq_index);
1733                 WARN_ON(1);
1734         }
1735
1736         *pwritables = *pwritables + writables;
1737         return 0;
1738 }
1739
1740 static void hwi_free_async_msg(struct beiscsi_hba *phba,
1741                                struct hwi_async_pdu_context *pasync_ctx,
1742                                unsigned int cri)
1743 {
1744         struct async_pdu_handle *pasync_handle, *tmp_handle;
1745         struct list_head *plist;
1746
1747         plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
1748         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1749                 list_del(&pasync_handle->link);
1750
1751                 if (pasync_handle->is_header) {
1752                         list_add_tail(&pasync_handle->link,
1753                                       &pasync_ctx->async_header.free_list);
1754                         pasync_ctx->async_header.free_entries++;
1755                 } else {
1756                         list_add_tail(&pasync_handle->link,
1757                                       &pasync_ctx->async_data.free_list);
1758                         pasync_ctx->async_data.free_entries++;
1759                 }
1760         }
1761
1762         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1763         pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1764         pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1765 }
1766
1767 static struct phys_addr *
1768 hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1769                      unsigned int is_header, unsigned int host_write_ptr)
1770 {
1771         struct phys_addr *pasync_sge = NULL;
1772
1773         if (is_header)
1774                 pasync_sge = pasync_ctx->async_header.ring_base;
1775         else
1776                 pasync_sge = pasync_ctx->async_data.ring_base;
1777
1778         return pasync_sge + host_write_ptr;
1779 }
1780
1781 static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1782                                     unsigned int is_header, uint8_t ulp_num)
1783 {
1784         struct hwi_controller *phwi_ctrlr;
1785         struct hwi_async_pdu_context *pasync_ctx;
1786         struct async_pdu_handle *pasync_handle;
1787         struct list_head *pfree_link, *pbusy_list;
1788         struct phys_addr *pasync_sge;
1789         unsigned int ring_id, num_entries;
1790         unsigned int host_write_num, doorbell_offset;
1791         unsigned int writables;
1792         unsigned int i = 0;
1793         u32 doorbell = 0;
1794
1795         phwi_ctrlr = phba->phwi_ctrlr;
1796         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1797         num_entries = pasync_ctx->num_entries;
1798
1799         if (is_header) {
1800                 writables = min(pasync_ctx->async_header.writables,
1801                                 pasync_ctx->async_header.free_entries);
1802                 pfree_link = pasync_ctx->async_header.free_list.next;
1803                 host_write_num = pasync_ctx->async_header.host_write_ptr;
1804                 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1805                 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1806                                   doorbell_offset;
1807         } else {
1808                 writables = min(pasync_ctx->async_data.writables,
1809                                 pasync_ctx->async_data.free_entries);
1810                 pfree_link = pasync_ctx->async_data.free_list.next;
1811                 host_write_num = pasync_ctx->async_data.host_write_ptr;
1812                 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1813                 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1814                                   doorbell_offset;
1815         }
1816
1817         writables = (writables / 8) * 8;
1818         if (writables) {
1819                 for (i = 0; i < writables; i++) {
1820                         pbusy_list =
1821                             hwi_get_async_busy_list(pasync_ctx, is_header,
1822                                                     host_write_num);
1823                         pasync_handle =
1824                             list_entry(pfree_link, struct async_pdu_handle,
1825                                                                 link);
1826                         WARN_ON(!pasync_handle);
1827                         pasync_handle->consumed = 0;
1828
1829                         pfree_link = pfree_link->next;
1830
1831                         pasync_sge = hwi_get_ring_address(pasync_ctx,
1832                                                 is_header, host_write_num);
1833
1834                         pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1835                         pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1836
1837                         list_move(&pasync_handle->link, pbusy_list);
1838
1839                         host_write_num++;
1840                         host_write_num = host_write_num % num_entries;
1841                 }
1842
1843                 if (is_header) {
1844                         pasync_ctx->async_header.host_write_ptr =
1845                                                         host_write_num;
1846                         pasync_ctx->async_header.free_entries -= writables;
1847                         pasync_ctx->async_header.writables -= writables;
1848                         pasync_ctx->async_header.busy_entries += writables;
1849                 } else {
1850                         pasync_ctx->async_data.host_write_ptr = host_write_num;
1851                         pasync_ctx->async_data.free_entries -= writables;
1852                         pasync_ctx->async_data.writables -= writables;
1853                         pasync_ctx->async_data.busy_entries += writables;
1854                 }
1855
1856                 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1857                 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1858                 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1859                 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1860                                         << DB_DEF_PDU_CQPROC_SHIFT;
1861
1862                 iowrite32(doorbell, phba->db_va + doorbell_offset);
1863         }
1864 }
1865
1866 static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1867                                          struct beiscsi_conn *beiscsi_conn,
1868                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1869 {
1870         struct hwi_controller *phwi_ctrlr;
1871         struct hwi_async_pdu_context *pasync_ctx;
1872         struct async_pdu_handle *pasync_handle = NULL;
1873         unsigned int cq_index = -1;
1874         uint16_t cri_index = BE_GET_CRI_FROM_CID(
1875                              beiscsi_conn->beiscsi_conn_cid);
1876
1877         phwi_ctrlr = phba->phwi_ctrlr;
1878         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1879                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1880                      cri_index));
1881
1882         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1883                                              pdpdu_cqe, &cq_index);
1884         BUG_ON(pasync_handle->is_header != 0);
1885         if (pasync_handle->consumed == 0)
1886                 hwi_update_async_writables(phba, pasync_ctx,
1887                                            pasync_handle->is_header, cq_index);
1888
1889         hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
1890         hwi_post_async_buffers(phba, pasync_handle->is_header,
1891                                BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1892                                cri_index));
1893 }
1894
1895 static unsigned int
1896 hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1897                   struct beiscsi_hba *phba,
1898                   struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1899 {
1900         struct list_head *plist;
1901         struct async_pdu_handle *pasync_handle;
1902         void *phdr = NULL;
1903         unsigned int hdr_len = 0, buf_len = 0;
1904         unsigned int status, index = 0, offset = 0;
1905         void *pfirst_buffer = NULL;
1906         unsigned int num_buf = 0;
1907
1908         plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1909
1910         list_for_each_entry(pasync_handle, plist, link) {
1911                 if (index == 0) {
1912                         phdr = pasync_handle->pbuffer;
1913                         hdr_len = pasync_handle->buffer_len;
1914                 } else {
1915                         buf_len = pasync_handle->buffer_len;
1916                         if (!num_buf) {
1917                                 pfirst_buffer = pasync_handle->pbuffer;
1918                                 num_buf++;
1919                         }
1920                         memcpy(pfirst_buffer + offset,
1921                                pasync_handle->pbuffer, buf_len);
1922                         offset += buf_len;
1923                 }
1924                 index++;
1925         }
1926
1927         status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1928                                             phdr, hdr_len, pfirst_buffer,
1929                                             offset);
1930
1931         hwi_free_async_msg(phba, pasync_ctx, cri);
1932         return 0;
1933 }
1934
1935 static unsigned int
1936 hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1937                      struct beiscsi_hba *phba,
1938                      struct async_pdu_handle *pasync_handle)
1939 {
1940         struct hwi_async_pdu_context *pasync_ctx;
1941         struct hwi_controller *phwi_ctrlr;
1942         unsigned int bytes_needed = 0, status = 0;
1943         unsigned short cri = pasync_handle->cri;
1944         struct pdu_base *ppdu;
1945
1946         phwi_ctrlr = phba->phwi_ctrlr;
1947         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1948                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1949                      BE_GET_CRI_FROM_CID(beiscsi_conn->
1950                                  beiscsi_conn_cid)));
1951
1952         list_del(&pasync_handle->link);
1953         if (pasync_handle->is_header) {
1954                 pasync_ctx->async_header.busy_entries--;
1955                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1956                         hwi_free_async_msg(phba, pasync_ctx, cri);
1957                         BUG();
1958                 }
1959
1960                 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1961                 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1962                 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1963                                 (unsigned short)pasync_handle->buffer_len;
1964                 list_add_tail(&pasync_handle->link,
1965                               &pasync_ctx->async_entry[cri].wait_queue.list);
1966
1967                 ppdu = pasync_handle->pbuffer;
1968                 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1969                         data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1970                         0xFFFF0000) | ((be16_to_cpu((ppdu->
1971                         dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1972                         & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1973
1974                 if (status == 0) {
1975                         pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1976                             bytes_needed;
1977
1978                         if (bytes_needed == 0)
1979                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1980                                                            pasync_ctx, cri);
1981                 }
1982         } else {
1983                 pasync_ctx->async_data.busy_entries--;
1984                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1985                         list_add_tail(&pasync_handle->link,
1986                                       &pasync_ctx->async_entry[cri].wait_queue.
1987                                       list);
1988                         pasync_ctx->async_entry[cri].wait_queue.
1989                                 bytes_received +=
1990                                 (unsigned short)pasync_handle->buffer_len;
1991
1992                         if (pasync_ctx->async_entry[cri].wait_queue.
1993                             bytes_received >=
1994                             pasync_ctx->async_entry[cri].wait_queue.
1995                             bytes_needed)
1996                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1997                                                            pasync_ctx, cri);
1998                 }
1999         }
2000         return status;
2001 }
2002
2003 static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
2004                                          struct beiscsi_hba *phba,
2005                                          struct i_t_dpdu_cqe *pdpdu_cqe)
2006 {
2007         struct hwi_controller *phwi_ctrlr;
2008         struct hwi_async_pdu_context *pasync_ctx;
2009         struct async_pdu_handle *pasync_handle = NULL;
2010         unsigned int cq_index = -1;
2011         uint16_t cri_index = BE_GET_CRI_FROM_CID(
2012                              beiscsi_conn->beiscsi_conn_cid);
2013
2014         phwi_ctrlr = phba->phwi_ctrlr;
2015         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
2016                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
2017                      cri_index));
2018
2019         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
2020                                              pdpdu_cqe, &cq_index);
2021
2022         if (pasync_handle->consumed == 0)
2023                 hwi_update_async_writables(phba, pasync_ctx,
2024                                            pasync_handle->is_header, cq_index);
2025
2026         hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
2027         hwi_post_async_buffers(phba, pasync_handle->is_header,
2028                                BEISCSI_GET_ULP_FROM_CRI(
2029                                phwi_ctrlr, cri_index));
2030 }
2031
2032 static void  beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
2033 {
2034         struct be_queue_info *mcc_cq;
2035         struct  be_mcc_compl *mcc_compl;
2036         unsigned int num_processed = 0;
2037
2038         mcc_cq = &phba->ctrl.mcc_obj.cq;
2039         mcc_compl = queue_tail_node(mcc_cq);
2040         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2041         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
2042
2043                 if (num_processed >= 32) {
2044                         hwi_ring_cq_db(phba, mcc_cq->id,
2045                                         num_processed, 0);
2046                         num_processed = 0;
2047                 }
2048                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
2049                         beiscsi_process_async_event(phba, mcc_compl);
2050                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
2051                         be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
2052                         atomic_dec(&phba->ctrl.mcc_obj.q.used);
2053                 }
2054
2055                 mcc_compl->flags = 0;
2056                 queue_tail_inc(mcc_cq);
2057                 mcc_compl = queue_tail_node(mcc_cq);
2058                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2059                 num_processed++;
2060         }
2061
2062         if (num_processed > 0)
2063                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1);
2064
2065 }
2066
2067 /**
2068  * beiscsi_process_cq()- Process the Completion Queue
2069  * @pbe_eq: Event Q on which the Completion has come
2070  * @budget: Max number of events to processed
2071  *
2072  * return
2073  *     Number of Completion Entries processed.
2074  **/
2075 unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq, int budget)
2076 {
2077         struct be_queue_info *cq;
2078         struct sol_cqe *sol;
2079         struct dmsg_cqe *dmsg;
2080         unsigned int total = 0;
2081         unsigned int num_processed = 0;
2082         unsigned short code = 0, cid = 0;
2083         uint16_t cri_index = 0;
2084         struct beiscsi_conn *beiscsi_conn;
2085         struct beiscsi_endpoint *beiscsi_ep;
2086         struct iscsi_endpoint *ep;
2087         struct beiscsi_hba *phba;
2088
2089         cq = pbe_eq->cq;
2090         sol = queue_tail_node(cq);
2091         phba = pbe_eq->phba;
2092
2093         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
2094                CQE_VALID_MASK) {
2095                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
2096
2097                  code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
2098                          32] & CQE_CODE_MASK);
2099
2100                  /* Get the CID */
2101                 if (is_chip_be2_be3r(phba)) {
2102                         cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
2103                 } else {
2104                         if ((code == DRIVERMSG_NOTIFY) ||
2105                             (code == UNSOL_HDR_NOTIFY) ||
2106                             (code == UNSOL_DATA_NOTIFY))
2107                                 cid = AMAP_GET_BITS(
2108                                                     struct amap_i_t_dpdu_cqe_v2,
2109                                                     cid, sol);
2110                          else
2111                                  cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
2112                                                      cid, sol);
2113                 }
2114
2115                 cri_index = BE_GET_CRI_FROM_CID(cid);
2116                 ep = phba->ep_array[cri_index];
2117
2118                 if (ep == NULL) {
2119                         /* connection has already been freed
2120                          * just move on to next one
2121                          */
2122                         beiscsi_log(phba, KERN_WARNING,
2123                                     BEISCSI_LOG_INIT,
2124                                     "BM_%d : proc cqe of disconn ep: cid %d\n",
2125                                     cid);
2126                         goto proc_next_cqe;
2127                 }
2128
2129                 beiscsi_ep = ep->dd_data;
2130                 beiscsi_conn = beiscsi_ep->conn;
2131
2132                 /* replenish cq */
2133                 if (num_processed == 32) {
2134                         hwi_ring_cq_db(phba, cq->id, 32, 0);
2135                         num_processed = 0;
2136                 }
2137                 total++;
2138
2139                 switch (code) {
2140                 case SOL_CMD_COMPLETE:
2141                         hwi_complete_cmd(beiscsi_conn, phba, sol);
2142                         break;
2143                 case DRIVERMSG_NOTIFY:
2144                         beiscsi_log(phba, KERN_INFO,
2145                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2146                                     "BM_%d : Received %s[%d] on CID : %d\n",
2147                                     cqe_desc[code], code, cid);
2148
2149                         dmsg = (struct dmsg_cqe *)sol;
2150                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2151                         break;
2152                 case UNSOL_HDR_NOTIFY:
2153                         beiscsi_log(phba, KERN_INFO,
2154                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2155                                     "BM_%d : Received %s[%d] on CID : %d\n",
2156                                     cqe_desc[code], code, cid);
2157
2158                         spin_lock_bh(&phba->async_pdu_lock);
2159                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2160                                              (struct i_t_dpdu_cqe *)sol);
2161                         spin_unlock_bh(&phba->async_pdu_lock);
2162                         break;
2163                 case UNSOL_DATA_NOTIFY:
2164                         beiscsi_log(phba, KERN_INFO,
2165                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2166                                     "BM_%d : Received %s[%d] on CID : %d\n",
2167                                     cqe_desc[code], code, cid);
2168
2169                         spin_lock_bh(&phba->async_pdu_lock);
2170                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2171                                              (struct i_t_dpdu_cqe *)sol);
2172                         spin_unlock_bh(&phba->async_pdu_lock);
2173                         break;
2174                 case CXN_INVALIDATE_INDEX_NOTIFY:
2175                 case CMD_INVALIDATED_NOTIFY:
2176                 case CXN_INVALIDATE_NOTIFY:
2177                         beiscsi_log(phba, KERN_ERR,
2178                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2179                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
2180                                     cqe_desc[code], code, cid);
2181                         break;
2182                 case CXN_KILLED_HDR_DIGEST_ERR:
2183                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2184                         beiscsi_log(phba, KERN_ERR,
2185                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2186                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2187                                     cqe_desc[code], code,  cid);
2188                         break;
2189                 case CMD_KILLED_INVALID_STATSN_RCVD:
2190                 case CMD_KILLED_INVALID_R2T_RCVD:
2191                 case CMD_CXN_KILLED_LUN_INVALID:
2192                 case CMD_CXN_KILLED_ICD_INVALID:
2193                 case CMD_CXN_KILLED_ITT_INVALID:
2194                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2195                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2196                         beiscsi_log(phba, KERN_ERR,
2197                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2198                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2199                                     cqe_desc[code], code,  cid);
2200                         break;
2201                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2202                         beiscsi_log(phba, KERN_ERR,
2203                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2204                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
2205                                     cqe_desc[code], code, cid);
2206                         spin_lock_bh(&phba->async_pdu_lock);
2207                         hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2208                                              (struct i_t_dpdu_cqe *) sol);
2209                         spin_unlock_bh(&phba->async_pdu_lock);
2210                         break;
2211                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2212                 case CXN_KILLED_BURST_LEN_MISMATCH:
2213                 case CXN_KILLED_AHS_RCVD:
2214                 case CXN_KILLED_UNKNOWN_HDR:
2215                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2216                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2217                 case CXN_KILLED_TIMED_OUT:
2218                 case CXN_KILLED_FIN_RCVD:
2219                 case CXN_KILLED_RST_SENT:
2220                 case CXN_KILLED_RST_RCVD:
2221                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2222                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2223                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2224                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2225                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2226                         beiscsi_log(phba, KERN_ERR,
2227                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2228                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2229                                     cqe_desc[code], code, cid);
2230                         if (beiscsi_conn)
2231                                 iscsi_conn_failure(beiscsi_conn->conn,
2232                                                    ISCSI_ERR_CONN_FAILED);
2233                         break;
2234                 default:
2235                         beiscsi_log(phba, KERN_ERR,
2236                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2237                                     "BM_%d : Invalid CQE Event Received Code : %d"
2238                                     "CID 0x%x...\n",
2239                                     code, cid);
2240                         break;
2241                 }
2242
2243 proc_next_cqe:
2244                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2245                 queue_tail_inc(cq);
2246                 sol = queue_tail_node(cq);
2247                 num_processed++;
2248                 if (total == budget)
2249                         break;
2250         }
2251
2252         hwi_ring_cq_db(phba, cq->id, num_processed, 1);
2253         return total;
2254 }
2255
2256 void beiscsi_process_all_cqs(struct work_struct *work)
2257 {
2258         unsigned long flags;
2259         struct hwi_controller *phwi_ctrlr;
2260         struct hwi_context_memory *phwi_context;
2261         struct beiscsi_hba *phba;
2262         struct be_eq_obj *pbe_eq =
2263             container_of(work, struct be_eq_obj, work_cqs);
2264
2265         phba = pbe_eq->phba;
2266         phwi_ctrlr = phba->phwi_ctrlr;
2267         phwi_context = phwi_ctrlr->phwi_ctxt;
2268
2269         if (pbe_eq->todo_mcc_cq) {
2270                 spin_lock_irqsave(&phba->isr_lock, flags);
2271                 pbe_eq->todo_mcc_cq = false;
2272                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2273                 beiscsi_process_mcc_isr(phba);
2274         }
2275
2276         if (pbe_eq->todo_cq) {
2277                 spin_lock_irqsave(&phba->isr_lock, flags);
2278                 pbe_eq->todo_cq = false;
2279                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2280                 beiscsi_process_cq(pbe_eq, BE2_MAX_NUM_CQ_PROC);
2281         }
2282
2283         /* rearm EQ for further interrupts */
2284         hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2285 }
2286
2287 static int be_iopoll(struct irq_poll *iop, int budget)
2288 {
2289         unsigned int ret, num_eq_processed;
2290         struct beiscsi_hba *phba;
2291         struct be_eq_obj *pbe_eq;
2292         struct be_eq_entry *eqe = NULL;
2293         struct be_queue_info *eq;
2294
2295         num_eq_processed = 0;
2296         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2297         phba = pbe_eq->phba;
2298         eq = &pbe_eq->q;
2299         eqe = queue_tail_node(eq);
2300
2301         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] &
2302                         EQE_VALID_MASK) {
2303                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
2304                 queue_tail_inc(eq);
2305                 eqe = queue_tail_node(eq);
2306                 num_eq_processed++;
2307         }
2308
2309         hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
2310
2311         ret = beiscsi_process_cq(pbe_eq, budget);
2312         pbe_eq->cq_count += ret;
2313         if (ret < budget) {
2314                 irq_poll_complete(iop);
2315                 beiscsi_log(phba, KERN_INFO,
2316                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2317                             "BM_%d : rearm pbe_eq->q.id =%d ret %d\n",
2318                             pbe_eq->q.id, ret);
2319                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2320         }
2321         return ret;
2322 }
2323
2324 static void
2325 hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2326                   unsigned int num_sg, struct beiscsi_io_task *io_task)
2327 {
2328         struct iscsi_sge *psgl;
2329         unsigned int sg_len, index;
2330         unsigned int sge_len = 0;
2331         unsigned long long addr;
2332         struct scatterlist *l_sg;
2333         unsigned int offset;
2334
2335         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2336                       io_task->bhs_pa.u.a32.address_lo);
2337         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2338                       io_task->bhs_pa.u.a32.address_hi);
2339
2340         l_sg = sg;
2341         for (index = 0; (index < num_sg) && (index < 2); index++,
2342                         sg = sg_next(sg)) {
2343                 if (index == 0) {
2344                         sg_len = sg_dma_len(sg);
2345                         addr = (u64) sg_dma_address(sg);
2346                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2347                                       sge0_addr_lo, pwrb,
2348                                       lower_32_bits(addr));
2349                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2350                                       sge0_addr_hi, pwrb,
2351                                       upper_32_bits(addr));
2352                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2353                                       sge0_len, pwrb,
2354                                       sg_len);
2355                         sge_len = sg_len;
2356                 } else {
2357                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2358                                       pwrb, sge_len);
2359                         sg_len = sg_dma_len(sg);
2360                         addr = (u64) sg_dma_address(sg);
2361                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2362                                       sge1_addr_lo, pwrb,
2363                                       lower_32_bits(addr));
2364                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2365                                       sge1_addr_hi, pwrb,
2366                                       upper_32_bits(addr));
2367                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2368                                       sge1_len, pwrb,
2369                                       sg_len);
2370                 }
2371         }
2372         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2373         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2374
2375         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2376
2377         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2378                       io_task->bhs_pa.u.a32.address_hi);
2379         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2380                       io_task->bhs_pa.u.a32.address_lo);
2381
2382         if (num_sg == 1) {
2383                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2384                               1);
2385                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2386                               0);
2387         } else if (num_sg == 2) {
2388                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2389                               0);
2390                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2391                               1);
2392         } else {
2393                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2394                               0);
2395                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2396                               0);
2397         }
2398
2399         sg = l_sg;
2400         psgl++;
2401         psgl++;
2402         offset = 0;
2403         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2404                 sg_len = sg_dma_len(sg);
2405                 addr = (u64) sg_dma_address(sg);
2406                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2407                               lower_32_bits(addr));
2408                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2409                               upper_32_bits(addr));
2410                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2411                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2412                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2413                 offset += sg_len;
2414         }
2415         psgl--;
2416         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2417 }
2418
2419 static void
2420 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2421               unsigned int num_sg, struct beiscsi_io_task *io_task)
2422 {
2423         struct iscsi_sge *psgl;
2424         unsigned int sg_len, index;
2425         unsigned int sge_len = 0;
2426         unsigned long long addr;
2427         struct scatterlist *l_sg;
2428         unsigned int offset;
2429
2430         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2431                                       io_task->bhs_pa.u.a32.address_lo);
2432         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2433                                       io_task->bhs_pa.u.a32.address_hi);
2434
2435         l_sg = sg;
2436         for (index = 0; (index < num_sg) && (index < 2); index++,
2437                                                          sg = sg_next(sg)) {
2438                 if (index == 0) {
2439                         sg_len = sg_dma_len(sg);
2440                         addr = (u64) sg_dma_address(sg);
2441                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2442                                                 ((u32)(addr & 0xFFFFFFFF)));
2443                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2444                                                         ((u32)(addr >> 32)));
2445                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2446                                                         sg_len);
2447                         sge_len = sg_len;
2448                 } else {
2449                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2450                                                         pwrb, sge_len);
2451                         sg_len = sg_dma_len(sg);
2452                         addr = (u64) sg_dma_address(sg);
2453                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2454                                                 ((u32)(addr & 0xFFFFFFFF)));
2455                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2456                                                         ((u32)(addr >> 32)));
2457                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2458                                                         sg_len);
2459                 }
2460         }
2461         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2462         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2463
2464         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2465
2466         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2467                         io_task->bhs_pa.u.a32.address_hi);
2468         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2469                         io_task->bhs_pa.u.a32.address_lo);
2470
2471         if (num_sg == 1) {
2472                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2473                                                                 1);
2474                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2475                                                                 0);
2476         } else if (num_sg == 2) {
2477                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2478                                                                 0);
2479                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2480                                                                 1);
2481         } else {
2482                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2483                                                                 0);
2484                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2485                                                                 0);
2486         }
2487         sg = l_sg;
2488         psgl++;
2489         psgl++;
2490         offset = 0;
2491         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2492                 sg_len = sg_dma_len(sg);
2493                 addr = (u64) sg_dma_address(sg);
2494                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2495                                                 (addr & 0xFFFFFFFF));
2496                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2497                                                 (addr >> 32));
2498                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2499                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2500                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2501                 offset += sg_len;
2502         }
2503         psgl--;
2504         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2505 }
2506
2507 /**
2508  * hwi_write_buffer()- Populate the WRB with task info
2509  * @pwrb: ptr to the WRB entry
2510  * @task: iscsi task which is to be executed
2511  **/
2512 static int hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2513 {
2514         struct iscsi_sge *psgl;
2515         struct beiscsi_io_task *io_task = task->dd_data;
2516         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2517         struct beiscsi_hba *phba = beiscsi_conn->phba;
2518         uint8_t dsp_value = 0;
2519
2520         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2521         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2522                                 io_task->bhs_pa.u.a32.address_lo);
2523         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2524                                 io_task->bhs_pa.u.a32.address_hi);
2525
2526         if (task->data) {
2527
2528                 /* Check for the data_count */
2529                 dsp_value = (task->data_count) ? 1 : 0;
2530
2531                 if (is_chip_be2_be3r(phba))
2532                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2533                                       pwrb, dsp_value);
2534                 else
2535                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2536                                       pwrb, dsp_value);
2537
2538                 /* Map addr only if there is data_count */
2539                 if (dsp_value) {
2540                         io_task->mtask_addr = pci_map_single(phba->pcidev,
2541                                                              task->data,
2542                                                              task->data_count,
2543                                                              PCI_DMA_TODEVICE);
2544                         if (pci_dma_mapping_error(phba->pcidev,
2545                                                   io_task->mtask_addr))
2546                                 return -ENOMEM;
2547                         io_task->mtask_data_count = task->data_count;
2548                 } else
2549                         io_task->mtask_addr = 0;
2550
2551                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2552                               lower_32_bits(io_task->mtask_addr));
2553                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2554                               upper_32_bits(io_task->mtask_addr));
2555                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2556                                                 task->data_count);
2557
2558                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2559         } else {
2560                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2561                 io_task->mtask_addr = 0;
2562         }
2563
2564         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2565
2566         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2567
2568         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2569                       io_task->bhs_pa.u.a32.address_hi);
2570         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2571                       io_task->bhs_pa.u.a32.address_lo);
2572         if (task->data) {
2573                 psgl++;
2574                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2575                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2576                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2577                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2578                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2579                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2580
2581                 psgl++;
2582                 if (task->data) {
2583                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2584                                       lower_32_bits(io_task->mtask_addr));
2585                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2586                                       upper_32_bits(io_task->mtask_addr));
2587                 }
2588                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2589         }
2590         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2591         return 0;
2592 }
2593
2594 /**
2595  * beiscsi_find_mem_req()- Find mem needed
2596  * @phba: ptr to HBA struct
2597  **/
2598 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2599 {
2600         uint8_t mem_descr_index, ulp_num;
2601         unsigned int num_cq_pages, num_async_pdu_buf_pages;
2602         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2603         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2604
2605         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2606                                       sizeof(struct sol_cqe));
2607
2608         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2609
2610         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2611                                                  BE_ISCSI_PDU_HEADER_SIZE;
2612         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2613                                             sizeof(struct hwi_context_memory);
2614
2615
2616         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2617             * (phba->params.wrbs_per_cxn)
2618             * phba->params.cxns_per_ctrl;
2619         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2620                                  (phba->params.wrbs_per_cxn);
2621         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2622                                 phba->params.cxns_per_ctrl);
2623
2624         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2625                 phba->params.icds_per_ctrl;
2626         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2627                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2628         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2629                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2630
2631                         num_async_pdu_buf_sgl_pages =
2632                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2633                                                phba, ulp_num) *
2634                                                sizeof(struct phys_addr));
2635
2636                         num_async_pdu_buf_pages =
2637                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2638                                                phba, ulp_num) *
2639                                                phba->params.defpdu_hdr_sz);
2640
2641                         num_async_pdu_data_pages =
2642                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2643                                                phba, ulp_num) *
2644                                                phba->params.defpdu_data_sz);
2645
2646                         num_async_pdu_data_sgl_pages =
2647                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2648                                                phba, ulp_num) *
2649                                                sizeof(struct phys_addr));
2650
2651                         mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2652                                           (ulp_num * MEM_DESCR_OFFSET));
2653                         phba->mem_req[mem_descr_index] =
2654                                         BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2655                                         BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2656
2657                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2658                                           (ulp_num * MEM_DESCR_OFFSET));
2659                         phba->mem_req[mem_descr_index] =
2660                                           num_async_pdu_buf_pages *
2661                                           PAGE_SIZE;
2662
2663                         mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2664                                           (ulp_num * MEM_DESCR_OFFSET));
2665                         phba->mem_req[mem_descr_index] =
2666                                           num_async_pdu_data_pages *
2667                                           PAGE_SIZE;
2668
2669                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2670                                           (ulp_num * MEM_DESCR_OFFSET));
2671                         phba->mem_req[mem_descr_index] =
2672                                           num_async_pdu_buf_sgl_pages *
2673                                           PAGE_SIZE;
2674
2675                         mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2676                                           (ulp_num * MEM_DESCR_OFFSET));
2677                         phba->mem_req[mem_descr_index] =
2678                                           num_async_pdu_data_sgl_pages *
2679                                           PAGE_SIZE;
2680
2681                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2682                                           (ulp_num * MEM_DESCR_OFFSET));
2683                         phba->mem_req[mem_descr_index] =
2684                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2685                                           sizeof(struct async_pdu_handle);
2686
2687                         mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2688                                           (ulp_num * MEM_DESCR_OFFSET));
2689                         phba->mem_req[mem_descr_index] =
2690                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2691                                           sizeof(struct async_pdu_handle);
2692
2693                         mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2694                                           (ulp_num * MEM_DESCR_OFFSET));
2695                         phba->mem_req[mem_descr_index] =
2696                                           sizeof(struct hwi_async_pdu_context) +
2697                                          (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2698                                           sizeof(struct hwi_async_entry));
2699                 }
2700         }
2701 }
2702
2703 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2704 {
2705         dma_addr_t bus_add;
2706         struct hwi_controller *phwi_ctrlr;
2707         struct be_mem_descriptor *mem_descr;
2708         struct mem_array *mem_arr, *mem_arr_orig;
2709         unsigned int i, j, alloc_size, curr_alloc_size;
2710
2711         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2712         if (!phba->phwi_ctrlr)
2713                 return -ENOMEM;
2714
2715         /* Allocate memory for wrb_context */
2716         phwi_ctrlr = phba->phwi_ctrlr;
2717         phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2718                                           phba->params.cxns_per_ctrl,
2719                                           GFP_KERNEL);
2720         if (!phwi_ctrlr->wrb_context)
2721                 return -ENOMEM;
2722
2723         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2724                                  GFP_KERNEL);
2725         if (!phba->init_mem) {
2726                 kfree(phwi_ctrlr->wrb_context);
2727                 kfree(phba->phwi_ctrlr);
2728                 return -ENOMEM;
2729         }
2730
2731         mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2732                                GFP_KERNEL);
2733         if (!mem_arr_orig) {
2734                 kfree(phba->init_mem);
2735                 kfree(phwi_ctrlr->wrb_context);
2736                 kfree(phba->phwi_ctrlr);
2737                 return -ENOMEM;
2738         }
2739
2740         mem_descr = phba->init_mem;
2741         for (i = 0; i < SE_MEM_MAX; i++) {
2742                 if (!phba->mem_req[i]) {
2743                         mem_descr->mem_array = NULL;
2744                         mem_descr++;
2745                         continue;
2746                 }
2747
2748                 j = 0;
2749                 mem_arr = mem_arr_orig;
2750                 alloc_size = phba->mem_req[i];
2751                 memset(mem_arr, 0, sizeof(struct mem_array) *
2752                        BEISCSI_MAX_FRAGS_INIT);
2753                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2754                 do {
2755                         mem_arr->virtual_address = pci_alloc_consistent(
2756                                                         phba->pcidev,
2757                                                         curr_alloc_size,
2758                                                         &bus_add);
2759                         if (!mem_arr->virtual_address) {
2760                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2761                                         goto free_mem;
2762                                 if (curr_alloc_size -
2763                                         rounddown_pow_of_two(curr_alloc_size))
2764                                         curr_alloc_size = rounddown_pow_of_two
2765                                                              (curr_alloc_size);
2766                                 else
2767                                         curr_alloc_size = curr_alloc_size / 2;
2768                         } else {
2769                                 mem_arr->bus_address.u.
2770                                     a64.address = (__u64) bus_add;
2771                                 mem_arr->size = curr_alloc_size;
2772                                 alloc_size -= curr_alloc_size;
2773                                 curr_alloc_size = min(be_max_phys_size *
2774                                                       1024, alloc_size);
2775                                 j++;
2776                                 mem_arr++;
2777                         }
2778                 } while (alloc_size);
2779                 mem_descr->num_elements = j;
2780                 mem_descr->size_in_bytes = phba->mem_req[i];
2781                 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2782                                                GFP_KERNEL);
2783                 if (!mem_descr->mem_array)
2784                         goto free_mem;
2785
2786                 memcpy(mem_descr->mem_array, mem_arr_orig,
2787                        sizeof(struct mem_array) * j);
2788                 mem_descr++;
2789         }
2790         kfree(mem_arr_orig);
2791         return 0;
2792 free_mem:
2793         mem_descr->num_elements = j;
2794         while ((i) || (j)) {
2795                 for (j = mem_descr->num_elements; j > 0; j--) {
2796                         pci_free_consistent(phba->pcidev,
2797                                             mem_descr->mem_array[j - 1].size,
2798                                             mem_descr->mem_array[j - 1].
2799                                             virtual_address,
2800                                             (unsigned long)mem_descr->
2801                                             mem_array[j - 1].
2802                                             bus_address.u.a64.address);
2803                 }
2804                 if (i) {
2805                         i--;
2806                         kfree(mem_descr->mem_array);
2807                         mem_descr--;
2808                 }
2809         }
2810         kfree(mem_arr_orig);
2811         kfree(phba->init_mem);
2812         kfree(phba->phwi_ctrlr->wrb_context);
2813         kfree(phba->phwi_ctrlr);
2814         return -ENOMEM;
2815 }
2816
2817 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2818 {
2819         beiscsi_find_mem_req(phba);
2820         return beiscsi_alloc_mem(phba);
2821 }
2822
2823 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2824 {
2825         struct pdu_data_out *pdata_out;
2826         struct pdu_nop_out *pnop_out;
2827         struct be_mem_descriptor *mem_descr;
2828
2829         mem_descr = phba->init_mem;
2830         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2831         pdata_out =
2832             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2833         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2834
2835         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2836                       IIOC_SCSI_DATA);
2837
2838         pnop_out =
2839             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2840                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2841
2842         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2843         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2844         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2845         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2846 }
2847
2848 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2849 {
2850         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2851         struct hwi_context_memory *phwi_ctxt;
2852         struct wrb_handle *pwrb_handle = NULL;
2853         struct hwi_controller *phwi_ctrlr;
2854         struct hwi_wrb_context *pwrb_context;
2855         struct iscsi_wrb *pwrb = NULL;
2856         unsigned int num_cxn_wrbh = 0;
2857         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2858
2859         mem_descr_wrbh = phba->init_mem;
2860         mem_descr_wrbh += HWI_MEM_WRBH;
2861
2862         mem_descr_wrb = phba->init_mem;
2863         mem_descr_wrb += HWI_MEM_WRB;
2864         phwi_ctrlr = phba->phwi_ctrlr;
2865
2866         /* Allocate memory for WRBQ */
2867         phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2868         phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2869                                      phba->params.cxns_per_ctrl,
2870                                      GFP_KERNEL);
2871         if (!phwi_ctxt->be_wrbq) {
2872                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2873                             "BM_%d : WRBQ Mem Alloc Failed\n");
2874                 return -ENOMEM;
2875         }
2876
2877         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2878                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2879                 pwrb_context->pwrb_handle_base =
2880                                 kzalloc(sizeof(struct wrb_handle *) *
2881                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2882                 if (!pwrb_context->pwrb_handle_base) {
2883                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2884                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2885                         goto init_wrb_hndl_failed;
2886                 }
2887                 pwrb_context->pwrb_handle_basestd =
2888                                 kzalloc(sizeof(struct wrb_handle *) *
2889                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2890                 if (!pwrb_context->pwrb_handle_basestd) {
2891                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2892                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2893                         goto init_wrb_hndl_failed;
2894                 }
2895                 if (!num_cxn_wrbh) {
2896                         pwrb_handle =
2897                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2898                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2899                                         ((sizeof(struct wrb_handle)) *
2900                                          phba->params.wrbs_per_cxn));
2901                         idx++;
2902                 }
2903                 pwrb_context->alloc_index = 0;
2904                 pwrb_context->wrb_handles_available = 0;
2905                 pwrb_context->free_index = 0;
2906
2907                 if (num_cxn_wrbh) {
2908                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2909                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2910                                 pwrb_context->pwrb_handle_basestd[j] =
2911                                                                 pwrb_handle;
2912                                 pwrb_context->wrb_handles_available++;
2913                                 pwrb_handle->wrb_index = j;
2914                                 pwrb_handle++;
2915                         }
2916                         num_cxn_wrbh--;
2917                 }
2918         }
2919         idx = 0;
2920         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2921                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2922                 if (!num_cxn_wrb) {
2923                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2924                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2925                                 ((sizeof(struct iscsi_wrb) *
2926                                   phba->params.wrbs_per_cxn));
2927                         idx++;
2928                 }
2929
2930                 if (num_cxn_wrb) {
2931                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2932                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2933                                 pwrb_handle->pwrb = pwrb;
2934                                 pwrb++;
2935                         }
2936                         num_cxn_wrb--;
2937                 }
2938         }
2939         return 0;
2940 init_wrb_hndl_failed:
2941         for (j = index; j > 0; j--) {
2942                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2943                 kfree(pwrb_context->pwrb_handle_base);
2944                 kfree(pwrb_context->pwrb_handle_basestd);
2945         }
2946         return -ENOMEM;
2947 }
2948
2949 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2950 {
2951         uint8_t ulp_num;
2952         struct hwi_controller *phwi_ctrlr;
2953         struct hba_parameters *p = &phba->params;
2954         struct hwi_async_pdu_context *pasync_ctx;
2955         struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2956         unsigned int index, idx, num_per_mem, num_async_data;
2957         struct be_mem_descriptor *mem_descr;
2958
2959         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2960                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2961
2962                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2963                         mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2964                                      (ulp_num * MEM_DESCR_OFFSET));
2965
2966                         phwi_ctrlr = phba->phwi_ctrlr;
2967                         phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2968                                 (struct hwi_async_pdu_context *)
2969                                  mem_descr->mem_array[0].virtual_address;
2970
2971                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2972                         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2973
2974                         pasync_ctx->async_entry =
2975                                         (struct hwi_async_entry *)
2976                                         ((long unsigned int)pasync_ctx +
2977                                         sizeof(struct hwi_async_pdu_context));
2978
2979                         pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
2980                                                   ulp_num);
2981                         pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2982
2983                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2984                         mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2985                                 (ulp_num * MEM_DESCR_OFFSET);
2986                         if (mem_descr->mem_array[0].virtual_address) {
2987                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2988                                             "BM_%d : hwi_init_async_pdu_ctx"
2989                                             " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2990                                             ulp_num,
2991                                             mem_descr->mem_array[0].
2992                                             virtual_address);
2993                         } else
2994                                 beiscsi_log(phba, KERN_WARNING,
2995                                             BEISCSI_LOG_INIT,
2996                                             "BM_%d : No Virtual address for ULP : %d\n",
2997                                             ulp_num);
2998
2999                         pasync_ctx->async_header.va_base =
3000                                 mem_descr->mem_array[0].virtual_address;
3001
3002                         pasync_ctx->async_header.pa_base.u.a64.address =
3003                                 mem_descr->mem_array[0].
3004                                 bus_address.u.a64.address;
3005
3006                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3007                         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3008                                      (ulp_num * MEM_DESCR_OFFSET);
3009                         if (mem_descr->mem_array[0].virtual_address) {
3010                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3011                                             "BM_%d : hwi_init_async_pdu_ctx"
3012                                             " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
3013                                             ulp_num,
3014                                             mem_descr->mem_array[0].
3015                                             virtual_address);
3016                         } else
3017                                 beiscsi_log(phba, KERN_WARNING,
3018                                             BEISCSI_LOG_INIT,
3019                                             "BM_%d : No Virtual address for ULP : %d\n",
3020                                             ulp_num);
3021
3022                         pasync_ctx->async_header.ring_base =
3023                                 mem_descr->mem_array[0].virtual_address;
3024
3025                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3026                         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
3027                                      (ulp_num * MEM_DESCR_OFFSET);
3028                         if (mem_descr->mem_array[0].virtual_address) {
3029                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3030                                             "BM_%d : hwi_init_async_pdu_ctx"
3031                                             " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
3032                                             ulp_num,
3033                                             mem_descr->mem_array[0].
3034                                             virtual_address);
3035                         } else
3036                                 beiscsi_log(phba, KERN_WARNING,
3037                                             BEISCSI_LOG_INIT,
3038                                             "BM_%d : No Virtual address for ULP : %d\n",
3039                                             ulp_num);
3040
3041                         pasync_ctx->async_header.handle_base =
3042                                 mem_descr->mem_array[0].virtual_address;
3043                         pasync_ctx->async_header.writables = 0;
3044                         INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
3045
3046                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3047                         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3048                                      (ulp_num * MEM_DESCR_OFFSET);
3049                         if (mem_descr->mem_array[0].virtual_address) {
3050                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3051                                             "BM_%d : hwi_init_async_pdu_ctx"
3052                                             " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
3053                                             ulp_num,
3054                                             mem_descr->mem_array[0].
3055                                             virtual_address);
3056                         } else
3057                                 beiscsi_log(phba, KERN_WARNING,
3058                                             BEISCSI_LOG_INIT,
3059                                             "BM_%d : No Virtual address for ULP : %d\n",
3060                                             ulp_num);
3061
3062                         pasync_ctx->async_data.ring_base =
3063                                 mem_descr->mem_array[0].virtual_address;
3064
3065                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3066                         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
3067                                      (ulp_num * MEM_DESCR_OFFSET);
3068                         if (!mem_descr->mem_array[0].virtual_address)
3069                                 beiscsi_log(phba, KERN_WARNING,
3070                                             BEISCSI_LOG_INIT,
3071                                             "BM_%d : No Virtual address for ULP : %d\n",
3072                                             ulp_num);
3073
3074                         pasync_ctx->async_data.handle_base =
3075                                 mem_descr->mem_array[0].virtual_address;
3076                         pasync_ctx->async_data.writables = 0;
3077                         INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
3078
3079                         pasync_header_h =
3080                                 (struct async_pdu_handle *)
3081                                 pasync_ctx->async_header.handle_base;
3082                         pasync_data_h =
3083                                 (struct async_pdu_handle *)
3084                                 pasync_ctx->async_data.handle_base;
3085
3086                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3087                         mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
3088                                      (ulp_num * MEM_DESCR_OFFSET);
3089                         if (mem_descr->mem_array[0].virtual_address) {
3090                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3091                                             "BM_%d : hwi_init_async_pdu_ctx"
3092                                             " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
3093                                             ulp_num,
3094                                             mem_descr->mem_array[0].
3095                                             virtual_address);
3096                         } else
3097                                 beiscsi_log(phba, KERN_WARNING,
3098                                             BEISCSI_LOG_INIT,
3099                                             "BM_%d : No Virtual address for ULP : %d\n",
3100                                             ulp_num);
3101
3102                         idx = 0;
3103                         pasync_ctx->async_data.va_base =
3104                                 mem_descr->mem_array[idx].virtual_address;
3105                         pasync_ctx->async_data.pa_base.u.a64.address =
3106                                 mem_descr->mem_array[idx].
3107                                 bus_address.u.a64.address;
3108
3109                         num_async_data = ((mem_descr->mem_array[idx].size) /
3110                                         phba->params.defpdu_data_sz);
3111                         num_per_mem = 0;
3112
3113                         for (index = 0; index < BEISCSI_GET_CID_COUNT
3114                                         (phba, ulp_num); index++) {
3115                                 pasync_header_h->cri = -1;
3116                                 pasync_header_h->index = (char)index;
3117                                 INIT_LIST_HEAD(&pasync_header_h->link);
3118                                 pasync_header_h->pbuffer =
3119                                         (void *)((unsigned long)
3120                                                  (pasync_ctx->
3121                                                   async_header.va_base) +
3122                                                  (p->defpdu_hdr_sz * index));
3123
3124                                 pasync_header_h->pa.u.a64.address =
3125                                         pasync_ctx->async_header.pa_base.u.a64.
3126                                         address + (p->defpdu_hdr_sz * index);
3127
3128                                 list_add_tail(&pasync_header_h->link,
3129                                               &pasync_ctx->async_header.
3130                                               free_list);
3131                                 pasync_header_h++;
3132                                 pasync_ctx->async_header.free_entries++;
3133                                 pasync_ctx->async_header.writables++;
3134
3135                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3136                                                wait_queue.list);
3137                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3138                                                header_busy_list);
3139                                 pasync_data_h->cri = -1;
3140                                 pasync_data_h->index = (char)index;
3141                                 INIT_LIST_HEAD(&pasync_data_h->link);
3142
3143                                 if (!num_async_data) {
3144                                         num_per_mem = 0;
3145                                         idx++;
3146                                         pasync_ctx->async_data.va_base =
3147                                                 mem_descr->mem_array[idx].
3148                                                 virtual_address;
3149                                         pasync_ctx->async_data.pa_base.u.
3150                                                 a64.address =
3151                                                 mem_descr->mem_array[idx].
3152                                                 bus_address.u.a64.address;
3153                                         num_async_data =
3154                                                 ((mem_descr->mem_array[idx].
3155                                                   size) /
3156                                                  phba->params.defpdu_data_sz);
3157                                 }
3158                                 pasync_data_h->pbuffer =
3159                                         (void *)((unsigned long)
3160                                         (pasync_ctx->async_data.va_base) +
3161                                         (p->defpdu_data_sz * num_per_mem));
3162
3163                                 pasync_data_h->pa.u.a64.address =
3164                                         pasync_ctx->async_data.pa_base.u.a64.
3165                                         address + (p->defpdu_data_sz *
3166                                         num_per_mem);
3167                                 num_per_mem++;
3168                                 num_async_data--;
3169
3170                                 list_add_tail(&pasync_data_h->link,
3171                                               &pasync_ctx->async_data.
3172                                               free_list);
3173                                 pasync_data_h++;
3174                                 pasync_ctx->async_data.free_entries++;
3175                                 pasync_ctx->async_data.writables++;
3176
3177                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3178                                                data_busy_list);
3179                         }
3180
3181                         pasync_ctx->async_header.host_write_ptr = 0;
3182                         pasync_ctx->async_header.ep_read_ptr = -1;
3183                         pasync_ctx->async_data.host_write_ptr = 0;
3184                         pasync_ctx->async_data.ep_read_ptr = -1;
3185                 }
3186         }
3187
3188         return 0;
3189 }
3190
3191 static int
3192 be_sgl_create_contiguous(void *virtual_address,
3193                          u64 physical_address, u32 length,
3194                          struct be_dma_mem *sgl)
3195 {
3196         WARN_ON(!virtual_address);
3197         WARN_ON(!physical_address);
3198         WARN_ON(!length);
3199         WARN_ON(!sgl);
3200
3201         sgl->va = virtual_address;
3202         sgl->dma = (unsigned long)physical_address;
3203         sgl->size = length;
3204
3205         return 0;
3206 }
3207
3208 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
3209 {
3210         memset(sgl, 0, sizeof(*sgl));
3211 }
3212
3213 static void
3214 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
3215                      struct mem_array *pmem, struct be_dma_mem *sgl)
3216 {
3217         if (sgl->va)
3218                 be_sgl_destroy_contiguous(sgl);
3219
3220         be_sgl_create_contiguous(pmem->virtual_address,
3221                                  pmem->bus_address.u.a64.address,
3222                                  pmem->size, sgl);
3223 }
3224
3225 static void
3226 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3227                            struct mem_array *pmem, struct be_dma_mem *sgl)
3228 {
3229         if (sgl->va)
3230                 be_sgl_destroy_contiguous(sgl);
3231
3232         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
3233                                  pmem->bus_address.u.a64.address,
3234                                  pmem->size, sgl);
3235 }
3236
3237 static int be_fill_queue(struct be_queue_info *q,
3238                 u16 len, u16 entry_size, void *vaddress)
3239 {
3240         struct be_dma_mem *mem = &q->dma_mem;
3241
3242         memset(q, 0, sizeof(*q));
3243         q->len = len;
3244         q->entry_size = entry_size;
3245         mem->size = len * entry_size;
3246         mem->va = vaddress;
3247         if (!mem->va)
3248                 return -ENOMEM;
3249         memset(mem->va, 0, mem->size);
3250         return 0;
3251 }
3252
3253 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3254                              struct hwi_context_memory *phwi_context)
3255 {
3256         unsigned int i, num_eq_pages;
3257         int ret = 0, eq_for_mcc;
3258         struct be_queue_info *eq;
3259         struct be_dma_mem *mem;
3260         void *eq_vaddress;
3261         dma_addr_t paddr;
3262
3263         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3264                                       sizeof(struct be_eq_entry));
3265
3266         if (phba->msix_enabled)
3267                 eq_for_mcc = 1;
3268         else
3269                 eq_for_mcc = 0;
3270         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3271                 eq = &phwi_context->be_eq[i].q;
3272                 mem = &eq->dma_mem;
3273                 phwi_context->be_eq[i].phba = phba;
3274                 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3275                                                      num_eq_pages * PAGE_SIZE,
3276                                                      &paddr);
3277                 if (!eq_vaddress)
3278                         goto create_eq_error;
3279
3280                 mem->va = eq_vaddress;
3281                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3282                                     sizeof(struct be_eq_entry), eq_vaddress);
3283                 if (ret) {
3284                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3285                                     "BM_%d : be_fill_queue Failed for EQ\n");
3286                         goto create_eq_error;
3287                 }
3288
3289                 mem->dma = paddr;
3290                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3291                                             phwi_context->cur_eqd);
3292                 if (ret) {
3293                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3294                                     "BM_%d : beiscsi_cmd_eq_create"
3295                                     "Failed for EQ\n");
3296                         goto create_eq_error;
3297                 }
3298
3299                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3300                             "BM_%d : eqid = %d\n",
3301                             phwi_context->be_eq[i].q.id);
3302         }
3303         return 0;
3304 create_eq_error:
3305         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3306                 eq = &phwi_context->be_eq[i].q;
3307                 mem = &eq->dma_mem;
3308                 if (mem->va)
3309                         pci_free_consistent(phba->pcidev, num_eq_pages
3310                                             * PAGE_SIZE,
3311                                             mem->va, mem->dma);
3312         }
3313         return ret;
3314 }
3315
3316 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3317                              struct hwi_context_memory *phwi_context)
3318 {
3319         unsigned int i, num_cq_pages;
3320         int ret = 0;
3321         struct be_queue_info *cq, *eq;
3322         struct be_dma_mem *mem;
3323         struct be_eq_obj *pbe_eq;
3324         void *cq_vaddress;
3325         dma_addr_t paddr;
3326
3327         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3328                                       sizeof(struct sol_cqe));
3329
3330         for (i = 0; i < phba->num_cpus; i++) {
3331                 cq = &phwi_context->be_cq[i];
3332                 eq = &phwi_context->be_eq[i].q;
3333                 pbe_eq = &phwi_context->be_eq[i];
3334                 pbe_eq->cq = cq;
3335                 pbe_eq->phba = phba;
3336                 mem = &cq->dma_mem;
3337                 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3338                                                      num_cq_pages * PAGE_SIZE,
3339                                                      &paddr);
3340                 if (!cq_vaddress)
3341                         goto create_cq_error;
3342                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3343                                     sizeof(struct sol_cqe), cq_vaddress);
3344                 if (ret) {
3345                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3346                                     "BM_%d : be_fill_queue Failed "
3347                                     "for ISCSI CQ\n");
3348                         goto create_cq_error;
3349                 }
3350
3351                 mem->dma = paddr;
3352                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3353                                             false, 0);
3354                 if (ret) {
3355                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3356                                     "BM_%d : beiscsi_cmd_eq_create"
3357                                     "Failed for ISCSI CQ\n");
3358                         goto create_cq_error;
3359                 }
3360                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3361                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3362                             "iSCSI CQ CREATED\n", cq->id, eq->id);
3363         }
3364         return 0;
3365
3366 create_cq_error:
3367         for (i = 0; i < phba->num_cpus; i++) {
3368                 cq = &phwi_context->be_cq[i];
3369                 mem = &cq->dma_mem;
3370                 if (mem->va)
3371                         pci_free_consistent(phba->pcidev, num_cq_pages
3372                                             * PAGE_SIZE,
3373                                             mem->va, mem->dma);
3374         }
3375         return ret;
3376
3377 }
3378
3379 static int
3380 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3381                        struct hwi_context_memory *phwi_context,
3382                        struct hwi_controller *phwi_ctrlr,
3383                        unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3384 {
3385         unsigned int idx;
3386         int ret;
3387         struct be_queue_info *dq, *cq;
3388         struct be_dma_mem *mem;
3389         struct be_mem_descriptor *mem_descr;
3390         void *dq_vaddress;
3391
3392         idx = 0;
3393         dq = &phwi_context->be_def_hdrq[ulp_num];
3394         cq = &phwi_context->be_cq[0];
3395         mem = &dq->dma_mem;
3396         mem_descr = phba->init_mem;
3397         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3398                     (ulp_num * MEM_DESCR_OFFSET);
3399         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3400         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3401                             sizeof(struct phys_addr),
3402                             sizeof(struct phys_addr), dq_vaddress);
3403         if (ret) {
3404                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3405                             "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3406                             ulp_num);
3407
3408                 return ret;
3409         }
3410         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3411                                   bus_address.u.a64.address;
3412         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3413                                               def_pdu_ring_sz,
3414                                               phba->params.defpdu_hdr_sz,
3415                                               BEISCSI_DEFQ_HDR, ulp_num);
3416         if (ret) {
3417                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3418                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3419                             ulp_num);
3420
3421                 return ret;
3422         }
3423
3424         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3425                     "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3426                     ulp_num,
3427                     phwi_context->be_def_hdrq[ulp_num].id);
3428         hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num);
3429         return 0;
3430 }
3431
3432 static int
3433 beiscsi_create_def_data(struct beiscsi_hba *phba,
3434                         struct hwi_context_memory *phwi_context,
3435                         struct hwi_controller *phwi_ctrlr,
3436                         unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3437 {
3438         unsigned int idx;
3439         int ret;
3440         struct be_queue_info *dataq, *cq;
3441         struct be_dma_mem *mem;
3442         struct be_mem_descriptor *mem_descr;
3443         void *dq_vaddress;
3444
3445         idx = 0;
3446         dataq = &phwi_context->be_def_dataq[ulp_num];
3447         cq = &phwi_context->be_cq[0];
3448         mem = &dataq->dma_mem;
3449         mem_descr = phba->init_mem;
3450         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3451                     (ulp_num * MEM_DESCR_OFFSET);
3452         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3453         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3454                             sizeof(struct phys_addr),
3455                             sizeof(struct phys_addr), dq_vaddress);
3456         if (ret) {
3457                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3458                             "BM_%d : be_fill_queue Failed for DEF PDU "
3459                             "DATA on ULP : %d\n",
3460                             ulp_num);
3461
3462                 return ret;
3463         }
3464         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3465                                   bus_address.u.a64.address;
3466         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3467                                               def_pdu_ring_sz,
3468                                               phba->params.defpdu_data_sz,
3469                                               BEISCSI_DEFQ_DATA, ulp_num);
3470         if (ret) {
3471                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3472                             "BM_%d be_cmd_create_default_pdu_queue"
3473                             " Failed for DEF PDU DATA on ULP : %d\n",
3474                             ulp_num);
3475                 return ret;
3476         }
3477
3478         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3479                     "BM_%d : iscsi def data id on ULP : %d is  %d\n",
3480                     ulp_num,
3481                     phwi_context->be_def_dataq[ulp_num].id);
3482
3483         hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num);
3484         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3485                     "BM_%d : DEFAULT PDU DATA RING CREATED"
3486                     "on ULP : %d\n", ulp_num);
3487
3488         return 0;
3489 }
3490
3491
3492 static int
3493 beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3494 {
3495         struct be_mem_descriptor *mem_descr;
3496         struct mem_array *pm_arr;
3497         struct be_dma_mem sgl;
3498         int status, ulp_num;
3499
3500         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3501                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3502                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3503                         mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3504                                     (ulp_num * MEM_DESCR_OFFSET);
3505                         pm_arr = mem_descr->mem_array;
3506
3507                         hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3508                         status = be_cmd_iscsi_post_template_hdr(
3509                                  &phba->ctrl, &sgl);
3510
3511                         if (status != 0) {
3512                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3513                                             "BM_%d : Post Template HDR Failed for"
3514                                             "ULP_%d\n", ulp_num);
3515                                 return status;
3516                         }
3517
3518                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3519                                     "BM_%d : Template HDR Pages Posted for"
3520                                     "ULP_%d\n", ulp_num);
3521                 }
3522         }
3523         return 0;
3524 }
3525
3526 static int
3527 beiscsi_post_pages(struct beiscsi_hba *phba)
3528 {
3529         struct be_mem_descriptor *mem_descr;
3530         struct mem_array *pm_arr;
3531         unsigned int page_offset, i;
3532         struct be_dma_mem sgl;
3533         int status, ulp_num = 0;
3534
3535         mem_descr = phba->init_mem;
3536         mem_descr += HWI_MEM_SGE;
3537         pm_arr = mem_descr->mem_array;
3538
3539         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3540                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3541                         break;
3542
3543         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3544                         phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3545         for (i = 0; i < mem_descr->num_elements; i++) {
3546                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3547                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3548                                                 page_offset,
3549                                                 (pm_arr->size / PAGE_SIZE));
3550                 page_offset += pm_arr->size / PAGE_SIZE;
3551                 if (status != 0) {
3552                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3553                                     "BM_%d : post sgl failed.\n");
3554                         return status;
3555                 }
3556                 pm_arr++;
3557         }
3558         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3559                     "BM_%d : POSTED PAGES\n");
3560         return 0;
3561 }
3562
3563 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3564 {
3565         struct be_dma_mem *mem = &q->dma_mem;
3566         if (mem->va) {
3567                 pci_free_consistent(phba->pcidev, mem->size,
3568                         mem->va, mem->dma);
3569                 mem->va = NULL;
3570         }
3571 }
3572
3573 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3574                 u16 len, u16 entry_size)
3575 {
3576         struct be_dma_mem *mem = &q->dma_mem;
3577
3578         memset(q, 0, sizeof(*q));
3579         q->len = len;
3580         q->entry_size = entry_size;
3581         mem->size = len * entry_size;
3582         mem->va = pci_zalloc_consistent(phba->pcidev, mem->size, &mem->dma);
3583         if (!mem->va)
3584                 return -ENOMEM;
3585         return 0;
3586 }
3587
3588 static int
3589 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3590                          struct hwi_context_memory *phwi_context,
3591                          struct hwi_controller *phwi_ctrlr)
3592 {
3593         unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3594         u64 pa_addr_lo;
3595         unsigned int idx, num, i, ulp_num;
3596         struct mem_array *pwrb_arr;
3597         void *wrb_vaddr;
3598         struct be_dma_mem sgl;
3599         struct be_mem_descriptor *mem_descr;
3600         struct hwi_wrb_context *pwrb_context;
3601         int status;
3602         uint8_t ulp_count = 0, ulp_base_num = 0;
3603         uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3604
3605         idx = 0;
3606         mem_descr = phba->init_mem;
3607         mem_descr += HWI_MEM_WRB;
3608         pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3609                            GFP_KERNEL);
3610         if (!pwrb_arr) {
3611                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3612                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3613                 return -ENOMEM;
3614         }
3615         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3616         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3617         num_wrb_rings = mem_descr->mem_array[idx].size /
3618                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3619
3620         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3621                 if (num_wrb_rings) {
3622                         pwrb_arr[num].virtual_address = wrb_vaddr;
3623                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3624                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3625                                             sizeof(struct iscsi_wrb);
3626                         wrb_vaddr += pwrb_arr[num].size;
3627                         pa_addr_lo += pwrb_arr[num].size;
3628                         num_wrb_rings--;
3629                 } else {
3630                         idx++;
3631                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3632                         pa_addr_lo = mem_descr->mem_array[idx].\
3633                                         bus_address.u.a64.address;
3634                         num_wrb_rings = mem_descr->mem_array[idx].size /
3635                                         (phba->params.wrbs_per_cxn *
3636                                         sizeof(struct iscsi_wrb));
3637                         pwrb_arr[num].virtual_address = wrb_vaddr;
3638                         pwrb_arr[num].bus_address.u.a64.address\
3639                                                 = pa_addr_lo;
3640                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3641                                                  sizeof(struct iscsi_wrb);
3642                         wrb_vaddr += pwrb_arr[num].size;
3643                         pa_addr_lo   += pwrb_arr[num].size;
3644                         num_wrb_rings--;
3645                 }
3646         }
3647
3648         /* Get the ULP Count */
3649         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3650                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3651                         ulp_count++;
3652                         ulp_base_num = ulp_num;
3653                         cid_count_ulp[ulp_num] =
3654                                 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3655                 }
3656
3657         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3658                 wrb_mem_index = 0;
3659                 offset = 0;
3660                 size = 0;
3661
3662                 if (ulp_count > 1) {
3663                         ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3664
3665                         if (!cid_count_ulp[ulp_base_num])
3666                                 ulp_base_num = (ulp_base_num + 1) %
3667                                                 BEISCSI_ULP_COUNT;
3668
3669                         cid_count_ulp[ulp_base_num]--;
3670                 }
3671
3672
3673                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3674                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3675                                             &phwi_context->be_wrbq[i],
3676                                             &phwi_ctrlr->wrb_context[i],
3677                                             ulp_base_num);
3678                 if (status != 0) {
3679                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3680                                     "BM_%d : wrbq create failed.");
3681                         kfree(pwrb_arr);
3682                         return status;
3683                 }
3684                 pwrb_context = &phwi_ctrlr->wrb_context[i];
3685                 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3686         }
3687         kfree(pwrb_arr);
3688         return 0;
3689 }
3690
3691 static void free_wrb_handles(struct beiscsi_hba *phba)
3692 {
3693         unsigned int index;
3694         struct hwi_controller *phwi_ctrlr;
3695         struct hwi_wrb_context *pwrb_context;
3696
3697         phwi_ctrlr = phba->phwi_ctrlr;
3698         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3699                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3700                 kfree(pwrb_context->pwrb_handle_base);
3701                 kfree(pwrb_context->pwrb_handle_basestd);
3702         }
3703 }
3704
3705 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3706 {
3707         struct be_queue_info *q;
3708         struct be_ctrl_info *ctrl = &phba->ctrl;
3709
3710         q = &phba->ctrl.mcc_obj.q;
3711         if (q->created) {
3712                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3713                 be_queue_free(phba, q);
3714         }
3715
3716         q = &phba->ctrl.mcc_obj.cq;
3717         if (q->created) {
3718                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3719                 be_queue_free(phba, q);
3720         }
3721 }
3722
3723 static void hwi_cleanup(struct beiscsi_hba *phba)
3724 {
3725         struct be_queue_info *q;
3726         struct be_ctrl_info *ctrl = &phba->ctrl;
3727         struct hwi_controller *phwi_ctrlr;
3728         struct hwi_context_memory *phwi_context;
3729         struct hwi_async_pdu_context *pasync_ctx;
3730         int i, eq_for_mcc, ulp_num;
3731
3732         phwi_ctrlr = phba->phwi_ctrlr;
3733         phwi_context = phwi_ctrlr->phwi_ctxt;
3734
3735         be_cmd_iscsi_remove_template_hdr(ctrl);
3736
3737         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3738                 q = &phwi_context->be_wrbq[i];
3739                 if (q->created)
3740                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3741         }
3742         kfree(phwi_context->be_wrbq);
3743         free_wrb_handles(phba);
3744
3745         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3746                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3747
3748                         q = &phwi_context->be_def_hdrq[ulp_num];
3749                         if (q->created)
3750                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3751
3752                         q = &phwi_context->be_def_dataq[ulp_num];
3753                         if (q->created)
3754                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3755
3756                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
3757                 }
3758         }
3759
3760         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3761
3762         for (i = 0; i < (phba->num_cpus); i++) {
3763                 q = &phwi_context->be_cq[i];
3764                 if (q->created) {
3765                         be_queue_free(phba, q);
3766                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3767                 }
3768         }
3769
3770         be_mcc_queues_destroy(phba);
3771         if (phba->msix_enabled)
3772                 eq_for_mcc = 1;
3773         else
3774                 eq_for_mcc = 0;
3775         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3776                 q = &phwi_context->be_eq[i].q;
3777                 if (q->created) {
3778                         be_queue_free(phba, q);
3779                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3780                 }
3781         }
3782         be_cmd_fw_uninit(ctrl);
3783 }
3784
3785 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3786                                 struct hwi_context_memory *phwi_context)
3787 {
3788         struct be_queue_info *q, *cq;
3789         struct be_ctrl_info *ctrl = &phba->ctrl;
3790
3791         /* Alloc MCC compl queue */
3792         cq = &phba->ctrl.mcc_obj.cq;
3793         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3794                         sizeof(struct be_mcc_compl)))
3795                 goto err;
3796         /* Ask BE to create MCC compl queue; */
3797         if (phba->msix_enabled) {
3798                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3799                                          [phba->num_cpus].q, false, true, 0))
3800                 goto mcc_cq_free;
3801         } else {
3802                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3803                                           false, true, 0))
3804                 goto mcc_cq_free;
3805         }
3806
3807         /* Alloc MCC queue */
3808         q = &phba->ctrl.mcc_obj.q;
3809         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3810                 goto mcc_cq_destroy;
3811
3812         /* Ask BE to create MCC queue */
3813         if (beiscsi_cmd_mccq_create(phba, q, cq))
3814                 goto mcc_q_free;
3815
3816         return 0;
3817
3818 mcc_q_free:
3819         be_queue_free(phba, q);
3820 mcc_cq_destroy:
3821         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3822 mcc_cq_free:
3823         be_queue_free(phba, cq);
3824 err:
3825         return -ENOMEM;
3826 }
3827
3828 /**
3829  * find_num_cpus()- Get the CPU online count
3830  * @phba: ptr to priv structure
3831  *
3832  * CPU count is used for creating EQ.
3833  **/
3834 static void find_num_cpus(struct beiscsi_hba *phba)
3835 {
3836         int  num_cpus = 0;
3837
3838         num_cpus = num_online_cpus();
3839
3840         switch (phba->generation) {
3841         case BE_GEN2:
3842         case BE_GEN3:
3843                 phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
3844                                   BEISCSI_MAX_NUM_CPUS : num_cpus;
3845                 break;
3846         case BE_GEN4:
3847                 /*
3848                  * If eqid_count == 1 fall back to
3849                  * INTX mechanism
3850                  **/
3851                 if (phba->fw_config.eqid_count == 1) {
3852                         enable_msix = 0;
3853                         phba->num_cpus = 1;
3854                         return;
3855                 }
3856
3857                 phba->num_cpus =
3858                         (num_cpus > (phba->fw_config.eqid_count - 1)) ?
3859                         (phba->fw_config.eqid_count - 1) : num_cpus;
3860                 break;
3861         default:
3862                 phba->num_cpus = 1;
3863         }
3864 }
3865
3866 static int hwi_init_port(struct beiscsi_hba *phba)
3867 {
3868         struct hwi_controller *phwi_ctrlr;
3869         struct hwi_context_memory *phwi_context;
3870         unsigned int def_pdu_ring_sz;
3871         struct be_ctrl_info *ctrl = &phba->ctrl;
3872         int status, ulp_num;
3873
3874         phwi_ctrlr = phba->phwi_ctrlr;
3875         phwi_context = phwi_ctrlr->phwi_ctxt;
3876         phwi_context->max_eqd = 128;
3877         phwi_context->min_eqd = 0;
3878         phwi_context->cur_eqd = 0;
3879         be_cmd_fw_initialize(&phba->ctrl);
3880         /* set optic state to unknown */
3881         phba->optic_state = 0xff;
3882
3883         status = beiscsi_create_eqs(phba, phwi_context);
3884         if (status != 0) {
3885                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3886                             "BM_%d : EQ not created\n");
3887                 goto error;
3888         }
3889
3890         status = be_mcc_queues_create(phba, phwi_context);
3891         if (status != 0)
3892                 goto error;
3893
3894         status = mgmt_check_supported_fw(ctrl, phba);
3895         if (status != 0) {
3896                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3897                             "BM_%d : Unsupported fw version\n");
3898                 goto error;
3899         }
3900
3901         status = beiscsi_create_cqs(phba, phwi_context);
3902         if (status != 0) {
3903                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3904                             "BM_%d : CQ not created\n");
3905                 goto error;
3906         }
3907
3908         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3909                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3910
3911                         def_pdu_ring_sz =
3912                                 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
3913                                 sizeof(struct phys_addr);
3914
3915                         status = beiscsi_create_def_hdr(phba, phwi_context,
3916                                                         phwi_ctrlr,
3917                                                         def_pdu_ring_sz,
3918                                                         ulp_num);
3919                         if (status != 0) {
3920                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3921                                             "BM_%d : Default Header not created for ULP : %d\n",
3922                                             ulp_num);
3923                                 goto error;
3924                         }
3925
3926                         status = beiscsi_create_def_data(phba, phwi_context,
3927                                                          phwi_ctrlr,
3928                                                          def_pdu_ring_sz,
3929                                                          ulp_num);
3930                         if (status != 0) {
3931                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3932                                             "BM_%d : Default Data not created for ULP : %d\n",
3933                                             ulp_num);
3934                                 goto error;
3935                         }
3936                 }
3937         }
3938
3939         status = beiscsi_post_pages(phba);
3940         if (status != 0) {
3941                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3942                             "BM_%d : Post SGL Pages Failed\n");
3943                 goto error;
3944         }
3945
3946         status = beiscsi_post_template_hdr(phba);
3947         if (status != 0) {
3948                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3949                             "BM_%d : Template HDR Posting for CXN Failed\n");
3950         }
3951
3952         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3953         if (status != 0) {
3954                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3955                             "BM_%d : WRB Rings not created\n");
3956                 goto error;
3957         }
3958
3959         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3960                 uint16_t async_arr_idx = 0;
3961
3962                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3963                         uint16_t cri = 0;
3964                         struct hwi_async_pdu_context *pasync_ctx;
3965
3966                         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3967                                      phwi_ctrlr, ulp_num);
3968                         for (cri = 0; cri <
3969                              phba->params.cxns_per_ctrl; cri++) {
3970                                 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3971                                                (phwi_ctrlr, cri))
3972                                         pasync_ctx->cid_to_async_cri_map[
3973                                         phwi_ctrlr->wrb_context[cri].cid] =
3974                                         async_arr_idx++;
3975                         }
3976                 }
3977         }
3978
3979         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3980                     "BM_%d : hwi_init_port success\n");
3981         return 0;
3982
3983 error:
3984         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3985                     "BM_%d : hwi_init_port failed");
3986         hwi_cleanup(phba);
3987         return status;
3988 }
3989
3990 static int hwi_init_controller(struct beiscsi_hba *phba)
3991 {
3992         struct hwi_controller *phwi_ctrlr;
3993
3994         phwi_ctrlr = phba->phwi_ctrlr;
3995         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3996                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3997                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3998                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3999                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
4000                             phwi_ctrlr->phwi_ctxt);
4001         } else {
4002                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4003                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
4004                             "than one element.Failing to load\n");
4005                 return -ENOMEM;
4006         }
4007
4008         iscsi_init_global_templates(phba);
4009         if (beiscsi_init_wrb_handle(phba))
4010                 return -ENOMEM;
4011
4012         if (hwi_init_async_pdu_ctx(phba)) {
4013                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4014                             "BM_%d : hwi_init_async_pdu_ctx failed\n");
4015                 return -ENOMEM;
4016         }
4017
4018         if (hwi_init_port(phba) != 0) {
4019                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4020                             "BM_%d : hwi_init_controller failed\n");
4021
4022                 return -ENOMEM;
4023         }
4024         return 0;
4025 }
4026
4027 static void beiscsi_free_mem(struct beiscsi_hba *phba)
4028 {
4029         struct be_mem_descriptor *mem_descr;
4030         int i, j;
4031
4032         mem_descr = phba->init_mem;
4033         i = 0;
4034         j = 0;
4035         for (i = 0; i < SE_MEM_MAX; i++) {
4036                 for (j = mem_descr->num_elements; j > 0; j--) {
4037                         pci_free_consistent(phba->pcidev,
4038                           mem_descr->mem_array[j - 1].size,
4039                           mem_descr->mem_array[j - 1].virtual_address,
4040                           (unsigned long)mem_descr->mem_array[j - 1].
4041                           bus_address.u.a64.address);
4042                 }
4043
4044                 kfree(mem_descr->mem_array);
4045                 mem_descr++;
4046         }
4047         kfree(phba->init_mem);
4048         kfree(phba->phwi_ctrlr->wrb_context);
4049         kfree(phba->phwi_ctrlr);
4050 }
4051
4052 static int beiscsi_init_controller(struct beiscsi_hba *phba)
4053 {
4054         int ret = -ENOMEM;
4055
4056         ret = beiscsi_get_memory(phba);
4057         if (ret < 0) {
4058                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4059                             "BM_%d : beiscsi_dev_probe -"
4060                             "Failed in beiscsi_alloc_memory\n");
4061                 return ret;
4062         }
4063
4064         ret = hwi_init_controller(phba);
4065         if (ret)
4066                 goto free_init;
4067         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4068                     "BM_%d : Return success from beiscsi_init_controller");
4069
4070         return 0;
4071
4072 free_init:
4073         beiscsi_free_mem(phba);
4074         return ret;
4075 }
4076
4077 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
4078 {
4079         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
4080         struct sgl_handle *psgl_handle;
4081         struct iscsi_sge *pfrag;
4082         unsigned int arr_index, i, idx;
4083         unsigned int ulp_icd_start, ulp_num = 0;
4084
4085         phba->io_sgl_hndl_avbl = 0;
4086         phba->eh_sgl_hndl_avbl = 0;
4087
4088         mem_descr_sglh = phba->init_mem;
4089         mem_descr_sglh += HWI_MEM_SGLH;
4090         if (1 == mem_descr_sglh->num_elements) {
4091                 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4092                                                  phba->params.ios_per_ctrl,
4093                                                  GFP_KERNEL);
4094                 if (!phba->io_sgl_hndl_base) {
4095                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4096                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4097                         return -ENOMEM;
4098                 }
4099                 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4100                                                  (phba->params.icds_per_ctrl -
4101                                                  phba->params.ios_per_ctrl),
4102                                                  GFP_KERNEL);
4103                 if (!phba->eh_sgl_hndl_base) {
4104                         kfree(phba->io_sgl_hndl_base);
4105                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4106                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4107                         return -ENOMEM;
4108                 }
4109         } else {
4110                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4111                             "BM_%d : HWI_MEM_SGLH is more than one element."
4112                             "Failing to load\n");
4113                 return -ENOMEM;
4114         }
4115
4116         arr_index = 0;
4117         idx = 0;
4118         while (idx < mem_descr_sglh->num_elements) {
4119                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
4120
4121                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
4122                       sizeof(struct sgl_handle)); i++) {
4123                         if (arr_index < phba->params.ios_per_ctrl) {
4124                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
4125                                 phba->io_sgl_hndl_avbl++;
4126                                 arr_index++;
4127                         } else {
4128                                 phba->eh_sgl_hndl_base[arr_index -
4129                                         phba->params.ios_per_ctrl] =
4130                                                                 psgl_handle;
4131                                 arr_index++;
4132                                 phba->eh_sgl_hndl_avbl++;
4133                         }
4134                         psgl_handle++;
4135                 }
4136                 idx++;
4137         }
4138         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4139                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
4140                     "phba->eh_sgl_hndl_avbl=%d\n",
4141                     phba->io_sgl_hndl_avbl,
4142                     phba->eh_sgl_hndl_avbl);
4143
4144         mem_descr_sg = phba->init_mem;
4145         mem_descr_sg += HWI_MEM_SGE;
4146         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4147                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
4148                     mem_descr_sg->num_elements);
4149
4150         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
4151                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
4152                         break;
4153
4154         ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
4155
4156         arr_index = 0;
4157         idx = 0;
4158         while (idx < mem_descr_sg->num_elements) {
4159                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
4160
4161                 for (i = 0;
4162                      i < (mem_descr_sg->mem_array[idx].size) /
4163                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
4164                      i++) {
4165                         if (arr_index < phba->params.ios_per_ctrl)
4166                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
4167                         else
4168                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
4169                                                 phba->params.ios_per_ctrl];
4170                         psgl_handle->pfrag = pfrag;
4171                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
4172                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
4173                         pfrag += phba->params.num_sge_per_io;
4174                         psgl_handle->sgl_index = ulp_icd_start + arr_index++;
4175                 }
4176                 idx++;
4177         }
4178         phba->io_sgl_free_index = 0;
4179         phba->io_sgl_alloc_index = 0;
4180         phba->eh_sgl_free_index = 0;
4181         phba->eh_sgl_alloc_index = 0;
4182         return 0;
4183 }
4184
4185 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4186 {
4187         int ret;
4188         uint16_t i, ulp_num;
4189         struct ulp_cid_info *ptr_cid_info = NULL;
4190
4191         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4192                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4193                         ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
4194                                                GFP_KERNEL);
4195
4196                         if (!ptr_cid_info) {
4197                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4198                                             "BM_%d : Failed to allocate memory"
4199                                             "for ULP_CID_INFO for ULP : %d\n",
4200                                             ulp_num);
4201                                 ret = -ENOMEM;
4202                                 goto free_memory;
4203
4204                         }
4205
4206                         /* Allocate memory for CID array */
4207                         ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
4208                                                   BEISCSI_GET_CID_COUNT(phba,
4209                                                   ulp_num), GFP_KERNEL);
4210                         if (!ptr_cid_info->cid_array) {
4211                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4212                                             "BM_%d : Failed to allocate memory"
4213                                             "for CID_ARRAY for ULP : %d\n",
4214                                             ulp_num);
4215                                 kfree(ptr_cid_info);
4216                                 ptr_cid_info = NULL;
4217                                 ret = -ENOMEM;
4218
4219                                 goto free_memory;
4220                         }
4221                         ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4222                                                    phba, ulp_num);
4223
4224                         /* Save the cid_info_array ptr */
4225                         phba->cid_array_info[ulp_num] = ptr_cid_info;
4226                 }
4227         }
4228         phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
4229                                  phba->params.cxns_per_ctrl, GFP_KERNEL);
4230         if (!phba->ep_array) {
4231                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4232                             "BM_%d : Failed to allocate memory in "
4233                             "hba_setup_cid_tbls\n");
4234                 ret = -ENOMEM;
4235
4236                 goto free_memory;
4237         }
4238
4239         phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4240                                    phba->params.cxns_per_ctrl, GFP_KERNEL);
4241         if (!phba->conn_table) {
4242                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4243                             "BM_%d : Failed to allocate memory in"
4244                             "hba_setup_cid_tbls\n");
4245
4246                 kfree(phba->ep_array);
4247                 phba->ep_array = NULL;
4248                 ret = -ENOMEM;
4249
4250                 goto free_memory;
4251         }
4252
4253         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4254                 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4255
4256                 ptr_cid_info = phba->cid_array_info[ulp_num];
4257                 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4258                         phba->phwi_ctrlr->wrb_context[i].cid;
4259
4260         }
4261
4262         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4263                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4264                         ptr_cid_info = phba->cid_array_info[ulp_num];
4265
4266                         ptr_cid_info->cid_alloc = 0;
4267                         ptr_cid_info->cid_free = 0;
4268                 }
4269         }
4270         return 0;
4271
4272 free_memory:
4273         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4274                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4275                         ptr_cid_info = phba->cid_array_info[ulp_num];
4276
4277                         if (ptr_cid_info) {
4278                                 kfree(ptr_cid_info->cid_array);
4279                                 kfree(ptr_cid_info);
4280                                 phba->cid_array_info[ulp_num] = NULL;
4281                         }
4282                 }
4283         }
4284
4285         return ret;
4286 }
4287
4288 static void hwi_enable_intr(struct beiscsi_hba *phba)
4289 {
4290         struct be_ctrl_info *ctrl = &phba->ctrl;
4291         struct hwi_controller *phwi_ctrlr;
4292         struct hwi_context_memory *phwi_context;
4293         struct be_queue_info *eq;
4294         u8 __iomem *addr;
4295         u32 reg, i;
4296         u32 enabled;
4297
4298         phwi_ctrlr = phba->phwi_ctrlr;
4299         phwi_context = phwi_ctrlr->phwi_ctxt;
4300
4301         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4302                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4303         reg = ioread32(addr);
4304
4305         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4306         if (!enabled) {
4307                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4308                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4309                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4310                 iowrite32(reg, addr);
4311         }
4312
4313         if (!phba->msix_enabled) {
4314                 eq = &phwi_context->be_eq[0].q;
4315                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4316                             "BM_%d : eq->id=%d\n", eq->id);
4317
4318                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4319         } else {
4320                 for (i = 0; i <= phba->num_cpus; i++) {
4321                         eq = &phwi_context->be_eq[i].q;
4322                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4323                                     "BM_%d : eq->id=%d\n", eq->id);
4324                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4325                 }
4326         }
4327 }
4328
4329 static void hwi_disable_intr(struct beiscsi_hba *phba)
4330 {
4331         struct be_ctrl_info *ctrl = &phba->ctrl;
4332
4333         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4334         u32 reg = ioread32(addr);
4335
4336         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4337         if (enabled) {
4338                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4339                 iowrite32(reg, addr);
4340         } else
4341                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4342                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
4343 }
4344
4345 /**
4346  * beiscsi_get_boot_info()- Get the boot session info
4347  * @phba: The device priv structure instance
4348  *
4349  * Get the boot target info and store in driver priv structure
4350  *
4351  * return values
4352  *      Success: 0
4353  *      Failure: Non-Zero Value
4354  **/
4355 static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
4356 {
4357         struct be_cmd_get_session_resp *session_resp;
4358         struct be_dma_mem nonemb_cmd;
4359         unsigned int tag;
4360         unsigned int s_handle;
4361         int ret = -ENOMEM;
4362
4363         /* Get the session handle of the boot target */
4364         ret = be_mgmt_get_boot_shandle(phba, &s_handle);
4365         if (ret) {
4366                 beiscsi_log(phba, KERN_ERR,
4367                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4368                             "BM_%d : No boot session\n");
4369
4370                 if (ret == -ENXIO)
4371                         phba->get_boot = 0;
4372
4373
4374                 return ret;
4375         }
4376         phba->get_boot = 0;
4377         nonemb_cmd.va = pci_zalloc_consistent(phba->ctrl.pdev,
4378                                               sizeof(*session_resp),
4379                                               &nonemb_cmd.dma);
4380         if (nonemb_cmd.va == NULL) {
4381                 beiscsi_log(phba, KERN_ERR,
4382                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4383                             "BM_%d : Failed to allocate memory for"
4384                             "beiscsi_get_session_info\n");
4385
4386                 return -ENOMEM;
4387         }
4388
4389         tag = mgmt_get_session_info(phba, s_handle,
4390                                     &nonemb_cmd);
4391         if (!tag) {
4392                 beiscsi_log(phba, KERN_ERR,
4393                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4394                             "BM_%d : beiscsi_get_session_info"
4395                             " Failed\n");
4396
4397                 goto boot_freemem;
4398         }
4399
4400         ret = beiscsi_mccq_compl(phba, tag, NULL, &nonemb_cmd);
4401         if (ret) {
4402                 beiscsi_log(phba, KERN_ERR,
4403                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4404                             "BM_%d : beiscsi_get_session_info Failed");
4405
4406                 if (ret != -EBUSY)
4407                         goto boot_freemem;
4408                 else
4409                         return ret;
4410         }
4411
4412         session_resp = nonemb_cmd.va ;
4413
4414         memcpy(&phba->boot_sess, &session_resp->session_info,
4415                sizeof(struct mgmt_session_info));
4416
4417          beiscsi_logout_fw_sess(phba,
4418                                 phba->boot_sess.session_handle);
4419         ret = 0;
4420
4421 boot_freemem:
4422         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4423                     nonemb_cmd.va, nonemb_cmd.dma);
4424         return ret;
4425 }
4426
4427 static void beiscsi_boot_release(void *data)
4428 {
4429         struct beiscsi_hba *phba = data;
4430
4431         scsi_host_put(phba->shost);
4432 }
4433
4434 static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
4435 {
4436         struct iscsi_boot_kobj *boot_kobj;
4437
4438         /* it has been created previously */
4439         if (phba->boot_kset)
4440                 return 0;
4441
4442         /* get boot info using mgmt cmd */
4443         if (beiscsi_get_boot_info(phba))
4444                 /* Try to see if we can carry on without this */
4445                 return 0;
4446
4447         phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
4448         if (!phba->boot_kset)
4449                 return -ENOMEM;
4450
4451         /* get a ref because the show function will ref the phba */
4452         if (!scsi_host_get(phba->shost))
4453                 goto free_kset;
4454         boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
4455                                              beiscsi_show_boot_tgt_info,
4456                                              beiscsi_tgt_get_attr_visibility,
4457                                              beiscsi_boot_release);
4458         if (!boot_kobj)
4459                 goto put_shost;
4460
4461         if (!scsi_host_get(phba->shost))
4462                 goto free_kset;
4463         boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
4464                                                 beiscsi_show_boot_ini_info,
4465                                                 beiscsi_ini_get_attr_visibility,
4466                                                 beiscsi_boot_release);
4467         if (!boot_kobj)
4468                 goto put_shost;
4469
4470         if (!scsi_host_get(phba->shost))
4471                 goto free_kset;
4472         boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
4473                                                beiscsi_show_boot_eth_info,
4474                                                beiscsi_eth_get_attr_visibility,
4475                                                beiscsi_boot_release);
4476         if (!boot_kobj)
4477                 goto put_shost;
4478         return 0;
4479
4480 put_shost:
4481         scsi_host_put(phba->shost);
4482 free_kset:
4483         iscsi_boot_destroy_kset(phba->boot_kset);
4484         return -ENOMEM;
4485 }
4486
4487 static int beiscsi_init_port(struct beiscsi_hba *phba)
4488 {
4489         int ret;
4490
4491         ret = beiscsi_init_controller(phba);
4492         if (ret < 0) {
4493                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4494                             "BM_%d : beiscsi_dev_probe - Failed in"
4495                             "beiscsi_init_controller\n");
4496                 return ret;
4497         }
4498         ret = beiscsi_init_sgl_handle(phba);
4499         if (ret < 0) {
4500                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4501                             "BM_%d : beiscsi_dev_probe - Failed in"
4502                             "beiscsi_init_sgl_handle\n");
4503                 goto do_cleanup_ctrlr;
4504         }
4505
4506         if (hba_setup_cid_tbls(phba)) {
4507                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4508                             "BM_%d : Failed in hba_setup_cid_tbls\n");
4509                 kfree(phba->io_sgl_hndl_base);
4510                 kfree(phba->eh_sgl_hndl_base);
4511                 goto do_cleanup_ctrlr;
4512         }
4513
4514         return ret;
4515
4516 do_cleanup_ctrlr:
4517         hwi_cleanup(phba);
4518         return ret;
4519 }
4520
4521 static void hwi_purge_eq(struct beiscsi_hba *phba)
4522 {
4523         struct hwi_controller *phwi_ctrlr;
4524         struct hwi_context_memory *phwi_context;
4525         struct be_queue_info *eq;
4526         struct be_eq_entry *eqe = NULL;
4527         int i, eq_msix;
4528         unsigned int num_processed;
4529
4530         phwi_ctrlr = phba->phwi_ctrlr;
4531         phwi_context = phwi_ctrlr->phwi_ctxt;
4532         if (phba->msix_enabled)
4533                 eq_msix = 1;
4534         else
4535                 eq_msix = 0;
4536
4537         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
4538                 eq = &phwi_context->be_eq[i].q;
4539                 eqe = queue_tail_node(eq);
4540                 num_processed = 0;
4541                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
4542                                         & EQE_VALID_MASK) {
4543                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
4544                         queue_tail_inc(eq);
4545                         eqe = queue_tail_node(eq);
4546                         num_processed++;
4547                 }
4548
4549                 if (num_processed)
4550                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
4551         }
4552 }
4553
4554 static void beiscsi_clean_port(struct beiscsi_hba *phba)
4555 {
4556         int mgmt_status, ulp_num;
4557         struct ulp_cid_info *ptr_cid_info = NULL;
4558
4559         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4560                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4561                         mgmt_status = mgmt_epfw_cleanup(phba, ulp_num);
4562                         if (mgmt_status)
4563                                 beiscsi_log(phba, KERN_WARNING,
4564                                             BEISCSI_LOG_INIT,
4565                                             "BM_%d : mgmt_epfw_cleanup FAILED"
4566                                             " for ULP_%d\n", ulp_num);
4567                 }
4568         }
4569
4570         hwi_purge_eq(phba);
4571         hwi_cleanup(phba);
4572         kfree(phba->io_sgl_hndl_base);
4573         kfree(phba->eh_sgl_hndl_base);
4574         kfree(phba->ep_array);
4575         kfree(phba->conn_table);
4576
4577         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4578                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4579                         ptr_cid_info = phba->cid_array_info[ulp_num];
4580
4581                         if (ptr_cid_info) {
4582                                 kfree(ptr_cid_info->cid_array);
4583                                 kfree(ptr_cid_info);
4584                                 phba->cid_array_info[ulp_num] = NULL;
4585                         }
4586                 }
4587         }
4588
4589 }
4590
4591 /**
4592  * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4593  * @beiscsi_conn: ptr to the conn to be cleaned up
4594  * @task: ptr to iscsi_task resource to be freed.
4595  *
4596  * Free driver mgmt resources binded to CXN.
4597  **/
4598 void
4599 beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4600                                 struct iscsi_task *task)
4601 {
4602         struct beiscsi_io_task *io_task;
4603         struct beiscsi_hba *phba = beiscsi_conn->phba;
4604         struct hwi_wrb_context *pwrb_context;
4605         struct hwi_controller *phwi_ctrlr;
4606         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4607                                 beiscsi_conn->beiscsi_conn_cid);
4608
4609         phwi_ctrlr = phba->phwi_ctrlr;
4610         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4611
4612         io_task = task->dd_data;
4613
4614         if (io_task->pwrb_handle) {
4615                 memset(io_task->pwrb_handle->pwrb, 0,
4616                        sizeof(struct iscsi_wrb));
4617                 free_wrb_handle(phba, pwrb_context,
4618                                 io_task->pwrb_handle);
4619                 io_task->pwrb_handle = NULL;
4620         }
4621
4622         if (io_task->psgl_handle) {
4623                 spin_lock_bh(&phba->mgmt_sgl_lock);
4624                 free_mgmt_sgl_handle(phba,
4625                                      io_task->psgl_handle);
4626                 io_task->psgl_handle = NULL;
4627                 spin_unlock_bh(&phba->mgmt_sgl_lock);
4628         }
4629
4630         if (io_task->mtask_addr) {
4631                 pci_unmap_single(phba->pcidev,
4632                                  io_task->mtask_addr,
4633                                  io_task->mtask_data_count,
4634                                  PCI_DMA_TODEVICE);
4635                 io_task->mtask_addr = 0;
4636         }
4637 }
4638
4639 /**
4640  * beiscsi_cleanup_task()- Free driver resources of the task
4641  * @task: ptr to the iscsi task
4642  *
4643  **/
4644 static void beiscsi_cleanup_task(struct iscsi_task *task)
4645 {
4646         struct beiscsi_io_task *io_task = task->dd_data;
4647         struct iscsi_conn *conn = task->conn;
4648         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4649         struct beiscsi_hba *phba = beiscsi_conn->phba;
4650         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4651         struct hwi_wrb_context *pwrb_context;
4652         struct hwi_controller *phwi_ctrlr;
4653         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4654                              beiscsi_conn->beiscsi_conn_cid);
4655
4656         phwi_ctrlr = phba->phwi_ctrlr;
4657         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4658
4659         if (io_task->cmd_bhs) {
4660                 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4661                               io_task->bhs_pa.u.a64.address);
4662                 io_task->cmd_bhs = NULL;
4663         }
4664
4665         if (task->sc) {
4666                 if (io_task->pwrb_handle) {
4667                         free_wrb_handle(phba, pwrb_context,
4668                                         io_task->pwrb_handle);
4669                         io_task->pwrb_handle = NULL;
4670                 }
4671
4672                 if (io_task->psgl_handle) {
4673                         spin_lock(&phba->io_sgl_lock);
4674                         free_io_sgl_handle(phba, io_task->psgl_handle);
4675                         spin_unlock(&phba->io_sgl_lock);
4676                         io_task->psgl_handle = NULL;
4677                 }
4678
4679                 if (io_task->scsi_cmnd) {
4680                         scsi_dma_unmap(io_task->scsi_cmnd);
4681                         io_task->scsi_cmnd = NULL;
4682                 }
4683         } else {
4684                 if (!beiscsi_conn->login_in_progress)
4685                         beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4686         }
4687 }
4688
4689 void
4690 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4691                            struct beiscsi_offload_params *params)
4692 {
4693         struct wrb_handle *pwrb_handle;
4694         struct hwi_wrb_context *pwrb_context = NULL;
4695         struct beiscsi_hba *phba = beiscsi_conn->phba;
4696         struct iscsi_task *task = beiscsi_conn->task;
4697         struct iscsi_session *session = task->conn->session;
4698         u32 doorbell = 0;
4699
4700         /*
4701          * We can always use 0 here because it is reserved by libiscsi for
4702          * login/startup related tasks.
4703          */
4704         beiscsi_conn->login_in_progress = 0;
4705         spin_lock_bh(&session->back_lock);
4706         beiscsi_cleanup_task(task);
4707         spin_unlock_bh(&session->back_lock);
4708
4709         pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid,
4710                                        &pwrb_context);
4711
4712         /* Check for the adapter family */
4713         if (is_chip_be2_be3r(phba))
4714                 beiscsi_offload_cxn_v0(params, pwrb_handle,
4715                                        phba->init_mem,
4716                                        pwrb_context);
4717         else
4718                 beiscsi_offload_cxn_v2(params, pwrb_handle,
4719                                        pwrb_context);
4720
4721         be_dws_le_to_cpu(pwrb_handle->pwrb,
4722                          sizeof(struct iscsi_target_context_update_wrb));
4723
4724         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4725         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4726                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4727         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4728         iowrite32(doorbell, phba->db_va +
4729                   beiscsi_conn->doorbell_offset);
4730
4731         /*
4732          * There is no completion for CONTEXT_UPDATE. The completion of next
4733          * WRB posted guarantees FW's processing and DMA'ing of it.
4734          * Use beiscsi_put_wrb_handle to put it back in the pool which makes
4735          * sure zero'ing or reuse of the WRB only after wrbs_per_cxn.
4736          */
4737         beiscsi_put_wrb_handle(pwrb_context, pwrb_handle,
4738                                phba->params.wrbs_per_cxn);
4739         beiscsi_log(phba, KERN_INFO,
4740                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4741                     "BM_%d : put CONTEXT_UPDATE pwrb_handle=%p free_index=0x%x wrb_handles_available=%d\n",
4742                     pwrb_handle, pwrb_context->free_index,
4743                     pwrb_context->wrb_handles_available);
4744 }
4745
4746 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4747                               int *index, int *age)
4748 {
4749         *index = (int)itt;
4750         if (age)
4751                 *age = conn->session->age;
4752 }
4753
4754 /**
4755  * beiscsi_alloc_pdu - allocates pdu and related resources
4756  * @task: libiscsi task
4757  * @opcode: opcode of pdu for task
4758  *
4759  * This is called with the session lock held. It will allocate
4760  * the wrb and sgl if needed for the command. And it will prep
4761  * the pdu's itt. beiscsi_parse_pdu will later translate
4762  * the pdu itt to the libiscsi task itt.
4763  */
4764 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4765 {
4766         struct beiscsi_io_task *io_task = task->dd_data;
4767         struct iscsi_conn *conn = task->conn;
4768         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4769         struct beiscsi_hba *phba = beiscsi_conn->phba;
4770         struct hwi_wrb_context *pwrb_context;
4771         struct hwi_controller *phwi_ctrlr;
4772         itt_t itt;
4773         uint16_t cri_index = 0;
4774         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4775         dma_addr_t paddr;
4776
4777         io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4778                                           GFP_ATOMIC, &paddr);
4779         if (!io_task->cmd_bhs)
4780                 return -ENOMEM;
4781         io_task->bhs_pa.u.a64.address = paddr;
4782         io_task->libiscsi_itt = (itt_t)task->itt;
4783         io_task->conn = beiscsi_conn;
4784
4785         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4786         task->hdr_max = sizeof(struct be_cmd_bhs);
4787         io_task->psgl_handle = NULL;
4788         io_task->pwrb_handle = NULL;
4789
4790         if (task->sc) {
4791                 spin_lock(&phba->io_sgl_lock);
4792                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4793                 spin_unlock(&phba->io_sgl_lock);
4794                 if (!io_task->psgl_handle) {
4795                         beiscsi_log(phba, KERN_ERR,
4796                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4797                                     "BM_%d : Alloc of IO_SGL_ICD Failed"
4798                                     "for the CID : %d\n",
4799                                     beiscsi_conn->beiscsi_conn_cid);
4800                         goto free_hndls;
4801                 }
4802                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4803                                         beiscsi_conn->beiscsi_conn_cid,
4804                                         &io_task->pwrb_context);
4805                 if (!io_task->pwrb_handle) {
4806                         beiscsi_log(phba, KERN_ERR,
4807                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4808                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4809                                     "for the CID : %d\n",
4810                                     beiscsi_conn->beiscsi_conn_cid);
4811                         goto free_io_hndls;
4812                 }
4813         } else {
4814                 io_task->scsi_cmnd = NULL;
4815                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4816                         beiscsi_conn->task = task;
4817                         if (!beiscsi_conn->login_in_progress) {
4818                                 spin_lock(&phba->mgmt_sgl_lock);
4819                                 io_task->psgl_handle = (struct sgl_handle *)
4820                                                 alloc_mgmt_sgl_handle(phba);
4821                                 spin_unlock(&phba->mgmt_sgl_lock);
4822                                 if (!io_task->psgl_handle) {
4823                                         beiscsi_log(phba, KERN_ERR,
4824                                                     BEISCSI_LOG_IO |
4825                                                     BEISCSI_LOG_CONFIG,
4826                                                     "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4827                                                     "for the CID : %d\n",
4828                                                     beiscsi_conn->
4829                                                     beiscsi_conn_cid);
4830                                         goto free_hndls;
4831                                 }
4832
4833                                 beiscsi_conn->login_in_progress = 1;
4834                                 beiscsi_conn->plogin_sgl_handle =
4835                                                         io_task->psgl_handle;
4836                                 io_task->pwrb_handle =
4837                                         alloc_wrb_handle(phba,
4838                                         beiscsi_conn->beiscsi_conn_cid,
4839                                         &io_task->pwrb_context);
4840                                 if (!io_task->pwrb_handle) {
4841                                         beiscsi_log(phba, KERN_ERR,
4842                                                     BEISCSI_LOG_IO |
4843                                                     BEISCSI_LOG_CONFIG,
4844                                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4845                                                     "for the CID : %d\n",
4846                                                     beiscsi_conn->
4847                                                     beiscsi_conn_cid);
4848                                         goto free_mgmt_hndls;
4849                                 }
4850                                 beiscsi_conn->plogin_wrb_handle =
4851                                                         io_task->pwrb_handle;
4852
4853                         } else {
4854                                 io_task->psgl_handle =
4855                                                 beiscsi_conn->plogin_sgl_handle;
4856                                 io_task->pwrb_handle =
4857                                                 beiscsi_conn->plogin_wrb_handle;
4858                         }
4859                 } else {
4860                         spin_lock(&phba->mgmt_sgl_lock);
4861                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4862                         spin_unlock(&phba->mgmt_sgl_lock);
4863                         if (!io_task->psgl_handle) {
4864                                 beiscsi_log(phba, KERN_ERR,
4865                                             BEISCSI_LOG_IO |
4866                                             BEISCSI_LOG_CONFIG,
4867                                             "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4868                                             "for the CID : %d\n",
4869                                             beiscsi_conn->
4870                                             beiscsi_conn_cid);
4871                                 goto free_hndls;
4872                         }
4873                         io_task->pwrb_handle =
4874                                         alloc_wrb_handle(phba,
4875                                         beiscsi_conn->beiscsi_conn_cid,
4876                                         &io_task->pwrb_context);
4877                         if (!io_task->pwrb_handle) {
4878                                 beiscsi_log(phba, KERN_ERR,
4879                                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4880                                             "BM_%d : Alloc of WRB_HANDLE Failed"
4881                                             "for the CID : %d\n",
4882                                             beiscsi_conn->beiscsi_conn_cid);
4883                                 goto free_mgmt_hndls;
4884                         }
4885
4886                 }
4887         }
4888         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4889                                  wrb_index << 16) | (unsigned int)
4890                                 (io_task->psgl_handle->sgl_index));
4891         io_task->pwrb_handle->pio_handle = task;
4892
4893         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4894         return 0;
4895
4896 free_io_hndls:
4897         spin_lock(&phba->io_sgl_lock);
4898         free_io_sgl_handle(phba, io_task->psgl_handle);
4899         spin_unlock(&phba->io_sgl_lock);
4900         goto free_hndls;
4901 free_mgmt_hndls:
4902         spin_lock(&phba->mgmt_sgl_lock);
4903         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4904         io_task->psgl_handle = NULL;
4905         spin_unlock(&phba->mgmt_sgl_lock);
4906 free_hndls:
4907         phwi_ctrlr = phba->phwi_ctrlr;
4908         cri_index = BE_GET_CRI_FROM_CID(
4909         beiscsi_conn->beiscsi_conn_cid);
4910         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4911         if (io_task->pwrb_handle)
4912                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4913         io_task->pwrb_handle = NULL;
4914         pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4915                       io_task->bhs_pa.u.a64.address);
4916         io_task->cmd_bhs = NULL;
4917         return -ENOMEM;
4918 }
4919 int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4920                        unsigned int num_sg, unsigned int xferlen,
4921                        unsigned int writedir)
4922 {
4923
4924         struct beiscsi_io_task *io_task = task->dd_data;
4925         struct iscsi_conn *conn = task->conn;
4926         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4927         struct beiscsi_hba *phba = beiscsi_conn->phba;
4928         struct iscsi_wrb *pwrb = NULL;
4929         unsigned int doorbell = 0;
4930
4931         pwrb = io_task->pwrb_handle->pwrb;
4932
4933         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4934         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4935
4936         if (writedir) {
4937                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4938                               INI_WR_CMD);
4939                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4940         } else {
4941                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4942                               INI_RD_CMD);
4943                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4944         }
4945
4946         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4947                                           type, pwrb);
4948
4949         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4950                       cpu_to_be16(*(unsigned short *)
4951                       &io_task->cmd_bhs->iscsi_hdr.lun));
4952         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4953         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4954                       io_task->pwrb_handle->wrb_index);
4955         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4956                       be32_to_cpu(task->cmdsn));
4957         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4958                       io_task->psgl_handle->sgl_index);
4959
4960         hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4961         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4962                       io_task->pwrb_handle->wrb_index);
4963         if (io_task->pwrb_context->plast_wrb)
4964                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4965                               io_task->pwrb_context->plast_wrb,
4966                               io_task->pwrb_handle->wrb_index);
4967         io_task->pwrb_context->plast_wrb = pwrb;
4968
4969         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4970
4971         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4972         doorbell |= (io_task->pwrb_handle->wrb_index &
4973                      DB_DEF_PDU_WRB_INDEX_MASK) <<
4974                      DB_DEF_PDU_WRB_INDEX_SHIFT;
4975         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4976         iowrite32(doorbell, phba->db_va +
4977                   beiscsi_conn->doorbell_offset);
4978         return 0;
4979 }
4980
4981 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4982                           unsigned int num_sg, unsigned int xferlen,
4983                           unsigned int writedir)
4984 {
4985
4986         struct beiscsi_io_task *io_task = task->dd_data;
4987         struct iscsi_conn *conn = task->conn;
4988         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4989         struct beiscsi_hba *phba = beiscsi_conn->phba;
4990         struct iscsi_wrb *pwrb = NULL;
4991         unsigned int doorbell = 0;
4992
4993         pwrb = io_task->pwrb_handle->pwrb;
4994         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4995         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4996
4997         if (writedir) {
4998                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4999                               INI_WR_CMD);
5000                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
5001         } else {
5002                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
5003                               INI_RD_CMD);
5004                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
5005         }
5006
5007         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
5008                                           type, pwrb);
5009
5010         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
5011                       cpu_to_be16(*(unsigned short *)
5012                                   &io_task->cmd_bhs->iscsi_hdr.lun));
5013         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
5014         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
5015                       io_task->pwrb_handle->wrb_index);
5016         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
5017                       be32_to_cpu(task->cmdsn));
5018         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
5019                       io_task->psgl_handle->sgl_index);
5020
5021         hwi_write_sgl(pwrb, sg, num_sg, io_task);
5022
5023         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
5024                       io_task->pwrb_handle->wrb_index);
5025         if (io_task->pwrb_context->plast_wrb)
5026                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
5027                               io_task->pwrb_context->plast_wrb,
5028                               io_task->pwrb_handle->wrb_index);
5029         io_task->pwrb_context->plast_wrb = pwrb;
5030
5031         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
5032
5033         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
5034         doorbell |= (io_task->pwrb_handle->wrb_index &
5035                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
5036         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
5037
5038         iowrite32(doorbell, phba->db_va +
5039                   beiscsi_conn->doorbell_offset);
5040         return 0;
5041 }
5042
5043 static int beiscsi_mtask(struct iscsi_task *task)
5044 {
5045         struct beiscsi_io_task *io_task = task->dd_data;
5046         struct iscsi_conn *conn = task->conn;
5047         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
5048         struct beiscsi_hba *phba = beiscsi_conn->phba;
5049         struct iscsi_wrb *pwrb = NULL;
5050         unsigned int doorbell = 0;
5051         unsigned int cid;
5052         unsigned int pwrb_typeoffset = 0;
5053         int ret = 0;
5054
5055         cid = beiscsi_conn->beiscsi_conn_cid;
5056         pwrb = io_task->pwrb_handle->pwrb;
5057         memset(pwrb, 0, sizeof(*pwrb));
5058
5059         if (is_chip_be2_be3r(phba)) {
5060                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
5061                               be32_to_cpu(task->cmdsn));
5062                 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
5063                               io_task->pwrb_handle->wrb_index);
5064                 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
5065                               io_task->psgl_handle->sgl_index);
5066                 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
5067                               task->data_count);
5068                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
5069                               io_task->pwrb_handle->wrb_index);
5070                 if (io_task->pwrb_context->plast_wrb)
5071                         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
5072                                       io_task->pwrb_context->plast_wrb,
5073                                       io_task->pwrb_handle->wrb_index);
5074                 io_task->pwrb_context->plast_wrb = pwrb;
5075
5076                 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
5077         } else {
5078                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
5079                               be32_to_cpu(task->cmdsn));
5080                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
5081                               io_task->pwrb_handle->wrb_index);
5082                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
5083                               io_task->psgl_handle->sgl_index);
5084                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
5085                               task->data_count);
5086                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
5087                               io_task->pwrb_handle->wrb_index);
5088                 if (io_task->pwrb_context->plast_wrb)
5089                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
5090                                       io_task->pwrb_context->plast_wrb,
5091                                       io_task->pwrb_handle->wrb_index);
5092                 io_task->pwrb_context->plast_wrb = pwrb;
5093
5094                 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
5095         }
5096
5097
5098         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
5099         case ISCSI_OP_LOGIN:
5100                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
5101                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5102                 ret = hwi_write_buffer(pwrb, task);
5103                 break;
5104         case ISCSI_OP_NOOP_OUT:
5105                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
5106                         ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5107                         if (is_chip_be2_be3r(phba))
5108                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
5109                                               dmsg, pwrb, 1);
5110                         else
5111                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5112                                               dmsg, pwrb, 1);
5113                 } else {
5114                         ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
5115                         if (is_chip_be2_be3r(phba))
5116                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
5117                                               dmsg, pwrb, 0);
5118                         else
5119                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5120                                               dmsg, pwrb, 0);
5121                 }
5122                 ret = hwi_write_buffer(pwrb, task);
5123                 break;
5124         case ISCSI_OP_TEXT:
5125                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5126                 ret = hwi_write_buffer(pwrb, task);
5127                 break;
5128         case ISCSI_OP_SCSI_TMFUNC:
5129                 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
5130                 ret = hwi_write_buffer(pwrb, task);
5131                 break;
5132         case ISCSI_OP_LOGOUT:
5133                 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
5134                 ret = hwi_write_buffer(pwrb, task);
5135                 break;
5136
5137         default:
5138                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5139                             "BM_%d : opcode =%d Not supported\n",
5140                             task->hdr->opcode & ISCSI_OPCODE_MASK);
5141
5142                 return -EINVAL;
5143         }
5144
5145         if (ret)
5146                 return ret;
5147
5148         /* Set the task type */
5149         io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
5150                 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
5151                 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
5152
5153         doorbell |= cid & DB_WRB_POST_CID_MASK;
5154         doorbell |= (io_task->pwrb_handle->wrb_index &
5155                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
5156         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
5157         iowrite32(doorbell, phba->db_va +
5158                   beiscsi_conn->doorbell_offset);
5159         return 0;
5160 }
5161
5162 static int beiscsi_task_xmit(struct iscsi_task *task)
5163 {
5164         struct beiscsi_io_task *io_task = task->dd_data;
5165         struct scsi_cmnd *sc = task->sc;
5166         struct beiscsi_hba *phba = NULL;
5167         struct scatterlist *sg;
5168         int num_sg;
5169         unsigned int  writedir = 0, xferlen = 0;
5170
5171         phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;
5172
5173         if (!sc)
5174                 return beiscsi_mtask(task);
5175
5176         io_task->scsi_cmnd = sc;
5177         num_sg = scsi_dma_map(sc);
5178         if (num_sg < 0) {
5179                 struct iscsi_conn *conn = task->conn;
5180                 struct beiscsi_hba *phba = NULL;
5181
5182                 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
5183                 beiscsi_log(phba, KERN_ERR,
5184                             BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
5185                             "BM_%d : scsi_dma_map Failed "
5186                             "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
5187                             be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
5188                             io_task->libiscsi_itt, scsi_bufflen(sc));
5189
5190                 return num_sg;
5191         }
5192         xferlen = scsi_bufflen(sc);
5193         sg = scsi_sglist(sc);
5194         if (sc->sc_data_direction == DMA_TO_DEVICE)
5195                 writedir = 1;
5196          else
5197                 writedir = 0;
5198
5199          return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
5200 }
5201
5202 /**
5203  * beiscsi_bsg_request - handle bsg request from ISCSI transport
5204  * @job: job to handle
5205  */
5206 static int beiscsi_bsg_request(struct bsg_job *job)
5207 {
5208         struct Scsi_Host *shost;
5209         struct beiscsi_hba *phba;
5210         struct iscsi_bsg_request *bsg_req = job->request;
5211         int rc = -EINVAL;
5212         unsigned int tag;
5213         struct be_dma_mem nonemb_cmd;
5214         struct be_cmd_resp_hdr *resp;
5215         struct iscsi_bsg_reply *bsg_reply = job->reply;
5216         unsigned short status, extd_status;
5217
5218         shost = iscsi_job_to_shost(job);
5219         phba = iscsi_host_priv(shost);
5220
5221         switch (bsg_req->msgcode) {
5222         case ISCSI_BSG_HST_VENDOR:
5223                 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
5224                                         job->request_payload.payload_len,
5225                                         &nonemb_cmd.dma);
5226                 if (nonemb_cmd.va == NULL) {
5227                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5228                                     "BM_%d : Failed to allocate memory for "
5229                                     "beiscsi_bsg_request\n");
5230                         return -ENOMEM;
5231                 }
5232                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
5233                                                   &nonemb_cmd);
5234                 if (!tag) {
5235                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5236                                     "BM_%d : MBX Tag Allocation Failed\n");
5237
5238                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5239                                             nonemb_cmd.va, nonemb_cmd.dma);
5240                         return -EAGAIN;
5241                 }
5242
5243                 rc = wait_event_interruptible_timeout(
5244                                         phba->ctrl.mcc_wait[tag],
5245                                         phba->ctrl.mcc_numtag[tag],
5246                                         msecs_to_jiffies(
5247                                         BEISCSI_HOST_MBX_TIMEOUT));
5248                 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
5249                 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
5250                 free_mcc_tag(&phba->ctrl, tag);
5251                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
5252                 sg_copy_from_buffer(job->reply_payload.sg_list,
5253                                     job->reply_payload.sg_cnt,
5254                                     nonemb_cmd.va, (resp->response_length
5255                                     + sizeof(*resp)));
5256                 bsg_reply->reply_payload_rcv_len = resp->response_length;
5257                 bsg_reply->result = status;
5258                 bsg_job_done(job, bsg_reply->result,
5259                              bsg_reply->reply_payload_rcv_len);
5260                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5261                                     nonemb_cmd.va, nonemb_cmd.dma);
5262                 if (status || extd_status) {
5263                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5264                                     "BM_%d : MBX Cmd Failed"
5265                                     " status = %d extd_status = %d\n",
5266                                     status, extd_status);
5267
5268                         return -EIO;
5269                 } else {
5270                         rc = 0;
5271                 }
5272                 break;
5273
5274         default:
5275                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5276                                 "BM_%d : Unsupported bsg command: 0x%x\n",
5277                                 bsg_req->msgcode);
5278                 break;
5279         }
5280
5281         return rc;
5282 }
5283
5284 void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
5285 {
5286         /* Set the logging parameter */
5287         beiscsi_log_enable_init(phba, beiscsi_log_enable);
5288 }
5289
5290 /*
5291  * beiscsi_quiesce()- Cleanup Driver resources
5292  * @phba: Instance Priv structure
5293  * @unload_state:i Clean or EEH unload state
5294  *
5295  * Free the OS and HW resources held by the driver
5296  **/
5297 static void beiscsi_quiesce(struct beiscsi_hba *phba,
5298                 uint32_t unload_state)
5299 {
5300         struct hwi_controller *phwi_ctrlr;
5301         struct hwi_context_memory *phwi_context;
5302         struct be_eq_obj *pbe_eq;
5303         unsigned int i, msix_vec;
5304
5305         phwi_ctrlr = phba->phwi_ctrlr;
5306         phwi_context = phwi_ctrlr->phwi_ctxt;
5307         hwi_disable_intr(phba);
5308         if (phba->msix_enabled) {
5309                 for (i = 0; i <= phba->num_cpus; i++) {
5310                         msix_vec = phba->msix_entries[i].vector;
5311                         synchronize_irq(msix_vec);
5312                         free_irq(msix_vec, &phwi_context->be_eq[i]);
5313                         kfree(phba->msi_name[i]);
5314                 }
5315         } else
5316                 if (phba->pcidev->irq) {
5317                         synchronize_irq(phba->pcidev->irq);
5318                         free_irq(phba->pcidev->irq, phba);
5319                 }
5320         pci_disable_msix(phba->pcidev);
5321         cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
5322
5323         for (i = 0; i < phba->num_cpus; i++) {
5324                 pbe_eq = &phwi_context->be_eq[i];
5325                 irq_poll_disable(&pbe_eq->iopoll);
5326         }
5327
5328         if (unload_state == BEISCSI_CLEAN_UNLOAD) {
5329                 destroy_workqueue(phba->wq);
5330                 beiscsi_clean_port(phba);
5331                 beiscsi_free_mem(phba);
5332
5333                 beiscsi_unmap_pci_function(phba);
5334                 pci_free_consistent(phba->pcidev,
5335                                     phba->ctrl.mbox_mem_alloced.size,
5336                                     phba->ctrl.mbox_mem_alloced.va,
5337                                     phba->ctrl.mbox_mem_alloced.dma);
5338         } else {
5339                 hwi_purge_eq(phba);
5340                 hwi_cleanup(phba);
5341         }
5342
5343 }
5344
5345 static void beiscsi_remove(struct pci_dev *pcidev)
5346 {
5347         struct beiscsi_hba *phba = NULL;
5348
5349         phba = pci_get_drvdata(pcidev);
5350         if (!phba) {
5351                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5352                 return;
5353         }
5354
5355         beiscsi_destroy_def_ifaces(phba);
5356         iscsi_boot_destroy_kset(phba->boot_kset);
5357         iscsi_host_remove(phba->shost);
5358         beiscsi_quiesce(phba, BEISCSI_CLEAN_UNLOAD);
5359         pci_dev_put(phba->pcidev);
5360         iscsi_host_free(phba->shost);
5361         pci_disable_pcie_error_reporting(pcidev);
5362         pci_set_drvdata(pcidev, NULL);
5363         pci_release_regions(pcidev);
5364         pci_disable_device(pcidev);
5365 }
5366
5367 static void beiscsi_msix_enable(struct beiscsi_hba *phba)
5368 {
5369         int i, status;
5370
5371         for (i = 0; i <= phba->num_cpus; i++)
5372                 phba->msix_entries[i].entry = i;
5373
5374         status = pci_enable_msix_range(phba->pcidev, phba->msix_entries,
5375                                        phba->num_cpus + 1, phba->num_cpus + 1);
5376         if (status > 0)
5377                 phba->msix_enabled = true;
5378
5379         return;
5380 }
5381
5382 static void be_eqd_update(struct beiscsi_hba *phba)
5383 {
5384         struct be_set_eqd set_eqd[MAX_CPUS];
5385         struct be_aic_obj *aic;
5386         struct be_eq_obj *pbe_eq;
5387         struct hwi_controller *phwi_ctrlr;
5388         struct hwi_context_memory *phwi_context;
5389         int eqd, i, num = 0;
5390         ulong now;
5391         u32 pps, delta;
5392         unsigned int tag;
5393
5394         phwi_ctrlr = phba->phwi_ctrlr;
5395         phwi_context = phwi_ctrlr->phwi_ctxt;
5396
5397         for (i = 0; i <= phba->num_cpus; i++) {
5398                 aic = &phba->aic_obj[i];
5399                 pbe_eq = &phwi_context->be_eq[i];
5400                 now = jiffies;
5401                 if (!aic->jiffs || time_before(now, aic->jiffs) ||
5402                     pbe_eq->cq_count < aic->eq_prev) {
5403                         aic->jiffs = now;
5404                         aic->eq_prev = pbe_eq->cq_count;
5405                         continue;
5406                 }
5407                 delta = jiffies_to_msecs(now - aic->jiffs);
5408                 pps = (((u32)(pbe_eq->cq_count - aic->eq_prev) * 1000) / delta);
5409                 eqd = (pps / 1500) << 2;
5410
5411                 if (eqd < 8)
5412                         eqd = 0;
5413                 eqd = min_t(u32, eqd, phwi_context->max_eqd);
5414                 eqd = max_t(u32, eqd, phwi_context->min_eqd);
5415
5416                 aic->jiffs = now;
5417                 aic->eq_prev = pbe_eq->cq_count;
5418
5419                 if (eqd != aic->prev_eqd) {
5420                         set_eqd[num].delay_multiplier = (eqd * 65)/100;
5421                         set_eqd[num].eq_id = pbe_eq->q.id;
5422                         aic->prev_eqd = eqd;
5423                         num++;
5424                 }
5425         }
5426         if (num) {
5427                 tag = be_cmd_modify_eq_delay(phba, set_eqd, num);
5428                 if (tag)
5429                         beiscsi_mccq_compl(phba, tag, NULL, NULL);
5430         }
5431 }
5432
5433 static void be_check_boot_session(struct beiscsi_hba *phba)
5434 {
5435         if (beiscsi_setup_boot_info(phba))
5436                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5437                             "BM_%d : Could not set up "
5438                             "iSCSI boot info on async event.\n");
5439 }
5440
5441 /*
5442  * beiscsi_hw_health_check()- Check adapter health
5443  * @work: work item to check HW health
5444  *
5445  * Check if adapter in an unrecoverable state or not.
5446  **/
5447 static void
5448 beiscsi_hw_health_check(struct work_struct *work)
5449 {
5450         struct beiscsi_hba *phba =
5451                 container_of(work, struct beiscsi_hba,
5452                              beiscsi_hw_check_task.work);
5453
5454         be_eqd_update(phba);
5455
5456         if (phba->state & BE_ADAPTER_CHECK_BOOT) {
5457                 if ((phba->get_boot > 0) && (!phba->boot_kset)) {
5458                         phba->get_boot--;
5459                         if (!(phba->get_boot % BE_GET_BOOT_TO))
5460                                 be_check_boot_session(phba);
5461                 } else {
5462                         phba->state &= ~BE_ADAPTER_CHECK_BOOT;
5463                         phba->get_boot = 0;
5464                 }
5465         }
5466
5467         beiscsi_ue_detect(phba);
5468
5469         schedule_delayed_work(&phba->beiscsi_hw_check_task,
5470                               msecs_to_jiffies(1000));
5471 }
5472
5473
5474 static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
5475                 pci_channel_state_t state)
5476 {
5477         struct beiscsi_hba *phba = NULL;
5478
5479         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5480         phba->state |= BE_ADAPTER_PCI_ERR;
5481
5482         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5483                     "BM_%d : EEH error detected\n");
5484
5485         beiscsi_quiesce(phba, BEISCSI_EEH_UNLOAD);
5486
5487         if (state == pci_channel_io_perm_failure) {
5488                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5489                             "BM_%d : EEH : State PERM Failure");
5490                 return PCI_ERS_RESULT_DISCONNECT;
5491         }
5492
5493         pci_disable_device(pdev);
5494
5495         /* The error could cause the FW to trigger a flash debug dump.
5496          * Resetting the card while flash dump is in progress
5497          * can cause it not to recover; wait for it to finish.
5498          * Wait only for first function as it is needed only once per
5499          * adapter.
5500          **/
5501         if (pdev->devfn == 0)
5502                 ssleep(30);
5503
5504         return PCI_ERS_RESULT_NEED_RESET;
5505 }
5506
5507 static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
5508 {
5509         struct beiscsi_hba *phba = NULL;
5510         int status = 0;
5511
5512         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5513
5514         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5515                     "BM_%d : EEH Reset\n");
5516
5517         status = pci_enable_device(pdev);
5518         if (status)
5519                 return PCI_ERS_RESULT_DISCONNECT;
5520
5521         pci_set_master(pdev);
5522         pci_set_power_state(pdev, PCI_D0);
5523         pci_restore_state(pdev);
5524
5525         /* Wait for the CHIP Reset to complete */
5526         status = be_chk_reset_complete(phba);
5527         if (!status) {
5528                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5529                             "BM_%d : EEH Reset Completed\n");
5530         } else {
5531                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5532                             "BM_%d : EEH Reset Completion Failure\n");
5533                 return PCI_ERS_RESULT_DISCONNECT;
5534         }
5535
5536         pci_cleanup_aer_uncorrect_error_status(pdev);
5537         return PCI_ERS_RESULT_RECOVERED;
5538 }
5539
5540 static void beiscsi_eeh_resume(struct pci_dev *pdev)
5541 {
5542         int ret = 0, i;
5543         struct be_eq_obj *pbe_eq;
5544         struct beiscsi_hba *phba = NULL;
5545         struct hwi_controller *phwi_ctrlr;
5546         struct hwi_context_memory *phwi_context;
5547
5548         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5549         pci_save_state(pdev);
5550
5551         if (enable_msix)
5552                 find_num_cpus(phba);
5553         else
5554                 phba->num_cpus = 1;
5555
5556         if (enable_msix) {
5557                 beiscsi_msix_enable(phba);
5558                 if (!phba->msix_enabled)
5559                         phba->num_cpus = 1;
5560         }
5561
5562         ret = beiscsi_cmd_reset_function(phba);
5563         if (ret) {
5564                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5565                             "BM_%d : Reset Failed\n");
5566                 goto ret_err;
5567         }
5568
5569         ret = be_chk_reset_complete(phba);
5570         if (ret) {
5571                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5572                             "BM_%d : Failed to get out of reset.\n");
5573                 goto ret_err;
5574         }
5575
5576         beiscsi_get_params(phba);
5577         phba->shost->max_id = phba->params.cxns_per_ctrl;
5578         phba->shost->can_queue = phba->params.ios_per_ctrl;
5579         ret = hwi_init_controller(phba);
5580
5581         for (i = 0; i < MAX_MCC_CMD; i++) {
5582                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5583                 phba->ctrl.mcc_tag[i] = i + 1;
5584                 phba->ctrl.mcc_numtag[i + 1] = 0;
5585                 phba->ctrl.mcc_tag_available++;
5586         }
5587
5588         phwi_ctrlr = phba->phwi_ctrlr;
5589         phwi_context = phwi_ctrlr->phwi_ctxt;
5590
5591         for (i = 0; i < phba->num_cpus; i++) {
5592                 pbe_eq = &phwi_context->be_eq[i];
5593                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget,
5594                                 be_iopoll);
5595         }
5596
5597         i = (phba->msix_enabled) ? i : 0;
5598         /* Work item for MCC handling */
5599         pbe_eq = &phwi_context->be_eq[i];
5600         INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5601
5602         ret = beiscsi_init_irqs(phba);
5603         if (ret < 0) {
5604                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5605                             "BM_%d : beiscsi_eeh_resume - "
5606                             "Failed to beiscsi_init_irqs\n");
5607                 goto ret_err;
5608         }
5609
5610         hwi_enable_intr(phba);
5611         phba->state &= ~BE_ADAPTER_PCI_ERR;
5612
5613         return;
5614 ret_err:
5615         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5616                     "BM_%d : AER EEH Resume Failed\n");
5617 }
5618
5619 static int beiscsi_dev_probe(struct pci_dev *pcidev,
5620                              const struct pci_device_id *id)
5621 {
5622         struct beiscsi_hba *phba = NULL;
5623         struct hwi_controller *phwi_ctrlr;
5624         struct hwi_context_memory *phwi_context;
5625         struct be_eq_obj *pbe_eq;
5626         int ret = 0, i;
5627
5628         ret = beiscsi_enable_pci(pcidev);
5629         if (ret < 0) {
5630                 dev_err(&pcidev->dev,
5631                         "beiscsi_dev_probe - Failed to enable pci device\n");
5632                 return ret;
5633         }
5634
5635         phba = beiscsi_hba_alloc(pcidev);
5636         if (!phba) {
5637                 dev_err(&pcidev->dev,
5638                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5639                 goto disable_pci;
5640         }
5641
5642         /* Enable EEH reporting */
5643         ret = pci_enable_pcie_error_reporting(pcidev);
5644         if (ret)
5645                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5646                             "BM_%d : PCIe Error Reporting "
5647                             "Enabling Failed\n");
5648
5649         pci_save_state(pcidev);
5650
5651         /* Initialize Driver configuration Paramters */
5652         beiscsi_hba_attrs_init(phba);
5653
5654         phba->fw_timeout = false;
5655         phba->mac_addr_set = false;
5656
5657
5658         switch (pcidev->device) {
5659         case BE_DEVICE_ID1:
5660         case OC_DEVICE_ID1:
5661         case OC_DEVICE_ID2:
5662                 phba->generation = BE_GEN2;
5663                 phba->iotask_fn = beiscsi_iotask;
5664                 break;
5665         case BE_DEVICE_ID2:
5666         case OC_DEVICE_ID3:
5667                 phba->generation = BE_GEN3;
5668                 phba->iotask_fn = beiscsi_iotask;
5669                 break;
5670         case OC_SKH_ID1:
5671                 phba->generation = BE_GEN4;
5672                 phba->iotask_fn = beiscsi_iotask_v2;
5673                 break;
5674         default:
5675                 phba->generation = 0;
5676         }
5677
5678         ret = be_ctrl_init(phba, pcidev);
5679         if (ret) {
5680                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5681                             "BM_%d : beiscsi_dev_probe-"
5682                             "Failed in be_ctrl_init\n");
5683                 goto hba_free;
5684         }
5685
5686         /*
5687          * FUNCTION_RESET should clean up any stale info in FW for this fn
5688          */
5689         ret = beiscsi_cmd_reset_function(phba);
5690         if (ret) {
5691                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5692                             "BM_%d : Reset Failed\n");
5693                 goto hba_free;
5694         }
5695         ret = be_chk_reset_complete(phba);
5696         if (ret) {
5697                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5698                             "BM_%d : Failed to get out of reset.\n");
5699                 goto hba_free;
5700         }
5701
5702         spin_lock_init(&phba->io_sgl_lock);
5703         spin_lock_init(&phba->mgmt_sgl_lock);
5704         spin_lock_init(&phba->isr_lock);
5705         spin_lock_init(&phba->async_pdu_lock);
5706         ret = mgmt_get_fw_config(&phba->ctrl, phba);
5707         if (ret != 0) {
5708                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5709                             "BM_%d : Error getting fw config\n");
5710                 goto free_port;
5711         }
5712         mgmt_get_port_name(&phba->ctrl, phba);
5713         beiscsi_get_params(phba);
5714
5715         if (enable_msix)
5716                 find_num_cpus(phba);
5717         else
5718                 phba->num_cpus = 1;
5719
5720         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5721                     "BM_%d : num_cpus = %d\n",
5722                     phba->num_cpus);
5723
5724         if (enable_msix) {
5725                 beiscsi_msix_enable(phba);
5726                 if (!phba->msix_enabled)
5727                         phba->num_cpus = 1;
5728         }
5729
5730         phba->shost->max_id = phba->params.cxns_per_ctrl;
5731         phba->shost->can_queue = phba->params.ios_per_ctrl;
5732         ret = beiscsi_init_port(phba);
5733         if (ret < 0) {
5734                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5735                             "BM_%d : beiscsi_dev_probe-"
5736                             "Failed in beiscsi_init_port\n");
5737                 goto free_port;
5738         }
5739
5740         for (i = 0; i < MAX_MCC_CMD; i++) {
5741                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5742                 phba->ctrl.mcc_tag[i] = i + 1;
5743                 phba->ctrl.mcc_numtag[i + 1] = 0;
5744                 phba->ctrl.mcc_tag_available++;
5745                 memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
5746                        sizeof(struct be_dma_mem));
5747         }
5748
5749         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5750
5751         snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
5752                  phba->shost->host_no);
5753         phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
5754         if (!phba->wq) {
5755                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5756                             "BM_%d : beiscsi_dev_probe-"
5757                             "Failed to allocate work queue\n");
5758                 goto free_twq;
5759         }
5760
5761         INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
5762                           beiscsi_hw_health_check);
5763
5764         phwi_ctrlr = phba->phwi_ctrlr;
5765         phwi_context = phwi_ctrlr->phwi_ctxt;
5766
5767         for (i = 0; i < phba->num_cpus; i++) {
5768                 pbe_eq = &phwi_context->be_eq[i];
5769                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget,
5770                                 be_iopoll);
5771         }
5772
5773         i = (phba->msix_enabled) ? i : 0;
5774         /* Work item for MCC handling */
5775         pbe_eq = &phwi_context->be_eq[i];
5776         INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5777
5778         ret = beiscsi_init_irqs(phba);
5779         if (ret < 0) {
5780                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5781                             "BM_%d : beiscsi_dev_probe-"
5782                             "Failed to beiscsi_init_irqs\n");
5783                 goto free_blkenbld;
5784         }
5785         hwi_enable_intr(phba);
5786
5787         if (iscsi_host_add(phba->shost, &phba->pcidev->dev))
5788                 goto free_blkenbld;
5789
5790         if (beiscsi_setup_boot_info(phba))
5791                 /*
5792                  * log error but continue, because we may not be using
5793                  * iscsi boot.
5794                  */
5795                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5796                             "BM_%d : Could not set up "
5797                             "iSCSI boot info.\n");
5798
5799         beiscsi_create_def_ifaces(phba);
5800         schedule_delayed_work(&phba->beiscsi_hw_check_task,
5801                               msecs_to_jiffies(1000));
5802
5803         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5804                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5805         return 0;
5806
5807 free_blkenbld:
5808         destroy_workqueue(phba->wq);
5809         for (i = 0; i < phba->num_cpus; i++) {
5810                 pbe_eq = &phwi_context->be_eq[i];
5811                 irq_poll_disable(&pbe_eq->iopoll);
5812         }
5813 free_twq:
5814         beiscsi_clean_port(phba);
5815         beiscsi_free_mem(phba);
5816 free_port:
5817         pci_free_consistent(phba->pcidev,
5818                             phba->ctrl.mbox_mem_alloced.size,
5819                             phba->ctrl.mbox_mem_alloced.va,
5820                            phba->ctrl.mbox_mem_alloced.dma);
5821         beiscsi_unmap_pci_function(phba);
5822 hba_free:
5823         if (phba->msix_enabled)
5824                 pci_disable_msix(phba->pcidev);
5825         pci_dev_put(phba->pcidev);
5826         iscsi_host_free(phba->shost);
5827         pci_set_drvdata(pcidev, NULL);
5828 disable_pci:
5829         pci_release_regions(pcidev);
5830         pci_disable_device(pcidev);
5831         return ret;
5832 }
5833
5834 static struct pci_error_handlers beiscsi_eeh_handlers = {
5835         .error_detected = beiscsi_eeh_err_detected,
5836         .slot_reset = beiscsi_eeh_reset,
5837         .resume = beiscsi_eeh_resume,
5838 };
5839
5840 struct iscsi_transport beiscsi_iscsi_transport = {
5841         .owner = THIS_MODULE,
5842         .name = DRV_NAME,
5843         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5844                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
5845         .create_session = beiscsi_session_create,
5846         .destroy_session = beiscsi_session_destroy,
5847         .create_conn = beiscsi_conn_create,
5848         .bind_conn = beiscsi_conn_bind,
5849         .destroy_conn = iscsi_conn_teardown,
5850         .attr_is_visible = be2iscsi_attr_is_visible,
5851         .set_iface_param = be2iscsi_iface_set_param,
5852         .get_iface_param = be2iscsi_iface_get_param,
5853         .set_param = beiscsi_set_param,
5854         .get_conn_param = iscsi_conn_get_param,
5855         .get_session_param = iscsi_session_get_param,
5856         .get_host_param = beiscsi_get_host_param,
5857         .start_conn = beiscsi_conn_start,
5858         .stop_conn = iscsi_conn_stop,
5859         .send_pdu = iscsi_conn_send_pdu,
5860         .xmit_task = beiscsi_task_xmit,
5861         .cleanup_task = beiscsi_cleanup_task,
5862         .alloc_pdu = beiscsi_alloc_pdu,
5863         .parse_pdu_itt = beiscsi_parse_pdu,
5864         .get_stats = beiscsi_conn_get_stats,
5865         .get_ep_param = beiscsi_ep_get_param,
5866         .ep_connect = beiscsi_ep_connect,
5867         .ep_poll = beiscsi_ep_poll,
5868         .ep_disconnect = beiscsi_ep_disconnect,
5869         .session_recovery_timedout = iscsi_session_recovery_timedout,
5870         .bsg_request = beiscsi_bsg_request,
5871 };
5872
5873 static struct pci_driver beiscsi_pci_driver = {
5874         .name = DRV_NAME,
5875         .probe = beiscsi_dev_probe,
5876         .remove = beiscsi_remove,
5877         .id_table = beiscsi_pci_id_table,
5878         .err_handler = &beiscsi_eeh_handlers
5879 };
5880
5881
5882 static int __init beiscsi_module_init(void)
5883 {
5884         int ret;
5885
5886         beiscsi_scsi_transport =
5887                         iscsi_register_transport(&beiscsi_iscsi_transport);
5888         if (!beiscsi_scsi_transport) {
5889                 printk(KERN_ERR
5890                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5891                 return -ENOMEM;
5892         }
5893         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5894                &beiscsi_iscsi_transport);
5895
5896         ret = pci_register_driver(&beiscsi_pci_driver);
5897         if (ret) {
5898                 printk(KERN_ERR
5899                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5900                 goto unregister_iscsi_transport;
5901         }
5902         return 0;
5903
5904 unregister_iscsi_transport:
5905         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5906         return ret;
5907 }
5908
5909 static void __exit beiscsi_module_exit(void)
5910 {
5911         pci_unregister_driver(&beiscsi_pci_driver);
5912         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5913 }
5914
5915 module_init(beiscsi_module_init);
5916 module_exit(beiscsi_module_exit);