drivers/scsi/be2iscsi/be_main.c

   1 /**
   2  * Copyright (C) 2005 - 2015 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Written by: Jayamohan Kallickal (jayamohan.kallickal@avagotech.com)
  11  *
  12  * Contact Information:
  13  * linux-drivers@avagotech.com
  14  *
  15  * Emulex
  16  * 3333 Susan Street
  17  * Costa Mesa, CA 92626
  18  */
  19
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/blkdev.h>
  25 #include <linux/pci.h>
  26 #include <linux/string.h>
  27 #include <linux/kernel.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/iscsi_boot_sysfs.h>
  30 #include <linux/module.h>
  31 #include <linux/bsg-lib.h>
  32 #include <linux/irq_poll.h>
  33
  34 #include <scsi/libiscsi.h>
  35 #include <scsi/scsi_bsg_iscsi.h>
  36 #include <scsi/scsi_netlink.h>
  37 #include <scsi/scsi_transport_iscsi.h>
  38 #include <scsi/scsi_transport.h>
  39 #include <scsi/scsi_cmnd.h>
  40 #include <scsi/scsi_device.h>
  41 #include <scsi/scsi_host.h>
  42 #include <scsi/scsi.h>
  43 #include "be_main.h"
  44 #include "be_iscsi.h"
  45 #include "be_mgmt.h"
  46 #include "be_cmds.h"
  47
  48 static unsigned int be_iopoll_budget = 10;
  49 static unsigned int be_max_phys_size = 64;
  50 static unsigned int enable_msix = 1;
  51
  52 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  53 MODULE_VERSION(BUILD_STR);
  54 MODULE_AUTHOR("Emulex Corporation");
  55 MODULE_LICENSE("GPL");
  56 module_param(be_iopoll_budget, int, 0);
  57 module_param(enable_msix, int, 0);
  58 module_param(be_max_phys_size, uint, S_IRUGO);
  59 MODULE_PARM_DESC(be_max_phys_size,
  60                 "Maximum Size (In Kilobytes) of physically contiguous "
  61                 "memory that can be allocated. Range is 16 - 128");
  62
  63 #define beiscsi_disp_param(_name)\
  64 ssize_t \
  65 beiscsi_##_name##_disp(struct device *dev,\
  66                         struct device_attribute *attrib, char *buf)     \
  67 {       \
  68         struct Scsi_Host *shost = class_to_shost(dev);\
  69         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  70         uint32_t param_val = 0; \
  71         param_val = phba->attr_##_name;\
  72         return snprintf(buf, PAGE_SIZE, "%d\n",\
  73                         phba->attr_##_name);\
  74 }
  75
  76 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  77 int \
  78 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  79 {\
  80         if (val >= _minval && val <= _maxval) {\
  81                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  82                             "BA_%d : beiscsi_"#_name" updated "\
  83                             "from 0x%x ==> 0x%x\n",\
  84                             phba->attr_##_name, val); \
  85                 phba->attr_##_name = val;\
  86                 return 0;\
  87         } \
  88         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  89                     "BA_%d beiscsi_"#_name" attribute "\
  90                     "cannot be updated to 0x%x, "\
  91                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  92                 return -EINVAL;\
  93 }
  94
  95 #define beiscsi_store_param(_name)  \
  96 ssize_t \
  97 beiscsi_##_name##_store(struct device *dev,\
  98                          struct device_attribute *attr, const char *buf,\
  99                          size_t count) \
 100 { \
 101         struct Scsi_Host  *shost = class_to_shost(dev);\
 102         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
 103         uint32_t param_val = 0;\
 104         if (!isdigit(buf[0]))\
 105                 return -EINVAL;\
 106         if (sscanf(buf, "%i", &param_val) != 1)\
 107                 return -EINVAL;\
 108         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 109                 return strlen(buf);\
 110         else \
 111                 return -EINVAL;\
 112 }
 113
 114 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 115 int \
 116 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 117 { \
 118         if (val >= _minval && val <= _maxval) {\
 119                 phba->attr_##_name = val;\
 120                 return 0;\
 121         } \
 122         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 123                     "BA_%d beiscsi_"#_name" attribute " \
 124                     "cannot be updated to 0x%x, "\
 125                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 126         phba->attr_##_name = _defval;\
 127         return -EINVAL;\
 128 }
 129
 130 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 131 static uint beiscsi_##_name = _defval;\
 132 module_param(beiscsi_##_name, uint, S_IRUGO);\
 133 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 134 beiscsi_disp_param(_name)\
 135 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 136 beiscsi_store_param(_name)\
 137 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 138 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 139               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 140
 141 /*
 142  * When new log level added update the
 143  * the MAX allowed value for log_enable
 144  */
 145 BEISCSI_RW_ATTR(log_enable, 0x00,
 146                 0xFF, 0x00, "Enable logging Bit Mask\n"
 147                 "\t\t\t\tInitialization Events  : 0x01\n"
 148                 "\t\t\t\tMailbox Events         : 0x02\n"
 149                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 150                 "\t\t\t\tError Handling         : 0x08\n"
 151                 "\t\t\t\tIO Path Events         : 0x10\n"
 152                 "\t\t\t\tConfiguration Path     : 0x20\n"
 153                 "\t\t\t\tiSCSI Protocol         : 0x40\n");
 154
 155 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
 156 DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
 157 DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
 158 DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
 159 DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
 160              beiscsi_active_session_disp, NULL);
 161 DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
 162              beiscsi_free_session_disp, NULL);
 163 struct device_attribute *beiscsi_attrs[] = {
 164         &dev_attr_beiscsi_log_enable,
 165         &dev_attr_beiscsi_drvr_ver,
 166         &dev_attr_beiscsi_adapter_family,
 167         &dev_attr_beiscsi_fw_ver,
 168         &dev_attr_beiscsi_active_session_count,
 169         &dev_attr_beiscsi_free_session_count,
 170         &dev_attr_beiscsi_phys_port,
 171         NULL,
 172 };
 173
 174 static char const *cqe_desc[] = {
 175         "RESERVED_DESC",
 176         "SOL_CMD_COMPLETE",
 177         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 178         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 179         "CXN_KILLED_BURST_LEN_MISMATCH",
 180         "CXN_KILLED_AHS_RCVD",
 181         "CXN_KILLED_HDR_DIGEST_ERR",
 182         "CXN_KILLED_UNKNOWN_HDR",
 183         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 184         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 185         "CXN_KILLED_RST_RCVD",
 186         "CXN_KILLED_TIMED_OUT",
 187         "CXN_KILLED_RST_SENT",
 188         "CXN_KILLED_FIN_RCVD",
 189         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 190         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 191         "CXN_KILLED_OVER_RUN_RESIDUAL",
 192         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 193         "CMD_KILLED_INVALID_STATSN_RCVD",
 194         "CMD_KILLED_INVALID_R2T_RCVD",
 195         "CMD_CXN_KILLED_LUN_INVALID",
 196         "CMD_CXN_KILLED_ICD_INVALID",
 197         "CMD_CXN_KILLED_ITT_INVALID",
 198         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 199         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 200         "CXN_INVALIDATE_NOTIFY",
 201         "CXN_INVALIDATE_INDEX_NOTIFY",
 202         "CMD_INVALIDATED_NOTIFY",
 203         "UNSOL_HDR_NOTIFY",
 204         "UNSOL_DATA_NOTIFY",
 205         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 206         "DRIVERMSG_NOTIFY",
 207         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 208         "SOL_CMD_KILLED_DIF_ERR",
 209         "CXN_KILLED_SYN_RCVD",
 210         "CXN_KILLED_IMM_DATA_RCVD"
 211 };
 212
 213 static int beiscsi_slave_configure(struct scsi_device *sdev)
 214 {
 215         blk_queue_max_segment_size(sdev->request_queue, 65536);
 216         return 0;
 217 }
 218
 219 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 220 {
 221         struct iscsi_cls_session *cls_session;
 222         struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
 223         struct beiscsi_io_task *aborted_io_task;
 224         struct iscsi_conn *conn;
 225         struct beiscsi_conn *beiscsi_conn;
 226         struct beiscsi_hba *phba;
 227         struct iscsi_session *session;
 228         struct invalidate_command_table *inv_tbl;
 229         struct be_dma_mem nonemb_cmd;
 230         unsigned int cid, tag, num_invalidate;
 231         int rc;
 232
 233         cls_session = starget_to_session(scsi_target(sc->device));
 234         session = cls_session->dd_data;
 235
 236         spin_lock_bh(&session->frwd_lock);
 237         if (!aborted_task || !aborted_task->sc) {
 238                 /* we raced */
 239                 spin_unlock_bh(&session->frwd_lock);
 240                 return SUCCESS;
 241         }
 242
 243         aborted_io_task = aborted_task->dd_data;
 244         if (!aborted_io_task->scsi_cmnd) {
 245                 /* raced or invalid command */
 246                 spin_unlock_bh(&session->frwd_lock);
 247                 return SUCCESS;
 248         }
 249         spin_unlock_bh(&session->frwd_lock);
 250         /* Invalidate WRB Posted for this Task */
 251         AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 252                       aborted_io_task->pwrb_handle->pwrb,
 253                       1);
 254
 255         conn = aborted_task->conn;
 256         beiscsi_conn = conn->dd_data;
 257         phba = beiscsi_conn->phba;
 258
 259         /* invalidate iocb */
 260         cid = beiscsi_conn->beiscsi_conn_cid;
 261         inv_tbl = phba->inv_tbl;
 262         memset(inv_tbl, 0x0, sizeof(*inv_tbl));
 263         inv_tbl->cid = cid;
 264         inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
 265         num_invalidate = 1;
 266         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 267                                 sizeof(struct invalidate_commands_params_in),
 268                                 &nonemb_cmd.dma);
 269         if (nonemb_cmd.va == NULL) {
 270                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 271                             "BM_%d : Failed to allocate memory for"
 272                             "mgmt_invalidate_icds\n");
 273                 return FAILED;
 274         }
 275         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 276
 277         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 278                                    cid, &nonemb_cmd);
 279         if (!tag) {
 280                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 281                             "BM_%d : mgmt_invalidate_icds could not be"
 282                             "submitted\n");
 283                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 284                                     nonemb_cmd.va, nonemb_cmd.dma);
 285
 286                 return FAILED;
 287         }
 288
 289         rc = beiscsi_mccq_compl(phba, tag, NULL, &nonemb_cmd);
 290         if (rc != -EBUSY)
 291                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 292                                     nonemb_cmd.va, nonemb_cmd.dma);
 293
 294         return iscsi_eh_abort(sc);
 295 }
 296
 297 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 298 {
 299         struct iscsi_task *abrt_task;
 300         struct beiscsi_io_task *abrt_io_task;
 301         struct iscsi_conn *conn;
 302         struct beiscsi_conn *beiscsi_conn;
 303         struct beiscsi_hba *phba;
 304         struct iscsi_session *session;
 305         struct iscsi_cls_session *cls_session;
 306         struct invalidate_command_table *inv_tbl;
 307         struct be_dma_mem nonemb_cmd;
 308         unsigned int cid, tag, i, num_invalidate;
 309         int rc;
 310
 311         /* invalidate iocbs */
 312         cls_session = starget_to_session(scsi_target(sc->device));
 313         session = cls_session->dd_data;
 314         spin_lock_bh(&session->frwd_lock);
 315         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 316                 spin_unlock_bh(&session->frwd_lock);
 317                 return FAILED;
 318         }
 319         conn = session->leadconn;
 320         beiscsi_conn = conn->dd_data;
 321         phba = beiscsi_conn->phba;
 322         cid = beiscsi_conn->beiscsi_conn_cid;
 323         inv_tbl = phba->inv_tbl;
 324         memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
 325         num_invalidate = 0;
 326         for (i = 0; i < conn->session->cmds_max; i++) {
 327                 abrt_task = conn->session->cmds[i];
 328                 abrt_io_task = abrt_task->dd_data;
 329                 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
 330                         continue;
 331
 332                 if (sc->device->lun != abrt_task->sc->device->lun)
 333                         continue;
 334
 335                 /* Invalidate WRB Posted for this Task */
 336                 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 337                               abrt_io_task->pwrb_handle->pwrb,
 338                               1);
 339
 340                 inv_tbl->cid = cid;
 341                 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
 342                 num_invalidate++;
 343                 inv_tbl++;
 344         }
 345         spin_unlock_bh(&session->frwd_lock);
 346         inv_tbl = phba->inv_tbl;
 347
 348         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 349                                 sizeof(struct invalidate_commands_params_in),
 350                                 &nonemb_cmd.dma);
 351         if (nonemb_cmd.va == NULL) {
 352                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 353                             "BM_%d : Failed to allocate memory for"
 354                             "mgmt_invalidate_icds\n");
 355                 return FAILED;
 356         }
 357         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 358         memset(nonemb_cmd.va, 0, nonemb_cmd.size);
 359         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 360                                    cid, &nonemb_cmd);
 361         if (!tag) {
 362                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 363                             "BM_%d : mgmt_invalidate_icds could not be"
 364                             " submitted\n");
 365                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 366                                     nonemb_cmd.va, nonemb_cmd.dma);
 367                 return FAILED;
 368         }
 369
 370         rc = beiscsi_mccq_compl(phba, tag, NULL, &nonemb_cmd);
 371         if (rc != -EBUSY)
 372                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 373                                     nonemb_cmd.va, nonemb_cmd.dma);
 374         return iscsi_eh_device_reset(sc);
 375 }
 376
 377 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
 378 {
 379         struct beiscsi_hba *phba = data;
 380         struct mgmt_session_info *boot_sess = &phba->boot_sess;
 381         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
 382         char *str = buf;
 383         int rc;
 384
 385         switch (type) {
 386         case ISCSI_BOOT_TGT_NAME:
 387                 rc = sprintf(buf, "%.*s\n",
 388                             (int)strlen(boot_sess->target_name),
 389                             (char *)&boot_sess->target_name);
 390                 break;
 391         case ISCSI_BOOT_TGT_IP_ADDR:
 392                 if (boot_conn->dest_ipaddr.ip_type == 0x1)
 393                         rc = sprintf(buf, "%pI4\n",
 394                                 (char *)&boot_conn->dest_ipaddr.addr);
 395                 else
 396                         rc = sprintf(str, "%pI6\n",
 397                                 (char *)&boot_conn->dest_ipaddr.addr);
 398                 break;
 399         case ISCSI_BOOT_TGT_PORT:
 400                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
 401                 break;
 402
 403         case ISCSI_BOOT_TGT_CHAP_NAME:
 404                 rc = sprintf(str,  "%.*s\n",
 405                              boot_conn->negotiated_login_options.auth_data.chap.
 406                              target_chap_name_length,
 407                              (char *)&boot_conn->negotiated_login_options.
 408                              auth_data.chap.target_chap_name);
 409                 break;
 410         case ISCSI_BOOT_TGT_CHAP_SECRET:
 411                 rc = sprintf(str,  "%.*s\n",
 412                              boot_conn->negotiated_login_options.auth_data.chap.
 413                              target_secret_length,
 414                              (char *)&boot_conn->negotiated_login_options.
 415                              auth_data.chap.target_secret);
 416                 break;
 417         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 418                 rc = sprintf(str,  "%.*s\n",
 419                              boot_conn->negotiated_login_options.auth_data.chap.
 420                              intr_chap_name_length,
 421                              (char *)&boot_conn->negotiated_login_options.
 422                              auth_data.chap.intr_chap_name);
 423                 break;
 424         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 425                 rc = sprintf(str,  "%.*s\n",
 426                              boot_conn->negotiated_login_options.auth_data.chap.
 427                              intr_secret_length,
 428                              (char *)&boot_conn->negotiated_login_options.
 429                              auth_data.chap.intr_secret);
 430                 break;
 431         case ISCSI_BOOT_TGT_FLAGS:
 432                 rc = sprintf(str, "2\n");
 433                 break;
 434         case ISCSI_BOOT_TGT_NIC_ASSOC:
 435                 rc = sprintf(str, "0\n");
 436                 break;
 437         default:
 438                 rc = -ENOSYS;
 439                 break;
 440         }
 441         return rc;
 442 }
 443
 444 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
 445 {
 446         struct beiscsi_hba *phba = data;
 447         char *str = buf;
 448         int rc;
 449
 450         switch (type) {
 451         case ISCSI_BOOT_INI_INITIATOR_NAME:
 452                 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
 453                 break;
 454         default:
 455                 rc = -ENOSYS;
 456                 break;
 457         }
 458         return rc;
 459 }
 460
 461 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
 462 {
 463         struct beiscsi_hba *phba = data;
 464         char *str = buf;
 465         int rc;
 466
 467         switch (type) {
 468         case ISCSI_BOOT_ETH_FLAGS:
 469                 rc = sprintf(str, "2\n");
 470                 break;
 471         case ISCSI_BOOT_ETH_INDEX:
 472                 rc = sprintf(str, "0\n");
 473                 break;
 474         case ISCSI_BOOT_ETH_MAC:
 475                 rc  = beiscsi_get_macaddr(str, phba);
 476                 break;
 477         default:
 478                 rc = -ENOSYS;
 479                 break;
 480         }
 481         return rc;
 482 }
 483
 484
 485 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
 486 {
 487         umode_t rc;
 488
 489         switch (type) {
 490         case ISCSI_BOOT_TGT_NAME:
 491         case ISCSI_BOOT_TGT_IP_ADDR:
 492         case ISCSI_BOOT_TGT_PORT:
 493         case ISCSI_BOOT_TGT_CHAP_NAME:
 494         case ISCSI_BOOT_TGT_CHAP_SECRET:
 495         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 496         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 497         case ISCSI_BOOT_TGT_NIC_ASSOC:
 498         case ISCSI_BOOT_TGT_FLAGS:
 499                 rc = S_IRUGO;
 500                 break;
 501         default:
 502                 rc = 0;
 503                 break;
 504         }
 505         return rc;
 506 }
 507
 508 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
 509 {
 510         umode_t rc;
 511
 512         switch (type) {
 513         case ISCSI_BOOT_INI_INITIATOR_NAME:
 514                 rc = S_IRUGO;
 515                 break;
 516         default:
 517                 rc = 0;
 518                 break;
 519         }
 520         return rc;
 521 }
 522
 523
 524 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
 525 {
 526         umode_t rc;
 527
 528         switch (type) {
 529         case ISCSI_BOOT_ETH_FLAGS:
 530         case ISCSI_BOOT_ETH_MAC:
 531         case ISCSI_BOOT_ETH_INDEX:
 532                 rc = S_IRUGO;
 533                 break;
 534         default:
 535                 rc = 0;
 536                 break;
 537         }
 538         return rc;
 539 }
 540
 541 /*------------------- PCI Driver operations and data ----------------- */
 542 static const struct pci_device_id beiscsi_pci_id_table[] = {
 543         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 544         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 545         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 546         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 547         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 548         { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
 549         { 0 }
 550 };
 551 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 552
 553
 554 static struct scsi_host_template beiscsi_sht = {
 555         .module = THIS_MODULE,
 556         .name = "Emulex 10Gbe open-iscsi Initiator Driver",
 557         .proc_name = DRV_NAME,
 558         .queuecommand = iscsi_queuecommand,
 559         .change_queue_depth = scsi_change_queue_depth,
 560         .slave_configure = beiscsi_slave_configure,
 561         .target_alloc = iscsi_target_alloc,
 562         .eh_abort_handler = beiscsi_eh_abort,
 563         .eh_device_reset_handler = beiscsi_eh_device_reset,
 564         .eh_target_reset_handler = iscsi_eh_session_reset,
 565         .shost_attrs = beiscsi_attrs,
 566         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 567         .can_queue = BE2_IO_DEPTH,
 568         .this_id = -1,
 569         .max_sectors = BEISCSI_MAX_SECTORS,
 570         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 571         .use_clustering = ENABLE_CLUSTERING,
 572         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 573         .track_queue_depth = 1,
 574 };
 575
 576 static struct scsi_transport_template *beiscsi_scsi_transport;
 577
 578 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 579 {
 580         struct beiscsi_hba *phba;
 581         struct Scsi_Host *shost;
 582
 583         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 584         if (!shost) {
 585                 dev_err(&pcidev->dev,
 586                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 587                 return NULL;
 588         }
 589         shost->max_id = BE2_MAX_SESSIONS;
 590         shost->max_channel = 0;
 591         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 592         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 593         shost->transportt = beiscsi_scsi_transport;
 594         phba = iscsi_host_priv(shost);
 595         memset(phba, 0, sizeof(*phba));
 596         phba->shost = shost;
 597         phba->pcidev = pci_dev_get(pcidev);
 598         pci_set_drvdata(pcidev, phba);
 599         phba->interface_handle = 0xFFFFFFFF;
 600
 601         return phba;
 602 }
 603
 604 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 605 {
 606         if (phba->csr_va) {
 607                 iounmap(phba->csr_va);
 608                 phba->csr_va = NULL;
 609         }
 610         if (phba->db_va) {
 611                 iounmap(phba->db_va);
 612                 phba->db_va = NULL;
 613         }
 614         if (phba->pci_va) {
 615                 iounmap(phba->pci_va);
 616                 phba->pci_va = NULL;
 617         }
 618 }
 619
 620 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 621                                 struct pci_dev *pcidev)
 622 {
 623         u8 __iomem *addr;
 624         int pcicfg_reg;
 625
 626         addr = ioremap_nocache(pci_resource_start(pcidev, 2),
 627                                pci_resource_len(pcidev, 2));
 628         if (addr == NULL)
 629                 return -ENOMEM;
 630         phba->ctrl.csr = addr;
 631         phba->csr_va = addr;
 632         phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
 633
 634         addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
 635         if (addr == NULL)
 636                 goto pci_map_err;
 637         phba->ctrl.db = addr;
 638         phba->db_va = addr;
 639         phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);
 640
 641         if (phba->generation == BE_GEN2)
 642                 pcicfg_reg = 1;
 643         else
 644                 pcicfg_reg = 0;
 645
 646         addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
 647                                pci_resource_len(pcidev, pcicfg_reg));
 648
 649         if (addr == NULL)
 650                 goto pci_map_err;
 651         phba->ctrl.pcicfg = addr;
 652         phba->pci_va = addr;
 653         phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
 654         return 0;
 655
 656 pci_map_err:
 657         beiscsi_unmap_pci_function(phba);
 658         return -ENOMEM;
 659 }
 660
 661 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 662 {
 663         int ret;
 664
 665         ret = pci_enable_device(pcidev);
 666         if (ret) {
 667                 dev_err(&pcidev->dev,
 668                         "beiscsi_enable_pci - enable device failed\n");
 669                 return ret;
 670         }
 671
 672         ret = pci_request_regions(pcidev, DRV_NAME);
 673         if (ret) {
 674                 dev_err(&pcidev->dev,
 675                                 "beiscsi_enable_pci - request region failed\n");
 676                 goto pci_dev_disable;
 677         }
 678
 679         pci_set_master(pcidev);
 680         ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
 681         if (ret) {
 682                 ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
 683                 if (ret) {
 684                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 685                         goto pci_region_release;
 686                 } else {
 687                         ret = pci_set_consistent_dma_mask(pcidev,
 688                                                           DMA_BIT_MASK(32));
 689                 }
 690         } else {
 691                 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
 692                 if (ret) {
 693                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 694                         goto pci_region_release;
 695                 }
 696         }
 697         return 0;
 698
 699 pci_region_release:
 700         pci_release_regions(pcidev);
 701 pci_dev_disable:
 702         pci_disable_device(pcidev);
 703
 704         return ret;
 705 }
 706
 707 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 708 {
 709         struct be_ctrl_info *ctrl = &phba->ctrl;
 710         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 711         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 712         int status = 0;
 713
 714         ctrl->pdev = pdev;
 715         status = beiscsi_map_pci_bars(phba, pdev);
 716         if (status)
 717                 return status;
 718         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 719         mbox_mem_alloc->va = pci_alloc_consistent(pdev,
 720                                                   mbox_mem_alloc->size,
 721                                                   &mbox_mem_alloc->dma);
 722         if (!mbox_mem_alloc->va) {
 723                 beiscsi_unmap_pci_function(phba);
 724                 return -ENOMEM;
 725         }
 726
 727         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 728         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 729         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 730         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 731         mutex_init(&ctrl->mbox_lock);
 732         spin_lock_init(&phba->ctrl.mcc_lock);
 733
 734         return status;
 735 }
 736
 737 /**
 738  * beiscsi_get_params()- Set the config paramters
 739  * @phba: ptr  device priv structure
 740  **/
 741 static void beiscsi_get_params(struct beiscsi_hba *phba)
 742 {
 743         uint32_t total_cid_count = 0;
 744         uint32_t total_icd_count = 0;
 745         uint8_t ulp_num = 0;
 746
 747         total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
 748                           BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
 749
 750         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
 751                 uint32_t align_mask = 0;
 752                 uint32_t icd_post_per_page = 0;
 753                 uint32_t icd_count_unavailable = 0;
 754                 uint32_t icd_start = 0, icd_count = 0;
 755                 uint32_t icd_start_align = 0, icd_count_align = 0;
 756
 757                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
 758                         icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
 759                         icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 760
 761                         /* Get ICD count that can be posted on each page */
 762                         icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
 763                                              sizeof(struct iscsi_sge)));
 764                         align_mask = (icd_post_per_page - 1);
 765
 766                         /* Check if icd_start is aligned ICD per page posting */
 767                         if (icd_start % icd_post_per_page) {
 768                                 icd_start_align = ((icd_start +
 769                                                     icd_post_per_page) &
 770                                                     ~(align_mask));
 771                                 phba->fw_config.
 772                                         iscsi_icd_start[ulp_num] =
 773                                         icd_start_align;
 774                         }
 775
 776                         icd_count_align = (icd_count & ~align_mask);
 777
 778                         /* ICD discarded in the process of alignment */
 779                         if (icd_start_align)
 780                                 icd_count_unavailable = ((icd_start_align -
 781                                                           icd_start) +
 782                                                          (icd_count -
 783                                                           icd_count_align));
 784
 785                         /* Updated ICD count available */
 786                         phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
 787                                         icd_count_unavailable);
 788
 789                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 790                                         "BM_%d : Aligned ICD values\n"
 791                                         "\t ICD Start : %d\n"
 792                                         "\t ICD Count : %d\n"
 793                                         "\t ICD Discarded : %d\n",
 794                                         phba->fw_config.
 795                                         iscsi_icd_start[ulp_num],
 796                                         phba->fw_config.
 797                                         iscsi_icd_count[ulp_num],
 798                                         icd_count_unavailable);
 799                         break;
 800                 }
 801         }
 802
 803         total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 804         phba->params.ios_per_ctrl = (total_icd_count -
 805                                     (total_cid_count +
 806                                      BE2_TMFS + BE2_NOPOUT_REQ));
 807         phba->params.cxns_per_ctrl = total_cid_count;
 808         phba->params.asyncpdus_per_ctrl = total_cid_count;
 809         phba->params.icds_per_ctrl = total_icd_count;
 810         phba->params.num_sge_per_io = BE2_SGE;
 811         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 812         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 813         phba->params.eq_timer = 64;
 814         phba->params.num_eq_entries = 1024;
 815         phba->params.num_cq_entries = 1024;
 816         phba->params.wrbs_per_cxn = 256;
 817 }
 818
 819 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 820                            unsigned int id, unsigned int clr_interrupt,
 821                            unsigned int num_processed,
 822                            unsigned char rearm, unsigned char event)
 823 {
 824         u32 val = 0;
 825
 826         if (rearm)
 827                 val |= 1 << DB_EQ_REARM_SHIFT;
 828         if (clr_interrupt)
 829                 val |= 1 << DB_EQ_CLR_SHIFT;
 830         if (event)
 831                 val |= 1 << DB_EQ_EVNT_SHIFT;
 832
 833         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 834         /* Setting lower order EQ_ID Bits */
 835         val |= (id & DB_EQ_RING_ID_LOW_MASK);
 836
 837         /* Setting Higher order EQ_ID Bits */
 838         val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
 839                   DB_EQ_RING_ID_HIGH_MASK)
 840                   << DB_EQ_HIGH_SET_SHIFT);
 841
 842         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 843 }
 844
 845 /**
 846  * be_isr_mcc - The isr routine of the driver.
 847  * @irq: Not used
 848  * @dev_id: Pointer to host adapter structure
 849  */
 850 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 851 {
 852         struct beiscsi_hba *phba;
 853         struct be_eq_entry *eqe = NULL;
 854         struct be_queue_info *eq;
 855         struct be_queue_info *mcc;
 856         unsigned int num_eq_processed;
 857         struct be_eq_obj *pbe_eq;
 858         unsigned long flags;
 859
 860         pbe_eq = dev_id;
 861         eq = &pbe_eq->q;
 862         phba =  pbe_eq->phba;
 863         mcc = &phba->ctrl.mcc_obj.cq;
 864         eqe = queue_tail_node(eq);
 865
 866         num_eq_processed = 0;
 867
 868         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 869                                 & EQE_VALID_MASK) {
 870                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 871                      resource_id) / 32] &
 872                      EQE_RESID_MASK) >> 16) == mcc->id) {
 873                         spin_lock_irqsave(&phba->isr_lock, flags);
 874                         pbe_eq->todo_mcc_cq = true;
 875                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 876                 }
 877                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 878                 queue_tail_inc(eq);
 879                 eqe = queue_tail_node(eq);
 880                 num_eq_processed++;
 881         }
 882         if (pbe_eq->todo_mcc_cq)
 883                 queue_work(phba->wq, &pbe_eq->work_cqs);
 884         if (num_eq_processed)
 885                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
 886
 887         return IRQ_HANDLED;
 888 }
 889
 890 /**
 891  * be_isr_msix - The isr routine of the driver.
 892  * @irq: Not used
 893  * @dev_id: Pointer to host adapter structure
 894  */
 895 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 896 {
 897         struct beiscsi_hba *phba;
 898         struct be_queue_info *eq;
 899         struct be_eq_obj *pbe_eq;
 900
 901         pbe_eq = dev_id;
 902         eq = &pbe_eq->q;
 903
 904         phba = pbe_eq->phba;
 905
 906         /* disable interrupt till iopoll completes */
 907         hwi_ring_eq_db(phba, eq->id, 1, 0, 0, 1);
 908         irq_poll_sched(&pbe_eq->iopoll);
 909
 910         return IRQ_HANDLED;
 911 }
 912
 913 /**
 914  * be_isr - The isr routine of the driver.
 915  * @irq: Not used
 916  * @dev_id: Pointer to host adapter structure
 917  */
 918 static irqreturn_t be_isr(int irq, void *dev_id)
 919 {
 920         struct beiscsi_hba *phba;
 921         struct hwi_controller *phwi_ctrlr;
 922         struct hwi_context_memory *phwi_context;
 923         struct be_eq_entry *eqe = NULL;
 924         struct be_queue_info *eq;
 925         struct be_queue_info *mcc;
 926         unsigned long flags, index;
 927         unsigned int num_mcceq_processed, num_ioeq_processed;
 928         struct be_ctrl_info *ctrl;
 929         struct be_eq_obj *pbe_eq;
 930         int isr;
 931
 932         phba = dev_id;
 933         ctrl = &phba->ctrl;
 934         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 935                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 936         if (!isr)
 937                 return IRQ_NONE;
 938
 939         phwi_ctrlr = phba->phwi_ctrlr;
 940         phwi_context = phwi_ctrlr->phwi_ctxt;
 941         pbe_eq = &phwi_context->be_eq[0];
 942
 943         eq = &phwi_context->be_eq[0].q;
 944         mcc = &phba->ctrl.mcc_obj.cq;
 945         index = 0;
 946         eqe = queue_tail_node(eq);
 947
 948         num_ioeq_processed = 0;
 949         num_mcceq_processed = 0;
 950         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 951                                 & EQE_VALID_MASK) {
 952                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 953                      resource_id) / 32] &
 954                      EQE_RESID_MASK) >> 16) == mcc->id) {
 955                         spin_lock_irqsave(&phba->isr_lock, flags);
 956                         pbe_eq->todo_mcc_cq = true;
 957                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 958                         num_mcceq_processed++;
 959                 } else {
 960                         irq_poll_sched(&pbe_eq->iopoll);
 961                         num_ioeq_processed++;
 962                 }
 963                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 964                 queue_tail_inc(eq);
 965                 eqe = queue_tail_node(eq);
 966         }
 967         if (num_ioeq_processed || num_mcceq_processed) {
 968                 if (pbe_eq->todo_mcc_cq)
 969                         queue_work(phba->wq, &pbe_eq->work_cqs);
 970
 971                 if ((num_mcceq_processed) && (!num_ioeq_processed))
 972                         hwi_ring_eq_db(phba, eq->id, 0,
 973                                       (num_ioeq_processed +
 974                                        num_mcceq_processed) , 1, 1);
 975                 else
 976                         hwi_ring_eq_db(phba, eq->id, 0,
 977                                        (num_ioeq_processed +
 978                                         num_mcceq_processed), 0, 1);
 979
 980                 return IRQ_HANDLED;
 981         } else
 982                 return IRQ_NONE;
 983 }
 984
 985
 986 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
 987 {
 988         struct pci_dev *pcidev = phba->pcidev;
 989         struct hwi_controller *phwi_ctrlr;
 990         struct hwi_context_memory *phwi_context;
 991         int ret, msix_vec, i, j;
 992
 993         phwi_ctrlr = phba->phwi_ctrlr;
 994         phwi_context = phwi_ctrlr->phwi_ctxt;
 995
 996         if (phba->msix_enabled) {
 997                 for (i = 0; i < phba->num_cpus; i++) {
 998                         phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
 999                                                     GFP_KERNEL);
1000                         if (!phba->msi_name[i]) {
1001                                 ret = -ENOMEM;
1002                                 goto free_msix_irqs;
1003                         }
1004
1005                         sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
1006                                 phba->shost->host_no, i);
1007                         msix_vec = phba->msix_entries[i].vector;
1008                         ret = request_irq(msix_vec, be_isr_msix, 0,
1009                                           phba->msi_name[i],
1010                                           &phwi_context->be_eq[i]);
1011                         if (ret) {
1012                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1013                                             "BM_%d : beiscsi_init_irqs-Failed to"
1014                                             "register msix for i = %d\n",
1015                                             i);
1016                                 kfree(phba->msi_name[i]);
1017                                 goto free_msix_irqs;
1018                         }
1019                 }
1020                 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
1021                 if (!phba->msi_name[i]) {
1022                         ret = -ENOMEM;
1023                         goto free_msix_irqs;
1024                 }
1025                 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
1026                         phba->shost->host_no);
1027                 msix_vec = phba->msix_entries[i].vector;
1028                 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
1029                                   &phwi_context->be_eq[i]);
1030                 if (ret) {
1031                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
1032                                     "BM_%d : beiscsi_init_irqs-"
1033                                     "Failed to register beiscsi_msix_mcc\n");
1034                         kfree(phba->msi_name[i]);
1035                         goto free_msix_irqs;
1036                 }
1037
1038         } else {
1039                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1040                                   "beiscsi", phba);
1041                 if (ret) {
1042                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1043                                     "BM_%d : beiscsi_init_irqs-"
1044                                     "Failed to register irq\\n");
1045                         return ret;
1046                 }
1047         }
1048         return 0;
1049 free_msix_irqs:
1050         for (j = i - 1; j >= 0; j--) {
1051                 kfree(phba->msi_name[j]);
1052                 msix_vec = phba->msix_entries[j].vector;
1053                 free_irq(msix_vec, &phwi_context->be_eq[j]);
1054         }
1055         return ret;
1056 }
1057
1058 void hwi_ring_cq_db(struct beiscsi_hba *phba,
1059                            unsigned int id, unsigned int num_processed,
1060                            unsigned char rearm)
1061 {
1062         u32 val = 0;
1063
1064         if (rearm)
1065                 val |= 1 << DB_CQ_REARM_SHIFT;
1066
1067         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1068
1069         /* Setting lower order CQ_ID Bits */
1070         val |= (id & DB_CQ_RING_ID_LOW_MASK);
1071
1072         /* Setting Higher order CQ_ID Bits */
1073         val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
1074                   DB_CQ_RING_ID_HIGH_MASK)
1075                   << DB_CQ_HIGH_SET_SHIFT);
1076
1077         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1078 }
1079
1080 static unsigned int
1081 beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1082                           struct beiscsi_hba *phba,
1083                           struct pdu_base *ppdu,
1084                           unsigned long pdu_len,
1085                           void *pbuffer, unsigned long buf_len)
1086 {
1087         struct iscsi_conn *conn = beiscsi_conn->conn;
1088         struct iscsi_session *session = conn->session;
1089         struct iscsi_task *task;
1090         struct beiscsi_io_task *io_task;
1091         struct iscsi_hdr *login_hdr;
1092
1093         switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1094                                                 PDUBASE_OPCODE_MASK) {
1095         case ISCSI_OP_NOOP_IN:
1096                 pbuffer = NULL;
1097                 buf_len = 0;
1098                 break;
1099         case ISCSI_OP_ASYNC_EVENT:
1100                 break;
1101         case ISCSI_OP_REJECT:
1102                 WARN_ON(!pbuffer);
1103                 WARN_ON(!(buf_len == 48));
1104                 beiscsi_log(phba, KERN_ERR,
1105                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1106                             "BM_%d : In ISCSI_OP_REJECT\n");
1107                 break;
1108         case ISCSI_OP_LOGIN_RSP:
1109         case ISCSI_OP_TEXT_RSP:
1110                 task = conn->login_task;
1111                 io_task = task->dd_data;
1112                 login_hdr = (struct iscsi_hdr *)ppdu;
1113                 login_hdr->itt = io_task->libiscsi_itt;
1114                 break;
1115         default:
1116                 beiscsi_log(phba, KERN_WARNING,
1117                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1118                             "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1119                             (ppdu->
1120                              dw[offsetof(struct amap_pdu_base, opcode) / 32]
1121                              & PDUBASE_OPCODE_MASK));
1122                 return 1;
1123         }
1124
1125         spin_lock_bh(&session->back_lock);
1126         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1127         spin_unlock_bh(&session->back_lock);
1128         return 0;
1129 }
1130
1131 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1132 {
1133         struct sgl_handle *psgl_handle;
1134
1135         if (phba->io_sgl_hndl_avbl) {
1136                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1137                             "BM_%d : In alloc_io_sgl_handle,"
1138                             " io_sgl_alloc_index=%d\n",
1139                             phba->io_sgl_alloc_index);
1140
1141                 psgl_handle = phba->io_sgl_hndl_base[phba->
1142                                                 io_sgl_alloc_index];
1143                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1144                 phba->io_sgl_hndl_avbl--;
1145                 if (phba->io_sgl_alloc_index == (phba->params.
1146                                                  ios_per_ctrl - 1))
1147                         phba->io_sgl_alloc_index = 0;
1148                 else
1149                         phba->io_sgl_alloc_index++;
1150         } else
1151                 psgl_handle = NULL;
1152         return psgl_handle;
1153 }
1154
1155 static void
1156 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1157 {
1158         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1159                     "BM_%d : In free_,io_sgl_free_index=%d\n",
1160                     phba->io_sgl_free_index);
1161
1162         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1163                 /*
1164                  * this can happen if clean_task is called on a task that
1165                  * failed in xmit_task or alloc_pdu.
1166                  */
1167                  beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1168                              "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1169                              "value there=%p\n", phba->io_sgl_free_index,
1170                              phba->io_sgl_hndl_base
1171                              [phba->io_sgl_free_index]);
1172                 return;
1173         }
1174         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1175         phba->io_sgl_hndl_avbl++;
1176         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1177                 phba->io_sgl_free_index = 0;
1178         else
1179                 phba->io_sgl_free_index++;
1180 }
1181
1182 static inline struct wrb_handle *
1183 beiscsi_get_wrb_handle(struct hwi_wrb_context *pwrb_context,
1184                        unsigned int wrbs_per_cxn)
1185 {
1186         struct wrb_handle *pwrb_handle;
1187
1188         pwrb_handle = pwrb_context->pwrb_handle_base[pwrb_context->alloc_index];
1189         pwrb_context->wrb_handles_available--;
1190         if (pwrb_context->alloc_index == (wrbs_per_cxn - 1))
1191                 pwrb_context->alloc_index = 0;
1192         else
1193                 pwrb_context->alloc_index++;
1194
1195         return pwrb_handle;
1196 }
1197
1198 /**
1199  * alloc_wrb_handle - To allocate a wrb handle
1200  * @phba: The hba pointer
1201  * @cid: The cid to use for allocation
1202  * @pwrb_context: ptr to ptr to wrb context
1203  *
1204  * This happens under session_lock until submission to chip
1205  */
1206 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
1207                                     struct hwi_wrb_context **pcontext)
1208 {
1209         struct hwi_wrb_context *pwrb_context;
1210         struct hwi_controller *phwi_ctrlr;
1211         uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
1212
1213         phwi_ctrlr = phba->phwi_ctrlr;
1214         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1215         /* return the context address */
1216         *pcontext = pwrb_context;
1217         return beiscsi_get_wrb_handle(pwrb_context, phba->params.wrbs_per_cxn);
1218 }
1219
1220 static inline void
1221 beiscsi_put_wrb_handle(struct hwi_wrb_context *pwrb_context,
1222                        struct wrb_handle *pwrb_handle,
1223                        unsigned int wrbs_per_cxn)
1224 {
1225         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1226         pwrb_context->wrb_handles_available++;
1227         if (pwrb_context->free_index == (wrbs_per_cxn - 1))
1228                 pwrb_context->free_index = 0;
1229         else
1230                 pwrb_context->free_index++;
1231 }
1232
1233 /**
1234  * free_wrb_handle - To free the wrb handle back to pool
1235  * @phba: The hba pointer
1236  * @pwrb_context: The context to free from
1237  * @pwrb_handle: The wrb_handle to free
1238  *
1239  * This happens under session_lock until submission to chip
1240  */
1241 static void
1242 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1243                 struct wrb_handle *pwrb_handle)
1244 {
1245         beiscsi_put_wrb_handle(pwrb_context,
1246                                pwrb_handle,
1247                                phba->params.wrbs_per_cxn);
1248         beiscsi_log(phba, KERN_INFO,
1249                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1250                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1251                     "wrb_handles_available=%d\n",
1252                     pwrb_handle, pwrb_context->free_index,
1253                     pwrb_context->wrb_handles_available);
1254 }
1255
1256 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1257 {
1258         struct sgl_handle *psgl_handle;
1259
1260         if (phba->eh_sgl_hndl_avbl) {
1261                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1262                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1263                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1264                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1265                             phba->eh_sgl_alloc_index,
1266                             phba->eh_sgl_alloc_index);
1267
1268                 phba->eh_sgl_hndl_avbl--;
1269                 if (phba->eh_sgl_alloc_index ==
1270                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1271                      1))
1272                         phba->eh_sgl_alloc_index = 0;
1273                 else
1274                         phba->eh_sgl_alloc_index++;
1275         } else
1276                 psgl_handle = NULL;
1277         return psgl_handle;
1278 }
1279
1280 void
1281 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1282 {
1283
1284         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1285                     "BM_%d : In  free_mgmt_sgl_handle,"
1286                     "eh_sgl_free_index=%d\n",
1287                     phba->eh_sgl_free_index);
1288
1289         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1290                 /*
1291                  * this can happen if clean_task is called on a task that
1292                  * failed in xmit_task or alloc_pdu.
1293                  */
1294                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1295                             "BM_%d : Double Free in eh SGL ,"
1296                             "eh_sgl_free_index=%d\n",
1297                             phba->eh_sgl_free_index);
1298                 return;
1299         }
1300         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1301         phba->eh_sgl_hndl_avbl++;
1302         if (phba->eh_sgl_free_index ==
1303             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1304                 phba->eh_sgl_free_index = 0;
1305         else
1306                 phba->eh_sgl_free_index++;
1307 }
1308
1309 static void
1310 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1311                 struct iscsi_task *task,
1312                 struct common_sol_cqe *csol_cqe)
1313 {
1314         struct beiscsi_io_task *io_task = task->dd_data;
1315         struct be_status_bhs *sts_bhs =
1316                                 (struct be_status_bhs *)io_task->cmd_bhs;
1317         struct iscsi_conn *conn = beiscsi_conn->conn;
1318         unsigned char *sense;
1319         u32 resid = 0, exp_cmdsn, max_cmdsn;
1320         u8 rsp, status, flags;
1321
1322         exp_cmdsn = csol_cqe->exp_cmdsn;
1323         max_cmdsn = (csol_cqe->exp_cmdsn +
1324                      csol_cqe->cmd_wnd - 1);
1325         rsp = csol_cqe->i_resp;
1326         status = csol_cqe->i_sts;
1327         flags = csol_cqe->i_flags;
1328         resid = csol_cqe->res_cnt;
1329
1330         if (!task->sc) {
1331                 if (io_task->scsi_cmnd) {
1332                         scsi_dma_unmap(io_task->scsi_cmnd);
1333                         io_task->scsi_cmnd = NULL;
1334                 }
1335
1336                 return;
1337         }
1338         task->sc->result = (DID_OK << 16) | status;
1339         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1340                 task->sc->result = DID_ERROR << 16;
1341                 goto unmap;
1342         }
1343
1344         /* bidi not initially supported */
1345         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1346                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1347                         task->sc->result = DID_ERROR << 16;
1348
1349                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1350                         scsi_set_resid(task->sc, resid);
1351                         if (!status && (scsi_bufflen(task->sc) - resid <
1352                             task->sc->underflow))
1353                                 task->sc->result = DID_ERROR << 16;
1354                 }
1355         }
1356
1357         if (status == SAM_STAT_CHECK_CONDITION) {
1358                 u16 sense_len;
1359                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1360
1361                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1362                 sense_len = be16_to_cpu(*slen);
1363                 memcpy(task->sc->sense_buffer, sense,
1364                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1365         }
1366
1367         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1368                 conn->rxdata_octets += resid;
1369 unmap:
1370         if (io_task->scsi_cmnd) {
1371                 scsi_dma_unmap(io_task->scsi_cmnd);
1372                 io_task->scsi_cmnd = NULL;
1373         }
1374         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1375 }
1376
1377 static void
1378 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1379                     struct iscsi_task *task,
1380                     struct common_sol_cqe *csol_cqe)
1381 {
1382         struct iscsi_logout_rsp *hdr;
1383         struct beiscsi_io_task *io_task = task->dd_data;
1384         struct iscsi_conn *conn = beiscsi_conn->conn;
1385
1386         hdr = (struct iscsi_logout_rsp *)task->hdr;
1387         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1388         hdr->t2wait = 5;
1389         hdr->t2retain = 0;
1390         hdr->flags = csol_cqe->i_flags;
1391         hdr->response = csol_cqe->i_resp;
1392         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1393         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1394                                      csol_cqe->cmd_wnd - 1);
1395
1396         hdr->dlength[0] = 0;
1397         hdr->dlength[1] = 0;
1398         hdr->dlength[2] = 0;
1399         hdr->hlength = 0;
1400         hdr->itt = io_task->libiscsi_itt;
1401         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1402 }
1403
1404 static void
1405 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1406                  struct iscsi_task *task,
1407                  struct common_sol_cqe *csol_cqe)
1408 {
1409         struct iscsi_tm_rsp *hdr;
1410         struct iscsi_conn *conn = beiscsi_conn->conn;
1411         struct beiscsi_io_task *io_task = task->dd_data;
1412
1413         hdr = (struct iscsi_tm_rsp *)task->hdr;
1414         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1415         hdr->flags = csol_cqe->i_flags;
1416         hdr->response = csol_cqe->i_resp;
1417         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1418         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1419                                      csol_cqe->cmd_wnd - 1);
1420
1421         hdr->itt = io_task->libiscsi_itt;
1422         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1423 }
1424
1425 static void
1426 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1427                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1428 {
1429         struct hwi_wrb_context *pwrb_context;
1430         struct wrb_handle *pwrb_handle = NULL;
1431         struct hwi_controller *phwi_ctrlr;
1432         struct iscsi_task *task;
1433         struct beiscsi_io_task *io_task;
1434         uint16_t wrb_index, cid, cri_index;
1435
1436         phwi_ctrlr = phba->phwi_ctrlr;
1437         if (is_chip_be2_be3r(phba)) {
1438                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1439                                           wrb_idx, psol);
1440                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1441                                     cid, psol);
1442         } else {
1443                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1444                                           wrb_idx, psol);
1445                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1446                                     cid, psol);
1447         }
1448
1449         cri_index = BE_GET_CRI_FROM_CID(cid);
1450         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1451         pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1452         task = pwrb_handle->pio_handle;
1453
1454         io_task = task->dd_data;
1455         memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
1456         iscsi_put_task(task);
1457 }
1458
1459 static void
1460 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1461                         struct iscsi_task *task,
1462                         struct common_sol_cqe *csol_cqe)
1463 {
1464         struct iscsi_nopin *hdr;
1465         struct iscsi_conn *conn = beiscsi_conn->conn;
1466         struct beiscsi_io_task *io_task = task->dd_data;
1467
1468         hdr = (struct iscsi_nopin *)task->hdr;
1469         hdr->flags = csol_cqe->i_flags;
1470         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1471         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1472                                      csol_cqe->cmd_wnd - 1);
1473
1474         hdr->opcode = ISCSI_OP_NOOP_IN;
1475         hdr->itt = io_task->libiscsi_itt;
1476         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1477 }
1478
1479 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1480                 struct sol_cqe *psol,
1481                 struct common_sol_cqe *csol_cqe)
1482 {
1483         if (is_chip_be2_be3r(phba)) {
1484                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1485                                                     i_exp_cmd_sn, psol);
1486                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1487                                                   i_res_cnt, psol);
1488                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1489                                                   i_cmd_wnd, psol);
1490                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1491                                                     wrb_index, psol);
1492                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1493                                               cid, psol);
1494                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1495                                                  hw_sts, psol);
1496                 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1497                                                  i_resp, psol);
1498                 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1499                                                 i_sts, psol);
1500                 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1501                                                   i_flags, psol);
1502         } else {
1503                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1504                                                     i_exp_cmd_sn, psol);
1505                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1506                                                   i_res_cnt, psol);
1507                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1508                                                     wrb_index, psol);
1509                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1510                                               cid, psol);
1511                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1512                                                  hw_sts, psol);
1513                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1514                                                   i_cmd_wnd, psol);
1515                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1516                                   cmd_cmpl, psol))
1517                         csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1518                                                         i_sts, psol);
1519                 else
1520                         csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1521                                                          i_sts, psol);
1522                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1523                                   u, psol))
1524                         csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1525
1526                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1527                                   o, psol))
1528                         csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
1529         }
1530 }
1531
1532
1533 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1534                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1535 {
1536         struct hwi_wrb_context *pwrb_context;
1537         struct wrb_handle *pwrb_handle;
1538         struct iscsi_wrb *pwrb = NULL;
1539         struct hwi_controller *phwi_ctrlr;
1540         struct iscsi_task *task;
1541         unsigned int type;
1542         struct iscsi_conn *conn = beiscsi_conn->conn;
1543         struct iscsi_session *session = conn->session;
1544         struct common_sol_cqe csol_cqe = {0};
1545         uint16_t cri_index = 0;
1546
1547         phwi_ctrlr = phba->phwi_ctrlr;
1548
1549         /* Copy the elements to a common structure */
1550         adapter_get_sol_cqe(phba, psol, &csol_cqe);
1551
1552         cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1553         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1554
1555         pwrb_handle = pwrb_context->pwrb_handle_basestd[
1556                       csol_cqe.wrb_index];
1557
1558         task = pwrb_handle->pio_handle;
1559         pwrb = pwrb_handle->pwrb;
1560         type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1561
1562         spin_lock_bh(&session->back_lock);
1563         switch (type) {
1564         case HWH_TYPE_IO:
1565         case HWH_TYPE_IO_RD:
1566                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1567                      ISCSI_OP_NOOP_OUT)
1568                         be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1569                 else
1570                         be_complete_io(beiscsi_conn, task, &csol_cqe);
1571                 break;
1572
1573         case HWH_TYPE_LOGOUT:
1574                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1575                         be_complete_logout(beiscsi_conn, task, &csol_cqe);
1576                 else
1577                         be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1578                 break;
1579
1580         case HWH_TYPE_LOGIN:
1581                 beiscsi_log(phba, KERN_ERR,
1582                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1583                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1584                             " hwi_complete_cmd- Solicited path\n");
1585                 break;
1586
1587         case HWH_TYPE_NOP:
1588                 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1589                 break;
1590
1591         default:
1592                 beiscsi_log(phba, KERN_WARNING,
1593                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1594                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1595                             "wrb_index 0x%x CID 0x%x\n", type,
1596                             csol_cqe.wrb_index,
1597                             csol_cqe.cid);
1598                 break;
1599         }
1600
1601         spin_unlock_bh(&session->back_lock);
1602 }
1603
1604 static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1605                                           *pasync_ctx, unsigned int is_header,
1606                                           unsigned int host_write_ptr)
1607 {
1608         if (is_header)
1609                 return &pasync_ctx->async_entry[host_write_ptr].
1610                     header_busy_list;
1611         else
1612                 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1613 }
1614
1615 static struct async_pdu_handle *
1616 hwi_get_async_handle(struct beiscsi_hba *phba,
1617                      struct beiscsi_conn *beiscsi_conn,
1618                      struct hwi_async_pdu_context *pasync_ctx,
1619                      struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1620 {
1621         struct be_bus_address phys_addr;
1622         struct list_head *pbusy_list;
1623         struct async_pdu_handle *pasync_handle = NULL;
1624         unsigned char is_header = 0;
1625         unsigned int index, dpl;
1626
1627         if (is_chip_be2_be3r(phba)) {
1628                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1629                                     dpl, pdpdu_cqe);
1630                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1631                                       index, pdpdu_cqe);
1632         } else {
1633                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1634                                     dpl, pdpdu_cqe);
1635                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1636                                       index, pdpdu_cqe);
1637         }
1638
1639         phys_addr.u.a32.address_lo =
1640                 (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1641                                         db_addr_lo) / 32] - dpl);
1642         phys_addr.u.a32.address_hi =
1643                 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1644                                        db_addr_hi) / 32];
1645
1646         phys_addr.u.a64.address =
1647                         *((unsigned long long *)(&phys_addr.u.a64.address));
1648
1649         switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1650                         & PDUCQE_CODE_MASK) {
1651         case UNSOL_HDR_NOTIFY:
1652                 is_header = 1;
1653
1654                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1655                                                       is_header, index);
1656                 break;
1657         case UNSOL_DATA_NOTIFY:
1658                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1659                                                       is_header, index);
1660                 break;
1661         default:
1662                 pbusy_list = NULL;
1663                 beiscsi_log(phba, KERN_WARNING,
1664                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1665                             "BM_%d : Unexpected code=%d\n",
1666                             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1667                             code) / 32] & PDUCQE_CODE_MASK);
1668                 return NULL;
1669         }
1670
1671         WARN_ON(list_empty(pbusy_list));
1672         list_for_each_entry(pasync_handle, pbusy_list, link) {
1673                 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1674                         break;
1675         }
1676
1677         WARN_ON(!pasync_handle);
1678
1679         pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
1680                              beiscsi_conn->beiscsi_conn_cid);
1681         pasync_handle->is_header = is_header;
1682         pasync_handle->buffer_len = dpl;
1683         *pcq_index = index;
1684
1685         return pasync_handle;
1686 }
1687
1688 static unsigned int
1689 hwi_update_async_writables(struct beiscsi_hba *phba,
1690                             struct hwi_async_pdu_context *pasync_ctx,
1691                             unsigned int is_header, unsigned int cq_index)
1692 {
1693         struct list_head *pbusy_list;
1694         struct async_pdu_handle *pasync_handle;
1695         unsigned int num_entries, writables = 0;
1696         unsigned int *pep_read_ptr, *pwritables;
1697
1698         num_entries = pasync_ctx->num_entries;
1699         if (is_header) {
1700                 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1701                 pwritables = &pasync_ctx->async_header.writables;
1702         } else {
1703                 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1704                 pwritables = &pasync_ctx->async_data.writables;
1705         }
1706
1707         while ((*pep_read_ptr) != cq_index) {
1708                 (*pep_read_ptr)++;
1709                 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1710
1711                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1712                                                      *pep_read_ptr);
1713                 if (writables == 0)
1714                         WARN_ON(list_empty(pbusy_list));
1715
1716                 if (!list_empty(pbusy_list)) {
1717                         pasync_handle = list_entry(pbusy_list->next,
1718                                                    struct async_pdu_handle,
1719                                                    link);
1720                         WARN_ON(!pasync_handle);
1721                         pasync_handle->consumed = 1;
1722                 }
1723
1724                 writables++;
1725         }
1726
1727         if (!writables) {
1728                 beiscsi_log(phba, KERN_ERR,
1729                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1730                             "BM_%d : Duplicate notification received - index 0x%x!!\n",
1731                             cq_index);
1732                 WARN_ON(1);
1733         }
1734
1735         *pwritables = *pwritables + writables;
1736         return 0;
1737 }
1738
1739 static void hwi_free_async_msg(struct beiscsi_hba *phba,
1740                                struct hwi_async_pdu_context *pasync_ctx,
1741                                unsigned int cri)
1742 {
1743         struct async_pdu_handle *pasync_handle, *tmp_handle;
1744         struct list_head *plist;
1745
1746         plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
1747         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1748                 list_del(&pasync_handle->link);
1749
1750                 if (pasync_handle->is_header) {
1751                         list_add_tail(&pasync_handle->link,
1752                                       &pasync_ctx->async_header.free_list);
1753                         pasync_ctx->async_header.free_entries++;
1754                 } else {
1755                         list_add_tail(&pasync_handle->link,
1756                                       &pasync_ctx->async_data.free_list);
1757                         pasync_ctx->async_data.free_entries++;
1758                 }
1759         }
1760
1761         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1762         pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1763         pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1764 }
1765
1766 static struct phys_addr *
1767 hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1768                      unsigned int is_header, unsigned int host_write_ptr)
1769 {
1770         struct phys_addr *pasync_sge = NULL;
1771
1772         if (is_header)
1773                 pasync_sge = pasync_ctx->async_header.ring_base;
1774         else
1775                 pasync_sge = pasync_ctx->async_data.ring_base;
1776
1777         return pasync_sge + host_write_ptr;
1778 }
1779
1780 static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1781                                     unsigned int is_header, uint8_t ulp_num)
1782 {
1783         struct hwi_controller *phwi_ctrlr;
1784         struct hwi_async_pdu_context *pasync_ctx;
1785         struct async_pdu_handle *pasync_handle;
1786         struct list_head *pfree_link, *pbusy_list;
1787         struct phys_addr *pasync_sge;
1788         unsigned int ring_id, num_entries;
1789         unsigned int host_write_num, doorbell_offset;
1790         unsigned int writables;
1791         unsigned int i = 0;
1792         u32 doorbell = 0;
1793
1794         phwi_ctrlr = phba->phwi_ctrlr;
1795         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1796         num_entries = pasync_ctx->num_entries;
1797
1798         if (is_header) {
1799                 writables = min(pasync_ctx->async_header.writables,
1800                                 pasync_ctx->async_header.free_entries);
1801                 pfree_link = pasync_ctx->async_header.free_list.next;
1802                 host_write_num = pasync_ctx->async_header.host_write_ptr;
1803                 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1804                 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1805                                   doorbell_offset;
1806         } else {
1807                 writables = min(pasync_ctx->async_data.writables,
1808                                 pasync_ctx->async_data.free_entries);
1809                 pfree_link = pasync_ctx->async_data.free_list.next;
1810                 host_write_num = pasync_ctx->async_data.host_write_ptr;
1811                 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1812                 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1813                                   doorbell_offset;
1814         }
1815
1816         writables = (writables / 8) * 8;
1817         if (writables) {
1818                 for (i = 0; i < writables; i++) {
1819                         pbusy_list =
1820                             hwi_get_async_busy_list(pasync_ctx, is_header,
1821                                                     host_write_num);
1822                         pasync_handle =
1823                             list_entry(pfree_link, struct async_pdu_handle,
1824                                                                 link);
1825                         WARN_ON(!pasync_handle);
1826                         pasync_handle->consumed = 0;
1827
1828                         pfree_link = pfree_link->next;
1829
1830                         pasync_sge = hwi_get_ring_address(pasync_ctx,
1831                                                 is_header, host_write_num);
1832
1833                         pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1834                         pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1835
1836                         list_move(&pasync_handle->link, pbusy_list);
1837
1838                         host_write_num++;
1839                         host_write_num = host_write_num % num_entries;
1840                 }
1841
1842                 if (is_header) {
1843                         pasync_ctx->async_header.host_write_ptr =
1844                                                         host_write_num;
1845                         pasync_ctx->async_header.free_entries -= writables;
1846                         pasync_ctx->async_header.writables -= writables;
1847                         pasync_ctx->async_header.busy_entries += writables;
1848                 } else {
1849                         pasync_ctx->async_data.host_write_ptr = host_write_num;
1850                         pasync_ctx->async_data.free_entries -= writables;
1851                         pasync_ctx->async_data.writables -= writables;
1852                         pasync_ctx->async_data.busy_entries += writables;
1853                 }
1854
1855                 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1856                 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1857                 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1858                 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1859                                         << DB_DEF_PDU_CQPROC_SHIFT;
1860
1861                 iowrite32(doorbell, phba->db_va + doorbell_offset);
1862         }
1863 }
1864
1865 static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1866                                          struct beiscsi_conn *beiscsi_conn,
1867                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1868 {
1869         struct hwi_controller *phwi_ctrlr;
1870         struct hwi_async_pdu_context *pasync_ctx;
1871         struct async_pdu_handle *pasync_handle = NULL;
1872         unsigned int cq_index = -1;
1873         uint16_t cri_index = BE_GET_CRI_FROM_CID(
1874                              beiscsi_conn->beiscsi_conn_cid);
1875
1876         phwi_ctrlr = phba->phwi_ctrlr;
1877         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1878                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1879                      cri_index));
1880
1881         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1882                                              pdpdu_cqe, &cq_index);
1883         BUG_ON(pasync_handle->is_header != 0);
1884         if (pasync_handle->consumed == 0)
1885                 hwi_update_async_writables(phba, pasync_ctx,
1886                                            pasync_handle->is_header, cq_index);
1887
1888         hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
1889         hwi_post_async_buffers(phba, pasync_handle->is_header,
1890                                BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1891                                cri_index));
1892 }
1893
1894 static unsigned int
1895 hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1896                   struct beiscsi_hba *phba,
1897                   struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1898 {
1899         struct list_head *plist;
1900         struct async_pdu_handle *pasync_handle;
1901         void *phdr = NULL;
1902         unsigned int hdr_len = 0, buf_len = 0;
1903         unsigned int status, index = 0, offset = 0;
1904         void *pfirst_buffer = NULL;
1905         unsigned int num_buf = 0;
1906
1907         plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1908
1909         list_for_each_entry(pasync_handle, plist, link) {
1910                 if (index == 0) {
1911                         phdr = pasync_handle->pbuffer;
1912                         hdr_len = pasync_handle->buffer_len;
1913                 } else {
1914                         buf_len = pasync_handle->buffer_len;
1915                         if (!num_buf) {
1916                                 pfirst_buffer = pasync_handle->pbuffer;
1917                                 num_buf++;
1918                         }
1919                         memcpy(pfirst_buffer + offset,
1920                                pasync_handle->pbuffer, buf_len);
1921                         offset += buf_len;
1922                 }
1923                 index++;
1924         }
1925
1926         status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1927                                             phdr, hdr_len, pfirst_buffer,
1928                                             offset);
1929
1930         hwi_free_async_msg(phba, pasync_ctx, cri);
1931         return 0;
1932 }
1933
1934 static unsigned int
1935 hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1936                      struct beiscsi_hba *phba,
1937                      struct async_pdu_handle *pasync_handle)
1938 {
1939         struct hwi_async_pdu_context *pasync_ctx;
1940         struct hwi_controller *phwi_ctrlr;
1941         unsigned int bytes_needed = 0, status = 0;
1942         unsigned short cri = pasync_handle->cri;
1943         struct pdu_base *ppdu;
1944
1945         phwi_ctrlr = phba->phwi_ctrlr;
1946         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1947                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1948                      BE_GET_CRI_FROM_CID(beiscsi_conn->
1949                                  beiscsi_conn_cid)));
1950
1951         list_del(&pasync_handle->link);
1952         if (pasync_handle->is_header) {
1953                 pasync_ctx->async_header.busy_entries--;
1954                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1955                         hwi_free_async_msg(phba, pasync_ctx, cri);
1956                         BUG();
1957                 }
1958
1959                 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1960                 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1961                 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1962                                 (unsigned short)pasync_handle->buffer_len;
1963                 list_add_tail(&pasync_handle->link,
1964                               &pasync_ctx->async_entry[cri].wait_queue.list);
1965
1966                 ppdu = pasync_handle->pbuffer;
1967                 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1968                         data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1969                         0xFFFF0000) | ((be16_to_cpu((ppdu->
1970                         dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1971                         & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1972
1973                 if (status == 0) {
1974                         pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1975                             bytes_needed;
1976
1977                         if (bytes_needed == 0)
1978                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1979                                                            pasync_ctx, cri);
1980                 }
1981         } else {
1982                 pasync_ctx->async_data.busy_entries--;
1983                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1984                         list_add_tail(&pasync_handle->link,
1985                                       &pasync_ctx->async_entry[cri].wait_queue.
1986                                       list);
1987                         pasync_ctx->async_entry[cri].wait_queue.
1988                                 bytes_received +=
1989                                 (unsigned short)pasync_handle->buffer_len;
1990
1991                         if (pasync_ctx->async_entry[cri].wait_queue.
1992                             bytes_received >=
1993                             pasync_ctx->async_entry[cri].wait_queue.
1994                             bytes_needed)
1995                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1996                                                            pasync_ctx, cri);
1997                 }
1998         }
1999         return status;
2000 }
2001
2002 static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
2003                                          struct beiscsi_hba *phba,
2004                                          struct i_t_dpdu_cqe *pdpdu_cqe)
2005 {
2006         struct hwi_controller *phwi_ctrlr;
2007         struct hwi_async_pdu_context *pasync_ctx;
2008         struct async_pdu_handle *pasync_handle = NULL;
2009         unsigned int cq_index = -1;
2010         uint16_t cri_index = BE_GET_CRI_FROM_CID(
2011                              beiscsi_conn->beiscsi_conn_cid);
2012
2013         phwi_ctrlr = phba->phwi_ctrlr;
2014         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
2015                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
2016                      cri_index));
2017
2018         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
2019                                              pdpdu_cqe, &cq_index);
2020
2021         if (pasync_handle->consumed == 0)
2022                 hwi_update_async_writables(phba, pasync_ctx,
2023                                            pasync_handle->is_header, cq_index);
2024
2025         hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
2026         hwi_post_async_buffers(phba, pasync_handle->is_header,
2027                                BEISCSI_GET_ULP_FROM_CRI(
2028                                phwi_ctrlr, cri_index));
2029 }
2030
2031 static void  beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
2032 {
2033         struct be_queue_info *mcc_cq;
2034         struct  be_mcc_compl *mcc_compl;
2035         unsigned int num_processed = 0;
2036
2037         mcc_cq = &phba->ctrl.mcc_obj.cq;
2038         mcc_compl = queue_tail_node(mcc_cq);
2039         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2040         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
2041
2042                 if (num_processed >= 32) {
2043                         hwi_ring_cq_db(phba, mcc_cq->id,
2044                                         num_processed, 0);
2045                         num_processed = 0;
2046                 }
2047                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
2048                         beiscsi_process_async_event(phba, mcc_compl);
2049                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
2050                         be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
2051                         atomic_dec(&phba->ctrl.mcc_obj.q.used);
2052                 }
2053
2054                 mcc_compl->flags = 0;
2055                 queue_tail_inc(mcc_cq);
2056                 mcc_compl = queue_tail_node(mcc_cq);
2057                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2058                 num_processed++;
2059         }
2060
2061         if (num_processed > 0)
2062                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1);
2063
2064 }
2065
2066 /**
2067  * beiscsi_process_cq()- Process the Completion Queue
2068  * @pbe_eq: Event Q on which the Completion has come
2069  * @budget: Max number of events to processed
2070  *
2071  * return
2072  *     Number of Completion Entries processed.
2073  **/
2074 unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq, int budget)
2075 {
2076         struct be_queue_info *cq;
2077         struct sol_cqe *sol;
2078         struct dmsg_cqe *dmsg;
2079         unsigned int total = 0;
2080         unsigned int num_processed = 0;
2081         unsigned short code = 0, cid = 0;
2082         uint16_t cri_index = 0;
2083         struct beiscsi_conn *beiscsi_conn;
2084         struct beiscsi_endpoint *beiscsi_ep;
2085         struct iscsi_endpoint *ep;
2086         struct beiscsi_hba *phba;
2087
2088         cq = pbe_eq->cq;
2089         sol = queue_tail_node(cq);
2090         phba = pbe_eq->phba;
2091
2092         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
2093                CQE_VALID_MASK) {
2094                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
2095
2096                  code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
2097                          32] & CQE_CODE_MASK);
2098
2099                  /* Get the CID */
2100                 if (is_chip_be2_be3r(phba)) {
2101                         cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
2102                 } else {
2103                         if ((code == DRIVERMSG_NOTIFY) ||
2104                             (code == UNSOL_HDR_NOTIFY) ||
2105                             (code == UNSOL_DATA_NOTIFY))
2106                                 cid = AMAP_GET_BITS(
2107                                                     struct amap_i_t_dpdu_cqe_v2,
2108                                                     cid, sol);
2109                          else
2110                                  cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
2111                                                      cid, sol);
2112                 }
2113
2114                 cri_index = BE_GET_CRI_FROM_CID(cid);
2115                 ep = phba->ep_array[cri_index];
2116
2117                 if (ep == NULL) {
2118                         /* connection has already been freed
2119                          * just move on to next one
2120                          */
2121                         beiscsi_log(phba, KERN_WARNING,
2122                                     BEISCSI_LOG_INIT,
2123                                     "BM_%d : proc cqe of disconn ep: cid %d\n",
2124                                     cid);
2125                         goto proc_next_cqe;
2126                 }
2127
2128                 beiscsi_ep = ep->dd_data;
2129                 beiscsi_conn = beiscsi_ep->conn;
2130
2131                 /* replenish cq */
2132                 if (num_processed == 32) {
2133                         hwi_ring_cq_db(phba, cq->id, 32, 0);
2134                         num_processed = 0;
2135                 }
2136                 total++;
2137
2138                 switch (code) {
2139                 case SOL_CMD_COMPLETE:
2140                         hwi_complete_cmd(beiscsi_conn, phba, sol);
2141                         break;
2142                 case DRIVERMSG_NOTIFY:
2143                         beiscsi_log(phba, KERN_INFO,
2144                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2145                                     "BM_%d : Received %s[%d] on CID : %d\n",
2146                                     cqe_desc[code], code, cid);
2147
2148                         dmsg = (struct dmsg_cqe *)sol;
2149                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2150                         break;
2151                 case UNSOL_HDR_NOTIFY:
2152                         beiscsi_log(phba, KERN_INFO,
2153                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2154                                     "BM_%d : Received %s[%d] on CID : %d\n",
2155                                     cqe_desc[code], code, cid);
2156
2157                         spin_lock_bh(&phba->async_pdu_lock);
2158                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2159                                              (struct i_t_dpdu_cqe *)sol);
2160                         spin_unlock_bh(&phba->async_pdu_lock);
2161                         break;
2162                 case UNSOL_DATA_NOTIFY:
2163                         beiscsi_log(phba, KERN_INFO,
2164                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2165                                     "BM_%d : Received %s[%d] on CID : %d\n",
2166                                     cqe_desc[code], code, cid);
2167
2168                         spin_lock_bh(&phba->async_pdu_lock);
2169                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2170                                              (struct i_t_dpdu_cqe *)sol);
2171                         spin_unlock_bh(&phba->async_pdu_lock);
2172                         break;
2173                 case CXN_INVALIDATE_INDEX_NOTIFY:
2174                 case CMD_INVALIDATED_NOTIFY:
2175                 case CXN_INVALIDATE_NOTIFY:
2176                         beiscsi_log(phba, KERN_ERR,
2177                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2178                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
2179                                     cqe_desc[code], code, cid);
2180                         break;
2181                 case CXN_KILLED_HDR_DIGEST_ERR:
2182                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2183                         beiscsi_log(phba, KERN_ERR,
2184                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2185                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2186                                     cqe_desc[code], code,  cid);
2187                         break;
2188                 case CMD_KILLED_INVALID_STATSN_RCVD:
2189                 case CMD_KILLED_INVALID_R2T_RCVD:
2190                 case CMD_CXN_KILLED_LUN_INVALID:
2191                 case CMD_CXN_KILLED_ICD_INVALID:
2192                 case CMD_CXN_KILLED_ITT_INVALID:
2193                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2194                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2195                         beiscsi_log(phba, KERN_ERR,
2196                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2197                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2198                                     cqe_desc[code], code,  cid);
2199                         break;
2200                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2201                         beiscsi_log(phba, KERN_ERR,
2202                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2203                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
2204                                     cqe_desc[code], code, cid);
2205                         spin_lock_bh(&phba->async_pdu_lock);
2206                         hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2207                                              (struct i_t_dpdu_cqe *) sol);
2208                         spin_unlock_bh(&phba->async_pdu_lock);
2209                         break;
2210                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2211                 case CXN_KILLED_BURST_LEN_MISMATCH:
2212                 case CXN_KILLED_AHS_RCVD:
2213                 case CXN_KILLED_UNKNOWN_HDR:
2214                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2215                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2216                 case CXN_KILLED_TIMED_OUT:
2217                 case CXN_KILLED_FIN_RCVD:
2218                 case CXN_KILLED_RST_SENT:
2219                 case CXN_KILLED_RST_RCVD:
2220                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2221                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2222                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2223                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2224                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2225                         beiscsi_log(phba, KERN_ERR,
2226                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2227                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2228                                     cqe_desc[code], code, cid);
2229                         if (beiscsi_conn)
2230                                 iscsi_conn_failure(beiscsi_conn->conn,
2231                                                    ISCSI_ERR_CONN_FAILED);
2232                         break;
2233                 default:
2234                         beiscsi_log(phba, KERN_ERR,
2235                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2236                                     "BM_%d : Invalid CQE Event Received Code : %d"
2237                                     "CID 0x%x...\n",
2238                                     code, cid);
2239                         break;
2240                 }
2241
2242 proc_next_cqe:
2243                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2244                 queue_tail_inc(cq);
2245                 sol = queue_tail_node(cq);
2246                 num_processed++;
2247                 if (total == budget)
2248                         break;
2249         }
2250
2251         hwi_ring_cq_db(phba, cq->id, num_processed, 1);
2252         return total;
2253 }
2254
2255 void beiscsi_process_all_cqs(struct work_struct *work)
2256 {
2257         unsigned long flags;
2258         struct hwi_controller *phwi_ctrlr;
2259         struct hwi_context_memory *phwi_context;
2260         struct beiscsi_hba *phba;
2261         struct be_eq_obj *pbe_eq =
2262             container_of(work, struct be_eq_obj, work_cqs);
2263
2264         phba = pbe_eq->phba;
2265         phwi_ctrlr = phba->phwi_ctrlr;
2266         phwi_context = phwi_ctrlr->phwi_ctxt;
2267
2268         if (pbe_eq->todo_mcc_cq) {
2269                 spin_lock_irqsave(&phba->isr_lock, flags);
2270                 pbe_eq->todo_mcc_cq = false;
2271                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2272                 beiscsi_process_mcc_isr(phba);
2273         }
2274
2275         if (pbe_eq->todo_cq) {
2276                 spin_lock_irqsave(&phba->isr_lock, flags);
2277                 pbe_eq->todo_cq = false;
2278                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2279                 beiscsi_process_cq(pbe_eq, BE2_MAX_NUM_CQ_PROC);
2280         }
2281
2282         /* rearm EQ for further interrupts */
2283         hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2284 }
2285
2286 static int be_iopoll(struct irq_poll *iop, int budget)
2287 {
2288         unsigned int ret, num_eq_processed;
2289         struct beiscsi_hba *phba;
2290         struct be_eq_obj *pbe_eq;
2291         struct be_eq_entry *eqe = NULL;
2292         struct be_queue_info *eq;
2293
2294         num_eq_processed = 0;
2295         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2296         phba = pbe_eq->phba;
2297         eq = &pbe_eq->q;
2298         eqe = queue_tail_node(eq);
2299
2300         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] &
2301                         EQE_VALID_MASK) {
2302                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
2303                 queue_tail_inc(eq);
2304                 eqe = queue_tail_node(eq);
2305                 num_eq_processed++;
2306         }
2307
2308         hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
2309
2310         ret = beiscsi_process_cq(pbe_eq, budget);
2311         pbe_eq->cq_count += ret;
2312         if (ret < budget) {
2313                 irq_poll_complete(iop);
2314                 beiscsi_log(phba, KERN_INFO,
2315                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2316                             "BM_%d : rearm pbe_eq->q.id =%d ret %d\n",
2317                             pbe_eq->q.id, ret);
2318                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2319         }
2320         return ret;
2321 }
2322
2323 static void
2324 hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2325                   unsigned int num_sg, struct beiscsi_io_task *io_task)
2326 {
2327         struct iscsi_sge *psgl;
2328         unsigned int sg_len, index;
2329         unsigned int sge_len = 0;
2330         unsigned long long addr;
2331         struct scatterlist *l_sg;
2332         unsigned int offset;
2333
2334         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2335                       io_task->bhs_pa.u.a32.address_lo);
2336         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2337                       io_task->bhs_pa.u.a32.address_hi);
2338
2339         l_sg = sg;
2340         for (index = 0; (index < num_sg) && (index < 2); index++,
2341                         sg = sg_next(sg)) {
2342                 if (index == 0) {
2343                         sg_len = sg_dma_len(sg);
2344                         addr = (u64) sg_dma_address(sg);
2345                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2346                                       sge0_addr_lo, pwrb,
2347                                       lower_32_bits(addr));
2348                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2349                                       sge0_addr_hi, pwrb,
2350                                       upper_32_bits(addr));
2351                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2352                                       sge0_len, pwrb,
2353                                       sg_len);
2354                         sge_len = sg_len;
2355                 } else {
2356                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2357                                       pwrb, sge_len);
2358                         sg_len = sg_dma_len(sg);
2359                         addr = (u64) sg_dma_address(sg);
2360                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2361                                       sge1_addr_lo, pwrb,
2362                                       lower_32_bits(addr));
2363                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2364                                       sge1_addr_hi, pwrb,
2365                                       upper_32_bits(addr));
2366                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2367                                       sge1_len, pwrb,
2368                                       sg_len);
2369                 }
2370         }
2371         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2372         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2373
2374         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2375
2376         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2377                       io_task->bhs_pa.u.a32.address_hi);
2378         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2379                       io_task->bhs_pa.u.a32.address_lo);
2380
2381         if (num_sg == 1) {
2382                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2383                               1);
2384                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2385                               0);
2386         } else if (num_sg == 2) {
2387                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2388                               0);
2389                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2390                               1);
2391         } else {
2392                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2393                               0);
2394                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2395                               0);
2396         }
2397
2398         sg = l_sg;
2399         psgl++;
2400         psgl++;
2401         offset = 0;
2402         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2403                 sg_len = sg_dma_len(sg);
2404                 addr = (u64) sg_dma_address(sg);
2405                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2406                               lower_32_bits(addr));
2407                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2408                               upper_32_bits(addr));
2409                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2410                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2411                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2412                 offset += sg_len;
2413         }
2414         psgl--;
2415         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2416 }
2417
2418 static void
2419 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2420               unsigned int num_sg, struct beiscsi_io_task *io_task)
2421 {
2422         struct iscsi_sge *psgl;
2423         unsigned int sg_len, index;
2424         unsigned int sge_len = 0;
2425         unsigned long long addr;
2426         struct scatterlist *l_sg;
2427         unsigned int offset;
2428
2429         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2430                                       io_task->bhs_pa.u.a32.address_lo);
2431         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2432                                       io_task->bhs_pa.u.a32.address_hi);
2433
2434         l_sg = sg;
2435         for (index = 0; (index < num_sg) && (index < 2); index++,
2436                                                          sg = sg_next(sg)) {
2437                 if (index == 0) {
2438                         sg_len = sg_dma_len(sg);
2439                         addr = (u64) sg_dma_address(sg);
2440                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2441                                                 ((u32)(addr & 0xFFFFFFFF)));
2442                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2443                                                         ((u32)(addr >> 32)));
2444                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2445                                                         sg_len);
2446                         sge_len = sg_len;
2447                 } else {
2448                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2449                                                         pwrb, sge_len);
2450                         sg_len = sg_dma_len(sg);
2451                         addr = (u64) sg_dma_address(sg);
2452                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2453                                                 ((u32)(addr & 0xFFFFFFFF)));
2454                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2455                                                         ((u32)(addr >> 32)));
2456                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2457                                                         sg_len);
2458                 }
2459         }
2460         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2461         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2462
2463         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2464
2465         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2466                         io_task->bhs_pa.u.a32.address_hi);
2467         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2468                         io_task->bhs_pa.u.a32.address_lo);
2469
2470         if (num_sg == 1) {
2471                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2472                                                                 1);
2473                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2474                                                                 0);
2475         } else if (num_sg == 2) {
2476                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2477                                                                 0);
2478                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2479                                                                 1);
2480         } else {
2481                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2482                                                                 0);
2483                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2484                                                                 0);
2485         }
2486         sg = l_sg;
2487         psgl++;
2488         psgl++;
2489         offset = 0;
2490         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2491                 sg_len = sg_dma_len(sg);
2492                 addr = (u64) sg_dma_address(sg);
2493                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2494                                                 (addr & 0xFFFFFFFF));
2495                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2496                                                 (addr >> 32));
2497                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2498                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2499                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2500                 offset += sg_len;
2501         }
2502         psgl--;
2503         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2504 }
2505
2506 /**
2507  * hwi_write_buffer()- Populate the WRB with task info
2508  * @pwrb: ptr to the WRB entry
2509  * @task: iscsi task which is to be executed
2510  **/
2511 static int hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2512 {
2513         struct iscsi_sge *psgl;
2514         struct beiscsi_io_task *io_task = task->dd_data;
2515         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2516         struct beiscsi_hba *phba = beiscsi_conn->phba;
2517         uint8_t dsp_value = 0;
2518
2519         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2520         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2521                                 io_task->bhs_pa.u.a32.address_lo);
2522         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2523                                 io_task->bhs_pa.u.a32.address_hi);
2524
2525         if (task->data) {
2526
2527                 /* Check for the data_count */
2528                 dsp_value = (task->data_count) ? 1 : 0;
2529
2530                 if (is_chip_be2_be3r(phba))
2531                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2532                                       pwrb, dsp_value);
2533                 else
2534                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2535                                       pwrb, dsp_value);
2536
2537                 /* Map addr only if there is data_count */
2538                 if (dsp_value) {
2539                         io_task->mtask_addr = pci_map_single(phba->pcidev,
2540                                                              task->data,
2541                                                              task->data_count,
2542                                                              PCI_DMA_TODEVICE);
2543                         if (pci_dma_mapping_error(phba->pcidev,
2544                                                   io_task->mtask_addr))
2545                                 return -ENOMEM;
2546                         io_task->mtask_data_count = task->data_count;
2547                 } else
2548                         io_task->mtask_addr = 0;
2549
2550                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2551                               lower_32_bits(io_task->mtask_addr));
2552                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2553                               upper_32_bits(io_task->mtask_addr));
2554                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2555                                                 task->data_count);
2556
2557                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2558         } else {
2559                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2560                 io_task->mtask_addr = 0;
2561         }
2562
2563         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2564
2565         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2566
2567         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2568                       io_task->bhs_pa.u.a32.address_hi);
2569         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2570                       io_task->bhs_pa.u.a32.address_lo);
2571         if (task->data) {
2572                 psgl++;
2573                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2574                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2575                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2576                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2577                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2578                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2579
2580                 psgl++;
2581                 if (task->data) {
2582                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2583                                       lower_32_bits(io_task->mtask_addr));
2584                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2585                                       upper_32_bits(io_task->mtask_addr));
2586                 }
2587                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2588         }
2589         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2590         return 0;
2591 }
2592
2593 /**
2594  * beiscsi_find_mem_req()- Find mem needed
2595  * @phba: ptr to HBA struct
2596  **/
2597 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2598 {
2599         uint8_t mem_descr_index, ulp_num;
2600         unsigned int num_cq_pages, num_async_pdu_buf_pages;
2601         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2602         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2603
2604         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2605                                       sizeof(struct sol_cqe));
2606
2607         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2608
2609         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2610                                                  BE_ISCSI_PDU_HEADER_SIZE;
2611         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2612                                             sizeof(struct hwi_context_memory);
2613
2614
2615         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2616             * (phba->params.wrbs_per_cxn)
2617             * phba->params.cxns_per_ctrl;
2618         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2619                                  (phba->params.wrbs_per_cxn);
2620         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2621                                 phba->params.cxns_per_ctrl);
2622
2623         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2624                 phba->params.icds_per_ctrl;
2625         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2626                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2627         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2628                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2629
2630                         num_async_pdu_buf_sgl_pages =
2631                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2632                                                phba, ulp_num) *
2633                                                sizeof(struct phys_addr));
2634
2635                         num_async_pdu_buf_pages =
2636                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2637                                                phba, ulp_num) *
2638                                                phba->params.defpdu_hdr_sz);
2639
2640                         num_async_pdu_data_pages =
2641                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2642                                                phba, ulp_num) *
2643                                                phba->params.defpdu_data_sz);
2644
2645                         num_async_pdu_data_sgl_pages =
2646                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2647                                                phba, ulp_num) *
2648                                                sizeof(struct phys_addr));
2649
2650                         mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2651                                           (ulp_num * MEM_DESCR_OFFSET));
2652                         phba->mem_req[mem_descr_index] =
2653                                         BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2654                                         BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2655
2656                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2657                                           (ulp_num * MEM_DESCR_OFFSET));
2658                         phba->mem_req[mem_descr_index] =
2659                                           num_async_pdu_buf_pages *
2660                                           PAGE_SIZE;
2661
2662                         mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2663                                           (ulp_num * MEM_DESCR_OFFSET));
2664                         phba->mem_req[mem_descr_index] =
2665                                           num_async_pdu_data_pages *
2666                                           PAGE_SIZE;
2667
2668                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2669                                           (ulp_num * MEM_DESCR_OFFSET));
2670                         phba->mem_req[mem_descr_index] =
2671                                           num_async_pdu_buf_sgl_pages *
2672                                           PAGE_SIZE;
2673
2674                         mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2675                                           (ulp_num * MEM_DESCR_OFFSET));
2676                         phba->mem_req[mem_descr_index] =
2677                                           num_async_pdu_data_sgl_pages *
2678                                           PAGE_SIZE;
2679
2680                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2681                                           (ulp_num * MEM_DESCR_OFFSET));
2682                         phba->mem_req[mem_descr_index] =
2683                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2684                                           sizeof(struct async_pdu_handle);
2685
2686                         mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2687                                           (ulp_num * MEM_DESCR_OFFSET));
2688                         phba->mem_req[mem_descr_index] =
2689                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2690                                           sizeof(struct async_pdu_handle);
2691
2692                         mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2693                                           (ulp_num * MEM_DESCR_OFFSET));
2694                         phba->mem_req[mem_descr_index] =
2695                                           sizeof(struct hwi_async_pdu_context) +
2696                                          (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2697                                           sizeof(struct hwi_async_entry));
2698                 }
2699         }
2700 }
2701
2702 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2703 {
2704         dma_addr_t bus_add;
2705         struct hwi_controller *phwi_ctrlr;
2706         struct be_mem_descriptor *mem_descr;
2707         struct mem_array *mem_arr, *mem_arr_orig;
2708         unsigned int i, j, alloc_size, curr_alloc_size;
2709
2710         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2711         if (!phba->phwi_ctrlr)
2712                 return -ENOMEM;
2713
2714         /* Allocate memory for wrb_context */
2715         phwi_ctrlr = phba->phwi_ctrlr;
2716         phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2717                                           phba->params.cxns_per_ctrl,
2718                                           GFP_KERNEL);
2719         if (!phwi_ctrlr->wrb_context)
2720                 return -ENOMEM;
2721
2722         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2723                                  GFP_KERNEL);
2724         if (!phba->init_mem) {
2725                 kfree(phwi_ctrlr->wrb_context);
2726                 kfree(phba->phwi_ctrlr);
2727                 return -ENOMEM;
2728         }
2729
2730         mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2731                                GFP_KERNEL);
2732         if (!mem_arr_orig) {
2733                 kfree(phba->init_mem);
2734                 kfree(phwi_ctrlr->wrb_context);
2735                 kfree(phba->phwi_ctrlr);
2736                 return -ENOMEM;
2737         }
2738
2739         mem_descr = phba->init_mem;
2740         for (i = 0; i < SE_MEM_MAX; i++) {
2741                 if (!phba->mem_req[i]) {
2742                         mem_descr->mem_array = NULL;
2743                         mem_descr++;
2744                         continue;
2745                 }
2746
2747                 j = 0;
2748                 mem_arr = mem_arr_orig;
2749                 alloc_size = phba->mem_req[i];
2750                 memset(mem_arr, 0, sizeof(struct mem_array) *
2751                        BEISCSI_MAX_FRAGS_INIT);
2752                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2753                 do {
2754                         mem_arr->virtual_address = pci_alloc_consistent(
2755                                                         phba->pcidev,
2756                                                         curr_alloc_size,
2757                                                         &bus_add);
2758                         if (!mem_arr->virtual_address) {
2759                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2760                                         goto free_mem;
2761                                 if (curr_alloc_size -
2762                                         rounddown_pow_of_two(curr_alloc_size))
2763                                         curr_alloc_size = rounddown_pow_of_two
2764                                                              (curr_alloc_size);
2765                                 else
2766                                         curr_alloc_size = curr_alloc_size / 2;
2767                         } else {
2768                                 mem_arr->bus_address.u.
2769                                     a64.address = (__u64) bus_add;
2770                                 mem_arr->size = curr_alloc_size;
2771                                 alloc_size -= curr_alloc_size;
2772                                 curr_alloc_size = min(be_max_phys_size *
2773                                                       1024, alloc_size);
2774                                 j++;
2775                                 mem_arr++;
2776                         }
2777                 } while (alloc_size);
2778                 mem_descr->num_elements = j;
2779                 mem_descr->size_in_bytes = phba->mem_req[i];
2780                 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2781                                                GFP_KERNEL);
2782                 if (!mem_descr->mem_array)
2783                         goto free_mem;
2784
2785                 memcpy(mem_descr->mem_array, mem_arr_orig,
2786                        sizeof(struct mem_array) * j);
2787                 mem_descr++;
2788         }
2789         kfree(mem_arr_orig);
2790         return 0;
2791 free_mem:
2792         mem_descr->num_elements = j;
2793         while ((i) || (j)) {
2794                 for (j = mem_descr->num_elements; j > 0; j--) {
2795                         pci_free_consistent(phba->pcidev,
2796                                             mem_descr->mem_array[j - 1].size,
2797                                             mem_descr->mem_array[j - 1].
2798                                             virtual_address,
2799                                             (unsigned long)mem_descr->
2800                                             mem_array[j - 1].
2801                                             bus_address.u.a64.address);
2802                 }
2803                 if (i) {
2804                         i--;
2805                         kfree(mem_descr->mem_array);
2806                         mem_descr--;
2807                 }
2808         }
2809         kfree(mem_arr_orig);
2810         kfree(phba->init_mem);
2811         kfree(phba->phwi_ctrlr->wrb_context);
2812         kfree(phba->phwi_ctrlr);
2813         return -ENOMEM;
2814 }
2815
2816 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2817 {
2818         beiscsi_find_mem_req(phba);
2819         return beiscsi_alloc_mem(phba);
2820 }
2821
2822 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2823 {
2824         struct pdu_data_out *pdata_out;
2825         struct pdu_nop_out *pnop_out;
2826         struct be_mem_descriptor *mem_descr;
2827
2828         mem_descr = phba->init_mem;
2829         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2830         pdata_out =
2831             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2832         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2833
2834         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2835                       IIOC_SCSI_DATA);
2836
2837         pnop_out =
2838             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2839                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2840
2841         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2842         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2843         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2844         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2845 }
2846
2847 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2848 {
2849         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2850         struct hwi_context_memory *phwi_ctxt;
2851         struct wrb_handle *pwrb_handle = NULL;
2852         struct hwi_controller *phwi_ctrlr;
2853         struct hwi_wrb_context *pwrb_context;
2854         struct iscsi_wrb *pwrb = NULL;
2855         unsigned int num_cxn_wrbh = 0;
2856         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2857
2858         mem_descr_wrbh = phba->init_mem;
2859         mem_descr_wrbh += HWI_MEM_WRBH;
2860
2861         mem_descr_wrb = phba->init_mem;
2862         mem_descr_wrb += HWI_MEM_WRB;
2863         phwi_ctrlr = phba->phwi_ctrlr;
2864
2865         /* Allocate memory for WRBQ */
2866         phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2867         phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2868                                      phba->params.cxns_per_ctrl,
2869                                      GFP_KERNEL);
2870         if (!phwi_ctxt->be_wrbq) {
2871                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2872                             "BM_%d : WRBQ Mem Alloc Failed\n");
2873                 return -ENOMEM;
2874         }
2875
2876         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2877                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2878                 pwrb_context->pwrb_handle_base =
2879                                 kzalloc(sizeof(struct wrb_handle *) *
2880                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2881                 if (!pwrb_context->pwrb_handle_base) {
2882                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2883                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2884                         goto init_wrb_hndl_failed;
2885                 }
2886                 pwrb_context->pwrb_handle_basestd =
2887                                 kzalloc(sizeof(struct wrb_handle *) *
2888                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2889                 if (!pwrb_context->pwrb_handle_basestd) {
2890                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2891                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2892                         goto init_wrb_hndl_failed;
2893                 }
2894                 if (!num_cxn_wrbh) {
2895                         pwrb_handle =
2896                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2897                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2898                                         ((sizeof(struct wrb_handle)) *
2899                                          phba->params.wrbs_per_cxn));
2900                         idx++;
2901                 }
2902                 pwrb_context->alloc_index = 0;
2903                 pwrb_context->wrb_handles_available = 0;
2904                 pwrb_context->free_index = 0;
2905
2906                 if (num_cxn_wrbh) {
2907                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2908                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2909                                 pwrb_context->pwrb_handle_basestd[j] =
2910                                                                 pwrb_handle;
2911                                 pwrb_context->wrb_handles_available++;
2912                                 pwrb_handle->wrb_index = j;
2913                                 pwrb_handle++;
2914                         }
2915                         num_cxn_wrbh--;
2916                 }
2917         }
2918         idx = 0;
2919         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2920                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2921                 if (!num_cxn_wrb) {
2922                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2923                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2924                                 ((sizeof(struct iscsi_wrb) *
2925                                   phba->params.wrbs_per_cxn));
2926                         idx++;
2927                 }
2928
2929                 if (num_cxn_wrb) {
2930                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2931                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2932                                 pwrb_handle->pwrb = pwrb;
2933                                 pwrb++;
2934                         }
2935                         num_cxn_wrb--;
2936                 }
2937         }
2938         return 0;
2939 init_wrb_hndl_failed:
2940         for (j = index; j > 0; j--) {
2941                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2942                 kfree(pwrb_context->pwrb_handle_base);
2943                 kfree(pwrb_context->pwrb_handle_basestd);
2944         }
2945         return -ENOMEM;
2946 }
2947
2948 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2949 {
2950         uint8_t ulp_num;
2951         struct hwi_controller *phwi_ctrlr;
2952         struct hba_parameters *p = &phba->params;
2953         struct hwi_async_pdu_context *pasync_ctx;
2954         struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2955         unsigned int index, idx, num_per_mem, num_async_data;
2956         struct be_mem_descriptor *mem_descr;
2957
2958         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2959                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2960
2961                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2962                         mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2963                                      (ulp_num * MEM_DESCR_OFFSET));
2964
2965                         phwi_ctrlr = phba->phwi_ctrlr;
2966                         phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2967                                 (struct hwi_async_pdu_context *)
2968                                  mem_descr->mem_array[0].virtual_address;
2969
2970                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2971                         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2972
2973                         pasync_ctx->async_entry =
2974                                         (struct hwi_async_entry *)
2975                                         ((long unsigned int)pasync_ctx +
2976                                         sizeof(struct hwi_async_pdu_context));
2977
2978                         pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
2979                                                   ulp_num);
2980                         pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2981
2982                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2983                         mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2984                                 (ulp_num * MEM_DESCR_OFFSET);
2985                         if (mem_descr->mem_array[0].virtual_address) {
2986                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2987                                             "BM_%d : hwi_init_async_pdu_ctx"
2988                                             " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2989                                             ulp_num,
2990                                             mem_descr->mem_array[0].
2991                                             virtual_address);
2992                         } else
2993                                 beiscsi_log(phba, KERN_WARNING,
2994                                             BEISCSI_LOG_INIT,
2995                                             "BM_%d : No Virtual address for ULP : %d\n",
2996                                             ulp_num);
2997
2998                         pasync_ctx->async_header.va_base =
2999                                 mem_descr->mem_array[0].virtual_address;
3000
3001                         pasync_ctx->async_header.pa_base.u.a64.address =
3002                                 mem_descr->mem_array[0].
3003                                 bus_address.u.a64.address;
3004
3005                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3006                         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3007                                      (ulp_num * MEM_DESCR_OFFSET);
3008                         if (mem_descr->mem_array[0].virtual_address) {
3009                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3010                                             "BM_%d : hwi_init_async_pdu_ctx"
3011                                             " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
3012                                             ulp_num,
3013                                             mem_descr->mem_array[0].
3014                                             virtual_address);
3015                         } else
3016                                 beiscsi_log(phba, KERN_WARNING,
3017                                             BEISCSI_LOG_INIT,
3018                                             "BM_%d : No Virtual address for ULP : %d\n",
3019                                             ulp_num);
3020
3021                         pasync_ctx->async_header.ring_base =
3022                                 mem_descr->mem_array[0].virtual_address;
3023
3024                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3025                         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
3026                                      (ulp_num * MEM_DESCR_OFFSET);
3027                         if (mem_descr->mem_array[0].virtual_address) {
3028                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3029                                             "BM_%d : hwi_init_async_pdu_ctx"
3030                                             " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
3031                                             ulp_num,
3032                                             mem_descr->mem_array[0].
3033                                             virtual_address);
3034                         } else
3035                                 beiscsi_log(phba, KERN_WARNING,
3036                                             BEISCSI_LOG_INIT,
3037                                             "BM_%d : No Virtual address for ULP : %d\n",
3038                                             ulp_num);
3039
3040                         pasync_ctx->async_header.handle_base =
3041                                 mem_descr->mem_array[0].virtual_address;
3042                         pasync_ctx->async_header.writables = 0;
3043                         INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
3044
3045                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3046                         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3047                                      (ulp_num * MEM_DESCR_OFFSET);
3048                         if (mem_descr->mem_array[0].virtual_address) {
3049                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3050                                             "BM_%d : hwi_init_async_pdu_ctx"
3051                                             " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
3052                                             ulp_num,
3053                                             mem_descr->mem_array[0].
3054                                             virtual_address);
3055                         } else
3056                                 beiscsi_log(phba, KERN_WARNING,
3057                                             BEISCSI_LOG_INIT,
3058                                             "BM_%d : No Virtual address for ULP : %d\n",
3059                                             ulp_num);
3060
3061                         pasync_ctx->async_data.ring_base =
3062                                 mem_descr->mem_array[0].virtual_address;
3063
3064                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3065                         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
3066                                      (ulp_num * MEM_DESCR_OFFSET);
3067                         if (!mem_descr->mem_array[0].virtual_address)
3068                                 beiscsi_log(phba, KERN_WARNING,
3069                                             BEISCSI_LOG_INIT,
3070                                             "BM_%d : No Virtual address for ULP : %d\n",
3071                                             ulp_num);
3072
3073                         pasync_ctx->async_data.handle_base =
3074                                 mem_descr->mem_array[0].virtual_address;
3075                         pasync_ctx->async_data.writables = 0;
3076                         INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
3077
3078                         pasync_header_h =
3079                                 (struct async_pdu_handle *)
3080                                 pasync_ctx->async_header.handle_base;
3081                         pasync_data_h =
3082                                 (struct async_pdu_handle *)
3083                                 pasync_ctx->async_data.handle_base;
3084
3085                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3086                         mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
3087                                      (ulp_num * MEM_DESCR_OFFSET);
3088                         if (mem_descr->mem_array[0].virtual_address) {
3089                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3090                                             "BM_%d : hwi_init_async_pdu_ctx"
3091                                             " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
3092                                             ulp_num,
3093                                             mem_descr->mem_array[0].
3094                                             virtual_address);
3095                         } else
3096                                 beiscsi_log(phba, KERN_WARNING,
3097                                             BEISCSI_LOG_INIT,
3098                                             "BM_%d : No Virtual address for ULP : %d\n",
3099                                             ulp_num);
3100
3101                         idx = 0;
3102                         pasync_ctx->async_data.va_base =
3103                                 mem_descr->mem_array[idx].virtual_address;
3104                         pasync_ctx->async_data.pa_base.u.a64.address =
3105                                 mem_descr->mem_array[idx].
3106                                 bus_address.u.a64.address;
3107
3108                         num_async_data = ((mem_descr->mem_array[idx].size) /
3109                                         phba->params.defpdu_data_sz);
3110                         num_per_mem = 0;
3111
3112                         for (index = 0; index < BEISCSI_GET_CID_COUNT
3113                                         (phba, ulp_num); index++) {
3114                                 pasync_header_h->cri = -1;
3115                                 pasync_header_h->index = (char)index;
3116                                 INIT_LIST_HEAD(&pasync_header_h->link);
3117                                 pasync_header_h->pbuffer =
3118                                         (void *)((unsigned long)
3119                                                  (pasync_ctx->
3120                                                   async_header.va_base) +
3121                                                  (p->defpdu_hdr_sz * index));
3122
3123                                 pasync_header_h->pa.u.a64.address =
3124                                         pasync_ctx->async_header.pa_base.u.a64.
3125                                         address + (p->defpdu_hdr_sz * index);
3126
3127                                 list_add_tail(&pasync_header_h->link,
3128                                               &pasync_ctx->async_header.
3129                                               free_list);
3130                                 pasync_header_h++;
3131                                 pasync_ctx->async_header.free_entries++;
3132                                 pasync_ctx->async_header.writables++;
3133
3134                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3135                                                wait_queue.list);
3136                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3137                                                header_busy_list);
3138                                 pasync_data_h->cri = -1;
3139                                 pasync_data_h->index = (char)index;
3140                                 INIT_LIST_HEAD(&pasync_data_h->link);
3141
3142                                 if (!num_async_data) {
3143                                         num_per_mem = 0;
3144                                         idx++;
3145                                         pasync_ctx->async_data.va_base =
3146                                                 mem_descr->mem_array[idx].
3147                                                 virtual_address;
3148                                         pasync_ctx->async_data.pa_base.u.
3149                                                 a64.address =
3150                                                 mem_descr->mem_array[idx].
3151                                                 bus_address.u.a64.address;
3152                                         num_async_data =
3153                                                 ((mem_descr->mem_array[idx].
3154                                                   size) /
3155                                                  phba->params.defpdu_data_sz);
3156                                 }
3157                                 pasync_data_h->pbuffer =
3158                                         (void *)((unsigned long)
3159                                         (pasync_ctx->async_data.va_base) +
3160                                         (p->defpdu_data_sz * num_per_mem));
3161
3162                                 pasync_data_h->pa.u.a64.address =
3163                                         pasync_ctx->async_data.pa_base.u.a64.
3164                                         address + (p->defpdu_data_sz *
3165                                         num_per_mem);
3166                                 num_per_mem++;
3167                                 num_async_data--;
3168
3169                                 list_add_tail(&pasync_data_h->link,
3170                                               &pasync_ctx->async_data.
3171                                               free_list);
3172                                 pasync_data_h++;
3173                                 pasync_ctx->async_data.free_entries++;
3174                                 pasync_ctx->async_data.writables++;
3175
3176                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3177                                                data_busy_list);
3178                         }
3179
3180                         pasync_ctx->async_header.host_write_ptr = 0;
3181                         pasync_ctx->async_header.ep_read_ptr = -1;
3182                         pasync_ctx->async_data.host_write_ptr = 0;
3183                         pasync_ctx->async_data.ep_read_ptr = -1;
3184                 }
3185         }
3186
3187         return 0;
3188 }
3189
3190 static int
3191 be_sgl_create_contiguous(void *virtual_address,
3192                          u64 physical_address, u32 length,
3193                          struct be_dma_mem *sgl)
3194 {
3195         WARN_ON(!virtual_address);
3196         WARN_ON(!physical_address);
3197         WARN_ON(!length);
3198         WARN_ON(!sgl);
3199
3200         sgl->va = virtual_address;
3201         sgl->dma = (unsigned long)physical_address;
3202         sgl->size = length;
3203
3204         return 0;
3205 }
3206
3207 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
3208 {
3209         memset(sgl, 0, sizeof(*sgl));
3210 }
3211
3212 static void
3213 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
3214                      struct mem_array *pmem, struct be_dma_mem *sgl)
3215 {
3216         if (sgl->va)
3217                 be_sgl_destroy_contiguous(sgl);
3218
3219         be_sgl_create_contiguous(pmem->virtual_address,
3220                                  pmem->bus_address.u.a64.address,
3221                                  pmem->size, sgl);
3222 }
3223
3224 static void
3225 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3226                            struct mem_array *pmem, struct be_dma_mem *sgl)
3227 {
3228         if (sgl->va)
3229                 be_sgl_destroy_contiguous(sgl);
3230
3231         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
3232                                  pmem->bus_address.u.a64.address,
3233                                  pmem->size, sgl);
3234 }
3235
3236 static int be_fill_queue(struct be_queue_info *q,
3237                 u16 len, u16 entry_size, void *vaddress)
3238 {
3239         struct be_dma_mem *mem = &q->dma_mem;
3240
3241         memset(q, 0, sizeof(*q));
3242         q->len = len;
3243         q->entry_size = entry_size;
3244         mem->size = len * entry_size;
3245         mem->va = vaddress;
3246         if (!mem->va)
3247                 return -ENOMEM;
3248         memset(mem->va, 0, mem->size);
3249         return 0;
3250 }
3251
3252 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3253                              struct hwi_context_memory *phwi_context)
3254 {
3255         unsigned int i, num_eq_pages;
3256         int ret = 0, eq_for_mcc;
3257         struct be_queue_info *eq;
3258         struct be_dma_mem *mem;
3259         void *eq_vaddress;
3260         dma_addr_t paddr;
3261
3262         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3263                                       sizeof(struct be_eq_entry));
3264
3265         if (phba->msix_enabled)
3266                 eq_for_mcc = 1;
3267         else
3268                 eq_for_mcc = 0;
3269         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3270                 eq = &phwi_context->be_eq[i].q;
3271                 mem = &eq->dma_mem;
3272                 phwi_context->be_eq[i].phba = phba;
3273                 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3274                                                      num_eq_pages * PAGE_SIZE,
3275                                                      &paddr);
3276                 if (!eq_vaddress)
3277                         goto create_eq_error;
3278
3279                 mem->va = eq_vaddress;
3280                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3281                                     sizeof(struct be_eq_entry), eq_vaddress);
3282                 if (ret) {
3283                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3284                                     "BM_%d : be_fill_queue Failed for EQ\n");
3285                         goto create_eq_error;
3286                 }
3287
3288                 mem->dma = paddr;
3289                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3290                                             phwi_context->cur_eqd);
3291                 if (ret) {
3292                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3293                                     "BM_%d : beiscsi_cmd_eq_create"
3294                                     "Failed for EQ\n");
3295                         goto create_eq_error;
3296                 }
3297
3298                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3299                             "BM_%d : eqid = %d\n",
3300                             phwi_context->be_eq[i].q.id);
3301         }
3302         return 0;
3303 create_eq_error:
3304         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3305                 eq = &phwi_context->be_eq[i].q;
3306                 mem = &eq->dma_mem;
3307                 if (mem->va)
3308                         pci_free_consistent(phba->pcidev, num_eq_pages
3309                                             * PAGE_SIZE,
3310                                             mem->va, mem->dma);
3311         }
3312         return ret;
3313 }
3314
3315 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3316                              struct hwi_context_memory *phwi_context)
3317 {
3318         unsigned int i, num_cq_pages;
3319         int ret = 0;
3320         struct be_queue_info *cq, *eq;
3321         struct be_dma_mem *mem;
3322         struct be_eq_obj *pbe_eq;
3323         void *cq_vaddress;
3324         dma_addr_t paddr;
3325
3326         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3327                                       sizeof(struct sol_cqe));
3328
3329         for (i = 0; i < phba->num_cpus; i++) {
3330                 cq = &phwi_context->be_cq[i];
3331                 eq = &phwi_context->be_eq[i].q;
3332                 pbe_eq = &phwi_context->be_eq[i];
3333                 pbe_eq->cq = cq;
3334                 pbe_eq->phba = phba;
3335                 mem = &cq->dma_mem;
3336                 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3337                                                      num_cq_pages * PAGE_SIZE,
3338                                                      &paddr);
3339                 if (!cq_vaddress)
3340                         goto create_cq_error;
3341                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3342                                     sizeof(struct sol_cqe), cq_vaddress);
3343                 if (ret) {
3344                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3345                                     "BM_%d : be_fill_queue Failed "
3346                                     "for ISCSI CQ\n");
3347                         goto create_cq_error;
3348                 }
3349
3350                 mem->dma = paddr;
3351                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3352                                             false, 0);
3353                 if (ret) {
3354                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3355                                     "BM_%d : beiscsi_cmd_eq_create"
3356                                     "Failed for ISCSI CQ\n");
3357                         goto create_cq_error;
3358                 }
3359                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3360                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3361                             "iSCSI CQ CREATED\n", cq->id, eq->id);
3362         }
3363         return 0;
3364
3365 create_cq_error:
3366         for (i = 0; i < phba->num_cpus; i++) {
3367                 cq = &phwi_context->be_cq[i];
3368                 mem = &cq->dma_mem;
3369                 if (mem->va)
3370                         pci_free_consistent(phba->pcidev, num_cq_pages
3371                                             * PAGE_SIZE,
3372                                             mem->va, mem->dma);
3373         }
3374         return ret;
3375
3376 }
3377
3378 static int
3379 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3380                        struct hwi_context_memory *phwi_context,
3381                        struct hwi_controller *phwi_ctrlr,
3382                        unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3383 {
3384         unsigned int idx;
3385         int ret;
3386         struct be_queue_info *dq, *cq;
3387         struct be_dma_mem *mem;
3388         struct be_mem_descriptor *mem_descr;
3389         void *dq_vaddress;
3390
3391         idx = 0;
3392         dq = &phwi_context->be_def_hdrq[ulp_num];
3393         cq = &phwi_context->be_cq[0];
3394         mem = &dq->dma_mem;
3395         mem_descr = phba->init_mem;
3396         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3397                     (ulp_num * MEM_DESCR_OFFSET);
3398         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3399         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3400                             sizeof(struct phys_addr),
3401                             sizeof(struct phys_addr), dq_vaddress);
3402         if (ret) {
3403                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3404                             "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3405                             ulp_num);
3406
3407                 return ret;
3408         }
3409         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3410                                   bus_address.u.a64.address;
3411         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3412                                               def_pdu_ring_sz,
3413                                               phba->params.defpdu_hdr_sz,
3414                                               BEISCSI_DEFQ_HDR, ulp_num);
3415         if (ret) {
3416                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3417                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3418                             ulp_num);
3419
3420                 return ret;
3421         }
3422
3423         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3424                     "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3425                     ulp_num,
3426                     phwi_context->be_def_hdrq[ulp_num].id);
3427         hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num);
3428         return 0;
3429 }
3430
3431 static int
3432 beiscsi_create_def_data(struct beiscsi_hba *phba,
3433                         struct hwi_context_memory *phwi_context,
3434                         struct hwi_controller *phwi_ctrlr,
3435                         unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3436 {
3437         unsigned int idx;
3438         int ret;
3439         struct be_queue_info *dataq, *cq;
3440         struct be_dma_mem *mem;
3441         struct be_mem_descriptor *mem_descr;
3442         void *dq_vaddress;
3443
3444         idx = 0;
3445         dataq = &phwi_context->be_def_dataq[ulp_num];
3446         cq = &phwi_context->be_cq[0];
3447         mem = &dataq->dma_mem;
3448         mem_descr = phba->init_mem;
3449         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3450                     (ulp_num * MEM_DESCR_OFFSET);
3451         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3452         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3453                             sizeof(struct phys_addr),
3454                             sizeof(struct phys_addr), dq_vaddress);
3455         if (ret) {
3456                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3457                             "BM_%d : be_fill_queue Failed for DEF PDU "
3458                             "DATA on ULP : %d\n",
3459                             ulp_num);
3460
3461                 return ret;
3462         }
3463         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3464                                   bus_address.u.a64.address;
3465         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3466                                               def_pdu_ring_sz,
3467                                               phba->params.defpdu_data_sz,
3468                                               BEISCSI_DEFQ_DATA, ulp_num);
3469         if (ret) {
3470                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3471                             "BM_%d be_cmd_create_default_pdu_queue"
3472                             " Failed for DEF PDU DATA on ULP : %d\n",
3473                             ulp_num);
3474                 return ret;
3475         }
3476
3477         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3478                     "BM_%d : iscsi def data id on ULP : %d is  %d\n",
3479                     ulp_num,
3480                     phwi_context->be_def_dataq[ulp_num].id);
3481
3482         hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num);
3483         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3484                     "BM_%d : DEFAULT PDU DATA RING CREATED"
3485                     "on ULP : %d\n", ulp_num);
3486
3487         return 0;
3488 }
3489
3490
3491 static int
3492 beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3493 {
3494         struct be_mem_descriptor *mem_descr;
3495         struct mem_array *pm_arr;
3496         struct be_dma_mem sgl;
3497         int status, ulp_num;
3498
3499         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3500                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3501                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3502                         mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3503                                     (ulp_num * MEM_DESCR_OFFSET);
3504                         pm_arr = mem_descr->mem_array;
3505
3506                         hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3507                         status = be_cmd_iscsi_post_template_hdr(
3508                                  &phba->ctrl, &sgl);
3509
3510                         if (status != 0) {
3511                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3512                                             "BM_%d : Post Template HDR Failed for"
3513                                             "ULP_%d\n", ulp_num);
3514                                 return status;
3515                         }
3516
3517                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3518                                     "BM_%d : Template HDR Pages Posted for"
3519                                     "ULP_%d\n", ulp_num);
3520                 }
3521         }
3522         return 0;
3523 }
3524
3525 static int
3526 beiscsi_post_pages(struct beiscsi_hba *phba)
3527 {
3528         struct be_mem_descriptor *mem_descr;
3529         struct mem_array *pm_arr;
3530         unsigned int page_offset, i;
3531         struct be_dma_mem sgl;
3532         int status, ulp_num = 0;
3533
3534         mem_descr = phba->init_mem;
3535         mem_descr += HWI_MEM_SGE;
3536         pm_arr = mem_descr->mem_array;
3537
3538         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3539                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3540                         break;
3541
3542         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3543                         phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3544         for (i = 0; i < mem_descr->num_elements; i++) {
3545                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3546                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3547                                                 page_offset,
3548                                                 (pm_arr->size / PAGE_SIZE));
3549                 page_offset += pm_arr->size / PAGE_SIZE;
3550                 if (status != 0) {
3551                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3552                                     "BM_%d : post sgl failed.\n");
3553                         return status;
3554                 }
3555                 pm_arr++;
3556         }
3557         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3558                     "BM_%d : POSTED PAGES\n");
3559         return 0;
3560 }
3561
3562 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3563 {
3564         struct be_dma_mem *mem = &q->dma_mem;
3565         if (mem->va) {
3566                 pci_free_consistent(phba->pcidev, mem->size,
3567                         mem->va, mem->dma);
3568                 mem->va = NULL;
3569         }
3570 }
3571
3572 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3573                 u16 len, u16 entry_size)
3574 {
3575         struct be_dma_mem *mem = &q->dma_mem;
3576
3577         memset(q, 0, sizeof(*q));
3578         q->len = len;
3579         q->entry_size = entry_size;
3580         mem->size = len * entry_size;
3581         mem->va = pci_zalloc_consistent(phba->pcidev, mem->size, &mem->dma);
3582         if (!mem->va)
3583                 return -ENOMEM;
3584         return 0;
3585 }
3586
3587 static int
3588 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3589                          struct hwi_context_memory *phwi_context,
3590                          struct hwi_controller *phwi_ctrlr)
3591 {
3592         unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3593         u64 pa_addr_lo;
3594         unsigned int idx, num, i, ulp_num;
3595         struct mem_array *pwrb_arr;
3596         void *wrb_vaddr;
3597         struct be_dma_mem sgl;
3598         struct be_mem_descriptor *mem_descr;
3599         struct hwi_wrb_context *pwrb_context;
3600         int status;
3601         uint8_t ulp_count = 0, ulp_base_num = 0;
3602         uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3603
3604         idx = 0;
3605         mem_descr = phba->init_mem;
3606         mem_descr += HWI_MEM_WRB;
3607         pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3608                            GFP_KERNEL);
3609         if (!pwrb_arr) {
3610                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3611                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3612                 return -ENOMEM;
3613         }
3614         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3615         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3616         num_wrb_rings = mem_descr->mem_array[idx].size /
3617                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3618
3619         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3620                 if (num_wrb_rings) {
3621                         pwrb_arr[num].virtual_address = wrb_vaddr;
3622                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3623                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3624                                             sizeof(struct iscsi_wrb);
3625                         wrb_vaddr += pwrb_arr[num].size;
3626                         pa_addr_lo += pwrb_arr[num].size;
3627                         num_wrb_rings--;
3628                 } else {
3629                         idx++;
3630                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3631                         pa_addr_lo = mem_descr->mem_array[idx].\
3632                                         bus_address.u.a64.address;
3633                         num_wrb_rings = mem_descr->mem_array[idx].size /
3634                                         (phba->params.wrbs_per_cxn *
3635                                         sizeof(struct iscsi_wrb));
3636                         pwrb_arr[num].virtual_address = wrb_vaddr;
3637                         pwrb_arr[num].bus_address.u.a64.address\
3638                                                 = pa_addr_lo;
3639                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3640                                                  sizeof(struct iscsi_wrb);
3641                         wrb_vaddr += pwrb_arr[num].size;
3642                         pa_addr_lo   += pwrb_arr[num].size;
3643                         num_wrb_rings--;
3644                 }
3645         }
3646
3647         /* Get the ULP Count */
3648         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3649                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3650                         ulp_count++;
3651                         ulp_base_num = ulp_num;
3652                         cid_count_ulp[ulp_num] =
3653                                 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3654                 }
3655
3656         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3657                 wrb_mem_index = 0;
3658                 offset = 0;
3659                 size = 0;
3660
3661                 if (ulp_count > 1) {
3662                         ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3663
3664                         if (!cid_count_ulp[ulp_base_num])
3665                                 ulp_base_num = (ulp_base_num + 1) %
3666                                                 BEISCSI_ULP_COUNT;
3667
3668                         cid_count_ulp[ulp_base_num]--;
3669                 }
3670
3671
3672                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3673                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3674                                             &phwi_context->be_wrbq[i],
3675                                             &phwi_ctrlr->wrb_context[i],
3676                                             ulp_base_num);
3677                 if (status != 0) {
3678                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3679                                     "BM_%d : wrbq create failed.");
3680                         kfree(pwrb_arr);
3681                         return status;
3682                 }
3683                 pwrb_context = &phwi_ctrlr->wrb_context[i];
3684                 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3685         }
3686         kfree(pwrb_arr);
3687         return 0;
3688 }
3689
3690 static void free_wrb_handles(struct beiscsi_hba *phba)
3691 {
3692         unsigned int index;
3693         struct hwi_controller *phwi_ctrlr;
3694         struct hwi_wrb_context *pwrb_context;
3695
3696         phwi_ctrlr = phba->phwi_ctrlr;
3697         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3698                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3699                 kfree(pwrb_context->pwrb_handle_base);
3700                 kfree(pwrb_context->pwrb_handle_basestd);
3701         }
3702 }
3703
3704 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3705 {
3706         struct be_queue_info *q;
3707         struct be_ctrl_info *ctrl = &phba->ctrl;
3708
3709         q = &phba->ctrl.mcc_obj.q;
3710         if (q->created) {
3711                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3712                 be_queue_free(phba, q);
3713         }
3714
3715         q = &phba->ctrl.mcc_obj.cq;
3716         if (q->created) {
3717                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3718                 be_queue_free(phba, q);
3719         }
3720 }
3721
3722 static void hwi_cleanup(struct beiscsi_hba *phba)
3723 {
3724         struct be_queue_info *q;
3725         struct be_ctrl_info *ctrl = &phba->ctrl;
3726         struct hwi_controller *phwi_ctrlr;
3727         struct hwi_context_memory *phwi_context;
3728         struct hwi_async_pdu_context *pasync_ctx;
3729         int i, eq_for_mcc, ulp_num;
3730
3731         phwi_ctrlr = phba->phwi_ctrlr;
3732         phwi_context = phwi_ctrlr->phwi_ctxt;
3733
3734         be_cmd_iscsi_remove_template_hdr(ctrl);
3735
3736         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3737                 q = &phwi_context->be_wrbq[i];
3738                 if (q->created)
3739                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3740         }
3741         kfree(phwi_context->be_wrbq);
3742         free_wrb_handles(phba);
3743
3744         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3745                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3746
3747                         q = &phwi_context->be_def_hdrq[ulp_num];
3748                         if (q->created)
3749                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3750
3751                         q = &phwi_context->be_def_dataq[ulp_num];
3752                         if (q->created)
3753                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3754
3755                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
3756                 }
3757         }
3758
3759         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3760
3761         for (i = 0; i < (phba->num_cpus); i++) {
3762                 q = &phwi_context->be_cq[i];
3763                 if (q->created) {
3764                         be_queue_free(phba, q);
3765                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3766                 }
3767         }
3768
3769         be_mcc_queues_destroy(phba);
3770         if (phba->msix_enabled)
3771                 eq_for_mcc = 1;
3772         else
3773                 eq_for_mcc = 0;
3774         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3775                 q = &phwi_context->be_eq[i].q;
3776                 if (q->created) {
3777                         be_queue_free(phba, q);
3778                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3779                 }
3780         }
3781         be_cmd_fw_uninit(ctrl);
3782 }
3783
3784 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3785                                 struct hwi_context_memory *phwi_context)
3786 {
3787         struct be_queue_info *q, *cq;
3788         struct be_ctrl_info *ctrl = &phba->ctrl;
3789
3790         /* Alloc MCC compl queue */
3791         cq = &phba->ctrl.mcc_obj.cq;
3792         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3793                         sizeof(struct be_mcc_compl)))
3794                 goto err;
3795         /* Ask BE to create MCC compl queue; */
3796         if (phba->msix_enabled) {
3797                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3798                                          [phba->num_cpus].q, false, true, 0))
3799                 goto mcc_cq_free;
3800         } else {
3801                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3802                                           false, true, 0))
3803                 goto mcc_cq_free;
3804         }
3805
3806         /* Alloc MCC queue */
3807         q = &phba->ctrl.mcc_obj.q;
3808         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3809                 goto mcc_cq_destroy;
3810
3811         /* Ask BE to create MCC queue */
3812         if (beiscsi_cmd_mccq_create(phba, q, cq))
3813                 goto mcc_q_free;
3814
3815         return 0;
3816
3817 mcc_q_free:
3818         be_queue_free(phba, q);
3819 mcc_cq_destroy:
3820         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3821 mcc_cq_free:
3822         be_queue_free(phba, cq);
3823 err:
3824         return -ENOMEM;
3825 }
3826
3827 /**
3828  * find_num_cpus()- Get the CPU online count
3829  * @phba: ptr to priv structure
3830  *
3831  * CPU count is used for creating EQ.
3832  **/
3833 static void find_num_cpus(struct beiscsi_hba *phba)
3834 {
3835         int  num_cpus = 0;
3836
3837         num_cpus = num_online_cpus();
3838
3839         switch (phba->generation) {
3840         case BE_GEN2:
3841         case BE_GEN3:
3842                 phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
3843                                   BEISCSI_MAX_NUM_CPUS : num_cpus;
3844                 break;
3845         case BE_GEN4:
3846                 /*
3847                  * If eqid_count == 1 fall back to
3848                  * INTX mechanism
3849                  **/
3850                 if (phba->fw_config.eqid_count == 1) {
3851                         enable_msix = 0;
3852                         phba->num_cpus = 1;
3853                         return;
3854                 }
3855
3856                 phba->num_cpus =
3857                         (num_cpus > (phba->fw_config.eqid_count - 1)) ?
3858                         (phba->fw_config.eqid_count - 1) : num_cpus;
3859                 break;
3860         default:
3861                 phba->num_cpus = 1;
3862         }
3863 }
3864
3865 static int hwi_init_port(struct beiscsi_hba *phba)
3866 {
3867         struct hwi_controller *phwi_ctrlr;
3868         struct hwi_context_memory *phwi_context;
3869         unsigned int def_pdu_ring_sz;
3870         struct be_ctrl_info *ctrl = &phba->ctrl;
3871         int status, ulp_num;
3872
3873         phwi_ctrlr = phba->phwi_ctrlr;
3874         phwi_context = phwi_ctrlr->phwi_ctxt;
3875         phwi_context->max_eqd = 128;
3876         phwi_context->min_eqd = 0;
3877         phwi_context->cur_eqd = 0;
3878         be_cmd_fw_initialize(&phba->ctrl);
3879         /* set optic state to unknown */
3880         phba->optic_state = 0xff;
3881
3882         status = beiscsi_create_eqs(phba, phwi_context);
3883         if (status != 0) {
3884                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3885                             "BM_%d : EQ not created\n");
3886                 goto error;
3887         }
3888
3889         status = be_mcc_queues_create(phba, phwi_context);
3890         if (status != 0)
3891                 goto error;
3892
3893         status = mgmt_check_supported_fw(ctrl, phba);
3894         if (status != 0) {
3895                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3896                             "BM_%d : Unsupported fw version\n");
3897                 goto error;
3898         }
3899
3900         status = beiscsi_create_cqs(phba, phwi_context);
3901         if (status != 0) {
3902                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3903                             "BM_%d : CQ not created\n");
3904                 goto error;
3905         }
3906
3907         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3908                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3909
3910                         def_pdu_ring_sz =
3911                                 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
3912                                 sizeof(struct phys_addr);
3913
3914                         status = beiscsi_create_def_hdr(phba, phwi_context,
3915                                                         phwi_ctrlr,
3916                                                         def_pdu_ring_sz,
3917                                                         ulp_num);
3918                         if (status != 0) {
3919                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3920                                             "BM_%d : Default Header not created for ULP : %d\n",
3921                                             ulp_num);
3922                                 goto error;
3923                         }
3924
3925                         status = beiscsi_create_def_data(phba, phwi_context,
3926                                                          phwi_ctrlr,
3927                                                          def_pdu_ring_sz,
3928                                                          ulp_num);
3929                         if (status != 0) {
3930                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3931                                             "BM_%d : Default Data not created for ULP : %d\n",
3932                                             ulp_num);
3933                                 goto error;
3934                         }
3935                 }
3936         }
3937
3938         status = beiscsi_post_pages(phba);
3939         if (status != 0) {
3940                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3941                             "BM_%d : Post SGL Pages Failed\n");
3942                 goto error;
3943         }
3944
3945         status = beiscsi_post_template_hdr(phba);
3946         if (status != 0) {
3947                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3948                             "BM_%d : Template HDR Posting for CXN Failed\n");
3949         }
3950
3951         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3952         if (status != 0) {
3953                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3954                             "BM_%d : WRB Rings not created\n");
3955                 goto error;
3956         }
3957
3958         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3959                 uint16_t async_arr_idx = 0;
3960
3961                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3962                         uint16_t cri = 0;
3963                         struct hwi_async_pdu_context *pasync_ctx;
3964
3965                         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3966                                      phwi_ctrlr, ulp_num);
3967                         for (cri = 0; cri <
3968                              phba->params.cxns_per_ctrl; cri++) {
3969                                 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3970                                                (phwi_ctrlr, cri))
3971                                         pasync_ctx->cid_to_async_cri_map[
3972                                         phwi_ctrlr->wrb_context[cri].cid] =
3973                                         async_arr_idx++;
3974                         }
3975                 }
3976         }
3977
3978         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3979                     "BM_%d : hwi_init_port success\n");
3980         return 0;
3981
3982 error:
3983         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3984                     "BM_%d : hwi_init_port failed");
3985         hwi_cleanup(phba);
3986         return status;
3987 }
3988
3989 static int hwi_init_controller(struct beiscsi_hba *phba)
3990 {
3991         struct hwi_controller *phwi_ctrlr;
3992
3993         phwi_ctrlr = phba->phwi_ctrlr;
3994         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3995                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3996                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3997                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3998                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
3999                             phwi_ctrlr->phwi_ctxt);
4000         } else {
4001                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4002                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
4003                             "than one element.Failing to load\n");
4004                 return -ENOMEM;
4005         }
4006
4007         iscsi_init_global_templates(phba);
4008         if (beiscsi_init_wrb_handle(phba))
4009                 return -ENOMEM;
4010
4011         if (hwi_init_async_pdu_ctx(phba)) {
4012                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4013                             "BM_%d : hwi_init_async_pdu_ctx failed\n");
4014                 return -ENOMEM;
4015         }
4016
4017         if (hwi_init_port(phba) != 0) {
4018                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4019                             "BM_%d : hwi_init_controller failed\n");
4020
4021                 return -ENOMEM;
4022         }
4023         return 0;
4024 }
4025
4026 static void beiscsi_free_mem(struct beiscsi_hba *phba)
4027 {
4028         struct be_mem_descriptor *mem_descr;
4029         int i, j;
4030
4031         mem_descr = phba->init_mem;
4032         i = 0;
4033         j = 0;
4034         for (i = 0; i < SE_MEM_MAX; i++) {
4035                 for (j = mem_descr->num_elements; j > 0; j--) {
4036                         pci_free_consistent(phba->pcidev,
4037                           mem_descr->mem_array[j - 1].size,
4038                           mem_descr->mem_array[j - 1].virtual_address,
4039                           (unsigned long)mem_descr->mem_array[j - 1].
4040                           bus_address.u.a64.address);
4041                 }
4042
4043                 kfree(mem_descr->mem_array);
4044                 mem_descr++;
4045         }
4046         kfree(phba->init_mem);
4047         kfree(phba->phwi_ctrlr->wrb_context);
4048         kfree(phba->phwi_ctrlr);
4049 }
4050
4051 static int beiscsi_init_controller(struct beiscsi_hba *phba)
4052 {
4053         int ret = -ENOMEM;
4054
4055         ret = beiscsi_get_memory(phba);
4056         if (ret < 0) {
4057                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4058                             "BM_%d : beiscsi_dev_probe -"
4059                             "Failed in beiscsi_alloc_memory\n");
4060                 return ret;
4061         }
4062
4063         ret = hwi_init_controller(phba);
4064         if (ret)
4065                 goto free_init;
4066         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4067                     "BM_%d : Return success from beiscsi_init_controller");
4068
4069         return 0;
4070
4071 free_init:
4072         beiscsi_free_mem(phba);
4073         return ret;
4074 }
4075
4076 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
4077 {
4078         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
4079         struct sgl_handle *psgl_handle;
4080         struct iscsi_sge *pfrag;
4081         unsigned int arr_index, i, idx;
4082         unsigned int ulp_icd_start, ulp_num = 0;
4083
4084         phba->io_sgl_hndl_avbl = 0;
4085         phba->eh_sgl_hndl_avbl = 0;
4086
4087         mem_descr_sglh = phba->init_mem;
4088         mem_descr_sglh += HWI_MEM_SGLH;
4089         if (1 == mem_descr_sglh->num_elements) {
4090                 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4091                                                  phba->params.ios_per_ctrl,
4092                                                  GFP_KERNEL);
4093                 if (!phba->io_sgl_hndl_base) {
4094                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4095                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4096                         return -ENOMEM;
4097                 }
4098                 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4099                                                  (phba->params.icds_per_ctrl -
4100                                                  phba->params.ios_per_ctrl),
4101                                                  GFP_KERNEL);
4102                 if (!phba->eh_sgl_hndl_base) {
4103                         kfree(phba->io_sgl_hndl_base);
4104                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4105                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4106                         return -ENOMEM;
4107                 }
4108         } else {
4109                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4110                             "BM_%d : HWI_MEM_SGLH is more than one element."
4111                             "Failing to load\n");
4112                 return -ENOMEM;
4113         }
4114
4115         arr_index = 0;
4116         idx = 0;
4117         while (idx < mem_descr_sglh->num_elements) {
4118                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
4119
4120                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
4121                       sizeof(struct sgl_handle)); i++) {
4122                         if (arr_index < phba->params.ios_per_ctrl) {
4123                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
4124                                 phba->io_sgl_hndl_avbl++;
4125                                 arr_index++;
4126                         } else {
4127                                 phba->eh_sgl_hndl_base[arr_index -
4128                                         phba->params.ios_per_ctrl] =
4129                                                                 psgl_handle;
4130                                 arr_index++;
4131                                 phba->eh_sgl_hndl_avbl++;
4132                         }
4133                         psgl_handle++;
4134                 }
4135                 idx++;
4136         }
4137         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4138                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
4139                     "phba->eh_sgl_hndl_avbl=%d\n",
4140                     phba->io_sgl_hndl_avbl,
4141                     phba->eh_sgl_hndl_avbl);
4142
4143         mem_descr_sg = phba->init_mem;
4144         mem_descr_sg += HWI_MEM_SGE;
4145         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4146                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
4147                     mem_descr_sg->num_elements);
4148
4149         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
4150                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
4151                         break;
4152
4153         ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
4154
4155         arr_index = 0;
4156         idx = 0;
4157         while (idx < mem_descr_sg->num_elements) {
4158                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
4159
4160                 for (i = 0;
4161                      i < (mem_descr_sg->mem_array[idx].size) /
4162                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
4163                      i++) {
4164                         if (arr_index < phba->params.ios_per_ctrl)
4165                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
4166                         else
4167                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
4168                                                 phba->params.ios_per_ctrl];
4169                         psgl_handle->pfrag = pfrag;
4170                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
4171                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
4172                         pfrag += phba->params.num_sge_per_io;
4173                         psgl_handle->sgl_index = ulp_icd_start + arr_index++;
4174                 }
4175                 idx++;
4176         }
4177         phba->io_sgl_free_index = 0;
4178         phba->io_sgl_alloc_index = 0;
4179         phba->eh_sgl_free_index = 0;
4180         phba->eh_sgl_alloc_index = 0;
4181         return 0;
4182 }
4183
4184 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4185 {
4186         int ret;
4187         uint16_t i, ulp_num;
4188         struct ulp_cid_info *ptr_cid_info = NULL;
4189
4190         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4191                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4192                         ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
4193                                                GFP_KERNEL);
4194
4195                         if (!ptr_cid_info) {
4196                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4197                                             "BM_%d : Failed to allocate memory"
4198                                             "for ULP_CID_INFO for ULP : %d\n",
4199                                             ulp_num);
4200                                 ret = -ENOMEM;
4201                                 goto free_memory;
4202
4203                         }
4204
4205                         /* Allocate memory for CID array */
4206                         ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
4207                                                   BEISCSI_GET_CID_COUNT(phba,
4208                                                   ulp_num), GFP_KERNEL);
4209                         if (!ptr_cid_info->cid_array) {
4210                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4211                                             "BM_%d : Failed to allocate memory"
4212                                             "for CID_ARRAY for ULP : %d\n",
4213                                             ulp_num);
4214                                 kfree(ptr_cid_info);
4215                                 ptr_cid_info = NULL;
4216                                 ret = -ENOMEM;
4217
4218                                 goto free_memory;
4219                         }
4220                         ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4221                                                    phba, ulp_num);
4222
4223                         /* Save the cid_info_array ptr */
4224                         phba->cid_array_info[ulp_num] = ptr_cid_info;
4225                 }
4226         }
4227         phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
4228                                  phba->params.cxns_per_ctrl, GFP_KERNEL);
4229         if (!phba->ep_array) {
4230                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4231                             "BM_%d : Failed to allocate memory in "
4232                             "hba_setup_cid_tbls\n");
4233                 ret = -ENOMEM;
4234
4235                 goto free_memory;
4236         }
4237
4238         phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4239                                    phba->params.cxns_per_ctrl, GFP_KERNEL);
4240         if (!phba->conn_table) {
4241                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4242                             "BM_%d : Failed to allocate memory in"
4243                             "hba_setup_cid_tbls\n");
4244
4245                 kfree(phba->ep_array);
4246                 phba->ep_array = NULL;
4247                 ret = -ENOMEM;
4248
4249                 goto free_memory;
4250         }
4251
4252         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4253                 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4254
4255                 ptr_cid_info = phba->cid_array_info[ulp_num];
4256                 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4257                         phba->phwi_ctrlr->wrb_context[i].cid;
4258
4259         }
4260
4261         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4262                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4263                         ptr_cid_info = phba->cid_array_info[ulp_num];
4264
4265                         ptr_cid_info->cid_alloc = 0;
4266                         ptr_cid_info->cid_free = 0;
4267                 }
4268         }
4269         return 0;
4270
4271 free_memory:
4272         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4273                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4274                         ptr_cid_info = phba->cid_array_info[ulp_num];
4275
4276                         if (ptr_cid_info) {
4277                                 kfree(ptr_cid_info->cid_array);
4278                                 kfree(ptr_cid_info);
4279                                 phba->cid_array_info[ulp_num] = NULL;
4280                         }
4281                 }
4282         }
4283
4284         return ret;
4285 }
4286
4287 static void hwi_enable_intr(struct beiscsi_hba *phba)
4288 {
4289         struct be_ctrl_info *ctrl = &phba->ctrl;
4290         struct hwi_controller *phwi_ctrlr;
4291         struct hwi_context_memory *phwi_context;
4292         struct be_queue_info *eq;
4293         u8 __iomem *addr;
4294         u32 reg, i;
4295         u32 enabled;
4296
4297         phwi_ctrlr = phba->phwi_ctrlr;
4298         phwi_context = phwi_ctrlr->phwi_ctxt;
4299
4300         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4301                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4302         reg = ioread32(addr);
4303
4304         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4305         if (!enabled) {
4306                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4307                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4308                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4309                 iowrite32(reg, addr);
4310         }
4311
4312         if (!phba->msix_enabled) {
4313                 eq = &phwi_context->be_eq[0].q;
4314                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4315                             "BM_%d : eq->id=%d\n", eq->id);
4316
4317                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4318         } else {
4319                 for (i = 0; i <= phba->num_cpus; i++) {
4320                         eq = &phwi_context->be_eq[i].q;
4321                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4322                                     "BM_%d : eq->id=%d\n", eq->id);
4323                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4324                 }
4325         }
4326 }
4327
4328 static void hwi_disable_intr(struct beiscsi_hba *phba)
4329 {
4330         struct be_ctrl_info *ctrl = &phba->ctrl;
4331
4332         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4333         u32 reg = ioread32(addr);
4334
4335         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4336         if (enabled) {
4337                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4338                 iowrite32(reg, addr);
4339         } else
4340                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4341                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
4342 }
4343
4344 /**
4345  * beiscsi_get_boot_info()- Get the boot session info
4346  * @phba: The device priv structure instance
4347  *
4348  * Get the boot target info and store in driver priv structure
4349  *
4350  * return values
4351  *      Success: 0
4352  *      Failure: Non-Zero Value
4353  **/
4354 static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
4355 {
4356         struct be_cmd_get_session_resp *session_resp;
4357         struct be_dma_mem nonemb_cmd;
4358         unsigned int tag;
4359         unsigned int s_handle;
4360         int ret = -ENOMEM;
4361
4362         /* Get the session handle of the boot target */
4363         ret = be_mgmt_get_boot_shandle(phba, &s_handle);
4364         if (ret) {
4365                 beiscsi_log(phba, KERN_ERR,
4366                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4367                             "BM_%d : No boot session\n");
4368
4369                 if (ret == -ENXIO)
4370                         phba->get_boot = 0;
4371
4372
4373                 return ret;
4374         }
4375         phba->get_boot = 0;
4376         nonemb_cmd.va = pci_zalloc_consistent(phba->ctrl.pdev,
4377                                               sizeof(*session_resp),
4378                                               &nonemb_cmd.dma);
4379         if (nonemb_cmd.va == NULL) {
4380                 beiscsi_log(phba, KERN_ERR,
4381                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4382                             "BM_%d : Failed to allocate memory for"
4383                             "beiscsi_get_session_info\n");
4384
4385                 return -ENOMEM;
4386         }
4387
4388         tag = mgmt_get_session_info(phba, s_handle,
4389                                     &nonemb_cmd);
4390         if (!tag) {
4391                 beiscsi_log(phba, KERN_ERR,
4392                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4393                             "BM_%d : beiscsi_get_session_info"
4394                             " Failed\n");
4395
4396                 goto boot_freemem;
4397         }
4398
4399         ret = beiscsi_mccq_compl(phba, tag, NULL, &nonemb_cmd);
4400         if (ret) {
4401                 beiscsi_log(phba, KERN_ERR,
4402                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4403                             "BM_%d : beiscsi_get_session_info Failed");
4404
4405                 if (ret != -EBUSY)
4406                         goto boot_freemem;
4407                 else
4408                         return ret;
4409         }
4410
4411         session_resp = nonemb_cmd.va ;
4412
4413         memcpy(&phba->boot_sess, &session_resp->session_info,
4414                sizeof(struct mgmt_session_info));
4415
4416          beiscsi_logout_fw_sess(phba,
4417                                 phba->boot_sess.session_handle);
4418         ret = 0;
4419
4420 boot_freemem:
4421         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4422                     nonemb_cmd.va, nonemb_cmd.dma);
4423         return ret;
4424 }
4425
4426 static void beiscsi_boot_release(void *data)
4427 {
4428         struct beiscsi_hba *phba = data;
4429
4430         scsi_host_put(phba->shost);
4431 }
4432
4433 static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
4434 {
4435         struct iscsi_boot_kobj *boot_kobj;
4436
4437         /* it has been created previously */
4438         if (phba->boot_kset)
4439                 return 0;
4440
4441         /* get boot info using mgmt cmd */
4442         if (beiscsi_get_boot_info(phba))
4443                 /* Try to see if we can carry on without this */
4444                 return 0;
4445
4446         phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
4447         if (!phba->boot_kset)
4448                 return -ENOMEM;
4449
4450         /* get a ref because the show function will ref the phba */
4451         if (!scsi_host_get(phba->shost))
4452                 goto free_kset;
4453         boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
4454                                              beiscsi_show_boot_tgt_info,
4455                                              beiscsi_tgt_get_attr_visibility,
4456                                              beiscsi_boot_release);
4457         if (!boot_kobj)
4458                 goto put_shost;
4459
4460         if (!scsi_host_get(phba->shost))
4461                 goto free_kset;
4462         boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
4463                                                 beiscsi_show_boot_ini_info,
4464                                                 beiscsi_ini_get_attr_visibility,
4465                                                 beiscsi_boot_release);
4466         if (!boot_kobj)
4467                 goto put_shost;
4468
4469         if (!scsi_host_get(phba->shost))
4470                 goto free_kset;
4471         boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
4472                                                beiscsi_show_boot_eth_info,
4473                                                beiscsi_eth_get_attr_visibility,
4474                                                beiscsi_boot_release);
4475         if (!boot_kobj)
4476                 goto put_shost;
4477         return 0;
4478
4479 put_shost:
4480         scsi_host_put(phba->shost);
4481 free_kset:
4482         iscsi_boot_destroy_kset(phba->boot_kset);
4483         return -ENOMEM;
4484 }
4485
4486 static int beiscsi_init_port(struct beiscsi_hba *phba)
4487 {
4488         int ret;
4489
4490         ret = beiscsi_init_controller(phba);
4491         if (ret < 0) {
4492                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4493                             "BM_%d : beiscsi_dev_probe - Failed in"
4494                             "beiscsi_init_controller\n");
4495                 return ret;
4496         }
4497         ret = beiscsi_init_sgl_handle(phba);
4498         if (ret < 0) {
4499                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4500                             "BM_%d : beiscsi_dev_probe - Failed in"
4501                             "beiscsi_init_sgl_handle\n");
4502                 goto do_cleanup_ctrlr;
4503         }
4504
4505         if (hba_setup_cid_tbls(phba)) {
4506                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4507                             "BM_%d : Failed in hba_setup_cid_tbls\n");
4508                 kfree(phba->io_sgl_hndl_base);
4509                 kfree(phba->eh_sgl_hndl_base);
4510                 goto do_cleanup_ctrlr;
4511         }
4512
4513         return ret;
4514
4515 do_cleanup_ctrlr:
4516         hwi_cleanup(phba);
4517         return ret;
4518 }
4519
4520 static void hwi_purge_eq(struct beiscsi_hba *phba)
4521 {
4522         struct hwi_controller *phwi_ctrlr;
4523         struct hwi_context_memory *phwi_context;
4524         struct be_queue_info *eq;
4525         struct be_eq_entry *eqe = NULL;
4526         int i, eq_msix;
4527         unsigned int num_processed;
4528
4529         phwi_ctrlr = phba->phwi_ctrlr;
4530         phwi_context = phwi_ctrlr->phwi_ctxt;
4531         if (phba->msix_enabled)
4532                 eq_msix = 1;
4533         else
4534                 eq_msix = 0;
4535
4536         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
4537                 eq = &phwi_context->be_eq[i].q;
4538                 eqe = queue_tail_node(eq);
4539                 num_processed = 0;
4540                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
4541                                         & EQE_VALID_MASK) {
4542                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
4543                         queue_tail_inc(eq);
4544                         eqe = queue_tail_node(eq);
4545                         num_processed++;
4546                 }
4547
4548                 if (num_processed)
4549                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
4550         }
4551 }
4552
4553 static void beiscsi_clean_port(struct beiscsi_hba *phba)
4554 {
4555         int mgmt_status, ulp_num;
4556         struct ulp_cid_info *ptr_cid_info = NULL;
4557
4558         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4559                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4560                         mgmt_status = mgmt_epfw_cleanup(phba, ulp_num);
4561                         if (mgmt_status)
4562                                 beiscsi_log(phba, KERN_WARNING,
4563                                             BEISCSI_LOG_INIT,
4564                                             "BM_%d : mgmt_epfw_cleanup FAILED"
4565                                             " for ULP_%d\n", ulp_num);
4566                 }
4567         }
4568
4569         hwi_purge_eq(phba);
4570         hwi_cleanup(phba);
4571         kfree(phba->io_sgl_hndl_base);
4572         kfree(phba->eh_sgl_hndl_base);
4573         kfree(phba->ep_array);
4574         kfree(phba->conn_table);
4575
4576         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4577                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4578                         ptr_cid_info = phba->cid_array_info[ulp_num];
4579
4580                         if (ptr_cid_info) {
4581                                 kfree(ptr_cid_info->cid_array);
4582                                 kfree(ptr_cid_info);
4583                                 phba->cid_array_info[ulp_num] = NULL;
4584                         }
4585                 }
4586         }
4587
4588 }
4589
4590 /**
4591  * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4592  * @beiscsi_conn: ptr to the conn to be cleaned up
4593  * @task: ptr to iscsi_task resource to be freed.
4594  *
4595  * Free driver mgmt resources binded to CXN.
4596  **/
4597 void
4598 beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4599                                 struct iscsi_task *task)
4600 {
4601         struct beiscsi_io_task *io_task;
4602         struct beiscsi_hba *phba = beiscsi_conn->phba;
4603         struct hwi_wrb_context *pwrb_context;
4604         struct hwi_controller *phwi_ctrlr;
4605         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4606                                 beiscsi_conn->beiscsi_conn_cid);
4607
4608         phwi_ctrlr = phba->phwi_ctrlr;
4609         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4610
4611         io_task = task->dd_data;
4612
4613         if (io_task->pwrb_handle) {
4614                 memset(io_task->pwrb_handle->pwrb, 0,
4615                        sizeof(struct iscsi_wrb));
4616                 free_wrb_handle(phba, pwrb_context,
4617                                 io_task->pwrb_handle);
4618                 io_task->pwrb_handle = NULL;
4619         }
4620
4621         if (io_task->psgl_handle) {
4622                 spin_lock_bh(&phba->mgmt_sgl_lock);
4623                 free_mgmt_sgl_handle(phba,
4624                                      io_task->psgl_handle);
4625                 io_task->psgl_handle = NULL;
4626                 spin_unlock_bh(&phba->mgmt_sgl_lock);
4627         }
4628
4629         if (io_task->mtask_addr) {
4630                 pci_unmap_single(phba->pcidev,
4631                                  io_task->mtask_addr,
4632                                  io_task->mtask_data_count,
4633                                  PCI_DMA_TODEVICE);
4634                 io_task->mtask_addr = 0;
4635         }
4636 }
4637
4638 /**
4639  * beiscsi_cleanup_task()- Free driver resources of the task
4640  * @task: ptr to the iscsi task
4641  *
4642  **/
4643 static void beiscsi_cleanup_task(struct iscsi_task *task)
4644 {
4645         struct beiscsi_io_task *io_task = task->dd_data;
4646         struct iscsi_conn *conn = task->conn;
4647         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4648         struct beiscsi_hba *phba = beiscsi_conn->phba;
4649         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4650         struct hwi_wrb_context *pwrb_context;
4651         struct hwi_controller *phwi_ctrlr;
4652         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4653                              beiscsi_conn->beiscsi_conn_cid);
4654
4655         phwi_ctrlr = phba->phwi_ctrlr;
4656         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4657
4658         if (io_task->cmd_bhs) {
4659                 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4660                               io_task->bhs_pa.u.a64.address);
4661                 io_task->cmd_bhs = NULL;
4662         }
4663
4664         if (task->sc) {
4665                 if (io_task->pwrb_handle) {
4666                         free_wrb_handle(phba, pwrb_context,
4667                                         io_task->pwrb_handle);
4668                         io_task->pwrb_handle = NULL;
4669                 }
4670
4671                 if (io_task->psgl_handle) {
4672                         spin_lock(&phba->io_sgl_lock);
4673                         free_io_sgl_handle(phba, io_task->psgl_handle);
4674                         spin_unlock(&phba->io_sgl_lock);
4675                         io_task->psgl_handle = NULL;
4676                 }
4677
4678                 if (io_task->scsi_cmnd) {
4679                         scsi_dma_unmap(io_task->scsi_cmnd);
4680                         io_task->scsi_cmnd = NULL;
4681                 }
4682         } else {
4683                 if (!beiscsi_conn->login_in_progress)
4684                         beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4685         }
4686 }
4687
4688 void
4689 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4690                            struct beiscsi_offload_params *params)
4691 {
4692         struct wrb_handle *pwrb_handle;
4693         struct hwi_wrb_context *pwrb_context = NULL;
4694         struct beiscsi_hba *phba = beiscsi_conn->phba;
4695         struct iscsi_task *task = beiscsi_conn->task;
4696         struct iscsi_session *session = task->conn->session;
4697         u32 doorbell = 0;
4698
4699         /*
4700          * We can always use 0 here because it is reserved by libiscsi for
4701          * login/startup related tasks.
4702          */
4703         beiscsi_conn->login_in_progress = 0;
4704         spin_lock_bh(&session->back_lock);
4705         beiscsi_cleanup_task(task);
4706         spin_unlock_bh(&session->back_lock);
4707
4708         pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid,
4709                                        &pwrb_context);
4710
4711         /* Check for the adapter family */
4712         if (is_chip_be2_be3r(phba))
4713                 beiscsi_offload_cxn_v0(params, pwrb_handle,
4714                                        phba->init_mem,
4715                                        pwrb_context);
4716         else
4717                 beiscsi_offload_cxn_v2(params, pwrb_handle,
4718                                        pwrb_context);
4719
4720         be_dws_le_to_cpu(pwrb_handle->pwrb,
4721                          sizeof(struct iscsi_target_context_update_wrb));
4722
4723         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4724         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4725                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4726         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4727         iowrite32(doorbell, phba->db_va +
4728                   beiscsi_conn->doorbell_offset);
4729
4730         /*
4731          * There is no completion for CONTEXT_UPDATE. The completion of next
4732          * WRB posted guarantees FW's processing and DMA'ing of it.
4733          * Use beiscsi_put_wrb_handle to put it back in the pool which makes
4734          * sure zero'ing or reuse of the WRB only after wrbs_per_cxn.
4735          */
4736         beiscsi_put_wrb_handle(pwrb_context, pwrb_handle,
4737                                phba->params.wrbs_per_cxn);
4738         beiscsi_log(phba, KERN_INFO,
4739                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4740                     "BM_%d : put CONTEXT_UPDATE pwrb_handle=%p free_index=0x%x wrb_handles_available=%d\n",
4741                     pwrb_handle, pwrb_context->free_index,
4742                     pwrb_context->wrb_handles_available);
4743 }
4744
4745 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4746                               int *index, int *age)
4747 {
4748         *index = (int)itt;
4749         if (age)
4750                 *age = conn->session->age;
4751 }
4752
4753 /**
4754  * beiscsi_alloc_pdu - allocates pdu and related resources
4755  * @task: libiscsi task
4756  * @opcode: opcode of pdu for task
4757  *
4758  * This is called with the session lock held. It will allocate
4759  * the wrb and sgl if needed for the command. And it will prep
4760  * the pdu's itt. beiscsi_parse_pdu will later translate
4761  * the pdu itt to the libiscsi task itt.
4762  */
4763 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4764 {
4765         struct beiscsi_io_task *io_task = task->dd_data;
4766         struct iscsi_conn *conn = task->conn;
4767         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4768         struct beiscsi_hba *phba = beiscsi_conn->phba;
4769         struct hwi_wrb_context *pwrb_context;
4770         struct hwi_controller *phwi_ctrlr;
4771         itt_t itt;
4772         uint16_t cri_index = 0;
4773         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4774         dma_addr_t paddr;
4775
4776         io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4777                                           GFP_ATOMIC, &paddr);
4778         if (!io_task->cmd_bhs)
4779                 return -ENOMEM;
4780         io_task->bhs_pa.u.a64.address = paddr;
4781         io_task->libiscsi_itt = (itt_t)task->itt;
4782         io_task->conn = beiscsi_conn;
4783
4784         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4785         task->hdr_max = sizeof(struct be_cmd_bhs);
4786         io_task->psgl_handle = NULL;
4787         io_task->pwrb_handle = NULL;
4788
4789         if (task->sc) {
4790                 spin_lock(&phba->io_sgl_lock);
4791                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4792                 spin_unlock(&phba->io_sgl_lock);
4793                 if (!io_task->psgl_handle) {
4794                         beiscsi_log(phba, KERN_ERR,
4795                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4796                                     "BM_%d : Alloc of IO_SGL_ICD Failed"
4797                                     "for the CID : %d\n",
4798                                     beiscsi_conn->beiscsi_conn_cid);
4799                         goto free_hndls;
4800                 }
4801                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4802                                         beiscsi_conn->beiscsi_conn_cid,
4803                                         &io_task->pwrb_context);
4804                 if (!io_task->pwrb_handle) {
4805                         beiscsi_log(phba, KERN_ERR,
4806                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4807                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4808                                     "for the CID : %d\n",
4809                                     beiscsi_conn->beiscsi_conn_cid);
4810                         goto free_io_hndls;
4811                 }
4812         } else {
4813                 io_task->scsi_cmnd = NULL;
4814                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4815                         beiscsi_conn->task = task;
4816                         if (!beiscsi_conn->login_in_progress) {
4817                                 spin_lock(&phba->mgmt_sgl_lock);
4818                                 io_task->psgl_handle = (struct sgl_handle *)
4819                                                 alloc_mgmt_sgl_handle(phba);
4820                                 spin_unlock(&phba->mgmt_sgl_lock);
4821                                 if (!io_task->psgl_handle) {
4822                                         beiscsi_log(phba, KERN_ERR,
4823                                                     BEISCSI_LOG_IO |
4824                                                     BEISCSI_LOG_CONFIG,
4825                                                     "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4826                                                     "for the CID : %d\n",
4827                                                     beiscsi_conn->
4828                                                     beiscsi_conn_cid);
4829                                         goto free_hndls;
4830                                 }
4831
4832                                 beiscsi_conn->login_in_progress = 1;
4833                                 beiscsi_conn->plogin_sgl_handle =
4834                                                         io_task->psgl_handle;
4835                                 io_task->pwrb_handle =
4836                                         alloc_wrb_handle(phba,
4837                                         beiscsi_conn->beiscsi_conn_cid,
4838                                         &io_task->pwrb_context);
4839                                 if (!io_task->pwrb_handle) {
4840                                         beiscsi_log(phba, KERN_ERR,
4841                                                     BEISCSI_LOG_IO |
4842                                                     BEISCSI_LOG_CONFIG,
4843                                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4844                                                     "for the CID : %d\n",
4845                                                     beiscsi_conn->
4846                                                     beiscsi_conn_cid);
4847                                         goto free_mgmt_hndls;
4848                                 }
4849                                 beiscsi_conn->plogin_wrb_handle =
4850                                                         io_task->pwrb_handle;
4851
4852                         } else {
4853                                 io_task->psgl_handle =
4854                                                 beiscsi_conn->plogin_sgl_handle;
4855                                 io_task->pwrb_handle =
4856                                                 beiscsi_conn->plogin_wrb_handle;
4857                         }
4858                 } else {
4859                         spin_lock(&phba->mgmt_sgl_lock);
4860                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4861                         spin_unlock(&phba->mgmt_sgl_lock);
4862                         if (!io_task->psgl_handle) {
4863                                 beiscsi_log(phba, KERN_ERR,
4864                                             BEISCSI_LOG_IO |
4865                                             BEISCSI_LOG_CONFIG,
4866                                             "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4867                                             "for the CID : %d\n",
4868                                             beiscsi_conn->
4869                                             beiscsi_conn_cid);
4870                                 goto free_hndls;
4871                         }
4872                         io_task->pwrb_handle =
4873                                         alloc_wrb_handle(phba,
4874                                         beiscsi_conn->beiscsi_conn_cid,
4875                                         &io_task->pwrb_context);
4876                         if (!io_task->pwrb_handle) {
4877                                 beiscsi_log(phba, KERN_ERR,
4878                                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4879                                             "BM_%d : Alloc of WRB_HANDLE Failed"
4880                                             "for the CID : %d\n",
4881                                             beiscsi_conn->beiscsi_conn_cid);
4882                                 goto free_mgmt_hndls;
4883                         }
4884
4885                 }
4886         }
4887         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4888                                  wrb_index << 16) | (unsigned int)
4889                                 (io_task->psgl_handle->sgl_index));
4890         io_task->pwrb_handle->pio_handle = task;
4891
4892         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4893         return 0;
4894
4895 free_io_hndls:
4896         spin_lock(&phba->io_sgl_lock);
4897         free_io_sgl_handle(phba, io_task->psgl_handle);
4898         spin_unlock(&phba->io_sgl_lock);
4899         goto free_hndls;
4900 free_mgmt_hndls:
4901         spin_lock(&phba->mgmt_sgl_lock);
4902         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4903         io_task->psgl_handle = NULL;
4904         spin_unlock(&phba->mgmt_sgl_lock);
4905 free_hndls:
4906         phwi_ctrlr = phba->phwi_ctrlr;
4907         cri_index = BE_GET_CRI_FROM_CID(
4908         beiscsi_conn->beiscsi_conn_cid);
4909         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4910         if (io_task->pwrb_handle)
4911                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4912         io_task->pwrb_handle = NULL;
4913         pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4914                       io_task->bhs_pa.u.a64.address);
4915         io_task->cmd_bhs = NULL;
4916         return -ENOMEM;
4917 }
4918 int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4919                        unsigned int num_sg, unsigned int xferlen,
4920                        unsigned int writedir)
4921 {
4922
4923         struct beiscsi_io_task *io_task = task->dd_data;
4924         struct iscsi_conn *conn = task->conn;
4925         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4926         struct beiscsi_hba *phba = beiscsi_conn->phba;
4927         struct iscsi_wrb *pwrb = NULL;
4928         unsigned int doorbell = 0;
4929
4930         pwrb = io_task->pwrb_handle->pwrb;
4931
4932         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4933         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4934
4935         if (writedir) {
4936                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4937                               INI_WR_CMD);
4938                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4939         } else {
4940                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4941                               INI_RD_CMD);
4942                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4943         }
4944
4945         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4946                                           type, pwrb);
4947
4948         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4949                       cpu_to_be16(*(unsigned short *)
4950                       &io_task->cmd_bhs->iscsi_hdr.lun));
4951         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4952         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4953                       io_task->pwrb_handle->wrb_index);
4954         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4955                       be32_to_cpu(task->cmdsn));
4956         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4957                       io_task->psgl_handle->sgl_index);
4958
4959         hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4960         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4961                       io_task->pwrb_handle->wrb_index);
4962         if (io_task->pwrb_context->plast_wrb)
4963                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4964                               io_task->pwrb_context->plast_wrb,
4965                               io_task->pwrb_handle->wrb_index);
4966         io_task->pwrb_context->plast_wrb = pwrb;
4967
4968         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4969
4970         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4971         doorbell |= (io_task->pwrb_handle->wrb_index &
4972                      DB_DEF_PDU_WRB_INDEX_MASK) <<
4973                      DB_DEF_PDU_WRB_INDEX_SHIFT;
4974         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4975         iowrite32(doorbell, phba->db_va +
4976                   beiscsi_conn->doorbell_offset);
4977         return 0;
4978 }
4979
4980 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4981                           unsigned int num_sg, unsigned int xferlen,
4982                           unsigned int writedir)
4983 {
4984
4985         struct beiscsi_io_task *io_task = task->dd_data;
4986         struct iscsi_conn *conn = task->conn;
4987         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4988         struct beiscsi_hba *phba = beiscsi_conn->phba;
4989         struct iscsi_wrb *pwrb = NULL;
4990         unsigned int doorbell = 0;
4991
4992         pwrb = io_task->pwrb_handle->pwrb;
4993         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4994         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4995
4996         if (writedir) {
4997                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4998                               INI_WR_CMD);
4999                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
5000         } else {
5001                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
5002                               INI_RD_CMD);
5003                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
5004         }
5005
5006         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
5007                                           type, pwrb);
5008
5009         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
5010                       cpu_to_be16(*(unsigned short *)
5011                                   &io_task->cmd_bhs->iscsi_hdr.lun));
5012         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
5013         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
5014                       io_task->pwrb_handle->wrb_index);
5015         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
5016                       be32_to_cpu(task->cmdsn));
5017         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
5018                       io_task->psgl_handle->sgl_index);
5019
5020         hwi_write_sgl(pwrb, sg, num_sg, io_task);
5021
5022         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
5023                       io_task->pwrb_handle->wrb_index);
5024         if (io_task->pwrb_context->plast_wrb)
5025                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
5026                               io_task->pwrb_context->plast_wrb,
5027                               io_task->pwrb_handle->wrb_index);
5028         io_task->pwrb_context->plast_wrb = pwrb;
5029
5030         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
5031
5032         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
5033         doorbell |= (io_task->pwrb_handle->wrb_index &
5034                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
5035         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
5036
5037         iowrite32(doorbell, phba->db_va +
5038                   beiscsi_conn->doorbell_offset);
5039         return 0;
5040 }
5041
5042 static int beiscsi_mtask(struct iscsi_task *task)
5043 {
5044         struct beiscsi_io_task *io_task = task->dd_data;
5045         struct iscsi_conn *conn = task->conn;
5046         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
5047         struct beiscsi_hba *phba = beiscsi_conn->phba;
5048         struct iscsi_wrb *pwrb = NULL;
5049         unsigned int doorbell = 0;
5050         unsigned int cid;
5051         unsigned int pwrb_typeoffset = 0;
5052         int ret = 0;
5053
5054         cid = beiscsi_conn->beiscsi_conn_cid;
5055         pwrb = io_task->pwrb_handle->pwrb;
5056         memset(pwrb, 0, sizeof(*pwrb));
5057
5058         if (is_chip_be2_be3r(phba)) {
5059                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
5060                               be32_to_cpu(task->cmdsn));
5061                 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
5062                               io_task->pwrb_handle->wrb_index);
5063                 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
5064                               io_task->psgl_handle->sgl_index);
5065                 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
5066                               task->data_count);
5067                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
5068                               io_task->pwrb_handle->wrb_index);
5069                 if (io_task->pwrb_context->plast_wrb)
5070                         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
5071                                       io_task->pwrb_context->plast_wrb,
5072                                       io_task->pwrb_handle->wrb_index);
5073                 io_task->pwrb_context->plast_wrb = pwrb;
5074
5075                 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
5076         } else {
5077                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
5078                               be32_to_cpu(task->cmdsn));
5079                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
5080                               io_task->pwrb_handle->wrb_index);
5081                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
5082                               io_task->psgl_handle->sgl_index);
5083                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
5084                               task->data_count);
5085                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
5086                               io_task->pwrb_handle->wrb_index);
5087                 if (io_task->pwrb_context->plast_wrb)
5088                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
5089                                       io_task->pwrb_context->plast_wrb,
5090                                       io_task->pwrb_handle->wrb_index);
5091                 io_task->pwrb_context->plast_wrb = pwrb;
5092
5093                 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
5094         }
5095
5096
5097         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
5098         case ISCSI_OP_LOGIN:
5099                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
5100                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5101                 ret = hwi_write_buffer(pwrb, task);
5102                 break;
5103         case ISCSI_OP_NOOP_OUT:
5104                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
5105                         ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5106                         if (is_chip_be2_be3r(phba))
5107                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
5108                                               dmsg, pwrb, 1);
5109                         else
5110                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5111                                               dmsg, pwrb, 1);
5112                 } else {
5113                         ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
5114                         if (is_chip_be2_be3r(phba))
5115                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
5116                                               dmsg, pwrb, 0);
5117                         else
5118                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5119                                               dmsg, pwrb, 0);
5120                 }
5121                 ret = hwi_write_buffer(pwrb, task);
5122                 break;
5123         case ISCSI_OP_TEXT:
5124                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5125                 ret = hwi_write_buffer(pwrb, task);
5126                 break;
5127         case ISCSI_OP_SCSI_TMFUNC:
5128                 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
5129                 ret = hwi_write_buffer(pwrb, task);
5130                 break;
5131         case ISCSI_OP_LOGOUT:
5132                 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
5133                 ret = hwi_write_buffer(pwrb, task);
5134                 break;
5135
5136         default:
5137                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5138                             "BM_%d : opcode =%d Not supported\n",
5139                             task->hdr->opcode & ISCSI_OPCODE_MASK);
5140
5141                 return -EINVAL;
5142         }
5143
5144         if (ret)
5145                 return ret;
5146
5147         /* Set the task type */
5148         io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
5149                 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
5150                 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
5151
5152         doorbell |= cid & DB_WRB_POST_CID_MASK;
5153         doorbell |= (io_task->pwrb_handle->wrb_index &
5154                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
5155         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
5156         iowrite32(doorbell, phba->db_va +
5157                   beiscsi_conn->doorbell_offset);
5158         return 0;
5159 }
5160
5161 static int beiscsi_task_xmit(struct iscsi_task *task)
5162 {
5163         struct beiscsi_io_task *io_task = task->dd_data;
5164         struct scsi_cmnd *sc = task->sc;
5165         struct beiscsi_hba *phba = NULL;
5166         struct scatterlist *sg;
5167         int num_sg;
5168         unsigned int  writedir = 0, xferlen = 0;
5169
5170         phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;
5171
5172         if (!sc)
5173                 return beiscsi_mtask(task);
5174
5175         io_task->scsi_cmnd = sc;
5176         num_sg = scsi_dma_map(sc);
5177         if (num_sg < 0) {
5178                 struct iscsi_conn *conn = task->conn;
5179                 struct beiscsi_hba *phba = NULL;
5180
5181                 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
5182                 beiscsi_log(phba, KERN_ERR,
5183                             BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
5184                             "BM_%d : scsi_dma_map Failed "
5185                             "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
5186                             be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
5187                             io_task->libiscsi_itt, scsi_bufflen(sc));
5188
5189                 return num_sg;
5190         }
5191         xferlen = scsi_bufflen(sc);
5192         sg = scsi_sglist(sc);
5193         if (sc->sc_data_direction == DMA_TO_DEVICE)
5194                 writedir = 1;
5195          else
5196                 writedir = 0;
5197
5198          return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
5199 }
5200
5201 /**
5202  * beiscsi_bsg_request - handle bsg request from ISCSI transport
5203  * @job: job to handle
5204  */
5205 static int beiscsi_bsg_request(struct bsg_job *job)
5206 {
5207         struct Scsi_Host *shost;
5208         struct beiscsi_hba *phba;
5209         struct iscsi_bsg_request *bsg_req = job->request;
5210         int rc = -EINVAL;
5211         unsigned int tag;
5212         struct be_dma_mem nonemb_cmd;
5213         struct be_cmd_resp_hdr *resp;
5214         struct iscsi_bsg_reply *bsg_reply = job->reply;
5215         unsigned short status, extd_status;
5216
5217         shost = iscsi_job_to_shost(job);
5218         phba = iscsi_host_priv(shost);
5219
5220         switch (bsg_req->msgcode) {
5221         case ISCSI_BSG_HST_VENDOR:
5222                 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
5223                                         job->request_payload.payload_len,
5224                                         &nonemb_cmd.dma);
5225                 if (nonemb_cmd.va == NULL) {
5226                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5227                                     "BM_%d : Failed to allocate memory for "
5228                                     "beiscsi_bsg_request\n");
5229                         return -ENOMEM;
5230                 }
5231                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
5232                                                   &nonemb_cmd);
5233                 if (!tag) {
5234                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5235                                     "BM_%d : MBX Tag Allocation Failed\n");
5236
5237                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5238                                             nonemb_cmd.va, nonemb_cmd.dma);
5239                         return -EAGAIN;
5240                 }
5241
5242                 rc = wait_event_interruptible_timeout(
5243                                         phba->ctrl.mcc_wait[tag],
5244                                         phba->ctrl.mcc_numtag[tag],
5245                                         msecs_to_jiffies(
5246                                         BEISCSI_HOST_MBX_TIMEOUT));
5247                 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
5248                 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
5249                 free_mcc_tag(&phba->ctrl, tag);
5250                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
5251                 sg_copy_from_buffer(job->reply_payload.sg_list,
5252                                     job->reply_payload.sg_cnt,
5253                                     nonemb_cmd.va, (resp->response_length
5254                                     + sizeof(*resp)));
5255                 bsg_reply->reply_payload_rcv_len = resp->response_length;
5256                 bsg_reply->result = status;
5257                 bsg_job_done(job, bsg_reply->result,
5258                              bsg_reply->reply_payload_rcv_len);
5259                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5260                                     nonemb_cmd.va, nonemb_cmd.dma);
5261                 if (status || extd_status) {
5262                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5263                                     "BM_%d : MBX Cmd Failed"
5264                                     " status = %d extd_status = %d\n",
5265                                     status, extd_status);
5266
5267                         return -EIO;
5268                 } else {
5269                         rc = 0;
5270                 }
5271                 break;
5272
5273         default:
5274                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5275                                 "BM_%d : Unsupported bsg command: 0x%x\n",
5276                                 bsg_req->msgcode);
5277                 break;
5278         }
5279
5280         return rc;
5281 }
5282
5283 void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
5284 {
5285         /* Set the logging parameter */
5286         beiscsi_log_enable_init(phba, beiscsi_log_enable);
5287 }
5288
5289 /*
5290  * beiscsi_quiesce()- Cleanup Driver resources
5291  * @phba: Instance Priv structure
5292  * @unload_state:i Clean or EEH unload state
5293  *
5294  * Free the OS and HW resources held by the driver
5295  **/
5296 static void beiscsi_quiesce(struct beiscsi_hba *phba,
5297                 uint32_t unload_state)
5298 {
5299         struct hwi_controller *phwi_ctrlr;
5300         struct hwi_context_memory *phwi_context;
5301         struct be_eq_obj *pbe_eq;
5302         unsigned int i, msix_vec;
5303
5304         phwi_ctrlr = phba->phwi_ctrlr;
5305         phwi_context = phwi_ctrlr->phwi_ctxt;
5306         hwi_disable_intr(phba);
5307         if (phba->msix_enabled) {
5308                 for (i = 0; i <= phba->num_cpus; i++) {
5309                         msix_vec = phba->msix_entries[i].vector;
5310                         synchronize_irq(msix_vec);
5311                         free_irq(msix_vec, &phwi_context->be_eq[i]);
5312                         kfree(phba->msi_name[i]);
5313                 }
5314         } else
5315                 if (phba->pcidev->irq) {
5316                         synchronize_irq(phba->pcidev->irq);
5317                         free_irq(phba->pcidev->irq, phba);
5318                 }
5319         pci_disable_msix(phba->pcidev);
5320         cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
5321
5322         for (i = 0; i < phba->num_cpus; i++) {
5323                 pbe_eq = &phwi_context->be_eq[i];
5324                 irq_poll_disable(&pbe_eq->iopoll);
5325         }
5326
5327         if (unload_state == BEISCSI_CLEAN_UNLOAD) {
5328                 destroy_workqueue(phba->wq);
5329                 beiscsi_clean_port(phba);
5330                 beiscsi_free_mem(phba);
5331
5332                 beiscsi_unmap_pci_function(phba);
5333                 pci_free_consistent(phba->pcidev,
5334                                     phba->ctrl.mbox_mem_alloced.size,
5335                                     phba->ctrl.mbox_mem_alloced.va,
5336                                     phba->ctrl.mbox_mem_alloced.dma);
5337         } else {
5338                 hwi_purge_eq(phba);
5339                 hwi_cleanup(phba);
5340         }
5341
5342 }
5343
5344 static void beiscsi_remove(struct pci_dev *pcidev)
5345 {
5346         struct beiscsi_hba *phba = NULL;
5347
5348         phba = pci_get_drvdata(pcidev);
5349         if (!phba) {
5350                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5351                 return;
5352         }
5353
5354         beiscsi_destroy_def_ifaces(phba);
5355         iscsi_boot_destroy_kset(phba->boot_kset);
5356         iscsi_host_remove(phba->shost);
5357         beiscsi_quiesce(phba, BEISCSI_CLEAN_UNLOAD);
5358         pci_dev_put(phba->pcidev);
5359         iscsi_host_free(phba->shost);
5360         pci_disable_pcie_error_reporting(pcidev);
5361         pci_set_drvdata(pcidev, NULL);
5362         pci_release_regions(pcidev);
5363         pci_disable_device(pcidev);
5364 }
5365
5366 static void beiscsi_msix_enable(struct beiscsi_hba *phba)
5367 {
5368         int i, status;
5369
5370         for (i = 0; i <= phba->num_cpus; i++)
5371                 phba->msix_entries[i].entry = i;
5372
5373         status = pci_enable_msix_range(phba->pcidev, phba->msix_entries,
5374                                        phba->num_cpus + 1, phba->num_cpus + 1);
5375         if (status > 0)
5376                 phba->msix_enabled = true;
5377
5378         return;
5379 }
5380
5381 static void be_eqd_update(struct beiscsi_hba *phba)
5382 {
5383         struct be_set_eqd set_eqd[MAX_CPUS];
5384         struct be_aic_obj *aic;
5385         struct be_eq_obj *pbe_eq;
5386         struct hwi_controller *phwi_ctrlr;
5387         struct hwi_context_memory *phwi_context;
5388         int eqd, i, num = 0;
5389         ulong now;
5390         u32 pps, delta;
5391         unsigned int tag;
5392
5393         phwi_ctrlr = phba->phwi_ctrlr;
5394         phwi_context = phwi_ctrlr->phwi_ctxt;
5395
5396         for (i = 0; i <= phba->num_cpus; i++) {
5397                 aic = &phba->aic_obj[i];
5398                 pbe_eq = &phwi_context->be_eq[i];
5399                 now = jiffies;
5400                 if (!aic->jiffs || time_before(now, aic->jiffs) ||
5401                     pbe_eq->cq_count < aic->eq_prev) {
5402                         aic->jiffs = now;
5403                         aic->eq_prev = pbe_eq->cq_count;
5404                         continue;
5405                 }
5406                 delta = jiffies_to_msecs(now - aic->jiffs);
5407                 pps = (((u32)(pbe_eq->cq_count - aic->eq_prev) * 1000) / delta);
5408                 eqd = (pps / 1500) << 2;
5409
5410                 if (eqd < 8)
5411                         eqd = 0;
5412                 eqd = min_t(u32, eqd, phwi_context->max_eqd);
5413                 eqd = max_t(u32, eqd, phwi_context->min_eqd);
5414
5415                 aic->jiffs = now;
5416                 aic->eq_prev = pbe_eq->cq_count;
5417
5418                 if (eqd != aic->prev_eqd) {
5419                         set_eqd[num].delay_multiplier = (eqd * 65)/100;
5420                         set_eqd[num].eq_id = pbe_eq->q.id;
5421                         aic->prev_eqd = eqd;
5422                         num++;
5423                 }
5424         }
5425         if (num) {
5426                 tag = be_cmd_modify_eq_delay(phba, set_eqd, num);
5427                 if (tag)
5428                         beiscsi_mccq_compl(phba, tag, NULL, NULL);
5429         }
5430 }
5431
5432 static void be_check_boot_session(struct beiscsi_hba *phba)
5433 {
5434         if (beiscsi_setup_boot_info(phba))
5435                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5436                             "BM_%d : Could not set up "
5437                             "iSCSI boot info on async event.\n");
5438 }
5439
5440 /*
5441  * beiscsi_hw_health_check()- Check adapter health
5442  * @work: work item to check HW health
5443  *
5444  * Check if adapter in an unrecoverable state or not.
5445  **/
5446 static void
5447 beiscsi_hw_health_check(struct work_struct *work)
5448 {
5449         struct beiscsi_hba *phba =
5450                 container_of(work, struct beiscsi_hba,
5451                              beiscsi_hw_check_task.work);
5452
5453         be_eqd_update(phba);
5454
5455         if (phba->state & BE_ADAPTER_CHECK_BOOT) {
5456                 if ((phba->get_boot > 0) && (!phba->boot_kset)) {
5457                         phba->get_boot--;
5458                         if (!(phba->get_boot % BE_GET_BOOT_TO))
5459                                 be_check_boot_session(phba);
5460                 } else {
5461                         phba->state &= ~BE_ADAPTER_CHECK_BOOT;
5462                         phba->get_boot = 0;
5463                 }
5464         }
5465
5466         beiscsi_ue_detect(phba);
5467
5468         schedule_delayed_work(&phba->beiscsi_hw_check_task,
5469                               msecs_to_jiffies(1000));
5470 }
5471
5472
5473 static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
5474                 pci_channel_state_t state)
5475 {
5476         struct beiscsi_hba *phba = NULL;
5477
5478         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5479         phba->state |= BE_ADAPTER_PCI_ERR;
5480
5481         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5482                     "BM_%d : EEH error detected\n");
5483
5484         beiscsi_quiesce(phba, BEISCSI_EEH_UNLOAD);
5485
5486         if (state == pci_channel_io_perm_failure) {
5487                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5488                             "BM_%d : EEH : State PERM Failure");
5489                 return PCI_ERS_RESULT_DISCONNECT;
5490         }
5491
5492         pci_disable_device(pdev);
5493
5494         /* The error could cause the FW to trigger a flash debug dump.
5495          * Resetting the card while flash dump is in progress
5496          * can cause it not to recover; wait for it to finish.
5497          * Wait only for first function as it is needed only once per
5498          * adapter.
5499          **/
5500         if (pdev->devfn == 0)
5501                 ssleep(30);
5502
5503         return PCI_ERS_RESULT_NEED_RESET;
5504 }
5505
5506 static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
5507 {
5508         struct beiscsi_hba *phba = NULL;
5509         int status = 0;
5510
5511         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5512
5513         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5514                     "BM_%d : EEH Reset\n");
5515
5516         status = pci_enable_device(pdev);
5517         if (status)
5518                 return PCI_ERS_RESULT_DISCONNECT;
5519
5520         pci_set_master(pdev);
5521         pci_set_power_state(pdev, PCI_D0);
5522         pci_restore_state(pdev);
5523
5524         /* Wait for the CHIP Reset to complete */
5525         status = be_chk_reset_complete(phba);
5526         if (!status) {
5527                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5528                             "BM_%d : EEH Reset Completed\n");
5529         } else {
5530                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5531                             "BM_%d : EEH Reset Completion Failure\n");
5532                 return PCI_ERS_RESULT_DISCONNECT;
5533         }
5534
5535         pci_cleanup_aer_uncorrect_error_status(pdev);
5536         return PCI_ERS_RESULT_RECOVERED;
5537 }
5538
5539 static void beiscsi_eeh_resume(struct pci_dev *pdev)
5540 {
5541         int ret = 0, i;
5542         struct be_eq_obj *pbe_eq;
5543         struct beiscsi_hba *phba = NULL;
5544         struct hwi_controller *phwi_ctrlr;
5545         struct hwi_context_memory *phwi_context;
5546
5547         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5548         pci_save_state(pdev);
5549
5550         if (enable_msix)
5551                 find_num_cpus(phba);
5552         else
5553                 phba->num_cpus = 1;
5554
5555         if (enable_msix) {
5556                 beiscsi_msix_enable(phba);
5557                 if (!phba->msix_enabled)
5558                         phba->num_cpus = 1;
5559         }
5560
5561         ret = beiscsi_cmd_reset_function(phba);
5562         if (ret) {
5563                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5564                             "BM_%d : Reset Failed\n");
5565                 goto ret_err;
5566         }
5567
5568         ret = be_chk_reset_complete(phba);
5569         if (ret) {
5570                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5571                             "BM_%d : Failed to get out of reset.\n");
5572                 goto ret_err;
5573         }
5574
5575         beiscsi_get_params(phba);
5576         phba->shost->max_id = phba->params.cxns_per_ctrl;
5577         phba->shost->can_queue = phba->params.ios_per_ctrl;
5578         ret = hwi_init_controller(phba);
5579
5580         for (i = 0; i < MAX_MCC_CMD; i++) {
5581                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5582                 phba->ctrl.mcc_tag[i] = i + 1;
5583                 phba->ctrl.mcc_numtag[i + 1] = 0;
5584                 phba->ctrl.mcc_tag_available++;
5585         }
5586
5587         phwi_ctrlr = phba->phwi_ctrlr;
5588         phwi_context = phwi_ctrlr->phwi_ctxt;
5589
5590         for (i = 0; i < phba->num_cpus; i++) {
5591                 pbe_eq = &phwi_context->be_eq[i];
5592                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget,
5593                                 be_iopoll);
5594         }
5595
5596         i = (phba->msix_enabled) ? i : 0;
5597         /* Work item for MCC handling */
5598         pbe_eq = &phwi_context->be_eq[i];
5599         INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5600
5601         ret = beiscsi_init_irqs(phba);
5602         if (ret < 0) {
5603                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5604                             "BM_%d : beiscsi_eeh_resume - "
5605                             "Failed to beiscsi_init_irqs\n");
5606                 goto ret_err;
5607         }
5608
5609         hwi_enable_intr(phba);
5610         phba->state &= ~BE_ADAPTER_PCI_ERR;
5611
5612         return;
5613 ret_err:
5614         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5615                     "BM_%d : AER EEH Resume Failed\n");
5616 }
5617
5618 static int beiscsi_dev_probe(struct pci_dev *pcidev,
5619                              const struct pci_device_id *id)
5620 {
5621         struct beiscsi_hba *phba = NULL;
5622         struct hwi_controller *phwi_ctrlr;
5623         struct hwi_context_memory *phwi_context;
5624         struct be_eq_obj *pbe_eq;
5625         int ret = 0, i;
5626
5627         ret = beiscsi_enable_pci(pcidev);
5628         if (ret < 0) {
5629                 dev_err(&pcidev->dev,
5630                         "beiscsi_dev_probe - Failed to enable pci device\n");
5631                 return ret;
5632         }
5633
5634         phba = beiscsi_hba_alloc(pcidev);
5635         if (!phba) {
5636                 dev_err(&pcidev->dev,
5637                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5638                 goto disable_pci;
5639         }
5640
5641         /* Enable EEH reporting */
5642         ret = pci_enable_pcie_error_reporting(pcidev);
5643         if (ret)
5644                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5645                             "BM_%d : PCIe Error Reporting "
5646                             "Enabling Failed\n");
5647
5648         pci_save_state(pcidev);
5649
5650         /* Initialize Driver configuration Paramters */
5651         beiscsi_hba_attrs_init(phba);
5652
5653         phba->fw_timeout = false;
5654         phba->mac_addr_set = false;
5655
5656
5657         switch (pcidev->device) {
5658         case BE_DEVICE_ID1:
5659         case OC_DEVICE_ID1:
5660         case OC_DEVICE_ID2:
5661                 phba->generation = BE_GEN2;
5662                 phba->iotask_fn = beiscsi_iotask;
5663                 break;
5664         case BE_DEVICE_ID2:
5665         case OC_DEVICE_ID3:
5666                 phba->generation = BE_GEN3;
5667                 phba->iotask_fn = beiscsi_iotask;
5668                 break;
5669         case OC_SKH_ID1:
5670                 phba->generation = BE_GEN4;
5671                 phba->iotask_fn = beiscsi_iotask_v2;
5672                 break;
5673         default:
5674                 phba->generation = 0;
5675         }
5676
5677         ret = be_ctrl_init(phba, pcidev);
5678         if (ret) {
5679                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5680                             "BM_%d : beiscsi_dev_probe-"
5681                             "Failed in be_ctrl_init\n");
5682                 goto hba_free;
5683         }
5684
5685         /*
5686          * FUNCTION_RESET should clean up any stale info in FW for this fn
5687          */
5688         ret = beiscsi_cmd_reset_function(phba);
5689         if (ret) {
5690                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5691                             "BM_%d : Reset Failed\n");
5692                 goto hba_free;
5693         }
5694         ret = be_chk_reset_complete(phba);
5695         if (ret) {
5696                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5697                             "BM_%d : Failed to get out of reset.\n");
5698                 goto hba_free;
5699         }
5700
5701         spin_lock_init(&phba->io_sgl_lock);
5702         spin_lock_init(&phba->mgmt_sgl_lock);
5703         spin_lock_init(&phba->isr_lock);
5704         spin_lock_init(&phba->async_pdu_lock);
5705         ret = mgmt_get_fw_config(&phba->ctrl, phba);
5706         if (ret != 0) {
5707                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5708                             "BM_%d : Error getting fw config\n");
5709                 goto free_port;
5710         }
5711         mgmt_get_port_name(&phba->ctrl, phba);
5712         beiscsi_get_params(phba);
5713
5714         if (enable_msix)
5715                 find_num_cpus(phba);
5716         else
5717                 phba->num_cpus = 1;
5718
5719         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5720                     "BM_%d : num_cpus = %d\n",
5721                     phba->num_cpus);
5722
5723         if (enable_msix) {
5724                 beiscsi_msix_enable(phba);
5725                 if (!phba->msix_enabled)
5726                         phba->num_cpus = 1;
5727         }
5728
5729         phba->shost->max_id = phba->params.cxns_per_ctrl;
5730         phba->shost->can_queue = phba->params.ios_per_ctrl;
5731         ret = beiscsi_init_port(phba);
5732         if (ret < 0) {
5733                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5734                             "BM_%d : beiscsi_dev_probe-"
5735                             "Failed in beiscsi_init_port\n");
5736                 goto free_port;
5737         }
5738
5739         for (i = 0; i < MAX_MCC_CMD; i++) {
5740                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5741                 phba->ctrl.mcc_tag[i] = i + 1;
5742                 phba->ctrl.mcc_numtag[i + 1] = 0;
5743                 phba->ctrl.mcc_tag_available++;
5744                 memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
5745                        sizeof(struct be_dma_mem));
5746         }
5747
5748         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5749
5750         snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
5751                  phba->shost->host_no);
5752         phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
5753         if (!phba->wq) {
5754                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5755                             "BM_%d : beiscsi_dev_probe-"
5756                             "Failed to allocate work queue\n");
5757                 goto free_twq;
5758         }
5759
5760         INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
5761                           beiscsi_hw_health_check);
5762
5763         phwi_ctrlr = phba->phwi_ctrlr;
5764         phwi_context = phwi_ctrlr->phwi_ctxt;
5765
5766         for (i = 0; i < phba->num_cpus; i++) {
5767                 pbe_eq = &phwi_context->be_eq[i];
5768                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget,
5769                                 be_iopoll);
5770         }
5771
5772         i = (phba->msix_enabled) ? i : 0;
5773         /* Work item for MCC handling */
5774         pbe_eq = &phwi_context->be_eq[i];
5775         INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5776
5777         ret = beiscsi_init_irqs(phba);
5778         if (ret < 0) {
5779                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5780                             "BM_%d : beiscsi_dev_probe-"
5781                             "Failed to beiscsi_init_irqs\n");
5782                 goto free_blkenbld;
5783         }
5784         hwi_enable_intr(phba);
5785
5786         if (iscsi_host_add(phba->shost, &phba->pcidev->dev))
5787                 goto free_blkenbld;
5788
5789         if (beiscsi_setup_boot_info(phba))
5790                 /*
5791                  * log error but continue, because we may not be using
5792                  * iscsi boot.
5793                  */
5794                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5795                             "BM_%d : Could not set up "
5796                             "iSCSI boot info.\n");
5797
5798         beiscsi_create_def_ifaces(phba);
5799         schedule_delayed_work(&phba->beiscsi_hw_check_task,
5800                               msecs_to_jiffies(1000));
5801
5802         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5803                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5804         return 0;
5805
5806 free_blkenbld:
5807         destroy_workqueue(phba->wq);
5808         for (i = 0; i < phba->num_cpus; i++) {
5809                 pbe_eq = &phwi_context->be_eq[i];
5810                 irq_poll_disable(&pbe_eq->iopoll);
5811         }
5812 free_twq:
5813         beiscsi_clean_port(phba);
5814         beiscsi_free_mem(phba);
5815 free_port:
5816         pci_free_consistent(phba->pcidev,
5817                             phba->ctrl.mbox_mem_alloced.size,
5818                             phba->ctrl.mbox_mem_alloced.va,
5819                            phba->ctrl.mbox_mem_alloced.dma);
5820         beiscsi_unmap_pci_function(phba);
5821 hba_free:
5822         if (phba->msix_enabled)
5823                 pci_disable_msix(phba->pcidev);
5824         pci_dev_put(phba->pcidev);
5825         iscsi_host_free(phba->shost);
5826         pci_set_drvdata(pcidev, NULL);
5827 disable_pci:
5828         pci_release_regions(pcidev);
5829         pci_disable_device(pcidev);
5830         return ret;
5831 }
5832
5833 static struct pci_error_handlers beiscsi_eeh_handlers = {
5834         .error_detected = beiscsi_eeh_err_detected,
5835         .slot_reset = beiscsi_eeh_reset,
5836         .resume = beiscsi_eeh_resume,
5837 };
5838
5839 struct iscsi_transport beiscsi_iscsi_transport = {
5840         .owner = THIS_MODULE,
5841         .name = DRV_NAME,
5842         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5843                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
5844         .create_session = beiscsi_session_create,
5845         .destroy_session = beiscsi_session_destroy,
5846         .create_conn = beiscsi_conn_create,
5847         .bind_conn = beiscsi_conn_bind,
5848         .destroy_conn = iscsi_conn_teardown,
5849         .attr_is_visible = be2iscsi_attr_is_visible,
5850         .set_iface_param = be2iscsi_iface_set_param,
5851         .get_iface_param = be2iscsi_iface_get_param,
5852         .set_param = beiscsi_set_param,
5853         .get_conn_param = iscsi_conn_get_param,
5854         .get_session_param = iscsi_session_get_param,
5855         .get_host_param = beiscsi_get_host_param,
5856         .start_conn = beiscsi_conn_start,
5857         .stop_conn = iscsi_conn_stop,
5858         .send_pdu = iscsi_conn_send_pdu,
5859         .xmit_task = beiscsi_task_xmit,
5860         .cleanup_task = beiscsi_cleanup_task,
5861         .alloc_pdu = beiscsi_alloc_pdu,
5862         .parse_pdu_itt = beiscsi_parse_pdu,
5863         .get_stats = beiscsi_conn_get_stats,
5864         .get_ep_param = beiscsi_ep_get_param,
5865         .ep_connect = beiscsi_ep_connect,
5866         .ep_poll = beiscsi_ep_poll,
5867         .ep_disconnect = beiscsi_ep_disconnect,
5868         .session_recovery_timedout = iscsi_session_recovery_timedout,
5869         .bsg_request = beiscsi_bsg_request,
5870 };
5871
5872 static struct pci_driver beiscsi_pci_driver = {
5873         .name = DRV_NAME,
5874         .probe = beiscsi_dev_probe,
5875         .remove = beiscsi_remove,
5876         .id_table = beiscsi_pci_id_table,
5877         .err_handler = &beiscsi_eeh_handlers
5878 };
5879
5880
5881 static int __init beiscsi_module_init(void)
5882 {
5883         int ret;
5884
5885         beiscsi_scsi_transport =
5886                         iscsi_register_transport(&beiscsi_iscsi_transport);
5887         if (!beiscsi_scsi_transport) {
5888                 printk(KERN_ERR
5889                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5890                 return -ENOMEM;
5891         }
5892         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5893                &beiscsi_iscsi_transport);
5894
5895         ret = pci_register_driver(&beiscsi_pci_driver);
5896         if (ret) {
5897                 printk(KERN_ERR
5898                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5899                 goto unregister_iscsi_transport;
5900         }
5901         return 0;
5902
5903 unregister_iscsi_transport:
5904         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5905         return ret;
5906 }
5907
5908 static void __exit beiscsi_module_exit(void)
5909 {
5910         pci_unregister_driver(&beiscsi_pci_driver);
5911         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5912 }
5913
5914 module_init(beiscsi_module_init);
5915 module_exit(beiscsi_module_exit);