drivers/scsi/be2iscsi/be_main.c

   1 /**
   2  * Copyright (C) 2005 - 2015 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Written by: Jayamohan Kallickal (jayamohan.kallickal@avagotech.com)
  11  *
  12  * Contact Information:
  13  * linux-drivers@avagotech.com
  14  *
  15  * Emulex
  16  * 3333 Susan Street
  17  * Costa Mesa, CA 92626
  18  */
  19
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/blkdev.h>
  25 #include <linux/pci.h>
  26 #include <linux/string.h>
  27 #include <linux/kernel.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/iscsi_boot_sysfs.h>
  30 #include <linux/module.h>
  31 #include <linux/bsg-lib.h>
  32 #include <linux/irq_poll.h>
  33
  34 #include <scsi/libiscsi.h>
  35 #include <scsi/scsi_bsg_iscsi.h>
  36 #include <scsi/scsi_netlink.h>
  37 #include <scsi/scsi_transport_iscsi.h>
  38 #include <scsi/scsi_transport.h>
  39 #include <scsi/scsi_cmnd.h>
  40 #include <scsi/scsi_device.h>
  41 #include <scsi/scsi_host.h>
  42 #include <scsi/scsi.h>
  43 #include "be_main.h"
  44 #include "be_iscsi.h"
  45 #include "be_mgmt.h"
  46 #include "be_cmds.h"
  47
  48 static unsigned int be_iopoll_budget = 10;
  49 static unsigned int be_max_phys_size = 64;
  50 static unsigned int enable_msix = 1;
  51
  52 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  53 MODULE_VERSION(BUILD_STR);
  54 MODULE_AUTHOR("Emulex Corporation");
  55 MODULE_LICENSE("GPL");
  56 module_param(be_iopoll_budget, int, 0);
  57 module_param(enable_msix, int, 0);
  58 module_param(be_max_phys_size, uint, S_IRUGO);
  59 MODULE_PARM_DESC(be_max_phys_size,
  60                 "Maximum Size (In Kilobytes) of physically contiguous "
  61                 "memory that can be allocated. Range is 16 - 128");
  62
  63 #define beiscsi_disp_param(_name)\
  64 ssize_t \
  65 beiscsi_##_name##_disp(struct device *dev,\
  66                         struct device_attribute *attrib, char *buf)     \
  67 {       \
  68         struct Scsi_Host *shost = class_to_shost(dev);\
  69         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  70         uint32_t param_val = 0; \
  71         param_val = phba->attr_##_name;\
  72         return snprintf(buf, PAGE_SIZE, "%d\n",\
  73                         phba->attr_##_name);\
  74 }
  75
  76 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  77 int \
  78 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  79 {\
  80         if (val >= _minval && val <= _maxval) {\
  81                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  82                             "BA_%d : beiscsi_"#_name" updated "\
  83                             "from 0x%x ==> 0x%x\n",\
  84                             phba->attr_##_name, val); \
  85                 phba->attr_##_name = val;\
  86                 return 0;\
  87         } \
  88         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  89                     "BA_%d beiscsi_"#_name" attribute "\
  90                     "cannot be updated to 0x%x, "\
  91                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  92                 return -EINVAL;\
  93 }
  94
  95 #define beiscsi_store_param(_name)  \
  96 ssize_t \
  97 beiscsi_##_name##_store(struct device *dev,\
  98                          struct device_attribute *attr, const char *buf,\
  99                          size_t count) \
 100 { \
 101         struct Scsi_Host  *shost = class_to_shost(dev);\
 102         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
 103         uint32_t param_val = 0;\
 104         if (!isdigit(buf[0]))\
 105                 return -EINVAL;\
 106         if (sscanf(buf, "%i", &param_val) != 1)\
 107                 return -EINVAL;\
 108         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 109                 return strlen(buf);\
 110         else \
 111                 return -EINVAL;\
 112 }
 113
 114 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 115 int \
 116 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 117 { \
 118         if (val >= _minval && val <= _maxval) {\
 119                 phba->attr_##_name = val;\
 120                 return 0;\
 121         } \
 122         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 123                     "BA_%d beiscsi_"#_name" attribute " \
 124                     "cannot be updated to 0x%x, "\
 125                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 126         phba->attr_##_name = _defval;\
 127         return -EINVAL;\
 128 }
 129
 130 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 131 static uint beiscsi_##_name = _defval;\
 132 module_param(beiscsi_##_name, uint, S_IRUGO);\
 133 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 134 beiscsi_disp_param(_name)\
 135 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 136 beiscsi_store_param(_name)\
 137 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 138 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 139               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 140
 141 /*
 142  * When new log level added update the
 143  * the MAX allowed value for log_enable
 144  */
 145 BEISCSI_RW_ATTR(log_enable, 0x00,
 146                 0xFF, 0x00, "Enable logging Bit Mask\n"
 147                 "\t\t\t\tInitialization Events  : 0x01\n"
 148                 "\t\t\t\tMailbox Events         : 0x02\n"
 149                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 150                 "\t\t\t\tError Handling         : 0x08\n"
 151                 "\t\t\t\tIO Path Events         : 0x10\n"
 152                 "\t\t\t\tConfiguration Path     : 0x20\n"
 153                 "\t\t\t\tiSCSI Protocol         : 0x40\n");
 154
 155 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
 156 DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
 157 DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
 158 DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
 159 DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
 160              beiscsi_active_session_disp, NULL);
 161 DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
 162              beiscsi_free_session_disp, NULL);
 163 struct device_attribute *beiscsi_attrs[] = {
 164         &dev_attr_beiscsi_log_enable,
 165         &dev_attr_beiscsi_drvr_ver,
 166         &dev_attr_beiscsi_adapter_family,
 167         &dev_attr_beiscsi_fw_ver,
 168         &dev_attr_beiscsi_active_session_count,
 169         &dev_attr_beiscsi_free_session_count,
 170         &dev_attr_beiscsi_phys_port,
 171         NULL,
 172 };
 173
 174 static char const *cqe_desc[] = {
 175         "RESERVED_DESC",
 176         "SOL_CMD_COMPLETE",
 177         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 178         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 179         "CXN_KILLED_BURST_LEN_MISMATCH",
 180         "CXN_KILLED_AHS_RCVD",
 181         "CXN_KILLED_HDR_DIGEST_ERR",
 182         "CXN_KILLED_UNKNOWN_HDR",
 183         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 184         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 185         "CXN_KILLED_RST_RCVD",
 186         "CXN_KILLED_TIMED_OUT",
 187         "CXN_KILLED_RST_SENT",
 188         "CXN_KILLED_FIN_RCVD",
 189         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 190         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 191         "CXN_KILLED_OVER_RUN_RESIDUAL",
 192         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 193         "CMD_KILLED_INVALID_STATSN_RCVD",
 194         "CMD_KILLED_INVALID_R2T_RCVD",
 195         "CMD_CXN_KILLED_LUN_INVALID",
 196         "CMD_CXN_KILLED_ICD_INVALID",
 197         "CMD_CXN_KILLED_ITT_INVALID",
 198         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 199         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 200         "CXN_INVALIDATE_NOTIFY",
 201         "CXN_INVALIDATE_INDEX_NOTIFY",
 202         "CMD_INVALIDATED_NOTIFY",
 203         "UNSOL_HDR_NOTIFY",
 204         "UNSOL_DATA_NOTIFY",
 205         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 206         "DRIVERMSG_NOTIFY",
 207         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 208         "SOL_CMD_KILLED_DIF_ERR",
 209         "CXN_KILLED_SYN_RCVD",
 210         "CXN_KILLED_IMM_DATA_RCVD"
 211 };
 212
 213 static int beiscsi_slave_configure(struct scsi_device *sdev)
 214 {
 215         blk_queue_max_segment_size(sdev->request_queue, 65536);
 216         return 0;
 217 }
 218
 219 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 220 {
 221         struct iscsi_cls_session *cls_session;
 222         struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
 223         struct beiscsi_io_task *aborted_io_task;
 224         struct iscsi_conn *conn;
 225         struct beiscsi_conn *beiscsi_conn;
 226         struct beiscsi_hba *phba;
 227         struct iscsi_session *session;
 228         struct invalidate_command_table *inv_tbl;
 229         struct be_dma_mem nonemb_cmd;
 230         unsigned int cid, tag, num_invalidate;
 231         int rc;
 232
 233         cls_session = starget_to_session(scsi_target(sc->device));
 234         session = cls_session->dd_data;
 235
 236         spin_lock_bh(&session->frwd_lock);
 237         if (!aborted_task || !aborted_task->sc) {
 238                 /* we raced */
 239                 spin_unlock_bh(&session->frwd_lock);
 240                 return SUCCESS;
 241         }
 242
 243         aborted_io_task = aborted_task->dd_data;
 244         if (!aborted_io_task->scsi_cmnd) {
 245                 /* raced or invalid command */
 246                 spin_unlock_bh(&session->frwd_lock);
 247                 return SUCCESS;
 248         }
 249         spin_unlock_bh(&session->frwd_lock);
 250         /* Invalidate WRB Posted for this Task */
 251         AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 252                       aborted_io_task->pwrb_handle->pwrb,
 253                       1);
 254
 255         conn = aborted_task->conn;
 256         beiscsi_conn = conn->dd_data;
 257         phba = beiscsi_conn->phba;
 258
 259         /* invalidate iocb */
 260         cid = beiscsi_conn->beiscsi_conn_cid;
 261         inv_tbl = phba->inv_tbl;
 262         memset(inv_tbl, 0x0, sizeof(*inv_tbl));
 263         inv_tbl->cid = cid;
 264         inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
 265         num_invalidate = 1;
 266         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 267                                 sizeof(struct invalidate_commands_params_in),
 268                                 &nonemb_cmd.dma);
 269         if (nonemb_cmd.va == NULL) {
 270                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 271                             "BM_%d : Failed to allocate memory for"
 272                             "mgmt_invalidate_icds\n");
 273                 return FAILED;
 274         }
 275         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 276
 277         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 278                                    cid, &nonemb_cmd);
 279         if (!tag) {
 280                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 281                             "BM_%d : mgmt_invalidate_icds could not be"
 282                             "submitted\n");
 283                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 284                                     nonemb_cmd.va, nonemb_cmd.dma);
 285
 286                 return FAILED;
 287         }
 288
 289         rc = beiscsi_mccq_compl_wait(phba, tag, NULL, &nonemb_cmd);
 290         if (rc != -EBUSY)
 291                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 292                                     nonemb_cmd.va, nonemb_cmd.dma);
 293
 294         return iscsi_eh_abort(sc);
 295 }
 296
 297 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 298 {
 299         struct iscsi_task *abrt_task;
 300         struct beiscsi_io_task *abrt_io_task;
 301         struct iscsi_conn *conn;
 302         struct beiscsi_conn *beiscsi_conn;
 303         struct beiscsi_hba *phba;
 304         struct iscsi_session *session;
 305         struct iscsi_cls_session *cls_session;
 306         struct invalidate_command_table *inv_tbl;
 307         struct be_dma_mem nonemb_cmd;
 308         unsigned int cid, tag, i, num_invalidate;
 309         int rc;
 310
 311         /* invalidate iocbs */
 312         cls_session = starget_to_session(scsi_target(sc->device));
 313         session = cls_session->dd_data;
 314         spin_lock_bh(&session->frwd_lock);
 315         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 316                 spin_unlock_bh(&session->frwd_lock);
 317                 return FAILED;
 318         }
 319         conn = session->leadconn;
 320         beiscsi_conn = conn->dd_data;
 321         phba = beiscsi_conn->phba;
 322         cid = beiscsi_conn->beiscsi_conn_cid;
 323         inv_tbl = phba->inv_tbl;
 324         memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
 325         num_invalidate = 0;
 326         for (i = 0; i < conn->session->cmds_max; i++) {
 327                 abrt_task = conn->session->cmds[i];
 328                 abrt_io_task = abrt_task->dd_data;
 329                 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
 330                         continue;
 331
 332                 if (sc->device->lun != abrt_task->sc->device->lun)
 333                         continue;
 334
 335                 /* Invalidate WRB Posted for this Task */
 336                 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 337                               abrt_io_task->pwrb_handle->pwrb,
 338                               1);
 339
 340                 inv_tbl->cid = cid;
 341                 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
 342                 num_invalidate++;
 343                 inv_tbl++;
 344         }
 345         spin_unlock_bh(&session->frwd_lock);
 346         inv_tbl = phba->inv_tbl;
 347
 348         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 349                                 sizeof(struct invalidate_commands_params_in),
 350                                 &nonemb_cmd.dma);
 351         if (nonemb_cmd.va == NULL) {
 352                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 353                             "BM_%d : Failed to allocate memory for"
 354                             "mgmt_invalidate_icds\n");
 355                 return FAILED;
 356         }
 357         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 358         memset(nonemb_cmd.va, 0, nonemb_cmd.size);
 359         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 360                                    cid, &nonemb_cmd);
 361         if (!tag) {
 362                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 363                             "BM_%d : mgmt_invalidate_icds could not be"
 364                             " submitted\n");
 365                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 366                                     nonemb_cmd.va, nonemb_cmd.dma);
 367                 return FAILED;
 368         }
 369
 370         rc = beiscsi_mccq_compl_wait(phba, tag, NULL, &nonemb_cmd);
 371         if (rc != -EBUSY)
 372                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 373                                     nonemb_cmd.va, nonemb_cmd.dma);
 374         return iscsi_eh_device_reset(sc);
 375 }
 376
 377 /*------------------- PCI Driver operations and data ----------------- */
 378 static const struct pci_device_id beiscsi_pci_id_table[] = {
 379         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 380         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 381         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 382         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 383         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 384         { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
 385         { 0 }
 386 };
 387 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 388
 389
 390 static struct scsi_host_template beiscsi_sht = {
 391         .module = THIS_MODULE,
 392         .name = "Emulex 10Gbe open-iscsi Initiator Driver",
 393         .proc_name = DRV_NAME,
 394         .queuecommand = iscsi_queuecommand,
 395         .change_queue_depth = scsi_change_queue_depth,
 396         .slave_configure = beiscsi_slave_configure,
 397         .target_alloc = iscsi_target_alloc,
 398         .eh_abort_handler = beiscsi_eh_abort,
 399         .eh_device_reset_handler = beiscsi_eh_device_reset,
 400         .eh_target_reset_handler = iscsi_eh_session_reset,
 401         .shost_attrs = beiscsi_attrs,
 402         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 403         .can_queue = BE2_IO_DEPTH,
 404         .this_id = -1,
 405         .max_sectors = BEISCSI_MAX_SECTORS,
 406         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 407         .use_clustering = ENABLE_CLUSTERING,
 408         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 409         .track_queue_depth = 1,
 410 };
 411
 412 static struct scsi_transport_template *beiscsi_scsi_transport;
 413
 414 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 415 {
 416         struct beiscsi_hba *phba;
 417         struct Scsi_Host *shost;
 418
 419         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 420         if (!shost) {
 421                 dev_err(&pcidev->dev,
 422                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 423                 return NULL;
 424         }
 425         shost->max_id = BE2_MAX_SESSIONS;
 426         shost->max_channel = 0;
 427         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 428         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 429         shost->transportt = beiscsi_scsi_transport;
 430         phba = iscsi_host_priv(shost);
 431         memset(phba, 0, sizeof(*phba));
 432         phba->shost = shost;
 433         phba->pcidev = pci_dev_get(pcidev);
 434         pci_set_drvdata(pcidev, phba);
 435         phba->interface_handle = 0xFFFFFFFF;
 436
 437         return phba;
 438 }
 439
 440 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 441 {
 442         if (phba->csr_va) {
 443                 iounmap(phba->csr_va);
 444                 phba->csr_va = NULL;
 445         }
 446         if (phba->db_va) {
 447                 iounmap(phba->db_va);
 448                 phba->db_va = NULL;
 449         }
 450         if (phba->pci_va) {
 451                 iounmap(phba->pci_va);
 452                 phba->pci_va = NULL;
 453         }
 454 }
 455
 456 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 457                                 struct pci_dev *pcidev)
 458 {
 459         u8 __iomem *addr;
 460         int pcicfg_reg;
 461
 462         addr = ioremap_nocache(pci_resource_start(pcidev, 2),
 463                                pci_resource_len(pcidev, 2));
 464         if (addr == NULL)
 465                 return -ENOMEM;
 466         phba->ctrl.csr = addr;
 467         phba->csr_va = addr;
 468         phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
 469
 470         addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
 471         if (addr == NULL)
 472                 goto pci_map_err;
 473         phba->ctrl.db = addr;
 474         phba->db_va = addr;
 475         phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);
 476
 477         if (phba->generation == BE_GEN2)
 478                 pcicfg_reg = 1;
 479         else
 480                 pcicfg_reg = 0;
 481
 482         addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
 483                                pci_resource_len(pcidev, pcicfg_reg));
 484
 485         if (addr == NULL)
 486                 goto pci_map_err;
 487         phba->ctrl.pcicfg = addr;
 488         phba->pci_va = addr;
 489         phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
 490         return 0;
 491
 492 pci_map_err:
 493         beiscsi_unmap_pci_function(phba);
 494         return -ENOMEM;
 495 }
 496
 497 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 498 {
 499         int ret;
 500
 501         ret = pci_enable_device(pcidev);
 502         if (ret) {
 503                 dev_err(&pcidev->dev,
 504                         "beiscsi_enable_pci - enable device failed\n");
 505                 return ret;
 506         }
 507
 508         ret = pci_request_regions(pcidev, DRV_NAME);
 509         if (ret) {
 510                 dev_err(&pcidev->dev,
 511                                 "beiscsi_enable_pci - request region failed\n");
 512                 goto pci_dev_disable;
 513         }
 514
 515         pci_set_master(pcidev);
 516         ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
 517         if (ret) {
 518                 ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
 519                 if (ret) {
 520                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 521                         goto pci_region_release;
 522                 } else {
 523                         ret = pci_set_consistent_dma_mask(pcidev,
 524                                                           DMA_BIT_MASK(32));
 525                 }
 526         } else {
 527                 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
 528                 if (ret) {
 529                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 530                         goto pci_region_release;
 531                 }
 532         }
 533         return 0;
 534
 535 pci_region_release:
 536         pci_release_regions(pcidev);
 537 pci_dev_disable:
 538         pci_disable_device(pcidev);
 539
 540         return ret;
 541 }
 542
 543 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 544 {
 545         struct be_ctrl_info *ctrl = &phba->ctrl;
 546         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 547         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 548         int status = 0;
 549
 550         ctrl->pdev = pdev;
 551         status = beiscsi_map_pci_bars(phba, pdev);
 552         if (status)
 553                 return status;
 554         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 555         mbox_mem_alloc->va = pci_alloc_consistent(pdev,
 556                                                   mbox_mem_alloc->size,
 557                                                   &mbox_mem_alloc->dma);
 558         if (!mbox_mem_alloc->va) {
 559                 beiscsi_unmap_pci_function(phba);
 560                 return -ENOMEM;
 561         }
 562
 563         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 564         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 565         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 566         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 567         mutex_init(&ctrl->mbox_lock);
 568         spin_lock_init(&phba->ctrl.mcc_lock);
 569
 570         return status;
 571 }
 572
 573 /**
 574  * beiscsi_get_params()- Set the config paramters
 575  * @phba: ptr  device priv structure
 576  **/
 577 static void beiscsi_get_params(struct beiscsi_hba *phba)
 578 {
 579         uint32_t total_cid_count = 0;
 580         uint32_t total_icd_count = 0;
 581         uint8_t ulp_num = 0;
 582
 583         total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
 584                           BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
 585
 586         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
 587                 uint32_t align_mask = 0;
 588                 uint32_t icd_post_per_page = 0;
 589                 uint32_t icd_count_unavailable = 0;
 590                 uint32_t icd_start = 0, icd_count = 0;
 591                 uint32_t icd_start_align = 0, icd_count_align = 0;
 592
 593                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
 594                         icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
 595                         icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 596
 597                         /* Get ICD count that can be posted on each page */
 598                         icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
 599                                              sizeof(struct iscsi_sge)));
 600                         align_mask = (icd_post_per_page - 1);
 601
 602                         /* Check if icd_start is aligned ICD per page posting */
 603                         if (icd_start % icd_post_per_page) {
 604                                 icd_start_align = ((icd_start +
 605                                                     icd_post_per_page) &
 606                                                     ~(align_mask));
 607                                 phba->fw_config.
 608                                         iscsi_icd_start[ulp_num] =
 609                                         icd_start_align;
 610                         }
 611
 612                         icd_count_align = (icd_count & ~align_mask);
 613
 614                         /* ICD discarded in the process of alignment */
 615                         if (icd_start_align)
 616                                 icd_count_unavailable = ((icd_start_align -
 617                                                           icd_start) +
 618                                                          (icd_count -
 619                                                           icd_count_align));
 620
 621                         /* Updated ICD count available */
 622                         phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
 623                                         icd_count_unavailable);
 624
 625                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 626                                         "BM_%d : Aligned ICD values\n"
 627                                         "\t ICD Start : %d\n"
 628                                         "\t ICD Count : %d\n"
 629                                         "\t ICD Discarded : %d\n",
 630                                         phba->fw_config.
 631                                         iscsi_icd_start[ulp_num],
 632                                         phba->fw_config.
 633                                         iscsi_icd_count[ulp_num],
 634                                         icd_count_unavailable);
 635                         break;
 636                 }
 637         }
 638
 639         total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 640         phba->params.ios_per_ctrl = (total_icd_count -
 641                                     (total_cid_count +
 642                                      BE2_TMFS + BE2_NOPOUT_REQ));
 643         phba->params.cxns_per_ctrl = total_cid_count;
 644         phba->params.asyncpdus_per_ctrl = total_cid_count;
 645         phba->params.icds_per_ctrl = total_icd_count;
 646         phba->params.num_sge_per_io = BE2_SGE;
 647         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 648         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 649         phba->params.eq_timer = 64;
 650         phba->params.num_eq_entries = 1024;
 651         phba->params.num_cq_entries = 1024;
 652         phba->params.wrbs_per_cxn = 256;
 653 }
 654
 655 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 656                            unsigned int id, unsigned int clr_interrupt,
 657                            unsigned int num_processed,
 658                            unsigned char rearm, unsigned char event)
 659 {
 660         u32 val = 0;
 661
 662         if (rearm)
 663                 val |= 1 << DB_EQ_REARM_SHIFT;
 664         if (clr_interrupt)
 665                 val |= 1 << DB_EQ_CLR_SHIFT;
 666         if (event)
 667                 val |= 1 << DB_EQ_EVNT_SHIFT;
 668
 669         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 670         /* Setting lower order EQ_ID Bits */
 671         val |= (id & DB_EQ_RING_ID_LOW_MASK);
 672
 673         /* Setting Higher order EQ_ID Bits */
 674         val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
 675                   DB_EQ_RING_ID_HIGH_MASK)
 676                   << DB_EQ_HIGH_SET_SHIFT);
 677
 678         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 679 }
 680
 681 /**
 682  * be_isr_mcc - The isr routine of the driver.
 683  * @irq: Not used
 684  * @dev_id: Pointer to host adapter structure
 685  */
 686 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 687 {
 688         struct beiscsi_hba *phba;
 689         struct be_eq_entry *eqe;
 690         struct be_queue_info *eq;
 691         struct be_queue_info *mcc;
 692         unsigned int mcc_events;
 693         struct be_eq_obj *pbe_eq;
 694
 695         pbe_eq = dev_id;
 696         eq = &pbe_eq->q;
 697         phba =  pbe_eq->phba;
 698         mcc = &phba->ctrl.mcc_obj.cq;
 699         eqe = queue_tail_node(eq);
 700
 701         mcc_events = 0;
 702         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 703                                 & EQE_VALID_MASK) {
 704                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 705                      resource_id) / 32] &
 706                      EQE_RESID_MASK) >> 16) == mcc->id) {
 707                         mcc_events++;
 708                 }
 709                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 710                 queue_tail_inc(eq);
 711                 eqe = queue_tail_node(eq);
 712         }
 713
 714         if (mcc_events) {
 715                 queue_work(phba->wq, &pbe_eq->mcc_work);
 716                 hwi_ring_eq_db(phba, eq->id, 1, mcc_events, 1, 1);
 717         }
 718         return IRQ_HANDLED;
 719 }
 720
 721 /**
 722  * be_isr_msix - The isr routine of the driver.
 723  * @irq: Not used
 724  * @dev_id: Pointer to host adapter structure
 725  */
 726 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 727 {
 728         struct beiscsi_hba *phba;
 729         struct be_queue_info *eq;
 730         struct be_eq_obj *pbe_eq;
 731
 732         pbe_eq = dev_id;
 733         eq = &pbe_eq->q;
 734
 735         phba = pbe_eq->phba;
 736         /* disable interrupt till iopoll completes */
 737         hwi_ring_eq_db(phba, eq->id, 1, 0, 0, 1);
 738         irq_poll_sched(&pbe_eq->iopoll);
 739
 740         return IRQ_HANDLED;
 741 }
 742
 743 /**
 744  * be_isr - The isr routine of the driver.
 745  * @irq: Not used
 746  * @dev_id: Pointer to host adapter structure
 747  */
 748 static irqreturn_t be_isr(int irq, void *dev_id)
 749 {
 750         struct beiscsi_hba *phba;
 751         struct hwi_controller *phwi_ctrlr;
 752         struct hwi_context_memory *phwi_context;
 753         struct be_eq_entry *eqe;
 754         struct be_queue_info *eq;
 755         struct be_queue_info *mcc;
 756         unsigned int mcc_events, io_events;
 757         struct be_ctrl_info *ctrl;
 758         struct be_eq_obj *pbe_eq;
 759         int isr, rearm;
 760
 761         phba = dev_id;
 762         ctrl = &phba->ctrl;
 763         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 764                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 765         if (!isr)
 766                 return IRQ_NONE;
 767
 768         phwi_ctrlr = phba->phwi_ctrlr;
 769         phwi_context = phwi_ctrlr->phwi_ctxt;
 770         pbe_eq = &phwi_context->be_eq[0];
 771
 772         eq = &phwi_context->be_eq[0].q;
 773         mcc = &phba->ctrl.mcc_obj.cq;
 774         eqe = queue_tail_node(eq);
 775
 776         io_events = 0;
 777         mcc_events = 0;
 778         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 779                                 & EQE_VALID_MASK) {
 780                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 781                       resource_id) / 32] & EQE_RESID_MASK) >> 16) == mcc->id)
 782                         mcc_events++;
 783                 else
 784                         io_events++;
 785                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 786                 queue_tail_inc(eq);
 787                 eqe = queue_tail_node(eq);
 788         }
 789         if (!io_events && !mcc_events)
 790                 return IRQ_NONE;
 791
 792         /* no need to rearm if interrupt is only for IOs */
 793         rearm = 0;
 794         if (mcc_events) {
 795                 queue_work(phba->wq, &pbe_eq->mcc_work);
 796                 /* rearm for MCCQ */
 797                 rearm = 1;
 798         }
 799         if (io_events)
 800                 irq_poll_sched(&pbe_eq->iopoll);
 801         hwi_ring_eq_db(phba, eq->id, 0, (io_events + mcc_events), rearm, 1);
 802         return IRQ_HANDLED;
 803 }
 804
 805
 806 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
 807 {
 808         struct pci_dev *pcidev = phba->pcidev;
 809         struct hwi_controller *phwi_ctrlr;
 810         struct hwi_context_memory *phwi_context;
 811         int ret, msix_vec, i, j;
 812
 813         phwi_ctrlr = phba->phwi_ctrlr;
 814         phwi_context = phwi_ctrlr->phwi_ctxt;
 815
 816         if (phba->msix_enabled) {
 817                 for (i = 0; i < phba->num_cpus; i++) {
 818                         phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
 819                                                     GFP_KERNEL);
 820                         if (!phba->msi_name[i]) {
 821                                 ret = -ENOMEM;
 822                                 goto free_msix_irqs;
 823                         }
 824
 825                         sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
 826                                 phba->shost->host_no, i);
 827                         msix_vec = phba->msix_entries[i].vector;
 828                         ret = request_irq(msix_vec, be_isr_msix, 0,
 829                                           phba->msi_name[i],
 830                                           &phwi_context->be_eq[i]);
 831                         if (ret) {
 832                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
 833                                             "BM_%d : beiscsi_init_irqs-Failed to"
 834                                             "register msix for i = %d\n",
 835                                             i);
 836                                 kfree(phba->msi_name[i]);
 837                                 goto free_msix_irqs;
 838                         }
 839                 }
 840                 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
 841                 if (!phba->msi_name[i]) {
 842                         ret = -ENOMEM;
 843                         goto free_msix_irqs;
 844                 }
 845                 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
 846                         phba->shost->host_no);
 847                 msix_vec = phba->msix_entries[i].vector;
 848                 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
 849                                   &phwi_context->be_eq[i]);
 850                 if (ret) {
 851                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
 852                                     "BM_%d : beiscsi_init_irqs-"
 853                                     "Failed to register beiscsi_msix_mcc\n");
 854                         kfree(phba->msi_name[i]);
 855                         goto free_msix_irqs;
 856                 }
 857
 858         } else {
 859                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
 860                                   "beiscsi", phba);
 861                 if (ret) {
 862                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
 863                                     "BM_%d : beiscsi_init_irqs-"
 864                                     "Failed to register irq\\n");
 865                         return ret;
 866                 }
 867         }
 868         return 0;
 869 free_msix_irqs:
 870         for (j = i - 1; j >= 0; j--) {
 871                 kfree(phba->msi_name[j]);
 872                 msix_vec = phba->msix_entries[j].vector;
 873                 free_irq(msix_vec, &phwi_context->be_eq[j]);
 874         }
 875         return ret;
 876 }
 877
 878 void hwi_ring_cq_db(struct beiscsi_hba *phba,
 879                            unsigned int id, unsigned int num_processed,
 880                            unsigned char rearm)
 881 {
 882         u32 val = 0;
 883
 884         if (rearm)
 885                 val |= 1 << DB_CQ_REARM_SHIFT;
 886
 887         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
 888
 889         /* Setting lower order CQ_ID Bits */
 890         val |= (id & DB_CQ_RING_ID_LOW_MASK);
 891
 892         /* Setting Higher order CQ_ID Bits */
 893         val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
 894                   DB_CQ_RING_ID_HIGH_MASK)
 895                   << DB_CQ_HIGH_SET_SHIFT);
 896
 897         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
 898 }
 899
 900 static unsigned int
 901 beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
 902                           struct beiscsi_hba *phba,
 903                           struct pdu_base *ppdu,
 904                           unsigned long pdu_len,
 905                           void *pbuffer, unsigned long buf_len)
 906 {
 907         struct iscsi_conn *conn = beiscsi_conn->conn;
 908         struct iscsi_session *session = conn->session;
 909         struct iscsi_task *task;
 910         struct beiscsi_io_task *io_task;
 911         struct iscsi_hdr *login_hdr;
 912
 913         switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
 914                                                 PDUBASE_OPCODE_MASK) {
 915         case ISCSI_OP_NOOP_IN:
 916                 pbuffer = NULL;
 917                 buf_len = 0;
 918                 break;
 919         case ISCSI_OP_ASYNC_EVENT:
 920                 break;
 921         case ISCSI_OP_REJECT:
 922                 WARN_ON(!pbuffer);
 923                 WARN_ON(!(buf_len == 48));
 924                 beiscsi_log(phba, KERN_ERR,
 925                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
 926                             "BM_%d : In ISCSI_OP_REJECT\n");
 927                 break;
 928         case ISCSI_OP_LOGIN_RSP:
 929         case ISCSI_OP_TEXT_RSP:
 930                 task = conn->login_task;
 931                 io_task = task->dd_data;
 932                 login_hdr = (struct iscsi_hdr *)ppdu;
 933                 login_hdr->itt = io_task->libiscsi_itt;
 934                 break;
 935         default:
 936                 beiscsi_log(phba, KERN_WARNING,
 937                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
 938                             "BM_%d : Unrecognized opcode 0x%x in async msg\n",
 939                             (ppdu->
 940                              dw[offsetof(struct amap_pdu_base, opcode) / 32]
 941                              & PDUBASE_OPCODE_MASK));
 942                 return 1;
 943         }
 944
 945         spin_lock_bh(&session->back_lock);
 946         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
 947         spin_unlock_bh(&session->back_lock);
 948         return 0;
 949 }
 950
 951 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
 952 {
 953         struct sgl_handle *psgl_handle;
 954
 955         spin_lock_bh(&phba->io_sgl_lock);
 956         if (phba->io_sgl_hndl_avbl) {
 957                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
 958                             "BM_%d : In alloc_io_sgl_handle,"
 959                             " io_sgl_alloc_index=%d\n",
 960                             phba->io_sgl_alloc_index);
 961
 962                 psgl_handle = phba->io_sgl_hndl_base[phba->
 963                                                 io_sgl_alloc_index];
 964                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
 965                 phba->io_sgl_hndl_avbl--;
 966                 if (phba->io_sgl_alloc_index == (phba->params.
 967                                                  ios_per_ctrl - 1))
 968                         phba->io_sgl_alloc_index = 0;
 969                 else
 970                         phba->io_sgl_alloc_index++;
 971         } else
 972                 psgl_handle = NULL;
 973         spin_unlock_bh(&phba->io_sgl_lock);
 974         return psgl_handle;
 975 }
 976
 977 static void
 978 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
 979 {
 980         spin_lock_bh(&phba->io_sgl_lock);
 981         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
 982                     "BM_%d : In free_,io_sgl_free_index=%d\n",
 983                     phba->io_sgl_free_index);
 984
 985         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
 986                 /*
 987                  * this can happen if clean_task is called on a task that
 988                  * failed in xmit_task or alloc_pdu.
 989                  */
 990                  beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
 991                              "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
 992                              "value there=%p\n", phba->io_sgl_free_index,
 993                              phba->io_sgl_hndl_base
 994                              [phba->io_sgl_free_index]);
 995                  spin_unlock_bh(&phba->io_sgl_lock);
 996                 return;
 997         }
 998         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
 999         phba->io_sgl_hndl_avbl++;
1000         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1001                 phba->io_sgl_free_index = 0;
1002         else
1003                 phba->io_sgl_free_index++;
1004         spin_unlock_bh(&phba->io_sgl_lock);
1005 }
1006
1007 static inline struct wrb_handle *
1008 beiscsi_get_wrb_handle(struct hwi_wrb_context *pwrb_context,
1009                        unsigned int wrbs_per_cxn)
1010 {
1011         struct wrb_handle *pwrb_handle;
1012
1013         spin_lock_bh(&pwrb_context->wrb_lock);
1014         pwrb_handle = pwrb_context->pwrb_handle_base[pwrb_context->alloc_index];
1015         pwrb_context->wrb_handles_available--;
1016         if (pwrb_context->alloc_index == (wrbs_per_cxn - 1))
1017                 pwrb_context->alloc_index = 0;
1018         else
1019                 pwrb_context->alloc_index++;
1020         spin_unlock_bh(&pwrb_context->wrb_lock);
1021
1022         return pwrb_handle;
1023 }
1024
1025 /**
1026  * alloc_wrb_handle - To allocate a wrb handle
1027  * @phba: The hba pointer
1028  * @cid: The cid to use for allocation
1029  * @pwrb_context: ptr to ptr to wrb context
1030  *
1031  * This happens under session_lock until submission to chip
1032  */
1033 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
1034                                     struct hwi_wrb_context **pcontext)
1035 {
1036         struct hwi_wrb_context *pwrb_context;
1037         struct hwi_controller *phwi_ctrlr;
1038         uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
1039
1040         phwi_ctrlr = phba->phwi_ctrlr;
1041         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1042         /* return the context address */
1043         *pcontext = pwrb_context;
1044         return beiscsi_get_wrb_handle(pwrb_context, phba->params.wrbs_per_cxn);
1045 }
1046
1047 static inline void
1048 beiscsi_put_wrb_handle(struct hwi_wrb_context *pwrb_context,
1049                        struct wrb_handle *pwrb_handle,
1050                        unsigned int wrbs_per_cxn)
1051 {
1052         spin_lock_bh(&pwrb_context->wrb_lock);
1053         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1054         pwrb_context->wrb_handles_available++;
1055         if (pwrb_context->free_index == (wrbs_per_cxn - 1))
1056                 pwrb_context->free_index = 0;
1057         else
1058                 pwrb_context->free_index++;
1059         spin_unlock_bh(&pwrb_context->wrb_lock);
1060 }
1061
1062 /**
1063  * free_wrb_handle - To free the wrb handle back to pool
1064  * @phba: The hba pointer
1065  * @pwrb_context: The context to free from
1066  * @pwrb_handle: The wrb_handle to free
1067  *
1068  * This happens under session_lock until submission to chip
1069  */
1070 static void
1071 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1072                 struct wrb_handle *pwrb_handle)
1073 {
1074         beiscsi_put_wrb_handle(pwrb_context,
1075                                pwrb_handle,
1076                                phba->params.wrbs_per_cxn);
1077         beiscsi_log(phba, KERN_INFO,
1078                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1079                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1080                     "wrb_handles_available=%d\n",
1081                     pwrb_handle, pwrb_context->free_index,
1082                     pwrb_context->wrb_handles_available);
1083 }
1084
1085 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1086 {
1087         struct sgl_handle *psgl_handle;
1088
1089         spin_lock_bh(&phba->mgmt_sgl_lock);
1090         if (phba->eh_sgl_hndl_avbl) {
1091                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1092                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1093                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1094                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1095                             phba->eh_sgl_alloc_index,
1096                             phba->eh_sgl_alloc_index);
1097
1098                 phba->eh_sgl_hndl_avbl--;
1099                 if (phba->eh_sgl_alloc_index ==
1100                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1101                      1))
1102                         phba->eh_sgl_alloc_index = 0;
1103                 else
1104                         phba->eh_sgl_alloc_index++;
1105         } else
1106                 psgl_handle = NULL;
1107         spin_unlock_bh(&phba->mgmt_sgl_lock);
1108         return psgl_handle;
1109 }
1110
1111 void
1112 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1113 {
1114         spin_lock_bh(&phba->mgmt_sgl_lock);
1115         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1116                     "BM_%d : In  free_mgmt_sgl_handle,"
1117                     "eh_sgl_free_index=%d\n",
1118                     phba->eh_sgl_free_index);
1119
1120         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1121                 /*
1122                  * this can happen if clean_task is called on a task that
1123                  * failed in xmit_task or alloc_pdu.
1124                  */
1125                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1126                             "BM_%d : Double Free in eh SGL ,"
1127                             "eh_sgl_free_index=%d\n",
1128                             phba->eh_sgl_free_index);
1129                 spin_unlock_bh(&phba->mgmt_sgl_lock);
1130                 return;
1131         }
1132         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1133         phba->eh_sgl_hndl_avbl++;
1134         if (phba->eh_sgl_free_index ==
1135             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1136                 phba->eh_sgl_free_index = 0;
1137         else
1138                 phba->eh_sgl_free_index++;
1139         spin_unlock_bh(&phba->mgmt_sgl_lock);
1140 }
1141
1142 static void
1143 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1144                 struct iscsi_task *task,
1145                 struct common_sol_cqe *csol_cqe)
1146 {
1147         struct beiscsi_io_task *io_task = task->dd_data;
1148         struct be_status_bhs *sts_bhs =
1149                                 (struct be_status_bhs *)io_task->cmd_bhs;
1150         struct iscsi_conn *conn = beiscsi_conn->conn;
1151         unsigned char *sense;
1152         u32 resid = 0, exp_cmdsn, max_cmdsn;
1153         u8 rsp, status, flags;
1154
1155         exp_cmdsn = csol_cqe->exp_cmdsn;
1156         max_cmdsn = (csol_cqe->exp_cmdsn +
1157                      csol_cqe->cmd_wnd - 1);
1158         rsp = csol_cqe->i_resp;
1159         status = csol_cqe->i_sts;
1160         flags = csol_cqe->i_flags;
1161         resid = csol_cqe->res_cnt;
1162
1163         if (!task->sc) {
1164                 if (io_task->scsi_cmnd) {
1165                         scsi_dma_unmap(io_task->scsi_cmnd);
1166                         io_task->scsi_cmnd = NULL;
1167                 }
1168
1169                 return;
1170         }
1171         task->sc->result = (DID_OK << 16) | status;
1172         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1173                 task->sc->result = DID_ERROR << 16;
1174                 goto unmap;
1175         }
1176
1177         /* bidi not initially supported */
1178         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1179                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1180                         task->sc->result = DID_ERROR << 16;
1181
1182                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1183                         scsi_set_resid(task->sc, resid);
1184                         if (!status && (scsi_bufflen(task->sc) - resid <
1185                             task->sc->underflow))
1186                                 task->sc->result = DID_ERROR << 16;
1187                 }
1188         }
1189
1190         if (status == SAM_STAT_CHECK_CONDITION) {
1191                 u16 sense_len;
1192                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1193
1194                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1195                 sense_len = be16_to_cpu(*slen);
1196                 memcpy(task->sc->sense_buffer, sense,
1197                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1198         }
1199
1200         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1201                 conn->rxdata_octets += resid;
1202 unmap:
1203         if (io_task->scsi_cmnd) {
1204                 scsi_dma_unmap(io_task->scsi_cmnd);
1205                 io_task->scsi_cmnd = NULL;
1206         }
1207         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1208 }
1209
1210 static void
1211 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1212                     struct iscsi_task *task,
1213                     struct common_sol_cqe *csol_cqe)
1214 {
1215         struct iscsi_logout_rsp *hdr;
1216         struct beiscsi_io_task *io_task = task->dd_data;
1217         struct iscsi_conn *conn = beiscsi_conn->conn;
1218
1219         hdr = (struct iscsi_logout_rsp *)task->hdr;
1220         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1221         hdr->t2wait = 5;
1222         hdr->t2retain = 0;
1223         hdr->flags = csol_cqe->i_flags;
1224         hdr->response = csol_cqe->i_resp;
1225         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1226         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1227                                      csol_cqe->cmd_wnd - 1);
1228
1229         hdr->dlength[0] = 0;
1230         hdr->dlength[1] = 0;
1231         hdr->dlength[2] = 0;
1232         hdr->hlength = 0;
1233         hdr->itt = io_task->libiscsi_itt;
1234         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1235 }
1236
1237 static void
1238 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1239                  struct iscsi_task *task,
1240                  struct common_sol_cqe *csol_cqe)
1241 {
1242         struct iscsi_tm_rsp *hdr;
1243         struct iscsi_conn *conn = beiscsi_conn->conn;
1244         struct beiscsi_io_task *io_task = task->dd_data;
1245
1246         hdr = (struct iscsi_tm_rsp *)task->hdr;
1247         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1248         hdr->flags = csol_cqe->i_flags;
1249         hdr->response = csol_cqe->i_resp;
1250         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1251         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1252                                      csol_cqe->cmd_wnd - 1);
1253
1254         hdr->itt = io_task->libiscsi_itt;
1255         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1256 }
1257
1258 static void
1259 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1260                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1261 {
1262         struct hwi_wrb_context *pwrb_context;
1263         struct wrb_handle *pwrb_handle = NULL;
1264         struct hwi_controller *phwi_ctrlr;
1265         struct iscsi_task *task;
1266         struct beiscsi_io_task *io_task;
1267         uint16_t wrb_index, cid, cri_index;
1268
1269         phwi_ctrlr = phba->phwi_ctrlr;
1270         if (is_chip_be2_be3r(phba)) {
1271                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1272                                           wrb_idx, psol);
1273                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1274                                     cid, psol);
1275         } else {
1276                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1277                                           wrb_idx, psol);
1278                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1279                                     cid, psol);
1280         }
1281
1282         cri_index = BE_GET_CRI_FROM_CID(cid);
1283         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1284         pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1285         task = pwrb_handle->pio_handle;
1286
1287         io_task = task->dd_data;
1288         memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
1289         iscsi_put_task(task);
1290 }
1291
1292 static void
1293 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1294                         struct iscsi_task *task,
1295                         struct common_sol_cqe *csol_cqe)
1296 {
1297         struct iscsi_nopin *hdr;
1298         struct iscsi_conn *conn = beiscsi_conn->conn;
1299         struct beiscsi_io_task *io_task = task->dd_data;
1300
1301         hdr = (struct iscsi_nopin *)task->hdr;
1302         hdr->flags = csol_cqe->i_flags;
1303         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1304         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1305                                      csol_cqe->cmd_wnd - 1);
1306
1307         hdr->opcode = ISCSI_OP_NOOP_IN;
1308         hdr->itt = io_task->libiscsi_itt;
1309         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1310 }
1311
1312 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1313                 struct sol_cqe *psol,
1314                 struct common_sol_cqe *csol_cqe)
1315 {
1316         if (is_chip_be2_be3r(phba)) {
1317                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1318                                                     i_exp_cmd_sn, psol);
1319                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1320                                                   i_res_cnt, psol);
1321                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1322                                                   i_cmd_wnd, psol);
1323                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1324                                                     wrb_index, psol);
1325                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1326                                               cid, psol);
1327                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1328                                                  hw_sts, psol);
1329                 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1330                                                  i_resp, psol);
1331                 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1332                                                 i_sts, psol);
1333                 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1334                                                   i_flags, psol);
1335         } else {
1336                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1337                                                     i_exp_cmd_sn, psol);
1338                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1339                                                   i_res_cnt, psol);
1340                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1341                                                     wrb_index, psol);
1342                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1343                                               cid, psol);
1344                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1345                                                  hw_sts, psol);
1346                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1347                                                   i_cmd_wnd, psol);
1348                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1349                                   cmd_cmpl, psol))
1350                         csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1351                                                         i_sts, psol);
1352                 else
1353                         csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1354                                                          i_sts, psol);
1355                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1356                                   u, psol))
1357                         csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1358
1359                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1360                                   o, psol))
1361                         csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
1362         }
1363 }
1364
1365
1366 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1367                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1368 {
1369         struct hwi_wrb_context *pwrb_context;
1370         struct wrb_handle *pwrb_handle;
1371         struct iscsi_wrb *pwrb = NULL;
1372         struct hwi_controller *phwi_ctrlr;
1373         struct iscsi_task *task;
1374         unsigned int type;
1375         struct iscsi_conn *conn = beiscsi_conn->conn;
1376         struct iscsi_session *session = conn->session;
1377         struct common_sol_cqe csol_cqe = {0};
1378         uint16_t cri_index = 0;
1379
1380         phwi_ctrlr = phba->phwi_ctrlr;
1381
1382         /* Copy the elements to a common structure */
1383         adapter_get_sol_cqe(phba, psol, &csol_cqe);
1384
1385         cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1386         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1387
1388         pwrb_handle = pwrb_context->pwrb_handle_basestd[
1389                       csol_cqe.wrb_index];
1390
1391         task = pwrb_handle->pio_handle;
1392         pwrb = pwrb_handle->pwrb;
1393         type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1394
1395         spin_lock_bh(&session->back_lock);
1396         switch (type) {
1397         case HWH_TYPE_IO:
1398         case HWH_TYPE_IO_RD:
1399                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1400                      ISCSI_OP_NOOP_OUT)
1401                         be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1402                 else
1403                         be_complete_io(beiscsi_conn, task, &csol_cqe);
1404                 break;
1405
1406         case HWH_TYPE_LOGOUT:
1407                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1408                         be_complete_logout(beiscsi_conn, task, &csol_cqe);
1409                 else
1410                         be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1411                 break;
1412
1413         case HWH_TYPE_LOGIN:
1414                 beiscsi_log(phba, KERN_ERR,
1415                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1416                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1417                             " hwi_complete_cmd- Solicited path\n");
1418                 break;
1419
1420         case HWH_TYPE_NOP:
1421                 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1422                 break;
1423
1424         default:
1425                 beiscsi_log(phba, KERN_WARNING,
1426                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1427                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1428                             "wrb_index 0x%x CID 0x%x\n", type,
1429                             csol_cqe.wrb_index,
1430                             csol_cqe.cid);
1431                 break;
1432         }
1433
1434         spin_unlock_bh(&session->back_lock);
1435 }
1436
1437 static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1438                                           *pasync_ctx, unsigned int is_header,
1439                                           unsigned int host_write_ptr)
1440 {
1441         if (is_header)
1442                 return &pasync_ctx->async_entry[host_write_ptr].
1443                     header_busy_list;
1444         else
1445                 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1446 }
1447
1448 static struct async_pdu_handle *
1449 hwi_get_async_handle(struct beiscsi_hba *phba,
1450                      struct beiscsi_conn *beiscsi_conn,
1451                      struct hwi_async_pdu_context *pasync_ctx,
1452                      struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1453 {
1454         struct be_bus_address phys_addr;
1455         struct list_head *pbusy_list;
1456         struct async_pdu_handle *pasync_handle = NULL;
1457         unsigned char is_header = 0;
1458         unsigned int index, dpl;
1459
1460         if (is_chip_be2_be3r(phba)) {
1461                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1462                                     dpl, pdpdu_cqe);
1463                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1464                                       index, pdpdu_cqe);
1465         } else {
1466                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1467                                     dpl, pdpdu_cqe);
1468                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1469                                       index, pdpdu_cqe);
1470         }
1471
1472         phys_addr.u.a32.address_lo =
1473                 (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1474                                         db_addr_lo) / 32] - dpl);
1475         phys_addr.u.a32.address_hi =
1476                 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1477                                        db_addr_hi) / 32];
1478
1479         phys_addr.u.a64.address =
1480                         *((unsigned long long *)(&phys_addr.u.a64.address));
1481
1482         switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1483                         & PDUCQE_CODE_MASK) {
1484         case UNSOL_HDR_NOTIFY:
1485                 is_header = 1;
1486
1487                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1488                                                       is_header, index);
1489                 break;
1490         case UNSOL_DATA_NOTIFY:
1491                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1492                                                       is_header, index);
1493                 break;
1494         default:
1495                 pbusy_list = NULL;
1496                 beiscsi_log(phba, KERN_WARNING,
1497                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1498                             "BM_%d : Unexpected code=%d\n",
1499                             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1500                             code) / 32] & PDUCQE_CODE_MASK);
1501                 return NULL;
1502         }
1503
1504         WARN_ON(list_empty(pbusy_list));
1505         list_for_each_entry(pasync_handle, pbusy_list, link) {
1506                 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1507                         break;
1508         }
1509
1510         WARN_ON(!pasync_handle);
1511
1512         pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
1513                              beiscsi_conn->beiscsi_conn_cid);
1514         pasync_handle->is_header = is_header;
1515         pasync_handle->buffer_len = dpl;
1516         *pcq_index = index;
1517
1518         return pasync_handle;
1519 }
1520
1521 static unsigned int
1522 hwi_update_async_writables(struct beiscsi_hba *phba,
1523                             struct hwi_async_pdu_context *pasync_ctx,
1524                             unsigned int is_header, unsigned int cq_index)
1525 {
1526         struct list_head *pbusy_list;
1527         struct async_pdu_handle *pasync_handle;
1528         unsigned int num_entries, writables = 0;
1529         unsigned int *pep_read_ptr, *pwritables;
1530
1531         num_entries = pasync_ctx->num_entries;
1532         if (is_header) {
1533                 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1534                 pwritables = &pasync_ctx->async_header.writables;
1535         } else {
1536                 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1537                 pwritables = &pasync_ctx->async_data.writables;
1538         }
1539
1540         while ((*pep_read_ptr) != cq_index) {
1541                 (*pep_read_ptr)++;
1542                 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1543
1544                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1545                                                      *pep_read_ptr);
1546                 if (writables == 0)
1547                         WARN_ON(list_empty(pbusy_list));
1548
1549                 if (!list_empty(pbusy_list)) {
1550                         pasync_handle = list_entry(pbusy_list->next,
1551                                                    struct async_pdu_handle,
1552                                                    link);
1553                         WARN_ON(!pasync_handle);
1554                         pasync_handle->consumed = 1;
1555                 }
1556
1557                 writables++;
1558         }
1559
1560         if (!writables) {
1561                 beiscsi_log(phba, KERN_ERR,
1562                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1563                             "BM_%d : Duplicate notification received - index 0x%x!!\n",
1564                             cq_index);
1565                 WARN_ON(1);
1566         }
1567
1568         *pwritables = *pwritables + writables;
1569         return 0;
1570 }
1571
1572 static void hwi_free_async_msg(struct beiscsi_hba *phba,
1573                                struct hwi_async_pdu_context *pasync_ctx,
1574                                unsigned int cri)
1575 {
1576         struct async_pdu_handle *pasync_handle, *tmp_handle;
1577         struct list_head *plist;
1578
1579         plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
1580         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1581                 list_del(&pasync_handle->link);
1582
1583                 if (pasync_handle->is_header) {
1584                         list_add_tail(&pasync_handle->link,
1585                                       &pasync_ctx->async_header.free_list);
1586                         pasync_ctx->async_header.free_entries++;
1587                 } else {
1588                         list_add_tail(&pasync_handle->link,
1589                                       &pasync_ctx->async_data.free_list);
1590                         pasync_ctx->async_data.free_entries++;
1591                 }
1592         }
1593
1594         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1595         pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1596         pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1597 }
1598
1599 static struct phys_addr *
1600 hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1601                      unsigned int is_header, unsigned int host_write_ptr)
1602 {
1603         struct phys_addr *pasync_sge = NULL;
1604
1605         if (is_header)
1606                 pasync_sge = pasync_ctx->async_header.ring_base;
1607         else
1608                 pasync_sge = pasync_ctx->async_data.ring_base;
1609
1610         return pasync_sge + host_write_ptr;
1611 }
1612
1613 static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1614                                     unsigned int is_header, uint8_t ulp_num)
1615 {
1616         struct hwi_controller *phwi_ctrlr;
1617         struct hwi_async_pdu_context *pasync_ctx;
1618         struct async_pdu_handle *pasync_handle;
1619         struct list_head *pfree_link, *pbusy_list;
1620         struct phys_addr *pasync_sge;
1621         unsigned int ring_id, num_entries;
1622         unsigned int host_write_num, doorbell_offset;
1623         unsigned int writables;
1624         unsigned int i = 0;
1625         u32 doorbell = 0;
1626
1627         phwi_ctrlr = phba->phwi_ctrlr;
1628         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1629         num_entries = pasync_ctx->num_entries;
1630
1631         if (is_header) {
1632                 writables = min(pasync_ctx->async_header.writables,
1633                                 pasync_ctx->async_header.free_entries);
1634                 pfree_link = pasync_ctx->async_header.free_list.next;
1635                 host_write_num = pasync_ctx->async_header.host_write_ptr;
1636                 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1637                 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1638                                   doorbell_offset;
1639         } else {
1640                 writables = min(pasync_ctx->async_data.writables,
1641                                 pasync_ctx->async_data.free_entries);
1642                 pfree_link = pasync_ctx->async_data.free_list.next;
1643                 host_write_num = pasync_ctx->async_data.host_write_ptr;
1644                 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1645                 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1646                                   doorbell_offset;
1647         }
1648
1649         writables = (writables / 8) * 8;
1650         if (writables) {
1651                 for (i = 0; i < writables; i++) {
1652                         pbusy_list =
1653                             hwi_get_async_busy_list(pasync_ctx, is_header,
1654                                                     host_write_num);
1655                         pasync_handle =
1656                             list_entry(pfree_link, struct async_pdu_handle,
1657                                                                 link);
1658                         WARN_ON(!pasync_handle);
1659                         pasync_handle->consumed = 0;
1660
1661                         pfree_link = pfree_link->next;
1662
1663                         pasync_sge = hwi_get_ring_address(pasync_ctx,
1664                                                 is_header, host_write_num);
1665
1666                         pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1667                         pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1668
1669                         list_move(&pasync_handle->link, pbusy_list);
1670
1671                         host_write_num++;
1672                         host_write_num = host_write_num % num_entries;
1673                 }
1674
1675                 if (is_header) {
1676                         pasync_ctx->async_header.host_write_ptr =
1677                                                         host_write_num;
1678                         pasync_ctx->async_header.free_entries -= writables;
1679                         pasync_ctx->async_header.writables -= writables;
1680                         pasync_ctx->async_header.busy_entries += writables;
1681                 } else {
1682                         pasync_ctx->async_data.host_write_ptr = host_write_num;
1683                         pasync_ctx->async_data.free_entries -= writables;
1684                         pasync_ctx->async_data.writables -= writables;
1685                         pasync_ctx->async_data.busy_entries += writables;
1686                 }
1687
1688                 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1689                 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1690                 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1691                 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1692                                         << DB_DEF_PDU_CQPROC_SHIFT;
1693
1694                 iowrite32(doorbell, phba->db_va + doorbell_offset);
1695         }
1696 }
1697
1698 static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1699                                          struct beiscsi_conn *beiscsi_conn,
1700                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1701 {
1702         struct hwi_controller *phwi_ctrlr;
1703         struct hwi_async_pdu_context *pasync_ctx;
1704         struct async_pdu_handle *pasync_handle = NULL;
1705         unsigned int cq_index = -1;
1706         uint16_t cri_index = BE_GET_CRI_FROM_CID(
1707                              beiscsi_conn->beiscsi_conn_cid);
1708
1709         phwi_ctrlr = phba->phwi_ctrlr;
1710         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1711                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1712                      cri_index));
1713
1714         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1715                                              pdpdu_cqe, &cq_index);
1716         BUG_ON(pasync_handle->is_header != 0);
1717         if (pasync_handle->consumed == 0)
1718                 hwi_update_async_writables(phba, pasync_ctx,
1719                                            pasync_handle->is_header, cq_index);
1720
1721         hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
1722         hwi_post_async_buffers(phba, pasync_handle->is_header,
1723                                BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1724                                cri_index));
1725 }
1726
1727 static unsigned int
1728 hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1729                   struct beiscsi_hba *phba,
1730                   struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1731 {
1732         struct list_head *plist;
1733         struct async_pdu_handle *pasync_handle;
1734         void *phdr = NULL;
1735         unsigned int hdr_len = 0, buf_len = 0;
1736         unsigned int status, index = 0, offset = 0;
1737         void *pfirst_buffer = NULL;
1738         unsigned int num_buf = 0;
1739
1740         plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1741
1742         list_for_each_entry(pasync_handle, plist, link) {
1743                 if (index == 0) {
1744                         phdr = pasync_handle->pbuffer;
1745                         hdr_len = pasync_handle->buffer_len;
1746                 } else {
1747                         buf_len = pasync_handle->buffer_len;
1748                         if (!num_buf) {
1749                                 pfirst_buffer = pasync_handle->pbuffer;
1750                                 num_buf++;
1751                         }
1752                         memcpy(pfirst_buffer + offset,
1753                                pasync_handle->pbuffer, buf_len);
1754                         offset += buf_len;
1755                 }
1756                 index++;
1757         }
1758
1759         status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1760                                             phdr, hdr_len, pfirst_buffer,
1761                                             offset);
1762
1763         hwi_free_async_msg(phba, pasync_ctx, cri);
1764         return 0;
1765 }
1766
1767 static unsigned int
1768 hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1769                      struct beiscsi_hba *phba,
1770                      struct async_pdu_handle *pasync_handle)
1771 {
1772         struct hwi_async_pdu_context *pasync_ctx;
1773         struct hwi_controller *phwi_ctrlr;
1774         unsigned int bytes_needed = 0, status = 0;
1775         unsigned short cri = pasync_handle->cri;
1776         struct pdu_base *ppdu;
1777
1778         phwi_ctrlr = phba->phwi_ctrlr;
1779         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1780                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1781                      BE_GET_CRI_FROM_CID(beiscsi_conn->
1782                                  beiscsi_conn_cid)));
1783
1784         list_del(&pasync_handle->link);
1785         if (pasync_handle->is_header) {
1786                 pasync_ctx->async_header.busy_entries--;
1787                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1788                         hwi_free_async_msg(phba, pasync_ctx, cri);
1789                         BUG();
1790                 }
1791
1792                 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1793                 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1794                 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1795                                 (unsigned short)pasync_handle->buffer_len;
1796                 list_add_tail(&pasync_handle->link,
1797                               &pasync_ctx->async_entry[cri].wait_queue.list);
1798
1799                 ppdu = pasync_handle->pbuffer;
1800                 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1801                         data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1802                         0xFFFF0000) | ((be16_to_cpu((ppdu->
1803                         dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1804                         & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1805
1806                 if (status == 0) {
1807                         pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1808                             bytes_needed;
1809
1810                         if (bytes_needed == 0)
1811                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1812                                                            pasync_ctx, cri);
1813                 }
1814         } else {
1815                 pasync_ctx->async_data.busy_entries--;
1816                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1817                         list_add_tail(&pasync_handle->link,
1818                                       &pasync_ctx->async_entry[cri].wait_queue.
1819                                       list);
1820                         pasync_ctx->async_entry[cri].wait_queue.
1821                                 bytes_received +=
1822                                 (unsigned short)pasync_handle->buffer_len;
1823
1824                         if (pasync_ctx->async_entry[cri].wait_queue.
1825                             bytes_received >=
1826                             pasync_ctx->async_entry[cri].wait_queue.
1827                             bytes_needed)
1828                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1829                                                            pasync_ctx, cri);
1830                 }
1831         }
1832         return status;
1833 }
1834
1835 static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
1836                                          struct beiscsi_hba *phba,
1837                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1838 {
1839         struct hwi_controller *phwi_ctrlr;
1840         struct hwi_async_pdu_context *pasync_ctx;
1841         struct async_pdu_handle *pasync_handle = NULL;
1842         unsigned int cq_index = -1;
1843         uint16_t cri_index = BE_GET_CRI_FROM_CID(
1844                              beiscsi_conn->beiscsi_conn_cid);
1845
1846         phwi_ctrlr = phba->phwi_ctrlr;
1847         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1848                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1849                      cri_index));
1850
1851         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1852                                              pdpdu_cqe, &cq_index);
1853
1854         if (pasync_handle->consumed == 0)
1855                 hwi_update_async_writables(phba, pasync_ctx,
1856                                            pasync_handle->is_header, cq_index);
1857
1858         hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
1859         hwi_post_async_buffers(phba, pasync_handle->is_header,
1860                                BEISCSI_GET_ULP_FROM_CRI(
1861                                phwi_ctrlr, cri_index));
1862 }
1863
1864 void beiscsi_process_mcc_cq(struct beiscsi_hba *phba)
1865 {
1866         struct be_queue_info *mcc_cq;
1867         struct  be_mcc_compl *mcc_compl;
1868         unsigned int num_processed = 0;
1869
1870         mcc_cq = &phba->ctrl.mcc_obj.cq;
1871         mcc_compl = queue_tail_node(mcc_cq);
1872         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1873         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1874                 if (beiscsi_hba_in_error(phba))
1875                         return;
1876
1877                 if (num_processed >= 32) {
1878                         hwi_ring_cq_db(phba, mcc_cq->id,
1879                                         num_processed, 0);
1880                         num_processed = 0;
1881                 }
1882                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1883                         beiscsi_process_async_event(phba, mcc_compl);
1884                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
1885                         beiscsi_process_mcc_compl(&phba->ctrl, mcc_compl);
1886                 }
1887
1888                 mcc_compl->flags = 0;
1889                 queue_tail_inc(mcc_cq);
1890                 mcc_compl = queue_tail_node(mcc_cq);
1891                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1892                 num_processed++;
1893         }
1894
1895         if (num_processed > 0)
1896                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1);
1897 }
1898
1899 static void beiscsi_mcc_work(struct work_struct *work)
1900 {
1901         struct be_eq_obj *pbe_eq;
1902         struct beiscsi_hba *phba;
1903
1904         pbe_eq = container_of(work, struct be_eq_obj, mcc_work);
1905         phba = pbe_eq->phba;
1906         beiscsi_process_mcc_cq(phba);
1907         /* rearm EQ for further interrupts */
1908         if (!beiscsi_hba_in_error(phba))
1909                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
1910 }
1911
1912 /**
1913  * beiscsi_process_cq()- Process the Completion Queue
1914  * @pbe_eq: Event Q on which the Completion has come
1915  * @budget: Max number of events to processed
1916  *
1917  * return
1918  *     Number of Completion Entries processed.
1919  **/
1920 unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq, int budget)
1921 {
1922         struct be_queue_info *cq;
1923         struct sol_cqe *sol;
1924         struct dmsg_cqe *dmsg;
1925         unsigned int total = 0;
1926         unsigned int num_processed = 0;
1927         unsigned short code = 0, cid = 0;
1928         uint16_t cri_index = 0;
1929         struct beiscsi_conn *beiscsi_conn;
1930         struct beiscsi_endpoint *beiscsi_ep;
1931         struct iscsi_endpoint *ep;
1932         struct beiscsi_hba *phba;
1933
1934         cq = pbe_eq->cq;
1935         sol = queue_tail_node(cq);
1936         phba = pbe_eq->phba;
1937
1938         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
1939                CQE_VALID_MASK) {
1940                 if (beiscsi_hba_in_error(phba))
1941                         return 0;
1942
1943                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
1944
1945                  code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
1946                          32] & CQE_CODE_MASK);
1947
1948                  /* Get the CID */
1949                 if (is_chip_be2_be3r(phba)) {
1950                         cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
1951                 } else {
1952                         if ((code == DRIVERMSG_NOTIFY) ||
1953                             (code == UNSOL_HDR_NOTIFY) ||
1954                             (code == UNSOL_DATA_NOTIFY))
1955                                 cid = AMAP_GET_BITS(
1956                                                     struct amap_i_t_dpdu_cqe_v2,
1957                                                     cid, sol);
1958                          else
1959                                  cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1960                                                      cid, sol);
1961                 }
1962
1963                 cri_index = BE_GET_CRI_FROM_CID(cid);
1964                 ep = phba->ep_array[cri_index];
1965
1966                 if (ep == NULL) {
1967                         /* connection has already been freed
1968                          * just move on to next one
1969                          */
1970                         beiscsi_log(phba, KERN_WARNING,
1971                                     BEISCSI_LOG_INIT,
1972                                     "BM_%d : proc cqe of disconn ep: cid %d\n",
1973                                     cid);
1974                         goto proc_next_cqe;
1975                 }
1976
1977                 beiscsi_ep = ep->dd_data;
1978                 beiscsi_conn = beiscsi_ep->conn;
1979
1980                 /* replenish cq */
1981                 if (num_processed == 32) {
1982                         hwi_ring_cq_db(phba, cq->id, 32, 0);
1983                         num_processed = 0;
1984                 }
1985                 total++;
1986
1987                 switch (code) {
1988                 case SOL_CMD_COMPLETE:
1989                         hwi_complete_cmd(beiscsi_conn, phba, sol);
1990                         break;
1991                 case DRIVERMSG_NOTIFY:
1992                         beiscsi_log(phba, KERN_INFO,
1993                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1994                                     "BM_%d : Received %s[%d] on CID : %d\n",
1995                                     cqe_desc[code], code, cid);
1996
1997                         dmsg = (struct dmsg_cqe *)sol;
1998                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
1999                         break;
2000                 case UNSOL_HDR_NOTIFY:
2001                         beiscsi_log(phba, KERN_INFO,
2002                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2003                                     "BM_%d : Received %s[%d] on CID : %d\n",
2004                                     cqe_desc[code], code, cid);
2005
2006                         spin_lock_bh(&phba->async_pdu_lock);
2007                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2008                                              (struct i_t_dpdu_cqe *)sol);
2009                         spin_unlock_bh(&phba->async_pdu_lock);
2010                         break;
2011                 case UNSOL_DATA_NOTIFY:
2012                         beiscsi_log(phba, KERN_INFO,
2013                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2014                                     "BM_%d : Received %s[%d] on CID : %d\n",
2015                                     cqe_desc[code], code, cid);
2016
2017                         spin_lock_bh(&phba->async_pdu_lock);
2018                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2019                                              (struct i_t_dpdu_cqe *)sol);
2020                         spin_unlock_bh(&phba->async_pdu_lock);
2021                         break;
2022                 case CXN_INVALIDATE_INDEX_NOTIFY:
2023                 case CMD_INVALIDATED_NOTIFY:
2024                 case CXN_INVALIDATE_NOTIFY:
2025                         beiscsi_log(phba, KERN_ERR,
2026                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2027                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
2028                                     cqe_desc[code], code, cid);
2029                         break;
2030                 case CXN_KILLED_HDR_DIGEST_ERR:
2031                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2032                         beiscsi_log(phba, KERN_ERR,
2033                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2034                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2035                                     cqe_desc[code], code,  cid);
2036                         break;
2037                 case CMD_KILLED_INVALID_STATSN_RCVD:
2038                 case CMD_KILLED_INVALID_R2T_RCVD:
2039                 case CMD_CXN_KILLED_LUN_INVALID:
2040                 case CMD_CXN_KILLED_ICD_INVALID:
2041                 case CMD_CXN_KILLED_ITT_INVALID:
2042                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2043                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2044                         beiscsi_log(phba, KERN_ERR,
2045                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2046                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2047                                     cqe_desc[code], code,  cid);
2048                         break;
2049                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2050                         beiscsi_log(phba, KERN_ERR,
2051                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2052                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
2053                                     cqe_desc[code], code, cid);
2054                         spin_lock_bh(&phba->async_pdu_lock);
2055                         hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2056                                              (struct i_t_dpdu_cqe *) sol);
2057                         spin_unlock_bh(&phba->async_pdu_lock);
2058                         break;
2059                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2060                 case CXN_KILLED_BURST_LEN_MISMATCH:
2061                 case CXN_KILLED_AHS_RCVD:
2062                 case CXN_KILLED_UNKNOWN_HDR:
2063                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2064                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2065                 case CXN_KILLED_TIMED_OUT:
2066                 case CXN_KILLED_FIN_RCVD:
2067                 case CXN_KILLED_RST_SENT:
2068                 case CXN_KILLED_RST_RCVD:
2069                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2070                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2071                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2072                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2073                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2074                         beiscsi_log(phba, KERN_ERR,
2075                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2076                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2077                                     cqe_desc[code], code, cid);
2078                         if (beiscsi_conn)
2079                                 iscsi_conn_failure(beiscsi_conn->conn,
2080                                                    ISCSI_ERR_CONN_FAILED);
2081                         break;
2082                 default:
2083                         beiscsi_log(phba, KERN_ERR,
2084                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2085                                     "BM_%d : Invalid CQE Event Received Code : %d"
2086                                     "CID 0x%x...\n",
2087                                     code, cid);
2088                         break;
2089                 }
2090
2091 proc_next_cqe:
2092                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2093                 queue_tail_inc(cq);
2094                 sol = queue_tail_node(cq);
2095                 num_processed++;
2096                 if (total == budget)
2097                         break;
2098         }
2099
2100         hwi_ring_cq_db(phba, cq->id, num_processed, 1);
2101         return total;
2102 }
2103
2104 static int be_iopoll(struct irq_poll *iop, int budget)
2105 {
2106         unsigned int ret, io_events;
2107         struct beiscsi_hba *phba;
2108         struct be_eq_obj *pbe_eq;
2109         struct be_eq_entry *eqe = NULL;
2110         struct be_queue_info *eq;
2111
2112         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2113         phba = pbe_eq->phba;
2114         if (beiscsi_hba_in_error(phba)) {
2115                 irq_poll_complete(iop);
2116                 return 0;
2117         }
2118
2119         io_events = 0;
2120         eq = &pbe_eq->q;
2121         eqe = queue_tail_node(eq);
2122         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] &
2123                         EQE_VALID_MASK) {
2124                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
2125                 queue_tail_inc(eq);
2126                 eqe = queue_tail_node(eq);
2127                 io_events++;
2128         }
2129         hwi_ring_eq_db(phba, eq->id, 1, io_events, 0, 1);
2130
2131         ret = beiscsi_process_cq(pbe_eq, budget);
2132         pbe_eq->cq_count += ret;
2133         if (ret < budget) {
2134                 irq_poll_complete(iop);
2135                 beiscsi_log(phba, KERN_INFO,
2136                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2137                             "BM_%d : rearm pbe_eq->q.id =%d ret %d\n",
2138                             pbe_eq->q.id, ret);
2139                 if (!beiscsi_hba_in_error(phba))
2140                         hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2141         }
2142         return ret;
2143 }
2144
2145 static void
2146 hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2147                   unsigned int num_sg, struct beiscsi_io_task *io_task)
2148 {
2149         struct iscsi_sge *psgl;
2150         unsigned int sg_len, index;
2151         unsigned int sge_len = 0;
2152         unsigned long long addr;
2153         struct scatterlist *l_sg;
2154         unsigned int offset;
2155
2156         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2157                       io_task->bhs_pa.u.a32.address_lo);
2158         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2159                       io_task->bhs_pa.u.a32.address_hi);
2160
2161         l_sg = sg;
2162         for (index = 0; (index < num_sg) && (index < 2); index++,
2163                         sg = sg_next(sg)) {
2164                 if (index == 0) {
2165                         sg_len = sg_dma_len(sg);
2166                         addr = (u64) sg_dma_address(sg);
2167                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2168                                       sge0_addr_lo, pwrb,
2169                                       lower_32_bits(addr));
2170                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2171                                       sge0_addr_hi, pwrb,
2172                                       upper_32_bits(addr));
2173                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2174                                       sge0_len, pwrb,
2175                                       sg_len);
2176                         sge_len = sg_len;
2177                 } else {
2178                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2179                                       pwrb, sge_len);
2180                         sg_len = sg_dma_len(sg);
2181                         addr = (u64) sg_dma_address(sg);
2182                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2183                                       sge1_addr_lo, pwrb,
2184                                       lower_32_bits(addr));
2185                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2186                                       sge1_addr_hi, pwrb,
2187                                       upper_32_bits(addr));
2188                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2189                                       sge1_len, pwrb,
2190                                       sg_len);
2191                 }
2192         }
2193         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2194         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2195
2196         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2197
2198         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2199                       io_task->bhs_pa.u.a32.address_hi);
2200         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2201                       io_task->bhs_pa.u.a32.address_lo);
2202
2203         if (num_sg == 1) {
2204                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2205                               1);
2206                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2207                               0);
2208         } else if (num_sg == 2) {
2209                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2210                               0);
2211                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2212                               1);
2213         } else {
2214                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2215                               0);
2216                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2217                               0);
2218         }
2219
2220         sg = l_sg;
2221         psgl++;
2222         psgl++;
2223         offset = 0;
2224         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2225                 sg_len = sg_dma_len(sg);
2226                 addr = (u64) sg_dma_address(sg);
2227                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2228                               lower_32_bits(addr));
2229                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2230                               upper_32_bits(addr));
2231                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2232                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2233                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2234                 offset += sg_len;
2235         }
2236         psgl--;
2237         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2238 }
2239
2240 static void
2241 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2242               unsigned int num_sg, struct beiscsi_io_task *io_task)
2243 {
2244         struct iscsi_sge *psgl;
2245         unsigned int sg_len, index;
2246         unsigned int sge_len = 0;
2247         unsigned long long addr;
2248         struct scatterlist *l_sg;
2249         unsigned int offset;
2250
2251         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2252                                       io_task->bhs_pa.u.a32.address_lo);
2253         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2254                                       io_task->bhs_pa.u.a32.address_hi);
2255
2256         l_sg = sg;
2257         for (index = 0; (index < num_sg) && (index < 2); index++,
2258                                                          sg = sg_next(sg)) {
2259                 if (index == 0) {
2260                         sg_len = sg_dma_len(sg);
2261                         addr = (u64) sg_dma_address(sg);
2262                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2263                                                 ((u32)(addr & 0xFFFFFFFF)));
2264                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2265                                                         ((u32)(addr >> 32)));
2266                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2267                                                         sg_len);
2268                         sge_len = sg_len;
2269                 } else {
2270                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2271                                                         pwrb, sge_len);
2272                         sg_len = sg_dma_len(sg);
2273                         addr = (u64) sg_dma_address(sg);
2274                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2275                                                 ((u32)(addr & 0xFFFFFFFF)));
2276                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2277                                                         ((u32)(addr >> 32)));
2278                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2279                                                         sg_len);
2280                 }
2281         }
2282         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2283         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2284
2285         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2286
2287         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2288                         io_task->bhs_pa.u.a32.address_hi);
2289         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2290                         io_task->bhs_pa.u.a32.address_lo);
2291
2292         if (num_sg == 1) {
2293                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2294                                                                 1);
2295                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2296                                                                 0);
2297         } else if (num_sg == 2) {
2298                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2299                                                                 0);
2300                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2301                                                                 1);
2302         } else {
2303                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2304                                                                 0);
2305                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2306                                                                 0);
2307         }
2308         sg = l_sg;
2309         psgl++;
2310         psgl++;
2311         offset = 0;
2312         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2313                 sg_len = sg_dma_len(sg);
2314                 addr = (u64) sg_dma_address(sg);
2315                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2316                                                 (addr & 0xFFFFFFFF));
2317                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2318                                                 (addr >> 32));
2319                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2320                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2321                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2322                 offset += sg_len;
2323         }
2324         psgl--;
2325         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2326 }
2327
2328 /**
2329  * hwi_write_buffer()- Populate the WRB with task info
2330  * @pwrb: ptr to the WRB entry
2331  * @task: iscsi task which is to be executed
2332  **/
2333 static int hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2334 {
2335         struct iscsi_sge *psgl;
2336         struct beiscsi_io_task *io_task = task->dd_data;
2337         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2338         struct beiscsi_hba *phba = beiscsi_conn->phba;
2339         uint8_t dsp_value = 0;
2340
2341         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2342         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2343                                 io_task->bhs_pa.u.a32.address_lo);
2344         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2345                                 io_task->bhs_pa.u.a32.address_hi);
2346
2347         if (task->data) {
2348
2349                 /* Check for the data_count */
2350                 dsp_value = (task->data_count) ? 1 : 0;
2351
2352                 if (is_chip_be2_be3r(phba))
2353                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2354                                       pwrb, dsp_value);
2355                 else
2356                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2357                                       pwrb, dsp_value);
2358
2359                 /* Map addr only if there is data_count */
2360                 if (dsp_value) {
2361                         io_task->mtask_addr = pci_map_single(phba->pcidev,
2362                                                              task->data,
2363                                                              task->data_count,
2364                                                              PCI_DMA_TODEVICE);
2365                         if (pci_dma_mapping_error(phba->pcidev,
2366                                                   io_task->mtask_addr))
2367                                 return -ENOMEM;
2368                         io_task->mtask_data_count = task->data_count;
2369                 } else
2370                         io_task->mtask_addr = 0;
2371
2372                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2373                               lower_32_bits(io_task->mtask_addr));
2374                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2375                               upper_32_bits(io_task->mtask_addr));
2376                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2377                                                 task->data_count);
2378
2379                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2380         } else {
2381                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2382                 io_task->mtask_addr = 0;
2383         }
2384
2385         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2386
2387         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2388
2389         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2390                       io_task->bhs_pa.u.a32.address_hi);
2391         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2392                       io_task->bhs_pa.u.a32.address_lo);
2393         if (task->data) {
2394                 psgl++;
2395                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2396                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2397                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2398                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2399                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2400                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2401
2402                 psgl++;
2403                 if (task->data) {
2404                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2405                                       lower_32_bits(io_task->mtask_addr));
2406                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2407                                       upper_32_bits(io_task->mtask_addr));
2408                 }
2409                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2410         }
2411         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2412         return 0;
2413 }
2414
2415 /**
2416  * beiscsi_find_mem_req()- Find mem needed
2417  * @phba: ptr to HBA struct
2418  **/
2419 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2420 {
2421         uint8_t mem_descr_index, ulp_num;
2422         unsigned int num_cq_pages, num_async_pdu_buf_pages;
2423         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2424         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2425
2426         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2427                                       sizeof(struct sol_cqe));
2428
2429         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2430
2431         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2432                                                  BE_ISCSI_PDU_HEADER_SIZE;
2433         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2434                                             sizeof(struct hwi_context_memory);
2435
2436
2437         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2438             * (phba->params.wrbs_per_cxn)
2439             * phba->params.cxns_per_ctrl;
2440         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2441                                  (phba->params.wrbs_per_cxn);
2442         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2443                                 phba->params.cxns_per_ctrl);
2444
2445         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2446                 phba->params.icds_per_ctrl;
2447         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2448                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2449         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2450                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2451
2452                         num_async_pdu_buf_sgl_pages =
2453                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2454                                                phba, ulp_num) *
2455                                                sizeof(struct phys_addr));
2456
2457                         num_async_pdu_buf_pages =
2458                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2459                                                phba, ulp_num) *
2460                                                phba->params.defpdu_hdr_sz);
2461
2462                         num_async_pdu_data_pages =
2463                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2464                                                phba, ulp_num) *
2465                                                phba->params.defpdu_data_sz);
2466
2467                         num_async_pdu_data_sgl_pages =
2468                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2469                                                phba, ulp_num) *
2470                                                sizeof(struct phys_addr));
2471
2472                         mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2473                                           (ulp_num * MEM_DESCR_OFFSET));
2474                         phba->mem_req[mem_descr_index] =
2475                                         BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2476                                         BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2477
2478                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2479                                           (ulp_num * MEM_DESCR_OFFSET));
2480                         phba->mem_req[mem_descr_index] =
2481                                           num_async_pdu_buf_pages *
2482                                           PAGE_SIZE;
2483
2484                         mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2485                                           (ulp_num * MEM_DESCR_OFFSET));
2486                         phba->mem_req[mem_descr_index] =
2487                                           num_async_pdu_data_pages *
2488                                           PAGE_SIZE;
2489
2490                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2491                                           (ulp_num * MEM_DESCR_OFFSET));
2492                         phba->mem_req[mem_descr_index] =
2493                                           num_async_pdu_buf_sgl_pages *
2494                                           PAGE_SIZE;
2495
2496                         mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2497                                           (ulp_num * MEM_DESCR_OFFSET));
2498                         phba->mem_req[mem_descr_index] =
2499                                           num_async_pdu_data_sgl_pages *
2500                                           PAGE_SIZE;
2501
2502                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2503                                           (ulp_num * MEM_DESCR_OFFSET));
2504                         phba->mem_req[mem_descr_index] =
2505                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2506                                           sizeof(struct async_pdu_handle);
2507
2508                         mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2509                                           (ulp_num * MEM_DESCR_OFFSET));
2510                         phba->mem_req[mem_descr_index] =
2511                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2512                                           sizeof(struct async_pdu_handle);
2513
2514                         mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2515                                           (ulp_num * MEM_DESCR_OFFSET));
2516                         phba->mem_req[mem_descr_index] =
2517                                           sizeof(struct hwi_async_pdu_context) +
2518                                          (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2519                                           sizeof(struct hwi_async_entry));
2520                 }
2521         }
2522 }
2523
2524 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2525 {
2526         dma_addr_t bus_add;
2527         struct hwi_controller *phwi_ctrlr;
2528         struct be_mem_descriptor *mem_descr;
2529         struct mem_array *mem_arr, *mem_arr_orig;
2530         unsigned int i, j, alloc_size, curr_alloc_size;
2531
2532         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2533         if (!phba->phwi_ctrlr)
2534                 return -ENOMEM;
2535
2536         /* Allocate memory for wrb_context */
2537         phwi_ctrlr = phba->phwi_ctrlr;
2538         phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2539                                           phba->params.cxns_per_ctrl,
2540                                           GFP_KERNEL);
2541         if (!phwi_ctrlr->wrb_context) {
2542                 kfree(phba->phwi_ctrlr);
2543                 return -ENOMEM;
2544         }
2545
2546         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2547                                  GFP_KERNEL);
2548         if (!phba->init_mem) {
2549                 kfree(phwi_ctrlr->wrb_context);
2550                 kfree(phba->phwi_ctrlr);
2551                 return -ENOMEM;
2552         }
2553
2554         mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2555                                GFP_KERNEL);
2556         if (!mem_arr_orig) {
2557                 kfree(phba->init_mem);
2558                 kfree(phwi_ctrlr->wrb_context);
2559                 kfree(phba->phwi_ctrlr);
2560                 return -ENOMEM;
2561         }
2562
2563         mem_descr = phba->init_mem;
2564         for (i = 0; i < SE_MEM_MAX; i++) {
2565                 if (!phba->mem_req[i]) {
2566                         mem_descr->mem_array = NULL;
2567                         mem_descr++;
2568                         continue;
2569                 }
2570
2571                 j = 0;
2572                 mem_arr = mem_arr_orig;
2573                 alloc_size = phba->mem_req[i];
2574                 memset(mem_arr, 0, sizeof(struct mem_array) *
2575                        BEISCSI_MAX_FRAGS_INIT);
2576                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2577                 do {
2578                         mem_arr->virtual_address = pci_alloc_consistent(
2579                                                         phba->pcidev,
2580                                                         curr_alloc_size,
2581                                                         &bus_add);
2582                         if (!mem_arr->virtual_address) {
2583                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2584                                         goto free_mem;
2585                                 if (curr_alloc_size -
2586                                         rounddown_pow_of_two(curr_alloc_size))
2587                                         curr_alloc_size = rounddown_pow_of_two
2588                                                              (curr_alloc_size);
2589                                 else
2590                                         curr_alloc_size = curr_alloc_size / 2;
2591                         } else {
2592                                 mem_arr->bus_address.u.
2593                                     a64.address = (__u64) bus_add;
2594                                 mem_arr->size = curr_alloc_size;
2595                                 alloc_size -= curr_alloc_size;
2596                                 curr_alloc_size = min(be_max_phys_size *
2597                                                       1024, alloc_size);
2598                                 j++;
2599                                 mem_arr++;
2600                         }
2601                 } while (alloc_size);
2602                 mem_descr->num_elements = j;
2603                 mem_descr->size_in_bytes = phba->mem_req[i];
2604                 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2605                                                GFP_KERNEL);
2606                 if (!mem_descr->mem_array)
2607                         goto free_mem;
2608
2609                 memcpy(mem_descr->mem_array, mem_arr_orig,
2610                        sizeof(struct mem_array) * j);
2611                 mem_descr++;
2612         }
2613         kfree(mem_arr_orig);
2614         return 0;
2615 free_mem:
2616         mem_descr->num_elements = j;
2617         while ((i) || (j)) {
2618                 for (j = mem_descr->num_elements; j > 0; j--) {
2619                         pci_free_consistent(phba->pcidev,
2620                                             mem_descr->mem_array[j - 1].size,
2621                                             mem_descr->mem_array[j - 1].
2622                                             virtual_address,
2623                                             (unsigned long)mem_descr->
2624                                             mem_array[j - 1].
2625                                             bus_address.u.a64.address);
2626                 }
2627                 if (i) {
2628                         i--;
2629                         kfree(mem_descr->mem_array);
2630                         mem_descr--;
2631                 }
2632         }
2633         kfree(mem_arr_orig);
2634         kfree(phba->init_mem);
2635         kfree(phba->phwi_ctrlr->wrb_context);
2636         kfree(phba->phwi_ctrlr);
2637         return -ENOMEM;
2638 }
2639
2640 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2641 {
2642         beiscsi_find_mem_req(phba);
2643         return beiscsi_alloc_mem(phba);
2644 }
2645
2646 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2647 {
2648         struct pdu_data_out *pdata_out;
2649         struct pdu_nop_out *pnop_out;
2650         struct be_mem_descriptor *mem_descr;
2651
2652         mem_descr = phba->init_mem;
2653         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2654         pdata_out =
2655             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2656         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2657
2658         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2659                       IIOC_SCSI_DATA);
2660
2661         pnop_out =
2662             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2663                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2664
2665         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2666         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2667         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2668         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2669 }
2670
2671 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2672 {
2673         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2674         struct hwi_context_memory *phwi_ctxt;
2675         struct wrb_handle *pwrb_handle = NULL;
2676         struct hwi_controller *phwi_ctrlr;
2677         struct hwi_wrb_context *pwrb_context;
2678         struct iscsi_wrb *pwrb = NULL;
2679         unsigned int num_cxn_wrbh = 0;
2680         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2681
2682         mem_descr_wrbh = phba->init_mem;
2683         mem_descr_wrbh += HWI_MEM_WRBH;
2684
2685         mem_descr_wrb = phba->init_mem;
2686         mem_descr_wrb += HWI_MEM_WRB;
2687         phwi_ctrlr = phba->phwi_ctrlr;
2688
2689         /* Allocate memory for WRBQ */
2690         phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2691         phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2692                                      phba->params.cxns_per_ctrl,
2693                                      GFP_KERNEL);
2694         if (!phwi_ctxt->be_wrbq) {
2695                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2696                             "BM_%d : WRBQ Mem Alloc Failed\n");
2697                 return -ENOMEM;
2698         }
2699
2700         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2701                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2702                 pwrb_context->pwrb_handle_base =
2703                                 kzalloc(sizeof(struct wrb_handle *) *
2704                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2705                 if (!pwrb_context->pwrb_handle_base) {
2706                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2707                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2708                         goto init_wrb_hndl_failed;
2709                 }
2710                 pwrb_context->pwrb_handle_basestd =
2711                                 kzalloc(sizeof(struct wrb_handle *) *
2712                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2713                 if (!pwrb_context->pwrb_handle_basestd) {
2714                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2715                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2716                         goto init_wrb_hndl_failed;
2717                 }
2718                 if (!num_cxn_wrbh) {
2719                         pwrb_handle =
2720                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2721                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2722                                         ((sizeof(struct wrb_handle)) *
2723                                          phba->params.wrbs_per_cxn));
2724                         idx++;
2725                 }
2726                 pwrb_context->alloc_index = 0;
2727                 pwrb_context->wrb_handles_available = 0;
2728                 pwrb_context->free_index = 0;
2729
2730                 if (num_cxn_wrbh) {
2731                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2732                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2733                                 pwrb_context->pwrb_handle_basestd[j] =
2734                                                                 pwrb_handle;
2735                                 pwrb_context->wrb_handles_available++;
2736                                 pwrb_handle->wrb_index = j;
2737                                 pwrb_handle++;
2738                         }
2739                         num_cxn_wrbh--;
2740                 }
2741                 spin_lock_init(&pwrb_context->wrb_lock);
2742         }
2743         idx = 0;
2744         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2745                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2746                 if (!num_cxn_wrb) {
2747                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2748                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2749                                 ((sizeof(struct iscsi_wrb) *
2750                                   phba->params.wrbs_per_cxn));
2751                         idx++;
2752                 }
2753
2754                 if (num_cxn_wrb) {
2755                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2756                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2757                                 pwrb_handle->pwrb = pwrb;
2758                                 pwrb++;
2759                         }
2760                         num_cxn_wrb--;
2761                 }
2762         }
2763         return 0;
2764 init_wrb_hndl_failed:
2765         for (j = index; j > 0; j--) {
2766                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2767                 kfree(pwrb_context->pwrb_handle_base);
2768                 kfree(pwrb_context->pwrb_handle_basestd);
2769         }
2770         return -ENOMEM;
2771 }
2772
2773 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2774 {
2775         uint8_t ulp_num;
2776         struct hwi_controller *phwi_ctrlr;
2777         struct hba_parameters *p = &phba->params;
2778         struct hwi_async_pdu_context *pasync_ctx;
2779         struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2780         unsigned int index, idx, num_per_mem, num_async_data;
2781         struct be_mem_descriptor *mem_descr;
2782
2783         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2784                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2785
2786                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2787                         mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2788                                      (ulp_num * MEM_DESCR_OFFSET));
2789
2790                         phwi_ctrlr = phba->phwi_ctrlr;
2791                         phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2792                                 (struct hwi_async_pdu_context *)
2793                                  mem_descr->mem_array[0].virtual_address;
2794
2795                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2796                         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2797
2798                         pasync_ctx->async_entry =
2799                                         (struct hwi_async_entry *)
2800                                         ((long unsigned int)pasync_ctx +
2801                                         sizeof(struct hwi_async_pdu_context));
2802
2803                         pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
2804                                                   ulp_num);
2805                         pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2806
2807                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2808                         mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2809                                 (ulp_num * MEM_DESCR_OFFSET);
2810                         if (mem_descr->mem_array[0].virtual_address) {
2811                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2812                                             "BM_%d : hwi_init_async_pdu_ctx"
2813                                             " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2814                                             ulp_num,
2815                                             mem_descr->mem_array[0].
2816                                             virtual_address);
2817                         } else
2818                                 beiscsi_log(phba, KERN_WARNING,
2819                                             BEISCSI_LOG_INIT,
2820                                             "BM_%d : No Virtual address for ULP : %d\n",
2821                                             ulp_num);
2822
2823                         pasync_ctx->async_header.va_base =
2824                                 mem_descr->mem_array[0].virtual_address;
2825
2826                         pasync_ctx->async_header.pa_base.u.a64.address =
2827                                 mem_descr->mem_array[0].
2828                                 bus_address.u.a64.address;
2829
2830                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2831                         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2832                                      (ulp_num * MEM_DESCR_OFFSET);
2833                         if (mem_descr->mem_array[0].virtual_address) {
2834                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2835                                             "BM_%d : hwi_init_async_pdu_ctx"
2836                                             " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
2837                                             ulp_num,
2838                                             mem_descr->mem_array[0].
2839                                             virtual_address);
2840                         } else
2841                                 beiscsi_log(phba, KERN_WARNING,
2842                                             BEISCSI_LOG_INIT,
2843                                             "BM_%d : No Virtual address for ULP : %d\n",
2844                                             ulp_num);
2845
2846                         pasync_ctx->async_header.ring_base =
2847                                 mem_descr->mem_array[0].virtual_address;
2848
2849                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2850                         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2851                                      (ulp_num * MEM_DESCR_OFFSET);
2852                         if (mem_descr->mem_array[0].virtual_address) {
2853                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2854                                             "BM_%d : hwi_init_async_pdu_ctx"
2855                                             " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
2856                                             ulp_num,
2857                                             mem_descr->mem_array[0].
2858                                             virtual_address);
2859                         } else
2860                                 beiscsi_log(phba, KERN_WARNING,
2861                                             BEISCSI_LOG_INIT,
2862                                             "BM_%d : No Virtual address for ULP : %d\n",
2863                                             ulp_num);
2864
2865                         pasync_ctx->async_header.handle_base =
2866                                 mem_descr->mem_array[0].virtual_address;
2867                         pasync_ctx->async_header.writables = 0;
2868                         INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
2869
2870                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2871                         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
2872                                      (ulp_num * MEM_DESCR_OFFSET);
2873                         if (mem_descr->mem_array[0].virtual_address) {
2874                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2875                                             "BM_%d : hwi_init_async_pdu_ctx"
2876                                             " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
2877                                             ulp_num,
2878                                             mem_descr->mem_array[0].
2879                                             virtual_address);
2880                         } else
2881                                 beiscsi_log(phba, KERN_WARNING,
2882                                             BEISCSI_LOG_INIT,
2883                                             "BM_%d : No Virtual address for ULP : %d\n",
2884                                             ulp_num);
2885
2886                         pasync_ctx->async_data.ring_base =
2887                                 mem_descr->mem_array[0].virtual_address;
2888
2889                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2890                         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2891                                      (ulp_num * MEM_DESCR_OFFSET);
2892                         if (!mem_descr->mem_array[0].virtual_address)
2893                                 beiscsi_log(phba, KERN_WARNING,
2894                                             BEISCSI_LOG_INIT,
2895                                             "BM_%d : No Virtual address for ULP : %d\n",
2896                                             ulp_num);
2897
2898                         pasync_ctx->async_data.handle_base =
2899                                 mem_descr->mem_array[0].virtual_address;
2900                         pasync_ctx->async_data.writables = 0;
2901                         INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
2902
2903                         pasync_header_h =
2904                                 (struct async_pdu_handle *)
2905                                 pasync_ctx->async_header.handle_base;
2906                         pasync_data_h =
2907                                 (struct async_pdu_handle *)
2908                                 pasync_ctx->async_data.handle_base;
2909
2910                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2911                         mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2912                                      (ulp_num * MEM_DESCR_OFFSET);
2913                         if (mem_descr->mem_array[0].virtual_address) {
2914                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2915                                             "BM_%d : hwi_init_async_pdu_ctx"
2916                                             " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
2917                                             ulp_num,
2918                                             mem_descr->mem_array[0].
2919                                             virtual_address);
2920                         } else
2921                                 beiscsi_log(phba, KERN_WARNING,
2922                                             BEISCSI_LOG_INIT,
2923                                             "BM_%d : No Virtual address for ULP : %d\n",
2924                                             ulp_num);
2925
2926                         idx = 0;
2927                         pasync_ctx->async_data.va_base =
2928                                 mem_descr->mem_array[idx].virtual_address;
2929                         pasync_ctx->async_data.pa_base.u.a64.address =
2930                                 mem_descr->mem_array[idx].
2931                                 bus_address.u.a64.address;
2932
2933                         num_async_data = ((mem_descr->mem_array[idx].size) /
2934                                         phba->params.defpdu_data_sz);
2935                         num_per_mem = 0;
2936
2937                         for (index = 0; index < BEISCSI_GET_CID_COUNT
2938                                         (phba, ulp_num); index++) {
2939                                 pasync_header_h->cri = -1;
2940                                 pasync_header_h->index = (char)index;
2941                                 INIT_LIST_HEAD(&pasync_header_h->link);
2942                                 pasync_header_h->pbuffer =
2943                                         (void *)((unsigned long)
2944                                                  (pasync_ctx->
2945                                                   async_header.va_base) +
2946                                                  (p->defpdu_hdr_sz * index));
2947
2948                                 pasync_header_h->pa.u.a64.address =
2949                                         pasync_ctx->async_header.pa_base.u.a64.
2950                                         address + (p->defpdu_hdr_sz * index);
2951
2952                                 list_add_tail(&pasync_header_h->link,
2953                                               &pasync_ctx->async_header.
2954                                               free_list);
2955                                 pasync_header_h++;
2956                                 pasync_ctx->async_header.free_entries++;
2957                                 pasync_ctx->async_header.writables++;
2958
2959                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
2960                                                wait_queue.list);
2961                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
2962                                                header_busy_list);
2963                                 pasync_data_h->cri = -1;
2964                                 pasync_data_h->index = (char)index;
2965                                 INIT_LIST_HEAD(&pasync_data_h->link);
2966
2967                                 if (!num_async_data) {
2968                                         num_per_mem = 0;
2969                                         idx++;
2970                                         pasync_ctx->async_data.va_base =
2971                                                 mem_descr->mem_array[idx].
2972                                                 virtual_address;
2973                                         pasync_ctx->async_data.pa_base.u.
2974                                                 a64.address =
2975                                                 mem_descr->mem_array[idx].
2976                                                 bus_address.u.a64.address;
2977                                         num_async_data =
2978                                                 ((mem_descr->mem_array[idx].
2979                                                   size) /
2980                                                  phba->params.defpdu_data_sz);
2981                                 }
2982                                 pasync_data_h->pbuffer =
2983                                         (void *)((unsigned long)
2984                                         (pasync_ctx->async_data.va_base) +
2985                                         (p->defpdu_data_sz * num_per_mem));
2986
2987                                 pasync_data_h->pa.u.a64.address =
2988                                         pasync_ctx->async_data.pa_base.u.a64.
2989                                         address + (p->defpdu_data_sz *
2990                                         num_per_mem);
2991                                 num_per_mem++;
2992                                 num_async_data--;
2993
2994                                 list_add_tail(&pasync_data_h->link,
2995                                               &pasync_ctx->async_data.
2996                                               free_list);
2997                                 pasync_data_h++;
2998                                 pasync_ctx->async_data.free_entries++;
2999                                 pasync_ctx->async_data.writables++;
3000
3001                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3002                                                data_busy_list);
3003                         }
3004
3005                         pasync_ctx->async_header.host_write_ptr = 0;
3006                         pasync_ctx->async_header.ep_read_ptr = -1;
3007                         pasync_ctx->async_data.host_write_ptr = 0;
3008                         pasync_ctx->async_data.ep_read_ptr = -1;
3009                 }
3010         }
3011
3012         return 0;
3013 }
3014
3015 static int
3016 be_sgl_create_contiguous(void *virtual_address,
3017                          u64 physical_address, u32 length,
3018                          struct be_dma_mem *sgl)
3019 {
3020         WARN_ON(!virtual_address);
3021         WARN_ON(!physical_address);
3022         WARN_ON(!length);
3023         WARN_ON(!sgl);
3024
3025         sgl->va = virtual_address;
3026         sgl->dma = (unsigned long)physical_address;
3027         sgl->size = length;
3028
3029         return 0;
3030 }
3031
3032 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
3033 {
3034         memset(sgl, 0, sizeof(*sgl));
3035 }
3036
3037 static void
3038 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
3039                      struct mem_array *pmem, struct be_dma_mem *sgl)
3040 {
3041         if (sgl->va)
3042                 be_sgl_destroy_contiguous(sgl);
3043
3044         be_sgl_create_contiguous(pmem->virtual_address,
3045                                  pmem->bus_address.u.a64.address,
3046                                  pmem->size, sgl);
3047 }
3048
3049 static void
3050 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3051                            struct mem_array *pmem, struct be_dma_mem *sgl)
3052 {
3053         if (sgl->va)
3054                 be_sgl_destroy_contiguous(sgl);
3055
3056         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
3057                                  pmem->bus_address.u.a64.address,
3058                                  pmem->size, sgl);
3059 }
3060
3061 static int be_fill_queue(struct be_queue_info *q,
3062                 u16 len, u16 entry_size, void *vaddress)
3063 {
3064         struct be_dma_mem *mem = &q->dma_mem;
3065
3066         memset(q, 0, sizeof(*q));
3067         q->len = len;
3068         q->entry_size = entry_size;
3069         mem->size = len * entry_size;
3070         mem->va = vaddress;
3071         if (!mem->va)
3072                 return -ENOMEM;
3073         memset(mem->va, 0, mem->size);
3074         return 0;
3075 }
3076
3077 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3078                              struct hwi_context_memory *phwi_context)
3079 {
3080         unsigned int i, num_eq_pages;
3081         int ret = 0, eq_for_mcc;
3082         struct be_queue_info *eq;
3083         struct be_dma_mem *mem;
3084         void *eq_vaddress;
3085         dma_addr_t paddr;
3086
3087         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3088                                       sizeof(struct be_eq_entry));
3089
3090         if (phba->msix_enabled)
3091                 eq_for_mcc = 1;
3092         else
3093                 eq_for_mcc = 0;
3094         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3095                 eq = &phwi_context->be_eq[i].q;
3096                 mem = &eq->dma_mem;
3097                 phwi_context->be_eq[i].phba = phba;
3098                 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3099                                                      num_eq_pages * PAGE_SIZE,
3100                                                      &paddr);
3101                 if (!eq_vaddress)
3102                         goto create_eq_error;
3103
3104                 mem->va = eq_vaddress;
3105                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3106                                     sizeof(struct be_eq_entry), eq_vaddress);
3107                 if (ret) {
3108                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3109                                     "BM_%d : be_fill_queue Failed for EQ\n");
3110                         goto create_eq_error;
3111                 }
3112
3113                 mem->dma = paddr;
3114                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3115                                             phwi_context->cur_eqd);
3116                 if (ret) {
3117                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3118                                     "BM_%d : beiscsi_cmd_eq_create"
3119                                     "Failed for EQ\n");
3120                         goto create_eq_error;
3121                 }
3122
3123                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3124                             "BM_%d : eqid = %d\n",
3125                             phwi_context->be_eq[i].q.id);
3126         }
3127         return 0;
3128 create_eq_error:
3129         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3130                 eq = &phwi_context->be_eq[i].q;
3131                 mem = &eq->dma_mem;
3132                 if (mem->va)
3133                         pci_free_consistent(phba->pcidev, num_eq_pages
3134                                             * PAGE_SIZE,
3135                                             mem->va, mem->dma);
3136         }
3137         return ret;
3138 }
3139
3140 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3141                              struct hwi_context_memory *phwi_context)
3142 {
3143         unsigned int i, num_cq_pages;
3144         int ret = 0;
3145         struct be_queue_info *cq, *eq;
3146         struct be_dma_mem *mem;
3147         struct be_eq_obj *pbe_eq;
3148         void *cq_vaddress;
3149         dma_addr_t paddr;
3150
3151         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3152                                       sizeof(struct sol_cqe));
3153
3154         for (i = 0; i < phba->num_cpus; i++) {
3155                 cq = &phwi_context->be_cq[i];
3156                 eq = &phwi_context->be_eq[i].q;
3157                 pbe_eq = &phwi_context->be_eq[i];
3158                 pbe_eq->cq = cq;
3159                 pbe_eq->phba = phba;
3160                 mem = &cq->dma_mem;
3161                 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3162                                                      num_cq_pages * PAGE_SIZE,
3163                                                      &paddr);
3164                 if (!cq_vaddress)
3165                         goto create_cq_error;
3166                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3167                                     sizeof(struct sol_cqe), cq_vaddress);
3168                 if (ret) {
3169                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3170                                     "BM_%d : be_fill_queue Failed "
3171                                     "for ISCSI CQ\n");
3172                         goto create_cq_error;
3173                 }
3174
3175                 mem->dma = paddr;
3176                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3177                                             false, 0);
3178                 if (ret) {
3179                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3180                                     "BM_%d : beiscsi_cmd_eq_create"
3181                                     "Failed for ISCSI CQ\n");
3182                         goto create_cq_error;
3183                 }
3184                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3185                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3186                             "iSCSI CQ CREATED\n", cq->id, eq->id);
3187         }
3188         return 0;
3189
3190 create_cq_error:
3191         for (i = 0; i < phba->num_cpus; i++) {
3192                 cq = &phwi_context->be_cq[i];
3193                 mem = &cq->dma_mem;
3194                 if (mem->va)
3195                         pci_free_consistent(phba->pcidev, num_cq_pages
3196                                             * PAGE_SIZE,
3197                                             mem->va, mem->dma);
3198         }
3199         return ret;
3200
3201 }
3202
3203 static int
3204 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3205                        struct hwi_context_memory *phwi_context,
3206                        struct hwi_controller *phwi_ctrlr,
3207                        unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3208 {
3209         unsigned int idx;
3210         int ret;
3211         struct be_queue_info *dq, *cq;
3212         struct be_dma_mem *mem;
3213         struct be_mem_descriptor *mem_descr;
3214         void *dq_vaddress;
3215
3216         idx = 0;
3217         dq = &phwi_context->be_def_hdrq[ulp_num];
3218         cq = &phwi_context->be_cq[0];
3219         mem = &dq->dma_mem;
3220         mem_descr = phba->init_mem;
3221         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3222                     (ulp_num * MEM_DESCR_OFFSET);
3223         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3224         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3225                             sizeof(struct phys_addr),
3226                             sizeof(struct phys_addr), dq_vaddress);
3227         if (ret) {
3228                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3229                             "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3230                             ulp_num);
3231
3232                 return ret;
3233         }
3234         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3235                                   bus_address.u.a64.address;
3236         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3237                                               def_pdu_ring_sz,
3238                                               phba->params.defpdu_hdr_sz,
3239                                               BEISCSI_DEFQ_HDR, ulp_num);
3240         if (ret) {
3241                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3242                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3243                             ulp_num);
3244
3245                 return ret;
3246         }
3247
3248         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3249                     "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3250                     ulp_num,
3251                     phwi_context->be_def_hdrq[ulp_num].id);
3252         return 0;
3253 }
3254
3255 static int
3256 beiscsi_create_def_data(struct beiscsi_hba *phba,
3257                         struct hwi_context_memory *phwi_context,
3258                         struct hwi_controller *phwi_ctrlr,
3259                         unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3260 {
3261         unsigned int idx;
3262         int ret;
3263         struct be_queue_info *dataq, *cq;
3264         struct be_dma_mem *mem;
3265         struct be_mem_descriptor *mem_descr;
3266         void *dq_vaddress;
3267
3268         idx = 0;
3269         dataq = &phwi_context->be_def_dataq[ulp_num];
3270         cq = &phwi_context->be_cq[0];
3271         mem = &dataq->dma_mem;
3272         mem_descr = phba->init_mem;
3273         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3274                     (ulp_num * MEM_DESCR_OFFSET);
3275         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3276         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3277                             sizeof(struct phys_addr),
3278                             sizeof(struct phys_addr), dq_vaddress);
3279         if (ret) {
3280                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3281                             "BM_%d : be_fill_queue Failed for DEF PDU "
3282                             "DATA on ULP : %d\n",
3283                             ulp_num);
3284
3285                 return ret;
3286         }
3287         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3288                                   bus_address.u.a64.address;
3289         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3290                                               def_pdu_ring_sz,
3291                                               phba->params.defpdu_data_sz,
3292                                               BEISCSI_DEFQ_DATA, ulp_num);
3293         if (ret) {
3294                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3295                             "BM_%d be_cmd_create_default_pdu_queue"
3296                             " Failed for DEF PDU DATA on ULP : %d\n",
3297                             ulp_num);
3298                 return ret;
3299         }
3300
3301         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3302                     "BM_%d : iscsi def data id on ULP : %d is  %d\n",
3303                     ulp_num,
3304                     phwi_context->be_def_dataq[ulp_num].id);
3305
3306         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3307                     "BM_%d : DEFAULT PDU DATA RING CREATED"
3308                     "on ULP : %d\n", ulp_num);
3309         return 0;
3310 }
3311
3312
3313 static int
3314 beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3315 {
3316         struct be_mem_descriptor *mem_descr;
3317         struct mem_array *pm_arr;
3318         struct be_dma_mem sgl;
3319         int status, ulp_num;
3320
3321         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3322                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3323                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3324                         mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3325                                     (ulp_num * MEM_DESCR_OFFSET);
3326                         pm_arr = mem_descr->mem_array;
3327
3328                         hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3329                         status = be_cmd_iscsi_post_template_hdr(
3330                                  &phba->ctrl, &sgl);
3331
3332                         if (status != 0) {
3333                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3334                                             "BM_%d : Post Template HDR Failed for"
3335                                             "ULP_%d\n", ulp_num);
3336                                 return status;
3337                         }
3338
3339                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3340                                     "BM_%d : Template HDR Pages Posted for"
3341                                     "ULP_%d\n", ulp_num);
3342                 }
3343         }
3344         return 0;
3345 }
3346
3347 static int
3348 beiscsi_post_pages(struct beiscsi_hba *phba)
3349 {
3350         struct be_mem_descriptor *mem_descr;
3351         struct mem_array *pm_arr;
3352         unsigned int page_offset, i;
3353         struct be_dma_mem sgl;
3354         int status, ulp_num = 0;
3355
3356         mem_descr = phba->init_mem;
3357         mem_descr += HWI_MEM_SGE;
3358         pm_arr = mem_descr->mem_array;
3359
3360         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3361                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3362                         break;
3363
3364         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3365                         phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3366         for (i = 0; i < mem_descr->num_elements; i++) {
3367                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3368                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3369                                                 page_offset,
3370                                                 (pm_arr->size / PAGE_SIZE));
3371                 page_offset += pm_arr->size / PAGE_SIZE;
3372                 if (status != 0) {
3373                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3374                                     "BM_%d : post sgl failed.\n");
3375                         return status;
3376                 }
3377                 pm_arr++;
3378         }
3379         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3380                     "BM_%d : POSTED PAGES\n");
3381         return 0;
3382 }
3383
3384 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3385 {
3386         struct be_dma_mem *mem = &q->dma_mem;
3387         if (mem->va) {
3388                 pci_free_consistent(phba->pcidev, mem->size,
3389                         mem->va, mem->dma);
3390                 mem->va = NULL;
3391         }
3392 }
3393
3394 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3395                 u16 len, u16 entry_size)
3396 {
3397         struct be_dma_mem *mem = &q->dma_mem;
3398
3399         memset(q, 0, sizeof(*q));
3400         q->len = len;
3401         q->entry_size = entry_size;
3402         mem->size = len * entry_size;
3403         mem->va = pci_zalloc_consistent(phba->pcidev, mem->size, &mem->dma);
3404         if (!mem->va)
3405                 return -ENOMEM;
3406         return 0;
3407 }
3408
3409 static int
3410 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3411                          struct hwi_context_memory *phwi_context,
3412                          struct hwi_controller *phwi_ctrlr)
3413 {
3414         unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3415         u64 pa_addr_lo;
3416         unsigned int idx, num, i, ulp_num;
3417         struct mem_array *pwrb_arr;
3418         void *wrb_vaddr;
3419         struct be_dma_mem sgl;
3420         struct be_mem_descriptor *mem_descr;
3421         struct hwi_wrb_context *pwrb_context;
3422         int status;
3423         uint8_t ulp_count = 0, ulp_base_num = 0;
3424         uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3425
3426         idx = 0;
3427         mem_descr = phba->init_mem;
3428         mem_descr += HWI_MEM_WRB;
3429         pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3430                            GFP_KERNEL);
3431         if (!pwrb_arr) {
3432                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3433                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3434                 return -ENOMEM;
3435         }
3436         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3437         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3438         num_wrb_rings = mem_descr->mem_array[idx].size /
3439                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3440
3441         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3442                 if (num_wrb_rings) {
3443                         pwrb_arr[num].virtual_address = wrb_vaddr;
3444                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3445                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3446                                             sizeof(struct iscsi_wrb);
3447                         wrb_vaddr += pwrb_arr[num].size;
3448                         pa_addr_lo += pwrb_arr[num].size;
3449                         num_wrb_rings--;
3450                 } else {
3451                         idx++;
3452                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3453                         pa_addr_lo = mem_descr->mem_array[idx].\
3454                                         bus_address.u.a64.address;
3455                         num_wrb_rings = mem_descr->mem_array[idx].size /
3456                                         (phba->params.wrbs_per_cxn *
3457                                         sizeof(struct iscsi_wrb));
3458                         pwrb_arr[num].virtual_address = wrb_vaddr;
3459                         pwrb_arr[num].bus_address.u.a64.address\
3460                                                 = pa_addr_lo;
3461                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3462                                                  sizeof(struct iscsi_wrb);
3463                         wrb_vaddr += pwrb_arr[num].size;
3464                         pa_addr_lo   += pwrb_arr[num].size;
3465                         num_wrb_rings--;
3466                 }
3467         }
3468
3469         /* Get the ULP Count */
3470         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3471                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3472                         ulp_count++;
3473                         ulp_base_num = ulp_num;
3474                         cid_count_ulp[ulp_num] =
3475                                 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3476                 }
3477
3478         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3479                 wrb_mem_index = 0;
3480                 offset = 0;
3481                 size = 0;
3482
3483                 if (ulp_count > 1) {
3484                         ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3485
3486                         if (!cid_count_ulp[ulp_base_num])
3487                                 ulp_base_num = (ulp_base_num + 1) %
3488                                                 BEISCSI_ULP_COUNT;
3489
3490                         cid_count_ulp[ulp_base_num]--;
3491                 }
3492
3493
3494                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3495                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3496                                             &phwi_context->be_wrbq[i],
3497                                             &phwi_ctrlr->wrb_context[i],
3498                                             ulp_base_num);
3499                 if (status != 0) {
3500                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3501                                     "BM_%d : wrbq create failed.");
3502                         kfree(pwrb_arr);
3503                         return status;
3504                 }
3505                 pwrb_context = &phwi_ctrlr->wrb_context[i];
3506                 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3507         }
3508         kfree(pwrb_arr);
3509         return 0;
3510 }
3511
3512 static void free_wrb_handles(struct beiscsi_hba *phba)
3513 {
3514         unsigned int index;
3515         struct hwi_controller *phwi_ctrlr;
3516         struct hwi_wrb_context *pwrb_context;
3517
3518         phwi_ctrlr = phba->phwi_ctrlr;
3519         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3520                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3521                 kfree(pwrb_context->pwrb_handle_base);
3522                 kfree(pwrb_context->pwrb_handle_basestd);
3523         }
3524 }
3525
3526 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3527 {
3528         struct be_ctrl_info *ctrl = &phba->ctrl;
3529         struct be_dma_mem *ptag_mem;
3530         struct be_queue_info *q;
3531         int i, tag;
3532
3533         q = &phba->ctrl.mcc_obj.q;
3534         for (i = 0; i < MAX_MCC_CMD; i++) {
3535                 tag = i + 1;
3536                 if (!test_bit(MCC_TAG_STATE_RUNNING,
3537                               &ctrl->ptag_state[tag].tag_state))
3538                         continue;
3539
3540                 if (test_bit(MCC_TAG_STATE_TIMEOUT,
3541                              &ctrl->ptag_state[tag].tag_state)) {
3542                         ptag_mem = &ctrl->ptag_state[tag].tag_mem_state;
3543                         if (ptag_mem->size) {
3544                                 pci_free_consistent(ctrl->pdev,
3545                                                     ptag_mem->size,
3546                                                     ptag_mem->va,
3547                                                     ptag_mem->dma);
3548                                 ptag_mem->size = 0;
3549                         }
3550                         continue;
3551                 }
3552                 /**
3553                  * If MCC is still active and waiting then wake up the process.
3554                  * We are here only because port is going offline. The process
3555                  * sees that (BEISCSI_HBA_ONLINE is cleared) and EIO error is
3556                  * returned for the operation and allocated memory cleaned up.
3557                  */
3558                 if (waitqueue_active(&ctrl->mcc_wait[tag])) {
3559                         ctrl->mcc_tag_status[tag] = MCC_STATUS_FAILED;
3560                         ctrl->mcc_tag_status[tag] |= CQE_VALID_MASK;
3561                         wake_up_interruptible(&ctrl->mcc_wait[tag]);
3562                         /*
3563                          * Control tag info gets reinitialized in enable
3564                          * so wait for the process to clear running state.
3565                          */
3566                         while (test_bit(MCC_TAG_STATE_RUNNING,
3567                                         &ctrl->ptag_state[tag].tag_state))
3568                                 schedule_timeout_uninterruptible(HZ);
3569                 }
3570                 /**
3571                  * For MCC with tag_states MCC_TAG_STATE_ASYNC and
3572                  * MCC_TAG_STATE_IGNORE nothing needs to done.
3573                  */
3574         }
3575         if (q->created) {
3576                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3577                 be_queue_free(phba, q);
3578         }
3579
3580         q = &phba->ctrl.mcc_obj.cq;
3581         if (q->created) {
3582                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3583                 be_queue_free(phba, q);
3584         }
3585 }
3586
3587 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3588                                 struct hwi_context_memory *phwi_context)
3589 {
3590         struct be_queue_info *q, *cq;
3591         struct be_ctrl_info *ctrl = &phba->ctrl;
3592
3593         /* Alloc MCC compl queue */
3594         cq = &phba->ctrl.mcc_obj.cq;
3595         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3596                         sizeof(struct be_mcc_compl)))
3597                 goto err;
3598         /* Ask BE to create MCC compl queue; */
3599         if (phba->msix_enabled) {
3600                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3601                                          [phba->num_cpus].q, false, true, 0))
3602                 goto mcc_cq_free;
3603         } else {
3604                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3605                                           false, true, 0))
3606                 goto mcc_cq_free;
3607         }
3608
3609         /* Alloc MCC queue */
3610         q = &phba->ctrl.mcc_obj.q;
3611         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3612                 goto mcc_cq_destroy;
3613
3614         /* Ask BE to create MCC queue */
3615         if (beiscsi_cmd_mccq_create(phba, q, cq))
3616                 goto mcc_q_free;
3617
3618         return 0;
3619
3620 mcc_q_free:
3621         be_queue_free(phba, q);
3622 mcc_cq_destroy:
3623         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3624 mcc_cq_free:
3625         be_queue_free(phba, cq);
3626 err:
3627         return -ENOMEM;
3628 }
3629
3630 /**
3631  * find_num_cpus()- Get the CPU online count
3632  * @phba: ptr to priv structure
3633  *
3634  * CPU count is used for creating EQ.
3635  **/
3636 static void find_num_cpus(struct beiscsi_hba *phba)
3637 {
3638         int  num_cpus = 0;
3639
3640         num_cpus = num_online_cpus();
3641
3642         switch (phba->generation) {
3643         case BE_GEN2:
3644         case BE_GEN3:
3645                 phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
3646                                   BEISCSI_MAX_NUM_CPUS : num_cpus;
3647                 break;
3648         case BE_GEN4:
3649                 /*
3650                  * If eqid_count == 1 fall back to
3651                  * INTX mechanism
3652                  **/
3653                 if (phba->fw_config.eqid_count == 1) {
3654                         enable_msix = 0;
3655                         phba->num_cpus = 1;
3656                         return;
3657                 }
3658
3659                 phba->num_cpus =
3660                         (num_cpus > (phba->fw_config.eqid_count - 1)) ?
3661                         (phba->fw_config.eqid_count - 1) : num_cpus;
3662                 break;
3663         default:
3664                 phba->num_cpus = 1;
3665         }
3666 }
3667
3668 static void hwi_purge_eq(struct beiscsi_hba *phba)
3669 {
3670         struct hwi_controller *phwi_ctrlr;
3671         struct hwi_context_memory *phwi_context;
3672         struct be_queue_info *eq;
3673         struct be_eq_entry *eqe = NULL;
3674         int i, eq_msix;
3675         unsigned int num_processed;
3676
3677         if (beiscsi_hba_in_error(phba))
3678                 return;
3679
3680         phwi_ctrlr = phba->phwi_ctrlr;
3681         phwi_context = phwi_ctrlr->phwi_ctxt;
3682         if (phba->msix_enabled)
3683                 eq_msix = 1;
3684         else
3685                 eq_msix = 0;
3686
3687         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
3688                 eq = &phwi_context->be_eq[i].q;
3689                 eqe = queue_tail_node(eq);
3690                 num_processed = 0;
3691                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
3692                                         & EQE_VALID_MASK) {
3693                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
3694                         queue_tail_inc(eq);
3695                         eqe = queue_tail_node(eq);
3696                         num_processed++;
3697                 }
3698
3699                 if (num_processed)
3700                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
3701         }
3702 }
3703
3704 static void hwi_cleanup_port(struct beiscsi_hba *phba)
3705 {
3706         struct be_queue_info *q;
3707         struct be_ctrl_info *ctrl = &phba->ctrl;
3708         struct hwi_controller *phwi_ctrlr;
3709         struct hwi_context_memory *phwi_context;
3710         struct hwi_async_pdu_context *pasync_ctx;
3711         int i, eq_for_mcc, ulp_num;
3712
3713         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3714                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3715                         beiscsi_cmd_iscsi_cleanup(phba, ulp_num);
3716
3717         /**
3718          * Purge all EQ entries that may have been left out. This is to
3719          * workaround a problem we've seen occasionally where driver gets an
3720          * interrupt with EQ entry bit set after stopping the controller.
3721          */
3722         hwi_purge_eq(phba);
3723
3724         phwi_ctrlr = phba->phwi_ctrlr;
3725         phwi_context = phwi_ctrlr->phwi_ctxt;
3726
3727         be_cmd_iscsi_remove_template_hdr(ctrl);
3728
3729         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3730                 q = &phwi_context->be_wrbq[i];
3731                 if (q->created)
3732                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3733         }
3734         kfree(phwi_context->be_wrbq);
3735         free_wrb_handles(phba);
3736
3737         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3738                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3739
3740                         q = &phwi_context->be_def_hdrq[ulp_num];
3741                         if (q->created)
3742                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3743
3744                         q = &phwi_context->be_def_dataq[ulp_num];
3745                         if (q->created)
3746                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3747
3748                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
3749                 }
3750         }
3751
3752         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3753
3754         for (i = 0; i < (phba->num_cpus); i++) {
3755                 q = &phwi_context->be_cq[i];
3756                 if (q->created) {
3757                         be_queue_free(phba, q);
3758                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3759                 }
3760         }
3761
3762         be_mcc_queues_destroy(phba);
3763         if (phba->msix_enabled)
3764                 eq_for_mcc = 1;
3765         else
3766                 eq_for_mcc = 0;
3767         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3768                 q = &phwi_context->be_eq[i].q;
3769                 if (q->created) {
3770                         be_queue_free(phba, q);
3771                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3772                 }
3773         }
3774         /* last communication, indicate driver is unloading */
3775         beiscsi_cmd_special_wrb(&phba->ctrl, 0);
3776 }
3777 static int hwi_init_port(struct beiscsi_hba *phba)
3778 {
3779         struct hwi_controller *phwi_ctrlr;
3780         struct hwi_context_memory *phwi_context;
3781         unsigned int def_pdu_ring_sz;
3782         struct be_ctrl_info *ctrl = &phba->ctrl;
3783         int status, ulp_num;
3784
3785         phwi_ctrlr = phba->phwi_ctrlr;
3786         phwi_context = phwi_ctrlr->phwi_ctxt;
3787         phwi_context->max_eqd = 128;
3788         phwi_context->min_eqd = 0;
3789         phwi_context->cur_eqd = 0;
3790         /* set port optic state to unknown */
3791         phba->optic_state = 0xff;
3792
3793         status = beiscsi_create_eqs(phba, phwi_context);
3794         if (status != 0) {
3795                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3796                             "BM_%d : EQ not created\n");
3797                 goto error;
3798         }
3799
3800         status = be_mcc_queues_create(phba, phwi_context);
3801         if (status != 0)
3802                 goto error;
3803
3804         status = beiscsi_check_supported_fw(ctrl, phba);
3805         if (status != 0) {
3806                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3807                             "BM_%d : Unsupported fw version\n");
3808                 goto error;
3809         }
3810
3811         status = beiscsi_create_cqs(phba, phwi_context);
3812         if (status != 0) {
3813                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3814                             "BM_%d : CQ not created\n");
3815                 goto error;
3816         }
3817
3818         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3819                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3820
3821                         def_pdu_ring_sz =
3822                                 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
3823                                 sizeof(struct phys_addr);
3824
3825                         status = beiscsi_create_def_hdr(phba, phwi_context,
3826                                                         phwi_ctrlr,
3827                                                         def_pdu_ring_sz,
3828                                                         ulp_num);
3829                         if (status != 0) {
3830                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3831                                             "BM_%d : Default Header not created for ULP : %d\n",
3832                                             ulp_num);
3833                                 goto error;
3834                         }
3835
3836                         status = beiscsi_create_def_data(phba, phwi_context,
3837                                                          phwi_ctrlr,
3838                                                          def_pdu_ring_sz,
3839                                                          ulp_num);
3840                         if (status != 0) {
3841                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3842                                             "BM_%d : Default Data not created for ULP : %d\n",
3843                                             ulp_num);
3844                                 goto error;
3845                         }
3846                         /**
3847                          * Now that the default PDU rings have been created,
3848                          * let EP know about it.
3849                          * Call beiscsi_cmd_iscsi_cleanup before posting?
3850                          */
3851                         hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR,
3852                                                ulp_num);
3853                         hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA,
3854                                                ulp_num);
3855                 }
3856         }
3857
3858         status = beiscsi_post_pages(phba);
3859         if (status != 0) {
3860                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3861                             "BM_%d : Post SGL Pages Failed\n");
3862                 goto error;
3863         }
3864
3865         status = beiscsi_post_template_hdr(phba);
3866         if (status != 0) {
3867                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3868                             "BM_%d : Template HDR Posting for CXN Failed\n");
3869         }
3870
3871         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3872         if (status != 0) {
3873                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3874                             "BM_%d : WRB Rings not created\n");
3875                 goto error;
3876         }
3877
3878         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3879                 uint16_t async_arr_idx = 0;
3880
3881                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3882                         uint16_t cri = 0;
3883                         struct hwi_async_pdu_context *pasync_ctx;
3884
3885                         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3886                                      phwi_ctrlr, ulp_num);
3887                         for (cri = 0; cri <
3888                              phba->params.cxns_per_ctrl; cri++) {
3889                                 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3890                                                (phwi_ctrlr, cri))
3891                                         pasync_ctx->cid_to_async_cri_map[
3892                                         phwi_ctrlr->wrb_context[cri].cid] =
3893                                         async_arr_idx++;
3894                         }
3895                 }
3896         }
3897
3898         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3899                     "BM_%d : hwi_init_port success\n");
3900         return 0;
3901
3902 error:
3903         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3904                     "BM_%d : hwi_init_port failed");
3905         hwi_cleanup_port(phba);
3906         return status;
3907 }
3908
3909 static int hwi_init_controller(struct beiscsi_hba *phba)
3910 {
3911         struct hwi_controller *phwi_ctrlr;
3912
3913         phwi_ctrlr = phba->phwi_ctrlr;
3914         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3915                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3916                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3917                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3918                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
3919                             phwi_ctrlr->phwi_ctxt);
3920         } else {
3921                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3922                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3923                             "than one element.Failing to load\n");
3924                 return -ENOMEM;
3925         }
3926
3927         iscsi_init_global_templates(phba);
3928         if (beiscsi_init_wrb_handle(phba))
3929                 return -ENOMEM;
3930
3931         if (hwi_init_async_pdu_ctx(phba)) {
3932                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3933                             "BM_%d : hwi_init_async_pdu_ctx failed\n");
3934                 return -ENOMEM;
3935         }
3936
3937         if (hwi_init_port(phba) != 0) {
3938                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3939                             "BM_%d : hwi_init_controller failed\n");
3940
3941                 return -ENOMEM;
3942         }
3943         return 0;
3944 }
3945
3946 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3947 {
3948         struct be_mem_descriptor *mem_descr;
3949         int i, j;
3950
3951         mem_descr = phba->init_mem;
3952         i = 0;
3953         j = 0;
3954         for (i = 0; i < SE_MEM_MAX; i++) {
3955                 for (j = mem_descr->num_elements; j > 0; j--) {
3956                         pci_free_consistent(phba->pcidev,
3957                           mem_descr->mem_array[j - 1].size,
3958                           mem_descr->mem_array[j - 1].virtual_address,
3959                           (unsigned long)mem_descr->mem_array[j - 1].
3960                           bus_address.u.a64.address);
3961                 }
3962
3963                 kfree(mem_descr->mem_array);
3964                 mem_descr++;
3965         }
3966         kfree(phba->init_mem);
3967         kfree(phba->phwi_ctrlr->wrb_context);
3968         kfree(phba->phwi_ctrlr);
3969 }
3970
3971 static int beiscsi_init_controller(struct beiscsi_hba *phba)
3972 {
3973         int ret = -ENOMEM;
3974
3975         ret = beiscsi_get_memory(phba);
3976         if (ret < 0) {
3977                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3978                             "BM_%d : beiscsi_dev_probe -"
3979                             "Failed in beiscsi_alloc_memory\n");
3980                 return ret;
3981         }
3982
3983         ret = hwi_init_controller(phba);
3984         if (ret)
3985                 goto free_init;
3986         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3987                     "BM_%d : Return success from beiscsi_init_controller");
3988
3989         return 0;
3990
3991 free_init:
3992         beiscsi_free_mem(phba);
3993         return ret;
3994 }
3995
3996 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3997 {
3998         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
3999         struct sgl_handle *psgl_handle;
4000         struct iscsi_sge *pfrag;
4001         unsigned int arr_index, i, idx;
4002         unsigned int ulp_icd_start, ulp_num = 0;
4003
4004         phba->io_sgl_hndl_avbl = 0;
4005         phba->eh_sgl_hndl_avbl = 0;
4006
4007         mem_descr_sglh = phba->init_mem;
4008         mem_descr_sglh += HWI_MEM_SGLH;
4009         if (1 == mem_descr_sglh->num_elements) {
4010                 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4011                                                  phba->params.ios_per_ctrl,
4012                                                  GFP_KERNEL);
4013                 if (!phba->io_sgl_hndl_base) {
4014                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4015                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4016                         return -ENOMEM;
4017                 }
4018                 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4019                                                  (phba->params.icds_per_ctrl -
4020                                                  phba->params.ios_per_ctrl),
4021                                                  GFP_KERNEL);
4022                 if (!phba->eh_sgl_hndl_base) {
4023                         kfree(phba->io_sgl_hndl_base);
4024                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4025                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4026                         return -ENOMEM;
4027                 }
4028         } else {
4029                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4030                             "BM_%d : HWI_MEM_SGLH is more than one element."
4031                             "Failing to load\n");
4032                 return -ENOMEM;
4033         }
4034
4035         arr_index = 0;
4036         idx = 0;
4037         while (idx < mem_descr_sglh->num_elements) {
4038                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
4039
4040                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
4041                       sizeof(struct sgl_handle)); i++) {
4042                         if (arr_index < phba->params.ios_per_ctrl) {
4043                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
4044                                 phba->io_sgl_hndl_avbl++;
4045                                 arr_index++;
4046                         } else {
4047                                 phba->eh_sgl_hndl_base[arr_index -
4048                                         phba->params.ios_per_ctrl] =
4049                                                                 psgl_handle;
4050                                 arr_index++;
4051                                 phba->eh_sgl_hndl_avbl++;
4052                         }
4053                         psgl_handle++;
4054                 }
4055                 idx++;
4056         }
4057         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4058                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
4059                     "phba->eh_sgl_hndl_avbl=%d\n",
4060                     phba->io_sgl_hndl_avbl,
4061                     phba->eh_sgl_hndl_avbl);
4062
4063         mem_descr_sg = phba->init_mem;
4064         mem_descr_sg += HWI_MEM_SGE;
4065         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4066                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
4067                     mem_descr_sg->num_elements);
4068
4069         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
4070                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
4071                         break;
4072
4073         ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
4074
4075         arr_index = 0;
4076         idx = 0;
4077         while (idx < mem_descr_sg->num_elements) {
4078                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
4079
4080                 for (i = 0;
4081                      i < (mem_descr_sg->mem_array[idx].size) /
4082                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
4083                      i++) {
4084                         if (arr_index < phba->params.ios_per_ctrl)
4085                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
4086                         else
4087                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
4088                                                 phba->params.ios_per_ctrl];
4089                         psgl_handle->pfrag = pfrag;
4090                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
4091                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
4092                         pfrag += phba->params.num_sge_per_io;
4093                         psgl_handle->sgl_index = ulp_icd_start + arr_index++;
4094                 }
4095                 idx++;
4096         }
4097         phba->io_sgl_free_index = 0;
4098         phba->io_sgl_alloc_index = 0;
4099         phba->eh_sgl_free_index = 0;
4100         phba->eh_sgl_alloc_index = 0;
4101         return 0;
4102 }
4103
4104 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4105 {
4106         int ret;
4107         uint16_t i, ulp_num;
4108         struct ulp_cid_info *ptr_cid_info = NULL;
4109
4110         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4111                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4112                         ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
4113                                                GFP_KERNEL);
4114
4115                         if (!ptr_cid_info) {
4116                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4117                                             "BM_%d : Failed to allocate memory"
4118                                             "for ULP_CID_INFO for ULP : %d\n",
4119                                             ulp_num);
4120                                 ret = -ENOMEM;
4121                                 goto free_memory;
4122
4123                         }
4124
4125                         /* Allocate memory for CID array */
4126                         ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
4127                                                   BEISCSI_GET_CID_COUNT(phba,
4128                                                   ulp_num), GFP_KERNEL);
4129                         if (!ptr_cid_info->cid_array) {
4130                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4131                                             "BM_%d : Failed to allocate memory"
4132                                             "for CID_ARRAY for ULP : %d\n",
4133                                             ulp_num);
4134                                 kfree(ptr_cid_info);
4135                                 ptr_cid_info = NULL;
4136                                 ret = -ENOMEM;
4137
4138                                 goto free_memory;
4139                         }
4140                         ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4141                                                    phba, ulp_num);
4142
4143                         /* Save the cid_info_array ptr */
4144                         phba->cid_array_info[ulp_num] = ptr_cid_info;
4145                 }
4146         }
4147         phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
4148                                  phba->params.cxns_per_ctrl, GFP_KERNEL);
4149         if (!phba->ep_array) {
4150                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4151                             "BM_%d : Failed to allocate memory in "
4152                             "hba_setup_cid_tbls\n");
4153                 ret = -ENOMEM;
4154
4155                 goto free_memory;
4156         }
4157
4158         phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4159                                    phba->params.cxns_per_ctrl, GFP_KERNEL);
4160         if (!phba->conn_table) {
4161                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4162                             "BM_%d : Failed to allocate memory in"
4163                             "hba_setup_cid_tbls\n");
4164
4165                 kfree(phba->ep_array);
4166                 phba->ep_array = NULL;
4167                 ret = -ENOMEM;
4168
4169                 goto free_memory;
4170         }
4171
4172         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4173                 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4174
4175                 ptr_cid_info = phba->cid_array_info[ulp_num];
4176                 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4177                         phba->phwi_ctrlr->wrb_context[i].cid;
4178
4179         }
4180
4181         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4182                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4183                         ptr_cid_info = phba->cid_array_info[ulp_num];
4184
4185                         ptr_cid_info->cid_alloc = 0;
4186                         ptr_cid_info->cid_free = 0;
4187                 }
4188         }
4189         return 0;
4190
4191 free_memory:
4192         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4193                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4194                         ptr_cid_info = phba->cid_array_info[ulp_num];
4195
4196                         if (ptr_cid_info) {
4197                                 kfree(ptr_cid_info->cid_array);
4198                                 kfree(ptr_cid_info);
4199                                 phba->cid_array_info[ulp_num] = NULL;
4200                         }
4201                 }
4202         }
4203
4204         return ret;
4205 }
4206
4207 static void hwi_enable_intr(struct beiscsi_hba *phba)
4208 {
4209         struct be_ctrl_info *ctrl = &phba->ctrl;
4210         struct hwi_controller *phwi_ctrlr;
4211         struct hwi_context_memory *phwi_context;
4212         struct be_queue_info *eq;
4213         u8 __iomem *addr;
4214         u32 reg, i;
4215         u32 enabled;
4216
4217         phwi_ctrlr = phba->phwi_ctrlr;
4218         phwi_context = phwi_ctrlr->phwi_ctxt;
4219
4220         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4221                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4222         reg = ioread32(addr);
4223
4224         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4225         if (!enabled) {
4226                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4227                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4228                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4229                 iowrite32(reg, addr);
4230         }
4231
4232         if (!phba->msix_enabled) {
4233                 eq = &phwi_context->be_eq[0].q;
4234                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4235                             "BM_%d : eq->id=%d\n", eq->id);
4236
4237                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4238         } else {
4239                 for (i = 0; i <= phba->num_cpus; i++) {
4240                         eq = &phwi_context->be_eq[i].q;
4241                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4242                                     "BM_%d : eq->id=%d\n", eq->id);
4243                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4244                 }
4245         }
4246 }
4247
4248 static void hwi_disable_intr(struct beiscsi_hba *phba)
4249 {
4250         struct be_ctrl_info *ctrl = &phba->ctrl;
4251
4252         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4253         u32 reg = ioread32(addr);
4254
4255         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4256         if (enabled) {
4257                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4258                 iowrite32(reg, addr);
4259         } else
4260                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4261                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
4262 }
4263
4264 static int beiscsi_init_port(struct beiscsi_hba *phba)
4265 {
4266         int ret;
4267
4268         ret = beiscsi_init_controller(phba);
4269         if (ret < 0) {
4270                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4271                             "BM_%d : beiscsi_dev_probe - Failed in"
4272                             "beiscsi_init_controller\n");
4273                 return ret;
4274         }
4275         ret = beiscsi_init_sgl_handle(phba);
4276         if (ret < 0) {
4277                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4278                             "BM_%d : beiscsi_dev_probe - Failed in"
4279                             "beiscsi_init_sgl_handle\n");
4280                 goto do_cleanup_ctrlr;
4281         }
4282
4283         if (hba_setup_cid_tbls(phba)) {
4284                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4285                             "BM_%d : Failed in hba_setup_cid_tbls\n");
4286                 kfree(phba->io_sgl_hndl_base);
4287                 kfree(phba->eh_sgl_hndl_base);
4288                 goto do_cleanup_ctrlr;
4289         }
4290
4291         return ret;
4292
4293 do_cleanup_ctrlr:
4294         hwi_cleanup_port(phba);
4295         return ret;
4296 }
4297
4298 static void beiscsi_cleanup_port(struct beiscsi_hba *phba)
4299 {
4300         struct ulp_cid_info *ptr_cid_info = NULL;
4301         int ulp_num;
4302
4303         kfree(phba->io_sgl_hndl_base);
4304         kfree(phba->eh_sgl_hndl_base);
4305         kfree(phba->ep_array);
4306         kfree(phba->conn_table);
4307
4308         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4309                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4310                         ptr_cid_info = phba->cid_array_info[ulp_num];
4311
4312                         if (ptr_cid_info) {
4313                                 kfree(ptr_cid_info->cid_array);
4314                                 kfree(ptr_cid_info);
4315                                 phba->cid_array_info[ulp_num] = NULL;
4316                         }
4317                 }
4318         }
4319 }
4320
4321 /**
4322  * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4323  * @beiscsi_conn: ptr to the conn to be cleaned up
4324  * @task: ptr to iscsi_task resource to be freed.
4325  *
4326  * Free driver mgmt resources binded to CXN.
4327  **/
4328 void
4329 beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4330                                 struct iscsi_task *task)
4331 {
4332         struct beiscsi_io_task *io_task;
4333         struct beiscsi_hba *phba = beiscsi_conn->phba;
4334         struct hwi_wrb_context *pwrb_context;
4335         struct hwi_controller *phwi_ctrlr;
4336         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4337                                 beiscsi_conn->beiscsi_conn_cid);
4338
4339         phwi_ctrlr = phba->phwi_ctrlr;
4340         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4341
4342         io_task = task->dd_data;
4343
4344         if (io_task->pwrb_handle) {
4345                 memset(io_task->pwrb_handle->pwrb, 0,
4346                        sizeof(struct iscsi_wrb));
4347                 free_wrb_handle(phba, pwrb_context,
4348                                 io_task->pwrb_handle);
4349                 io_task->pwrb_handle = NULL;
4350         }
4351
4352         if (io_task->psgl_handle) {
4353                 free_mgmt_sgl_handle(phba,
4354                                      io_task->psgl_handle);
4355                 io_task->psgl_handle = NULL;
4356         }
4357
4358         if (io_task->mtask_addr) {
4359                 pci_unmap_single(phba->pcidev,
4360                                  io_task->mtask_addr,
4361                                  io_task->mtask_data_count,
4362                                  PCI_DMA_TODEVICE);
4363                 io_task->mtask_addr = 0;
4364         }
4365 }
4366
4367 /**
4368  * beiscsi_cleanup_task()- Free driver resources of the task
4369  * @task: ptr to the iscsi task
4370  *
4371  **/
4372 static void beiscsi_cleanup_task(struct iscsi_task *task)
4373 {
4374         struct beiscsi_io_task *io_task = task->dd_data;
4375         struct iscsi_conn *conn = task->conn;
4376         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4377         struct beiscsi_hba *phba = beiscsi_conn->phba;
4378         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4379         struct hwi_wrb_context *pwrb_context;
4380         struct hwi_controller *phwi_ctrlr;
4381         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4382                              beiscsi_conn->beiscsi_conn_cid);
4383
4384         phwi_ctrlr = phba->phwi_ctrlr;
4385         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4386
4387         if (io_task->cmd_bhs) {
4388                 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4389                               io_task->bhs_pa.u.a64.address);
4390                 io_task->cmd_bhs = NULL;
4391         }
4392
4393         if (task->sc) {
4394                 if (io_task->pwrb_handle) {
4395                         free_wrb_handle(phba, pwrb_context,
4396                                         io_task->pwrb_handle);
4397                         io_task->pwrb_handle = NULL;
4398                 }
4399
4400                 if (io_task->psgl_handle) {
4401                         free_io_sgl_handle(phba, io_task->psgl_handle);
4402                         io_task->psgl_handle = NULL;
4403                 }
4404
4405                 if (io_task->scsi_cmnd) {
4406                         if (io_task->num_sg)
4407                                 scsi_dma_unmap(io_task->scsi_cmnd);
4408                         io_task->scsi_cmnd = NULL;
4409                 }
4410         } else {
4411                 if (!beiscsi_conn->login_in_progress)
4412                         beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4413         }
4414 }
4415
4416 void
4417 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4418                            struct beiscsi_offload_params *params)
4419 {
4420         struct wrb_handle *pwrb_handle;
4421         struct hwi_wrb_context *pwrb_context = NULL;
4422         struct beiscsi_hba *phba = beiscsi_conn->phba;
4423         struct iscsi_task *task = beiscsi_conn->task;
4424         struct iscsi_session *session = task->conn->session;
4425         u32 doorbell = 0;
4426
4427         /*
4428          * We can always use 0 here because it is reserved by libiscsi for
4429          * login/startup related tasks.
4430          */
4431         beiscsi_conn->login_in_progress = 0;
4432         spin_lock_bh(&session->back_lock);
4433         beiscsi_cleanup_task(task);
4434         spin_unlock_bh(&session->back_lock);
4435
4436         pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid,
4437                                        &pwrb_context);
4438
4439         /* Check for the adapter family */
4440         if (is_chip_be2_be3r(phba))
4441                 beiscsi_offload_cxn_v0(params, pwrb_handle,
4442                                        phba->init_mem,
4443                                        pwrb_context);
4444         else
4445                 beiscsi_offload_cxn_v2(params, pwrb_handle,
4446                                        pwrb_context);
4447
4448         be_dws_le_to_cpu(pwrb_handle->pwrb,
4449                          sizeof(struct iscsi_target_context_update_wrb));
4450
4451         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4452         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4453                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4454         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4455         iowrite32(doorbell, phba->db_va +
4456                   beiscsi_conn->doorbell_offset);
4457
4458         /*
4459          * There is no completion for CONTEXT_UPDATE. The completion of next
4460          * WRB posted guarantees FW's processing and DMA'ing of it.
4461          * Use beiscsi_put_wrb_handle to put it back in the pool which makes
4462          * sure zero'ing or reuse of the WRB only after wrbs_per_cxn.
4463          */
4464         beiscsi_put_wrb_handle(pwrb_context, pwrb_handle,
4465                                phba->params.wrbs_per_cxn);
4466         beiscsi_log(phba, KERN_INFO,
4467                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4468                     "BM_%d : put CONTEXT_UPDATE pwrb_handle=%p free_index=0x%x wrb_handles_available=%d\n",
4469                     pwrb_handle, pwrb_context->free_index,
4470                     pwrb_context->wrb_handles_available);
4471 }
4472
4473 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4474                               int *index, int *age)
4475 {
4476         *index = (int)itt;
4477         if (age)
4478                 *age = conn->session->age;
4479 }
4480
4481 /**
4482  * beiscsi_alloc_pdu - allocates pdu and related resources
4483  * @task: libiscsi task
4484  * @opcode: opcode of pdu for task
4485  *
4486  * This is called with the session lock held. It will allocate
4487  * the wrb and sgl if needed for the command. And it will prep
4488  * the pdu's itt. beiscsi_parse_pdu will later translate
4489  * the pdu itt to the libiscsi task itt.
4490  */
4491 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4492 {
4493         struct beiscsi_io_task *io_task = task->dd_data;
4494         struct iscsi_conn *conn = task->conn;
4495         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4496         struct beiscsi_hba *phba = beiscsi_conn->phba;
4497         struct hwi_wrb_context *pwrb_context;
4498         struct hwi_controller *phwi_ctrlr;
4499         itt_t itt;
4500         uint16_t cri_index = 0;
4501         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4502         dma_addr_t paddr;
4503
4504         io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4505                                           GFP_ATOMIC, &paddr);
4506         if (!io_task->cmd_bhs)
4507                 return -ENOMEM;
4508         io_task->bhs_pa.u.a64.address = paddr;
4509         io_task->libiscsi_itt = (itt_t)task->itt;
4510         io_task->conn = beiscsi_conn;
4511
4512         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4513         task->hdr_max = sizeof(struct be_cmd_bhs);
4514         io_task->psgl_handle = NULL;
4515         io_task->pwrb_handle = NULL;
4516
4517         if (task->sc) {
4518                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4519                 if (!io_task->psgl_handle) {
4520                         beiscsi_log(phba, KERN_ERR,
4521                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4522                                     "BM_%d : Alloc of IO_SGL_ICD Failed"
4523                                     "for the CID : %d\n",
4524                                     beiscsi_conn->beiscsi_conn_cid);
4525                         goto free_hndls;
4526                 }
4527                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4528                                         beiscsi_conn->beiscsi_conn_cid,
4529                                         &io_task->pwrb_context);
4530                 if (!io_task->pwrb_handle) {
4531                         beiscsi_log(phba, KERN_ERR,
4532                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4533                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4534                                     "for the CID : %d\n",
4535                                     beiscsi_conn->beiscsi_conn_cid);
4536                         goto free_io_hndls;
4537                 }
4538         } else {
4539                 io_task->scsi_cmnd = NULL;
4540                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4541                         beiscsi_conn->task = task;
4542                         if (!beiscsi_conn->login_in_progress) {
4543                                 io_task->psgl_handle = (struct sgl_handle *)
4544                                                 alloc_mgmt_sgl_handle(phba);
4545                                 if (!io_task->psgl_handle) {
4546                                         beiscsi_log(phba, KERN_ERR,
4547                                                     BEISCSI_LOG_IO |
4548                                                     BEISCSI_LOG_CONFIG,
4549                                                     "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4550                                                     "for the CID : %d\n",
4551                                                     beiscsi_conn->
4552                                                     beiscsi_conn_cid);
4553                                         goto free_hndls;
4554                                 }
4555
4556                                 beiscsi_conn->login_in_progress = 1;
4557                                 beiscsi_conn->plogin_sgl_handle =
4558                                                         io_task->psgl_handle;
4559                                 io_task->pwrb_handle =
4560                                         alloc_wrb_handle(phba,
4561                                         beiscsi_conn->beiscsi_conn_cid,
4562                                         &io_task->pwrb_context);
4563                                 if (!io_task->pwrb_handle) {
4564                                         beiscsi_log(phba, KERN_ERR,
4565                                                     BEISCSI_LOG_IO |
4566                                                     BEISCSI_LOG_CONFIG,
4567                                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4568                                                     "for the CID : %d\n",
4569                                                     beiscsi_conn->
4570                                                     beiscsi_conn_cid);
4571                                         goto free_mgmt_hndls;
4572                                 }
4573                                 beiscsi_conn->plogin_wrb_handle =
4574                                                         io_task->pwrb_handle;
4575
4576                         } else {
4577                                 io_task->psgl_handle =
4578                                                 beiscsi_conn->plogin_sgl_handle;
4579                                 io_task->pwrb_handle =
4580                                                 beiscsi_conn->plogin_wrb_handle;
4581                         }
4582                 } else {
4583                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4584                         if (!io_task->psgl_handle) {
4585                                 beiscsi_log(phba, KERN_ERR,
4586                                             BEISCSI_LOG_IO |
4587                                             BEISCSI_LOG_CONFIG,
4588                                             "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4589                                             "for the CID : %d\n",
4590                                             beiscsi_conn->
4591                                             beiscsi_conn_cid);
4592                                 goto free_hndls;
4593                         }
4594                         io_task->pwrb_handle =
4595                                         alloc_wrb_handle(phba,
4596                                         beiscsi_conn->beiscsi_conn_cid,
4597                                         &io_task->pwrb_context);
4598                         if (!io_task->pwrb_handle) {
4599                                 beiscsi_log(phba, KERN_ERR,
4600                                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4601                                             "BM_%d : Alloc of WRB_HANDLE Failed"
4602                                             "for the CID : %d\n",
4603                                             beiscsi_conn->beiscsi_conn_cid);
4604                                 goto free_mgmt_hndls;
4605                         }
4606
4607                 }
4608         }
4609         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4610                                  wrb_index << 16) | (unsigned int)
4611                                 (io_task->psgl_handle->sgl_index));
4612         io_task->pwrb_handle->pio_handle = task;
4613
4614         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4615         return 0;
4616
4617 free_io_hndls:
4618         free_io_sgl_handle(phba, io_task->psgl_handle);
4619         goto free_hndls;
4620 free_mgmt_hndls:
4621         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4622         io_task->psgl_handle = NULL;
4623 free_hndls:
4624         phwi_ctrlr = phba->phwi_ctrlr;
4625         cri_index = BE_GET_CRI_FROM_CID(
4626         beiscsi_conn->beiscsi_conn_cid);
4627         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4628         if (io_task->pwrb_handle)
4629                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4630         io_task->pwrb_handle = NULL;
4631         pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4632                       io_task->bhs_pa.u.a64.address);
4633         io_task->cmd_bhs = NULL;
4634         return -ENOMEM;
4635 }
4636 int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4637                        unsigned int num_sg, unsigned int xferlen,
4638                        unsigned int writedir)
4639 {
4640
4641         struct beiscsi_io_task *io_task = task->dd_data;
4642         struct iscsi_conn *conn = task->conn;
4643         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4644         struct beiscsi_hba *phba = beiscsi_conn->phba;
4645         struct iscsi_wrb *pwrb = NULL;
4646         unsigned int doorbell = 0;
4647
4648         pwrb = io_task->pwrb_handle->pwrb;
4649
4650         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4651
4652         if (writedir) {
4653                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4654                               INI_WR_CMD);
4655                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4656         } else {
4657                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4658                               INI_RD_CMD);
4659                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4660         }
4661
4662         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4663                                           type, pwrb);
4664
4665         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4666                       cpu_to_be16(*(unsigned short *)
4667                       &io_task->cmd_bhs->iscsi_hdr.lun));
4668         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4669         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4670                       io_task->pwrb_handle->wrb_index);
4671         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4672                       be32_to_cpu(task->cmdsn));
4673         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4674                       io_task->psgl_handle->sgl_index);
4675
4676         hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4677         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4678                       io_task->pwrb_handle->wrb_index);
4679         if (io_task->pwrb_context->plast_wrb)
4680                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4681                               io_task->pwrb_context->plast_wrb,
4682                               io_task->pwrb_handle->wrb_index);
4683         io_task->pwrb_context->plast_wrb = pwrb;
4684
4685         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4686
4687         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4688         doorbell |= (io_task->pwrb_handle->wrb_index &
4689                      DB_DEF_PDU_WRB_INDEX_MASK) <<
4690                      DB_DEF_PDU_WRB_INDEX_SHIFT;
4691         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4692         iowrite32(doorbell, phba->db_va +
4693                   beiscsi_conn->doorbell_offset);
4694         return 0;
4695 }
4696
4697 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4698                           unsigned int num_sg, unsigned int xferlen,
4699                           unsigned int writedir)
4700 {
4701
4702         struct beiscsi_io_task *io_task = task->dd_data;
4703         struct iscsi_conn *conn = task->conn;
4704         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4705         struct beiscsi_hba *phba = beiscsi_conn->phba;
4706         struct iscsi_wrb *pwrb = NULL;
4707         unsigned int doorbell = 0;
4708
4709         pwrb = io_task->pwrb_handle->pwrb;
4710         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4711
4712         if (writedir) {
4713                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4714                               INI_WR_CMD);
4715                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
4716         } else {
4717                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4718                               INI_RD_CMD);
4719                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4720         }
4721
4722         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4723                                           type, pwrb);
4724
4725         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4726                       cpu_to_be16(*(unsigned short *)
4727                                   &io_task->cmd_bhs->iscsi_hdr.lun));
4728         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4729         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4730                       io_task->pwrb_handle->wrb_index);
4731         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4732                       be32_to_cpu(task->cmdsn));
4733         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4734                       io_task->psgl_handle->sgl_index);
4735
4736         hwi_write_sgl(pwrb, sg, num_sg, io_task);
4737
4738         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4739                       io_task->pwrb_handle->wrb_index);
4740         if (io_task->pwrb_context->plast_wrb)
4741                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
4742                               io_task->pwrb_context->plast_wrb,
4743                               io_task->pwrb_handle->wrb_index);
4744         io_task->pwrb_context->plast_wrb = pwrb;
4745
4746         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4747
4748         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4749         doorbell |= (io_task->pwrb_handle->wrb_index &
4750                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4751         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4752
4753         iowrite32(doorbell, phba->db_va +
4754                   beiscsi_conn->doorbell_offset);
4755         return 0;
4756 }
4757
4758 static int beiscsi_mtask(struct iscsi_task *task)
4759 {
4760         struct beiscsi_io_task *io_task = task->dd_data;
4761         struct iscsi_conn *conn = task->conn;
4762         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4763         struct beiscsi_hba *phba = beiscsi_conn->phba;
4764         struct iscsi_wrb *pwrb = NULL;
4765         unsigned int doorbell = 0;
4766         unsigned int cid;
4767         unsigned int pwrb_typeoffset = 0;
4768         int ret = 0;
4769
4770         cid = beiscsi_conn->beiscsi_conn_cid;
4771         pwrb = io_task->pwrb_handle->pwrb;
4772         memset(pwrb, 0, sizeof(*pwrb));
4773
4774         if (is_chip_be2_be3r(phba)) {
4775                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4776                               be32_to_cpu(task->cmdsn));
4777                 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4778                               io_task->pwrb_handle->wrb_index);
4779                 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4780                               io_task->psgl_handle->sgl_index);
4781                 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4782                               task->data_count);
4783                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4784                               io_task->pwrb_handle->wrb_index);
4785                 if (io_task->pwrb_context->plast_wrb)
4786                         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
4787                                       io_task->pwrb_context->plast_wrb,
4788                                       io_task->pwrb_handle->wrb_index);
4789                 io_task->pwrb_context->plast_wrb = pwrb;
4790
4791                 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
4792         } else {
4793                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4794                               be32_to_cpu(task->cmdsn));
4795                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4796                               io_task->pwrb_handle->wrb_index);
4797                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4798                               io_task->psgl_handle->sgl_index);
4799                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
4800                               task->data_count);
4801                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4802                               io_task->pwrb_handle->wrb_index);
4803                 if (io_task->pwrb_context->plast_wrb)
4804                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4805                                       io_task->pwrb_context->plast_wrb,
4806                                       io_task->pwrb_handle->wrb_index);
4807                 io_task->pwrb_context->plast_wrb = pwrb;
4808
4809                 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
4810         }
4811
4812
4813         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4814         case ISCSI_OP_LOGIN:
4815                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
4816                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4817                 ret = hwi_write_buffer(pwrb, task);
4818                 break;
4819         case ISCSI_OP_NOOP_OUT:
4820                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
4821                         ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4822                         if (is_chip_be2_be3r(phba))
4823                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
4824                                               dmsg, pwrb, 1);
4825                         else
4826                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4827                                               dmsg, pwrb, 1);
4828                 } else {
4829                         ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
4830                         if (is_chip_be2_be3r(phba))
4831                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
4832                                               dmsg, pwrb, 0);
4833                         else
4834                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4835                                               dmsg, pwrb, 0);
4836                 }
4837                 ret = hwi_write_buffer(pwrb, task);
4838                 break;
4839         case ISCSI_OP_TEXT:
4840                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4841                 ret = hwi_write_buffer(pwrb, task);
4842                 break;
4843         case ISCSI_OP_SCSI_TMFUNC:
4844                 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
4845                 ret = hwi_write_buffer(pwrb, task);
4846                 break;
4847         case ISCSI_OP_LOGOUT:
4848                 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
4849                 ret = hwi_write_buffer(pwrb, task);
4850                 break;
4851
4852         default:
4853                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4854                             "BM_%d : opcode =%d Not supported\n",
4855                             task->hdr->opcode & ISCSI_OPCODE_MASK);
4856
4857                 return -EINVAL;
4858         }
4859
4860         if (ret)
4861                 return ret;
4862
4863         /* Set the task type */
4864         io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
4865                 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
4866                 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
4867
4868         doorbell |= cid & DB_WRB_POST_CID_MASK;
4869         doorbell |= (io_task->pwrb_handle->wrb_index &
4870                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4871         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4872         iowrite32(doorbell, phba->db_va +
4873                   beiscsi_conn->doorbell_offset);
4874         return 0;
4875 }
4876
4877 static int beiscsi_task_xmit(struct iscsi_task *task)
4878 {
4879         struct beiscsi_io_task *io_task = task->dd_data;
4880         struct scsi_cmnd *sc = task->sc;
4881         struct beiscsi_hba *phba;
4882         struct scatterlist *sg;
4883         int num_sg;
4884         unsigned int  writedir = 0, xferlen = 0;
4885
4886         phba = io_task->conn->phba;
4887         /**
4888          * HBA in error includes BEISCSI_HBA_FW_TIMEOUT. IO path might be
4889          * operational if FW still gets heartbeat from EP FW. Is management
4890          * path really needed to continue further?
4891          */
4892         if (!beiscsi_hba_is_online(phba))
4893                 return -EIO;
4894
4895         if (!io_task->conn->login_in_progress)
4896                 task->hdr->exp_statsn = 0;
4897
4898         if (!sc)
4899                 return beiscsi_mtask(task);
4900
4901         io_task->scsi_cmnd = sc;
4902         io_task->num_sg = 0;
4903         num_sg = scsi_dma_map(sc);
4904         if (num_sg < 0) {
4905                 beiscsi_log(phba, KERN_ERR,
4906                             BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
4907                             "BM_%d : scsi_dma_map Failed "
4908                             "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
4909                             be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
4910                             io_task->libiscsi_itt, scsi_bufflen(sc));
4911
4912                 return num_sg;
4913         }
4914         /**
4915          * For scsi cmd task, check num_sg before unmapping in cleanup_task.
4916          * For management task, cleanup_task checks mtask_addr before unmapping.
4917          */
4918         io_task->num_sg = num_sg;
4919         xferlen = scsi_bufflen(sc);
4920         sg = scsi_sglist(sc);
4921         if (sc->sc_data_direction == DMA_TO_DEVICE)
4922                 writedir = 1;
4923          else
4924                 writedir = 0;
4925
4926          return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
4927 }
4928
4929 /**
4930  * beiscsi_bsg_request - handle bsg request from ISCSI transport
4931  * @job: job to handle
4932  */
4933 static int beiscsi_bsg_request(struct bsg_job *job)
4934 {
4935         struct Scsi_Host *shost;
4936         struct beiscsi_hba *phba;
4937         struct iscsi_bsg_request *bsg_req = job->request;
4938         int rc = -EINVAL;
4939         unsigned int tag;
4940         struct be_dma_mem nonemb_cmd;
4941         struct be_cmd_resp_hdr *resp;
4942         struct iscsi_bsg_reply *bsg_reply = job->reply;
4943         unsigned short status, extd_status;
4944
4945         shost = iscsi_job_to_shost(job);
4946         phba = iscsi_host_priv(shost);
4947
4948         if (!beiscsi_hba_is_online(phba)) {
4949                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
4950                             "BM_%d : HBA in error 0x%lx\n", phba->state);
4951                 return -ENXIO;
4952         }
4953
4954         switch (bsg_req->msgcode) {
4955         case ISCSI_BSG_HST_VENDOR:
4956                 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4957                                         job->request_payload.payload_len,
4958                                         &nonemb_cmd.dma);
4959                 if (nonemb_cmd.va == NULL) {
4960                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4961                                     "BM_%d : Failed to allocate memory for "
4962                                     "beiscsi_bsg_request\n");
4963                         return -ENOMEM;
4964                 }
4965                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
4966                                                   &nonemb_cmd);
4967                 if (!tag) {
4968                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4969                                     "BM_%d : MBX Tag Allocation Failed\n");
4970
4971                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4972                                             nonemb_cmd.va, nonemb_cmd.dma);
4973                         return -EAGAIN;
4974                 }
4975
4976                 rc = wait_event_interruptible_timeout(
4977                                         phba->ctrl.mcc_wait[tag],
4978                                         phba->ctrl.mcc_tag_status[tag],
4979                                         msecs_to_jiffies(
4980                                         BEISCSI_HOST_MBX_TIMEOUT));
4981
4982                 if (!test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
4983                         clear_bit(MCC_TAG_STATE_RUNNING,
4984                                   &phba->ctrl.ptag_state[tag].tag_state);
4985                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4986                                             nonemb_cmd.va, nonemb_cmd.dma);
4987                         return -EIO;
4988                 }
4989                 extd_status = (phba->ctrl.mcc_tag_status[tag] &
4990                                CQE_STATUS_ADDL_MASK) >> CQE_STATUS_ADDL_SHIFT;
4991                 status = phba->ctrl.mcc_tag_status[tag] & CQE_STATUS_MASK;
4992                 free_mcc_wrb(&phba->ctrl, tag);
4993                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
4994                 sg_copy_from_buffer(job->reply_payload.sg_list,
4995                                     job->reply_payload.sg_cnt,
4996                                     nonemb_cmd.va, (resp->response_length
4997                                     + sizeof(*resp)));
4998                 bsg_reply->reply_payload_rcv_len = resp->response_length;
4999                 bsg_reply->result = status;
5000                 bsg_job_done(job, bsg_reply->result,
5001                              bsg_reply->reply_payload_rcv_len);
5002                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5003                                     nonemb_cmd.va, nonemb_cmd.dma);
5004                 if (status || extd_status) {
5005                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5006                                     "BM_%d : MBX Cmd Failed"
5007                                     " status = %d extd_status = %d\n",
5008                                     status, extd_status);
5009
5010                         return -EIO;
5011                 } else {
5012                         rc = 0;
5013                 }
5014                 break;
5015
5016         default:
5017                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5018                                 "BM_%d : Unsupported bsg command: 0x%x\n",
5019                                 bsg_req->msgcode);
5020                 break;
5021         }
5022
5023         return rc;
5024 }
5025
5026 void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
5027 {
5028         /* Set the logging parameter */
5029         beiscsi_log_enable_init(phba, beiscsi_log_enable);
5030 }
5031
5032 void beiscsi_start_boot_work(struct beiscsi_hba *phba, unsigned int s_handle)
5033 {
5034         if (phba->boot_struct.boot_kset)
5035                 return;
5036
5037         /* skip if boot work is already in progress */
5038         if (test_and_set_bit(BEISCSI_HBA_BOOT_WORK, &phba->state))
5039                 return;
5040
5041         phba->boot_struct.retry = 3;
5042         phba->boot_struct.tag = 0;
5043         phba->boot_struct.s_handle = s_handle;
5044         phba->boot_struct.action = BEISCSI_BOOT_GET_SHANDLE;
5045         schedule_work(&phba->boot_work);
5046 }
5047
5048 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
5049 {
5050         struct beiscsi_hba *phba = data;
5051         struct mgmt_session_info *boot_sess = &phba->boot_struct.boot_sess;
5052         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
5053         char *str = buf;
5054         int rc = -EPERM;
5055
5056         switch (type) {
5057         case ISCSI_BOOT_TGT_NAME:
5058                 rc = sprintf(buf, "%.*s\n",
5059                             (int)strlen(boot_sess->target_name),
5060                             (char *)&boot_sess->target_name);
5061                 break;
5062         case ISCSI_BOOT_TGT_IP_ADDR:
5063                 if (boot_conn->dest_ipaddr.ip_type == BEISCSI_IP_TYPE_V4)
5064                         rc = sprintf(buf, "%pI4\n",
5065                                 (char *)&boot_conn->dest_ipaddr.addr);
5066                 else
5067                         rc = sprintf(str, "%pI6\n",
5068                                 (char *)&boot_conn->dest_ipaddr.addr);
5069                 break;
5070         case ISCSI_BOOT_TGT_PORT:
5071                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
5072                 break;
5073
5074         case ISCSI_BOOT_TGT_CHAP_NAME:
5075                 rc = sprintf(str,  "%.*s\n",
5076                              boot_conn->negotiated_login_options.auth_data.chap.
5077                              target_chap_name_length,
5078                              (char *)&boot_conn->negotiated_login_options.
5079                              auth_data.chap.target_chap_name);
5080                 break;
5081         case ISCSI_BOOT_TGT_CHAP_SECRET:
5082                 rc = sprintf(str,  "%.*s\n",
5083                              boot_conn->negotiated_login_options.auth_data.chap.
5084                              target_secret_length,
5085                              (char *)&boot_conn->negotiated_login_options.
5086                              auth_data.chap.target_secret);
5087                 break;
5088         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
5089                 rc = sprintf(str,  "%.*s\n",
5090                              boot_conn->negotiated_login_options.auth_data.chap.
5091                              intr_chap_name_length,
5092                              (char *)&boot_conn->negotiated_login_options.
5093                              auth_data.chap.intr_chap_name);
5094                 break;
5095         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
5096                 rc = sprintf(str,  "%.*s\n",
5097                              boot_conn->negotiated_login_options.auth_data.chap.
5098                              intr_secret_length,
5099                              (char *)&boot_conn->negotiated_login_options.
5100                              auth_data.chap.intr_secret);
5101                 break;
5102         case ISCSI_BOOT_TGT_FLAGS:
5103                 rc = sprintf(str, "2\n");
5104                 break;
5105         case ISCSI_BOOT_TGT_NIC_ASSOC:
5106                 rc = sprintf(str, "0\n");
5107                 break;
5108         }
5109         return rc;
5110 }
5111
5112 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
5113 {
5114         struct beiscsi_hba *phba = data;
5115         char *str = buf;
5116         int rc = -EPERM;
5117
5118         switch (type) {
5119         case ISCSI_BOOT_INI_INITIATOR_NAME:
5120                 rc = sprintf(str, "%s\n",
5121                              phba->boot_struct.boot_sess.initiator_iscsiname);
5122                 break;
5123         }
5124         return rc;
5125 }
5126
5127 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
5128 {
5129         struct beiscsi_hba *phba = data;
5130         char *str = buf;
5131         int rc = -EPERM;
5132
5133         switch (type) {
5134         case ISCSI_BOOT_ETH_FLAGS:
5135                 rc = sprintf(str, "2\n");
5136                 break;
5137         case ISCSI_BOOT_ETH_INDEX:
5138                 rc = sprintf(str, "0\n");
5139                 break;
5140         case ISCSI_BOOT_ETH_MAC:
5141                 rc  = beiscsi_get_macaddr(str, phba);
5142                 break;
5143         }
5144         return rc;
5145 }
5146
5147 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
5148 {
5149         umode_t rc = 0;
5150
5151         switch (type) {
5152         case ISCSI_BOOT_TGT_NAME:
5153         case ISCSI_BOOT_TGT_IP_ADDR:
5154         case ISCSI_BOOT_TGT_PORT:
5155         case ISCSI_BOOT_TGT_CHAP_NAME:
5156         case ISCSI_BOOT_TGT_CHAP_SECRET:
5157         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
5158         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
5159         case ISCSI_BOOT_TGT_NIC_ASSOC:
5160         case ISCSI_BOOT_TGT_FLAGS:
5161                 rc = S_IRUGO;
5162                 break;
5163         }
5164         return rc;
5165 }
5166
5167 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
5168 {
5169         umode_t rc = 0;
5170
5171         switch (type) {
5172         case ISCSI_BOOT_INI_INITIATOR_NAME:
5173                 rc = S_IRUGO;
5174                 break;
5175         }
5176         return rc;
5177 }
5178
5179 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
5180 {
5181         umode_t rc = 0;
5182
5183         switch (type) {
5184         case ISCSI_BOOT_ETH_FLAGS:
5185         case ISCSI_BOOT_ETH_MAC:
5186         case ISCSI_BOOT_ETH_INDEX:
5187                 rc = S_IRUGO;
5188                 break;
5189         }
5190         return rc;
5191 }
5192
5193 static void beiscsi_boot_kobj_release(void *data)
5194 {
5195         struct beiscsi_hba *phba = data;
5196
5197         scsi_host_put(phba->shost);
5198 }
5199
5200 static int beiscsi_boot_create_kset(struct beiscsi_hba *phba)
5201 {
5202         struct boot_struct *bs = &phba->boot_struct;
5203         struct iscsi_boot_kobj *boot_kobj;
5204
5205         if (bs->boot_kset) {
5206                 __beiscsi_log(phba, KERN_ERR,
5207                               "BM_%d: boot_kset already created\n");
5208                 return 0;
5209         }
5210
5211         bs->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
5212         if (!bs->boot_kset) {
5213                 __beiscsi_log(phba, KERN_ERR,
5214                               "BM_%d: boot_kset alloc failed\n");
5215                 return -ENOMEM;
5216         }
5217
5218         /* get shost ref because the show function will refer phba */
5219         if (!scsi_host_get(phba->shost))
5220                 goto free_kset;
5221
5222         boot_kobj = iscsi_boot_create_target(bs->boot_kset, 0, phba,
5223                                              beiscsi_show_boot_tgt_info,
5224                                              beiscsi_tgt_get_attr_visibility,
5225                                              beiscsi_boot_kobj_release);
5226         if (!boot_kobj)
5227                 goto put_shost;
5228
5229         if (!scsi_host_get(phba->shost))
5230                 goto free_kset;
5231
5232         boot_kobj = iscsi_boot_create_initiator(bs->boot_kset, 0, phba,
5233                                                 beiscsi_show_boot_ini_info,
5234                                                 beiscsi_ini_get_attr_visibility,
5235                                                 beiscsi_boot_kobj_release);
5236         if (!boot_kobj)
5237                 goto put_shost;
5238
5239         if (!scsi_host_get(phba->shost))
5240                 goto free_kset;
5241
5242         boot_kobj = iscsi_boot_create_ethernet(bs->boot_kset, 0, phba,
5243                                                beiscsi_show_boot_eth_info,
5244                                                beiscsi_eth_get_attr_visibility,
5245                                                beiscsi_boot_kobj_release);
5246         if (!boot_kobj)
5247                 goto put_shost;
5248
5249         return 0;
5250
5251 put_shost:
5252         scsi_host_put(phba->shost);
5253 free_kset:
5254         iscsi_boot_destroy_kset(bs->boot_kset);
5255         bs->boot_kset = NULL;
5256         return -ENOMEM;
5257 }
5258
5259 static void beiscsi_boot_work(struct work_struct *work)
5260 {
5261         struct beiscsi_hba *phba =
5262                 container_of(work, struct beiscsi_hba, boot_work);
5263         struct boot_struct *bs = &phba->boot_struct;
5264         unsigned int tag = 0;
5265
5266         if (!beiscsi_hba_is_online(phba))
5267                 return;
5268
5269         beiscsi_log(phba, KERN_INFO,
5270                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
5271                     "BM_%d : %s action %d\n",
5272                     __func__, phba->boot_struct.action);
5273
5274         switch (phba->boot_struct.action) {
5275         case BEISCSI_BOOT_REOPEN_SESS:
5276                 tag = beiscsi_boot_reopen_sess(phba);
5277                 break;
5278         case BEISCSI_BOOT_GET_SHANDLE:
5279                 tag = __beiscsi_boot_get_shandle(phba, 1);
5280                 break;
5281         case BEISCSI_BOOT_GET_SINFO:
5282                 tag = beiscsi_boot_get_sinfo(phba);
5283                 break;
5284         case BEISCSI_BOOT_LOGOUT_SESS:
5285                 tag = beiscsi_boot_logout_sess(phba);
5286                 break;
5287         case BEISCSI_BOOT_CREATE_KSET:
5288                 beiscsi_boot_create_kset(phba);
5289                 /**
5290                  * updated boot_kset is made visible to all before
5291                  * ending the boot work.
5292                  */
5293                 mb();
5294                 clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5295                 return;
5296         }
5297         if (!tag) {
5298                 if (bs->retry--)
5299                         schedule_work(&phba->boot_work);
5300                 else
5301                         clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5302         }
5303 }
5304
5305 static void beiscsi_eqd_update_work(struct work_struct *work)
5306 {
5307         struct hwi_context_memory *phwi_context;
5308         struct be_set_eqd set_eqd[MAX_CPUS];
5309         struct hwi_controller *phwi_ctrlr;
5310         struct be_eq_obj *pbe_eq;
5311         struct beiscsi_hba *phba;
5312         unsigned int pps, delta;
5313         struct be_aic_obj *aic;
5314         int eqd, i, num = 0;
5315         unsigned long now;
5316
5317         phba = container_of(work, struct beiscsi_hba, eqd_update.work);
5318         if (!beiscsi_hba_is_online(phba))
5319                 return;
5320
5321         phwi_ctrlr = phba->phwi_ctrlr;
5322         phwi_context = phwi_ctrlr->phwi_ctxt;
5323
5324         for (i = 0; i <= phba->num_cpus; i++) {
5325                 aic = &phba->aic_obj[i];
5326                 pbe_eq = &phwi_context->be_eq[i];
5327                 now = jiffies;
5328                 if (!aic->jiffies || time_before(now, aic->jiffies) ||
5329                     pbe_eq->cq_count < aic->eq_prev) {
5330                         aic->jiffies = now;
5331                         aic->eq_prev = pbe_eq->cq_count;
5332                         continue;
5333                 }
5334                 delta = jiffies_to_msecs(now - aic->jiffies);
5335                 pps = (((u32)(pbe_eq->cq_count - aic->eq_prev) * 1000) / delta);
5336                 eqd = (pps / 1500) << 2;
5337
5338                 if (eqd < 8)
5339                         eqd = 0;
5340                 eqd = min_t(u32, eqd, phwi_context->max_eqd);
5341                 eqd = max_t(u32, eqd, phwi_context->min_eqd);
5342
5343                 aic->jiffies = now;
5344                 aic->eq_prev = pbe_eq->cq_count;
5345
5346                 if (eqd != aic->prev_eqd) {
5347                         set_eqd[num].delay_multiplier = (eqd * 65)/100;
5348                         set_eqd[num].eq_id = pbe_eq->q.id;
5349                         aic->prev_eqd = eqd;
5350                         num++;
5351                 }
5352         }
5353         if (num)
5354                 /* completion of this is ignored */
5355                 beiscsi_modify_eq_delay(phba, set_eqd, num);
5356
5357         schedule_delayed_work(&phba->eqd_update,
5358                               msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5359 }
5360
5361 static void beiscsi_msix_enable(struct beiscsi_hba *phba)
5362 {
5363         int i, status;
5364
5365         for (i = 0; i <= phba->num_cpus; i++)
5366                 phba->msix_entries[i].entry = i;
5367
5368         status = pci_enable_msix_range(phba->pcidev, phba->msix_entries,
5369                                        phba->num_cpus + 1, phba->num_cpus + 1);
5370         if (status > 0)
5371                 phba->msix_enabled = true;
5372 }
5373
5374 static void beiscsi_hw_tpe_check(unsigned long ptr)
5375 {
5376         struct beiscsi_hba *phba;
5377         u32 wait;
5378
5379         phba = (struct beiscsi_hba *)ptr;
5380         /* if not TPE, do nothing */
5381         if (!beiscsi_detect_tpe(phba))
5382                 return;
5383
5384         /* wait default 4000ms before recovering */
5385         wait = 4000;
5386         if (phba->ue2rp > BEISCSI_UE_DETECT_INTERVAL)
5387                 wait = phba->ue2rp - BEISCSI_UE_DETECT_INTERVAL;
5388         queue_delayed_work(phba->wq, &phba->recover_port,
5389                            msecs_to_jiffies(wait));
5390 }
5391
5392 static void beiscsi_hw_health_check(unsigned long ptr)
5393 {
5394         struct beiscsi_hba *phba;
5395
5396         phba = (struct beiscsi_hba *)ptr;
5397         beiscsi_detect_ue(phba);
5398         if (beiscsi_detect_ue(phba)) {
5399                 __beiscsi_log(phba, KERN_ERR,
5400                               "BM_%d : port in error: %lx\n", phba->state);
5401                 /* detect TPE if UER supported */
5402                 if (!test_bit(BEISCSI_HBA_UER_SUPP, &phba->state))
5403                         return;
5404                 /* modify this timer to check TPE */
5405                 phba->hw_check.function = beiscsi_hw_tpe_check;
5406         }
5407
5408         mod_timer(&phba->hw_check,
5409                   jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5410 }
5411
5412 /*
5413  * beiscsi_enable_port()- Enables the disabled port.
5414  * Only port resources freed in disable function are reallocated.
5415  * This is called in HBA error handling path.
5416  *
5417  * @phba: Instance of driver private structure
5418  *
5419  **/
5420 static int beiscsi_enable_port(struct beiscsi_hba *phba)
5421 {
5422         struct hwi_context_memory *phwi_context;
5423         struct hwi_controller *phwi_ctrlr;
5424         struct be_eq_obj *pbe_eq;
5425         int ret, i;
5426
5427         if (test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
5428                 __beiscsi_log(phba, KERN_ERR,
5429                               "BM_%d : %s : port is online %lx\n",
5430                               __func__, phba->state);
5431                 return 0;
5432         }
5433
5434         ret = beiscsi_init_sliport(phba);
5435         if (ret)
5436                 return ret;
5437
5438         if (enable_msix)
5439                 find_num_cpus(phba);
5440         else
5441                 phba->num_cpus = 1;
5442         if (enable_msix) {
5443                 beiscsi_msix_enable(phba);
5444                 if (!phba->msix_enabled)
5445                         phba->num_cpus = 1;
5446         }
5447
5448         beiscsi_get_params(phba);
5449         /* Re-enable UER. If different TPE occurs then it is recoverable. */
5450         beiscsi_set_uer_feature(phba);
5451
5452         phba->shost->max_id = phba->params.cxns_per_ctrl;
5453         phba->shost->can_queue = phba->params.ios_per_ctrl;
5454         ret = hwi_init_controller(phba);
5455         if (ret) {
5456                 __beiscsi_log(phba, KERN_ERR,
5457                               "BM_%d : init controller failed %d\n", ret);
5458                 goto disable_msix;
5459         }
5460
5461         for (i = 0; i < MAX_MCC_CMD; i++) {
5462                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5463                 phba->ctrl.mcc_tag[i] = i + 1;
5464                 phba->ctrl.mcc_tag_status[i + 1] = 0;
5465                 phba->ctrl.mcc_tag_available++;
5466         }
5467
5468         phwi_ctrlr = phba->phwi_ctrlr;
5469         phwi_context = phwi_ctrlr->phwi_ctxt;
5470         for (i = 0; i < phba->num_cpus; i++) {
5471                 pbe_eq = &phwi_context->be_eq[i];
5472                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
5473         }
5474
5475         i = (phba->msix_enabled) ? i : 0;
5476         /* Work item for MCC handling */
5477         pbe_eq = &phwi_context->be_eq[i];
5478         INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
5479
5480         ret = beiscsi_init_irqs(phba);
5481         if (ret < 0) {
5482                 __beiscsi_log(phba, KERN_ERR,
5483                               "BM_%d : setup IRQs failed %d\n", ret);
5484                 goto cleanup_port;
5485         }
5486         hwi_enable_intr(phba);
5487         /* port operational: clear all error bits */
5488         set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5489         __beiscsi_log(phba, KERN_INFO,
5490                       "BM_%d : port online: 0x%lx\n", phba->state);
5491
5492         /* start hw_check timer and eqd_update work */
5493         schedule_delayed_work(&phba->eqd_update,
5494                               msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5495
5496         /**
5497          * Timer function gets modified for TPE detection.
5498          * Always reinit to do health check first.
5499          */
5500         phba->hw_check.function = beiscsi_hw_health_check;
5501         mod_timer(&phba->hw_check,
5502                   jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5503         return 0;
5504
5505 cleanup_port:
5506         for (i = 0; i < phba->num_cpus; i++) {
5507                 pbe_eq = &phwi_context->be_eq[i];
5508                 irq_poll_disable(&pbe_eq->iopoll);
5509         }
5510         hwi_cleanup_port(phba);
5511
5512 disable_msix:
5513         if (phba->msix_enabled)
5514                 pci_disable_msix(phba->pcidev);
5515
5516         return ret;
5517 }
5518
5519 /*
5520  * beiscsi_disable_port()- Disable port and cleanup driver resources.
5521  * This is called in HBA error handling and driver removal.
5522  * @phba: Instance Priv structure
5523  * @unload: indicate driver is unloading
5524  *
5525  * Free the OS and HW resources held by the driver
5526  **/
5527 static void beiscsi_disable_port(struct beiscsi_hba *phba, int unload)
5528 {
5529         struct hwi_context_memory *phwi_context;
5530         struct hwi_controller *phwi_ctrlr;
5531         struct be_eq_obj *pbe_eq;
5532         unsigned int i, msix_vec;
5533
5534         if (!test_and_clear_bit(BEISCSI_HBA_ONLINE, &phba->state))
5535                 return;
5536
5537         phwi_ctrlr = phba->phwi_ctrlr;
5538         phwi_context = phwi_ctrlr->phwi_ctxt;
5539         hwi_disable_intr(phba);
5540         if (phba->msix_enabled) {
5541                 for (i = 0; i <= phba->num_cpus; i++) {
5542                         msix_vec = phba->msix_entries[i].vector;
5543                         free_irq(msix_vec, &phwi_context->be_eq[i]);
5544                         kfree(phba->msi_name[i]);
5545                 }
5546         } else
5547                 if (phba->pcidev->irq)
5548                         free_irq(phba->pcidev->irq, phba);
5549         pci_disable_msix(phba->pcidev);
5550
5551         for (i = 0; i < phba->num_cpus; i++) {
5552                 pbe_eq = &phwi_context->be_eq[i];
5553                 irq_poll_disable(&pbe_eq->iopoll);
5554         }
5555         cancel_delayed_work_sync(&phba->eqd_update);
5556         cancel_work_sync(&phba->boot_work);
5557         /* WQ might be running cancel queued mcc_work if we are not exiting */
5558         if (!unload && beiscsi_hba_in_error(phba)) {
5559                 pbe_eq = &phwi_context->be_eq[i];
5560                 cancel_work_sync(&pbe_eq->mcc_work);
5561         }
5562         hwi_cleanup_port(phba);
5563 }
5564
5565 static void beiscsi_recover_port(struct work_struct *work)
5566 {
5567         struct beiscsi_hba *phba;
5568
5569         phba = container_of(work, struct beiscsi_hba, recover_port.work);
5570         iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
5571         beiscsi_disable_port(phba, 0);
5572         beiscsi_enable_port(phba);
5573 }
5574
5575 static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
5576                 pci_channel_state_t state)
5577 {
5578         struct beiscsi_hba *phba = NULL;
5579
5580         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5581         set_bit(BEISCSI_HBA_PCI_ERR, &phba->state);
5582
5583         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5584                     "BM_%d : EEH error detected\n");
5585
5586         /* first stop UE detection when PCI error detected */
5587         del_timer_sync(&phba->hw_check);
5588         cancel_delayed_work_sync(&phba->recover_port);
5589
5590         beiscsi_disable_port(phba, 0);
5591
5592         if (state == pci_channel_io_perm_failure) {
5593                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5594                             "BM_%d : EEH : State PERM Failure");
5595                 return PCI_ERS_RESULT_DISCONNECT;
5596         }
5597
5598         pci_disable_device(pdev);
5599
5600         /* The error could cause the FW to trigger a flash debug dump.
5601          * Resetting the card while flash dump is in progress
5602          * can cause it not to recover; wait for it to finish.
5603          * Wait only for first function as it is needed only once per
5604          * adapter.
5605          **/
5606         if (pdev->devfn == 0)
5607                 ssleep(30);
5608
5609         return PCI_ERS_RESULT_NEED_RESET;
5610 }
5611
5612 static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
5613 {
5614         struct beiscsi_hba *phba = NULL;
5615         int status = 0;
5616
5617         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5618
5619         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5620                     "BM_%d : EEH Reset\n");
5621
5622         status = pci_enable_device(pdev);
5623         if (status)
5624                 return PCI_ERS_RESULT_DISCONNECT;
5625
5626         pci_set_master(pdev);
5627         pci_set_power_state(pdev, PCI_D0);
5628         pci_restore_state(pdev);
5629
5630         status = beiscsi_check_fw_rdy(phba);
5631         if (status) {
5632                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5633                             "BM_%d : EEH Reset Completed\n");
5634         } else {
5635                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5636                             "BM_%d : EEH Reset Completion Failure\n");
5637                 return PCI_ERS_RESULT_DISCONNECT;
5638         }
5639
5640         pci_cleanup_aer_uncorrect_error_status(pdev);
5641         return PCI_ERS_RESULT_RECOVERED;
5642 }
5643
5644 static void beiscsi_eeh_resume(struct pci_dev *pdev)
5645 {
5646         struct beiscsi_hba *phba;
5647         int ret;
5648
5649         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5650         pci_save_state(pdev);
5651
5652         ret = beiscsi_enable_port(phba);
5653         if (ret)
5654                 __beiscsi_log(phba, KERN_ERR,
5655                               "BM_%d : AER EEH resume failed\n");
5656 }
5657
5658 static int beiscsi_dev_probe(struct pci_dev *pcidev,
5659                              const struct pci_device_id *id)
5660 {
5661         struct beiscsi_hba *phba = NULL;
5662         struct hwi_controller *phwi_ctrlr;
5663         struct hwi_context_memory *phwi_context;
5664         struct be_eq_obj *pbe_eq;
5665         unsigned int s_handle;
5666         int ret = 0, i;
5667
5668         ret = beiscsi_enable_pci(pcidev);
5669         if (ret < 0) {
5670                 dev_err(&pcidev->dev,
5671                         "beiscsi_dev_probe - Failed to enable pci device\n");
5672                 return ret;
5673         }
5674
5675         phba = beiscsi_hba_alloc(pcidev);
5676         if (!phba) {
5677                 dev_err(&pcidev->dev,
5678                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5679                 goto disable_pci;
5680         }
5681
5682         /* Enable EEH reporting */
5683         ret = pci_enable_pcie_error_reporting(pcidev);
5684         if (ret)
5685                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5686                             "BM_%d : PCIe Error Reporting "
5687                             "Enabling Failed\n");
5688
5689         pci_save_state(pcidev);
5690
5691         /* Initialize Driver configuration Paramters */
5692         beiscsi_hba_attrs_init(phba);
5693
5694         phba->mac_addr_set = false;
5695
5696         switch (pcidev->device) {
5697         case BE_DEVICE_ID1:
5698         case OC_DEVICE_ID1:
5699         case OC_DEVICE_ID2:
5700                 phba->generation = BE_GEN2;
5701                 phba->iotask_fn = beiscsi_iotask;
5702                 break;
5703         case BE_DEVICE_ID2:
5704         case OC_DEVICE_ID3:
5705                 phba->generation = BE_GEN3;
5706                 phba->iotask_fn = beiscsi_iotask;
5707                 break;
5708         case OC_SKH_ID1:
5709                 phba->generation = BE_GEN4;
5710                 phba->iotask_fn = beiscsi_iotask_v2;
5711                 break;
5712         default:
5713                 phba->generation = 0;
5714         }
5715
5716         ret = be_ctrl_init(phba, pcidev);
5717         if (ret) {
5718                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5719                             "BM_%d : be_ctrl_init failed\n");
5720                 goto hba_free;
5721         }
5722
5723         ret = beiscsi_init_sliport(phba);
5724         if (ret)
5725                 goto hba_free;
5726
5727         spin_lock_init(&phba->io_sgl_lock);
5728         spin_lock_init(&phba->mgmt_sgl_lock);
5729         spin_lock_init(&phba->async_pdu_lock);
5730         ret = beiscsi_get_fw_config(&phba->ctrl, phba);
5731         if (ret != 0) {
5732                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5733                             "BM_%d : Error getting fw config\n");
5734                 goto free_port;
5735         }
5736         beiscsi_get_port_name(&phba->ctrl, phba);
5737         beiscsi_get_params(phba);
5738         beiscsi_set_uer_feature(phba);
5739
5740         if (enable_msix)
5741                 find_num_cpus(phba);
5742         else
5743                 phba->num_cpus = 1;
5744
5745         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5746                     "BM_%d : num_cpus = %d\n",
5747                     phba->num_cpus);
5748
5749         if (enable_msix) {
5750                 beiscsi_msix_enable(phba);
5751                 if (!phba->msix_enabled)
5752                         phba->num_cpus = 1;
5753         }
5754
5755         phba->shost->max_id = phba->params.cxns_per_ctrl;
5756         phba->shost->can_queue = phba->params.ios_per_ctrl;
5757         ret = beiscsi_init_port(phba);
5758         if (ret < 0) {
5759                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5760                             "BM_%d : beiscsi_dev_probe-"
5761                             "Failed in beiscsi_init_port\n");
5762                 goto free_port;
5763         }
5764
5765         for (i = 0; i < MAX_MCC_CMD; i++) {
5766                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5767                 phba->ctrl.mcc_tag[i] = i + 1;
5768                 phba->ctrl.mcc_tag_status[i + 1] = 0;
5769                 phba->ctrl.mcc_tag_available++;
5770                 memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
5771                        sizeof(struct be_dma_mem));
5772         }
5773
5774         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5775
5776         snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
5777                  phba->shost->host_no);
5778         phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
5779         if (!phba->wq) {
5780                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5781                             "BM_%d : beiscsi_dev_probe-"
5782                             "Failed to allocate work queue\n");
5783                 goto free_twq;
5784         }
5785
5786         INIT_DELAYED_WORK(&phba->eqd_update, beiscsi_eqd_update_work);
5787
5788         phwi_ctrlr = phba->phwi_ctrlr;
5789         phwi_context = phwi_ctrlr->phwi_ctxt;
5790
5791         for (i = 0; i < phba->num_cpus; i++) {
5792                 pbe_eq = &phwi_context->be_eq[i];
5793                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
5794         }
5795
5796         i = (phba->msix_enabled) ? i : 0;
5797         /* Work item for MCC handling */
5798         pbe_eq = &phwi_context->be_eq[i];
5799         INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
5800
5801         ret = beiscsi_init_irqs(phba);
5802         if (ret < 0) {
5803                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5804                             "BM_%d : beiscsi_dev_probe-"
5805                             "Failed to beiscsi_init_irqs\n");
5806                 goto free_blkenbld;
5807         }
5808         hwi_enable_intr(phba);
5809
5810         ret = iscsi_host_add(phba->shost, &phba->pcidev->dev);
5811         if (ret)
5812                 goto free_blkenbld;
5813
5814         /* set online bit after port is operational */
5815         set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5816         __beiscsi_log(phba, KERN_INFO,
5817                       "BM_%d : port online: 0x%lx\n", phba->state);
5818
5819         INIT_WORK(&phba->boot_work, beiscsi_boot_work);
5820         ret = beiscsi_boot_get_shandle(phba, &s_handle);
5821         if (ret > 0) {
5822                 beiscsi_start_boot_work(phba, s_handle);
5823                 /**
5824                  * Set this bit after starting the work to let
5825                  * probe handle it first.
5826                  * ASYNC event can too schedule this work.
5827                  */
5828                 set_bit(BEISCSI_HBA_BOOT_FOUND, &phba->state);
5829         }
5830
5831         beiscsi_iface_create_default(phba);
5832         schedule_delayed_work(&phba->eqd_update,
5833                               msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5834
5835         INIT_DELAYED_WORK(&phba->recover_port, beiscsi_recover_port);
5836         /**
5837          * Start UE detection here. UE before this will cause stall in probe
5838          * and eventually fail the probe.
5839          */
5840         init_timer(&phba->hw_check);
5841         phba->hw_check.function = beiscsi_hw_health_check;
5842         phba->hw_check.data = (unsigned long)phba;
5843         mod_timer(&phba->hw_check,
5844                   jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5845
5846         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5847                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5848         return 0;
5849
5850 free_blkenbld:
5851         destroy_workqueue(phba->wq);
5852         for (i = 0; i < phba->num_cpus; i++) {
5853                 pbe_eq = &phwi_context->be_eq[i];
5854                 irq_poll_disable(&pbe_eq->iopoll);
5855         }
5856 free_twq:
5857         hwi_cleanup_port(phba);
5858         beiscsi_cleanup_port(phba);
5859         beiscsi_free_mem(phba);
5860 free_port:
5861         pci_free_consistent(phba->pcidev,
5862                             phba->ctrl.mbox_mem_alloced.size,
5863                             phba->ctrl.mbox_mem_alloced.va,
5864                            phba->ctrl.mbox_mem_alloced.dma);
5865         beiscsi_unmap_pci_function(phba);
5866 hba_free:
5867         if (phba->msix_enabled)
5868                 pci_disable_msix(phba->pcidev);
5869         pci_dev_put(phba->pcidev);
5870         iscsi_host_free(phba->shost);
5871         pci_set_drvdata(pcidev, NULL);
5872 disable_pci:
5873         pci_release_regions(pcidev);
5874         pci_disable_device(pcidev);
5875         return ret;
5876 }
5877
5878 static void beiscsi_remove(struct pci_dev *pcidev)
5879 {
5880         struct beiscsi_hba *phba = NULL;
5881
5882         phba = pci_get_drvdata(pcidev);
5883         if (!phba) {
5884                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5885                 return;
5886         }
5887
5888         /* first stop UE detection before unloading */
5889         del_timer_sync(&phba->hw_check);
5890         cancel_delayed_work_sync(&phba->recover_port);
5891
5892         beiscsi_iface_destroy_default(phba);
5893         iscsi_host_remove(phba->shost);
5894         beiscsi_disable_port(phba, 1);
5895
5896         /* after cancelling boot_work */
5897         iscsi_boot_destroy_kset(phba->boot_struct.boot_kset);
5898
5899         /* free all resources */
5900         destroy_workqueue(phba->wq);
5901         beiscsi_cleanup_port(phba);
5902         beiscsi_free_mem(phba);
5903
5904         /* ctrl uninit */
5905         beiscsi_unmap_pci_function(phba);
5906         pci_free_consistent(phba->pcidev,
5907                             phba->ctrl.mbox_mem_alloced.size,
5908                             phba->ctrl.mbox_mem_alloced.va,
5909                             phba->ctrl.mbox_mem_alloced.dma);
5910
5911         pci_dev_put(phba->pcidev);
5912         iscsi_host_free(phba->shost);
5913         pci_disable_pcie_error_reporting(pcidev);
5914         pci_set_drvdata(pcidev, NULL);
5915         pci_release_regions(pcidev);
5916         pci_disable_device(pcidev);
5917 }
5918
5919
5920 static struct pci_error_handlers beiscsi_eeh_handlers = {
5921         .error_detected = beiscsi_eeh_err_detected,
5922         .slot_reset = beiscsi_eeh_reset,
5923         .resume = beiscsi_eeh_resume,
5924 };
5925
5926 struct iscsi_transport beiscsi_iscsi_transport = {
5927         .owner = THIS_MODULE,
5928         .name = DRV_NAME,
5929         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5930                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
5931         .create_session = beiscsi_session_create,
5932         .destroy_session = beiscsi_session_destroy,
5933         .create_conn = beiscsi_conn_create,
5934         .bind_conn = beiscsi_conn_bind,
5935         .destroy_conn = iscsi_conn_teardown,
5936         .attr_is_visible = beiscsi_attr_is_visible,
5937         .set_iface_param = beiscsi_iface_set_param,
5938         .get_iface_param = beiscsi_iface_get_param,
5939         .set_param = beiscsi_set_param,
5940         .get_conn_param = iscsi_conn_get_param,
5941         .get_session_param = iscsi_session_get_param,
5942         .get_host_param = beiscsi_get_host_param,
5943         .start_conn = beiscsi_conn_start,
5944         .stop_conn = iscsi_conn_stop,
5945         .send_pdu = iscsi_conn_send_pdu,
5946         .xmit_task = beiscsi_task_xmit,
5947         .cleanup_task = beiscsi_cleanup_task,
5948         .alloc_pdu = beiscsi_alloc_pdu,
5949         .parse_pdu_itt = beiscsi_parse_pdu,
5950         .get_stats = beiscsi_conn_get_stats,
5951         .get_ep_param = beiscsi_ep_get_param,
5952         .ep_connect = beiscsi_ep_connect,
5953         .ep_poll = beiscsi_ep_poll,
5954         .ep_disconnect = beiscsi_ep_disconnect,
5955         .session_recovery_timedout = iscsi_session_recovery_timedout,
5956         .bsg_request = beiscsi_bsg_request,
5957 };
5958
5959 static struct pci_driver beiscsi_pci_driver = {
5960         .name = DRV_NAME,
5961         .probe = beiscsi_dev_probe,
5962         .remove = beiscsi_remove,
5963         .id_table = beiscsi_pci_id_table,
5964         .err_handler = &beiscsi_eeh_handlers
5965 };
5966
5967 static int __init beiscsi_module_init(void)
5968 {
5969         int ret;
5970
5971         beiscsi_scsi_transport =
5972                         iscsi_register_transport(&beiscsi_iscsi_transport);
5973         if (!beiscsi_scsi_transport) {
5974                 printk(KERN_ERR
5975                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5976                 return -ENOMEM;
5977         }
5978         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5979                &beiscsi_iscsi_transport);
5980
5981         ret = pci_register_driver(&beiscsi_pci_driver);
5982         if (ret) {
5983                 printk(KERN_ERR
5984                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5985                 goto unregister_iscsi_transport;
5986         }
5987         return 0;
5988
5989 unregister_iscsi_transport:
5990         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5991         return ret;
5992 }
5993
5994 static void __exit beiscsi_module_exit(void)
5995 {
5996         pci_unregister_driver(&beiscsi_pci_driver);
5997         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5998 }
5999
6000 module_init(beiscsi_module_init);
6001 module_exit(beiscsi_module_exit);