4 #define UNSAFE /* Leave interrupts enabled during pseudo-dma I/O */
5 #define DMA_WORKS_RIGHT
9 * DTC 3180/3280 driver, by
10 * Ray Van Tassle rayvt@comm.mot.com
13 * Trantor T128/T128F/T228 driver by...
17 * (Unix and Linux consulting and custom programming)
23 * The card is detected and initialized in one of several ways :
24 * 1. Autoprobe (default) - since the board is memory mapped,
25 * a BIOS signature is scanned for to locate the registers.
26 * An interrupt is triggered to autoprobe for the interrupt
29 * 2. With command line overrides - dtc=address,irq may be
30 * used on the LILO command line to override the defaults.
34 /*----------------------------------------------------------------*/
35 /* the following will set the monitor border color (useful to find
36 where something crashed or gets stuck at */
46 #define rtrc(i) {inb(0x3da); outb(0x31, 0x3c0); outb((i), 0x3c0);}
52 #include <linux/module.h>
53 #include <linux/signal.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/stat.h>
57 #include <linux/string.h>
58 #include <linux/init.h>
59 #include <linux/interrupt.h>
62 #include <scsi/scsi_host.h>
68 * The DTC3180 & 3280 boards are memory mapped.
74 /* Offset from DTC_5380_OFFSET */
75 #define DTC_CONTROL_REG 0x100 /* rw */
76 #define D_CR_ACCESS 0x80 /* ro set=can access 3280 registers */
77 #define CSR_DIR_READ 0x40 /* rw direction, 1 = read 0 = write */
79 #define CSR_RESET 0x80 /* wo Resets 53c400 */
80 #define CSR_5380_REG 0x80 /* ro 5380 registers can be accessed */
81 #define CSR_TRANS_DIR 0x40 /* rw Data transfer direction */
82 #define CSR_SCSI_BUFF_INTR 0x20 /* rw Enable int on transfer ready */
83 #define CSR_5380_INTR 0x10 /* rw Enable 5380 interrupts */
84 #define CSR_SHARED_INTR 0x08 /* rw Interrupt sharing */
85 #define CSR_HOST_BUF_NOT_RDY 0x04 /* ro Host buffer not ready */
86 #define CSR_SCSI_BUF_RDY 0x02 /* ro SCSI buffer ready */
87 #define CSR_GATED_5380_IRQ 0x01 /* ro Last block xferred */
88 #define CSR_INT_BASE (CSR_SCSI_BUFF_INTR | CSR_5380_INTR)
91 #define DTC_BLK_CNT 0x101 /* rw
92 * # of 128-byte blocks to transfer */
95 #define D_CR_ACCESS 0x80 /* ro set=can access 3280 registers */
97 #define DTC_SWITCH_REG 0x3982 /* ro - DIP switches */
98 #define DTC_RESUME_XFER 0x3982 /* wo - resume data xfer
99 * after disconnect/reconnect*/
101 #define DTC_5380_OFFSET 0x3880 /* 8 registers here, see NCR5380.h */
103 /*!!!! for dtc, it's a 128 byte buffer at 3900 !!! */
104 #define DTC_DATA_BUF 0x3900 /* rw 128 bytes long */
106 static struct override {
107 unsigned int address;
111 [] __initdata = OVERRIDE;
114 { 0, IRQ_AUTO }, { 0, IRQ_AUTO }, { 0, IRQ_AUTO }, { 0, IRQ_AUTO }
118 #define NO_OVERRIDES ARRAY_SIZE(overrides)
121 unsigned long address;
123 } bases[] __initdata = {
130 #define NO_BASES ARRAY_SIZE(bases)
132 static const struct signature {
136 {"DATA TECHNOLOGY CORPORATION BIOS", 0x25},
139 #define NO_SIGNATURES ARRAY_SIZE(signatures)
143 * Function : dtc_setup(char *str, int *ints)
145 * Purpose : LILO command line initialization of the overrides array,
147 * Inputs : str - unused, ints - array of integer parameters with ints[0]
148 * equal to the number of ints.
152 static int __init dtc_setup(char *str)
154 static int commandline_current = 0;
158 get_options(str, ARRAY_SIZE(ints), ints);
160 printk("dtc_setup: usage dtc=address,irq\n");
161 else if (commandline_current < NO_OVERRIDES) {
162 overrides[commandline_current].address = ints[1];
163 overrides[commandline_current].irq = ints[2];
164 for (i = 0; i < NO_BASES; ++i)
165 if (bases[i].address == ints[1]) {
169 ++commandline_current;
174 __setup("dtc=", dtc_setup);
178 * Function : int dtc_detect(struct scsi_host_template * tpnt)
180 * Purpose : detects and initializes DTC 3180/3280 controllers
181 * that were autoprobed, overridden on the LILO command line,
182 * or specified at compile time.
184 * Inputs : tpnt - template for this SCSI adapter.
186 * Returns : 1 if a host adapter was found, 0 if not.
190 static int __init dtc_detect(struct scsi_host_template * tpnt)
192 static int current_override = 0, current_base = 0;
193 struct Scsi_Host *instance;
198 for (count = 0; current_override < NO_OVERRIDES; ++current_override) {
202 if (overrides[current_override].address) {
203 addr = overrides[current_override].address;
204 base = ioremap(addr, 0x2000);
208 for (; !addr && (current_base < NO_BASES); ++current_base) {
209 #if (DTCDEBUG & DTCDEBUG_INIT)
210 printk(KERN_DEBUG "scsi-dtc : probing address %08x\n", bases[current_base].address);
212 if (bases[current_base].noauto)
214 base = ioremap(bases[current_base].address, 0x2000);
217 for (sig = 0; sig < NO_SIGNATURES; ++sig) {
218 if (check_signature(base + signatures[sig].offset, signatures[sig].string, strlen(signatures[sig].string))) {
219 addr = bases[current_base].address;
220 #if (DTCDEBUG & DTCDEBUG_INIT)
221 printk(KERN_DEBUG "scsi-dtc : detected board.\n");
229 #if defined(DTCDEBUG) && (DTCDEBUG & DTCDEBUG_INIT)
230 printk(KERN_DEBUG "scsi-dtc : base = %08x\n", addr);
237 instance = scsi_register(tpnt, sizeof(struct NCR5380_hostdata));
238 if (instance == NULL)
241 instance->base = addr;
242 ((struct NCR5380_hostdata *)(instance)->hostdata)->base = base;
244 NCR5380_init(instance, 0);
246 NCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR); /* Enable int's */
247 if (overrides[current_override].irq != IRQ_AUTO)
248 instance->irq = overrides[current_override].irq;
250 instance->irq = NCR5380_probe_irq(instance, DTC_IRQS);
252 /* Compatibility with documented NCR5380 kernel parameters */
253 if (instance->irq == 255)
254 instance->irq = NO_IRQ;
256 #ifndef DONT_USE_INTR
257 /* With interrupts enabled, it will sometimes hang when doing heavy
258 * reads. So better not enable them until I finger it out. */
259 if (instance->irq != NO_IRQ)
260 if (request_irq(instance->irq, dtc_intr, 0,
262 printk(KERN_ERR "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq);
263 instance->irq = NO_IRQ;
266 if (instance->irq == NO_IRQ) {
267 printk(KERN_WARNING "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no);
268 printk(KERN_WARNING "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
271 if (instance->irq != NO_IRQ)
272 printk(KERN_WARNING "scsi%d : interrupts not used. Might as well not jumper it.\n", instance->host_no);
273 instance->irq = NO_IRQ;
275 #if defined(DTCDEBUG) && (DTCDEBUG & DTCDEBUG_INIT)
276 printk("scsi%d : irq = %d\n", instance->host_no, instance->irq);
286 * Function : int dtc_biosparam(Disk * disk, struct block_device *dev, int *ip)
288 * Purpose : Generates a BIOS / DOS compatible H-C-S mapping for
289 * the specified device / size.
291 * Inputs : size = size of device in sectors (512 bytes), dev = block device
292 * major / minor, ip[] = {heads, sectors, cylinders}
294 * Returns : always 0 (success), initializes ip
299 * XXX Most SCSI boards use this mapping, I could be incorrect. Some one
300 * using hard disks on a trantor should verify that this mapping corresponds
301 * to that used by the BIOS / ASPI driver by running the linux fdisk program
302 * and matching the H_C_S coordinates to what DOS uses.
305 static int dtc_biosparam(struct scsi_device *sdev, struct block_device *dev,
306 sector_t capacity, int *ip)
317 /****************************************************************
318 * Function : int NCR5380_pread (struct Scsi_Host *instance,
319 * unsigned char *dst, int len)
321 * Purpose : Fast 5380 pseudo-dma read function, reads len bytes to
324 * Inputs : dst = destination, len = length in bytes
326 * Returns : 0 on success, non zero on a failure such as a watchdog
330 static inline int NCR5380_pread(struct Scsi_Host *instance, unsigned char *dst, int len)
332 unsigned char *d = dst;
333 int i; /* For counting time spent in the poll-loop */
334 struct NCR5380_hostdata *hostdata = shost_priv(instance);
335 NCR5380_local_declare();
336 NCR5380_setup(instance);
339 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
340 NCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE);
341 if (instance->irq == NO_IRQ)
342 NCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ);
344 NCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ | CSR_INT_BASE);
345 NCR5380_write(DTC_BLK_CNT, len >> 7); /* Block count */
349 while (NCR5380_read(DTC_CONTROL_REG) & CSR_HOST_BUF_NOT_RDY)
352 memcpy_fromio(d, base + DTC_DATA_BUF, 128);
356 /*** with int's on, it sometimes hangs after here.
357 * Looks like something makes HBNR go away. */
360 while (!(NCR5380_read(DTC_CONTROL_REG) & D_CR_ACCESS))
362 NCR5380_write(MODE_REG, 0); /* Clear the operating mode */
364 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
365 if (i > hostdata->spin_max_r)
366 hostdata->spin_max_r = i;
370 /****************************************************************
371 * Function : int NCR5380_pwrite (struct Scsi_Host *instance,
372 * unsigned char *src, int len)
374 * Purpose : Fast 5380 pseudo-dma write function, transfers len bytes from
377 * Inputs : src = source, len = length in bytes
379 * Returns : 0 on success, non zero on a failure such as a watchdog
383 static inline int NCR5380_pwrite(struct Scsi_Host *instance, unsigned char *src, int len)
386 struct NCR5380_hostdata *hostdata = shost_priv(instance);
387 NCR5380_local_declare();
388 NCR5380_setup(instance);
390 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
391 NCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE);
392 /* set direction (write) */
393 if (instance->irq == NO_IRQ)
394 NCR5380_write(DTC_CONTROL_REG, 0);
396 NCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR);
397 NCR5380_write(DTC_BLK_CNT, len >> 7); /* Block count */
398 for (i = 0; len > 0; ++i) {
400 /* Poll until the host buffer can accept data. */
401 while (NCR5380_read(DTC_CONTROL_REG) & CSR_HOST_BUF_NOT_RDY)
404 memcpy_toio(base + DTC_DATA_BUF, src, 128);
409 while (!(NCR5380_read(DTC_CONTROL_REG) & D_CR_ACCESS))
412 /* Wait until the last byte has been sent to the disk */
413 while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
416 /* Check for parity error here. fixme. */
417 NCR5380_write(MODE_REG, 0); /* Clear the operating mode */
419 if (i > hostdata->spin_max_w)
420 hostdata->spin_max_w = i;
424 MODULE_LICENSE("GPL");
428 static int dtc_release(struct Scsi_Host *shost)
430 NCR5380_local_declare();
431 NCR5380_setup(shost);
432 if (shost->irq != NO_IRQ)
433 free_irq(shost->irq, shost);
435 if (shost->io_port && shost->n_io_port)
436 release_region(shost->io_port, shost->n_io_port);
437 scsi_unregister(shost);
442 static struct scsi_host_template driver_template = {
443 .name = "DTC 3180/3280 ",
444 .detect = dtc_detect,
445 .release = dtc_release,
446 .proc_name = "dtc3x80",
447 .show_info = dtc_show_info,
448 .write_info = dtc_write_info,
450 .queuecommand = dtc_queue_command,
451 .eh_abort_handler = dtc_abort,
452 .eh_bus_reset_handler = dtc_bus_reset,
453 .bios_param = dtc_biosparam,
454 .can_queue = CAN_QUEUE,
456 .sg_tablesize = SG_ALL,
457 .cmd_per_lun = CMD_PER_LUN,
458 .use_clustering = DISABLE_CLUSTERING,
460 #include "scsi_module.c"