drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci-aspm.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/fs.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/compat.h>
  35 #include <linux/blktrace_api.h>
  36 #include <linux/uaccess.h>
  37 #include <linux/io.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/completion.h>
  40 #include <linux/moduleparam.h>
  41 #include <scsi/scsi.h>
  42 #include <scsi/scsi_cmnd.h>
  43 #include <scsi/scsi_device.h>
  44 #include <scsi/scsi_host.h>
  45 #include <scsi/scsi_tcq.h>
  46 #include <linux/cciss_ioctl.h>
  47 #include <linux/string.h>
  48 #include <linux/bitmap.h>
  49 #include <linux/atomic.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/percpu.h>
  52 #include <asm/div64.h>
  53 #include "hpsa_cmd.h"
  54 #include "hpsa.h"
  55
  56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  57 #define HPSA_DRIVER_VERSION "3.4.4-1"
  58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  59 #define HPSA "hpsa"
  60
  61 /* How long to wait (in milliseconds) for board to go into simple mode */
  62 #define MAX_CONFIG_WAIT 30000
  63 #define MAX_IOCTL_CONFIG_WAIT 1000
  64
  65 /*define how many times we will try a command because of bus resets */
  66 #define MAX_CMD_RETRIES 3
  67
  68 /* Embedded module documentation macros - see modules.h */
  69 MODULE_AUTHOR("Hewlett-Packard Company");
  70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  71         HPSA_DRIVER_VERSION);
  72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  73 MODULE_VERSION(HPSA_DRIVER_VERSION);
  74 MODULE_LICENSE("GPL");
  75
  76 static int hpsa_allow_any;
  77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  78 MODULE_PARM_DESC(hpsa_allow_any,
  79                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  80 static int hpsa_simple_mode;
  81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  82 MODULE_PARM_DESC(hpsa_simple_mode,
  83         "Use 'simple mode' rather than 'performant mode'");
  84
  85 /* define the PCI info for the cards we can control */
  86 static const struct pci_device_id hpsa_pci_device_id[] = {
  87         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  88         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  89         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  90         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1925},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 128         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 129         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 130         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 131         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 132         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 133         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 134                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 135         {0,}
 136 };
 137
 138 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 139
 140 /*  board_id = Subsystem Device ID & Vendor ID
 141  *  product = Marketing Name for the board
 142  *  access = Address of the struct of function pointers
 143  */
 144 static struct board_type products[] = {
 145         {0x3241103C, "Smart Array P212", &SA5_access},
 146         {0x3243103C, "Smart Array P410", &SA5_access},
 147         {0x3245103C, "Smart Array P410i", &SA5_access},
 148         {0x3247103C, "Smart Array P411", &SA5_access},
 149         {0x3249103C, "Smart Array P812", &SA5_access},
 150         {0x324A103C, "Smart Array P712m", &SA5_access},
 151         {0x324B103C, "Smart Array P711m", &SA5_access},
 152         {0x3350103C, "Smart Array P222", &SA5_access},
 153         {0x3351103C, "Smart Array P420", &SA5_access},
 154         {0x3352103C, "Smart Array P421", &SA5_access},
 155         {0x3353103C, "Smart Array P822", &SA5_access},
 156         {0x3354103C, "Smart Array P420i", &SA5_access},
 157         {0x3355103C, "Smart Array P220i", &SA5_access},
 158         {0x3356103C, "Smart Array P721m", &SA5_access},
 159         {0x1921103C, "Smart Array P830i", &SA5_access},
 160         {0x1922103C, "Smart Array P430", &SA5_access},
 161         {0x1923103C, "Smart Array P431", &SA5_access},
 162         {0x1924103C, "Smart Array P830", &SA5_access},
 163         {0x1926103C, "Smart Array P731m", &SA5_access},
 164         {0x1928103C, "Smart Array P230i", &SA5_access},
 165         {0x1929103C, "Smart Array P530", &SA5_access},
 166         {0x21BD103C, "Smart Array", &SA5_access},
 167         {0x21BE103C, "Smart Array", &SA5_access},
 168         {0x21BF103C, "Smart Array", &SA5_access},
 169         {0x21C0103C, "Smart Array", &SA5_access},
 170         {0x21C1103C, "Smart Array", &SA5_access},
 171         {0x21C2103C, "Smart Array", &SA5_access},
 172         {0x21C3103C, "Smart Array", &SA5_access},
 173         {0x21C4103C, "Smart Array", &SA5_access},
 174         {0x21C5103C, "Smart Array", &SA5_access},
 175         {0x21C6103C, "Smart Array", &SA5_access},
 176         {0x21C7103C, "Smart Array", &SA5_access},
 177         {0x21C8103C, "Smart Array", &SA5_access},
 178         {0x21C9103C, "Smart Array", &SA5_access},
 179         {0x21CA103C, "Smart Array", &SA5_access},
 180         {0x21CB103C, "Smart Array", &SA5_access},
 181         {0x21CC103C, "Smart Array", &SA5_access},
 182         {0x21CD103C, "Smart Array", &SA5_access},
 183         {0x21CE103C, "Smart Array", &SA5_access},
 184         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 185         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 186         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 187         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 188         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 189         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 190 };
 191
 192 static int number_of_controllers;
 193
 194 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 195 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 196 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
 197 static void lock_and_start_io(struct ctlr_info *h);
 198 static void start_io(struct ctlr_info *h, unsigned long *flags);
 199
 200 #ifdef CONFIG_COMPAT
 201 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
 202 #endif
 203
 204 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 205 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
 206 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 207 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
 208 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 209         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 210         int cmd_type);
 211 #define VPD_PAGE (1 << 8)
 212
 213 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 214 static void hpsa_scan_start(struct Scsi_Host *);
 215 static int hpsa_scan_finished(struct Scsi_Host *sh,
 216         unsigned long elapsed_time);
 217 static int hpsa_change_queue_depth(struct scsi_device *sdev,
 218         int qdepth, int reason);
 219
 220 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 221 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 222 static int hpsa_slave_alloc(struct scsi_device *sdev);
 223 static void hpsa_slave_destroy(struct scsi_device *sdev);
 224
 225 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
 226 static int check_for_unit_attention(struct ctlr_info *h,
 227         struct CommandList *c);
 228 static void check_ioctl_unit_attention(struct ctlr_info *h,
 229         struct CommandList *c);
 230 /* performant mode helper functions */
 231 static void calc_bucket_map(int *bucket, int num_buckets,
 232         int nsgs, int min_blocks, int *bucket_map);
 233 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 234 static inline u32 next_command(struct ctlr_info *h, u8 q);
 235 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 236                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 237                                u64 *cfg_offset);
 238 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 239                                     unsigned long *memory_bar);
 240 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 241 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 242                                      int wait_for_ready);
 243 static inline void finish_cmd(struct CommandList *c);
 244 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 245 #define BOARD_NOT_READY 0
 246 #define BOARD_READY 1
 247 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 248 static void hpsa_flush_cache(struct ctlr_info *h);
 249 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 250         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 251         u8 *scsi3addr);
 252
 253 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 254 {
 255         unsigned long *priv = shost_priv(sdev->host);
 256         return (struct ctlr_info *) *priv;
 257 }
 258
 259 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 260 {
 261         unsigned long *priv = shost_priv(sh);
 262         return (struct ctlr_info *) *priv;
 263 }
 264
 265 static int check_for_unit_attention(struct ctlr_info *h,
 266         struct CommandList *c)
 267 {
 268         if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
 269                 return 0;
 270
 271         switch (c->err_info->SenseInfo[12]) {
 272         case STATE_CHANGED:
 273                 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
 274                         "detected, command retried\n", h->ctlr);
 275                 break;
 276         case LUN_FAILED:
 277                 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
 278                         "detected, action required\n", h->ctlr);
 279                 break;
 280         case REPORT_LUNS_CHANGED:
 281                 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
 282                         "changed, action required\n", h->ctlr);
 283         /*
 284          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 285          * target (array) devices.
 286          */
 287                 break;
 288         case POWER_OR_RESET:
 289                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
 290                         "or device reset detected\n", h->ctlr);
 291                 break;
 292         case UNIT_ATTENTION_CLEARED:
 293                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
 294                     "cleared by another initiator\n", h->ctlr);
 295                 break;
 296         default:
 297                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
 298                         "unit attention detected\n", h->ctlr);
 299                 break;
 300         }
 301         return 1;
 302 }
 303
 304 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 305 {
 306         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 307                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 308                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 309                 return 0;
 310         dev_warn(&h->pdev->dev, HPSA "device busy");
 311         return 1;
 312 }
 313
 314 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 315                                          struct device_attribute *attr,
 316                                          const char *buf, size_t count)
 317 {
 318         int status, len;
 319         struct ctlr_info *h;
 320         struct Scsi_Host *shost = class_to_shost(dev);
 321         char tmpbuf[10];
 322
 323         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 324                 return -EACCES;
 325         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 326         strncpy(tmpbuf, buf, len);
 327         tmpbuf[len] = '\0';
 328         if (sscanf(tmpbuf, "%d", &status) != 1)
 329                 return -EINVAL;
 330         h = shost_to_hba(shost);
 331         h->acciopath_status = !!status;
 332         dev_warn(&h->pdev->dev,
 333                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 334                 h->acciopath_status ? "enabled" : "disabled");
 335         return count;
 336 }
 337
 338 static ssize_t host_store_raid_offload_debug(struct device *dev,
 339                                          struct device_attribute *attr,
 340                                          const char *buf, size_t count)
 341 {
 342         int debug_level, len;
 343         struct ctlr_info *h;
 344         struct Scsi_Host *shost = class_to_shost(dev);
 345         char tmpbuf[10];
 346
 347         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 348                 return -EACCES;
 349         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 350         strncpy(tmpbuf, buf, len);
 351         tmpbuf[len] = '\0';
 352         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 353                 return -EINVAL;
 354         if (debug_level < 0)
 355                 debug_level = 0;
 356         h = shost_to_hba(shost);
 357         h->raid_offload_debug = debug_level;
 358         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 359                 h->raid_offload_debug);
 360         return count;
 361 }
 362
 363 static ssize_t host_store_rescan(struct device *dev,
 364                                  struct device_attribute *attr,
 365                                  const char *buf, size_t count)
 366 {
 367         struct ctlr_info *h;
 368         struct Scsi_Host *shost = class_to_shost(dev);
 369         h = shost_to_hba(shost);
 370         hpsa_scan_start(h->scsi_host);
 371         return count;
 372 }
 373
 374 static ssize_t host_show_firmware_revision(struct device *dev,
 375              struct device_attribute *attr, char *buf)
 376 {
 377         struct ctlr_info *h;
 378         struct Scsi_Host *shost = class_to_shost(dev);
 379         unsigned char *fwrev;
 380
 381         h = shost_to_hba(shost);
 382         if (!h->hba_inquiry_data)
 383                 return 0;
 384         fwrev = &h->hba_inquiry_data[32];
 385         return snprintf(buf, 20, "%c%c%c%c\n",
 386                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 387 }
 388
 389 static ssize_t host_show_commands_outstanding(struct device *dev,
 390              struct device_attribute *attr, char *buf)
 391 {
 392         struct Scsi_Host *shost = class_to_shost(dev);
 393         struct ctlr_info *h = shost_to_hba(shost);
 394
 395         return snprintf(buf, 20, "%d\n", h->commands_outstanding);
 396 }
 397
 398 static ssize_t host_show_transport_mode(struct device *dev,
 399         struct device_attribute *attr, char *buf)
 400 {
 401         struct ctlr_info *h;
 402         struct Scsi_Host *shost = class_to_shost(dev);
 403
 404         h = shost_to_hba(shost);
 405         return snprintf(buf, 20, "%s\n",
 406                 h->transMethod & CFGTBL_Trans_Performant ?
 407                         "performant" : "simple");
 408 }
 409
 410 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 411         struct device_attribute *attr, char *buf)
 412 {
 413         struct ctlr_info *h;
 414         struct Scsi_Host *shost = class_to_shost(dev);
 415
 416         h = shost_to_hba(shost);
 417         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 418                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 419 }
 420
 421 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 422 static u32 unresettable_controller[] = {
 423         0x324a103C, /* Smart Array P712m */
 424         0x324b103C, /* SmartArray P711m */
 425         0x3223103C, /* Smart Array P800 */
 426         0x3234103C, /* Smart Array P400 */
 427         0x3235103C, /* Smart Array P400i */
 428         0x3211103C, /* Smart Array E200i */
 429         0x3212103C, /* Smart Array E200 */
 430         0x3213103C, /* Smart Array E200i */
 431         0x3214103C, /* Smart Array E200i */
 432         0x3215103C, /* Smart Array E200i */
 433         0x3237103C, /* Smart Array E500 */
 434         0x323D103C, /* Smart Array P700m */
 435         0x40800E11, /* Smart Array 5i */
 436         0x409C0E11, /* Smart Array 6400 */
 437         0x409D0E11, /* Smart Array 6400 EM */
 438         0x40700E11, /* Smart Array 5300 */
 439         0x40820E11, /* Smart Array 532 */
 440         0x40830E11, /* Smart Array 5312 */
 441         0x409A0E11, /* Smart Array 641 */
 442         0x409B0E11, /* Smart Array 642 */
 443         0x40910E11, /* Smart Array 6i */
 444 };
 445
 446 /* List of controllers which cannot even be soft reset */
 447 static u32 soft_unresettable_controller[] = {
 448         0x40800E11, /* Smart Array 5i */
 449         0x40700E11, /* Smart Array 5300 */
 450         0x40820E11, /* Smart Array 532 */
 451         0x40830E11, /* Smart Array 5312 */
 452         0x409A0E11, /* Smart Array 641 */
 453         0x409B0E11, /* Smart Array 642 */
 454         0x40910E11, /* Smart Array 6i */
 455         /* Exclude 640x boards.  These are two pci devices in one slot
 456          * which share a battery backed cache module.  One controls the
 457          * cache, the other accesses the cache through the one that controls
 458          * it.  If we reset the one controlling the cache, the other will
 459          * likely not be happy.  Just forbid resetting this conjoined mess.
 460          * The 640x isn't really supported by hpsa anyway.
 461          */
 462         0x409C0E11, /* Smart Array 6400 */
 463         0x409D0E11, /* Smart Array 6400 EM */
 464 };
 465
 466 static int ctlr_is_hard_resettable(u32 board_id)
 467 {
 468         int i;
 469
 470         for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
 471                 if (unresettable_controller[i] == board_id)
 472                         return 0;
 473         return 1;
 474 }
 475
 476 static int ctlr_is_soft_resettable(u32 board_id)
 477 {
 478         int i;
 479
 480         for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
 481                 if (soft_unresettable_controller[i] == board_id)
 482                         return 0;
 483         return 1;
 484 }
 485
 486 static int ctlr_is_resettable(u32 board_id)
 487 {
 488         return ctlr_is_hard_resettable(board_id) ||
 489                 ctlr_is_soft_resettable(board_id);
 490 }
 491
 492 static ssize_t host_show_resettable(struct device *dev,
 493         struct device_attribute *attr, char *buf)
 494 {
 495         struct ctlr_info *h;
 496         struct Scsi_Host *shost = class_to_shost(dev);
 497
 498         h = shost_to_hba(shost);
 499         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 500 }
 501
 502 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 503 {
 504         return (scsi3addr[3] & 0xC0) == 0x40;
 505 }
 506
 507 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
 508         "1(ADM)", "UNKNOWN"
 509 };
 510 #define HPSA_RAID_0     0
 511 #define HPSA_RAID_4     1
 512 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 513 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 514 #define HPSA_RAID_51    4
 515 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 516 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 517 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 518
 519 static ssize_t raid_level_show(struct device *dev,
 520              struct device_attribute *attr, char *buf)
 521 {
 522         ssize_t l = 0;
 523         unsigned char rlevel;
 524         struct ctlr_info *h;
 525         struct scsi_device *sdev;
 526         struct hpsa_scsi_dev_t *hdev;
 527         unsigned long flags;
 528
 529         sdev = to_scsi_device(dev);
 530         h = sdev_to_hba(sdev);
 531         spin_lock_irqsave(&h->lock, flags);
 532         hdev = sdev->hostdata;
 533         if (!hdev) {
 534                 spin_unlock_irqrestore(&h->lock, flags);
 535                 return -ENODEV;
 536         }
 537
 538         /* Is this even a logical drive? */
 539         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 540                 spin_unlock_irqrestore(&h->lock, flags);
 541                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 542                 return l;
 543         }
 544
 545         rlevel = hdev->raid_level;
 546         spin_unlock_irqrestore(&h->lock, flags);
 547         if (rlevel > RAID_UNKNOWN)
 548                 rlevel = RAID_UNKNOWN;
 549         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 550         return l;
 551 }
 552
 553 static ssize_t lunid_show(struct device *dev,
 554              struct device_attribute *attr, char *buf)
 555 {
 556         struct ctlr_info *h;
 557         struct scsi_device *sdev;
 558         struct hpsa_scsi_dev_t *hdev;
 559         unsigned long flags;
 560         unsigned char lunid[8];
 561
 562         sdev = to_scsi_device(dev);
 563         h = sdev_to_hba(sdev);
 564         spin_lock_irqsave(&h->lock, flags);
 565         hdev = sdev->hostdata;
 566         if (!hdev) {
 567                 spin_unlock_irqrestore(&h->lock, flags);
 568                 return -ENODEV;
 569         }
 570         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 571         spin_unlock_irqrestore(&h->lock, flags);
 572         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 573                 lunid[0], lunid[1], lunid[2], lunid[3],
 574                 lunid[4], lunid[5], lunid[6], lunid[7]);
 575 }
 576
 577 static ssize_t unique_id_show(struct device *dev,
 578              struct device_attribute *attr, char *buf)
 579 {
 580         struct ctlr_info *h;
 581         struct scsi_device *sdev;
 582         struct hpsa_scsi_dev_t *hdev;
 583         unsigned long flags;
 584         unsigned char sn[16];
 585
 586         sdev = to_scsi_device(dev);
 587         h = sdev_to_hba(sdev);
 588         spin_lock_irqsave(&h->lock, flags);
 589         hdev = sdev->hostdata;
 590         if (!hdev) {
 591                 spin_unlock_irqrestore(&h->lock, flags);
 592                 return -ENODEV;
 593         }
 594         memcpy(sn, hdev->device_id, sizeof(sn));
 595         spin_unlock_irqrestore(&h->lock, flags);
 596         return snprintf(buf, 16 * 2 + 2,
 597                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 598                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 599                         sn[0], sn[1], sn[2], sn[3],
 600                         sn[4], sn[5], sn[6], sn[7],
 601                         sn[8], sn[9], sn[10], sn[11],
 602                         sn[12], sn[13], sn[14], sn[15]);
 603 }
 604
 605 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 606              struct device_attribute *attr, char *buf)
 607 {
 608         struct ctlr_info *h;
 609         struct scsi_device *sdev;
 610         struct hpsa_scsi_dev_t *hdev;
 611         unsigned long flags;
 612         int offload_enabled;
 613
 614         sdev = to_scsi_device(dev);
 615         h = sdev_to_hba(sdev);
 616         spin_lock_irqsave(&h->lock, flags);
 617         hdev = sdev->hostdata;
 618         if (!hdev) {
 619                 spin_unlock_irqrestore(&h->lock, flags);
 620                 return -ENODEV;
 621         }
 622         offload_enabled = hdev->offload_enabled;
 623         spin_unlock_irqrestore(&h->lock, flags);
 624         return snprintf(buf, 20, "%d\n", offload_enabled);
 625 }
 626
 627 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 628 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 629 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 630 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 631 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 632                         host_show_hp_ssd_smart_path_enabled, NULL);
 633 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 634                 host_show_hp_ssd_smart_path_status,
 635                 host_store_hp_ssd_smart_path_status);
 636 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 637                         host_store_raid_offload_debug);
 638 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 639         host_show_firmware_revision, NULL);
 640 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 641         host_show_commands_outstanding, NULL);
 642 static DEVICE_ATTR(transport_mode, S_IRUGO,
 643         host_show_transport_mode, NULL);
 644 static DEVICE_ATTR(resettable, S_IRUGO,
 645         host_show_resettable, NULL);
 646
 647 static struct device_attribute *hpsa_sdev_attrs[] = {
 648         &dev_attr_raid_level,
 649         &dev_attr_lunid,
 650         &dev_attr_unique_id,
 651         &dev_attr_hp_ssd_smart_path_enabled,
 652         NULL,
 653 };
 654
 655 static struct device_attribute *hpsa_shost_attrs[] = {
 656         &dev_attr_rescan,
 657         &dev_attr_firmware_revision,
 658         &dev_attr_commands_outstanding,
 659         &dev_attr_transport_mode,
 660         &dev_attr_resettable,
 661         &dev_attr_hp_ssd_smart_path_status,
 662         &dev_attr_raid_offload_debug,
 663         NULL,
 664 };
 665
 666 static struct scsi_host_template hpsa_driver_template = {
 667         .module                 = THIS_MODULE,
 668         .name                   = HPSA,
 669         .proc_name              = HPSA,
 670         .queuecommand           = hpsa_scsi_queue_command,
 671         .scan_start             = hpsa_scan_start,
 672         .scan_finished          = hpsa_scan_finished,
 673         .change_queue_depth     = hpsa_change_queue_depth,
 674         .this_id                = -1,
 675         .use_clustering         = ENABLE_CLUSTERING,
 676         .eh_abort_handler       = hpsa_eh_abort_handler,
 677         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 678         .ioctl                  = hpsa_ioctl,
 679         .slave_alloc            = hpsa_slave_alloc,
 680         .slave_destroy          = hpsa_slave_destroy,
 681 #ifdef CONFIG_COMPAT
 682         .compat_ioctl           = hpsa_compat_ioctl,
 683 #endif
 684         .sdev_attrs = hpsa_sdev_attrs,
 685         .shost_attrs = hpsa_shost_attrs,
 686         .max_sectors = 8192,
 687         .no_write_same = 1,
 688 };
 689
 690
 691 /* Enqueuing and dequeuing functions for cmdlists. */
 692 static inline void addQ(struct list_head *list, struct CommandList *c)
 693 {
 694         list_add_tail(&c->list, list);
 695 }
 696
 697 static inline u32 next_command(struct ctlr_info *h, u8 q)
 698 {
 699         u32 a;
 700         struct reply_queue_buffer *rq = &h->reply_queue[q];
 701         unsigned long flags;
 702
 703         if (h->transMethod & CFGTBL_Trans_io_accel1)
 704                 return h->access.command_completed(h, q);
 705
 706         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 707                 return h->access.command_completed(h, q);
 708
 709         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 710                 a = rq->head[rq->current_entry];
 711                 rq->current_entry++;
 712                 spin_lock_irqsave(&h->lock, flags);
 713                 h->commands_outstanding--;
 714                 spin_unlock_irqrestore(&h->lock, flags);
 715         } else {
 716                 a = FIFO_EMPTY;
 717         }
 718         /* Check for wraparound */
 719         if (rq->current_entry == h->max_commands) {
 720                 rq->current_entry = 0;
 721                 rq->wraparound ^= 1;
 722         }
 723         return a;
 724 }
 725
 726 /*
 727  * There are some special bits in the bus address of the
 728  * command that we have to set for the controller to know
 729  * how to process the command:
 730  *
 731  * Normal performant mode:
 732  * bit 0: 1 means performant mode, 0 means simple mode.
 733  * bits 1-3 = block fetch table entry
 734  * bits 4-6 = command type (== 0)
 735  *
 736  * ioaccel1 mode:
 737  * bit 0 = "performant mode" bit.
 738  * bits 1-3 = block fetch table entry
 739  * bits 4-6 = command type (== 110)
 740  * (command type is needed because ioaccel1 mode
 741  * commands are submitted through the same register as normal
 742  * mode commands, so this is how the controller knows whether
 743  * the command is normal mode or ioaccel1 mode.)
 744  *
 745  * ioaccel2 mode:
 746  * bit 0 = "performant mode" bit.
 747  * bits 1-4 = block fetch table entry (note extra bit)
 748  * bits 4-6 = not needed, because ioaccel2 mode has
 749  * a separate special register for submitting commands.
 750  */
 751
 752 /* set_performant_mode: Modify the tag for cciss performant
 753  * set bit 0 for pull model, bits 3-1 for block fetch
 754  * register number
 755  */
 756 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
 757 {
 758         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 759                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 760                 if (likely(h->msix_vector > 0))
 761                         c->Header.ReplyQueue =
 762                                 raw_smp_processor_id() % h->nreply_queues;
 763         }
 764 }
 765
 766 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 767                                                 struct CommandList *c)
 768 {
 769         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 770
 771         /* Tell the controller to post the reply to the queue for this
 772          * processor.  This seems to give the best I/O throughput.
 773          */
 774         cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 775         /* Set the bits in the address sent down to include:
 776          *  - performant mode bit (bit 0)
 777          *  - pull count (bits 1-3)
 778          *  - command type (bits 4-6)
 779          */
 780         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 781                                         IOACCEL1_BUSADDR_CMDTYPE;
 782 }
 783
 784 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
 785                                                 struct CommandList *c)
 786 {
 787         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
 788
 789         /* Tell the controller to post the reply to the queue for this
 790          * processor.  This seems to give the best I/O throughput.
 791          */
 792         cp->reply_queue = smp_processor_id() % h->nreply_queues;
 793         /* Set the bits in the address sent down to include:
 794          *  - performant mode bit not used in ioaccel mode 2
 795          *  - pull count (bits 0-3)
 796          *  - command type isn't needed for ioaccel2
 797          */
 798         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
 799 }
 800
 801 static int is_firmware_flash_cmd(u8 *cdb)
 802 {
 803         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
 804 }
 805
 806 /*
 807  * During firmware flash, the heartbeat register may not update as frequently
 808  * as it should.  So we dial down lockup detection during firmware flash. and
 809  * dial it back up when firmware flash completes.
 810  */
 811 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
 812 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
 813 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
 814                 struct CommandList *c)
 815 {
 816         if (!is_firmware_flash_cmd(c->Request.CDB))
 817                 return;
 818         atomic_inc(&h->firmware_flash_in_progress);
 819         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
 820 }
 821
 822 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
 823                 struct CommandList *c)
 824 {
 825         if (is_firmware_flash_cmd(c->Request.CDB) &&
 826                 atomic_dec_and_test(&h->firmware_flash_in_progress))
 827                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
 828 }
 829
 830 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
 831         struct CommandList *c)
 832 {
 833         unsigned long flags;
 834
 835         switch (c->cmd_type) {
 836         case CMD_IOACCEL1:
 837                 set_ioaccel1_performant_mode(h, c);
 838                 break;
 839         case CMD_IOACCEL2:
 840                 set_ioaccel2_performant_mode(h, c);
 841                 break;
 842         default:
 843                 set_performant_mode(h, c);
 844         }
 845         dial_down_lockup_detection_during_fw_flash(h, c);
 846         spin_lock_irqsave(&h->lock, flags);
 847         addQ(&h->reqQ, c);
 848         h->Qdepth++;
 849         start_io(h, &flags);
 850         spin_unlock_irqrestore(&h->lock, flags);
 851 }
 852
 853 static inline void removeQ(struct CommandList *c)
 854 {
 855         if (WARN_ON(list_empty(&c->list)))
 856                 return;
 857         list_del_init(&c->list);
 858 }
 859
 860 static inline int is_hba_lunid(unsigned char scsi3addr[])
 861 {
 862         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
 863 }
 864
 865 static inline int is_scsi_rev_5(struct ctlr_info *h)
 866 {
 867         if (!h->hba_inquiry_data)
 868                 return 0;
 869         if ((h->hba_inquiry_data[2] & 0x07) == 5)
 870                 return 1;
 871         return 0;
 872 }
 873
 874 static int hpsa_find_target_lun(struct ctlr_info *h,
 875         unsigned char scsi3addr[], int bus, int *target, int *lun)
 876 {
 877         /* finds an unused bus, target, lun for a new physical device
 878          * assumes h->devlock is held
 879          */
 880         int i, found = 0;
 881         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
 882
 883         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
 884
 885         for (i = 0; i < h->ndevices; i++) {
 886                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
 887                         __set_bit(h->dev[i]->target, lun_taken);
 888         }
 889
 890         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
 891         if (i < HPSA_MAX_DEVICES) {
 892                 /* *bus = 1; */
 893                 *target = i;
 894                 *lun = 0;
 895                 found = 1;
 896         }
 897         return !found;
 898 }
 899
 900 /* Add an entry into h->dev[] array. */
 901 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
 902                 struct hpsa_scsi_dev_t *device,
 903                 struct hpsa_scsi_dev_t *added[], int *nadded)
 904 {
 905         /* assumes h->devlock is held */
 906         int n = h->ndevices;
 907         int i;
 908         unsigned char addr1[8], addr2[8];
 909         struct hpsa_scsi_dev_t *sd;
 910
 911         if (n >= HPSA_MAX_DEVICES) {
 912                 dev_err(&h->pdev->dev, "too many devices, some will be "
 913                         "inaccessible.\n");
 914                 return -1;
 915         }
 916
 917         /* physical devices do not have lun or target assigned until now. */
 918         if (device->lun != -1)
 919                 /* Logical device, lun is already assigned. */
 920                 goto lun_assigned;
 921
 922         /* If this device a non-zero lun of a multi-lun device
 923          * byte 4 of the 8-byte LUN addr will contain the logical
 924          * unit no, zero otherise.
 925          */
 926         if (device->scsi3addr[4] == 0) {
 927                 /* This is not a non-zero lun of a multi-lun device */
 928                 if (hpsa_find_target_lun(h, device->scsi3addr,
 929                         device->bus, &device->target, &device->lun) != 0)
 930                         return -1;
 931                 goto lun_assigned;
 932         }
 933
 934         /* This is a non-zero lun of a multi-lun device.
 935          * Search through our list and find the device which
 936          * has the same 8 byte LUN address, excepting byte 4.
 937          * Assign the same bus and target for this new LUN.
 938          * Use the logical unit number from the firmware.
 939          */
 940         memcpy(addr1, device->scsi3addr, 8);
 941         addr1[4] = 0;
 942         for (i = 0; i < n; i++) {
 943                 sd = h->dev[i];
 944                 memcpy(addr2, sd->scsi3addr, 8);
 945                 addr2[4] = 0;
 946                 /* differ only in byte 4? */
 947                 if (memcmp(addr1, addr2, 8) == 0) {
 948                         device->bus = sd->bus;
 949                         device->target = sd->target;
 950                         device->lun = device->scsi3addr[4];
 951                         break;
 952                 }
 953         }
 954         if (device->lun == -1) {
 955                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
 956                         " suspect firmware bug or unsupported hardware "
 957                         "configuration.\n");
 958                         return -1;
 959         }
 960
 961 lun_assigned:
 962
 963         h->dev[n] = device;
 964         h->ndevices++;
 965         added[*nadded] = device;
 966         (*nadded)++;
 967
 968         /* initially, (before registering with scsi layer) we don't
 969          * know our hostno and we don't want to print anything first
 970          * time anyway (the scsi layer's inquiries will show that info)
 971          */
 972         /* if (hostno != -1) */
 973                 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
 974                         scsi_device_type(device->devtype), hostno,
 975                         device->bus, device->target, device->lun);
 976         return 0;
 977 }
 978
 979 /* Update an entry in h->dev[] array. */
 980 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
 981         int entry, struct hpsa_scsi_dev_t *new_entry)
 982 {
 983         /* assumes h->devlock is held */
 984         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
 985
 986         /* Raid level changed. */
 987         h->dev[entry]->raid_level = new_entry->raid_level;
 988
 989         /* Raid offload parameters changed. */
 990         h->dev[entry]->offload_config = new_entry->offload_config;
 991         h->dev[entry]->offload_enabled = new_entry->offload_enabled;
 992         h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
 993         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
 994         h->dev[entry]->raid_map = new_entry->raid_map;
 995
 996         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
 997                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
 998                 new_entry->target, new_entry->lun);
 999 }
1000
1001 /* Replace an entry from h->dev[] array. */
1002 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
1003         int entry, struct hpsa_scsi_dev_t *new_entry,
1004         struct hpsa_scsi_dev_t *added[], int *nadded,
1005         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1006 {
1007         /* assumes h->devlock is held */
1008         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1009         removed[*nremoved] = h->dev[entry];
1010         (*nremoved)++;
1011
1012         /*
1013          * New physical devices won't have target/lun assigned yet
1014          * so we need to preserve the values in the slot we are replacing.
1015          */
1016         if (new_entry->target == -1) {
1017                 new_entry->target = h->dev[entry]->target;
1018                 new_entry->lun = h->dev[entry]->lun;
1019         }
1020
1021         h->dev[entry] = new_entry;
1022         added[*nadded] = new_entry;
1023         (*nadded)++;
1024         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
1025                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
1026                         new_entry->target, new_entry->lun);
1027 }
1028
1029 /* Remove an entry from h->dev[] array. */
1030 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1031         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1032 {
1033         /* assumes h->devlock is held */
1034         int i;
1035         struct hpsa_scsi_dev_t *sd;
1036
1037         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1038
1039         sd = h->dev[entry];
1040         removed[*nremoved] = h->dev[entry];
1041         (*nremoved)++;
1042
1043         for (i = entry; i < h->ndevices-1; i++)
1044                 h->dev[i] = h->dev[i+1];
1045         h->ndevices--;
1046         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
1047                 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
1048                 sd->lun);
1049 }
1050
1051 #define SCSI3ADDR_EQ(a, b) ( \
1052         (a)[7] == (b)[7] && \
1053         (a)[6] == (b)[6] && \
1054         (a)[5] == (b)[5] && \
1055         (a)[4] == (b)[4] && \
1056         (a)[3] == (b)[3] && \
1057         (a)[2] == (b)[2] && \
1058         (a)[1] == (b)[1] && \
1059         (a)[0] == (b)[0])
1060
1061 static void fixup_botched_add(struct ctlr_info *h,
1062         struct hpsa_scsi_dev_t *added)
1063 {
1064         /* called when scsi_add_device fails in order to re-adjust
1065          * h->dev[] to match the mid layer's view.
1066          */
1067         unsigned long flags;
1068         int i, j;
1069
1070         spin_lock_irqsave(&h->lock, flags);
1071         for (i = 0; i < h->ndevices; i++) {
1072                 if (h->dev[i] == added) {
1073                         for (j = i; j < h->ndevices-1; j++)
1074                                 h->dev[j] = h->dev[j+1];
1075                         h->ndevices--;
1076                         break;
1077                 }
1078         }
1079         spin_unlock_irqrestore(&h->lock, flags);
1080         kfree(added);
1081 }
1082
1083 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1084         struct hpsa_scsi_dev_t *dev2)
1085 {
1086         /* we compare everything except lun and target as these
1087          * are not yet assigned.  Compare parts likely
1088          * to differ first
1089          */
1090         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1091                 sizeof(dev1->scsi3addr)) != 0)
1092                 return 0;
1093         if (memcmp(dev1->device_id, dev2->device_id,
1094                 sizeof(dev1->device_id)) != 0)
1095                 return 0;
1096         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1097                 return 0;
1098         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1099                 return 0;
1100         if (dev1->devtype != dev2->devtype)
1101                 return 0;
1102         if (dev1->bus != dev2->bus)
1103                 return 0;
1104         return 1;
1105 }
1106
1107 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1108         struct hpsa_scsi_dev_t *dev2)
1109 {
1110         /* Device attributes that can change, but don't mean
1111          * that the device is a different device, nor that the OS
1112          * needs to be told anything about the change.
1113          */
1114         if (dev1->raid_level != dev2->raid_level)
1115                 return 1;
1116         if (dev1->offload_config != dev2->offload_config)
1117                 return 1;
1118         if (dev1->offload_enabled != dev2->offload_enabled)
1119                 return 1;
1120         return 0;
1121 }
1122
1123 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1124  * and return needle location in *index.  If scsi3addr matches, but not
1125  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1126  * location in *index.
1127  * In the case of a minor device attribute change, such as RAID level, just
1128  * return DEVICE_UPDATED, along with the updated device's location in index.
1129  * If needle not found, return DEVICE_NOT_FOUND.
1130  */
1131 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1132         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1133         int *index)
1134 {
1135         int i;
1136 #define DEVICE_NOT_FOUND 0
1137 #define DEVICE_CHANGED 1
1138 #define DEVICE_SAME 2
1139 #define DEVICE_UPDATED 3
1140         for (i = 0; i < haystack_size; i++) {
1141                 if (haystack[i] == NULL) /* previously removed. */
1142                         continue;
1143                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1144                         *index = i;
1145                         if (device_is_the_same(needle, haystack[i])) {
1146                                 if (device_updated(needle, haystack[i]))
1147                                         return DEVICE_UPDATED;
1148                                 return DEVICE_SAME;
1149                         } else {
1150                                 /* Keep offline devices offline */
1151                                 if (needle->volume_offline)
1152                                         return DEVICE_NOT_FOUND;
1153                                 return DEVICE_CHANGED;
1154                         }
1155                 }
1156         }
1157         *index = -1;
1158         return DEVICE_NOT_FOUND;
1159 }
1160
1161 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1162                                         unsigned char scsi3addr[])
1163 {
1164         struct offline_device_entry *device;
1165         unsigned long flags;
1166
1167         /* Check to see if device is already on the list */
1168         spin_lock_irqsave(&h->offline_device_lock, flags);
1169         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1170                 if (memcmp(device->scsi3addr, scsi3addr,
1171                         sizeof(device->scsi3addr)) == 0) {
1172                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1173                         return;
1174                 }
1175         }
1176         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1177
1178         /* Device is not on the list, add it. */
1179         device = kmalloc(sizeof(*device), GFP_KERNEL);
1180         if (!device) {
1181                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1182                 return;
1183         }
1184         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1185         spin_lock_irqsave(&h->offline_device_lock, flags);
1186         list_add_tail(&device->offline_list, &h->offline_device_list);
1187         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1188 }
1189
1190 /* Print a message explaining various offline volume states */
1191 static void hpsa_show_volume_status(struct ctlr_info *h,
1192         struct hpsa_scsi_dev_t *sd)
1193 {
1194         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1195                 dev_info(&h->pdev->dev,
1196                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1197                         h->scsi_host->host_no,
1198                         sd->bus, sd->target, sd->lun);
1199         switch (sd->volume_offline) {
1200         case HPSA_LV_OK:
1201                 break;
1202         case HPSA_LV_UNDERGOING_ERASE:
1203                 dev_info(&h->pdev->dev,
1204                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1205                         h->scsi_host->host_no,
1206                         sd->bus, sd->target, sd->lun);
1207                 break;
1208         case HPSA_LV_UNDERGOING_RPI:
1209                 dev_info(&h->pdev->dev,
1210                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1211                         h->scsi_host->host_no,
1212                         sd->bus, sd->target, sd->lun);
1213                 break;
1214         case HPSA_LV_PENDING_RPI:
1215                 dev_info(&h->pdev->dev,
1216                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1217                                 h->scsi_host->host_no,
1218                                 sd->bus, sd->target, sd->lun);
1219                 break;
1220         case HPSA_LV_ENCRYPTED_NO_KEY:
1221                 dev_info(&h->pdev->dev,
1222                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1223                         h->scsi_host->host_no,
1224                         sd->bus, sd->target, sd->lun);
1225                 break;
1226         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1227                 dev_info(&h->pdev->dev,
1228                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1229                         h->scsi_host->host_no,
1230                         sd->bus, sd->target, sd->lun);
1231                 break;
1232         case HPSA_LV_UNDERGOING_ENCRYPTION:
1233                 dev_info(&h->pdev->dev,
1234                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1235                         h->scsi_host->host_no,
1236                         sd->bus, sd->target, sd->lun);
1237                 break;
1238         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1239                 dev_info(&h->pdev->dev,
1240                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1241                         h->scsi_host->host_no,
1242                         sd->bus, sd->target, sd->lun);
1243                 break;
1244         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1245                 dev_info(&h->pdev->dev,
1246                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1247                         h->scsi_host->host_no,
1248                         sd->bus, sd->target, sd->lun);
1249                 break;
1250         case HPSA_LV_PENDING_ENCRYPTION:
1251                 dev_info(&h->pdev->dev,
1252                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1253                         h->scsi_host->host_no,
1254                         sd->bus, sd->target, sd->lun);
1255                 break;
1256         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1257                 dev_info(&h->pdev->dev,
1258                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1259                         h->scsi_host->host_no,
1260                         sd->bus, sd->target, sd->lun);
1261                 break;
1262         }
1263 }
1264
1265 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1266         struct hpsa_scsi_dev_t *sd[], int nsds)
1267 {
1268         /* sd contains scsi3 addresses and devtypes, and inquiry
1269          * data.  This function takes what's in sd to be the current
1270          * reality and updates h->dev[] to reflect that reality.
1271          */
1272         int i, entry, device_change, changes = 0;
1273         struct hpsa_scsi_dev_t *csd;
1274         unsigned long flags;
1275         struct hpsa_scsi_dev_t **added, **removed;
1276         int nadded, nremoved;
1277         struct Scsi_Host *sh = NULL;
1278
1279         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1280         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1281
1282         if (!added || !removed) {
1283                 dev_warn(&h->pdev->dev, "out of memory in "
1284                         "adjust_hpsa_scsi_table\n");
1285                 goto free_and_out;
1286         }
1287
1288         spin_lock_irqsave(&h->devlock, flags);
1289
1290         /* find any devices in h->dev[] that are not in
1291          * sd[] and remove them from h->dev[], and for any
1292          * devices which have changed, remove the old device
1293          * info and add the new device info.
1294          * If minor device attributes change, just update
1295          * the existing device structure.
1296          */
1297         i = 0;
1298         nremoved = 0;
1299         nadded = 0;
1300         while (i < h->ndevices) {
1301                 csd = h->dev[i];
1302                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1303                 if (device_change == DEVICE_NOT_FOUND) {
1304                         changes++;
1305                         hpsa_scsi_remove_entry(h, hostno, i,
1306                                 removed, &nremoved);
1307                         continue; /* remove ^^^, hence i not incremented */
1308                 } else if (device_change == DEVICE_CHANGED) {
1309                         changes++;
1310                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1311                                 added, &nadded, removed, &nremoved);
1312                         /* Set it to NULL to prevent it from being freed
1313                          * at the bottom of hpsa_update_scsi_devices()
1314                          */
1315                         sd[entry] = NULL;
1316                 } else if (device_change == DEVICE_UPDATED) {
1317                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1318                 }
1319                 i++;
1320         }
1321
1322         /* Now, make sure every device listed in sd[] is also
1323          * listed in h->dev[], adding them if they aren't found
1324          */
1325
1326         for (i = 0; i < nsds; i++) {
1327                 if (!sd[i]) /* if already added above. */
1328                         continue;
1329
1330                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1331                  * as the SCSI mid-layer does not handle such devices well.
1332                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1333                  * at 160Hz, and prevents the system from coming up.
1334                  */
1335                 if (sd[i]->volume_offline) {
1336                         hpsa_show_volume_status(h, sd[i]);
1337                         dev_info(&h->pdev->dev, "c%db%dt%dl%d: temporarily offline\n",
1338                                 h->scsi_host->host_no,
1339                                 sd[i]->bus, sd[i]->target, sd[i]->lun);
1340                         continue;
1341                 }
1342
1343                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1344                                         h->ndevices, &entry);
1345                 if (device_change == DEVICE_NOT_FOUND) {
1346                         changes++;
1347                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1348                                 added, &nadded) != 0)
1349                                 break;
1350                         sd[i] = NULL; /* prevent from being freed later. */
1351                 } else if (device_change == DEVICE_CHANGED) {
1352                         /* should never happen... */
1353                         changes++;
1354                         dev_warn(&h->pdev->dev,
1355                                 "device unexpectedly changed.\n");
1356                         /* but if it does happen, we just ignore that device */
1357                 }
1358         }
1359         spin_unlock_irqrestore(&h->devlock, flags);
1360
1361         /* Monitor devices which are in one of several NOT READY states to be
1362          * brought online later. This must be done without holding h->devlock,
1363          * so don't touch h->dev[]
1364          */
1365         for (i = 0; i < nsds; i++) {
1366                 if (!sd[i]) /* if already added above. */
1367                         continue;
1368                 if (sd[i]->volume_offline)
1369                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1370         }
1371
1372         /* Don't notify scsi mid layer of any changes the first time through
1373          * (or if there are no changes) scsi_scan_host will do it later the
1374          * first time through.
1375          */
1376         if (hostno == -1 || !changes)
1377                 goto free_and_out;
1378
1379         sh = h->scsi_host;
1380         /* Notify scsi mid layer of any removed devices */
1381         for (i = 0; i < nremoved; i++) {
1382                 struct scsi_device *sdev =
1383                         scsi_device_lookup(sh, removed[i]->bus,
1384                                 removed[i]->target, removed[i]->lun);
1385                 if (sdev != NULL) {
1386                         scsi_remove_device(sdev);
1387                         scsi_device_put(sdev);
1388                 } else {
1389                         /* We don't expect to get here.
1390                          * future cmds to this device will get selection
1391                          * timeout as if the device was gone.
1392                          */
1393                         dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1394                                 " for removal.", hostno, removed[i]->bus,
1395                                 removed[i]->target, removed[i]->lun);
1396                 }
1397                 kfree(removed[i]);
1398                 removed[i] = NULL;
1399         }
1400
1401         /* Notify scsi mid layer of any added devices */
1402         for (i = 0; i < nadded; i++) {
1403                 if (scsi_add_device(sh, added[i]->bus,
1404                         added[i]->target, added[i]->lun) == 0)
1405                         continue;
1406                 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1407                         "device not added.\n", hostno, added[i]->bus,
1408                         added[i]->target, added[i]->lun);
1409                 /* now we have to remove it from h->dev,
1410                  * since it didn't get added to scsi mid layer
1411                  */
1412                 fixup_botched_add(h, added[i]);
1413         }
1414
1415 free_and_out:
1416         kfree(added);
1417         kfree(removed);
1418 }
1419
1420 /*
1421  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1422  * Assume's h->devlock is held.
1423  */
1424 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1425         int bus, int target, int lun)
1426 {
1427         int i;
1428         struct hpsa_scsi_dev_t *sd;
1429
1430         for (i = 0; i < h->ndevices; i++) {
1431                 sd = h->dev[i];
1432                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1433                         return sd;
1434         }
1435         return NULL;
1436 }
1437
1438 /* link sdev->hostdata to our per-device structure. */
1439 static int hpsa_slave_alloc(struct scsi_device *sdev)
1440 {
1441         struct hpsa_scsi_dev_t *sd;
1442         unsigned long flags;
1443         struct ctlr_info *h;
1444
1445         h = sdev_to_hba(sdev);
1446         spin_lock_irqsave(&h->devlock, flags);
1447         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1448                 sdev_id(sdev), sdev->lun);
1449         if (sd != NULL)
1450                 sdev->hostdata = sd;
1451         spin_unlock_irqrestore(&h->devlock, flags);
1452         return 0;
1453 }
1454
1455 static void hpsa_slave_destroy(struct scsi_device *sdev)
1456 {
1457         /* nothing to do. */
1458 }
1459
1460 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1461 {
1462         int i;
1463
1464         if (!h->cmd_sg_list)
1465                 return;
1466         for (i = 0; i < h->nr_cmds; i++) {
1467                 kfree(h->cmd_sg_list[i]);
1468                 h->cmd_sg_list[i] = NULL;
1469         }
1470         kfree(h->cmd_sg_list);
1471         h->cmd_sg_list = NULL;
1472 }
1473
1474 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1475 {
1476         int i;
1477
1478         if (h->chainsize <= 0)
1479                 return 0;
1480
1481         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1482                                 GFP_KERNEL);
1483         if (!h->cmd_sg_list)
1484                 return -ENOMEM;
1485         for (i = 0; i < h->nr_cmds; i++) {
1486                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1487                                                 h->chainsize, GFP_KERNEL);
1488                 if (!h->cmd_sg_list[i])
1489                         goto clean;
1490         }
1491         return 0;
1492
1493 clean:
1494         hpsa_free_sg_chain_blocks(h);
1495         return -ENOMEM;
1496 }
1497
1498 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1499         struct CommandList *c)
1500 {
1501         struct SGDescriptor *chain_sg, *chain_block;
1502         u64 temp64;
1503
1504         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1505         chain_block = h->cmd_sg_list[c->cmdindex];
1506         chain_sg->Ext = HPSA_SG_CHAIN;
1507         chain_sg->Len = sizeof(*chain_sg) *
1508                 (c->Header.SGTotal - h->max_cmd_sg_entries);
1509         temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1510                                 PCI_DMA_TODEVICE);
1511         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1512                 /* prevent subsequent unmapping */
1513                 chain_sg->Addr.lower = 0;
1514                 chain_sg->Addr.upper = 0;
1515                 return -1;
1516         }
1517         chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1518         chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1519         return 0;
1520 }
1521
1522 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1523         struct CommandList *c)
1524 {
1525         struct SGDescriptor *chain_sg;
1526         union u64bit temp64;
1527
1528         if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1529                 return;
1530
1531         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1532         temp64.val32.lower = chain_sg->Addr.lower;
1533         temp64.val32.upper = chain_sg->Addr.upper;
1534         pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1535 }
1536
1537
1538 /* Decode the various types of errors on ioaccel2 path.
1539  * Return 1 for any error that should generate a RAID path retry.
1540  * Return 0 for errors that don't require a RAID path retry.
1541  */
1542 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1543                                         struct CommandList *c,
1544                                         struct scsi_cmnd *cmd,
1545                                         struct io_accel2_cmd *c2)
1546 {
1547         int data_len;
1548         int retry = 0;
1549
1550         switch (c2->error_data.serv_response) {
1551         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1552                 switch (c2->error_data.status) {
1553                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1554                         break;
1555                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1556                         dev_warn(&h->pdev->dev,
1557                                 "%s: task complete with check condition.\n",
1558                                 "HP SSD Smart Path");
1559                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1560                         if (c2->error_data.data_present !=
1561                                         IOACCEL2_SENSE_DATA_PRESENT) {
1562                                 memset(cmd->sense_buffer, 0,
1563                                         SCSI_SENSE_BUFFERSIZE);
1564                                 break;
1565                         }
1566                         /* copy the sense data */
1567                         data_len = c2->error_data.sense_data_len;
1568                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1569                                 data_len = SCSI_SENSE_BUFFERSIZE;
1570                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1571                                 data_len =
1572                                         sizeof(c2->error_data.sense_data_buff);
1573                         memcpy(cmd->sense_buffer,
1574                                 c2->error_data.sense_data_buff, data_len);
1575                         retry = 1;
1576                         break;
1577                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1578                         dev_warn(&h->pdev->dev,
1579                                 "%s: task complete with BUSY status.\n",
1580                                 "HP SSD Smart Path");
1581                         retry = 1;
1582                         break;
1583                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1584                         dev_warn(&h->pdev->dev,
1585                                 "%s: task complete with reservation conflict.\n",
1586                                 "HP SSD Smart Path");
1587                         retry = 1;
1588                         break;
1589                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1590                         /* Make scsi midlayer do unlimited retries */
1591                         cmd->result = DID_IMM_RETRY << 16;
1592                         break;
1593                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1594                         dev_warn(&h->pdev->dev,
1595                                 "%s: task complete with aborted status.\n",
1596                                 "HP SSD Smart Path");
1597                         retry = 1;
1598                         break;
1599                 default:
1600                         dev_warn(&h->pdev->dev,
1601                                 "%s: task complete with unrecognized status: 0x%02x\n",
1602                                 "HP SSD Smart Path", c2->error_data.status);
1603                         retry = 1;
1604                         break;
1605                 }
1606                 break;
1607         case IOACCEL2_SERV_RESPONSE_FAILURE:
1608                 /* don't expect to get here. */
1609                 dev_warn(&h->pdev->dev,
1610                         "unexpected delivery or target failure, status = 0x%02x\n",
1611                         c2->error_data.status);
1612                 retry = 1;
1613                 break;
1614         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1615                 break;
1616         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1617                 break;
1618         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1619                 dev_warn(&h->pdev->dev, "task management function rejected.\n");
1620                 retry = 1;
1621                 break;
1622         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1623                 dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
1624                 break;
1625         default:
1626                 dev_warn(&h->pdev->dev,
1627                         "%s: Unrecognized server response: 0x%02x\n",
1628                         "HP SSD Smart Path",
1629                         c2->error_data.serv_response);
1630                 retry = 1;
1631                 break;
1632         }
1633
1634         return retry;   /* retry on raid path? */
1635 }
1636
1637 static void process_ioaccel2_completion(struct ctlr_info *h,
1638                 struct CommandList *c, struct scsi_cmnd *cmd,
1639                 struct hpsa_scsi_dev_t *dev)
1640 {
1641         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
1642         int raid_retry = 0;
1643
1644         /* check for good status */
1645         if (likely(c2->error_data.serv_response == 0 &&
1646                         c2->error_data.status == 0)) {
1647                 cmd_free(h, c);
1648                 cmd->scsi_done(cmd);
1649                 return;
1650         }
1651
1652         /* Any RAID offload error results in retry which will use
1653          * the normal I/O path so the controller can handle whatever's
1654          * wrong.
1655          */
1656         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
1657                 c2->error_data.serv_response ==
1658                         IOACCEL2_SERV_RESPONSE_FAILURE) {
1659                 dev->offload_enabled = 0;
1660                 h->drv_req_rescan = 1;  /* schedule controller for a rescan */
1661                 cmd->result = DID_SOFT_ERROR << 16;
1662                 cmd_free(h, c);
1663                 cmd->scsi_done(cmd);
1664                 return;
1665         }
1666         raid_retry = handle_ioaccel_mode2_error(h, c, cmd, c2);
1667         /* If error found, disable Smart Path, schedule a rescan,
1668          * and force a retry on the standard path.
1669          */
1670         if (raid_retry) {
1671                 dev_warn(&h->pdev->dev, "%s: Retrying on standard path.\n",
1672                         "HP SSD Smart Path");
1673                 dev->offload_enabled = 0; /* Disable Smart Path */
1674                 h->drv_req_rescan = 1;    /* schedule controller rescan */
1675                 cmd->result = DID_SOFT_ERROR << 16;
1676         }
1677         cmd_free(h, c);
1678         cmd->scsi_done(cmd);
1679 }
1680
1681 static void complete_scsi_command(struct CommandList *cp)
1682 {
1683         struct scsi_cmnd *cmd;
1684         struct ctlr_info *h;
1685         struct ErrorInfo *ei;
1686         struct hpsa_scsi_dev_t *dev;
1687
1688         unsigned char sense_key;
1689         unsigned char asc;      /* additional sense code */
1690         unsigned char ascq;     /* additional sense code qualifier */
1691         unsigned long sense_data_size;
1692
1693         ei = cp->err_info;
1694         cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1695         h = cp->h;
1696         dev = cmd->device->hostdata;
1697
1698         scsi_dma_unmap(cmd); /* undo the DMA mappings */
1699         if ((cp->cmd_type == CMD_SCSI) &&
1700                 (cp->Header.SGTotal > h->max_cmd_sg_entries))
1701                 hpsa_unmap_sg_chain_block(h, cp);
1702
1703         cmd->result = (DID_OK << 16);           /* host byte */
1704         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1705
1706         if (cp->cmd_type == CMD_IOACCEL2)
1707                 return process_ioaccel2_completion(h, cp, cmd, dev);
1708
1709         cmd->result |= ei->ScsiStatus;
1710
1711         scsi_set_resid(cmd, ei->ResidualCnt);
1712         if (ei->CommandStatus == 0) {
1713                 cmd_free(h, cp);
1714                 cmd->scsi_done(cmd);
1715                 return;
1716         }
1717
1718         /* copy the sense data */
1719         if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1720                 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1721         else
1722                 sense_data_size = sizeof(ei->SenseInfo);
1723         if (ei->SenseLen < sense_data_size)
1724                 sense_data_size = ei->SenseLen;
1725
1726         memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1727
1728         /* For I/O accelerator commands, copy over some fields to the normal
1729          * CISS header used below for error handling.
1730          */
1731         if (cp->cmd_type == CMD_IOACCEL1) {
1732                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
1733                 cp->Header.SGList = cp->Header.SGTotal = scsi_sg_count(cmd);
1734                 cp->Request.CDBLen = c->io_flags & IOACCEL1_IOFLAGS_CDBLEN_MASK;
1735                 cp->Header.Tag.lower = c->Tag.lower;
1736                 cp->Header.Tag.upper = c->Tag.upper;
1737                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
1738                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
1739
1740                 /* Any RAID offload error results in retry which will use
1741                  * the normal I/O path so the controller can handle whatever's
1742                  * wrong.
1743                  */
1744                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
1745                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
1746                                 dev->offload_enabled = 0;
1747                         cmd->result = DID_SOFT_ERROR << 16;
1748                         cmd_free(h, cp);
1749                         cmd->scsi_done(cmd);
1750                         return;
1751                 }
1752         }
1753
1754         /* an error has occurred */
1755         switch (ei->CommandStatus) {
1756
1757         case CMD_TARGET_STATUS:
1758                 if (ei->ScsiStatus) {
1759                         /* Get sense key */
1760                         sense_key = 0xf & ei->SenseInfo[2];
1761                         /* Get additional sense code */
1762                         asc = ei->SenseInfo[12];
1763                         /* Get addition sense code qualifier */
1764                         ascq = ei->SenseInfo[13];
1765                 }
1766
1767                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1768                         if (check_for_unit_attention(h, cp))
1769                                 break;
1770                         if (sense_key == ILLEGAL_REQUEST) {
1771                                 /*
1772                                  * SCSI REPORT_LUNS is commonly unsupported on
1773                                  * Smart Array.  Suppress noisy complaint.
1774                                  */
1775                                 if (cp->Request.CDB[0] == REPORT_LUNS)
1776                                         break;
1777
1778                                 /* If ASC/ASCQ indicate Logical Unit
1779                                  * Not Supported condition,
1780                                  */
1781                                 if ((asc == 0x25) && (ascq == 0x0)) {
1782                                         dev_warn(&h->pdev->dev, "cp %p "
1783                                                 "has check condition\n", cp);
1784                                         break;
1785                                 }
1786                         }
1787
1788                         if (sense_key == NOT_READY) {
1789                                 /* If Sense is Not Ready, Logical Unit
1790                                  * Not ready, Manual Intervention
1791                                  * required
1792                                  */
1793                                 if ((asc == 0x04) && (ascq == 0x03)) {
1794                                         dev_warn(&h->pdev->dev, "cp %p "
1795                                                 "has check condition: unit "
1796                                                 "not ready, manual "
1797                                                 "intervention required\n", cp);
1798                                         break;
1799                                 }
1800                         }
1801                         if (sense_key == ABORTED_COMMAND) {
1802                                 /* Aborted command is retryable */
1803                                 dev_warn(&h->pdev->dev, "cp %p "
1804                                         "has check condition: aborted command: "
1805                                         "ASC: 0x%x, ASCQ: 0x%x\n",
1806                                         cp, asc, ascq);
1807                                 cmd->result |= DID_SOFT_ERROR << 16;
1808                                 break;
1809                         }
1810                         /* Must be some other type of check condition */
1811                         dev_dbg(&h->pdev->dev, "cp %p has check condition: "
1812                                         "unknown type: "
1813                                         "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1814                                         "Returning result: 0x%x, "
1815                                         "cmd=[%02x %02x %02x %02x %02x "
1816                                         "%02x %02x %02x %02x %02x %02x "
1817                                         "%02x %02x %02x %02x %02x]\n",
1818                                         cp, sense_key, asc, ascq,
1819                                         cmd->result,
1820                                         cmd->cmnd[0], cmd->cmnd[1],
1821                                         cmd->cmnd[2], cmd->cmnd[3],
1822                                         cmd->cmnd[4], cmd->cmnd[5],
1823                                         cmd->cmnd[6], cmd->cmnd[7],
1824                                         cmd->cmnd[8], cmd->cmnd[9],
1825                                         cmd->cmnd[10], cmd->cmnd[11],
1826                                         cmd->cmnd[12], cmd->cmnd[13],
1827                                         cmd->cmnd[14], cmd->cmnd[15]);
1828                         break;
1829                 }
1830
1831
1832                 /* Problem was not a check condition
1833                  * Pass it up to the upper layers...
1834                  */
1835                 if (ei->ScsiStatus) {
1836                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1837                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1838                                 "Returning result: 0x%x\n",
1839                                 cp, ei->ScsiStatus,
1840                                 sense_key, asc, ascq,
1841                                 cmd->result);
1842                 } else {  /* scsi status is zero??? How??? */
1843                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1844                                 "Returning no connection.\n", cp),
1845
1846                         /* Ordinarily, this case should never happen,
1847                          * but there is a bug in some released firmware
1848                          * revisions that allows it to happen if, for
1849                          * example, a 4100 backplane loses power and
1850                          * the tape drive is in it.  We assume that
1851                          * it's a fatal error of some kind because we
1852                          * can't show that it wasn't. We will make it
1853                          * look like selection timeout since that is
1854                          * the most common reason for this to occur,
1855                          * and it's severe enough.
1856                          */
1857
1858                         cmd->result = DID_NO_CONNECT << 16;
1859                 }
1860                 break;
1861
1862         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1863                 break;
1864         case CMD_DATA_OVERRUN:
1865                 dev_warn(&h->pdev->dev, "cp %p has"
1866                         " completed with data overrun "
1867                         "reported\n", cp);
1868                 break;
1869         case CMD_INVALID: {
1870                 /* print_bytes(cp, sizeof(*cp), 1, 0);
1871                 print_cmd(cp); */
1872                 /* We get CMD_INVALID if you address a non-existent device
1873                  * instead of a selection timeout (no response).  You will
1874                  * see this if you yank out a drive, then try to access it.
1875                  * This is kind of a shame because it means that any other
1876                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
1877                  * missing target. */
1878                 cmd->result = DID_NO_CONNECT << 16;
1879         }
1880                 break;
1881         case CMD_PROTOCOL_ERR:
1882                 cmd->result = DID_ERROR << 16;
1883                 dev_warn(&h->pdev->dev, "cp %p has "
1884                         "protocol error\n", cp);
1885                 break;
1886         case CMD_HARDWARE_ERR:
1887                 cmd->result = DID_ERROR << 16;
1888                 dev_warn(&h->pdev->dev, "cp %p had  hardware error\n", cp);
1889                 break;
1890         case CMD_CONNECTION_LOST:
1891                 cmd->result = DID_ERROR << 16;
1892                 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1893                 break;
1894         case CMD_ABORTED:
1895                 cmd->result = DID_ABORT << 16;
1896                 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1897                                 cp, ei->ScsiStatus);
1898                 break;
1899         case CMD_ABORT_FAILED:
1900                 cmd->result = DID_ERROR << 16;
1901                 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1902                 break;
1903         case CMD_UNSOLICITED_ABORT:
1904                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1905                 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1906                         "abort\n", cp);
1907                 break;
1908         case CMD_TIMEOUT:
1909                 cmd->result = DID_TIME_OUT << 16;
1910                 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1911                 break;
1912         case CMD_UNABORTABLE:
1913                 cmd->result = DID_ERROR << 16;
1914                 dev_warn(&h->pdev->dev, "Command unabortable\n");
1915                 break;
1916         case CMD_IOACCEL_DISABLED:
1917                 /* This only handles the direct pass-through case since RAID
1918                  * offload is handled above.  Just attempt a retry.
1919                  */
1920                 cmd->result = DID_SOFT_ERROR << 16;
1921                 dev_warn(&h->pdev->dev,
1922                                 "cp %p had HP SSD Smart Path error\n", cp);
1923                 break;
1924         default:
1925                 cmd->result = DID_ERROR << 16;
1926                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1927                                 cp, ei->CommandStatus);
1928         }
1929         cmd_free(h, cp);
1930         cmd->scsi_done(cmd);
1931 }
1932
1933 static void hpsa_pci_unmap(struct pci_dev *pdev,
1934         struct CommandList *c, int sg_used, int data_direction)
1935 {
1936         int i;
1937         union u64bit addr64;
1938
1939         for (i = 0; i < sg_used; i++) {
1940                 addr64.val32.lower = c->SG[i].Addr.lower;
1941                 addr64.val32.upper = c->SG[i].Addr.upper;
1942                 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1943                         data_direction);
1944         }
1945 }
1946
1947 static int hpsa_map_one(struct pci_dev *pdev,
1948                 struct CommandList *cp,
1949                 unsigned char *buf,
1950                 size_t buflen,
1951                 int data_direction)
1952 {
1953         u64 addr64;
1954
1955         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1956                 cp->Header.SGList = 0;
1957                 cp->Header.SGTotal = 0;
1958                 return 0;
1959         }
1960
1961         addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1962         if (dma_mapping_error(&pdev->dev, addr64)) {
1963                 /* Prevent subsequent unmap of something never mapped */
1964                 cp->Header.SGList = 0;
1965                 cp->Header.SGTotal = 0;
1966                 return -1;
1967         }
1968         cp->SG[0].Addr.lower =
1969           (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1970         cp->SG[0].Addr.upper =
1971           (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1972         cp->SG[0].Len = buflen;
1973         cp->SG[0].Ext = HPSA_SG_LAST; /* we are not chaining */
1974         cp->Header.SGList = (u8) 1;   /* no. SGs contig in this cmd */
1975         cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1976         return 0;
1977 }
1978
1979 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1980         struct CommandList *c)
1981 {
1982         DECLARE_COMPLETION_ONSTACK(wait);
1983
1984         c->waiting = &wait;
1985         enqueue_cmd_and_start_io(h, c);
1986         wait_for_completion(&wait);
1987 }
1988
1989 static u32 lockup_detected(struct ctlr_info *h)
1990 {
1991         int cpu;
1992         u32 rc, *lockup_detected;
1993
1994         cpu = get_cpu();
1995         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
1996         rc = *lockup_detected;
1997         put_cpu();
1998         return rc;
1999 }
2000
2001 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
2002         struct CommandList *c)
2003 {
2004         /* If controller lockup detected, fake a hardware error. */
2005         if (unlikely(lockup_detected(h)))
2006                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
2007         else
2008                 hpsa_scsi_do_simple_cmd_core(h, c);
2009 }
2010
2011 #define MAX_DRIVER_CMD_RETRIES 25
2012 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2013         struct CommandList *c, int data_direction)
2014 {
2015         int backoff_time = 10, retry_count = 0;
2016
2017         do {
2018                 memset(c->err_info, 0, sizeof(*c->err_info));
2019                 hpsa_scsi_do_simple_cmd_core(h, c);
2020                 retry_count++;
2021                 if (retry_count > 3) {
2022                         msleep(backoff_time);
2023                         if (backoff_time < 1000)
2024                                 backoff_time *= 2;
2025                 }
2026         } while ((check_for_unit_attention(h, c) ||
2027                         check_for_busy(h, c)) &&
2028                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2029         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2030 }
2031
2032 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2033                                 struct CommandList *c)
2034 {
2035         const u8 *cdb = c->Request.CDB;
2036         const u8 *lun = c->Header.LUN.LunAddrBytes;
2037
2038         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2039         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2040                 txt, lun[0], lun[1], lun[2], lun[3],
2041                 lun[4], lun[5], lun[6], lun[7],
2042                 cdb[0], cdb[1], cdb[2], cdb[3],
2043                 cdb[4], cdb[5], cdb[6], cdb[7],
2044                 cdb[8], cdb[9], cdb[10], cdb[11],
2045                 cdb[12], cdb[13], cdb[14], cdb[15]);
2046 }
2047
2048 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2049                         struct CommandList *cp)
2050 {
2051         const struct ErrorInfo *ei = cp->err_info;
2052         struct device *d = &cp->h->pdev->dev;
2053         const u8 *sd = ei->SenseInfo;
2054
2055         switch (ei->CommandStatus) {
2056         case CMD_TARGET_STATUS:
2057                 hpsa_print_cmd(h, "SCSI status", cp);
2058                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2059                         dev_warn(d, "SCSI Status = 02, Sense key = %02x, ASC = %02x, ASCQ = %02x\n",
2060                                 sd[2] & 0x0f, sd[12], sd[13]);
2061                 else
2062                         dev_warn(d, "SCSI Status = %02x\n", ei->ScsiStatus);
2063                 if (ei->ScsiStatus == 0)
2064                         dev_warn(d, "SCSI status is abnormally zero.  "
2065                         "(probably indicates selection timeout "
2066                         "reported incorrectly due to a known "
2067                         "firmware bug, circa July, 2001.)\n");
2068                 break;
2069         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2070                 break;
2071         case CMD_DATA_OVERRUN:
2072                 hpsa_print_cmd(h, "overrun condition", cp);
2073                 break;
2074         case CMD_INVALID: {
2075                 /* controller unfortunately reports SCSI passthru's
2076                  * to non-existent targets as invalid commands.
2077                  */
2078                 hpsa_print_cmd(h, "invalid command", cp);
2079                 dev_warn(d, "probably means device no longer present\n");
2080                 }
2081                 break;
2082         case CMD_PROTOCOL_ERR:
2083                 hpsa_print_cmd(h, "protocol error", cp);
2084                 break;
2085         case CMD_HARDWARE_ERR:
2086                 hpsa_print_cmd(h, "hardware error", cp);
2087                 break;
2088         case CMD_CONNECTION_LOST:
2089                 hpsa_print_cmd(h, "connection lost", cp);
2090                 break;
2091         case CMD_ABORTED:
2092                 hpsa_print_cmd(h, "aborted", cp);
2093                 break;
2094         case CMD_ABORT_FAILED:
2095                 hpsa_print_cmd(h, "abort failed", cp);
2096                 break;
2097         case CMD_UNSOLICITED_ABORT:
2098                 hpsa_print_cmd(h, "unsolicited abort", cp);
2099                 break;
2100         case CMD_TIMEOUT:
2101                 hpsa_print_cmd(h, "timed out", cp);
2102                 break;
2103         case CMD_UNABORTABLE:
2104                 hpsa_print_cmd(h, "unabortable", cp);
2105                 break;
2106         default:
2107                 hpsa_print_cmd(h, "unknown status", cp);
2108                 dev_warn(d, "Unknown command status %x\n",
2109                                 ei->CommandStatus);
2110         }
2111 }
2112
2113 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2114                         u16 page, unsigned char *buf,
2115                         unsigned char bufsize)
2116 {
2117         int rc = IO_OK;
2118         struct CommandList *c;
2119         struct ErrorInfo *ei;
2120
2121         c = cmd_special_alloc(h);
2122
2123         if (c == NULL) {                        /* trouble... */
2124                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2125                 return -ENOMEM;
2126         }
2127
2128         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2129                         page, scsi3addr, TYPE_CMD)) {
2130                 rc = -1;
2131                 goto out;
2132         }
2133         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2134         ei = c->err_info;
2135         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2136                 hpsa_scsi_interpret_error(h, c);
2137                 rc = -1;
2138         }
2139 out:
2140         cmd_special_free(h, c);
2141         return rc;
2142 }
2143
2144 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2145                 unsigned char *scsi3addr, unsigned char page,
2146                 struct bmic_controller_parameters *buf, size_t bufsize)
2147 {
2148         int rc = IO_OK;
2149         struct CommandList *c;
2150         struct ErrorInfo *ei;
2151
2152         c = cmd_special_alloc(h);
2153
2154         if (c == NULL) {                        /* trouble... */
2155                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2156                 return -ENOMEM;
2157         }
2158
2159         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2160                         page, scsi3addr, TYPE_CMD)) {
2161                 rc = -1;
2162                 goto out;
2163         }
2164         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2165         ei = c->err_info;
2166         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2167                 hpsa_scsi_interpret_error(h, c);
2168                 rc = -1;
2169         }
2170 out:
2171         cmd_special_free(h, c);
2172         return rc;
2173         }
2174
2175 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2176         u8 reset_type)
2177 {
2178         int rc = IO_OK;
2179         struct CommandList *c;
2180         struct ErrorInfo *ei;
2181
2182         c = cmd_special_alloc(h);
2183
2184         if (c == NULL) {                        /* trouble... */
2185                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2186                 return -ENOMEM;
2187         }
2188
2189         /* fill_cmd can't fail here, no data buffer to map. */
2190         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2191                         scsi3addr, TYPE_MSG);
2192         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2193         hpsa_scsi_do_simple_cmd_core(h, c);
2194         /* no unmap needed here because no data xfer. */
2195
2196         ei = c->err_info;
2197         if (ei->CommandStatus != 0) {
2198                 hpsa_scsi_interpret_error(h, c);
2199                 rc = -1;
2200         }
2201         cmd_special_free(h, c);
2202         return rc;
2203 }
2204
2205 static void hpsa_get_raid_level(struct ctlr_info *h,
2206         unsigned char *scsi3addr, unsigned char *raid_level)
2207 {
2208         int rc;
2209         unsigned char *buf;
2210
2211         *raid_level = RAID_UNKNOWN;
2212         buf = kzalloc(64, GFP_KERNEL);
2213         if (!buf)
2214                 return;
2215         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2216         if (rc == 0)
2217                 *raid_level = buf[8];
2218         if (*raid_level > RAID_UNKNOWN)
2219                 *raid_level = RAID_UNKNOWN;
2220         kfree(buf);
2221         return;
2222 }
2223
2224 #define HPSA_MAP_DEBUG
2225 #ifdef HPSA_MAP_DEBUG
2226 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2227                                 struct raid_map_data *map_buff)
2228 {
2229         struct raid_map_disk_data *dd = &map_buff->data[0];
2230         int map, row, col;
2231         u16 map_cnt, row_cnt, disks_per_row;
2232
2233         if (rc != 0)
2234                 return;
2235
2236         /* Show details only if debugging has been activated. */
2237         if (h->raid_offload_debug < 2)
2238                 return;
2239
2240         dev_info(&h->pdev->dev, "structure_size = %u\n",
2241                                 le32_to_cpu(map_buff->structure_size));
2242         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2243                         le32_to_cpu(map_buff->volume_blk_size));
2244         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2245                         le64_to_cpu(map_buff->volume_blk_cnt));
2246         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2247                         map_buff->phys_blk_shift);
2248         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2249                         map_buff->parity_rotation_shift);
2250         dev_info(&h->pdev->dev, "strip_size = %u\n",
2251                         le16_to_cpu(map_buff->strip_size));
2252         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2253                         le64_to_cpu(map_buff->disk_starting_blk));
2254         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2255                         le64_to_cpu(map_buff->disk_blk_cnt));
2256         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2257                         le16_to_cpu(map_buff->data_disks_per_row));
2258         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2259                         le16_to_cpu(map_buff->metadata_disks_per_row));
2260         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2261                         le16_to_cpu(map_buff->row_cnt));
2262         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2263                         le16_to_cpu(map_buff->layout_map_count));
2264         dev_info(&h->pdev->dev, "flags = %u\n",
2265                         le16_to_cpu(map_buff->flags));
2266         if (map_buff->flags & RAID_MAP_FLAG_ENCRYPT_ON)
2267                 dev_info(&h->pdev->dev, "encrypytion = ON\n");
2268         else
2269                 dev_info(&h->pdev->dev, "encrypytion = OFF\n");
2270         dev_info(&h->pdev->dev, "dekindex = %u\n",
2271                         le16_to_cpu(map_buff->dekindex));
2272
2273         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2274         for (map = 0; map < map_cnt; map++) {
2275                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2276                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2277                 for (row = 0; row < row_cnt; row++) {
2278                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2279                         disks_per_row =
2280                                 le16_to_cpu(map_buff->data_disks_per_row);
2281                         for (col = 0; col < disks_per_row; col++, dd++)
2282                                 dev_info(&h->pdev->dev,
2283                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2284                                         col, dd->ioaccel_handle,
2285                                         dd->xor_mult[0], dd->xor_mult[1]);
2286                         disks_per_row =
2287                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2288                         for (col = 0; col < disks_per_row; col++, dd++)
2289                                 dev_info(&h->pdev->dev,
2290                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2291                                         col, dd->ioaccel_handle,
2292                                         dd->xor_mult[0], dd->xor_mult[1]);
2293                 }
2294         }
2295 }
2296 #else
2297 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2298                         __attribute__((unused)) int rc,
2299                         __attribute__((unused)) struct raid_map_data *map_buff)
2300 {
2301 }
2302 #endif
2303
2304 static int hpsa_get_raid_map(struct ctlr_info *h,
2305         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2306 {
2307         int rc = 0;
2308         struct CommandList *c;
2309         struct ErrorInfo *ei;
2310
2311         c = cmd_special_alloc(h);
2312         if (c == NULL) {
2313                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2314                 return -ENOMEM;
2315         }
2316         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2317                         sizeof(this_device->raid_map), 0,
2318                         scsi3addr, TYPE_CMD)) {
2319                 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2320                 cmd_special_free(h, c);
2321                 return -ENOMEM;
2322         }
2323         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2324         ei = c->err_info;
2325         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2326                 hpsa_scsi_interpret_error(h, c);
2327                 cmd_special_free(h, c);
2328                 return -1;
2329         }
2330         cmd_special_free(h, c);
2331
2332         /* @todo in the future, dynamically allocate RAID map memory */
2333         if (le32_to_cpu(this_device->raid_map.structure_size) >
2334                                 sizeof(this_device->raid_map)) {
2335                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2336                 rc = -1;
2337         }
2338         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2339         return rc;
2340 }
2341
2342 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2343         unsigned char scsi3addr[], u8 page)
2344 {
2345         int rc;
2346         int i;
2347         int pages;
2348         unsigned char *buf, bufsize;
2349
2350         buf = kzalloc(256, GFP_KERNEL);
2351         if (!buf)
2352                 return 0;
2353
2354         /* Get the size of the page list first */
2355         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2356                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2357                                 buf, HPSA_VPD_HEADER_SZ);
2358         if (rc != 0)
2359                 goto exit_unsupported;
2360         pages = buf[3];
2361         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2362                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2363         else
2364                 bufsize = 255;
2365
2366         /* Get the whole VPD page list */
2367         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2368                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2369                                 buf, bufsize);
2370         if (rc != 0)
2371                 goto exit_unsupported;
2372
2373         pages = buf[3];
2374         for (i = 1; i <= pages; i++)
2375                 if (buf[3 + i] == page)
2376                         goto exit_supported;
2377 exit_unsupported:
2378         kfree(buf);
2379         return 0;
2380 exit_supported:
2381         kfree(buf);
2382         return 1;
2383 }
2384
2385 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2386         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2387 {
2388         int rc;
2389         unsigned char *buf;
2390         u8 ioaccel_status;
2391
2392         this_device->offload_config = 0;
2393         this_device->offload_enabled = 0;
2394
2395         buf = kzalloc(64, GFP_KERNEL);
2396         if (!buf)
2397                 return;
2398         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2399                 goto out;
2400         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2401                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2402         if (rc != 0)
2403                 goto out;
2404
2405 #define IOACCEL_STATUS_BYTE 4
2406 #define OFFLOAD_CONFIGURED_BIT 0x01
2407 #define OFFLOAD_ENABLED_BIT 0x02
2408         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2409         this_device->offload_config =
2410                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2411         if (this_device->offload_config) {
2412                 this_device->offload_enabled =
2413                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2414                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2415                         this_device->offload_enabled = 0;
2416         }
2417 out:
2418         kfree(buf);
2419         return;
2420 }
2421
2422 /* Get the device id from inquiry page 0x83 */
2423 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2424         unsigned char *device_id, int buflen)
2425 {
2426         int rc;
2427         unsigned char *buf;
2428
2429         if (buflen > 16)
2430                 buflen = 16;
2431         buf = kzalloc(64, GFP_KERNEL);
2432         if (!buf)
2433                 return -ENOMEM;
2434         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2435         if (rc == 0)
2436                 memcpy(device_id, &buf[8], buflen);
2437         kfree(buf);
2438         return rc != 0;
2439 }
2440
2441 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2442                 struct ReportLUNdata *buf, int bufsize,
2443                 int extended_response)
2444 {
2445         int rc = IO_OK;
2446         struct CommandList *c;
2447         unsigned char scsi3addr[8];
2448         struct ErrorInfo *ei;
2449
2450         c = cmd_special_alloc(h);
2451         if (c == NULL) {                        /* trouble... */
2452                 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2453                 return -1;
2454         }
2455         /* address the controller */
2456         memset(scsi3addr, 0, sizeof(scsi3addr));
2457         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2458                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2459                 rc = -1;
2460                 goto out;
2461         }
2462         if (extended_response)
2463                 c->Request.CDB[1] = extended_response;
2464         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2465         ei = c->err_info;
2466         if (ei->CommandStatus != 0 &&
2467             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2468                 hpsa_scsi_interpret_error(h, c);
2469                 rc = -1;
2470         } else {
2471                 if (buf->extended_response_flag != extended_response) {
2472                         dev_err(&h->pdev->dev,
2473                                 "report luns requested format %u, got %u\n",
2474                                 extended_response,
2475                                 buf->extended_response_flag);
2476                         rc = -1;
2477                 }
2478         }
2479 out:
2480         cmd_special_free(h, c);
2481         return rc;
2482 }
2483
2484 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2485                 struct ReportLUNdata *buf,
2486                 int bufsize, int extended_response)
2487 {
2488         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
2489 }
2490
2491 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2492                 struct ReportLUNdata *buf, int bufsize)
2493 {
2494         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2495 }
2496
2497 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2498         int bus, int target, int lun)
2499 {
2500         device->bus = bus;
2501         device->target = target;
2502         device->lun = lun;
2503 }
2504
2505 /* Use VPD inquiry to get details of volume status */
2506 static int hpsa_get_volume_status(struct ctlr_info *h,
2507                                         unsigned char scsi3addr[])
2508 {
2509         int rc;
2510         int status;
2511         int size;
2512         unsigned char *buf;
2513
2514         buf = kzalloc(64, GFP_KERNEL);
2515         if (!buf)
2516                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2517
2518         /* Does controller have VPD for logical volume status? */
2519         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2520                 goto exit_failed;
2521
2522         /* Get the size of the VPD return buffer */
2523         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2524                                         buf, HPSA_VPD_HEADER_SZ);
2525         if (rc != 0)
2526                 goto exit_failed;
2527         size = buf[3];
2528
2529         /* Now get the whole VPD buffer */
2530         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2531                                         buf, size + HPSA_VPD_HEADER_SZ);
2532         if (rc != 0)
2533                 goto exit_failed;
2534         status = buf[4]; /* status byte */
2535
2536         kfree(buf);
2537         return status;
2538 exit_failed:
2539         kfree(buf);
2540         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2541 }
2542
2543 /* Determine offline status of a volume.
2544  * Return either:
2545  *  0 (not offline)
2546  *  0xff (offline for unknown reasons)
2547  *  # (integer code indicating one of several NOT READY states
2548  *     describing why a volume is to be kept offline)
2549  */
2550 static int hpsa_volume_offline(struct ctlr_info *h,
2551                                         unsigned char scsi3addr[])
2552 {
2553         struct CommandList *c;
2554         unsigned char *sense, sense_key, asc, ascq;
2555         int ldstat = 0;
2556         u16 cmd_status;
2557         u8 scsi_status;
2558 #define ASC_LUN_NOT_READY 0x04
2559 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2560 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2561
2562         c = cmd_alloc(h);
2563         if (!c)
2564                 return 0;
2565         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2566         hpsa_scsi_do_simple_cmd_core(h, c);
2567         sense = c->err_info->SenseInfo;
2568         sense_key = sense[2];
2569         asc = sense[12];
2570         ascq = sense[13];
2571         cmd_status = c->err_info->CommandStatus;
2572         scsi_status = c->err_info->ScsiStatus;
2573         cmd_free(h, c);
2574         /* Is the volume 'not ready'? */
2575         if (cmd_status != CMD_TARGET_STATUS ||
2576                 scsi_status != SAM_STAT_CHECK_CONDITION ||
2577                 sense_key != NOT_READY ||
2578                 asc != ASC_LUN_NOT_READY)  {
2579                 return 0;
2580         }
2581
2582         /* Determine the reason for not ready state */
2583         ldstat = hpsa_get_volume_status(h, scsi3addr);
2584
2585         /* Keep volume offline in certain cases: */
2586         switch (ldstat) {
2587         case HPSA_LV_UNDERGOING_ERASE:
2588         case HPSA_LV_UNDERGOING_RPI:
2589         case HPSA_LV_PENDING_RPI:
2590         case HPSA_LV_ENCRYPTED_NO_KEY:
2591         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
2592         case HPSA_LV_UNDERGOING_ENCRYPTION:
2593         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
2594         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
2595                 return ldstat;
2596         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
2597                 /* If VPD status page isn't available,
2598                  * use ASC/ASCQ to determine state
2599                  */
2600                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
2601                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
2602                         return ldstat;
2603                 break;
2604         default:
2605                 break;
2606         }
2607         return 0;
2608 }
2609
2610 static int hpsa_update_device_info(struct ctlr_info *h,
2611         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
2612         unsigned char *is_OBDR_device)
2613 {
2614
2615 #define OBDR_SIG_OFFSET 43
2616 #define OBDR_TAPE_SIG "$DR-10"
2617 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
2618 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
2619
2620         unsigned char *inq_buff;
2621         unsigned char *obdr_sig;
2622
2623         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2624         if (!inq_buff)
2625                 goto bail_out;
2626
2627         /* Do an inquiry to the device to see what it is. */
2628         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
2629                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
2630                 /* Inquiry failed (msg printed already) */
2631                 dev_err(&h->pdev->dev,
2632                         "hpsa_update_device_info: inquiry failed\n");
2633                 goto bail_out;
2634         }
2635
2636         this_device->devtype = (inq_buff[0] & 0x1f);
2637         memcpy(this_device->scsi3addr, scsi3addr, 8);
2638         memcpy(this_device->vendor, &inq_buff[8],
2639                 sizeof(this_device->vendor));
2640         memcpy(this_device->model, &inq_buff[16],
2641                 sizeof(this_device->model));
2642         memset(this_device->device_id, 0,
2643                 sizeof(this_device->device_id));
2644         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
2645                 sizeof(this_device->device_id));
2646
2647         if (this_device->devtype == TYPE_DISK &&
2648                 is_logical_dev_addr_mode(scsi3addr)) {
2649                 int volume_offline;
2650
2651                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2652                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
2653                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
2654                 volume_offline = hpsa_volume_offline(h, scsi3addr);
2655                 if (volume_offline < 0 || volume_offline > 0xff)
2656                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
2657                 this_device->volume_offline = volume_offline & 0xff;
2658         } else {
2659                 this_device->raid_level = RAID_UNKNOWN;
2660                 this_device->offload_config = 0;
2661                 this_device->offload_enabled = 0;
2662                 this_device->volume_offline = 0;
2663         }
2664
2665         if (is_OBDR_device) {
2666                 /* See if this is a One-Button-Disaster-Recovery device
2667                  * by looking for "$DR-10" at offset 43 in inquiry data.
2668                  */
2669                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
2670                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
2671                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
2672                                                 OBDR_SIG_LEN) == 0);
2673         }
2674
2675         kfree(inq_buff);
2676         return 0;
2677
2678 bail_out:
2679         kfree(inq_buff);
2680         return 1;
2681 }
2682
2683 static unsigned char *ext_target_model[] = {
2684         "MSA2012",
2685         "MSA2024",
2686         "MSA2312",
2687         "MSA2324",
2688         "P2000 G3 SAS",
2689         "MSA 2040 SAS",
2690         NULL,
2691 };
2692
2693 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
2694 {
2695         int i;
2696
2697         for (i = 0; ext_target_model[i]; i++)
2698                 if (strncmp(device->model, ext_target_model[i],
2699                         strlen(ext_target_model[i])) == 0)
2700                         return 1;
2701         return 0;
2702 }
2703
2704 /* Helper function to assign bus, target, lun mapping of devices.
2705  * Puts non-external target logical volumes on bus 0, external target logical
2706  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
2707  * Logical drive target and lun are assigned at this time, but
2708  * physical device lun and target assignment are deferred (assigned
2709  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
2710  */
2711 static void figure_bus_target_lun(struct ctlr_info *h,
2712         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
2713 {
2714         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
2715
2716         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
2717                 /* physical device, target and lun filled in later */
2718                 if (is_hba_lunid(lunaddrbytes))
2719                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
2720                 else
2721                         /* defer target, lun assignment for physical devices */
2722                         hpsa_set_bus_target_lun(device, 2, -1, -1);
2723                 return;
2724         }
2725         /* It's a logical device */
2726         if (is_ext_target(h, device)) {
2727                 /* external target way, put logicals on bus 1
2728                  * and match target/lun numbers box
2729                  * reports, other smart array, bus 0, target 0, match lunid
2730                  */
2731                 hpsa_set_bus_target_lun(device,
2732                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
2733                 return;
2734         }
2735         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
2736 }
2737
2738 /*
2739  * If there is no lun 0 on a target, linux won't find any devices.
2740  * For the external targets (arrays), we have to manually detect the enclosure
2741  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
2742  * it for some reason.  *tmpdevice is the target we're adding,
2743  * this_device is a pointer into the current element of currentsd[]
2744  * that we're building up in update_scsi_devices(), below.
2745  * lunzerobits is a bitmap that tracks which targets already have a
2746  * lun 0 assigned.
2747  * Returns 1 if an enclosure was added, 0 if not.
2748  */
2749 static int add_ext_target_dev(struct ctlr_info *h,
2750         struct hpsa_scsi_dev_t *tmpdevice,
2751         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
2752         unsigned long lunzerobits[], int *n_ext_target_devs)
2753 {
2754         unsigned char scsi3addr[8];
2755
2756         if (test_bit(tmpdevice->target, lunzerobits))
2757                 return 0; /* There is already a lun 0 on this target. */
2758
2759         if (!is_logical_dev_addr_mode(lunaddrbytes))
2760                 return 0; /* It's the logical targets that may lack lun 0. */
2761
2762         if (!is_ext_target(h, tmpdevice))
2763                 return 0; /* Only external target devices have this problem. */
2764
2765         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
2766                 return 0;
2767
2768         memset(scsi3addr, 0, 8);
2769         scsi3addr[3] = tmpdevice->target;
2770         if (is_hba_lunid(scsi3addr))
2771                 return 0; /* Don't add the RAID controller here. */
2772
2773         if (is_scsi_rev_5(h))
2774                 return 0; /* p1210m doesn't need to do this. */
2775
2776         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
2777                 dev_warn(&h->pdev->dev, "Maximum number of external "
2778                         "target devices exceeded.  Check your hardware "
2779                         "configuration.");
2780                 return 0;
2781         }
2782
2783         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
2784                 return 0;
2785         (*n_ext_target_devs)++;
2786         hpsa_set_bus_target_lun(this_device,
2787                                 tmpdevice->bus, tmpdevice->target, 0);
2788         set_bit(tmpdevice->target, lunzerobits);
2789         return 1;
2790 }
2791
2792 /*
2793  * Get address of physical disk used for an ioaccel2 mode command:
2794  *      1. Extract ioaccel2 handle from the command.
2795  *      2. Find a matching ioaccel2 handle from list of physical disks.
2796  *      3. Return:
2797  *              1 and set scsi3addr to address of matching physical
2798  *              0 if no matching physical disk was found.
2799  */
2800 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
2801         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
2802 {
2803         struct ReportExtendedLUNdata *physicals = NULL;
2804         int responsesize = 24;  /* size of physical extended response */
2805         int extended = 2;       /* flag forces reporting 'other dev info'. */
2806         int reportsize = sizeof(*physicals) + HPSA_MAX_PHYS_LUN * responsesize;
2807         u32 nphysicals = 0;     /* number of reported physical devs */
2808         int found = 0;          /* found match (1) or not (0) */
2809         u32 find;               /* handle we need to match */
2810         int i;
2811         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
2812         struct hpsa_scsi_dev_t *d; /* device of request being aborted */
2813         struct io_accel2_cmd *c2a; /* ioaccel2 command to abort */
2814         u32 it_nexus;           /* 4 byte device handle for the ioaccel2 cmd */
2815         u32 scsi_nexus;         /* 4 byte device handle for the ioaccel2 cmd */
2816
2817         if (ioaccel2_cmd_to_abort->cmd_type != CMD_IOACCEL2)
2818                 return 0; /* no match */
2819
2820         /* point to the ioaccel2 device handle */
2821         c2a = &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
2822         if (c2a == NULL)
2823                 return 0; /* no match */
2824
2825         scmd = (struct scsi_cmnd *) ioaccel2_cmd_to_abort->scsi_cmd;
2826         if (scmd == NULL)
2827                 return 0; /* no match */
2828
2829         d = scmd->device->hostdata;
2830         if (d == NULL)
2831                 return 0; /* no match */
2832
2833         it_nexus = cpu_to_le32((u32) d->ioaccel_handle);
2834         scsi_nexus = cpu_to_le32((u32) c2a->scsi_nexus);
2835         find = c2a->scsi_nexus;
2836
2837         if (h->raid_offload_debug > 0)
2838                 dev_info(&h->pdev->dev,
2839                         "%s: scsi_nexus:0x%08x device id: 0x%02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
2840                         __func__, scsi_nexus,
2841                         d->device_id[0], d->device_id[1], d->device_id[2],
2842                         d->device_id[3], d->device_id[4], d->device_id[5],
2843                         d->device_id[6], d->device_id[7], d->device_id[8],
2844                         d->device_id[9], d->device_id[10], d->device_id[11],
2845                         d->device_id[12], d->device_id[13], d->device_id[14],
2846                         d->device_id[15]);
2847
2848         /* Get the list of physical devices */
2849         physicals = kzalloc(reportsize, GFP_KERNEL);
2850         if (physicals == NULL)
2851                 return 0;
2852         if (hpsa_scsi_do_report_phys_luns(h, (struct ReportLUNdata *) physicals,
2853                 reportsize, extended)) {
2854                 dev_err(&h->pdev->dev,
2855                         "Can't lookup %s device handle: report physical LUNs failed.\n",
2856                         "HP SSD Smart Path");
2857                 kfree(physicals);
2858                 return 0;
2859         }
2860         nphysicals = be32_to_cpu(*((__be32 *)physicals->LUNListLength)) /
2861                                                         responsesize;
2862
2863         /* find ioaccel2 handle in list of physicals: */
2864         for (i = 0; i < nphysicals; i++) {
2865                 struct ext_report_lun_entry *entry = &physicals->LUN[i];
2866
2867                 /* handle is in bytes 28-31 of each lun */
2868                 if (entry->ioaccel_handle != find)
2869                         continue; /* didn't match */
2870                 found = 1;
2871                 memcpy(scsi3addr, entry->lunid, 8);
2872                 if (h->raid_offload_debug > 0)
2873                         dev_info(&h->pdev->dev,
2874                                 "%s: Searched h=0x%08x, Found h=0x%08x, scsiaddr 0x%8phN\n",
2875                                 __func__, find,
2876                                 entry->ioaccel_handle, scsi3addr);
2877                 break; /* found it */
2878         }
2879
2880         kfree(physicals);
2881         if (found)
2882                 return 1;
2883         else
2884                 return 0;
2885
2886 }
2887 /*
2888  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
2889  * logdev.  The number of luns in physdev and logdev are returned in
2890  * *nphysicals and *nlogicals, respectively.
2891  * Returns 0 on success, -1 otherwise.
2892  */
2893 static int hpsa_gather_lun_info(struct ctlr_info *h,
2894         int reportlunsize,
2895         struct ReportLUNdata *physdev, u32 *nphysicals, int *physical_mode,
2896         struct ReportLUNdata *logdev, u32 *nlogicals)
2897 {
2898         int physical_entry_size = 8;
2899
2900         *physical_mode = 0;
2901
2902         /* For I/O accelerator mode we need to read physical device handles */
2903         if (h->transMethod & CFGTBL_Trans_io_accel1 ||
2904                 h->transMethod & CFGTBL_Trans_io_accel2) {
2905                 *physical_mode = HPSA_REPORT_PHYS_EXTENDED;
2906                 physical_entry_size = 24;
2907         }
2908         if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize,
2909                                                         *physical_mode)) {
2910                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
2911                 return -1;
2912         }
2913         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) /
2914                                                         physical_entry_size;
2915         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
2916                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
2917                         "  %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2918                         *nphysicals - HPSA_MAX_PHYS_LUN);
2919                 *nphysicals = HPSA_MAX_PHYS_LUN;
2920         }
2921         if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
2922                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
2923                 return -1;
2924         }
2925         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
2926         /* Reject Logicals in excess of our max capability. */
2927         if (*nlogicals > HPSA_MAX_LUN) {
2928                 dev_warn(&h->pdev->dev,
2929                         "maximum logical LUNs (%d) exceeded.  "
2930                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
2931                         *nlogicals - HPSA_MAX_LUN);
2932                         *nlogicals = HPSA_MAX_LUN;
2933         }
2934         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
2935                 dev_warn(&h->pdev->dev,
2936                         "maximum logical + physical LUNs (%d) exceeded. "
2937                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2938                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
2939                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
2940         }
2941         return 0;
2942 }
2943
2944 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
2945         int nphysicals, int nlogicals,
2946         struct ReportExtendedLUNdata *physdev_list,
2947         struct ReportLUNdata *logdev_list)
2948 {
2949         /* Helper function, figure out where the LUN ID info is coming from
2950          * given index i, lists of physical and logical devices, where in
2951          * the list the raid controller is supposed to appear (first or last)
2952          */
2953
2954         int logicals_start = nphysicals + (raid_ctlr_position == 0);
2955         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
2956
2957         if (i == raid_ctlr_position)
2958                 return RAID_CTLR_LUNID;
2959
2960         if (i < logicals_start)
2961                 return &physdev_list->LUN[i -
2962                                 (raid_ctlr_position == 0)].lunid[0];
2963
2964         if (i < last_device)
2965                 return &logdev_list->LUN[i - nphysicals -
2966                         (raid_ctlr_position == 0)][0];
2967         BUG();
2968         return NULL;
2969 }
2970
2971 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
2972 {
2973         int rc;
2974         int hba_mode_enabled;
2975         struct bmic_controller_parameters *ctlr_params;
2976         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
2977                 GFP_KERNEL);
2978
2979         if (!ctlr_params)
2980                 return -ENOMEM;
2981         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
2982                 sizeof(struct bmic_controller_parameters));
2983         if (rc) {
2984                 kfree(ctlr_params);
2985                 return rc;
2986         }
2987
2988         hba_mode_enabled =
2989                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
2990         kfree(ctlr_params);
2991         return hba_mode_enabled;
2992 }
2993
2994 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
2995 {
2996         /* the idea here is we could get notified
2997          * that some devices have changed, so we do a report
2998          * physical luns and report logical luns cmd, and adjust
2999          * our list of devices accordingly.
3000          *
3001          * The scsi3addr's of devices won't change so long as the
3002          * adapter is not reset.  That means we can rescan and
3003          * tell which devices we already know about, vs. new
3004          * devices, vs.  disappearing devices.
3005          */
3006         struct ReportExtendedLUNdata *physdev_list = NULL;
3007         struct ReportLUNdata *logdev_list = NULL;
3008         u32 nphysicals = 0;
3009         u32 nlogicals = 0;
3010         int physical_mode = 0;
3011         u32 ndev_allocated = 0;
3012         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3013         int ncurrent = 0;
3014         int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 24;
3015         int i, n_ext_target_devs, ndevs_to_allocate;
3016         int raid_ctlr_position;
3017         int rescan_hba_mode;
3018         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3019
3020         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3021         physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
3022         logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
3023         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3024
3025         if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
3026                 dev_err(&h->pdev->dev, "out of memory\n");
3027                 goto out;
3028         }
3029         memset(lunzerobits, 0, sizeof(lunzerobits));
3030
3031         rescan_hba_mode = hpsa_hba_mode_enabled(h);
3032         if (rescan_hba_mode < 0)
3033                 goto out;
3034
3035         if (!h->hba_mode_enabled && rescan_hba_mode)
3036                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
3037         else if (h->hba_mode_enabled && !rescan_hba_mode)
3038                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
3039
3040         h->hba_mode_enabled = rescan_hba_mode;
3041
3042         if (hpsa_gather_lun_info(h, reportlunsize,
3043                         (struct ReportLUNdata *) physdev_list, &nphysicals,
3044                         &physical_mode, logdev_list, &nlogicals))
3045                 goto out;
3046
3047         /* We might see up to the maximum number of logical and physical disks
3048          * plus external target devices, and a device for the local RAID
3049          * controller.
3050          */
3051         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3052
3053         /* Allocate the per device structures */
3054         for (i = 0; i < ndevs_to_allocate; i++) {
3055                 if (i >= HPSA_MAX_DEVICES) {
3056                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3057                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3058                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3059                         break;
3060                 }
3061
3062                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3063                 if (!currentsd[i]) {
3064                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3065                                 __FILE__, __LINE__);
3066                         goto out;
3067                 }
3068                 ndev_allocated++;
3069         }
3070
3071         if (is_scsi_rev_5(h))
3072                 raid_ctlr_position = 0;
3073         else
3074                 raid_ctlr_position = nphysicals + nlogicals;
3075
3076         /* adjust our table of devices */
3077         n_ext_target_devs = 0;
3078         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3079                 u8 *lunaddrbytes, is_OBDR = 0;
3080
3081                 /* Figure out where the LUN ID info is coming from */
3082                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3083                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3084                 /* skip masked physical devices. */
3085                 if (lunaddrbytes[3] & 0xC0 &&
3086                         i < nphysicals + (raid_ctlr_position == 0))
3087                         continue;
3088
3089                 /* Get device type, vendor, model, device id */
3090                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3091                                                         &is_OBDR))
3092                         continue; /* skip it if we can't talk to it. */
3093                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3094                 this_device = currentsd[ncurrent];
3095
3096                 /*
3097                  * For external target devices, we have to insert a LUN 0 which
3098                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3099                  * is nonetheless an enclosure device there.  We have to
3100                  * present that otherwise linux won't find anything if
3101                  * there is no lun 0.
3102                  */
3103                 if (add_ext_target_dev(h, tmpdevice, this_device,
3104                                 lunaddrbytes, lunzerobits,
3105                                 &n_ext_target_devs)) {
3106                         ncurrent++;
3107                         this_device = currentsd[ncurrent];
3108                 }
3109
3110                 *this_device = *tmpdevice;
3111
3112                 switch (this_device->devtype) {
3113                 case TYPE_ROM:
3114                         /* We don't *really* support actual CD-ROM devices,
3115                          * just "One Button Disaster Recovery" tape drive
3116                          * which temporarily pretends to be a CD-ROM drive.
3117                          * So we check that the device is really an OBDR tape
3118                          * device by checking for "$DR-10" in bytes 43-48 of
3119                          * the inquiry data.
3120                          */
3121                         if (is_OBDR)
3122                                 ncurrent++;
3123                         break;
3124                 case TYPE_DISK:
3125                         if (h->hba_mode_enabled) {
3126                                 /* never use raid mapper in HBA mode */
3127                                 this_device->offload_enabled = 0;
3128                                 ncurrent++;
3129                                 break;
3130                         } else if (h->acciopath_status) {
3131                                 if (i >= nphysicals) {
3132                                         ncurrent++;
3133                                         break;
3134                                 }
3135                         } else {
3136                                 if (i < nphysicals)
3137                                         break;
3138                                 ncurrent++;
3139                                 break;
3140                         }
3141                         if (physical_mode == HPSA_REPORT_PHYS_EXTENDED) {
3142                                 memcpy(&this_device->ioaccel_handle,
3143                                         &lunaddrbytes[20],
3144                                         sizeof(this_device->ioaccel_handle));
3145                                 ncurrent++;
3146                         }
3147                         break;
3148                 case TYPE_TAPE:
3149                 case TYPE_MEDIUM_CHANGER:
3150                         ncurrent++;
3151                         break;
3152                 case TYPE_RAID:
3153                         /* Only present the Smartarray HBA as a RAID controller.
3154                          * If it's a RAID controller other than the HBA itself
3155                          * (an external RAID controller, MSA500 or similar)
3156                          * don't present it.
3157                          */
3158                         if (!is_hba_lunid(lunaddrbytes))
3159                                 break;
3160                         ncurrent++;
3161                         break;
3162                 default:
3163                         break;
3164                 }
3165                 if (ncurrent >= HPSA_MAX_DEVICES)
3166                         break;
3167         }
3168         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3169 out:
3170         kfree(tmpdevice);
3171         for (i = 0; i < ndev_allocated; i++)
3172                 kfree(currentsd[i]);
3173         kfree(currentsd);
3174         kfree(physdev_list);
3175         kfree(logdev_list);
3176 }
3177
3178 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3179  * dma mapping  and fills in the scatter gather entries of the
3180  * hpsa command, cp.
3181  */
3182 static int hpsa_scatter_gather(struct ctlr_info *h,
3183                 struct CommandList *cp,
3184                 struct scsi_cmnd *cmd)
3185 {
3186         unsigned int len;
3187         struct scatterlist *sg;
3188         u64 addr64;
3189         int use_sg, i, sg_index, chained;
3190         struct SGDescriptor *curr_sg;
3191
3192         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3193
3194         use_sg = scsi_dma_map(cmd);
3195         if (use_sg < 0)
3196                 return use_sg;
3197
3198         if (!use_sg)
3199                 goto sglist_finished;
3200
3201         curr_sg = cp->SG;
3202         chained = 0;
3203         sg_index = 0;
3204         scsi_for_each_sg(cmd, sg, use_sg, i) {
3205                 if (i == h->max_cmd_sg_entries - 1 &&
3206                         use_sg > h->max_cmd_sg_entries) {
3207                         chained = 1;
3208                         curr_sg = h->cmd_sg_list[cp->cmdindex];
3209                         sg_index = 0;
3210                 }
3211                 addr64 = (u64) sg_dma_address(sg);
3212                 len  = sg_dma_len(sg);
3213                 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
3214                 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
3215                 curr_sg->Len = len;
3216                 curr_sg->Ext = (i < scsi_sg_count(cmd) - 1) ? 0 : HPSA_SG_LAST;
3217                 curr_sg++;
3218         }
3219
3220         if (use_sg + chained > h->maxSG)
3221                 h->maxSG = use_sg + chained;
3222
3223         if (chained) {
3224                 cp->Header.SGList = h->max_cmd_sg_entries;
3225                 cp->Header.SGTotal = (u16) (use_sg + 1);
3226                 if (hpsa_map_sg_chain_block(h, cp)) {
3227                         scsi_dma_unmap(cmd);
3228                         return -1;
3229                 }
3230                 return 0;
3231         }
3232
3233 sglist_finished:
3234
3235         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3236         cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
3237         return 0;
3238 }
3239
3240 #define IO_ACCEL_INELIGIBLE (1)
3241 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3242 {
3243         int is_write = 0;
3244         u32 block;
3245         u32 block_cnt;
3246
3247         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3248         switch (cdb[0]) {
3249         case WRITE_6:
3250         case WRITE_12:
3251                 is_write = 1;
3252         case READ_6:
3253         case READ_12:
3254                 if (*cdb_len == 6) {
3255                         block = (((u32) cdb[2]) << 8) | cdb[3];
3256                         block_cnt = cdb[4];
3257                 } else {
3258                         BUG_ON(*cdb_len != 12);
3259                         block = (((u32) cdb[2]) << 24) |
3260                                 (((u32) cdb[3]) << 16) |
3261                                 (((u32) cdb[4]) << 8) |
3262                                 cdb[5];
3263                         block_cnt =
3264                                 (((u32) cdb[6]) << 24) |
3265                                 (((u32) cdb[7]) << 16) |
3266                                 (((u32) cdb[8]) << 8) |
3267                                 cdb[9];
3268                 }
3269                 if (block_cnt > 0xffff)
3270                         return IO_ACCEL_INELIGIBLE;
3271
3272                 cdb[0] = is_write ? WRITE_10 : READ_10;
3273                 cdb[1] = 0;
3274                 cdb[2] = (u8) (block >> 24);
3275                 cdb[3] = (u8) (block >> 16);
3276                 cdb[4] = (u8) (block >> 8);
3277                 cdb[5] = (u8) (block);
3278                 cdb[6] = 0;
3279                 cdb[7] = (u8) (block_cnt >> 8);
3280                 cdb[8] = (u8) (block_cnt);
3281                 cdb[9] = 0;
3282                 *cdb_len = 10;
3283                 break;
3284         }
3285         return 0;
3286 }
3287
3288 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3289         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3290         u8 *scsi3addr)
3291 {
3292         struct scsi_cmnd *cmd = c->scsi_cmd;
3293         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3294         unsigned int len;
3295         unsigned int total_len = 0;
3296         struct scatterlist *sg;
3297         u64 addr64;
3298         int use_sg, i;
3299         struct SGDescriptor *curr_sg;
3300         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3301
3302         /* TODO: implement chaining support */
3303         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3304                 return IO_ACCEL_INELIGIBLE;
3305
3306         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3307
3308         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3309                 return IO_ACCEL_INELIGIBLE;
3310
3311         c->cmd_type = CMD_IOACCEL1;
3312
3313         /* Adjust the DMA address to point to the accelerated command buffer */
3314         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3315                                 (c->cmdindex * sizeof(*cp));
3316         BUG_ON(c->busaddr & 0x0000007F);
3317
3318         use_sg = scsi_dma_map(cmd);
3319         if (use_sg < 0)
3320                 return use_sg;
3321
3322         if (use_sg) {
3323                 curr_sg = cp->SG;
3324                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3325                         addr64 = (u64) sg_dma_address(sg);
3326                         len  = sg_dma_len(sg);
3327                         total_len += len;
3328                         curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
3329                         curr_sg->Addr.upper =
3330                                 (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
3331                         curr_sg->Len = len;
3332
3333                         if (i == (scsi_sg_count(cmd) - 1))
3334                                 curr_sg->Ext = HPSA_SG_LAST;
3335                         else
3336                                 curr_sg->Ext = 0;  /* we are not chaining */
3337                         curr_sg++;
3338                 }
3339
3340                 switch (cmd->sc_data_direction) {
3341                 case DMA_TO_DEVICE:
3342                         control |= IOACCEL1_CONTROL_DATA_OUT;
3343                         break;
3344                 case DMA_FROM_DEVICE:
3345                         control |= IOACCEL1_CONTROL_DATA_IN;
3346                         break;
3347                 case DMA_NONE:
3348                         control |= IOACCEL1_CONTROL_NODATAXFER;
3349                         break;
3350                 default:
3351                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3352                         cmd->sc_data_direction);
3353                         BUG();
3354                         break;
3355                 }
3356         } else {
3357                 control |= IOACCEL1_CONTROL_NODATAXFER;
3358         }
3359
3360         c->Header.SGList = use_sg;
3361         /* Fill out the command structure to submit */
3362         cp->dev_handle = ioaccel_handle & 0xFFFF;
3363         cp->transfer_len = total_len;
3364         cp->io_flags = IOACCEL1_IOFLAGS_IO_REQ |
3365                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK);
3366         cp->control = control;
3367         memcpy(cp->CDB, cdb, cdb_len);
3368         memcpy(cp->CISS_LUN, scsi3addr, 8);
3369         /* Tag was already set at init time. */
3370         enqueue_cmd_and_start_io(h, c);
3371         return 0;
3372 }
3373
3374 /*
3375  * Queue a command directly to a device behind the controller using the
3376  * I/O accelerator path.
3377  */
3378 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3379         struct CommandList *c)
3380 {
3381         struct scsi_cmnd *cmd = c->scsi_cmd;
3382         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3383
3384         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3385                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr);
3386 }
3387
3388 /*
3389  * Set encryption parameters for the ioaccel2 request
3390  */
3391 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3392         struct CommandList *c, struct io_accel2_cmd *cp)
3393 {
3394         struct scsi_cmnd *cmd = c->scsi_cmd;
3395         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3396         struct raid_map_data *map = &dev->raid_map;
3397         u64 first_block;
3398
3399         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3400
3401         /* Are we doing encryption on this device */
3402         if (!(map->flags & RAID_MAP_FLAG_ENCRYPT_ON))
3403                 return;
3404         /* Set the data encryption key index. */
3405         cp->dekindex = map->dekindex;
3406
3407         /* Set the encryption enable flag, encoded into direction field. */
3408         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3409
3410         /* Set encryption tweak values based on logical block address
3411          * If block size is 512, tweak value is LBA.
3412          * For other block sizes, tweak is (LBA * block size)/ 512)
3413          */
3414         switch (cmd->cmnd[0]) {
3415         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3416         case WRITE_6:
3417         case READ_6:
3418                 if (map->volume_blk_size == 512) {
3419                         cp->tweak_lower =
3420                                 (((u32) cmd->cmnd[2]) << 8) |
3421                                         cmd->cmnd[3];
3422                         cp->tweak_upper = 0;
3423                 } else {
3424                         first_block =
3425                                 (((u64) cmd->cmnd[2]) << 8) |
3426                                         cmd->cmnd[3];
3427                         first_block = (first_block * map->volume_blk_size)/512;
3428                         cp->tweak_lower = (u32)first_block;
3429                         cp->tweak_upper = (u32)(first_block >> 32);
3430                 }
3431                 break;
3432         case WRITE_10:
3433         case READ_10:
3434                 if (map->volume_blk_size == 512) {
3435                         cp->tweak_lower =
3436                                 (((u32) cmd->cmnd[2]) << 24) |
3437                                 (((u32) cmd->cmnd[3]) << 16) |
3438                                 (((u32) cmd->cmnd[4]) << 8) |
3439                                         cmd->cmnd[5];
3440                         cp->tweak_upper = 0;
3441                 } else {
3442                         first_block =
3443                                 (((u64) cmd->cmnd[2]) << 24) |
3444                                 (((u64) cmd->cmnd[3]) << 16) |
3445                                 (((u64) cmd->cmnd[4]) << 8) |
3446                                         cmd->cmnd[5];
3447                         first_block = (first_block * map->volume_blk_size)/512;
3448                         cp->tweak_lower = (u32)first_block;
3449                         cp->tweak_upper = (u32)(first_block >> 32);
3450                 }
3451                 break;
3452         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3453         case WRITE_12:
3454         case READ_12:
3455                 if (map->volume_blk_size == 512) {
3456                         cp->tweak_lower =
3457                                 (((u32) cmd->cmnd[2]) << 24) |
3458                                 (((u32) cmd->cmnd[3]) << 16) |
3459                                 (((u32) cmd->cmnd[4]) << 8) |
3460                                         cmd->cmnd[5];
3461                         cp->tweak_upper = 0;
3462                 } else {
3463                         first_block =
3464                                 (((u64) cmd->cmnd[2]) << 24) |
3465                                 (((u64) cmd->cmnd[3]) << 16) |
3466                                 (((u64) cmd->cmnd[4]) << 8) |
3467                                         cmd->cmnd[5];
3468                         first_block = (first_block * map->volume_blk_size)/512;
3469                         cp->tweak_lower = (u32)first_block;
3470                         cp->tweak_upper = (u32)(first_block >> 32);
3471                 }
3472                 break;
3473         case WRITE_16:
3474         case READ_16:
3475                 if (map->volume_blk_size == 512) {
3476                         cp->tweak_lower =
3477                                 (((u32) cmd->cmnd[6]) << 24) |
3478                                 (((u32) cmd->cmnd[7]) << 16) |
3479                                 (((u32) cmd->cmnd[8]) << 8) |
3480                                         cmd->cmnd[9];
3481                         cp->tweak_upper =
3482                                 (((u32) cmd->cmnd[2]) << 24) |
3483                                 (((u32) cmd->cmnd[3]) << 16) |
3484                                 (((u32) cmd->cmnd[4]) << 8) |
3485                                         cmd->cmnd[5];
3486                 } else {
3487                         first_block =
3488                                 (((u64) cmd->cmnd[2]) << 56) |
3489                                 (((u64) cmd->cmnd[3]) << 48) |
3490                                 (((u64) cmd->cmnd[4]) << 40) |
3491                                 (((u64) cmd->cmnd[5]) << 32) |
3492                                 (((u64) cmd->cmnd[6]) << 24) |
3493                                 (((u64) cmd->cmnd[7]) << 16) |
3494                                 (((u64) cmd->cmnd[8]) << 8) |
3495                                         cmd->cmnd[9];
3496                         first_block = (first_block * map->volume_blk_size)/512;
3497                         cp->tweak_lower = (u32)first_block;
3498                         cp->tweak_upper = (u32)(first_block >> 32);
3499                 }
3500                 break;
3501         default:
3502                 dev_err(&h->pdev->dev,
3503                         "ERROR: %s: IOACCEL request CDB size not supported for encryption\n",
3504                         __func__);
3505                 BUG();
3506                 break;
3507         }
3508 }
3509
3510 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3511         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3512         u8 *scsi3addr)
3513 {
3514         struct scsi_cmnd *cmd = c->scsi_cmd;
3515         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3516         struct ioaccel2_sg_element *curr_sg;
3517         int use_sg, i;
3518         struct scatterlist *sg;
3519         u64 addr64;
3520         u32 len;
3521         u32 total_len = 0;
3522
3523         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3524                 return IO_ACCEL_INELIGIBLE;
3525
3526         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3527                 return IO_ACCEL_INELIGIBLE;
3528         c->cmd_type = CMD_IOACCEL2;
3529         /* Adjust the DMA address to point to the accelerated command buffer */
3530         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3531                                 (c->cmdindex * sizeof(*cp));
3532         BUG_ON(c->busaddr & 0x0000007F);
3533
3534         memset(cp, 0, sizeof(*cp));
3535         cp->IU_type = IOACCEL2_IU_TYPE;
3536
3537         use_sg = scsi_dma_map(cmd);
3538         if (use_sg < 0)
3539                 return use_sg;
3540
3541         if (use_sg) {
3542                 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
3543                 curr_sg = cp->sg;
3544                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3545                         addr64 = (u64) sg_dma_address(sg);
3546                         len  = sg_dma_len(sg);
3547                         total_len += len;
3548                         curr_sg->address = cpu_to_le64(addr64);
3549                         curr_sg->length = cpu_to_le32(len);
3550                         curr_sg->reserved[0] = 0;
3551                         curr_sg->reserved[1] = 0;
3552                         curr_sg->reserved[2] = 0;
3553                         curr_sg->chain_indicator = 0;
3554                         curr_sg++;
3555                 }
3556
3557                 switch (cmd->sc_data_direction) {
3558                 case DMA_TO_DEVICE:
3559                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3560                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
3561                         break;
3562                 case DMA_FROM_DEVICE:
3563                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3564                         cp->direction |= IOACCEL2_DIR_DATA_IN;
3565                         break;
3566                 case DMA_NONE:
3567                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3568                         cp->direction |= IOACCEL2_DIR_NO_DATA;
3569                         break;
3570                 default:
3571                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3572                                 cmd->sc_data_direction);
3573                         BUG();
3574                         break;
3575                 }
3576         } else {
3577                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3578                 cp->direction |= IOACCEL2_DIR_NO_DATA;
3579         }
3580
3581         /* Set encryption parameters, if necessary */
3582         set_encrypt_ioaccel2(h, c, cp);
3583
3584         cp->scsi_nexus = ioaccel_handle;
3585         cp->Tag = (c->cmdindex << DIRECT_LOOKUP_SHIFT) |
3586                                 DIRECT_LOOKUP_BIT;
3587         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
3588
3589         /* fill in sg elements */
3590         cp->sg_count = (u8) use_sg;
3591
3592         cp->data_len = cpu_to_le32(total_len);
3593         cp->err_ptr = cpu_to_le64(c->busaddr +
3594                         offsetof(struct io_accel2_cmd, error_data));
3595         cp->err_len = cpu_to_le32((u32) sizeof(cp->error_data));
3596
3597         enqueue_cmd_and_start_io(h, c);
3598         return 0;
3599 }
3600
3601 /*
3602  * Queue a command to the correct I/O accelerator path.
3603  */
3604 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
3605         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3606         u8 *scsi3addr)
3607 {
3608         if (h->transMethod & CFGTBL_Trans_io_accel1)
3609                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3610                                                 cdb, cdb_len, scsi3addr);
3611         else
3612                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3613                                                 cdb, cdb_len, scsi3addr);
3614 }
3615
3616 static void raid_map_helper(struct raid_map_data *map,
3617                 int offload_to_mirror, u32 *map_index, u32 *current_group)
3618 {
3619         if (offload_to_mirror == 0)  {
3620                 /* use physical disk in the first mirrored group. */
3621                 *map_index %= map->data_disks_per_row;
3622                 return;
3623         }
3624         do {
3625                 /* determine mirror group that *map_index indicates */
3626                 *current_group = *map_index / map->data_disks_per_row;
3627                 if (offload_to_mirror == *current_group)
3628                         continue;
3629                 if (*current_group < (map->layout_map_count - 1)) {
3630                         /* select map index from next group */
3631                         *map_index += map->data_disks_per_row;
3632                         (*current_group)++;
3633                 } else {
3634                         /* select map index from first group */
3635                         *map_index %= map->data_disks_per_row;
3636                         *current_group = 0;
3637                 }
3638         } while (offload_to_mirror != *current_group);
3639 }
3640
3641 /*
3642  * Attempt to perform offload RAID mapping for a logical volume I/O.
3643  */
3644 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
3645         struct CommandList *c)
3646 {
3647         struct scsi_cmnd *cmd = c->scsi_cmd;
3648         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3649         struct raid_map_data *map = &dev->raid_map;
3650         struct raid_map_disk_data *dd = &map->data[0];
3651         int is_write = 0;
3652         u32 map_index;
3653         u64 first_block, last_block;
3654         u32 block_cnt;
3655         u32 blocks_per_row;
3656         u64 first_row, last_row;
3657         u32 first_row_offset, last_row_offset;
3658         u32 first_column, last_column;
3659         u64 r0_first_row, r0_last_row;
3660         u32 r5or6_blocks_per_row;
3661         u64 r5or6_first_row, r5or6_last_row;
3662         u32 r5or6_first_row_offset, r5or6_last_row_offset;
3663         u32 r5or6_first_column, r5or6_last_column;
3664         u32 total_disks_per_row;
3665         u32 stripesize;
3666         u32 first_group, last_group, current_group;
3667         u32 map_row;
3668         u32 disk_handle;
3669         u64 disk_block;
3670         u32 disk_block_cnt;
3671         u8 cdb[16];
3672         u8 cdb_len;
3673 #if BITS_PER_LONG == 32
3674         u64 tmpdiv;
3675 #endif
3676         int offload_to_mirror;
3677
3678         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3679
3680         /* check for valid opcode, get LBA and block count */
3681         switch (cmd->cmnd[0]) {
3682         case WRITE_6:
3683                 is_write = 1;
3684         case READ_6:
3685                 first_block =
3686                         (((u64) cmd->cmnd[2]) << 8) |
3687                         cmd->cmnd[3];
3688                 block_cnt = cmd->cmnd[4];
3689                 if (block_cnt == 0)
3690                         block_cnt = 256;
3691                 break;
3692         case WRITE_10:
3693                 is_write = 1;
3694         case READ_10:
3695                 first_block =
3696                         (((u64) cmd->cmnd[2]) << 24) |
3697                         (((u64) cmd->cmnd[3]) << 16) |
3698                         (((u64) cmd->cmnd[4]) << 8) |
3699                         cmd->cmnd[5];
3700                 block_cnt =
3701                         (((u32) cmd->cmnd[7]) << 8) |
3702                         cmd->cmnd[8];
3703                 break;
3704         case WRITE_12:
3705                 is_write = 1;
3706         case READ_12:
3707                 first_block =
3708                         (((u64) cmd->cmnd[2]) << 24) |
3709                         (((u64) cmd->cmnd[3]) << 16) |
3710                         (((u64) cmd->cmnd[4]) << 8) |
3711                         cmd->cmnd[5];
3712                 block_cnt =
3713                         (((u32) cmd->cmnd[6]) << 24) |
3714                         (((u32) cmd->cmnd[7]) << 16) |
3715                         (((u32) cmd->cmnd[8]) << 8) |
3716                 cmd->cmnd[9];
3717                 break;
3718         case WRITE_16:
3719                 is_write = 1;
3720         case READ_16:
3721                 first_block =
3722                         (((u64) cmd->cmnd[2]) << 56) |
3723                         (((u64) cmd->cmnd[3]) << 48) |
3724                         (((u64) cmd->cmnd[4]) << 40) |
3725                         (((u64) cmd->cmnd[5]) << 32) |
3726                         (((u64) cmd->cmnd[6]) << 24) |
3727                         (((u64) cmd->cmnd[7]) << 16) |
3728                         (((u64) cmd->cmnd[8]) << 8) |
3729                         cmd->cmnd[9];
3730                 block_cnt =
3731                         (((u32) cmd->cmnd[10]) << 24) |
3732                         (((u32) cmd->cmnd[11]) << 16) |
3733                         (((u32) cmd->cmnd[12]) << 8) |
3734                         cmd->cmnd[13];
3735                 break;
3736         default:
3737                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
3738         }
3739         last_block = first_block + block_cnt - 1;
3740
3741         /* check for write to non-RAID-0 */
3742         if (is_write && dev->raid_level != 0)
3743                 return IO_ACCEL_INELIGIBLE;
3744
3745         /* check for invalid block or wraparound */
3746         if (last_block >= map->volume_blk_cnt || last_block < first_block)
3747                 return IO_ACCEL_INELIGIBLE;
3748
3749         /* calculate stripe information for the request */
3750         blocks_per_row = map->data_disks_per_row * map->strip_size;
3751 #if BITS_PER_LONG == 32
3752         tmpdiv = first_block;
3753         (void) do_div(tmpdiv, blocks_per_row);
3754         first_row = tmpdiv;
3755         tmpdiv = last_block;
3756         (void) do_div(tmpdiv, blocks_per_row);
3757         last_row = tmpdiv;
3758         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3759         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3760         tmpdiv = first_row_offset;
3761         (void) do_div(tmpdiv,  map->strip_size);
3762         first_column = tmpdiv;
3763         tmpdiv = last_row_offset;
3764         (void) do_div(tmpdiv, map->strip_size);
3765         last_column = tmpdiv;
3766 #else
3767         first_row = first_block / blocks_per_row;
3768         last_row = last_block / blocks_per_row;
3769         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3770         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3771         first_column = first_row_offset / map->strip_size;
3772         last_column = last_row_offset / map->strip_size;
3773 #endif
3774
3775         /* if this isn't a single row/column then give to the controller */
3776         if ((first_row != last_row) || (first_column != last_column))
3777                 return IO_ACCEL_INELIGIBLE;
3778
3779         /* proceeding with driver mapping */
3780         total_disks_per_row = map->data_disks_per_row +
3781                                 map->metadata_disks_per_row;
3782         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3783                                 map->row_cnt;
3784         map_index = (map_row * total_disks_per_row) + first_column;
3785
3786         switch (dev->raid_level) {
3787         case HPSA_RAID_0:
3788                 break; /* nothing special to do */
3789         case HPSA_RAID_1:
3790                 /* Handles load balance across RAID 1 members.
3791                  * (2-drive R1 and R10 with even # of drives.)
3792                  * Appropriate for SSDs, not optimal for HDDs
3793                  */
3794                 BUG_ON(map->layout_map_count != 2);
3795                 if (dev->offload_to_mirror)
3796                         map_index += map->data_disks_per_row;
3797                 dev->offload_to_mirror = !dev->offload_to_mirror;
3798                 break;
3799         case HPSA_RAID_ADM:
3800                 /* Handles N-way mirrors  (R1-ADM)
3801                  * and R10 with # of drives divisible by 3.)
3802                  */
3803                 BUG_ON(map->layout_map_count != 3);
3804
3805                 offload_to_mirror = dev->offload_to_mirror;
3806                 raid_map_helper(map, offload_to_mirror,
3807                                 &map_index, &current_group);
3808                 /* set mirror group to use next time */
3809                 offload_to_mirror =
3810                         (offload_to_mirror >= map->layout_map_count - 1)
3811                         ? 0 : offload_to_mirror + 1;
3812                 /* FIXME: remove after debug/dev */
3813                 BUG_ON(offload_to_mirror >= map->layout_map_count);
3814                 dev_warn(&h->pdev->dev,
3815                         "DEBUG: Using physical disk map index %d from mirror group %d\n",
3816                         map_index, offload_to_mirror);
3817                 dev->offload_to_mirror = offload_to_mirror;
3818                 /* Avoid direct use of dev->offload_to_mirror within this
3819                  * function since multiple threads might simultaneously
3820                  * increment it beyond the range of dev->layout_map_count -1.
3821                  */
3822                 break;
3823         case HPSA_RAID_5:
3824         case HPSA_RAID_6:
3825                 if (map->layout_map_count <= 1)
3826                         break;
3827
3828                 /* Verify first and last block are in same RAID group */
3829                 r5or6_blocks_per_row =
3830                         map->strip_size * map->data_disks_per_row;
3831                 BUG_ON(r5or6_blocks_per_row == 0);
3832                 stripesize = r5or6_blocks_per_row * map->layout_map_count;
3833 #if BITS_PER_LONG == 32
3834                 tmpdiv = first_block;
3835                 first_group = do_div(tmpdiv, stripesize);
3836                 tmpdiv = first_group;
3837                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3838                 first_group = tmpdiv;
3839                 tmpdiv = last_block;
3840                 last_group = do_div(tmpdiv, stripesize);
3841                 tmpdiv = last_group;
3842                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3843                 last_group = tmpdiv;
3844 #else
3845                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
3846                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
3847 #endif
3848                 if (first_group != last_group)
3849                         return IO_ACCEL_INELIGIBLE;
3850
3851                 /* Verify request is in a single row of RAID 5/6 */
3852 #if BITS_PER_LONG == 32
3853                 tmpdiv = first_block;
3854                 (void) do_div(tmpdiv, stripesize);
3855                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
3856                 tmpdiv = last_block;
3857                 (void) do_div(tmpdiv, stripesize);
3858                 r5or6_last_row = r0_last_row = tmpdiv;
3859 #else
3860                 first_row = r5or6_first_row = r0_first_row =
3861                                                 first_block / stripesize;
3862                 r5or6_last_row = r0_last_row = last_block / stripesize;
3863 #endif
3864                 if (r5or6_first_row != r5or6_last_row)
3865                         return IO_ACCEL_INELIGIBLE;
3866
3867
3868                 /* Verify request is in a single column */
3869 #if BITS_PER_LONG == 32
3870                 tmpdiv = first_block;
3871                 first_row_offset = do_div(tmpdiv, stripesize);
3872                 tmpdiv = first_row_offset;
3873                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
3874                 r5or6_first_row_offset = first_row_offset;
3875                 tmpdiv = last_block;
3876                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
3877                 tmpdiv = r5or6_last_row_offset;
3878                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
3879                 tmpdiv = r5or6_first_row_offset;
3880                 (void) do_div(tmpdiv, map->strip_size);
3881                 first_column = r5or6_first_column = tmpdiv;
3882                 tmpdiv = r5or6_last_row_offset;
3883                 (void) do_div(tmpdiv, map->strip_size);
3884                 r5or6_last_column = tmpdiv;
3885 #else
3886                 first_row_offset = r5or6_first_row_offset =
3887                         (u32)((first_block % stripesize) %
3888                                                 r5or6_blocks_per_row);
3889
3890                 r5or6_last_row_offset =
3891                         (u32)((last_block % stripesize) %
3892                                                 r5or6_blocks_per_row);
3893
3894                 first_column = r5or6_first_column =
3895                         r5or6_first_row_offset / map->strip_size;
3896                 r5or6_last_column =
3897                         r5or6_last_row_offset / map->strip_size;
3898 #endif
3899                 if (r5or6_first_column != r5or6_last_column)
3900                         return IO_ACCEL_INELIGIBLE;
3901
3902                 /* Request is eligible */
3903                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3904                         map->row_cnt;
3905
3906                 map_index = (first_group *
3907                         (map->row_cnt * total_disks_per_row)) +
3908                         (map_row * total_disks_per_row) + first_column;
3909                 break;
3910         default:
3911                 return IO_ACCEL_INELIGIBLE;
3912         }
3913
3914         disk_handle = dd[map_index].ioaccel_handle;
3915         disk_block = map->disk_starting_blk + (first_row * map->strip_size) +
3916                         (first_row_offset - (first_column * map->strip_size));
3917         disk_block_cnt = block_cnt;
3918
3919         /* handle differing logical/physical block sizes */
3920         if (map->phys_blk_shift) {
3921                 disk_block <<= map->phys_blk_shift;
3922                 disk_block_cnt <<= map->phys_blk_shift;
3923         }
3924         BUG_ON(disk_block_cnt > 0xffff);
3925
3926         /* build the new CDB for the physical disk I/O */
3927         if (disk_block > 0xffffffff) {
3928                 cdb[0] = is_write ? WRITE_16 : READ_16;
3929                 cdb[1] = 0;
3930                 cdb[2] = (u8) (disk_block >> 56);
3931                 cdb[3] = (u8) (disk_block >> 48);
3932                 cdb[4] = (u8) (disk_block >> 40);
3933                 cdb[5] = (u8) (disk_block >> 32);
3934                 cdb[6] = (u8) (disk_block >> 24);
3935                 cdb[7] = (u8) (disk_block >> 16);
3936                 cdb[8] = (u8) (disk_block >> 8);
3937                 cdb[9] = (u8) (disk_block);
3938                 cdb[10] = (u8) (disk_block_cnt >> 24);
3939                 cdb[11] = (u8) (disk_block_cnt >> 16);
3940                 cdb[12] = (u8) (disk_block_cnt >> 8);
3941                 cdb[13] = (u8) (disk_block_cnt);
3942                 cdb[14] = 0;
3943                 cdb[15] = 0;
3944                 cdb_len = 16;
3945         } else {
3946                 cdb[0] = is_write ? WRITE_10 : READ_10;
3947                 cdb[1] = 0;
3948                 cdb[2] = (u8) (disk_block >> 24);
3949                 cdb[3] = (u8) (disk_block >> 16);
3950                 cdb[4] = (u8) (disk_block >> 8);
3951                 cdb[5] = (u8) (disk_block);
3952                 cdb[6] = 0;
3953                 cdb[7] = (u8) (disk_block_cnt >> 8);
3954                 cdb[8] = (u8) (disk_block_cnt);
3955                 cdb[9] = 0;
3956                 cdb_len = 10;
3957         }
3958         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
3959                                                 dev->scsi3addr);
3960 }
3961
3962 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
3963         void (*done)(struct scsi_cmnd *))
3964 {
3965         struct ctlr_info *h;
3966         struct hpsa_scsi_dev_t *dev;
3967         unsigned char scsi3addr[8];
3968         struct CommandList *c;
3969         int rc = 0;
3970
3971         /* Get the ptr to our adapter structure out of cmd->host. */
3972         h = sdev_to_hba(cmd->device);
3973         dev = cmd->device->hostdata;
3974         if (!dev) {
3975                 cmd->result = DID_NO_CONNECT << 16;
3976                 done(cmd);
3977                 return 0;
3978         }
3979         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
3980
3981         if (unlikely(lockup_detected(h))) {
3982                 cmd->result = DID_ERROR << 16;
3983                 done(cmd);
3984                 return 0;
3985         }
3986         c = cmd_alloc(h);
3987         if (c == NULL) {                        /* trouble... */
3988                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
3989                 return SCSI_MLQUEUE_HOST_BUSY;
3990         }
3991
3992         /* Fill in the command list header */
3993
3994         cmd->scsi_done = done;    /* save this for use by completion code */
3995
3996         /* save c in case we have to abort it  */
3997         cmd->host_scribble = (unsigned char *) c;
3998
3999         c->cmd_type = CMD_SCSI;
4000         c->scsi_cmd = cmd;
4001
4002         /* Call alternate submit routine for I/O accelerated commands.
4003          * Retries always go down the normal I/O path.
4004          */
4005         if (likely(cmd->retries == 0 &&
4006                 cmd->request->cmd_type == REQ_TYPE_FS &&
4007                 h->acciopath_status)) {
4008                 if (dev->offload_enabled) {
4009                         rc = hpsa_scsi_ioaccel_raid_map(h, c);
4010                         if (rc == 0)
4011                                 return 0; /* Sent on ioaccel path */
4012                         if (rc < 0) {   /* scsi_dma_map failed. */
4013                                 cmd_free(h, c);
4014                                 return SCSI_MLQUEUE_HOST_BUSY;
4015                         }
4016                 } else if (dev->ioaccel_handle) {
4017                         rc = hpsa_scsi_ioaccel_direct_map(h, c);
4018                         if (rc == 0)
4019                                 return 0; /* Sent on direct map path */
4020                         if (rc < 0) {   /* scsi_dma_map failed. */
4021                                 cmd_free(h, c);
4022                                 return SCSI_MLQUEUE_HOST_BUSY;
4023                         }
4024                 }
4025         }
4026
4027         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4028         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4029         c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
4030         c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
4031
4032         /* Fill in the request block... */
4033
4034         c->Request.Timeout = 0;
4035         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4036         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4037         c->Request.CDBLen = cmd->cmd_len;
4038         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4039         c->Request.Type.Type = TYPE_CMD;
4040         c->Request.Type.Attribute = ATTR_SIMPLE;
4041         switch (cmd->sc_data_direction) {
4042         case DMA_TO_DEVICE:
4043                 c->Request.Type.Direction = XFER_WRITE;
4044                 break;
4045         case DMA_FROM_DEVICE:
4046                 c->Request.Type.Direction = XFER_READ;
4047                 break;
4048         case DMA_NONE:
4049                 c->Request.Type.Direction = XFER_NONE;
4050                 break;
4051         case DMA_BIDIRECTIONAL:
4052                 /* This can happen if a buggy application does a scsi passthru
4053                  * and sets both inlen and outlen to non-zero. ( see
4054                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4055                  */
4056
4057                 c->Request.Type.Direction = XFER_RSVD;
4058                 /* This is technically wrong, and hpsa controllers should
4059                  * reject it with CMD_INVALID, which is the most correct
4060                  * response, but non-fibre backends appear to let it
4061                  * slide by, and give the same results as if this field
4062                  * were set correctly.  Either way is acceptable for
4063                  * our purposes here.
4064                  */
4065
4066                 break;
4067
4068         default:
4069                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4070                         cmd->sc_data_direction);
4071                 BUG();
4072                 break;
4073         }
4074
4075         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4076                 cmd_free(h, c);
4077                 return SCSI_MLQUEUE_HOST_BUSY;
4078         }
4079         enqueue_cmd_and_start_io(h, c);
4080         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4081         return 0;
4082 }
4083
4084 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
4085
4086 static int do_not_scan_if_controller_locked_up(struct ctlr_info *h)
4087 {
4088         unsigned long flags;
4089
4090         /*
4091          * Don't let rescans be initiated on a controller known
4092          * to be locked up.  If the controller locks up *during*
4093          * a rescan, that thread is probably hosed, but at least
4094          * we can prevent new rescan threads from piling up on a
4095          * locked up controller.
4096          */
4097         if (unlikely(lockup_detected(h))) {
4098                 spin_lock_irqsave(&h->scan_lock, flags);
4099                 h->scan_finished = 1;
4100                 wake_up_all(&h->scan_wait_queue);
4101                 spin_unlock_irqrestore(&h->scan_lock, flags);
4102                 return 1;
4103         }
4104         return 0;
4105 }
4106
4107 static void hpsa_scan_start(struct Scsi_Host *sh)
4108 {
4109         struct ctlr_info *h = shost_to_hba(sh);
4110         unsigned long flags;
4111
4112         if (do_not_scan_if_controller_locked_up(h))
4113                 return;
4114
4115         /* wait until any scan already in progress is finished. */
4116         while (1) {
4117                 spin_lock_irqsave(&h->scan_lock, flags);
4118                 if (h->scan_finished)
4119                         break;
4120                 spin_unlock_irqrestore(&h->scan_lock, flags);
4121                 wait_event(h->scan_wait_queue, h->scan_finished);
4122                 /* Note: We don't need to worry about a race between this
4123                  * thread and driver unload because the midlayer will
4124                  * have incremented the reference count, so unload won't
4125                  * happen if we're in here.
4126                  */
4127         }
4128         h->scan_finished = 0; /* mark scan as in progress */
4129         spin_unlock_irqrestore(&h->scan_lock, flags);
4130
4131         if (do_not_scan_if_controller_locked_up(h))
4132                 return;
4133
4134         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4135
4136         spin_lock_irqsave(&h->scan_lock, flags);
4137         h->scan_finished = 1; /* mark scan as finished. */
4138         wake_up_all(&h->scan_wait_queue);
4139         spin_unlock_irqrestore(&h->scan_lock, flags);
4140 }
4141
4142 static int hpsa_scan_finished(struct Scsi_Host *sh,
4143         unsigned long elapsed_time)
4144 {
4145         struct ctlr_info *h = shost_to_hba(sh);
4146         unsigned long flags;
4147         int finished;
4148
4149         spin_lock_irqsave(&h->scan_lock, flags);
4150         finished = h->scan_finished;
4151         spin_unlock_irqrestore(&h->scan_lock, flags);
4152         return finished;
4153 }
4154
4155 static int hpsa_change_queue_depth(struct scsi_device *sdev,
4156         int qdepth, int reason)
4157 {
4158         struct ctlr_info *h = sdev_to_hba(sdev);
4159
4160         if (reason != SCSI_QDEPTH_DEFAULT)
4161                 return -ENOTSUPP;
4162
4163         if (qdepth < 1)
4164                 qdepth = 1;
4165         else
4166                 if (qdepth > h->nr_cmds)
4167                         qdepth = h->nr_cmds;
4168         scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
4169         return sdev->queue_depth;
4170 }
4171
4172 static void hpsa_unregister_scsi(struct ctlr_info *h)
4173 {
4174         /* we are being forcibly unloaded, and may not refuse. */
4175         scsi_remove_host(h->scsi_host);
4176         scsi_host_put(h->scsi_host);
4177         h->scsi_host = NULL;
4178 }
4179
4180 static int hpsa_register_scsi(struct ctlr_info *h)
4181 {
4182         struct Scsi_Host *sh;
4183         int error;
4184
4185         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4186         if (sh == NULL)
4187                 goto fail;
4188
4189         sh->io_port = 0;
4190         sh->n_io_port = 0;
4191         sh->this_id = -1;
4192         sh->max_channel = 3;
4193         sh->max_cmd_len = MAX_COMMAND_SIZE;
4194         sh->max_lun = HPSA_MAX_LUN;
4195         sh->max_id = HPSA_MAX_LUN;
4196         sh->can_queue = h->nr_cmds;
4197         if (h->hba_mode_enabled)
4198                 sh->cmd_per_lun = 7;
4199         else
4200                 sh->cmd_per_lun = h->nr_cmds;
4201         sh->sg_tablesize = h->maxsgentries;
4202         h->scsi_host = sh;
4203         sh->hostdata[0] = (unsigned long) h;
4204         sh->irq = h->intr[h->intr_mode];
4205         sh->unique_id = sh->irq;
4206         error = scsi_add_host(sh, &h->pdev->dev);
4207         if (error)
4208                 goto fail_host_put;
4209         scsi_scan_host(sh);
4210         return 0;
4211
4212  fail_host_put:
4213         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4214                 " failed for controller %d\n", __func__, h->ctlr);
4215         scsi_host_put(sh);
4216         return error;
4217  fail:
4218         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4219                 " failed for controller %d\n", __func__, h->ctlr);
4220         return -ENOMEM;
4221 }
4222
4223 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4224         unsigned char lunaddr[])
4225 {
4226         int rc;
4227         int count = 0;
4228         int waittime = 1; /* seconds */
4229         struct CommandList *c;
4230
4231         c = cmd_special_alloc(h);
4232         if (!c) {
4233                 dev_warn(&h->pdev->dev, "out of memory in "
4234                         "wait_for_device_to_become_ready.\n");
4235                 return IO_ERROR;
4236         }
4237
4238         /* Send test unit ready until device ready, or give up. */
4239         while (count < HPSA_TUR_RETRY_LIMIT) {
4240
4241                 /* Wait for a bit.  do this first, because if we send
4242                  * the TUR right away, the reset will just abort it.
4243                  */
4244                 msleep(1000 * waittime);
4245                 count++;
4246                 rc = 0; /* Device ready. */
4247
4248                 /* Increase wait time with each try, up to a point. */
4249                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4250                         waittime = waittime * 2;
4251
4252                 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4253                 (void) fill_cmd(c, TEST_UNIT_READY, h,
4254                                 NULL, 0, 0, lunaddr, TYPE_CMD);
4255                 hpsa_scsi_do_simple_cmd_core(h, c);
4256                 /* no unmap needed here because no data xfer. */
4257
4258                 if (c->err_info->CommandStatus == CMD_SUCCESS)
4259                         break;
4260
4261                 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4262                         c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4263                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4264                         c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4265                         break;
4266
4267                 dev_warn(&h->pdev->dev, "waiting %d secs "
4268                         "for device to become ready.\n", waittime);
4269                 rc = 1; /* device not ready. */
4270         }
4271
4272         if (rc)
4273                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4274         else
4275                 dev_warn(&h->pdev->dev, "device is ready.\n");
4276
4277         cmd_special_free(h, c);
4278         return rc;
4279 }
4280
4281 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4282  * complaining.  Doing a host- or bus-reset can't do anything good here.
4283  */
4284 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4285 {
4286         int rc;
4287         struct ctlr_info *h;
4288         struct hpsa_scsi_dev_t *dev;
4289
4290         /* find the controller to which the command to be aborted was sent */
4291         h = sdev_to_hba(scsicmd->device);
4292         if (h == NULL) /* paranoia */
4293                 return FAILED;
4294         dev = scsicmd->device->hostdata;
4295         if (!dev) {
4296                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4297                         "device lookup failed.\n");
4298                 return FAILED;
4299         }
4300         dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
4301                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4302         /* send a reset to the SCSI LUN which the command was sent to */
4303         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN);
4304         if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
4305                 return SUCCESS;
4306
4307         dev_warn(&h->pdev->dev, "resetting device failed.\n");
4308         return FAILED;
4309 }
4310
4311 static void swizzle_abort_tag(u8 *tag)
4312 {
4313         u8 original_tag[8];
4314
4315         memcpy(original_tag, tag, 8);
4316         tag[0] = original_tag[3];
4317         tag[1] = original_tag[2];
4318         tag[2] = original_tag[1];
4319         tag[3] = original_tag[0];
4320         tag[4] = original_tag[7];
4321         tag[5] = original_tag[6];
4322         tag[6] = original_tag[5];
4323         tag[7] = original_tag[4];
4324 }
4325
4326 static void hpsa_get_tag(struct ctlr_info *h,
4327         struct CommandList *c, u32 *taglower, u32 *tagupper)
4328 {
4329         if (c->cmd_type == CMD_IOACCEL1) {
4330                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4331                         &h->ioaccel_cmd_pool[c->cmdindex];
4332                 *tagupper = cm1->Tag.upper;
4333                 *taglower = cm1->Tag.lower;
4334                 return;
4335         }
4336         if (c->cmd_type == CMD_IOACCEL2) {
4337                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
4338                         &h->ioaccel2_cmd_pool[c->cmdindex];
4339                 /* upper tag not used in ioaccel2 mode */
4340                 memset(tagupper, 0, sizeof(*tagupper));
4341                 *taglower = cm2->Tag;
4342                 return;
4343         }
4344         *tagupper = c->Header.Tag.upper;
4345         *taglower = c->Header.Tag.lower;
4346 }
4347
4348
4349 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4350         struct CommandList *abort, int swizzle)
4351 {
4352         int rc = IO_OK;
4353         struct CommandList *c;
4354         struct ErrorInfo *ei;
4355         u32 tagupper, taglower;
4356
4357         c = cmd_special_alloc(h);
4358         if (c == NULL) {        /* trouble... */
4359                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4360                 return -ENOMEM;
4361         }
4362
4363         /* fill_cmd can't fail here, no buffer to map */
4364         (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
4365                 0, 0, scsi3addr, TYPE_MSG);
4366         if (swizzle)
4367                 swizzle_abort_tag(&c->Request.CDB[4]);
4368         hpsa_scsi_do_simple_cmd_core(h, c);
4369         hpsa_get_tag(h, abort, &taglower, &tagupper);
4370         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
4371                 __func__, tagupper, taglower);
4372         /* no unmap needed here because no data xfer. */
4373
4374         ei = c->err_info;
4375         switch (ei->CommandStatus) {
4376         case CMD_SUCCESS:
4377                 break;
4378         case CMD_UNABORTABLE: /* Very common, don't make noise. */
4379                 rc = -1;
4380                 break;
4381         default:
4382                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4383                         __func__, tagupper, taglower);
4384                 hpsa_scsi_interpret_error(h, c);
4385                 rc = -1;
4386                 break;
4387         }
4388         cmd_special_free(h, c);
4389         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
4390                 __func__, tagupper, taglower);
4391         return rc;
4392 }
4393
4394 /*
4395  * hpsa_find_cmd_in_queue
4396  *
4397  * Used to determine whether a command (find) is still present
4398  * in queue_head.   Optionally excludes the last element of queue_head.
4399  *
4400  * This is used to avoid unnecessary aborts.  Commands in h->reqQ have
4401  * not yet been submitted, and so can be aborted by the driver without
4402  * sending an abort to the hardware.
4403  *
4404  * Returns pointer to command if found in queue, NULL otherwise.
4405  */
4406 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
4407                         struct scsi_cmnd *find, struct list_head *queue_head)
4408 {
4409         unsigned long flags;
4410         struct CommandList *c = NULL;   /* ptr into cmpQ */
4411
4412         if (!find)
4413                 return 0;
4414         spin_lock_irqsave(&h->lock, flags);
4415         list_for_each_entry(c, queue_head, list) {
4416                 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
4417                         continue;
4418                 if (c->scsi_cmd == find) {
4419                         spin_unlock_irqrestore(&h->lock, flags);
4420                         return c;
4421                 }
4422         }
4423         spin_unlock_irqrestore(&h->lock, flags);
4424         return NULL;
4425 }
4426
4427 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
4428                                         u8 *tag, struct list_head *queue_head)
4429 {
4430         unsigned long flags;
4431         struct CommandList *c;
4432
4433         spin_lock_irqsave(&h->lock, flags);
4434         list_for_each_entry(c, queue_head, list) {
4435                 if (memcmp(&c->Header.Tag, tag, 8) != 0)
4436                         continue;
4437                 spin_unlock_irqrestore(&h->lock, flags);
4438                 return c;
4439         }
4440         spin_unlock_irqrestore(&h->lock, flags);
4441         return NULL;
4442 }
4443
4444 /* ioaccel2 path firmware cannot handle abort task requests.
4445  * Change abort requests to physical target reset, and send to the
4446  * address of the physical disk used for the ioaccel 2 command.
4447  * Return 0 on success (IO_OK)
4448  *       -1 on failure
4449  */
4450
4451 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4452         unsigned char *scsi3addr, struct CommandList *abort)
4453 {
4454         int rc = IO_OK;
4455         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
4456         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
4457         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
4458         unsigned char *psa = &phys_scsi3addr[0];
4459
4460         /* Get a pointer to the hpsa logical device. */
4461         scmd = (struct scsi_cmnd *) abort->scsi_cmd;
4462         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
4463         if (dev == NULL) {
4464                 dev_warn(&h->pdev->dev,
4465                         "Cannot abort: no device pointer for command.\n");
4466                         return -1; /* not abortable */
4467         }
4468
4469         if (h->raid_offload_debug > 0)
4470                 dev_info(&h->pdev->dev,
4471                         "Reset as abort: Abort requested on C%d:B%d:T%d:L%d scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4472                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4473                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
4474                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
4475
4476         if (!dev->offload_enabled) {
4477                 dev_warn(&h->pdev->dev,
4478                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
4479                 return -1; /* not abortable */
4480         }
4481
4482         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
4483         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
4484                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
4485                 return -1; /* not abortable */
4486         }
4487
4488         /* send the reset */
4489         if (h->raid_offload_debug > 0)
4490                 dev_info(&h->pdev->dev,
4491                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4492                         psa[0], psa[1], psa[2], psa[3],
4493                         psa[4], psa[5], psa[6], psa[7]);
4494         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET);
4495         if (rc != 0) {
4496                 dev_warn(&h->pdev->dev,
4497                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4498                         psa[0], psa[1], psa[2], psa[3],
4499                         psa[4], psa[5], psa[6], psa[7]);
4500                 return rc; /* failed to reset */
4501         }
4502
4503         /* wait for device to recover */
4504         if (wait_for_device_to_become_ready(h, psa) != 0) {
4505                 dev_warn(&h->pdev->dev,
4506                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4507                         psa[0], psa[1], psa[2], psa[3],
4508                         psa[4], psa[5], psa[6], psa[7]);
4509                 return -1;  /* failed to recover */
4510         }
4511
4512         /* device recovered */
4513         dev_info(&h->pdev->dev,
4514                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4515                 psa[0], psa[1], psa[2], psa[3],
4516                 psa[4], psa[5], psa[6], psa[7]);
4517
4518         return rc; /* success */
4519 }
4520
4521 /* Some Smart Arrays need the abort tag swizzled, and some don't.  It's hard to
4522  * tell which kind we're dealing with, so we send the abort both ways.  There
4523  * shouldn't be any collisions between swizzled and unswizzled tags due to the
4524  * way we construct our tags but we check anyway in case the assumptions which
4525  * make this true someday become false.
4526  */
4527 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4528         unsigned char *scsi3addr, struct CommandList *abort)
4529 {
4530         u8 swizzled_tag[8];
4531         struct CommandList *c;
4532         int rc = 0, rc2 = 0;
4533
4534         /* ioccelerator mode 2 commands should be aborted via the
4535          * accelerated path, since RAID path is unaware of these commands,
4536          * but underlying firmware can't handle abort TMF.
4537          * Change abort to physical device reset.
4538          */
4539         if (abort->cmd_type == CMD_IOACCEL2)
4540                 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, abort);
4541
4542         /* we do not expect to find the swizzled tag in our queue, but
4543          * check anyway just to be sure the assumptions which make this
4544          * the case haven't become wrong.
4545          */
4546         memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
4547         swizzle_abort_tag(swizzled_tag);
4548         c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
4549         if (c != NULL) {
4550                 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
4551                 return hpsa_send_abort(h, scsi3addr, abort, 0);
4552         }
4553         rc = hpsa_send_abort(h, scsi3addr, abort, 0);
4554
4555         /* if the command is still in our queue, we can't conclude that it was
4556          * aborted (it might have just completed normally) but in any case
4557          * we don't need to try to abort it another way.
4558          */
4559         c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
4560         if (c)
4561                 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
4562         return rc && rc2;
4563 }
4564
4565 /* Send an abort for the specified command.
4566  *      If the device and controller support it,
4567  *              send a task abort request.
4568  */
4569 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
4570 {
4571
4572         int i, rc;
4573         struct ctlr_info *h;
4574         struct hpsa_scsi_dev_t *dev;
4575         struct CommandList *abort; /* pointer to command to be aborted */
4576         struct CommandList *found;
4577         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
4578         char msg[256];          /* For debug messaging. */
4579         int ml = 0;
4580         u32 tagupper, taglower;
4581
4582         /* Find the controller of the command to be aborted */
4583         h = sdev_to_hba(sc->device);
4584         if (WARN(h == NULL,
4585                         "ABORT REQUEST FAILED, Controller lookup failed.\n"))
4586                 return FAILED;
4587
4588         /* Check that controller supports some kind of task abort */
4589         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
4590                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
4591                 return FAILED;
4592
4593         memset(msg, 0, sizeof(msg));
4594         ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%llu ",
4595                 h->scsi_host->host_no, sc->device->channel,
4596                 sc->device->id, sc->device->lun);
4597
4598         /* Find the device of the command to be aborted */
4599         dev = sc->device->hostdata;
4600         if (!dev) {
4601                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
4602                                 msg);
4603                 return FAILED;
4604         }
4605
4606         /* Get SCSI command to be aborted */
4607         abort = (struct CommandList *) sc->host_scribble;
4608         if (abort == NULL) {
4609                 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
4610                                 msg);
4611                 return FAILED;
4612         }
4613         hpsa_get_tag(h, abort, &taglower, &tagupper);
4614         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
4615         as  = (struct scsi_cmnd *) abort->scsi_cmd;
4616         if (as != NULL)
4617                 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
4618                         as->cmnd[0], as->serial_number);
4619         dev_dbg(&h->pdev->dev, "%s\n", msg);
4620         dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
4621                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4622
4623         /* Search reqQ to See if command is queued but not submitted,
4624          * if so, complete the command with aborted status and remove
4625          * it from the reqQ.
4626          */
4627         found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
4628         if (found) {
4629                 found->err_info->CommandStatus = CMD_ABORTED;
4630                 finish_cmd(found);
4631                 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
4632                                 msg);
4633                 return SUCCESS;
4634         }
4635
4636         /* not in reqQ, if also not in cmpQ, must have already completed */
4637         found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4638         if (!found)  {
4639                 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
4640                                 msg);
4641                 return SUCCESS;
4642         }
4643
4644         /*
4645          * Command is in flight, or possibly already completed
4646          * by the firmware (but not to the scsi mid layer) but we can't
4647          * distinguish which.  Send the abort down.
4648          */
4649         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
4650         if (rc != 0) {
4651                 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
4652                 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
4653                         h->scsi_host->host_no,
4654                         dev->bus, dev->target, dev->lun);
4655                 return FAILED;
4656         }
4657         dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
4658
4659         /* If the abort(s) above completed and actually aborted the
4660          * command, then the command to be aborted should already be
4661          * completed.  If not, wait around a bit more to see if they
4662          * manage to complete normally.
4663          */
4664 #define ABORT_COMPLETE_WAIT_SECS 30
4665         for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
4666                 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4667                 if (!found)
4668                         return SUCCESS;
4669                 msleep(100);
4670         }
4671         dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
4672                 msg, ABORT_COMPLETE_WAIT_SECS);
4673         return FAILED;
4674 }
4675
4676
4677 /*
4678  * For operations that cannot sleep, a command block is allocated at init,
4679  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
4680  * which ones are free or in use.  Lock must be held when calling this.
4681  * cmd_free() is the complement.
4682  */
4683 static struct CommandList *cmd_alloc(struct ctlr_info *h)
4684 {
4685         struct CommandList *c;
4686         int i;
4687         union u64bit temp64;
4688         dma_addr_t cmd_dma_handle, err_dma_handle;
4689         unsigned long flags;
4690
4691         spin_lock_irqsave(&h->lock, flags);
4692         do {
4693                 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
4694                 if (i == h->nr_cmds) {
4695                         spin_unlock_irqrestore(&h->lock, flags);
4696                         return NULL;
4697                 }
4698         } while (test_and_set_bit
4699                  (i & (BITS_PER_LONG - 1),
4700                   h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
4701         spin_unlock_irqrestore(&h->lock, flags);
4702
4703         c = h->cmd_pool + i;
4704         memset(c, 0, sizeof(*c));
4705         cmd_dma_handle = h->cmd_pool_dhandle
4706             + i * sizeof(*c);
4707         c->err_info = h->errinfo_pool + i;
4708         memset(c->err_info, 0, sizeof(*c->err_info));
4709         err_dma_handle = h->errinfo_pool_dhandle
4710             + i * sizeof(*c->err_info);
4711
4712         c->cmdindex = i;
4713
4714         INIT_LIST_HEAD(&c->list);
4715         c->busaddr = (u32) cmd_dma_handle;
4716         temp64.val = (u64) err_dma_handle;
4717         c->ErrDesc.Addr.lower = temp64.val32.lower;
4718         c->ErrDesc.Addr.upper = temp64.val32.upper;
4719         c->ErrDesc.Len = sizeof(*c->err_info);
4720
4721         c->h = h;
4722         return c;
4723 }
4724
4725 /* For operations that can wait for kmalloc to possibly sleep,
4726  * this routine can be called. Lock need not be held to call
4727  * cmd_special_alloc. cmd_special_free() is the complement.
4728  */
4729 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
4730 {
4731         struct CommandList *c;
4732         union u64bit temp64;
4733         dma_addr_t cmd_dma_handle, err_dma_handle;
4734
4735         c = pci_zalloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
4736         if (c == NULL)
4737                 return NULL;
4738
4739         c->cmd_type = CMD_SCSI;
4740         c->cmdindex = -1;
4741
4742         c->err_info = pci_zalloc_consistent(h->pdev, sizeof(*c->err_info),
4743                                             &err_dma_handle);
4744
4745         if (c->err_info == NULL) {
4746                 pci_free_consistent(h->pdev,
4747                         sizeof(*c), c, cmd_dma_handle);
4748                 return NULL;
4749         }
4750
4751         INIT_LIST_HEAD(&c->list);
4752         c->busaddr = (u32) cmd_dma_handle;
4753         temp64.val = (u64) err_dma_handle;
4754         c->ErrDesc.Addr.lower = temp64.val32.lower;
4755         c->ErrDesc.Addr.upper = temp64.val32.upper;
4756         c->ErrDesc.Len = sizeof(*c->err_info);
4757
4758         c->h = h;
4759         return c;
4760 }
4761
4762 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
4763 {
4764         int i;
4765         unsigned long flags;
4766
4767         i = c - h->cmd_pool;
4768         spin_lock_irqsave(&h->lock, flags);
4769         clear_bit(i & (BITS_PER_LONG - 1),
4770                   h->cmd_pool_bits + (i / BITS_PER_LONG));
4771         spin_unlock_irqrestore(&h->lock, flags);
4772 }
4773
4774 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
4775 {
4776         union u64bit temp64;
4777
4778         temp64.val32.lower = c->ErrDesc.Addr.lower;
4779         temp64.val32.upper = c->ErrDesc.Addr.upper;
4780         pci_free_consistent(h->pdev, sizeof(*c->err_info),
4781                             c->err_info, (dma_addr_t) temp64.val);
4782         pci_free_consistent(h->pdev, sizeof(*c),
4783                             c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
4784 }
4785
4786 #ifdef CONFIG_COMPAT
4787
4788 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
4789 {
4790         IOCTL32_Command_struct __user *arg32 =
4791             (IOCTL32_Command_struct __user *) arg;
4792         IOCTL_Command_struct arg64;
4793         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
4794         int err;
4795         u32 cp;
4796
4797         memset(&arg64, 0, sizeof(arg64));
4798         err = 0;
4799         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4800                            sizeof(arg64.LUN_info));
4801         err |= copy_from_user(&arg64.Request, &arg32->Request,
4802                            sizeof(arg64.Request));
4803         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4804                            sizeof(arg64.error_info));
4805         err |= get_user(arg64.buf_size, &arg32->buf_size);
4806         err |= get_user(cp, &arg32->buf);
4807         arg64.buf = compat_ptr(cp);
4808         err |= copy_to_user(p, &arg64, sizeof(arg64));
4809
4810         if (err)
4811                 return -EFAULT;
4812
4813         err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
4814         if (err)
4815                 return err;
4816         err |= copy_in_user(&arg32->error_info, &p->error_info,
4817                          sizeof(arg32->error_info));
4818         if (err)
4819                 return -EFAULT;
4820         return err;
4821 }
4822
4823 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
4824         int cmd, void *arg)
4825 {
4826         BIG_IOCTL32_Command_struct __user *arg32 =
4827             (BIG_IOCTL32_Command_struct __user *) arg;
4828         BIG_IOCTL_Command_struct arg64;
4829         BIG_IOCTL_Command_struct __user *p =
4830             compat_alloc_user_space(sizeof(arg64));
4831         int err;
4832         u32 cp;
4833
4834         memset(&arg64, 0, sizeof(arg64));
4835         err = 0;
4836         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4837                            sizeof(arg64.LUN_info));
4838         err |= copy_from_user(&arg64.Request, &arg32->Request,
4839                            sizeof(arg64.Request));
4840         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4841                            sizeof(arg64.error_info));
4842         err |= get_user(arg64.buf_size, &arg32->buf_size);
4843         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
4844         err |= get_user(cp, &arg32->buf);
4845         arg64.buf = compat_ptr(cp);
4846         err |= copy_to_user(p, &arg64, sizeof(arg64));
4847
4848         if (err)
4849                 return -EFAULT;
4850
4851         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
4852         if (err)
4853                 return err;
4854         err |= copy_in_user(&arg32->error_info, &p->error_info,
4855                          sizeof(arg32->error_info));
4856         if (err)
4857                 return -EFAULT;
4858         return err;
4859 }
4860
4861 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
4862 {
4863         switch (cmd) {
4864         case CCISS_GETPCIINFO:
4865         case CCISS_GETINTINFO:
4866         case CCISS_SETINTINFO:
4867         case CCISS_GETNODENAME:
4868         case CCISS_SETNODENAME:
4869         case CCISS_GETHEARTBEAT:
4870         case CCISS_GETBUSTYPES:
4871         case CCISS_GETFIRMVER:
4872         case CCISS_GETDRIVVER:
4873         case CCISS_REVALIDVOLS:
4874         case CCISS_DEREGDISK:
4875         case CCISS_REGNEWDISK:
4876         case CCISS_REGNEWD:
4877         case CCISS_RESCANDISK:
4878         case CCISS_GETLUNINFO:
4879                 return hpsa_ioctl(dev, cmd, arg);
4880
4881         case CCISS_PASSTHRU32:
4882                 return hpsa_ioctl32_passthru(dev, cmd, arg);
4883         case CCISS_BIG_PASSTHRU32:
4884                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
4885
4886         default:
4887                 return -ENOIOCTLCMD;
4888         }
4889 }
4890 #endif
4891
4892 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
4893 {
4894         struct hpsa_pci_info pciinfo;
4895
4896         if (!argp)
4897                 return -EINVAL;
4898         pciinfo.domain = pci_domain_nr(h->pdev->bus);
4899         pciinfo.bus = h->pdev->bus->number;
4900         pciinfo.dev_fn = h->pdev->devfn;
4901         pciinfo.board_id = h->board_id;
4902         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
4903                 return -EFAULT;
4904         return 0;
4905 }
4906
4907 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
4908 {
4909         DriverVer_type DriverVer;
4910         unsigned char vmaj, vmin, vsubmin;
4911         int rc;
4912
4913         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
4914                 &vmaj, &vmin, &vsubmin);
4915         if (rc != 3) {
4916                 dev_info(&h->pdev->dev, "driver version string '%s' "
4917                         "unrecognized.", HPSA_DRIVER_VERSION);
4918                 vmaj = 0;
4919                 vmin = 0;
4920                 vsubmin = 0;
4921         }
4922         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
4923         if (!argp)
4924                 return -EINVAL;
4925         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
4926                 return -EFAULT;
4927         return 0;
4928 }
4929
4930 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
4931 {
4932         IOCTL_Command_struct iocommand;
4933         struct CommandList *c;
4934         char *buff = NULL;
4935         union u64bit temp64;
4936         int rc = 0;
4937
4938         if (!argp)
4939                 return -EINVAL;
4940         if (!capable(CAP_SYS_RAWIO))
4941                 return -EPERM;
4942         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
4943                 return -EFAULT;
4944         if ((iocommand.buf_size < 1) &&
4945             (iocommand.Request.Type.Direction != XFER_NONE)) {
4946                 return -EINVAL;
4947         }
4948         if (iocommand.buf_size > 0) {
4949                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
4950                 if (buff == NULL)
4951                         return -EFAULT;
4952                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
4953                         /* Copy the data into the buffer we created */
4954                         if (copy_from_user(buff, iocommand.buf,
4955                                 iocommand.buf_size)) {
4956                                 rc = -EFAULT;
4957                                 goto out_kfree;
4958                         }
4959                 } else {
4960                         memset(buff, 0, iocommand.buf_size);
4961                 }
4962         }
4963         c = cmd_special_alloc(h);
4964         if (c == NULL) {
4965                 rc = -ENOMEM;
4966                 goto out_kfree;
4967         }
4968         /* Fill in the command type */
4969         c->cmd_type = CMD_IOCTL_PEND;
4970         /* Fill in Command Header */
4971         c->Header.ReplyQueue = 0; /* unused in simple mode */
4972         if (iocommand.buf_size > 0) {   /* buffer to fill */
4973                 c->Header.SGList = 1;
4974                 c->Header.SGTotal = 1;
4975         } else  { /* no buffers to fill */
4976                 c->Header.SGList = 0;
4977                 c->Header.SGTotal = 0;
4978         }
4979         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
4980         /* use the kernel address the cmd block for tag */
4981         c->Header.Tag.lower = c->busaddr;
4982
4983         /* Fill in Request block */
4984         memcpy(&c->Request, &iocommand.Request,
4985                 sizeof(c->Request));
4986
4987         /* Fill in the scatter gather information */
4988         if (iocommand.buf_size > 0) {
4989                 temp64.val = pci_map_single(h->pdev, buff,
4990                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
4991                 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
4992                         c->SG[0].Addr.lower = 0;
4993                         c->SG[0].Addr.upper = 0;
4994                         c->SG[0].Len = 0;
4995                         rc = -ENOMEM;
4996                         goto out;
4997                 }
4998                 c->SG[0].Addr.lower = temp64.val32.lower;
4999                 c->SG[0].Addr.upper = temp64.val32.upper;
5000                 c->SG[0].Len = iocommand.buf_size;
5001                 c->SG[0].Ext = HPSA_SG_LAST; /* we are not chaining*/
5002         }
5003         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5004         if (iocommand.buf_size > 0)
5005                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5006         check_ioctl_unit_attention(h, c);
5007
5008         /* Copy the error information out */
5009         memcpy(&iocommand.error_info, c->err_info,
5010                 sizeof(iocommand.error_info));
5011         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
5012                 rc = -EFAULT;
5013                 goto out;
5014         }
5015         if ((iocommand.Request.Type.Direction & XFER_READ) &&
5016                 iocommand.buf_size > 0) {
5017                 /* Copy the data out of the buffer we created */
5018                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
5019                         rc = -EFAULT;
5020                         goto out;
5021                 }
5022         }
5023 out:
5024         cmd_special_free(h, c);
5025 out_kfree:
5026         kfree(buff);
5027         return rc;
5028 }
5029
5030 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5031 {
5032         BIG_IOCTL_Command_struct *ioc;
5033         struct CommandList *c;
5034         unsigned char **buff = NULL;
5035         int *buff_size = NULL;
5036         union u64bit temp64;
5037         BYTE sg_used = 0;
5038         int status = 0;
5039         int i;
5040         u32 left;
5041         u32 sz;
5042         BYTE __user *data_ptr;
5043
5044         if (!argp)
5045                 return -EINVAL;
5046         if (!capable(CAP_SYS_RAWIO))
5047                 return -EPERM;
5048         ioc = (BIG_IOCTL_Command_struct *)
5049             kmalloc(sizeof(*ioc), GFP_KERNEL);
5050         if (!ioc) {
5051                 status = -ENOMEM;
5052                 goto cleanup1;
5053         }
5054         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
5055                 status = -EFAULT;
5056                 goto cleanup1;
5057         }
5058         if ((ioc->buf_size < 1) &&
5059             (ioc->Request.Type.Direction != XFER_NONE)) {
5060                 status = -EINVAL;
5061                 goto cleanup1;
5062         }
5063         /* Check kmalloc limits  using all SGs */
5064         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
5065                 status = -EINVAL;
5066                 goto cleanup1;
5067         }
5068         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5069                 status = -EINVAL;
5070                 goto cleanup1;
5071         }
5072         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5073         if (!buff) {
5074                 status = -ENOMEM;
5075                 goto cleanup1;
5076         }
5077         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5078         if (!buff_size) {
5079                 status = -ENOMEM;
5080                 goto cleanup1;
5081         }
5082         left = ioc->buf_size;
5083         data_ptr = ioc->buf;
5084         while (left) {
5085                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
5086                 buff_size[sg_used] = sz;
5087                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
5088                 if (buff[sg_used] == NULL) {
5089                         status = -ENOMEM;
5090                         goto cleanup1;
5091                 }
5092                 if (ioc->Request.Type.Direction & XFER_WRITE) {
5093                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5094                                 status = -EFAULT;
5095                                 goto cleanup1;
5096                         }
5097                 } else
5098                         memset(buff[sg_used], 0, sz);
5099                 left -= sz;
5100                 data_ptr += sz;
5101                 sg_used++;
5102         }
5103         c = cmd_special_alloc(h);
5104         if (c == NULL) {
5105                 status = -ENOMEM;
5106                 goto cleanup1;
5107         }
5108         c->cmd_type = CMD_IOCTL_PEND;
5109         c->Header.ReplyQueue = 0;
5110         c->Header.SGList = c->Header.SGTotal = sg_used;
5111         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
5112         c->Header.Tag.lower = c->busaddr;
5113         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
5114         if (ioc->buf_size > 0) {
5115                 int i;
5116                 for (i = 0; i < sg_used; i++) {
5117                         temp64.val = pci_map_single(h->pdev, buff[i],
5118                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
5119                         if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
5120                                 c->SG[i].Addr.lower = 0;
5121                                 c->SG[i].Addr.upper = 0;
5122                                 c->SG[i].Len = 0;
5123                                 hpsa_pci_unmap(h->pdev, c, i,
5124                                         PCI_DMA_BIDIRECTIONAL);
5125                                 status = -ENOMEM;
5126                                 goto cleanup0;
5127                         }
5128                         c->SG[i].Addr.lower = temp64.val32.lower;
5129                         c->SG[i].Addr.upper = temp64.val32.upper;
5130                         c->SG[i].Len = buff_size[i];
5131                         c->SG[i].Ext = i < sg_used - 1 ? 0 : HPSA_SG_LAST;
5132                 }
5133         }
5134         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5135         if (sg_used)
5136                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5137         check_ioctl_unit_attention(h, c);
5138         /* Copy the error information out */
5139         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5140         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5141                 status = -EFAULT;
5142                 goto cleanup0;
5143         }
5144         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5145                 /* Copy the data out of the buffer we created */
5146                 BYTE __user *ptr = ioc->buf;
5147                 for (i = 0; i < sg_used; i++) {
5148                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5149                                 status = -EFAULT;
5150                                 goto cleanup0;
5151                         }
5152                         ptr += buff_size[i];
5153                 }
5154         }
5155         status = 0;
5156 cleanup0:
5157         cmd_special_free(h, c);
5158 cleanup1:
5159         if (buff) {
5160                 for (i = 0; i < sg_used; i++)
5161                         kfree(buff[i]);
5162                 kfree(buff);
5163         }
5164         kfree(buff_size);
5165         kfree(ioc);
5166         return status;
5167 }
5168
5169 static void check_ioctl_unit_attention(struct ctlr_info *h,
5170         struct CommandList *c)
5171 {
5172         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5173                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5174                 (void) check_for_unit_attention(h, c);
5175 }
5176
5177 static int increment_passthru_count(struct ctlr_info *h)
5178 {
5179         unsigned long flags;
5180
5181         spin_lock_irqsave(&h->passthru_count_lock, flags);
5182         if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) {
5183                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5184                 return -1;
5185         }
5186         h->passthru_count++;
5187         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5188         return 0;
5189 }
5190
5191 static void decrement_passthru_count(struct ctlr_info *h)
5192 {
5193         unsigned long flags;
5194
5195         spin_lock_irqsave(&h->passthru_count_lock, flags);
5196         if (h->passthru_count <= 0) {
5197                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5198                 /* not expecting to get here. */
5199                 dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n");
5200                 return;
5201         }
5202         h->passthru_count--;
5203         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5204 }
5205
5206 /*
5207  * ioctl
5208  */
5209 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
5210 {
5211         struct ctlr_info *h;
5212         void __user *argp = (void __user *)arg;
5213         int rc;
5214
5215         h = sdev_to_hba(dev);
5216
5217         switch (cmd) {
5218         case CCISS_DEREGDISK:
5219         case CCISS_REGNEWDISK:
5220         case CCISS_REGNEWD:
5221                 hpsa_scan_start(h->scsi_host);
5222                 return 0;
5223         case CCISS_GETPCIINFO:
5224                 return hpsa_getpciinfo_ioctl(h, argp);
5225         case CCISS_GETDRIVVER:
5226                 return hpsa_getdrivver_ioctl(h, argp);
5227         case CCISS_PASSTHRU:
5228                 if (increment_passthru_count(h))
5229                         return -EAGAIN;
5230                 rc = hpsa_passthru_ioctl(h, argp);
5231                 decrement_passthru_count(h);
5232                 return rc;
5233         case CCISS_BIG_PASSTHRU:
5234                 if (increment_passthru_count(h))
5235                         return -EAGAIN;
5236                 rc = hpsa_big_passthru_ioctl(h, argp);
5237                 decrement_passthru_count(h);
5238                 return rc;
5239         default:
5240                 return -ENOTTY;
5241         }
5242 }
5243
5244 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5245                                 u8 reset_type)
5246 {
5247         struct CommandList *c;
5248
5249         c = cmd_alloc(h);
5250         if (!c)
5251                 return -ENOMEM;
5252         /* fill_cmd can't fail here, no data buffer to map */
5253         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5254                 RAID_CTLR_LUNID, TYPE_MSG);
5255         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5256         c->waiting = NULL;
5257         enqueue_cmd_and_start_io(h, c);
5258         /* Don't wait for completion, the reset won't complete.  Don't free
5259          * the command either.  This is the last command we will send before
5260          * re-initializing everything, so it doesn't matter and won't leak.
5261          */
5262         return 0;
5263 }
5264
5265 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5266         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5267         int cmd_type)
5268 {
5269         int pci_dir = XFER_NONE;
5270         struct CommandList *a; /* for commands to be aborted */
5271
5272         c->cmd_type = CMD_IOCTL_PEND;
5273         c->Header.ReplyQueue = 0;
5274         if (buff != NULL && size > 0) {
5275                 c->Header.SGList = 1;
5276                 c->Header.SGTotal = 1;
5277         } else {
5278                 c->Header.SGList = 0;
5279                 c->Header.SGTotal = 0;
5280         }
5281         c->Header.Tag.lower = c->busaddr;
5282         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5283
5284         c->Request.Type.Type = cmd_type;
5285         if (cmd_type == TYPE_CMD) {
5286                 switch (cmd) {
5287                 case HPSA_INQUIRY:
5288                         /* are we trying to read a vital product page */
5289                         if (page_code & VPD_PAGE) {
5290                                 c->Request.CDB[1] = 0x01;
5291                                 c->Request.CDB[2] = (page_code & 0xff);
5292                         }
5293                         c->Request.CDBLen = 6;
5294                         c->Request.Type.Attribute = ATTR_SIMPLE;
5295                         c->Request.Type.Direction = XFER_READ;
5296                         c->Request.Timeout = 0;
5297                         c->Request.CDB[0] = HPSA_INQUIRY;
5298                         c->Request.CDB[4] = size & 0xFF;
5299                         break;
5300                 case HPSA_REPORT_LOG:
5301                 case HPSA_REPORT_PHYS:
5302                         /* Talking to controller so It's a physical command
5303                            mode = 00 target = 0.  Nothing to write.
5304                          */
5305                         c->Request.CDBLen = 12;
5306                         c->Request.Type.Attribute = ATTR_SIMPLE;
5307                         c->Request.Type.Direction = XFER_READ;
5308                         c->Request.Timeout = 0;
5309                         c->Request.CDB[0] = cmd;
5310                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5311                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5312                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5313                         c->Request.CDB[9] = size & 0xFF;
5314                         break;
5315                 case HPSA_CACHE_FLUSH:
5316                         c->Request.CDBLen = 12;
5317                         c->Request.Type.Attribute = ATTR_SIMPLE;
5318                         c->Request.Type.Direction = XFER_WRITE;
5319                         c->Request.Timeout = 0;
5320                         c->Request.CDB[0] = BMIC_WRITE;
5321                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5322                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5323                         c->Request.CDB[8] = size & 0xFF;
5324                         break;
5325                 case TEST_UNIT_READY:
5326                         c->Request.CDBLen = 6;
5327                         c->Request.Type.Attribute = ATTR_SIMPLE;
5328                         c->Request.Type.Direction = XFER_NONE;
5329                         c->Request.Timeout = 0;
5330                         break;
5331                 case HPSA_GET_RAID_MAP:
5332                         c->Request.CDBLen = 12;
5333                         c->Request.Type.Attribute = ATTR_SIMPLE;
5334                         c->Request.Type.Direction = XFER_READ;
5335                         c->Request.Timeout = 0;
5336                         c->Request.CDB[0] = HPSA_CISS_READ;
5337                         c->Request.CDB[1] = cmd;
5338                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5339                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5340                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5341                         c->Request.CDB[9] = size & 0xFF;
5342                         break;
5343                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5344                         c->Request.CDBLen = 10;
5345                         c->Request.Type.Attribute = ATTR_SIMPLE;
5346                         c->Request.Type.Direction = XFER_READ;
5347                         c->Request.Timeout = 0;
5348                         c->Request.CDB[0] = BMIC_READ;
5349                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
5350                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5351                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5352                         break;
5353                 default:
5354                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
5355                         BUG();
5356                         return -1;
5357                 }
5358         } else if (cmd_type == TYPE_MSG) {
5359                 switch (cmd) {
5360
5361                 case  HPSA_DEVICE_RESET_MSG:
5362                         c->Request.CDBLen = 16;
5363                         c->Request.Type.Type =  1; /* It is a MSG not a CMD */
5364                         c->Request.Type.Attribute = ATTR_SIMPLE;
5365                         c->Request.Type.Direction = XFER_NONE;
5366                         c->Request.Timeout = 0; /* Don't time out */
5367                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
5368                         c->Request.CDB[0] =  cmd;
5369                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5370                         /* If bytes 4-7 are zero, it means reset the */
5371                         /* LunID device */
5372                         c->Request.CDB[4] = 0x00;
5373                         c->Request.CDB[5] = 0x00;
5374                         c->Request.CDB[6] = 0x00;
5375                         c->Request.CDB[7] = 0x00;
5376                         break;
5377                 case  HPSA_ABORT_MSG:
5378                         a = buff;       /* point to command to be aborted */
5379                         dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
5380                                 a->Header.Tag.upper, a->Header.Tag.lower,
5381                                 c->Header.Tag.upper, c->Header.Tag.lower);
5382                         c->Request.CDBLen = 16;
5383                         c->Request.Type.Type = TYPE_MSG;
5384                         c->Request.Type.Attribute = ATTR_SIMPLE;
5385                         c->Request.Type.Direction = XFER_WRITE;
5386                         c->Request.Timeout = 0; /* Don't time out */
5387                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
5388                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
5389                         c->Request.CDB[2] = 0x00; /* reserved */
5390                         c->Request.CDB[3] = 0x00; /* reserved */
5391                         /* Tag to abort goes in CDB[4]-CDB[11] */
5392                         c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
5393                         c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
5394                         c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
5395                         c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
5396                         c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
5397                         c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
5398                         c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
5399                         c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
5400                         c->Request.CDB[12] = 0x00; /* reserved */
5401                         c->Request.CDB[13] = 0x00; /* reserved */
5402                         c->Request.CDB[14] = 0x00; /* reserved */
5403                         c->Request.CDB[15] = 0x00; /* reserved */
5404                 break;
5405                 default:
5406                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
5407                                 cmd);
5408                         BUG();
5409                 }
5410         } else {
5411                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
5412                 BUG();
5413         }
5414
5415         switch (c->Request.Type.Direction) {
5416         case XFER_READ:
5417                 pci_dir = PCI_DMA_FROMDEVICE;
5418                 break;
5419         case XFER_WRITE:
5420                 pci_dir = PCI_DMA_TODEVICE;
5421                 break;
5422         case XFER_NONE:
5423                 pci_dir = PCI_DMA_NONE;
5424                 break;
5425         default:
5426                 pci_dir = PCI_DMA_BIDIRECTIONAL;
5427         }
5428         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
5429                 return -1;
5430         return 0;
5431 }
5432
5433 /*
5434  * Map (physical) PCI mem into (virtual) kernel space
5435  */
5436 static void __iomem *remap_pci_mem(ulong base, ulong size)
5437 {
5438         ulong page_base = ((ulong) base) & PAGE_MASK;
5439         ulong page_offs = ((ulong) base) - page_base;
5440         void __iomem *page_remapped = ioremap_nocache(page_base,
5441                 page_offs + size);
5442
5443         return page_remapped ? (page_remapped + page_offs) : NULL;
5444 }
5445
5446 /* Takes cmds off the submission queue and sends them to the hardware,
5447  * then puts them on the queue of cmds waiting for completion.
5448  * Assumes h->lock is held
5449  */
5450 static void start_io(struct ctlr_info *h, unsigned long *flags)
5451 {
5452         struct CommandList *c;
5453
5454         while (!list_empty(&h->reqQ)) {
5455                 c = list_entry(h->reqQ.next, struct CommandList, list);
5456                 /* can't do anything if fifo is full */
5457                 if ((h->access.fifo_full(h))) {
5458                         h->fifo_recently_full = 1;
5459                         dev_warn(&h->pdev->dev, "fifo full\n");
5460                         break;
5461                 }
5462                 h->fifo_recently_full = 0;
5463
5464                 /* Get the first entry from the Request Q */
5465                 removeQ(c);
5466                 h->Qdepth--;
5467
5468                 /* Put job onto the completed Q */
5469                 addQ(&h->cmpQ, c);
5470
5471                 /* Must increment commands_outstanding before unlocking
5472                  * and submitting to avoid race checking for fifo full
5473                  * condition.
5474                  */
5475                 h->commands_outstanding++;
5476
5477                 /* Tell the controller execute command */
5478                 spin_unlock_irqrestore(&h->lock, *flags);
5479                 h->access.submit_command(h, c);
5480                 spin_lock_irqsave(&h->lock, *flags);
5481         }
5482 }
5483
5484 static void lock_and_start_io(struct ctlr_info *h)
5485 {
5486         unsigned long flags;
5487
5488         spin_lock_irqsave(&h->lock, flags);
5489         start_io(h, &flags);
5490         spin_unlock_irqrestore(&h->lock, flags);
5491 }
5492
5493 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5494 {
5495         return h->access.command_completed(h, q);
5496 }
5497
5498 static inline bool interrupt_pending(struct ctlr_info *h)
5499 {
5500         return h->access.intr_pending(h);
5501 }
5502
5503 static inline long interrupt_not_for_us(struct ctlr_info *h)
5504 {
5505         return (h->access.intr_pending(h) == 0) ||
5506                 (h->interrupts_enabled == 0);
5507 }
5508
5509 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
5510         u32 raw_tag)
5511 {
5512         if (unlikely(tag_index >= h->nr_cmds)) {
5513                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
5514                 return 1;
5515         }
5516         return 0;
5517 }
5518
5519 static inline void finish_cmd(struct CommandList *c)
5520 {
5521         unsigned long flags;
5522         int io_may_be_stalled = 0;
5523         struct ctlr_info *h = c->h;
5524
5525         spin_lock_irqsave(&h->lock, flags);
5526         removeQ(c);
5527
5528         /*
5529          * Check for possibly stalled i/o.
5530          *
5531          * If a fifo_full condition is encountered, requests will back up
5532          * in h->reqQ.  This queue is only emptied out by start_io which is
5533          * only called when a new i/o request comes in.  If no i/o's are
5534          * forthcoming, the i/o's in h->reqQ can get stuck.  So we call
5535          * start_io from here if we detect such a danger.
5536          *
5537          * Normally, we shouldn't hit this case, but pounding on the
5538          * CCISS_PASSTHRU ioctl can provoke it.  Only call start_io if
5539          * commands_outstanding is low.  We want to avoid calling
5540          * start_io from in here as much as possible, and esp. don't
5541          * want to get in a cycle where we call start_io every time
5542          * through here.
5543          */
5544         if (unlikely(h->fifo_recently_full) &&
5545                 h->commands_outstanding < 5)
5546                 io_may_be_stalled = 1;
5547
5548         spin_unlock_irqrestore(&h->lock, flags);
5549
5550         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5551         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
5552                         || c->cmd_type == CMD_IOACCEL2))
5553                 complete_scsi_command(c);
5554         else if (c->cmd_type == CMD_IOCTL_PEND)
5555                 complete(c->waiting);
5556         if (unlikely(io_may_be_stalled))
5557                 lock_and_start_io(h);
5558 }
5559
5560 static inline u32 hpsa_tag_contains_index(u32 tag)
5561 {
5562         return tag & DIRECT_LOOKUP_BIT;
5563 }
5564
5565 static inline u32 hpsa_tag_to_index(u32 tag)
5566 {
5567         return tag >> DIRECT_LOOKUP_SHIFT;
5568 }
5569
5570
5571 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5572 {
5573 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
5574 #define HPSA_SIMPLE_ERROR_BITS 0x03
5575         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5576                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
5577         return tag & ~HPSA_PERF_ERROR_BITS;
5578 }
5579
5580 /* process completion of an indexed ("direct lookup") command */
5581 static inline void process_indexed_cmd(struct ctlr_info *h,
5582         u32 raw_tag)
5583 {
5584         u32 tag_index;
5585         struct CommandList *c;
5586
5587         tag_index = hpsa_tag_to_index(raw_tag);
5588         if (!bad_tag(h, tag_index, raw_tag)) {
5589                 c = h->cmd_pool + tag_index;
5590                 finish_cmd(c);
5591         }
5592 }
5593
5594 /* process completion of a non-indexed command */
5595 static inline void process_nonindexed_cmd(struct ctlr_info *h,
5596         u32 raw_tag)
5597 {
5598         u32 tag;
5599         struct CommandList *c = NULL;
5600         unsigned long flags;
5601
5602         tag = hpsa_tag_discard_error_bits(h, raw_tag);
5603         spin_lock_irqsave(&h->lock, flags);
5604         list_for_each_entry(c, &h->cmpQ, list) {
5605                 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
5606                         spin_unlock_irqrestore(&h->lock, flags);
5607                         finish_cmd(c);
5608                         return;
5609                 }
5610         }
5611         spin_unlock_irqrestore(&h->lock, flags);
5612         bad_tag(h, h->nr_cmds + 1, raw_tag);
5613 }
5614
5615 /* Some controllers, like p400, will give us one interrupt
5616  * after a soft reset, even if we turned interrupts off.
5617  * Only need to check for this in the hpsa_xxx_discard_completions
5618  * functions.
5619  */
5620 static int ignore_bogus_interrupt(struct ctlr_info *h)
5621 {
5622         if (likely(!reset_devices))
5623                 return 0;
5624
5625         if (likely(h->interrupts_enabled))
5626                 return 0;
5627
5628         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
5629                 "(known firmware bug.)  Ignoring.\n");
5630
5631         return 1;
5632 }
5633
5634 /*
5635  * Convert &h->q[x] (passed to interrupt handlers) back to h.
5636  * Relies on (h-q[x] == x) being true for x such that
5637  * 0 <= x < MAX_REPLY_QUEUES.
5638  */
5639 static struct ctlr_info *queue_to_hba(u8 *queue)
5640 {
5641         return container_of((queue - *queue), struct ctlr_info, q[0]);
5642 }
5643
5644 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
5645 {
5646         struct ctlr_info *h = queue_to_hba(queue);
5647         u8 q = *(u8 *) queue;
5648         u32 raw_tag;
5649
5650         if (ignore_bogus_interrupt(h))
5651                 return IRQ_NONE;
5652
5653         if (interrupt_not_for_us(h))
5654                 return IRQ_NONE;
5655         h->last_intr_timestamp = get_jiffies_64();
5656         while (interrupt_pending(h)) {
5657                 raw_tag = get_next_completion(h, q);
5658                 while (raw_tag != FIFO_EMPTY)
5659                         raw_tag = next_command(h, q);
5660         }
5661         return IRQ_HANDLED;
5662 }
5663
5664 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5665 {
5666         struct ctlr_info *h = queue_to_hba(queue);
5667         u32 raw_tag;
5668         u8 q = *(u8 *) queue;
5669
5670         if (ignore_bogus_interrupt(h))
5671                 return IRQ_NONE;
5672
5673         h->last_intr_timestamp = get_jiffies_64();
5674         raw_tag = get_next_completion(h, q);
5675         while (raw_tag != FIFO_EMPTY)
5676                 raw_tag = next_command(h, q);
5677         return IRQ_HANDLED;
5678 }
5679
5680 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5681 {
5682         struct ctlr_info *h = queue_to_hba((u8 *) queue);
5683         u32 raw_tag;
5684         u8 q = *(u8 *) queue;
5685
5686         if (interrupt_not_for_us(h))
5687                 return IRQ_NONE;
5688         h->last_intr_timestamp = get_jiffies_64();
5689         while (interrupt_pending(h)) {
5690                 raw_tag = get_next_completion(h, q);
5691                 while (raw_tag != FIFO_EMPTY) {
5692                         if (likely(hpsa_tag_contains_index(raw_tag)))
5693                                 process_indexed_cmd(h, raw_tag);
5694                         else
5695                                 process_nonindexed_cmd(h, raw_tag);
5696                         raw_tag = next_command(h, q);
5697                 }
5698         }
5699         return IRQ_HANDLED;
5700 }
5701
5702 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5703 {
5704         struct ctlr_info *h = queue_to_hba(queue);
5705         u32 raw_tag;
5706         u8 q = *(u8 *) queue;
5707
5708         h->last_intr_timestamp = get_jiffies_64();
5709         raw_tag = get_next_completion(h, q);
5710         while (raw_tag != FIFO_EMPTY) {
5711                 if (likely(hpsa_tag_contains_index(raw_tag)))
5712                         process_indexed_cmd(h, raw_tag);
5713                 else
5714                         process_nonindexed_cmd(h, raw_tag);
5715                 raw_tag = next_command(h, q);
5716         }
5717         return IRQ_HANDLED;
5718 }
5719
5720 /* Send a message CDB to the firmware. Careful, this only works
5721  * in simple mode, not performant mode due to the tag lookup.
5722  * We only ever use this immediately after a controller reset.
5723  */
5724 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
5725                         unsigned char type)
5726 {
5727         struct Command {
5728                 struct CommandListHeader CommandHeader;
5729                 struct RequestBlock Request;
5730                 struct ErrDescriptor ErrorDescriptor;
5731         };
5732         struct Command *cmd;
5733         static const size_t cmd_sz = sizeof(*cmd) +
5734                                         sizeof(cmd->ErrorDescriptor);
5735         dma_addr_t paddr64;
5736         uint32_t paddr32, tag;
5737         void __iomem *vaddr;
5738         int i, err;
5739
5740         vaddr = pci_ioremap_bar(pdev, 0);
5741         if (vaddr == NULL)
5742                 return -ENOMEM;
5743
5744         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
5745          * CCISS commands, so they must be allocated from the lower 4GiB of
5746          * memory.
5747          */
5748         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5749         if (err) {
5750                 iounmap(vaddr);
5751                 return -ENOMEM;
5752         }
5753
5754         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
5755         if (cmd == NULL) {
5756                 iounmap(vaddr);
5757                 return -ENOMEM;
5758         }
5759
5760         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
5761          * although there's no guarantee, we assume that the address is at
5762          * least 4-byte aligned (most likely, it's page-aligned).
5763          */
5764         paddr32 = paddr64;
5765
5766         cmd->CommandHeader.ReplyQueue = 0;
5767         cmd->CommandHeader.SGList = 0;
5768         cmd->CommandHeader.SGTotal = 0;
5769         cmd->CommandHeader.Tag.lower = paddr32;
5770         cmd->CommandHeader.Tag.upper = 0;
5771         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
5772
5773         cmd->Request.CDBLen = 16;
5774         cmd->Request.Type.Type = TYPE_MSG;
5775         cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
5776         cmd->Request.Type.Direction = XFER_NONE;
5777         cmd->Request.Timeout = 0; /* Don't time out */
5778         cmd->Request.CDB[0] = opcode;
5779         cmd->Request.CDB[1] = type;
5780         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
5781         cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
5782         cmd->ErrorDescriptor.Addr.upper = 0;
5783         cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
5784
5785         writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
5786
5787         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
5788                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
5789                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
5790                         break;
5791                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
5792         }
5793
5794         iounmap(vaddr);
5795
5796         /* we leak the DMA buffer here ... no choice since the controller could
5797          *  still complete the command.
5798          */
5799         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
5800                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
5801                         opcode, type);
5802                 return -ETIMEDOUT;
5803         }
5804
5805         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
5806
5807         if (tag & HPSA_ERROR_BIT) {
5808                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
5809                         opcode, type);
5810                 return -EIO;
5811         }
5812
5813         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
5814                 opcode, type);
5815         return 0;
5816 }
5817
5818 #define hpsa_noop(p) hpsa_message(p, 3, 0)
5819
5820 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
5821         void * __iomem vaddr, u32 use_doorbell)
5822 {
5823         u16 pmcsr;
5824         int pos;
5825
5826         if (use_doorbell) {
5827                 /* For everything after the P600, the PCI power state method
5828                  * of resetting the controller doesn't work, so we have this
5829                  * other way using the doorbell register.
5830                  */
5831                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
5832                 writel(use_doorbell, vaddr + SA5_DOORBELL);
5833
5834                 /* PMC hardware guys tell us we need a 10 second delay after
5835                  * doorbell reset and before any attempt to talk to the board
5836                  * at all to ensure that this actually works and doesn't fall
5837                  * over in some weird corner cases.
5838                  */
5839                 msleep(10000);
5840         } else { /* Try to do it the PCI power state way */
5841
5842                 /* Quoting from the Open CISS Specification: "The Power
5843                  * Management Control/Status Register (CSR) controls the power
5844                  * state of the device.  The normal operating state is D0,
5845                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
5846                  * the controller, place the interface device in D3 then to D0,
5847                  * this causes a secondary PCI reset which will reset the
5848                  * controller." */
5849
5850                 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
5851                 if (pos == 0) {
5852                         dev_err(&pdev->dev,
5853                                 "hpsa_reset_controller: "
5854                                 "PCI PM not supported\n");
5855                         return -ENODEV;
5856                 }
5857                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
5858                 /* enter the D3hot power management state */
5859                 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
5860                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
5861                 pmcsr |= PCI_D3hot;
5862                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
5863
5864                 msleep(500);
5865
5866                 /* enter the D0 power management state */
5867                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
5868                 pmcsr |= PCI_D0;
5869                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
5870
5871                 /*
5872                  * The P600 requires a small delay when changing states.
5873                  * Otherwise we may think the board did not reset and we bail.
5874                  * This for kdump only and is particular to the P600.
5875                  */
5876                 msleep(500);
5877         }
5878         return 0;
5879 }
5880
5881 static void init_driver_version(char *driver_version, int len)
5882 {
5883         memset(driver_version, 0, len);
5884         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
5885 }
5886
5887 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
5888 {
5889         char *driver_version;
5890         int i, size = sizeof(cfgtable->driver_version);
5891
5892         driver_version = kmalloc(size, GFP_KERNEL);
5893         if (!driver_version)
5894                 return -ENOMEM;
5895
5896         init_driver_version(driver_version, size);
5897         for (i = 0; i < size; i++)
5898                 writeb(driver_version[i], &cfgtable->driver_version[i]);
5899         kfree(driver_version);
5900         return 0;
5901 }
5902
5903 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
5904                                           unsigned char *driver_ver)
5905 {
5906         int i;
5907
5908         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
5909                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
5910 }
5911
5912 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
5913 {
5914
5915         char *driver_ver, *old_driver_ver;
5916         int rc, size = sizeof(cfgtable->driver_version);
5917
5918         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
5919         if (!old_driver_ver)
5920                 return -ENOMEM;
5921         driver_ver = old_driver_ver + size;
5922
5923         /* After a reset, the 32 bytes of "driver version" in the cfgtable
5924          * should have been changed, otherwise we know the reset failed.
5925          */
5926         init_driver_version(old_driver_ver, size);
5927         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
5928         rc = !memcmp(driver_ver, old_driver_ver, size);
5929         kfree(old_driver_ver);
5930         return rc;
5931 }
5932 /* This does a hard reset of the controller using PCI power management
5933  * states or the using the doorbell register.
5934  */
5935 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
5936 {
5937         u64 cfg_offset;
5938         u32 cfg_base_addr;
5939         u64 cfg_base_addr_index;
5940         void __iomem *vaddr;
5941         unsigned long paddr;
5942         u32 misc_fw_support;
5943         int rc;
5944         struct CfgTable __iomem *cfgtable;
5945         u32 use_doorbell;
5946         u32 board_id;
5947         u16 command_register;
5948
5949         /* For controllers as old as the P600, this is very nearly
5950          * the same thing as
5951          *
5952          * pci_save_state(pci_dev);
5953          * pci_set_power_state(pci_dev, PCI_D3hot);
5954          * pci_set_power_state(pci_dev, PCI_D0);
5955          * pci_restore_state(pci_dev);
5956          *
5957          * For controllers newer than the P600, the pci power state
5958          * method of resetting doesn't work so we have another way
5959          * using the doorbell register.
5960          */
5961
5962         rc = hpsa_lookup_board_id(pdev, &board_id);
5963         if (rc < 0 || !ctlr_is_resettable(board_id)) {
5964                 dev_warn(&pdev->dev, "Not resetting device.\n");
5965                 return -ENODEV;
5966         }
5967
5968         /* if controller is soft- but not hard resettable... */
5969         if (!ctlr_is_hard_resettable(board_id))
5970                 return -ENOTSUPP; /* try soft reset later. */
5971
5972         /* Save the PCI command register */
5973         pci_read_config_word(pdev, 4, &command_register);
5974         pci_save_state(pdev);
5975
5976         /* find the first memory BAR, so we can find the cfg table */
5977         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
5978         if (rc)
5979                 return rc;
5980         vaddr = remap_pci_mem(paddr, 0x250);
5981         if (!vaddr)
5982                 return -ENOMEM;
5983
5984         /* find cfgtable in order to check if reset via doorbell is supported */
5985         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
5986                                         &cfg_base_addr_index, &cfg_offset);
5987         if (rc)
5988                 goto unmap_vaddr;
5989         cfgtable = remap_pci_mem(pci_resource_start(pdev,
5990                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
5991         if (!cfgtable) {
5992                 rc = -ENOMEM;
5993                 goto unmap_vaddr;
5994         }
5995         rc = write_driver_ver_to_cfgtable(cfgtable);
5996         if (rc)
5997                 goto unmap_vaddr;
5998
5999         /* If reset via doorbell register is supported, use that.
6000          * There are two such methods.  Favor the newest method.
6001          */
6002         misc_fw_support = readl(&cfgtable->misc_fw_support);
6003         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6004         if (use_doorbell) {
6005                 use_doorbell = DOORBELL_CTLR_RESET2;
6006         } else {
6007                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6008                 if (use_doorbell) {
6009                         dev_warn(&pdev->dev, "Soft reset not supported. "
6010                                 "Firmware update is required.\n");
6011                         rc = -ENOTSUPP; /* try soft reset */
6012                         goto unmap_cfgtable;
6013                 }
6014         }
6015
6016         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6017         if (rc)
6018                 goto unmap_cfgtable;
6019
6020         pci_restore_state(pdev);
6021         pci_write_config_word(pdev, 4, command_register);
6022
6023         /* Some devices (notably the HP Smart Array 5i Controller)
6024            need a little pause here */
6025         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6026
6027         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6028         if (rc) {
6029                 dev_warn(&pdev->dev,
6030                         "failed waiting for board to become ready "
6031                         "after hard reset\n");
6032                 goto unmap_cfgtable;
6033         }
6034
6035         rc = controller_reset_failed(vaddr);
6036         if (rc < 0)
6037                 goto unmap_cfgtable;
6038         if (rc) {
6039                 dev_warn(&pdev->dev, "Unable to successfully reset "
6040                         "controller. Will try soft reset.\n");
6041                 rc = -ENOTSUPP;
6042         } else {
6043                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6044         }
6045
6046 unmap_cfgtable:
6047         iounmap(cfgtable);
6048
6049 unmap_vaddr:
6050         iounmap(vaddr);
6051         return rc;
6052 }
6053
6054 /*
6055  *  We cannot read the structure directly, for portability we must use
6056  *   the io functions.
6057  *   This is for debug only.
6058  */
6059 static void print_cfg_table(struct device *dev, struct CfgTable *tb)
6060 {
6061 #ifdef HPSA_DEBUG
6062         int i;
6063         char temp_name[17];
6064
6065         dev_info(dev, "Controller Configuration information\n");
6066         dev_info(dev, "------------------------------------\n");
6067         for (i = 0; i < 4; i++)
6068                 temp_name[i] = readb(&(tb->Signature[i]));
6069         temp_name[4] = '\0';
6070         dev_info(dev, "   Signature = %s\n", temp_name);
6071         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6072         dev_info(dev, "   Transport methods supported = 0x%x\n",
6073                readl(&(tb->TransportSupport)));
6074         dev_info(dev, "   Transport methods active = 0x%x\n",
6075                readl(&(tb->TransportActive)));
6076         dev_info(dev, "   Requested transport Method = 0x%x\n",
6077                readl(&(tb->HostWrite.TransportRequest)));
6078         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6079                readl(&(tb->HostWrite.CoalIntDelay)));
6080         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6081                readl(&(tb->HostWrite.CoalIntCount)));
6082         dev_info(dev, "   Max outstanding commands = 0x%d\n",
6083                readl(&(tb->CmdsOutMax)));
6084         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6085         for (i = 0; i < 16; i++)
6086                 temp_name[i] = readb(&(tb->ServerName[i]));
6087         temp_name[16] = '\0';
6088         dev_info(dev, "   Server Name = %s\n", temp_name);
6089         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6090                 readl(&(tb->HeartBeat)));
6091 #endif                          /* HPSA_DEBUG */
6092 }
6093
6094 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6095 {
6096         int i, offset, mem_type, bar_type;
6097
6098         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6099                 return 0;
6100         offset = 0;
6101         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6102                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6103                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6104                         offset += 4;
6105                 else {
6106                         mem_type = pci_resource_flags(pdev, i) &
6107                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6108                         switch (mem_type) {
6109                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6110                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6111                                 offset += 4;    /* 32 bit */
6112                                 break;
6113                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6114                                 offset += 8;
6115                                 break;
6116                         default:        /* reserved in PCI 2.2 */
6117                                 dev_warn(&pdev->dev,
6118                                        "base address is invalid\n");
6119                                 return -1;
6120                                 break;
6121                         }
6122                 }
6123                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6124                         return i + 1;
6125         }
6126         return -1;
6127 }
6128
6129 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6130  * controllers that are capable. If not, we use IO-APIC mode.
6131  */
6132
6133 static void hpsa_interrupt_mode(struct ctlr_info *h)
6134 {
6135 #ifdef CONFIG_PCI_MSI
6136         int err, i;
6137         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6138
6139         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6140                 hpsa_msix_entries[i].vector = 0;
6141                 hpsa_msix_entries[i].entry = i;
6142         }
6143
6144         /* Some boards advertise MSI but don't really support it */
6145         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6146             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6147                 goto default_int_mode;
6148         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6149                 dev_info(&h->pdev->dev, "MSIX\n");
6150                 h->msix_vector = MAX_REPLY_QUEUES;
6151                 if (h->msix_vector > num_online_cpus())
6152                         h->msix_vector = num_online_cpus();
6153                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
6154                                             1, h->msix_vector);
6155                 if (err < 0) {
6156                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
6157                         h->msix_vector = 0;
6158                         goto single_msi_mode;
6159                 } else if (err < h->msix_vector) {
6160                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6161                                "available\n", err);
6162                 }
6163                 h->msix_vector = err;
6164                 for (i = 0; i < h->msix_vector; i++)
6165                         h->intr[i] = hpsa_msix_entries[i].vector;
6166                 return;
6167         }
6168 single_msi_mode:
6169         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6170                 dev_info(&h->pdev->dev, "MSI\n");
6171                 if (!pci_enable_msi(h->pdev))
6172                         h->msi_vector = 1;
6173                 else
6174                         dev_warn(&h->pdev->dev, "MSI init failed\n");
6175         }
6176 default_int_mode:
6177 #endif                          /* CONFIG_PCI_MSI */
6178         /* if we get here we're going to use the default interrupt mode */
6179         h->intr[h->intr_mode] = h->pdev->irq;
6180 }
6181
6182 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6183 {
6184         int i;
6185         u32 subsystem_vendor_id, subsystem_device_id;
6186
6187         subsystem_vendor_id = pdev->subsystem_vendor;
6188         subsystem_device_id = pdev->subsystem_device;
6189         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
6190                     subsystem_vendor_id;
6191
6192         for (i = 0; i < ARRAY_SIZE(products); i++)
6193                 if (*board_id == products[i].board_id)
6194                         return i;
6195
6196         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
6197                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
6198                 !hpsa_allow_any) {
6199                 dev_warn(&pdev->dev, "unrecognized board ID: "
6200                         "0x%08x, ignoring.\n", *board_id);
6201                         return -ENODEV;
6202         }
6203         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6204 }
6205
6206 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6207                                     unsigned long *memory_bar)
6208 {
6209         int i;
6210
6211         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6212                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6213                         /* addressing mode bits already removed */
6214                         *memory_bar = pci_resource_start(pdev, i);
6215                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6216                                 *memory_bar);
6217                         return 0;
6218                 }
6219         dev_warn(&pdev->dev, "no memory BAR found\n");
6220         return -ENODEV;
6221 }
6222
6223 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6224                                      int wait_for_ready)
6225 {
6226         int i, iterations;
6227         u32 scratchpad;
6228         if (wait_for_ready)
6229                 iterations = HPSA_BOARD_READY_ITERATIONS;
6230         else
6231                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6232
6233         for (i = 0; i < iterations; i++) {
6234                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6235                 if (wait_for_ready) {
6236                         if (scratchpad == HPSA_FIRMWARE_READY)
6237                                 return 0;
6238                 } else {
6239                         if (scratchpad != HPSA_FIRMWARE_READY)
6240                                 return 0;
6241                 }
6242                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6243         }
6244         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6245         return -ENODEV;
6246 }
6247
6248 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6249                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6250                                u64 *cfg_offset)
6251 {
6252         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6253         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6254         *cfg_base_addr &= (u32) 0x0000ffff;
6255         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6256         if (*cfg_base_addr_index == -1) {
6257                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6258                 return -ENODEV;
6259         }
6260         return 0;
6261 }
6262
6263 static int hpsa_find_cfgtables(struct ctlr_info *h)
6264 {
6265         u64 cfg_offset;
6266         u32 cfg_base_addr;
6267         u64 cfg_base_addr_index;
6268         u32 trans_offset;
6269         int rc;
6270
6271         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6272                 &cfg_base_addr_index, &cfg_offset);
6273         if (rc)
6274                 return rc;
6275         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6276                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6277         if (!h->cfgtable)
6278                 return -ENOMEM;
6279         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6280         if (rc)
6281                 return rc;
6282         /* Find performant mode table. */
6283         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6284         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6285                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6286                                 sizeof(*h->transtable));
6287         if (!h->transtable)
6288                 return -ENOMEM;
6289         return 0;
6290 }
6291
6292 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6293 {
6294         h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
6295
6296         /* Limit commands in memory limited kdump scenario. */
6297         if (reset_devices && h->max_commands > 32)
6298                 h->max_commands = 32;
6299
6300         if (h->max_commands < 16) {
6301                 dev_warn(&h->pdev->dev, "Controller reports "
6302                         "max supported commands of %d, an obvious lie. "
6303                         "Using 16.  Ensure that firmware is up to date.\n",
6304                         h->max_commands);
6305                 h->max_commands = 16;
6306         }
6307 }
6308
6309 /* Interrogate the hardware for some limits:
6310  * max commands, max SG elements without chaining, and with chaining,
6311  * SG chain block size, etc.
6312  */
6313 static void hpsa_find_board_params(struct ctlr_info *h)
6314 {
6315         hpsa_get_max_perf_mode_cmds(h);
6316         h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
6317         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6318         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6319         /*
6320          * Limit in-command s/g elements to 32 save dma'able memory.
6321          * Howvever spec says if 0, use 31
6322          */
6323         h->max_cmd_sg_entries = 31;
6324         if (h->maxsgentries > 512) {
6325                 h->max_cmd_sg_entries = 32;
6326                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
6327                 h->maxsgentries--; /* save one for chain pointer */
6328         } else {
6329                 h->maxsgentries = 31; /* default to traditional values */
6330                 h->chainsize = 0;
6331         }
6332
6333         /* Find out what task management functions are supported and cache */
6334         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6335         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6336                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6337         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6338                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6339 }
6340
6341 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6342 {
6343         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6344                 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
6345                 return false;
6346         }
6347         return true;
6348 }
6349
6350 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6351 {
6352         u32 driver_support;
6353
6354         driver_support = readl(&(h->cfgtable->driver_support));
6355         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6356 #ifdef CONFIG_X86
6357         driver_support |= ENABLE_SCSI_PREFETCH;
6358 #endif
6359         driver_support |= ENABLE_UNIT_ATTN;
6360         writel(driver_support, &(h->cfgtable->driver_support));
6361 }
6362
6363 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6364  * in a prefetch beyond physical memory.
6365  */
6366 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6367 {
6368         u32 dma_prefetch;
6369
6370         if (h->board_id != 0x3225103C)
6371                 return;
6372         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6373         dma_prefetch |= 0x8000;
6374         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6375 }
6376
6377 static void hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6378 {
6379         int i;
6380         u32 doorbell_value;
6381         unsigned long flags;
6382         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6383         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6384                 spin_lock_irqsave(&h->lock, flags);
6385                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6386                 spin_unlock_irqrestore(&h->lock, flags);
6387                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6388                         break;
6389                 /* delay and try again */
6390                 msleep(20);
6391         }
6392 }
6393
6394 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6395 {
6396         int i;
6397         u32 doorbell_value;
6398         unsigned long flags;
6399
6400         /* under certain very rare conditions, this can take awhile.
6401          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6402          * as we enter this code.)
6403          */
6404         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6405                 spin_lock_irqsave(&h->lock, flags);
6406                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6407                 spin_unlock_irqrestore(&h->lock, flags);
6408                 if (!(doorbell_value & CFGTBL_ChangeReq))
6409                         break;
6410                 /* delay and try again */
6411                 usleep_range(10000, 20000);
6412         }
6413 }
6414
6415 static int hpsa_enter_simple_mode(struct ctlr_info *h)
6416 {
6417         u32 trans_support;
6418
6419         trans_support = readl(&(h->cfgtable->TransportSupport));
6420         if (!(trans_support & SIMPLE_MODE))
6421                 return -ENOTSUPP;
6422
6423         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6424
6425         /* Update the field, and then ring the doorbell */
6426         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6427         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6428         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6429         hpsa_wait_for_mode_change_ack(h);
6430         print_cfg_table(&h->pdev->dev, h->cfgtable);
6431         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
6432                 goto error;
6433         h->transMethod = CFGTBL_Trans_Simple;
6434         return 0;
6435 error:
6436         dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
6437         return -ENODEV;
6438 }
6439
6440 static int hpsa_pci_init(struct ctlr_info *h)
6441 {
6442         int prod_index, err;
6443
6444         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
6445         if (prod_index < 0)
6446                 return -ENODEV;
6447         h->product_name = products[prod_index].product_name;
6448         h->access = *(products[prod_index].access);
6449
6450         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
6451                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
6452
6453         err = pci_enable_device(h->pdev);
6454         if (err) {
6455                 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6456                 return err;
6457         }
6458
6459         /* Enable bus mastering (pci_disable_device may disable this) */
6460         pci_set_master(h->pdev);
6461
6462         err = pci_request_regions(h->pdev, HPSA);
6463         if (err) {
6464                 dev_err(&h->pdev->dev,
6465                         "cannot obtain PCI resources, aborting\n");
6466                 return err;
6467         }
6468         hpsa_interrupt_mode(h);
6469         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6470         if (err)
6471                 goto err_out_free_res;
6472         h->vaddr = remap_pci_mem(h->paddr, 0x250);
6473         if (!h->vaddr) {
6474                 err = -ENOMEM;
6475                 goto err_out_free_res;
6476         }
6477         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6478         if (err)
6479                 goto err_out_free_res;
6480         err = hpsa_find_cfgtables(h);
6481         if (err)
6482                 goto err_out_free_res;
6483         hpsa_find_board_params(h);
6484
6485         if (!hpsa_CISS_signature_present(h)) {
6486                 err = -ENODEV;
6487                 goto err_out_free_res;
6488         }
6489         hpsa_set_driver_support_bits(h);
6490         hpsa_p600_dma_prefetch_quirk(h);
6491         err = hpsa_enter_simple_mode(h);
6492         if (err)
6493                 goto err_out_free_res;
6494         return 0;
6495
6496 err_out_free_res:
6497         if (h->transtable)
6498                 iounmap(h->transtable);
6499         if (h->cfgtable)
6500                 iounmap(h->cfgtable);
6501         if (h->vaddr)
6502                 iounmap(h->vaddr);
6503         pci_disable_device(h->pdev);
6504         pci_release_regions(h->pdev);
6505         return err;
6506 }
6507
6508 static void hpsa_hba_inquiry(struct ctlr_info *h)
6509 {
6510         int rc;
6511
6512 #define HBA_INQUIRY_BYTE_COUNT 64
6513         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
6514         if (!h->hba_inquiry_data)
6515                 return;
6516         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
6517                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
6518         if (rc != 0) {
6519                 kfree(h->hba_inquiry_data);
6520                 h->hba_inquiry_data = NULL;
6521         }
6522 }
6523
6524 static int hpsa_init_reset_devices(struct pci_dev *pdev)
6525 {
6526         int rc, i;
6527
6528         if (!reset_devices)
6529                 return 0;
6530
6531         /* kdump kernel is loading, we don't know in which state is
6532          * the pci interface. The dev->enable_cnt is equal zero
6533          * so we call enable+disable, wait a while and switch it on.
6534          */
6535         rc = pci_enable_device(pdev);
6536         if (rc) {
6537                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
6538                 return -ENODEV;
6539         }
6540         pci_disable_device(pdev);
6541         msleep(260);                    /* a randomly chosen number */
6542         rc = pci_enable_device(pdev);
6543         if (rc) {
6544                 dev_warn(&pdev->dev, "failed to enable device.\n");
6545                 return -ENODEV;
6546         }
6547         pci_set_master(pdev);
6548         /* Reset the controller with a PCI power-cycle or via doorbell */
6549         rc = hpsa_kdump_hard_reset_controller(pdev);
6550
6551         /* -ENOTSUPP here means we cannot reset the controller
6552          * but it's already (and still) up and running in
6553          * "performant mode".  Or, it might be 640x, which can't reset
6554          * due to concerns about shared bbwc between 6402/6404 pair.
6555          */
6556         if (rc) {
6557                 if (rc != -ENOTSUPP) /* just try to do the kdump anyhow. */
6558                         rc = -ENODEV;
6559                 goto out_disable;
6560         }
6561
6562         /* Now try to get the controller to respond to a no-op */
6563         dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
6564         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
6565                 if (hpsa_noop(pdev) == 0)
6566                         break;
6567                 else
6568                         dev_warn(&pdev->dev, "no-op failed%s\n",
6569                                         (i < 11 ? "; re-trying" : ""));
6570         }
6571
6572 out_disable:
6573
6574         pci_disable_device(pdev);
6575         return rc;
6576 }
6577
6578 static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
6579 {
6580         h->cmd_pool_bits = kzalloc(
6581                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
6582                 sizeof(unsigned long), GFP_KERNEL);
6583         h->cmd_pool = pci_alloc_consistent(h->pdev,
6584                     h->nr_cmds * sizeof(*h->cmd_pool),
6585                     &(h->cmd_pool_dhandle));
6586         h->errinfo_pool = pci_alloc_consistent(h->pdev,
6587                     h->nr_cmds * sizeof(*h->errinfo_pool),
6588                     &(h->errinfo_pool_dhandle));
6589         if ((h->cmd_pool_bits == NULL)
6590             || (h->cmd_pool == NULL)
6591             || (h->errinfo_pool == NULL)) {
6592                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6593                 return -ENOMEM;
6594         }
6595         return 0;
6596 }
6597
6598 static void hpsa_free_cmd_pool(struct ctlr_info *h)
6599 {
6600         kfree(h->cmd_pool_bits);
6601         if (h->cmd_pool)
6602                 pci_free_consistent(h->pdev,
6603                             h->nr_cmds * sizeof(struct CommandList),
6604                             h->cmd_pool, h->cmd_pool_dhandle);
6605         if (h->ioaccel2_cmd_pool)
6606                 pci_free_consistent(h->pdev,
6607                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
6608                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6609         if (h->errinfo_pool)
6610                 pci_free_consistent(h->pdev,
6611                             h->nr_cmds * sizeof(struct ErrorInfo),
6612                             h->errinfo_pool,
6613                             h->errinfo_pool_dhandle);
6614         if (h->ioaccel_cmd_pool)
6615                 pci_free_consistent(h->pdev,
6616                         h->nr_cmds * sizeof(struct io_accel1_cmd),
6617                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6618 }
6619
6620 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
6621 {
6622         int i, cpu, rc;
6623
6624         cpu = cpumask_first(cpu_online_mask);
6625         for (i = 0; i < h->msix_vector; i++) {
6626                 rc = irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6627                 cpu = cpumask_next(cpu, cpu_online_mask);
6628         }
6629 }
6630
6631 static int hpsa_request_irq(struct ctlr_info *h,
6632         irqreturn_t (*msixhandler)(int, void *),
6633         irqreturn_t (*intxhandler)(int, void *))
6634 {
6635         int rc, i;
6636
6637         /*
6638          * initialize h->q[x] = x so that interrupt handlers know which
6639          * queue to process.
6640          */
6641         for (i = 0; i < MAX_REPLY_QUEUES; i++)
6642                 h->q[i] = (u8) i;
6643
6644         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6645                 /* If performant mode and MSI-X, use multiple reply queues */
6646                 for (i = 0; i < h->msix_vector; i++)
6647                         rc = request_irq(h->intr[i], msixhandler,
6648                                         0, h->devname,
6649                                         &h->q[i]);
6650                 hpsa_irq_affinity_hints(h);
6651         } else {
6652                 /* Use single reply pool */
6653                 if (h->msix_vector > 0 || h->msi_vector) {
6654                         rc = request_irq(h->intr[h->intr_mode],
6655                                 msixhandler, 0, h->devname,
6656                                 &h->q[h->intr_mode]);
6657                 } else {
6658                         rc = request_irq(h->intr[h->intr_mode],
6659                                 intxhandler, IRQF_SHARED, h->devname,
6660                                 &h->q[h->intr_mode]);
6661                 }
6662         }
6663         if (rc) {
6664                 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
6665                        h->intr[h->intr_mode], h->devname);
6666                 return -ENODEV;
6667         }
6668         return 0;
6669 }
6670
6671 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6672 {
6673         if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
6674                 HPSA_RESET_TYPE_CONTROLLER)) {
6675                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
6676                 return -EIO;
6677         }
6678
6679         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
6680         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
6681                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
6682                 return -1;
6683         }
6684
6685         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
6686         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
6687                 dev_warn(&h->pdev->dev, "Board failed to become ready "
6688                         "after soft reset.\n");
6689                 return -1;
6690         }
6691
6692         return 0;
6693 }
6694
6695 static void free_irqs(struct ctlr_info *h)
6696 {
6697         int i;
6698
6699         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
6700                 /* Single reply queue, only one irq to free */
6701                 i = h->intr_mode;
6702                 irq_set_affinity_hint(h->intr[i], NULL);
6703                 free_irq(h->intr[i], &h->q[i]);
6704                 return;
6705         }
6706
6707         for (i = 0; i < h->msix_vector; i++) {
6708                 irq_set_affinity_hint(h->intr[i], NULL);
6709                 free_irq(h->intr[i], &h->q[i]);
6710         }
6711 }
6712
6713 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6714 {
6715         free_irqs(h);
6716 #ifdef CONFIG_PCI_MSI
6717         if (h->msix_vector) {
6718                 if (h->pdev->msix_enabled)
6719                         pci_disable_msix(h->pdev);
6720         } else if (h->msi_vector) {
6721                 if (h->pdev->msi_enabled)
6722                         pci_disable_msi(h->pdev);
6723         }
6724 #endif /* CONFIG_PCI_MSI */
6725 }
6726
6727 static void hpsa_free_reply_queues(struct ctlr_info *h)
6728 {
6729         int i;
6730
6731         for (i = 0; i < h->nreply_queues; i++) {
6732                 if (!h->reply_queue[i].head)
6733                         continue;
6734                 pci_free_consistent(h->pdev, h->reply_queue_size,
6735                         h->reply_queue[i].head, h->reply_queue[i].busaddr);
6736                 h->reply_queue[i].head = NULL;
6737                 h->reply_queue[i].busaddr = 0;
6738         }
6739 }
6740
6741 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
6742 {
6743         hpsa_free_irqs_and_disable_msix(h);
6744         hpsa_free_sg_chain_blocks(h);
6745         hpsa_free_cmd_pool(h);
6746         kfree(h->ioaccel1_blockFetchTable);
6747         kfree(h->blockFetchTable);
6748         hpsa_free_reply_queues(h);
6749         if (h->vaddr)
6750                 iounmap(h->vaddr);
6751         if (h->transtable)
6752                 iounmap(h->transtable);
6753         if (h->cfgtable)
6754                 iounmap(h->cfgtable);
6755         pci_disable_device(h->pdev);
6756         pci_release_regions(h->pdev);
6757         kfree(h);
6758 }
6759
6760 /* Called when controller lockup detected. */
6761 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
6762 {
6763         struct CommandList *c = NULL;
6764
6765         assert_spin_locked(&h->lock);
6766         /* Mark all outstanding commands as failed and complete them. */
6767         while (!list_empty(list)) {
6768                 c = list_entry(list->next, struct CommandList, list);
6769                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
6770                 finish_cmd(c);
6771         }
6772 }
6773
6774 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
6775 {
6776         int i, cpu;
6777
6778         cpu = cpumask_first(cpu_online_mask);
6779         for (i = 0; i < num_online_cpus(); i++) {
6780                 u32 *lockup_detected;
6781                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
6782                 *lockup_detected = value;
6783                 cpu = cpumask_next(cpu, cpu_online_mask);
6784         }
6785         wmb(); /* be sure the per-cpu variables are out to memory */
6786 }
6787
6788 static void controller_lockup_detected(struct ctlr_info *h)
6789 {
6790         unsigned long flags;
6791         u32 lockup_detected;
6792
6793         h->access.set_intr_mask(h, HPSA_INTR_OFF);
6794         spin_lock_irqsave(&h->lock, flags);
6795         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
6796         if (!lockup_detected) {
6797                 /* no heartbeat, but controller gave us a zero. */
6798                 dev_warn(&h->pdev->dev,
6799                         "lockup detected but scratchpad register is zero\n");
6800                 lockup_detected = 0xffffffff;
6801         }
6802         set_lockup_detected_for_all_cpus(h, lockup_detected);
6803         spin_unlock_irqrestore(&h->lock, flags);
6804         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
6805                         lockup_detected);
6806         pci_disable_device(h->pdev);
6807         spin_lock_irqsave(&h->lock, flags);
6808         fail_all_cmds_on_list(h, &h->cmpQ);
6809         fail_all_cmds_on_list(h, &h->reqQ);
6810         spin_unlock_irqrestore(&h->lock, flags);
6811 }
6812
6813 static void detect_controller_lockup(struct ctlr_info *h)
6814 {
6815         u64 now;
6816         u32 heartbeat;
6817         unsigned long flags;
6818
6819         now = get_jiffies_64();
6820         /* If we've received an interrupt recently, we're ok. */
6821         if (time_after64(h->last_intr_timestamp +
6822                                 (h->heartbeat_sample_interval), now))
6823                 return;
6824
6825         /*
6826          * If we've already checked the heartbeat recently, we're ok.
6827          * This could happen if someone sends us a signal. We
6828          * otherwise don't care about signals in this thread.
6829          */
6830         if (time_after64(h->last_heartbeat_timestamp +
6831                                 (h->heartbeat_sample_interval), now))
6832                 return;
6833
6834         /* If heartbeat has not changed since we last looked, we're not ok. */
6835         spin_lock_irqsave(&h->lock, flags);
6836         heartbeat = readl(&h->cfgtable->HeartBeat);
6837         spin_unlock_irqrestore(&h->lock, flags);
6838         if (h->last_heartbeat == heartbeat) {
6839                 controller_lockup_detected(h);
6840                 return;
6841         }
6842
6843         /* We're ok. */
6844         h->last_heartbeat = heartbeat;
6845         h->last_heartbeat_timestamp = now;
6846 }
6847
6848 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
6849 {
6850         int i;
6851         char *event_type;
6852
6853         /* Clear the driver-requested rescan flag */
6854         h->drv_req_rescan = 0;
6855
6856         /* Ask the controller to clear the events we're handling. */
6857         if ((h->transMethod & (CFGTBL_Trans_io_accel1
6858                         | CFGTBL_Trans_io_accel2)) &&
6859                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
6860                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
6861
6862                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
6863                         event_type = "state change";
6864                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
6865                         event_type = "configuration change";
6866                 /* Stop sending new RAID offload reqs via the IO accelerator */
6867                 scsi_block_requests(h->scsi_host);
6868                 for (i = 0; i < h->ndevices; i++)
6869                         h->dev[i]->offload_enabled = 0;
6870                 hpsa_drain_accel_commands(h);
6871                 /* Set 'accelerator path config change' bit */
6872                 dev_warn(&h->pdev->dev,
6873                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
6874                         h->events, event_type);
6875                 writel(h->events, &(h->cfgtable->clear_event_notify));
6876                 /* Set the "clear event notify field update" bit 6 */
6877                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6878                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
6879                 hpsa_wait_for_clear_event_notify_ack(h);
6880                 scsi_unblock_requests(h->scsi_host);
6881         } else {
6882                 /* Acknowledge controller notification events. */
6883                 writel(h->events, &(h->cfgtable->clear_event_notify));
6884                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6885                 hpsa_wait_for_clear_event_notify_ack(h);
6886 #if 0
6887                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6888                 hpsa_wait_for_mode_change_ack(h);
6889 #endif
6890         }
6891         return;
6892 }
6893
6894 /* Check a register on the controller to see if there are configuration
6895  * changes (added/changed/removed logical drives, etc.) which mean that
6896  * we should rescan the controller for devices.
6897  * Also check flag for driver-initiated rescan.
6898  */
6899 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
6900 {
6901         if (h->drv_req_rescan)
6902                 return 1;
6903
6904         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
6905                 return 0;
6906
6907         h->events = readl(&(h->cfgtable->event_notify));
6908         return h->events & RESCAN_REQUIRED_EVENT_BITS;
6909 }
6910
6911 /*
6912  * Check if any of the offline devices have become ready
6913  */
6914 static int hpsa_offline_devices_ready(struct ctlr_info *h)
6915 {
6916         unsigned long flags;
6917         struct offline_device_entry *d;
6918         struct list_head *this, *tmp;
6919
6920         spin_lock_irqsave(&h->offline_device_lock, flags);
6921         list_for_each_safe(this, tmp, &h->offline_device_list) {
6922                 d = list_entry(this, struct offline_device_entry,
6923                                 offline_list);
6924                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
6925                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
6926                         spin_lock_irqsave(&h->offline_device_lock, flags);
6927                         list_del(&d->offline_list);
6928                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6929                         return 1;
6930                 }
6931                 spin_lock_irqsave(&h->offline_device_lock, flags);
6932         }
6933         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6934         return 0;
6935 }
6936
6937
6938 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
6939 {
6940         unsigned long flags;
6941         struct ctlr_info *h = container_of(to_delayed_work(work),
6942                                         struct ctlr_info, monitor_ctlr_work);
6943         detect_controller_lockup(h);
6944         if (lockup_detected(h))
6945                 return;
6946
6947         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
6948                 scsi_host_get(h->scsi_host);
6949                 h->drv_req_rescan = 0;
6950                 hpsa_ack_ctlr_events(h);
6951                 hpsa_scan_start(h->scsi_host);
6952                 scsi_host_put(h->scsi_host);
6953         }
6954
6955         spin_lock_irqsave(&h->lock, flags);
6956         if (h->remove_in_progress) {
6957                 spin_unlock_irqrestore(&h->lock, flags);
6958                 return;
6959         }
6960         schedule_delayed_work(&h->monitor_ctlr_work,
6961                                 h->heartbeat_sample_interval);
6962         spin_unlock_irqrestore(&h->lock, flags);
6963 }
6964
6965 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6966 {
6967         int dac, rc;
6968         struct ctlr_info *h;
6969         int try_soft_reset = 0;
6970         unsigned long flags;
6971
6972         if (number_of_controllers == 0)
6973                 printk(KERN_INFO DRIVER_NAME "\n");
6974
6975         rc = hpsa_init_reset_devices(pdev);
6976         if (rc) {
6977                 if (rc != -ENOTSUPP)
6978                         return rc;
6979                 /* If the reset fails in a particular way (it has no way to do
6980                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
6981                  * a soft reset once we get the controller configured up to the
6982                  * point that it can accept a command.
6983                  */
6984                 try_soft_reset = 1;
6985                 rc = 0;
6986         }
6987
6988 reinit_after_soft_reset:
6989
6990         /* Command structures must be aligned on a 32-byte boundary because
6991          * the 5 lower bits of the address are used by the hardware. and by
6992          * the driver.  See comments in hpsa.h for more info.
6993          */
6994         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
6995         h = kzalloc(sizeof(*h), GFP_KERNEL);
6996         if (!h)
6997                 return -ENOMEM;
6998
6999         h->pdev = pdev;
7000         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
7001         INIT_LIST_HEAD(&h->cmpQ);
7002         INIT_LIST_HEAD(&h->reqQ);
7003         INIT_LIST_HEAD(&h->offline_device_list);
7004         spin_lock_init(&h->lock);
7005         spin_lock_init(&h->offline_device_lock);
7006         spin_lock_init(&h->scan_lock);
7007         spin_lock_init(&h->passthru_count_lock);
7008
7009         /* Allocate and clear per-cpu variable lockup_detected */
7010         h->lockup_detected = alloc_percpu(u32);
7011         if (!h->lockup_detected) {
7012                 rc = -ENOMEM;
7013                 goto clean1;
7014         }
7015         set_lockup_detected_for_all_cpus(h, 0);
7016
7017         rc = hpsa_pci_init(h);
7018         if (rc != 0)
7019                 goto clean1;
7020
7021         sprintf(h->devname, HPSA "%d", number_of_controllers);
7022         h->ctlr = number_of_controllers;
7023         number_of_controllers++;
7024
7025         /* configure PCI DMA stuff */
7026         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
7027         if (rc == 0) {
7028                 dac = 1;
7029         } else {
7030                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
7031                 if (rc == 0) {
7032                         dac = 0;
7033                 } else {
7034                         dev_err(&pdev->dev, "no suitable DMA available\n");
7035                         goto clean1;
7036                 }
7037         }
7038
7039         /* make sure the board interrupts are off */
7040         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7041
7042         if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
7043                 goto clean2;
7044         dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
7045                h->devname, pdev->device,
7046                h->intr[h->intr_mode], dac ? "" : " not");
7047         if (hpsa_allocate_cmd_pool(h))
7048                 goto clean4;
7049         if (hpsa_allocate_sg_chain_blocks(h))
7050                 goto clean4;
7051         init_waitqueue_head(&h->scan_wait_queue);
7052         h->scan_finished = 1; /* no scan currently in progress */
7053
7054         pci_set_drvdata(pdev, h);
7055         h->ndevices = 0;
7056         h->hba_mode_enabled = 0;
7057         h->scsi_host = NULL;
7058         spin_lock_init(&h->devlock);
7059         hpsa_put_ctlr_into_performant_mode(h);
7060
7061         /* At this point, the controller is ready to take commands.
7062          * Now, if reset_devices and the hard reset didn't work, try
7063          * the soft reset and see if that works.
7064          */
7065         if (try_soft_reset) {
7066
7067                 /* This is kind of gross.  We may or may not get a completion
7068                  * from the soft reset command, and if we do, then the value
7069                  * from the fifo may or may not be valid.  So, we wait 10 secs
7070                  * after the reset throwing away any completions we get during
7071                  * that time.  Unregister the interrupt handler and register
7072                  * fake ones to scoop up any residual completions.
7073                  */
7074                 spin_lock_irqsave(&h->lock, flags);
7075                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7076                 spin_unlock_irqrestore(&h->lock, flags);
7077                 free_irqs(h);
7078                 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
7079                                         hpsa_intx_discard_completions);
7080                 if (rc) {
7081                         dev_warn(&h->pdev->dev, "Failed to request_irq after "
7082                                 "soft reset.\n");
7083                         goto clean4;
7084                 }
7085
7086                 rc = hpsa_kdump_soft_reset(h);
7087                 if (rc)
7088                         /* Neither hard nor soft reset worked, we're hosed. */
7089                         goto clean4;
7090
7091                 dev_info(&h->pdev->dev, "Board READY.\n");
7092                 dev_info(&h->pdev->dev,
7093                         "Waiting for stale completions to drain.\n");
7094                 h->access.set_intr_mask(h, HPSA_INTR_ON);
7095                 msleep(10000);
7096                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7097
7098                 rc = controller_reset_failed(h->cfgtable);
7099                 if (rc)
7100                         dev_info(&h->pdev->dev,
7101                                 "Soft reset appears to have failed.\n");
7102
7103                 /* since the controller's reset, we have to go back and re-init
7104                  * everything.  Easiest to just forget what we've done and do it
7105                  * all over again.
7106                  */
7107                 hpsa_undo_allocations_after_kdump_soft_reset(h);
7108                 try_soft_reset = 0;
7109                 if (rc)
7110                         /* don't go to clean4, we already unallocated */
7111                         return -ENODEV;
7112
7113                 goto reinit_after_soft_reset;
7114         }
7115
7116                 /* Enable Accelerated IO path at driver layer */
7117                 h->acciopath_status = 1;
7118
7119         h->drv_req_rescan = 0;
7120
7121         /* Turn the interrupts on so we can service requests */
7122         h->access.set_intr_mask(h, HPSA_INTR_ON);
7123
7124         hpsa_hba_inquiry(h);
7125         hpsa_register_scsi(h);  /* hook ourselves into SCSI subsystem */
7126
7127         /* Monitor the controller for firmware lockups */
7128         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
7129         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
7130         schedule_delayed_work(&h->monitor_ctlr_work,
7131                                 h->heartbeat_sample_interval);
7132         return 0;
7133
7134 clean4:
7135         hpsa_free_sg_chain_blocks(h);
7136         hpsa_free_cmd_pool(h);
7137         free_irqs(h);
7138 clean2:
7139 clean1:
7140         if (h->lockup_detected)
7141                 free_percpu(h->lockup_detected);
7142         kfree(h);
7143         return rc;
7144 }
7145
7146 static void hpsa_flush_cache(struct ctlr_info *h)
7147 {
7148         char *flush_buf;
7149         struct CommandList *c;
7150
7151         /* Don't bother trying to flush the cache if locked up */
7152         if (unlikely(lockup_detected(h)))
7153                 return;
7154         flush_buf = kzalloc(4, GFP_KERNEL);
7155         if (!flush_buf)
7156                 return;
7157
7158         c = cmd_special_alloc(h);
7159         if (!c) {
7160                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
7161                 goto out_of_memory;
7162         }
7163         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7164                 RAID_CTLR_LUNID, TYPE_CMD)) {
7165                 goto out;
7166         }
7167         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
7168         if (c->err_info->CommandStatus != 0)
7169 out:
7170                 dev_warn(&h->pdev->dev,
7171                         "error flushing cache on controller\n");
7172         cmd_special_free(h, c);
7173 out_of_memory:
7174         kfree(flush_buf);
7175 }
7176
7177 static void hpsa_shutdown(struct pci_dev *pdev)
7178 {
7179         struct ctlr_info *h;
7180
7181         h = pci_get_drvdata(pdev);
7182         /* Turn board interrupts off  and send the flush cache command
7183          * sendcmd will turn off interrupt, and send the flush...
7184          * To write all data in the battery backed cache to disks
7185          */
7186         hpsa_flush_cache(h);
7187         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7188         hpsa_free_irqs_and_disable_msix(h);
7189 }
7190
7191 static void hpsa_free_device_info(struct ctlr_info *h)
7192 {
7193         int i;
7194
7195         for (i = 0; i < h->ndevices; i++)
7196                 kfree(h->dev[i]);
7197 }
7198
7199 static void hpsa_remove_one(struct pci_dev *pdev)
7200 {
7201         struct ctlr_info *h;
7202         unsigned long flags;
7203
7204         if (pci_get_drvdata(pdev) == NULL) {
7205                 dev_err(&pdev->dev, "unable to remove device\n");
7206                 return;
7207         }
7208         h = pci_get_drvdata(pdev);
7209
7210         /* Get rid of any controller monitoring work items */
7211         spin_lock_irqsave(&h->lock, flags);
7212         h->remove_in_progress = 1;
7213         cancel_delayed_work(&h->monitor_ctlr_work);
7214         spin_unlock_irqrestore(&h->lock, flags);
7215
7216         hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
7217         hpsa_shutdown(pdev);
7218         iounmap(h->vaddr);
7219         iounmap(h->transtable);
7220         iounmap(h->cfgtable);
7221         hpsa_free_device_info(h);
7222         hpsa_free_sg_chain_blocks(h);
7223         pci_free_consistent(h->pdev,
7224                 h->nr_cmds * sizeof(struct CommandList),
7225                 h->cmd_pool, h->cmd_pool_dhandle);
7226         pci_free_consistent(h->pdev,
7227                 h->nr_cmds * sizeof(struct ErrorInfo),
7228                 h->errinfo_pool, h->errinfo_pool_dhandle);
7229         hpsa_free_reply_queues(h);
7230         kfree(h->cmd_pool_bits);
7231         kfree(h->blockFetchTable);
7232         kfree(h->ioaccel1_blockFetchTable);
7233         kfree(h->ioaccel2_blockFetchTable);
7234         kfree(h->hba_inquiry_data);
7235         pci_disable_device(pdev);
7236         pci_release_regions(pdev);
7237         free_percpu(h->lockup_detected);
7238         kfree(h);
7239 }
7240
7241 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7242         __attribute__((unused)) pm_message_t state)
7243 {
7244         return -ENOSYS;
7245 }
7246
7247 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7248 {
7249         return -ENOSYS;
7250 }
7251
7252 static struct pci_driver hpsa_pci_driver = {
7253         .name = HPSA,
7254         .probe = hpsa_init_one,
7255         .remove = hpsa_remove_one,
7256         .id_table = hpsa_pci_device_id, /* id_table */
7257         .shutdown = hpsa_shutdown,
7258         .suspend = hpsa_suspend,
7259         .resume = hpsa_resume,
7260 };
7261
7262 /* Fill in bucket_map[], given nsgs (the max number of
7263  * scatter gather elements supported) and bucket[],
7264  * which is an array of 8 integers.  The bucket[] array
7265  * contains 8 different DMA transfer sizes (in 16
7266  * byte increments) which the controller uses to fetch
7267  * commands.  This function fills in bucket_map[], which
7268  * maps a given number of scatter gather elements to one of
7269  * the 8 DMA transfer sizes.  The point of it is to allow the
7270  * controller to only do as much DMA as needed to fetch the
7271  * command, with the DMA transfer size encoded in the lower
7272  * bits of the command address.
7273  */
7274 static void  calc_bucket_map(int bucket[], int num_buckets,
7275         int nsgs, int min_blocks, int *bucket_map)
7276 {
7277         int i, j, b, size;
7278
7279         /* Note, bucket_map must have nsgs+1 entries. */
7280         for (i = 0; i <= nsgs; i++) {
7281                 /* Compute size of a command with i SG entries */
7282                 size = i + min_blocks;
7283                 b = num_buckets; /* Assume the biggest bucket */
7284                 /* Find the bucket that is just big enough */
7285                 for (j = 0; j < num_buckets; j++) {
7286                         if (bucket[j] >= size) {
7287                                 b = j;
7288                                 break;
7289                         }
7290                 }
7291                 /* for a command with i SG entries, use bucket b. */
7292                 bucket_map[i] = b;
7293         }
7294 }
7295
7296 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7297 {
7298         int i;
7299         unsigned long register_value;
7300         unsigned long transMethod = CFGTBL_Trans_Performant |
7301                         (trans_support & CFGTBL_Trans_use_short_tags) |
7302                                 CFGTBL_Trans_enable_directed_msix |
7303                         (trans_support & (CFGTBL_Trans_io_accel1 |
7304                                 CFGTBL_Trans_io_accel2));
7305         struct access_method access = SA5_performant_access;
7306
7307         /* This is a bit complicated.  There are 8 registers on
7308          * the controller which we write to to tell it 8 different
7309          * sizes of commands which there may be.  It's a way of
7310          * reducing the DMA done to fetch each command.  Encoded into
7311          * each command's tag are 3 bits which communicate to the controller
7312          * which of the eight sizes that command fits within.  The size of
7313          * each command depends on how many scatter gather entries there are.
7314          * Each SG entry requires 16 bytes.  The eight registers are programmed
7315          * with the number of 16-byte blocks a command of that size requires.
7316          * The smallest command possible requires 5 such 16 byte blocks.
7317          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7318          * blocks.  Note, this only extends to the SG entries contained
7319          * within the command block, and does not extend to chained blocks
7320          * of SG elements.   bft[] contains the eight values we write to
7321          * the registers.  They are not evenly distributed, but have more
7322          * sizes for small commands, and fewer sizes for larger commands.
7323          */
7324         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7325 #define MIN_IOACCEL2_BFT_ENTRY 5
7326 #define HPSA_IOACCEL2_HEADER_SZ 4
7327         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
7328                         13, 14, 15, 16, 17, 18, 19,
7329                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
7330         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
7331         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
7332         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
7333                                  16 * MIN_IOACCEL2_BFT_ENTRY);
7334         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7335         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7336         /*  5 = 1 s/g entry or 4k
7337          *  6 = 2 s/g entry or 8k
7338          *  8 = 4 s/g entry or 16k
7339          * 10 = 6 s/g entry or 24k
7340          */
7341
7342         /* If the controller supports either ioaccel method then
7343          * we can also use the RAID stack submit path that does not
7344          * perform the superfluous readl() after each command submission.
7345          */
7346         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
7347                 access = SA5_performant_access_no_read;
7348
7349         /* Controller spec: zero out this buffer. */
7350         for (i = 0; i < h->nreply_queues; i++)
7351                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7352
7353         bft[7] = SG_ENTRIES_IN_CMD + 4;
7354         calc_bucket_map(bft, ARRAY_SIZE(bft),
7355                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7356         for (i = 0; i < 8; i++)
7357                 writel(bft[i], &h->transtable->BlockFetch[i]);
7358
7359         /* size of controller ring buffer */
7360         writel(h->max_commands, &h->transtable->RepQSize);
7361         writel(h->nreply_queues, &h->transtable->RepQCount);
7362         writel(0, &h->transtable->RepQCtrAddrLow32);
7363         writel(0, &h->transtable->RepQCtrAddrHigh32);
7364
7365         for (i = 0; i < h->nreply_queues; i++) {
7366                 writel(0, &h->transtable->RepQAddr[i].upper);
7367                 writel(h->reply_queue[i].busaddr,
7368                         &h->transtable->RepQAddr[i].lower);
7369         }
7370
7371         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7372         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
7373         /*
7374          * enable outbound interrupt coalescing in accelerator mode;
7375          */
7376         if (trans_support & CFGTBL_Trans_io_accel1) {
7377                 access = SA5_ioaccel_mode1_access;
7378                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7379                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7380         } else {
7381                 if (trans_support & CFGTBL_Trans_io_accel2) {
7382                         access = SA5_ioaccel_mode2_access;
7383                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7384                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7385                 }
7386         }
7387         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7388         hpsa_wait_for_mode_change_ack(h);
7389         register_value = readl(&(h->cfgtable->TransportActive));
7390         if (!(register_value & CFGTBL_Trans_Performant)) {
7391                 dev_warn(&h->pdev->dev, "unable to get board into"
7392                                         " performant mode\n");
7393                 return;
7394         }
7395         /* Change the access methods to the performant access methods */
7396         h->access = access;
7397         h->transMethod = transMethod;
7398
7399         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
7400                 (trans_support & CFGTBL_Trans_io_accel2)))
7401                 return;
7402
7403         if (trans_support & CFGTBL_Trans_io_accel1) {
7404                 /* Set up I/O accelerator mode */
7405                 for (i = 0; i < h->nreply_queues; i++) {
7406                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
7407                         h->reply_queue[i].current_entry =
7408                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
7409                 }
7410                 bft[7] = h->ioaccel_maxsg + 8;
7411                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
7412                                 h->ioaccel1_blockFetchTable);
7413
7414                 /* initialize all reply queue entries to unused */
7415                 for (i = 0; i < h->nreply_queues; i++)
7416                         memset(h->reply_queue[i].head,
7417                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
7418                                 h->reply_queue_size);
7419
7420                 /* set all the constant fields in the accelerator command
7421                  * frames once at init time to save CPU cycles later.
7422                  */
7423                 for (i = 0; i < h->nr_cmds; i++) {
7424                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
7425
7426                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
7427                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
7428                                         (i * sizeof(struct ErrorInfo)));
7429                         cp->err_info_len = sizeof(struct ErrorInfo);
7430                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
7431                         cp->host_context_flags = IOACCEL1_HCFLAGS_CISS_FORMAT;
7432                         cp->timeout_sec = 0;
7433                         cp->ReplyQueue = 0;
7434                         cp->Tag.lower = (i << DIRECT_LOOKUP_SHIFT) |
7435                                                 DIRECT_LOOKUP_BIT;
7436                         cp->Tag.upper = 0;
7437                         cp->host_addr.lower =
7438                                 (u32) (h->ioaccel_cmd_pool_dhandle +
7439                                         (i * sizeof(struct io_accel1_cmd)));
7440                         cp->host_addr.upper = 0;
7441                 }
7442         } else if (trans_support & CFGTBL_Trans_io_accel2) {
7443                 u64 cfg_offset, cfg_base_addr_index;
7444                 u32 bft2_offset, cfg_base_addr;
7445                 int rc;
7446
7447                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7448                         &cfg_base_addr_index, &cfg_offset);
7449                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
7450                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
7451                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
7452                                 4, h->ioaccel2_blockFetchTable);
7453                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
7454                 BUILD_BUG_ON(offsetof(struct CfgTable,
7455                                 io_accel_request_size_offset) != 0xb8);
7456                 h->ioaccel2_bft2_regs =
7457                         remap_pci_mem(pci_resource_start(h->pdev,
7458                                         cfg_base_addr_index) +
7459                                         cfg_offset + bft2_offset,
7460                                         ARRAY_SIZE(bft2) *
7461                                         sizeof(*h->ioaccel2_bft2_regs));
7462                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
7463                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7464         }
7465         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7466         hpsa_wait_for_mode_change_ack(h);
7467 }
7468
7469 static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h)
7470 {
7471         h->ioaccel_maxsg =
7472                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7473         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
7474                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
7475
7476         /* Command structures must be aligned on a 128-byte boundary
7477          * because the 7 lower bits of the address are used by the
7478          * hardware.
7479          */
7480         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
7481                         IOACCEL1_COMMANDLIST_ALIGNMENT);
7482         h->ioaccel_cmd_pool =
7483                 pci_alloc_consistent(h->pdev,
7484                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7485                         &(h->ioaccel_cmd_pool_dhandle));
7486
7487         h->ioaccel1_blockFetchTable =
7488                 kmalloc(((h->ioaccel_maxsg + 1) *
7489                                 sizeof(u32)), GFP_KERNEL);
7490
7491         if ((h->ioaccel_cmd_pool == NULL) ||
7492                 (h->ioaccel1_blockFetchTable == NULL))
7493                 goto clean_up;
7494
7495         memset(h->ioaccel_cmd_pool, 0,
7496                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
7497         return 0;
7498
7499 clean_up:
7500         if (h->ioaccel_cmd_pool)
7501                 pci_free_consistent(h->pdev,
7502                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7503                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
7504         kfree(h->ioaccel1_blockFetchTable);
7505         return 1;
7506 }
7507
7508 static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h)
7509 {
7510         /* Allocate ioaccel2 mode command blocks and block fetch table */
7511
7512         h->ioaccel_maxsg =
7513                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7514         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
7515                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
7516
7517         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
7518                         IOACCEL2_COMMANDLIST_ALIGNMENT);
7519         h->ioaccel2_cmd_pool =
7520                 pci_alloc_consistent(h->pdev,
7521                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7522                         &(h->ioaccel2_cmd_pool_dhandle));
7523
7524         h->ioaccel2_blockFetchTable =
7525                 kmalloc(((h->ioaccel_maxsg + 1) *
7526                                 sizeof(u32)), GFP_KERNEL);
7527
7528         if ((h->ioaccel2_cmd_pool == NULL) ||
7529                 (h->ioaccel2_blockFetchTable == NULL))
7530                 goto clean_up;
7531
7532         memset(h->ioaccel2_cmd_pool, 0,
7533                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
7534         return 0;
7535
7536 clean_up:
7537         if (h->ioaccel2_cmd_pool)
7538                 pci_free_consistent(h->pdev,
7539                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7540                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
7541         kfree(h->ioaccel2_blockFetchTable);
7542         return 1;
7543 }
7544
7545 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7546 {
7547         u32 trans_support;
7548         unsigned long transMethod = CFGTBL_Trans_Performant |
7549                                         CFGTBL_Trans_use_short_tags;
7550         int i;
7551
7552         if (hpsa_simple_mode)
7553                 return;
7554
7555         trans_support = readl(&(h->cfgtable->TransportSupport));
7556         if (!(trans_support & PERFORMANT_MODE))
7557                 return;
7558
7559         /* Check for I/O accelerator mode support */
7560         if (trans_support & CFGTBL_Trans_io_accel1) {
7561                 transMethod |= CFGTBL_Trans_io_accel1 |
7562                                 CFGTBL_Trans_enable_directed_msix;
7563                 if (hpsa_alloc_ioaccel_cmd_and_bft(h))
7564                         goto clean_up;
7565         } else {
7566                 if (trans_support & CFGTBL_Trans_io_accel2) {
7567                                 transMethod |= CFGTBL_Trans_io_accel2 |
7568                                 CFGTBL_Trans_enable_directed_msix;
7569                 if (ioaccel2_alloc_cmds_and_bft(h))
7570                         goto clean_up;
7571                 }
7572         }
7573
7574         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7575         hpsa_get_max_perf_mode_cmds(h);
7576         /* Performant mode ring buffer and supporting data structures */
7577         h->reply_queue_size = h->max_commands * sizeof(u64);
7578
7579         for (i = 0; i < h->nreply_queues; i++) {
7580                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
7581                                                 h->reply_queue_size,
7582                                                 &(h->reply_queue[i].busaddr));
7583                 if (!h->reply_queue[i].head)
7584                         goto clean_up;
7585                 h->reply_queue[i].size = h->max_commands;
7586                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
7587                 h->reply_queue[i].current_entry = 0;
7588         }
7589
7590         /* Need a block fetch table for performant mode */
7591         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7592                                 sizeof(u32)), GFP_KERNEL);
7593         if (!h->blockFetchTable)
7594                 goto clean_up;
7595
7596         hpsa_enter_performant_mode(h, trans_support);
7597         return;
7598
7599 clean_up:
7600         hpsa_free_reply_queues(h);
7601         kfree(h->blockFetchTable);
7602 }
7603
7604 static int is_accelerated_cmd(struct CommandList *c)
7605 {
7606         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
7607 }
7608
7609 static void hpsa_drain_accel_commands(struct ctlr_info *h)
7610 {
7611         struct CommandList *c = NULL;
7612         unsigned long flags;
7613         int accel_cmds_out;
7614
7615         do { /* wait for all outstanding commands to drain out */
7616                 accel_cmds_out = 0;
7617                 spin_lock_irqsave(&h->lock, flags);
7618                 list_for_each_entry(c, &h->cmpQ, list)
7619                         accel_cmds_out += is_accelerated_cmd(c);
7620                 list_for_each_entry(c, &h->reqQ, list)
7621                         accel_cmds_out += is_accelerated_cmd(c);
7622                 spin_unlock_irqrestore(&h->lock, flags);
7623                 if (accel_cmds_out <= 0)
7624                         break;
7625                 msleep(100);
7626         } while (1);
7627 }
7628
7629 /*
7630  *  This is it.  Register the PCI driver information for the cards we control
7631  *  the OS will call our registered routines when it finds one of our cards.
7632  */
7633 static int __init hpsa_init(void)
7634 {
7635         return pci_register_driver(&hpsa_pci_driver);
7636 }
7637
7638 static void __exit hpsa_cleanup(void)
7639 {
7640         pci_unregister_driver(&hpsa_pci_driver);
7641 }
7642
7643 static void __attribute__((unused)) verify_offsets(void)
7644 {
7645 #define VERIFY_OFFSET(member, offset) \
7646         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
7647
7648         VERIFY_OFFSET(structure_size, 0);
7649         VERIFY_OFFSET(volume_blk_size, 4);
7650         VERIFY_OFFSET(volume_blk_cnt, 8);
7651         VERIFY_OFFSET(phys_blk_shift, 16);
7652         VERIFY_OFFSET(parity_rotation_shift, 17);
7653         VERIFY_OFFSET(strip_size, 18);
7654         VERIFY_OFFSET(disk_starting_blk, 20);
7655         VERIFY_OFFSET(disk_blk_cnt, 28);
7656         VERIFY_OFFSET(data_disks_per_row, 36);
7657         VERIFY_OFFSET(metadata_disks_per_row, 38);
7658         VERIFY_OFFSET(row_cnt, 40);
7659         VERIFY_OFFSET(layout_map_count, 42);
7660         VERIFY_OFFSET(flags, 44);
7661         VERIFY_OFFSET(dekindex, 46);
7662         /* VERIFY_OFFSET(reserved, 48 */
7663         VERIFY_OFFSET(data, 64);
7664
7665 #undef VERIFY_OFFSET
7666
7667 #define VERIFY_OFFSET(member, offset) \
7668         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
7669
7670         VERIFY_OFFSET(IU_type, 0);
7671         VERIFY_OFFSET(direction, 1);
7672         VERIFY_OFFSET(reply_queue, 2);
7673         /* VERIFY_OFFSET(reserved1, 3);  */
7674         VERIFY_OFFSET(scsi_nexus, 4);
7675         VERIFY_OFFSET(Tag, 8);
7676         VERIFY_OFFSET(cdb, 16);
7677         VERIFY_OFFSET(cciss_lun, 32);
7678         VERIFY_OFFSET(data_len, 40);
7679         VERIFY_OFFSET(cmd_priority_task_attr, 44);
7680         VERIFY_OFFSET(sg_count, 45);
7681         /* VERIFY_OFFSET(reserved3 */
7682         VERIFY_OFFSET(err_ptr, 48);
7683         VERIFY_OFFSET(err_len, 56);
7684         /* VERIFY_OFFSET(reserved4  */
7685         VERIFY_OFFSET(sg, 64);
7686
7687 #undef VERIFY_OFFSET
7688
7689 #define VERIFY_OFFSET(member, offset) \
7690         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
7691
7692         VERIFY_OFFSET(dev_handle, 0x00);
7693         VERIFY_OFFSET(reserved1, 0x02);
7694         VERIFY_OFFSET(function, 0x03);
7695         VERIFY_OFFSET(reserved2, 0x04);
7696         VERIFY_OFFSET(err_info, 0x0C);
7697         VERIFY_OFFSET(reserved3, 0x10);
7698         VERIFY_OFFSET(err_info_len, 0x12);
7699         VERIFY_OFFSET(reserved4, 0x13);
7700         VERIFY_OFFSET(sgl_offset, 0x14);
7701         VERIFY_OFFSET(reserved5, 0x15);
7702         VERIFY_OFFSET(transfer_len, 0x1C);
7703         VERIFY_OFFSET(reserved6, 0x20);
7704         VERIFY_OFFSET(io_flags, 0x24);
7705         VERIFY_OFFSET(reserved7, 0x26);
7706         VERIFY_OFFSET(LUN, 0x34);
7707         VERIFY_OFFSET(control, 0x3C);
7708         VERIFY_OFFSET(CDB, 0x40);
7709         VERIFY_OFFSET(reserved8, 0x50);
7710         VERIFY_OFFSET(host_context_flags, 0x60);
7711         VERIFY_OFFSET(timeout_sec, 0x62);
7712         VERIFY_OFFSET(ReplyQueue, 0x64);
7713         VERIFY_OFFSET(reserved9, 0x65);
7714         VERIFY_OFFSET(Tag, 0x68);
7715         VERIFY_OFFSET(host_addr, 0x70);
7716         VERIFY_OFFSET(CISS_LUN, 0x78);
7717         VERIFY_OFFSET(SG, 0x78 + 8);
7718 #undef VERIFY_OFFSET
7719 }
7720
7721 module_init(hpsa_init);
7722 module_exit(hpsa_cleanup);