drivers/scsi/mpt3sas/mpt3sas_base.c

   1 /*
   2  * This is the Fusion MPT base driver providing common API layer interface
   3  * for access to MPT (Message Passing Technology) firmware.
   4  *
   5  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.c
   6  * Copyright (C) 2012-2014  LSI Corporation
   7  * Copyright (C) 2013-2014 Avago Technologies
   8  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version 2
  13  * of the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * NO WARRANTY
  21  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  22  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  23  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  24  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  25  * solely responsible for determining the appropriateness of using and
  26  * distributing the Program and assumes all risks associated with its
  27  * exercise of rights under this Agreement, including but not limited to
  28  * the risks and costs of program errors, damage to or loss of data,
  29  * programs or equipment, and unavailability or interruption of operations.
  30
  31  * DISCLAIMER OF LIABILITY
  32  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  33  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  35  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  36  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  37  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  38  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  39
  40  * You should have received a copy of the GNU General Public License
  41  * along with this program; if not, write to the Free Software
  42  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
  43  * USA.
  44  */
  45
  46 #include <linux/kernel.h>
  47 #include <linux/module.h>
  48 #include <linux/errno.h>
  49 #include <linux/init.h>
  50 #include <linux/slab.h>
  51 #include <linux/types.h>
  52 #include <linux/pci.h>
  53 #include <linux/kdev_t.h>
  54 #include <linux/blkdev.h>
  55 #include <linux/delay.h>
  56 #include <linux/interrupt.h>
  57 #include <linux/dma-mapping.h>
  58 #include <linux/io.h>
  59 #include <linux/time.h>
  60 #include <linux/kthread.h>
  61 #include <linux/aer.h>
  62
  63
  64 #include "mpt3sas_base.h"
  65
  66 static MPT_CALLBACK     mpt_callbacks[MPT_MAX_CALLBACKS];
  67
  68
  69 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  70
  71  /* maximum controller queue depth */
  72 #define MAX_HBA_QUEUE_DEPTH     30000
  73 #define MAX_CHAIN_DEPTH         100000
  74 static int max_queue_depth = -1;
  75 module_param(max_queue_depth, int, 0);
  76 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  77
  78 static int max_sgl_entries = -1;
  79 module_param(max_sgl_entries, int, 0);
  80 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  81
  82 static int msix_disable = -1;
  83 module_param(msix_disable, int, 0);
  84 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  85
  86 static int max_msix_vectors = -1;
  87 module_param(max_msix_vectors, int, 0);
  88 MODULE_PARM_DESC(max_msix_vectors,
  89         " max msix vectors");
  90
  91 static int mpt3sas_fwfault_debug;
  92 MODULE_PARM_DESC(mpt3sas_fwfault_debug,
  93         " enable detection of firmware fault and halt firmware - (default=0)");
  94
  95 static int
  96 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
  97
  98 /**
  99  * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
 100  *
 101  */
 102 static int
 103 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
 104 {
 105         int ret = param_set_int(val, kp);
 106         struct MPT3SAS_ADAPTER *ioc;
 107
 108         if (ret)
 109                 return ret;
 110
 111         /* global ioc spinlock to protect controller list on list operations */
 112         pr_info("setting fwfault_debug(%d)\n", mpt3sas_fwfault_debug);
 113         spin_lock(&gioc_lock);
 114         list_for_each_entry(ioc, &mpt3sas_ioc_list, list)
 115                 ioc->fwfault_debug = mpt3sas_fwfault_debug;
 116         spin_unlock(&gioc_lock);
 117         return 0;
 118 }
 119 module_param_call(mpt3sas_fwfault_debug, _scsih_set_fwfault_debug,
 120         param_get_int, &mpt3sas_fwfault_debug, 0644);
 121
 122 /**
 123  *  mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
 124  * @arg: input argument, used to derive ioc
 125  *
 126  * Return 0 if controller is removed from pci subsystem.
 127  * Return -1 for other case.
 128  */
 129 static int mpt3sas_remove_dead_ioc_func(void *arg)
 130 {
 131         struct MPT3SAS_ADAPTER *ioc = (struct MPT3SAS_ADAPTER *)arg;
 132         struct pci_dev *pdev;
 133
 134         if ((ioc == NULL))
 135                 return -1;
 136
 137         pdev = ioc->pdev;
 138         if ((pdev == NULL))
 139                 return -1;
 140         pci_stop_and_remove_bus_device_locked(pdev);
 141         return 0;
 142 }
 143
 144 /**
 145  * _base_fault_reset_work - workq handling ioc fault conditions
 146  * @work: input argument, used to derive ioc
 147  * Context: sleep.
 148  *
 149  * Return nothing.
 150  */
 151 static void
 152 _base_fault_reset_work(struct work_struct *work)
 153 {
 154         struct MPT3SAS_ADAPTER *ioc =
 155             container_of(work, struct MPT3SAS_ADAPTER, fault_reset_work.work);
 156         unsigned long    flags;
 157         u32 doorbell;
 158         int rc;
 159         struct task_struct *p;
 160
 161
 162         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 163         if (ioc->shost_recovery || ioc->pci_error_recovery)
 164                 goto rearm_timer;
 165         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 166
 167         doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 168         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
 169                 pr_err(MPT3SAS_FMT "SAS host is non-operational !!!!\n",
 170                     ioc->name);
 171
 172                 /* It may be possible that EEH recovery can resolve some of
 173                  * pci bus failure issues rather removing the dead ioc function
 174                  * by considering controller is in a non-operational state. So
 175                  * here priority is given to the EEH recovery. If it doesn't
 176                  * not resolve this issue, mpt3sas driver will consider this
 177                  * controller to non-operational state and remove the dead ioc
 178                  * function.
 179                  */
 180                 if (ioc->non_operational_loop++ < 5) {
 181                         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
 182                                                          flags);
 183                         goto rearm_timer;
 184                 }
 185
 186                 /*
 187                  * Call _scsih_flush_pending_cmds callback so that we flush all
 188                  * pending commands back to OS. This call is required to aovid
 189                  * deadlock at block layer. Dead IOC will fail to do diag reset,
 190                  * and this call is safe since dead ioc will never return any
 191                  * command back from HW.
 192                  */
 193                 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
 194                 /*
 195                  * Set remove_host flag early since kernel thread will
 196                  * take some time to execute.
 197                  */
 198                 ioc->remove_host = 1;
 199                 /*Remove the Dead Host */
 200                 p = kthread_run(mpt3sas_remove_dead_ioc_func, ioc,
 201                     "%s_dead_ioc_%d", ioc->driver_name, ioc->id);
 202                 if (IS_ERR(p))
 203                         pr_err(MPT3SAS_FMT
 204                         "%s: Running mpt3sas_dead_ioc thread failed !!!!\n",
 205                         ioc->name, __func__);
 206                 else
 207                         pr_err(MPT3SAS_FMT
 208                         "%s: Running mpt3sas_dead_ioc thread success !!!!\n",
 209                         ioc->name, __func__);
 210                 return; /* don't rearm timer */
 211         }
 212
 213         ioc->non_operational_loop = 0;
 214
 215         if ((doorbell & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) {
 216                 rc = mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
 217                     FORCE_BIG_HAMMER);
 218                 pr_warn(MPT3SAS_FMT "%s: hard reset: %s\n", ioc->name,
 219                     __func__, (rc == 0) ? "success" : "failed");
 220                 doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 221                 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 222                         mpt3sas_base_fault_info(ioc, doorbell &
 223                             MPI2_DOORBELL_DATA_MASK);
 224                 if (rc && (doorbell & MPI2_IOC_STATE_MASK) !=
 225                     MPI2_IOC_STATE_OPERATIONAL)
 226                         return; /* don't rearm timer */
 227         }
 228
 229         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 230  rearm_timer:
 231         if (ioc->fault_reset_work_q)
 232                 queue_delayed_work(ioc->fault_reset_work_q,
 233                     &ioc->fault_reset_work,
 234                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 235         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 236 }
 237
 238 /**
 239  * mpt3sas_base_start_watchdog - start the fault_reset_work_q
 240  * @ioc: per adapter object
 241  * Context: sleep.
 242  *
 243  * Return nothing.
 244  */
 245 void
 246 mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc)
 247 {
 248         unsigned long    flags;
 249
 250         if (ioc->fault_reset_work_q)
 251                 return;
 252
 253         /* initialize fault polling */
 254
 255         INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
 256         snprintf(ioc->fault_reset_work_q_name,
 257             sizeof(ioc->fault_reset_work_q_name), "poll_%s%d_status",
 258             ioc->driver_name, ioc->id);
 259         ioc->fault_reset_work_q =
 260                 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
 261         if (!ioc->fault_reset_work_q) {
 262                 pr_err(MPT3SAS_FMT "%s: failed (line=%d)\n",
 263                     ioc->name, __func__, __LINE__);
 264                         return;
 265         }
 266         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 267         if (ioc->fault_reset_work_q)
 268                 queue_delayed_work(ioc->fault_reset_work_q,
 269                     &ioc->fault_reset_work,
 270                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 271         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 272 }
 273
 274 /**
 275  * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
 276  * @ioc: per adapter object
 277  * Context: sleep.
 278  *
 279  * Return nothing.
 280  */
 281 void
 282 mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc)
 283 {
 284         unsigned long flags;
 285         struct workqueue_struct *wq;
 286
 287         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 288         wq = ioc->fault_reset_work_q;
 289         ioc->fault_reset_work_q = NULL;
 290         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 291         if (wq) {
 292                 if (!cancel_delayed_work_sync(&ioc->fault_reset_work))
 293                         flush_workqueue(wq);
 294                 destroy_workqueue(wq);
 295         }
 296 }
 297
 298 /**
 299  * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
 300  * @ioc: per adapter object
 301  * @fault_code: fault code
 302  *
 303  * Return nothing.
 304  */
 305 void
 306 mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code)
 307 {
 308         pr_err(MPT3SAS_FMT "fault_state(0x%04x)!\n",
 309             ioc->name, fault_code);
 310 }
 311
 312 /**
 313  * mpt3sas_halt_firmware - halt's mpt controller firmware
 314  * @ioc: per adapter object
 315  *
 316  * For debugging timeout related issues.  Writing 0xCOFFEE00
 317  * to the doorbell register will halt controller firmware. With
 318  * the purpose to stop both driver and firmware, the enduser can
 319  * obtain a ring buffer from controller UART.
 320  */
 321 void
 322 mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc)
 323 {
 324         u32 doorbell;
 325
 326         if (!ioc->fwfault_debug)
 327                 return;
 328
 329         dump_stack();
 330
 331         doorbell = readl(&ioc->chip->Doorbell);
 332         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 333                 mpt3sas_base_fault_info(ioc , doorbell);
 334         else {
 335                 writel(0xC0FFEE00, &ioc->chip->Doorbell);
 336                 pr_err(MPT3SAS_FMT "Firmware is halted due to command timeout\n",
 337                         ioc->name);
 338         }
 339
 340         if (ioc->fwfault_debug == 2)
 341                 for (;;)
 342                         ;
 343         else
 344                 panic("panic in %s\n", __func__);
 345 }
 346
 347 /**
 348  * _base_sas_ioc_info - verbose translation of the ioc status
 349  * @ioc: per adapter object
 350  * @mpi_reply: reply mf payload returned from firmware
 351  * @request_hdr: request mf
 352  *
 353  * Return nothing.
 354  */
 355 static void
 356 _base_sas_ioc_info(struct MPT3SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
 357         MPI2RequestHeader_t *request_hdr)
 358 {
 359         u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
 360             MPI2_IOCSTATUS_MASK;
 361         char *desc = NULL;
 362         u16 frame_sz;
 363         char *func_str = NULL;
 364
 365         /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
 366         if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
 367             request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
 368             request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
 369                 return;
 370
 371         if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
 372                 return;
 373
 374         switch (ioc_status) {
 375
 376 /****************************************************************************
 377 *  Common IOCStatus values for all replies
 378 ****************************************************************************/
 379
 380         case MPI2_IOCSTATUS_INVALID_FUNCTION:
 381                 desc = "invalid function";
 382                 break;
 383         case MPI2_IOCSTATUS_BUSY:
 384                 desc = "busy";
 385                 break;
 386         case MPI2_IOCSTATUS_INVALID_SGL:
 387                 desc = "invalid sgl";
 388                 break;
 389         case MPI2_IOCSTATUS_INTERNAL_ERROR:
 390                 desc = "internal error";
 391                 break;
 392         case MPI2_IOCSTATUS_INVALID_VPID:
 393                 desc = "invalid vpid";
 394                 break;
 395         case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
 396                 desc = "insufficient resources";
 397                 break;
 398         case MPI2_IOCSTATUS_INSUFFICIENT_POWER:
 399                 desc = "insufficient power";
 400                 break;
 401         case MPI2_IOCSTATUS_INVALID_FIELD:
 402                 desc = "invalid field";
 403                 break;
 404         case MPI2_IOCSTATUS_INVALID_STATE:
 405                 desc = "invalid state";
 406                 break;
 407         case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
 408                 desc = "op state not supported";
 409                 break;
 410
 411 /****************************************************************************
 412 *  Config IOCStatus values
 413 ****************************************************************************/
 414
 415         case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
 416                 desc = "config invalid action";
 417                 break;
 418         case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
 419                 desc = "config invalid type";
 420                 break;
 421         case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
 422                 desc = "config invalid page";
 423                 break;
 424         case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
 425                 desc = "config invalid data";
 426                 break;
 427         case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
 428                 desc = "config no defaults";
 429                 break;
 430         case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
 431                 desc = "config cant commit";
 432                 break;
 433
 434 /****************************************************************************
 435 *  SCSI IO Reply
 436 ****************************************************************************/
 437
 438         case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
 439         case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
 440         case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
 441         case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
 442         case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
 443         case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
 444         case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
 445         case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
 446         case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
 447         case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
 448         case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
 449         case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
 450                 break;
 451
 452 /****************************************************************************
 453 *  For use by SCSI Initiator and SCSI Target end-to-end data protection
 454 ****************************************************************************/
 455
 456         case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
 457                 desc = "eedp guard error";
 458                 break;
 459         case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
 460                 desc = "eedp ref tag error";
 461                 break;
 462         case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
 463                 desc = "eedp app tag error";
 464                 break;
 465
 466 /****************************************************************************
 467 *  SCSI Target values
 468 ****************************************************************************/
 469
 470         case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
 471                 desc = "target invalid io index";
 472                 break;
 473         case MPI2_IOCSTATUS_TARGET_ABORTED:
 474                 desc = "target aborted";
 475                 break;
 476         case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
 477                 desc = "target no conn retryable";
 478                 break;
 479         case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
 480                 desc = "target no connection";
 481                 break;
 482         case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
 483                 desc = "target xfer count mismatch";
 484                 break;
 485         case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
 486                 desc = "target data offset error";
 487                 break;
 488         case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
 489                 desc = "target too much write data";
 490                 break;
 491         case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
 492                 desc = "target iu too short";
 493                 break;
 494         case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
 495                 desc = "target ack nak timeout";
 496                 break;
 497         case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
 498                 desc = "target nak received";
 499                 break;
 500
 501 /****************************************************************************
 502 *  Serial Attached SCSI values
 503 ****************************************************************************/
 504
 505         case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
 506                 desc = "smp request failed";
 507                 break;
 508         case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
 509                 desc = "smp data overrun";
 510                 break;
 511
 512 /****************************************************************************
 513 *  Diagnostic Buffer Post / Diagnostic Release values
 514 ****************************************************************************/
 515
 516         case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
 517                 desc = "diagnostic released";
 518                 break;
 519         default:
 520                 break;
 521         }
 522
 523         if (!desc)
 524                 return;
 525
 526         switch (request_hdr->Function) {
 527         case MPI2_FUNCTION_CONFIG:
 528                 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
 529                 func_str = "config_page";
 530                 break;
 531         case MPI2_FUNCTION_SCSI_TASK_MGMT:
 532                 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
 533                 func_str = "task_mgmt";
 534                 break;
 535         case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
 536                 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
 537                 func_str = "sas_iounit_ctl";
 538                 break;
 539         case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
 540                 frame_sz = sizeof(Mpi2SepRequest_t);
 541                 func_str = "enclosure";
 542                 break;
 543         case MPI2_FUNCTION_IOC_INIT:
 544                 frame_sz = sizeof(Mpi2IOCInitRequest_t);
 545                 func_str = "ioc_init";
 546                 break;
 547         case MPI2_FUNCTION_PORT_ENABLE:
 548                 frame_sz = sizeof(Mpi2PortEnableRequest_t);
 549                 func_str = "port_enable";
 550                 break;
 551         case MPI2_FUNCTION_SMP_PASSTHROUGH:
 552                 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
 553                 func_str = "smp_passthru";
 554                 break;
 555         default:
 556                 frame_sz = 32;
 557                 func_str = "unknown";
 558                 break;
 559         }
 560
 561         pr_warn(MPT3SAS_FMT "ioc_status: %s(0x%04x), request(0x%p),(%s)\n",
 562                 ioc->name, desc, ioc_status, request_hdr, func_str);
 563
 564         _debug_dump_mf(request_hdr, frame_sz/4);
 565 }
 566
 567 /**
 568  * _base_display_event_data - verbose translation of firmware asyn events
 569  * @ioc: per adapter object
 570  * @mpi_reply: reply mf payload returned from firmware
 571  *
 572  * Return nothing.
 573  */
 574 static void
 575 _base_display_event_data(struct MPT3SAS_ADAPTER *ioc,
 576         Mpi2EventNotificationReply_t *mpi_reply)
 577 {
 578         char *desc = NULL;
 579         u16 event;
 580
 581         if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
 582                 return;
 583
 584         event = le16_to_cpu(mpi_reply->Event);
 585
 586         switch (event) {
 587         case MPI2_EVENT_LOG_DATA:
 588                 desc = "Log Data";
 589                 break;
 590         case MPI2_EVENT_STATE_CHANGE:
 591                 desc = "Status Change";
 592                 break;
 593         case MPI2_EVENT_HARD_RESET_RECEIVED:
 594                 desc = "Hard Reset Received";
 595                 break;
 596         case MPI2_EVENT_EVENT_CHANGE:
 597                 desc = "Event Change";
 598                 break;
 599         case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
 600                 desc = "Device Status Change";
 601                 break;
 602         case MPI2_EVENT_IR_OPERATION_STATUS:
 603                 if (!ioc->hide_ir_msg)
 604                         desc = "IR Operation Status";
 605                 break;
 606         case MPI2_EVENT_SAS_DISCOVERY:
 607         {
 608                 Mpi2EventDataSasDiscovery_t *event_data =
 609                     (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
 610                 pr_info(MPT3SAS_FMT "Discovery: (%s)", ioc->name,
 611                     (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
 612                     "start" : "stop");
 613                 if (event_data->DiscoveryStatus)
 614                         pr_info("discovery_status(0x%08x)",
 615                             le32_to_cpu(event_data->DiscoveryStatus));
 616                         pr_info("\n");
 617                 return;
 618         }
 619         case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
 620                 desc = "SAS Broadcast Primitive";
 621                 break;
 622         case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
 623                 desc = "SAS Init Device Status Change";
 624                 break;
 625         case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
 626                 desc = "SAS Init Table Overflow";
 627                 break;
 628         case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
 629                 desc = "SAS Topology Change List";
 630                 break;
 631         case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
 632                 desc = "SAS Enclosure Device Status Change";
 633                 break;
 634         case MPI2_EVENT_IR_VOLUME:
 635                 if (!ioc->hide_ir_msg)
 636                         desc = "IR Volume";
 637                 break;
 638         case MPI2_EVENT_IR_PHYSICAL_DISK:
 639                 if (!ioc->hide_ir_msg)
 640                         desc = "IR Physical Disk";
 641                 break;
 642         case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
 643                 if (!ioc->hide_ir_msg)
 644                         desc = "IR Configuration Change List";
 645                 break;
 646         case MPI2_EVENT_LOG_ENTRY_ADDED:
 647                 if (!ioc->hide_ir_msg)
 648                         desc = "Log Entry Added";
 649                 break;
 650         case MPI2_EVENT_TEMP_THRESHOLD:
 651                 desc = "Temperature Threshold";
 652                 break;
 653         }
 654
 655         if (!desc)
 656                 return;
 657
 658         pr_info(MPT3SAS_FMT "%s\n", ioc->name, desc);
 659 }
 660
 661 /**
 662  * _base_sas_log_info - verbose translation of firmware log info
 663  * @ioc: per adapter object
 664  * @log_info: log info
 665  *
 666  * Return nothing.
 667  */
 668 static void
 669 _base_sas_log_info(struct MPT3SAS_ADAPTER *ioc , u32 log_info)
 670 {
 671         union loginfo_type {
 672                 u32     loginfo;
 673                 struct {
 674                         u32     subcode:16;
 675                         u32     code:8;
 676                         u32     originator:4;
 677                         u32     bus_type:4;
 678                 } dw;
 679         };
 680         union loginfo_type sas_loginfo;
 681         char *originator_str = NULL;
 682
 683         sas_loginfo.loginfo = log_info;
 684         if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
 685                 return;
 686
 687         /* each nexus loss loginfo */
 688         if (log_info == 0x31170000)
 689                 return;
 690
 691         /* eat the loginfos associated with task aborts */
 692         if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
 693             0x31140000 || log_info == 0x31130000))
 694                 return;
 695
 696         switch (sas_loginfo.dw.originator) {
 697         case 0:
 698                 originator_str = "IOP";
 699                 break;
 700         case 1:
 701                 originator_str = "PL";
 702                 break;
 703         case 2:
 704                 if (!ioc->hide_ir_msg)
 705                         originator_str = "IR";
 706                 else
 707                         originator_str = "WarpDrive";
 708                 break;
 709         }
 710
 711         pr_warn(MPT3SAS_FMT
 712                 "log_info(0x%08x): originator(%s), code(0x%02x), sub_code(0x%04x)\n",
 713                 ioc->name, log_info,
 714              originator_str, sas_loginfo.dw.code,
 715              sas_loginfo.dw.subcode);
 716 }
 717
 718 /**
 719  * _base_display_reply_info -
 720  * @ioc: per adapter object
 721  * @smid: system request message index
 722  * @msix_index: MSIX table index supplied by the OS
 723  * @reply: reply message frame(lower 32bit addr)
 724  *
 725  * Return nothing.
 726  */
 727 static void
 728 _base_display_reply_info(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 729         u32 reply)
 730 {
 731         MPI2DefaultReply_t *mpi_reply;
 732         u16 ioc_status;
 733         u32 loginfo = 0;
 734
 735         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 736         if (unlikely(!mpi_reply)) {
 737                 pr_err(MPT3SAS_FMT "mpi_reply not valid at %s:%d/%s()!\n",
 738                     ioc->name, __FILE__, __LINE__, __func__);
 739                 return;
 740         }
 741         ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
 742
 743         if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
 744             (ioc->logging_level & MPT_DEBUG_REPLY)) {
 745                 _base_sas_ioc_info(ioc , mpi_reply,
 746                    mpt3sas_base_get_msg_frame(ioc, smid));
 747         }
 748
 749         if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
 750                 loginfo = le32_to_cpu(mpi_reply->IOCLogInfo);
 751                 _base_sas_log_info(ioc, loginfo);
 752         }
 753
 754         if (ioc_status || loginfo) {
 755                 ioc_status &= MPI2_IOCSTATUS_MASK;
 756                 mpt3sas_trigger_mpi(ioc, ioc_status, loginfo);
 757         }
 758 }
 759
 760 /**
 761  * mpt3sas_base_done - base internal command completion routine
 762  * @ioc: per adapter object
 763  * @smid: system request message index
 764  * @msix_index: MSIX table index supplied by the OS
 765  * @reply: reply message frame(lower 32bit addr)
 766  *
 767  * Return 1 meaning mf should be freed from _base_interrupt
 768  *        0 means the mf is freed from this function.
 769  */
 770 u8
 771 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 772         u32 reply)
 773 {
 774         MPI2DefaultReply_t *mpi_reply;
 775
 776         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 777         if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
 778                 return 1;
 779
 780         if (ioc->base_cmds.status == MPT3_CMD_NOT_USED)
 781                 return 1;
 782
 783         ioc->base_cmds.status |= MPT3_CMD_COMPLETE;
 784         if (mpi_reply) {
 785                 ioc->base_cmds.status |= MPT3_CMD_REPLY_VALID;
 786                 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
 787         }
 788         ioc->base_cmds.status &= ~MPT3_CMD_PENDING;
 789
 790         complete(&ioc->base_cmds.done);
 791         return 1;
 792 }
 793
 794 /**
 795  * _base_async_event - main callback handler for firmware asyn events
 796  * @ioc: per adapter object
 797  * @msix_index: MSIX table index supplied by the OS
 798  * @reply: reply message frame(lower 32bit addr)
 799  *
 800  * Return 1 meaning mf should be freed from _base_interrupt
 801  *        0 means the mf is freed from this function.
 802  */
 803 static u8
 804 _base_async_event(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
 805 {
 806         Mpi2EventNotificationReply_t *mpi_reply;
 807         Mpi2EventAckRequest_t *ack_request;
 808         u16 smid;
 809
 810         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 811         if (!mpi_reply)
 812                 return 1;
 813         if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
 814                 return 1;
 815
 816         _base_display_event_data(ioc, mpi_reply);
 817
 818         if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
 819                 goto out;
 820         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
 821         if (!smid) {
 822                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
 823                     ioc->name, __func__);
 824                 goto out;
 825         }
 826
 827         ack_request = mpt3sas_base_get_msg_frame(ioc, smid);
 828         memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
 829         ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
 830         ack_request->Event = mpi_reply->Event;
 831         ack_request->EventContext = mpi_reply->EventContext;
 832         ack_request->VF_ID = 0;  /* TODO */
 833         ack_request->VP_ID = 0;
 834         mpt3sas_base_put_smid_default(ioc, smid);
 835
 836  out:
 837
 838         /* scsih callback handler */
 839         mpt3sas_scsih_event_callback(ioc, msix_index, reply);
 840
 841         /* ctl callback handler */
 842         mpt3sas_ctl_event_callback(ioc, msix_index, reply);
 843
 844         return 1;
 845 }
 846
 847 /**
 848  * _base_get_cb_idx - obtain the callback index
 849  * @ioc: per adapter object
 850  * @smid: system request message index
 851  *
 852  * Return callback index.
 853  */
 854 static u8
 855 _base_get_cb_idx(struct MPT3SAS_ADAPTER *ioc, u16 smid)
 856 {
 857         int i;
 858         u8 cb_idx;
 859
 860         if (smid < ioc->hi_priority_smid) {
 861                 i = smid - 1;
 862                 cb_idx = ioc->scsi_lookup[i].cb_idx;
 863         } else if (smid < ioc->internal_smid) {
 864                 i = smid - ioc->hi_priority_smid;
 865                 cb_idx = ioc->hpr_lookup[i].cb_idx;
 866         } else if (smid <= ioc->hba_queue_depth) {
 867                 i = smid - ioc->internal_smid;
 868                 cb_idx = ioc->internal_lookup[i].cb_idx;
 869         } else
 870                 cb_idx = 0xFF;
 871         return cb_idx;
 872 }
 873
 874 /**
 875  * _base_mask_interrupts - disable interrupts
 876  * @ioc: per adapter object
 877  *
 878  * Disabling ResetIRQ, Reply and Doorbell Interrupts
 879  *
 880  * Return nothing.
 881  */
 882 static void
 883 _base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 884 {
 885         u32 him_register;
 886
 887         ioc->mask_interrupts = 1;
 888         him_register = readl(&ioc->chip->HostInterruptMask);
 889         him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
 890         writel(him_register, &ioc->chip->HostInterruptMask);
 891         readl(&ioc->chip->HostInterruptMask);
 892 }
 893
 894 /**
 895  * _base_unmask_interrupts - enable interrupts
 896  * @ioc: per adapter object
 897  *
 898  * Enabling only Reply Interrupts
 899  *
 900  * Return nothing.
 901  */
 902 static void
 903 _base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 904 {
 905         u32 him_register;
 906
 907         him_register = readl(&ioc->chip->HostInterruptMask);
 908         him_register &= ~MPI2_HIM_RIM;
 909         writel(him_register, &ioc->chip->HostInterruptMask);
 910         ioc->mask_interrupts = 0;
 911 }
 912
 913 union reply_descriptor {
 914         u64 word;
 915         struct {
 916                 u32 low;
 917                 u32 high;
 918         } u;
 919 };
 920
 921 /**
 922  * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
 923  * @irq: irq number (not used)
 924  * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
 925  * @r: pt_regs pointer (not used)
 926  *
 927  * Return IRQ_HANDLE if processed, else IRQ_NONE.
 928  */
 929 static irqreturn_t
 930 _base_interrupt(int irq, void *bus_id)
 931 {
 932         struct adapter_reply_queue *reply_q = bus_id;
 933         union reply_descriptor rd;
 934         u32 completed_cmds;
 935         u8 request_desript_type;
 936         u16 smid;
 937         u8 cb_idx;
 938         u32 reply;
 939         u8 msix_index = reply_q->msix_index;
 940         struct MPT3SAS_ADAPTER *ioc = reply_q->ioc;
 941         Mpi2ReplyDescriptorsUnion_t *rpf;
 942         u8 rc;
 943
 944         if (ioc->mask_interrupts)
 945                 return IRQ_NONE;
 946
 947         if (!atomic_add_unless(&reply_q->busy, 1, 1))
 948                 return IRQ_NONE;
 949
 950         rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
 951         request_desript_type = rpf->Default.ReplyFlags
 952              & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
 953         if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
 954                 atomic_dec(&reply_q->busy);
 955                 return IRQ_NONE;
 956         }
 957
 958         completed_cmds = 0;
 959         cb_idx = 0xFF;
 960         do {
 961                 rd.word = le64_to_cpu(rpf->Words);
 962                 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
 963                         goto out;
 964                 reply = 0;
 965                 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
 966                 if (request_desript_type ==
 967                     MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS ||
 968                     request_desript_type ==
 969                     MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS) {
 970                         cb_idx = _base_get_cb_idx(ioc, smid);
 971                         if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
 972                             (likely(mpt_callbacks[cb_idx] != NULL))) {
 973                                 rc = mpt_callbacks[cb_idx](ioc, smid,
 974                                     msix_index, 0);
 975                                 if (rc)
 976                                         mpt3sas_base_free_smid(ioc, smid);
 977                         }
 978                 } else if (request_desript_type ==
 979                     MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
 980                         reply = le32_to_cpu(
 981                             rpf->AddressReply.ReplyFrameAddress);
 982                         if (reply > ioc->reply_dma_max_address ||
 983                             reply < ioc->reply_dma_min_address)
 984                                 reply = 0;
 985                         if (smid) {
 986                                 cb_idx = _base_get_cb_idx(ioc, smid);
 987                                 if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
 988                                     (likely(mpt_callbacks[cb_idx] != NULL))) {
 989                                         rc = mpt_callbacks[cb_idx](ioc, smid,
 990                                             msix_index, reply);
 991                                         if (reply)
 992                                                 _base_display_reply_info(ioc,
 993                                                     smid, msix_index, reply);
 994                                         if (rc)
 995                                                 mpt3sas_base_free_smid(ioc,
 996                                                     smid);
 997                                 }
 998                         } else {
 999                                 _base_async_event(ioc, msix_index, reply);
1000                         }
1001
1002                         /* reply free queue handling */
1003                         if (reply) {
1004                                 ioc->reply_free_host_index =
1005                                     (ioc->reply_free_host_index ==
1006                                     (ioc->reply_free_queue_depth - 1)) ?
1007                                     0 : ioc->reply_free_host_index + 1;
1008                                 ioc->reply_free[ioc->reply_free_host_index] =
1009                                     cpu_to_le32(reply);
1010                                 wmb();
1011                                 writel(ioc->reply_free_host_index,
1012                                     &ioc->chip->ReplyFreeHostIndex);
1013                         }
1014                 }
1015
1016                 rpf->Words = cpu_to_le64(ULLONG_MAX);
1017                 reply_q->reply_post_host_index =
1018                     (reply_q->reply_post_host_index ==
1019                     (ioc->reply_post_queue_depth - 1)) ? 0 :
1020                     reply_q->reply_post_host_index + 1;
1021                 request_desript_type =
1022                     reply_q->reply_post_free[reply_q->reply_post_host_index].
1023                     Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1024                 completed_cmds++;
1025                 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1026                         goto out;
1027                 if (!reply_q->reply_post_host_index)
1028                         rpf = reply_q->reply_post_free;
1029                 else
1030                         rpf++;
1031         } while (1);
1032
1033  out:
1034
1035         if (!completed_cmds) {
1036                 atomic_dec(&reply_q->busy);
1037                 return IRQ_NONE;
1038         }
1039
1040         wmb();
1041         if (ioc->is_warpdrive) {
1042                 writel(reply_q->reply_post_host_index,
1043                 ioc->reply_post_host_index[msix_index]);
1044                 atomic_dec(&reply_q->busy);
1045                 return IRQ_HANDLED;
1046         }
1047
1048         /* Update Reply Post Host Index.
1049          * For those HBA's which support combined reply queue feature
1050          * 1. Get the correct Supplemental Reply Post Host Index Register.
1051          *    i.e. (msix_index / 8)th entry from Supplemental Reply Post Host
1052          *    Index Register address bank i.e replyPostRegisterIndex[],
1053          * 2. Then update this register with new reply host index value
1054          *    in ReplyPostIndex field and the MSIxIndex field with
1055          *    msix_index value reduced to a value between 0 and 7,
1056          *    using a modulo 8 operation. Since each Supplemental Reply Post
1057          *    Host Index Register supports 8 MSI-X vectors.
1058          *
1059          * For other HBA's just update the Reply Post Host Index register with
1060          * new reply host index value in ReplyPostIndex Field and msix_index
1061          * value in MSIxIndex field.
1062          */
1063         if (ioc->msix96_vector)
1064                 writel(reply_q->reply_post_host_index | ((msix_index  & 7) <<
1065                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1066                         ioc->replyPostRegisterIndex[msix_index/8]);
1067         else
1068                 writel(reply_q->reply_post_host_index | (msix_index <<
1069                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1070                         &ioc->chip->ReplyPostHostIndex);
1071         atomic_dec(&reply_q->busy);
1072         return IRQ_HANDLED;
1073 }
1074
1075 /**
1076  * _base_is_controller_msix_enabled - is controller support muli-reply queues
1077  * @ioc: per adapter object
1078  *
1079  */
1080 static inline int
1081 _base_is_controller_msix_enabled(struct MPT3SAS_ADAPTER *ioc)
1082 {
1083         return (ioc->facts.IOCCapabilities &
1084             MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1085 }
1086
1087 /**
1088  * mpt3sas_base_flush_reply_queues - flushing the MSIX reply queues
1089  * @ioc: per adapter object
1090  * Context: ISR conext
1091  *
1092  * Called when a Task Management request has completed. We want
1093  * to flush the other reply queues so all the outstanding IO has been
1094  * completed back to OS before we process the TM completetion.
1095  *
1096  * Return nothing.
1097  */
1098 void
1099 mpt3sas_base_flush_reply_queues(struct MPT3SAS_ADAPTER *ioc)
1100 {
1101         struct adapter_reply_queue *reply_q;
1102
1103         /* If MSIX capability is turned off
1104          * then multi-queues are not enabled
1105          */
1106         if (!_base_is_controller_msix_enabled(ioc))
1107                 return;
1108
1109         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1110                 if (ioc->shost_recovery)
1111                         return;
1112                 /* TMs are on msix_index == 0 */
1113                 if (reply_q->msix_index == 0)
1114                         continue;
1115                 _base_interrupt(reply_q->vector, (void *)reply_q);
1116         }
1117 }
1118
1119 /**
1120  * mpt3sas_base_release_callback_handler - clear interrupt callback handler
1121  * @cb_idx: callback index
1122  *
1123  * Return nothing.
1124  */
1125 void
1126 mpt3sas_base_release_callback_handler(u8 cb_idx)
1127 {
1128         mpt_callbacks[cb_idx] = NULL;
1129 }
1130
1131 /**
1132  * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
1133  * @cb_func: callback function
1134  *
1135  * Returns cb_func.
1136  */
1137 u8
1138 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1139 {
1140         u8 cb_idx;
1141
1142         for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1143                 if (mpt_callbacks[cb_idx] == NULL)
1144                         break;
1145
1146         mpt_callbacks[cb_idx] = cb_func;
1147         return cb_idx;
1148 }
1149
1150 /**
1151  * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
1152  *
1153  * Return nothing.
1154  */
1155 void
1156 mpt3sas_base_initialize_callback_handler(void)
1157 {
1158         u8 cb_idx;
1159
1160         for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1161                 mpt3sas_base_release_callback_handler(cb_idx);
1162 }
1163
1164
1165 /**
1166  * _base_build_zero_len_sge - build zero length sg entry
1167  * @ioc: per adapter object
1168  * @paddr: virtual address for SGE
1169  *
1170  * Create a zero length scatter gather entry to insure the IOCs hardware has
1171  * something to use if the target device goes brain dead and tries
1172  * to send data even when none is asked for.
1173  *
1174  * Return nothing.
1175  */
1176 static void
1177 _base_build_zero_len_sge(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1178 {
1179         u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1180             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1181             MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1182             MPI2_SGE_FLAGS_SHIFT);
1183         ioc->base_add_sg_single(paddr, flags_length, -1);
1184 }
1185
1186 /**
1187  * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1188  * @paddr: virtual address for SGE
1189  * @flags_length: SGE flags and data transfer length
1190  * @dma_addr: Physical address
1191  *
1192  * Return nothing.
1193  */
1194 static void
1195 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1196 {
1197         Mpi2SGESimple32_t *sgel = paddr;
1198
1199         flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1200             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1201         sgel->FlagsLength = cpu_to_le32(flags_length);
1202         sgel->Address = cpu_to_le32(dma_addr);
1203 }
1204
1205
1206 /**
1207  * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1208  * @paddr: virtual address for SGE
1209  * @flags_length: SGE flags and data transfer length
1210  * @dma_addr: Physical address
1211  *
1212  * Return nothing.
1213  */
1214 static void
1215 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1216 {
1217         Mpi2SGESimple64_t *sgel = paddr;
1218
1219         flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1220             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1221         sgel->FlagsLength = cpu_to_le32(flags_length);
1222         sgel->Address = cpu_to_le64(dma_addr);
1223 }
1224
1225 /**
1226  * _base_get_chain_buffer_tracker - obtain chain tracker
1227  * @ioc: per adapter object
1228  * @smid: smid associated to an IO request
1229  *
1230  * Returns chain tracker(from ioc->free_chain_list)
1231  */
1232 static struct chain_tracker *
1233 _base_get_chain_buffer_tracker(struct MPT3SAS_ADAPTER *ioc, u16 smid)
1234 {
1235         struct chain_tracker *chain_req;
1236         unsigned long flags;
1237
1238         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1239         if (list_empty(&ioc->free_chain_list)) {
1240                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1241                 dfailprintk(ioc, pr_warn(MPT3SAS_FMT
1242                         "chain buffers not available\n", ioc->name));
1243                 return NULL;
1244         }
1245         chain_req = list_entry(ioc->free_chain_list.next,
1246             struct chain_tracker, tracker_list);
1247         list_del_init(&chain_req->tracker_list);
1248         list_add_tail(&chain_req->tracker_list,
1249             &ioc->scsi_lookup[smid - 1].chain_list);
1250         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1251         return chain_req;
1252 }
1253
1254
1255 /**
1256  * _base_build_sg - build generic sg
1257  * @ioc: per adapter object
1258  * @psge: virtual address for SGE
1259  * @data_out_dma: physical address for WRITES
1260  * @data_out_sz: data xfer size for WRITES
1261  * @data_in_dma: physical address for READS
1262  * @data_in_sz: data xfer size for READS
1263  *
1264  * Return nothing.
1265  */
1266 static void
1267 _base_build_sg(struct MPT3SAS_ADAPTER *ioc, void *psge,
1268         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1269         size_t data_in_sz)
1270 {
1271         u32 sgl_flags;
1272
1273         if (!data_out_sz && !data_in_sz) {
1274                 _base_build_zero_len_sge(ioc, psge);
1275                 return;
1276         }
1277
1278         if (data_out_sz && data_in_sz) {
1279                 /* WRITE sgel first */
1280                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1281                     MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);
1282                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1283                 ioc->base_add_sg_single(psge, sgl_flags |
1284                     data_out_sz, data_out_dma);
1285
1286                 /* incr sgel */
1287                 psge += ioc->sge_size;
1288
1289                 /* READ sgel last */
1290                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1291                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1292                     MPI2_SGE_FLAGS_END_OF_LIST);
1293                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1294                 ioc->base_add_sg_single(psge, sgl_flags |
1295                     data_in_sz, data_in_dma);
1296         } else if (data_out_sz) /* WRITE */ {
1297                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1298                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1299                     MPI2_SGE_FLAGS_END_OF_LIST | MPI2_SGE_FLAGS_HOST_TO_IOC);
1300                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1301                 ioc->base_add_sg_single(psge, sgl_flags |
1302                     data_out_sz, data_out_dma);
1303         } else if (data_in_sz) /* READ */ {
1304                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1305                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1306                     MPI2_SGE_FLAGS_END_OF_LIST);
1307                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1308                 ioc->base_add_sg_single(psge, sgl_flags |
1309                     data_in_sz, data_in_dma);
1310         }
1311 }
1312
1313 /* IEEE format sgls */
1314
1315 /**
1316  * _base_add_sg_single_ieee - add sg element for IEEE format
1317  * @paddr: virtual address for SGE
1318  * @flags: SGE flags
1319  * @chain_offset: number of 128 byte elements from start of segment
1320  * @length: data transfer length
1321  * @dma_addr: Physical address
1322  *
1323  * Return nothing.
1324  */
1325 static void
1326 _base_add_sg_single_ieee(void *paddr, u8 flags, u8 chain_offset, u32 length,
1327         dma_addr_t dma_addr)
1328 {
1329         Mpi25IeeeSgeChain64_t *sgel = paddr;
1330
1331         sgel->Flags = flags;
1332         sgel->NextChainOffset = chain_offset;
1333         sgel->Length = cpu_to_le32(length);
1334         sgel->Address = cpu_to_le64(dma_addr);
1335 }
1336
1337 /**
1338  * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
1339  * @ioc: per adapter object
1340  * @paddr: virtual address for SGE
1341  *
1342  * Create a zero length scatter gather entry to insure the IOCs hardware has
1343  * something to use if the target device goes brain dead and tries
1344  * to send data even when none is asked for.
1345  *
1346  * Return nothing.
1347  */
1348 static void
1349 _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1350 {
1351         u8 sgl_flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1352                 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
1353                 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
1354
1355         _base_add_sg_single_ieee(paddr, sgl_flags, 0, 0, -1);
1356 }
1357
1358 /**
1359  * _base_build_sg_scmd - main sg creation routine
1360  * @ioc: per adapter object
1361  * @scmd: scsi command
1362  * @smid: system request message index
1363  * Context: none.
1364  *
1365  * The main routine that builds scatter gather table from a given
1366  * scsi request sent via the .queuecommand main handler.
1367  *
1368  * Returns 0 success, anything else error
1369  */
1370 static int
1371 _base_build_sg_scmd(struct MPT3SAS_ADAPTER *ioc,
1372                 struct scsi_cmnd *scmd, u16 smid)
1373 {
1374         Mpi2SCSIIORequest_t *mpi_request;
1375         dma_addr_t chain_dma;
1376         struct scatterlist *sg_scmd;
1377         void *sg_local, *chain;
1378         u32 chain_offset;
1379         u32 chain_length;
1380         u32 chain_flags;
1381         int sges_left;
1382         u32 sges_in_segment;
1383         u32 sgl_flags;
1384         u32 sgl_flags_last_element;
1385         u32 sgl_flags_end_buffer;
1386         struct chain_tracker *chain_req;
1387
1388         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1389
1390         /* init scatter gather flags */
1391         sgl_flags = MPI2_SGE_FLAGS_SIMPLE_ELEMENT;
1392         if (scmd->sc_data_direction == DMA_TO_DEVICE)
1393                 sgl_flags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
1394         sgl_flags_last_element = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT)
1395             << MPI2_SGE_FLAGS_SHIFT;
1396         sgl_flags_end_buffer = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT |
1397             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST)
1398             << MPI2_SGE_FLAGS_SHIFT;
1399         sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1400
1401         sg_scmd = scsi_sglist(scmd);
1402         sges_left = scsi_dma_map(scmd);
1403         if (sges_left < 0) {
1404                 sdev_printk(KERN_ERR, scmd->device,
1405                  "pci_map_sg failed: request for %d bytes!\n",
1406                  scsi_bufflen(scmd));
1407                 return -ENOMEM;
1408         }
1409
1410         sg_local = &mpi_request->SGL;
1411         sges_in_segment = ioc->max_sges_in_main_message;
1412         if (sges_left <= sges_in_segment)
1413                 goto fill_in_last_segment;
1414
1415         mpi_request->ChainOffset = (offsetof(Mpi2SCSIIORequest_t, SGL) +
1416             (sges_in_segment * ioc->sge_size))/4;
1417
1418         /* fill in main message segment when there is a chain following */
1419         while (sges_in_segment) {
1420                 if (sges_in_segment == 1)
1421                         ioc->base_add_sg_single(sg_local,
1422                             sgl_flags_last_element | sg_dma_len(sg_scmd),
1423                             sg_dma_address(sg_scmd));
1424                 else
1425                         ioc->base_add_sg_single(sg_local, sgl_flags |
1426                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1427                 sg_scmd = sg_next(sg_scmd);
1428                 sg_local += ioc->sge_size;
1429                 sges_left--;
1430                 sges_in_segment--;
1431         }
1432
1433         /* initializing the chain flags and pointers */
1434         chain_flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT << MPI2_SGE_FLAGS_SHIFT;
1435         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1436         if (!chain_req)
1437                 return -1;
1438         chain = chain_req->chain_buffer;
1439         chain_dma = chain_req->chain_buffer_dma;
1440         do {
1441                 sges_in_segment = (sges_left <=
1442                     ioc->max_sges_in_chain_message) ? sges_left :
1443                     ioc->max_sges_in_chain_message;
1444                 chain_offset = (sges_left == sges_in_segment) ?
1445                     0 : (sges_in_segment * ioc->sge_size)/4;
1446                 chain_length = sges_in_segment * ioc->sge_size;
1447                 if (chain_offset) {
1448                         chain_offset = chain_offset <<
1449                             MPI2_SGE_CHAIN_OFFSET_SHIFT;
1450                         chain_length += ioc->sge_size;
1451                 }
1452                 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset |
1453                     chain_length, chain_dma);
1454                 sg_local = chain;
1455                 if (!chain_offset)
1456                         goto fill_in_last_segment;
1457
1458                 /* fill in chain segments */
1459                 while (sges_in_segment) {
1460                         if (sges_in_segment == 1)
1461                                 ioc->base_add_sg_single(sg_local,
1462                                     sgl_flags_last_element |
1463                                     sg_dma_len(sg_scmd),
1464                                     sg_dma_address(sg_scmd));
1465                         else
1466                                 ioc->base_add_sg_single(sg_local, sgl_flags |
1467                                     sg_dma_len(sg_scmd),
1468                                     sg_dma_address(sg_scmd));
1469                         sg_scmd = sg_next(sg_scmd);
1470                         sg_local += ioc->sge_size;
1471                         sges_left--;
1472                         sges_in_segment--;
1473                 }
1474
1475                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1476                 if (!chain_req)
1477                         return -1;
1478                 chain = chain_req->chain_buffer;
1479                 chain_dma = chain_req->chain_buffer_dma;
1480         } while (1);
1481
1482
1483  fill_in_last_segment:
1484
1485         /* fill the last segment */
1486         while (sges_left) {
1487                 if (sges_left == 1)
1488                         ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer |
1489                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1490                 else
1491                         ioc->base_add_sg_single(sg_local, sgl_flags |
1492                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1493                 sg_scmd = sg_next(sg_scmd);
1494                 sg_local += ioc->sge_size;
1495                 sges_left--;
1496         }
1497
1498         return 0;
1499 }
1500
1501 /**
1502  * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
1503  * @ioc: per adapter object
1504  * @scmd: scsi command
1505  * @smid: system request message index
1506  * Context: none.
1507  *
1508  * The main routine that builds scatter gather table from a given
1509  * scsi request sent via the .queuecommand main handler.
1510  *
1511  * Returns 0 success, anything else error
1512  */
1513 static int
1514 _base_build_sg_scmd_ieee(struct MPT3SAS_ADAPTER *ioc,
1515         struct scsi_cmnd *scmd, u16 smid)
1516 {
1517         Mpi2SCSIIORequest_t *mpi_request;
1518         dma_addr_t chain_dma;
1519         struct scatterlist *sg_scmd;
1520         void *sg_local, *chain;
1521         u32 chain_offset;
1522         u32 chain_length;
1523         int sges_left;
1524         u32 sges_in_segment;
1525         u8 simple_sgl_flags;
1526         u8 simple_sgl_flags_last;
1527         u8 chain_sgl_flags;
1528         struct chain_tracker *chain_req;
1529
1530         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1531
1532         /* init scatter gather flags */
1533         simple_sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1534             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1535         simple_sgl_flags_last = simple_sgl_flags |
1536             MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1537         chain_sgl_flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
1538             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1539
1540         sg_scmd = scsi_sglist(scmd);
1541         sges_left = scsi_dma_map(scmd);
1542         if (sges_left < 0) {
1543                 sdev_printk(KERN_ERR, scmd->device,
1544                         "pci_map_sg failed: request for %d bytes!\n",
1545                         scsi_bufflen(scmd));
1546                 return -ENOMEM;
1547         }
1548
1549         sg_local = &mpi_request->SGL;
1550         sges_in_segment = (ioc->request_sz -
1551             offsetof(Mpi2SCSIIORequest_t, SGL))/ioc->sge_size_ieee;
1552         if (sges_left <= sges_in_segment)
1553                 goto fill_in_last_segment;
1554
1555         mpi_request->ChainOffset = (sges_in_segment - 1 /* chain element */) +
1556             (offsetof(Mpi2SCSIIORequest_t, SGL)/ioc->sge_size_ieee);
1557
1558         /* fill in main message segment when there is a chain following */
1559         while (sges_in_segment > 1) {
1560                 _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1561                     sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1562                 sg_scmd = sg_next(sg_scmd);
1563                 sg_local += ioc->sge_size_ieee;
1564                 sges_left--;
1565                 sges_in_segment--;
1566         }
1567
1568         /* initializing the pointers */
1569         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1570         if (!chain_req)
1571                 return -1;
1572         chain = chain_req->chain_buffer;
1573         chain_dma = chain_req->chain_buffer_dma;
1574         do {
1575                 sges_in_segment = (sges_left <=
1576                     ioc->max_sges_in_chain_message) ? sges_left :
1577                     ioc->max_sges_in_chain_message;
1578                 chain_offset = (sges_left == sges_in_segment) ?
1579                     0 : sges_in_segment;
1580                 chain_length = sges_in_segment * ioc->sge_size_ieee;
1581                 if (chain_offset)
1582                         chain_length += ioc->sge_size_ieee;
1583                 _base_add_sg_single_ieee(sg_local, chain_sgl_flags,
1584                     chain_offset, chain_length, chain_dma);
1585
1586                 sg_local = chain;
1587                 if (!chain_offset)
1588                         goto fill_in_last_segment;
1589
1590                 /* fill in chain segments */
1591                 while (sges_in_segment) {
1592                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1593                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1594                         sg_scmd = sg_next(sg_scmd);
1595                         sg_local += ioc->sge_size_ieee;
1596                         sges_left--;
1597                         sges_in_segment--;
1598                 }
1599
1600                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1601                 if (!chain_req)
1602                         return -1;
1603                 chain = chain_req->chain_buffer;
1604                 chain_dma = chain_req->chain_buffer_dma;
1605         } while (1);
1606
1607
1608  fill_in_last_segment:
1609
1610         /* fill the last segment */
1611         while (sges_left > 0) {
1612                 if (sges_left == 1)
1613                         _base_add_sg_single_ieee(sg_local,
1614                             simple_sgl_flags_last, 0, sg_dma_len(sg_scmd),
1615                             sg_dma_address(sg_scmd));
1616                 else
1617                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1618                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1619                 sg_scmd = sg_next(sg_scmd);
1620                 sg_local += ioc->sge_size_ieee;
1621                 sges_left--;
1622         }
1623
1624         return 0;
1625 }
1626
1627 /**
1628  * _base_build_sg_ieee - build generic sg for IEEE format
1629  * @ioc: per adapter object
1630  * @psge: virtual address for SGE
1631  * @data_out_dma: physical address for WRITES
1632  * @data_out_sz: data xfer size for WRITES
1633  * @data_in_dma: physical address for READS
1634  * @data_in_sz: data xfer size for READS
1635  *
1636  * Return nothing.
1637  */
1638 static void
1639 _base_build_sg_ieee(struct MPT3SAS_ADAPTER *ioc, void *psge,
1640         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1641         size_t data_in_sz)
1642 {
1643         u8 sgl_flags;
1644
1645         if (!data_out_sz && !data_in_sz) {
1646                 _base_build_zero_len_sge_ieee(ioc, psge);
1647                 return;
1648         }
1649
1650         if (data_out_sz && data_in_sz) {
1651                 /* WRITE sgel first */
1652                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1653                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1654                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1655                     data_out_dma);
1656
1657                 /* incr sgel */
1658                 psge += ioc->sge_size_ieee;
1659
1660                 /* READ sgel last */
1661                 sgl_flags |= MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1662                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1663                     data_in_dma);
1664         } else if (data_out_sz) /* WRITE */ {
1665                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1666                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1667                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1668                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1669                     data_out_dma);
1670         } else if (data_in_sz) /* READ */ {
1671                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1672                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1673                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1674                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1675                     data_in_dma);
1676         }
1677 }
1678
1679 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1680
1681 /**
1682  * _base_config_dma_addressing - set dma addressing
1683  * @ioc: per adapter object
1684  * @pdev: PCI device struct
1685  *
1686  * Returns 0 for success, non-zero for failure.
1687  */
1688 static int
1689 _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev)
1690 {
1691         struct sysinfo s;
1692         u64 consistent_dma_mask;
1693
1694         if (ioc->dma_mask)
1695                 consistent_dma_mask = DMA_BIT_MASK(64);
1696         else
1697                 consistent_dma_mask = DMA_BIT_MASK(32);
1698
1699         if (sizeof(dma_addr_t) > 4) {
1700                 const uint64_t required_mask =
1701                     dma_get_required_mask(&pdev->dev);
1702                 if ((required_mask > DMA_BIT_MASK(32)) &&
1703                     !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
1704                     !pci_set_consistent_dma_mask(pdev, consistent_dma_mask)) {
1705                         ioc->base_add_sg_single = &_base_add_sg_single_64;
1706                         ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1707                         ioc->dma_mask = 64;
1708                         goto out;
1709                 }
1710         }
1711
1712         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1713             && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1714                 ioc->base_add_sg_single = &_base_add_sg_single_32;
1715                 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1716                 ioc->dma_mask = 32;
1717         } else
1718                 return -ENODEV;
1719
1720  out:
1721         si_meminfo(&s);
1722         pr_info(MPT3SAS_FMT
1723                 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
1724                 ioc->name, ioc->dma_mask, convert_to_kb(s.totalram));
1725
1726         return 0;
1727 }
1728
1729 static int
1730 _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER *ioc,
1731                                       struct pci_dev *pdev)
1732 {
1733         if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1734                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
1735                         return -ENODEV;
1736         }
1737         return 0;
1738 }
1739
1740 /**
1741  * _base_check_enable_msix - checks MSIX capabable.
1742  * @ioc: per adapter object
1743  *
1744  * Check to see if card is capable of MSIX, and set number
1745  * of available msix vectors
1746  */
1747 static int
1748 _base_check_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1749 {
1750         int base;
1751         u16 message_control;
1752
1753         /* Check whether controller SAS2008 B0 controller,
1754          * if it is SAS2008 B0 controller use IO-APIC instead of MSIX
1755          */
1756         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
1757             ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) {
1758                 return -EINVAL;
1759         }
1760
1761         base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1762         if (!base) {
1763                 dfailprintk(ioc, pr_info(MPT3SAS_FMT "msix not supported\n",
1764                         ioc->name));
1765                 return -EINVAL;
1766         }
1767
1768         /* get msix vector count */
1769         /* NUMA_IO not supported for older controllers */
1770         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1771             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1772             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1773             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1774             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1775             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1776             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1777                 ioc->msix_vector_count = 1;
1778         else {
1779                 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1780                 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1781         }
1782         dinitprintk(ioc, pr_info(MPT3SAS_FMT
1783                 "msix is supported, vector_count(%d)\n",
1784                 ioc->name, ioc->msix_vector_count));
1785         return 0;
1786 }
1787
1788 /**
1789  * _base_free_irq - free irq
1790  * @ioc: per adapter object
1791  *
1792  * Freeing respective reply_queue from the list.
1793  */
1794 static void
1795 _base_free_irq(struct MPT3SAS_ADAPTER *ioc)
1796 {
1797         struct adapter_reply_queue *reply_q, *next;
1798
1799         if (list_empty(&ioc->reply_queue_list))
1800                 return;
1801
1802         list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1803                 list_del(&reply_q->list);
1804                 irq_set_affinity_hint(reply_q->vector, NULL);
1805                 free_cpumask_var(reply_q->affinity_hint);
1806                 synchronize_irq(reply_q->vector);
1807                 free_irq(reply_q->vector, reply_q);
1808                 kfree(reply_q);
1809         }
1810 }
1811
1812 /**
1813  * _base_request_irq - request irq
1814  * @ioc: per adapter object
1815  * @index: msix index into vector table
1816  * @vector: irq vector
1817  *
1818  * Inserting respective reply_queue into the list.
1819  */
1820 static int
1821 _base_request_irq(struct MPT3SAS_ADAPTER *ioc, u8 index, u32 vector)
1822 {
1823         struct adapter_reply_queue *reply_q;
1824         int r;
1825
1826         reply_q =  kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1827         if (!reply_q) {
1828                 pr_err(MPT3SAS_FMT "unable to allocate memory %d!\n",
1829                     ioc->name, (int)sizeof(struct adapter_reply_queue));
1830                 return -ENOMEM;
1831         }
1832         reply_q->ioc = ioc;
1833         reply_q->msix_index = index;
1834         reply_q->vector = vector;
1835
1836         if (!alloc_cpumask_var(&reply_q->affinity_hint, GFP_KERNEL))
1837                 return -ENOMEM;
1838         cpumask_clear(reply_q->affinity_hint);
1839
1840         atomic_set(&reply_q->busy, 0);
1841         if (ioc->msix_enable)
1842                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1843                     ioc->driver_name, ioc->id, index);
1844         else
1845                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1846                     ioc->driver_name, ioc->id);
1847         r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1848             reply_q);
1849         if (r) {
1850                 pr_err(MPT3SAS_FMT "unable to allocate interrupt %d!\n",
1851                     reply_q->name, vector);
1852                 kfree(reply_q);
1853                 return -EBUSY;
1854         }
1855
1856         INIT_LIST_HEAD(&reply_q->list);
1857         list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1858         return 0;
1859 }
1860
1861 /**
1862  * _base_assign_reply_queues - assigning msix index for each cpu
1863  * @ioc: per adapter object
1864  *
1865  * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1866  *
1867  * It would nice if we could call irq_set_affinity, however it is not
1868  * an exported symbol
1869  */
1870 static void
1871 _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc)
1872 {
1873         unsigned int cpu, nr_cpus, nr_msix, index = 0;
1874         struct adapter_reply_queue *reply_q;
1875
1876         if (!_base_is_controller_msix_enabled(ioc))
1877                 return;
1878
1879         memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1880
1881         nr_cpus = num_online_cpus();
1882         nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count,
1883                                                ioc->facts.MaxMSIxVectors);
1884         if (!nr_msix)
1885                 return;
1886
1887         cpu = cpumask_first(cpu_online_mask);
1888
1889         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1890
1891                 unsigned int i, group = nr_cpus / nr_msix;
1892
1893                 if (cpu >= nr_cpus)
1894                         break;
1895
1896                 if (index < nr_cpus % nr_msix)
1897                         group++;
1898
1899                 for (i = 0 ; i < group ; i++) {
1900                         ioc->cpu_msix_table[cpu] = index;
1901                         cpumask_or(reply_q->affinity_hint,
1902                                    reply_q->affinity_hint, get_cpu_mask(cpu));
1903                         cpu = cpumask_next(cpu, cpu_online_mask);
1904                 }
1905
1906                 if (irq_set_affinity_hint(reply_q->vector,
1907                                            reply_q->affinity_hint))
1908                         dinitprintk(ioc, pr_info(MPT3SAS_FMT
1909                             "error setting affinity hint for irq vector %d\n",
1910                             ioc->name, reply_q->vector));
1911                 index++;
1912         }
1913 }
1914
1915 /**
1916  * _base_disable_msix - disables msix
1917  * @ioc: per adapter object
1918  *
1919  */
1920 static void
1921 _base_disable_msix(struct MPT3SAS_ADAPTER *ioc)
1922 {
1923         if (!ioc->msix_enable)
1924                 return;
1925         pci_disable_msix(ioc->pdev);
1926         ioc->msix_enable = 0;
1927 }
1928
1929 /**
1930  * _base_enable_msix - enables msix, failback to io_apic
1931  * @ioc: per adapter object
1932  *
1933  */
1934 static int
1935 _base_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1936 {
1937         struct msix_entry *entries, *a;
1938         int r;
1939         int i;
1940         u8 try_msix = 0;
1941
1942         if (msix_disable == -1 || msix_disable == 0)
1943                 try_msix = 1;
1944
1945         if (!try_msix)
1946                 goto try_ioapic;
1947
1948         if (_base_check_enable_msix(ioc) != 0)
1949                 goto try_ioapic;
1950
1951         ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1952             ioc->msix_vector_count);
1953
1954         printk(MPT3SAS_FMT "MSI-X vectors supported: %d, no of cores"
1955           ": %d, max_msix_vectors: %d\n", ioc->name, ioc->msix_vector_count,
1956           ioc->cpu_count, max_msix_vectors);
1957
1958         if (!ioc->rdpq_array_enable && max_msix_vectors == -1)
1959                 max_msix_vectors = 8;
1960
1961         if (max_msix_vectors > 0) {
1962                 ioc->reply_queue_count = min_t(int, max_msix_vectors,
1963                         ioc->reply_queue_count);
1964                 ioc->msix_vector_count = ioc->reply_queue_count;
1965         } else if (max_msix_vectors == 0)
1966                 goto try_ioapic;
1967
1968         entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1969             GFP_KERNEL);
1970         if (!entries) {
1971                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
1972                         "kcalloc failed @ at %s:%d/%s() !!!\n",
1973                         ioc->name, __FILE__, __LINE__, __func__));
1974                 goto try_ioapic;
1975         }
1976
1977         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1978                 a->entry = i;
1979
1980         r = pci_enable_msix_exact(ioc->pdev, entries, ioc->reply_queue_count);
1981         if (r) {
1982                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
1983                         "pci_enable_msix_exact failed (r=%d) !!!\n",
1984                         ioc->name, r));
1985                 kfree(entries);
1986                 goto try_ioapic;
1987         }
1988
1989         ioc->msix_enable = 1;
1990         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1991                 r = _base_request_irq(ioc, i, a->vector);
1992                 if (r) {
1993                         _base_free_irq(ioc);
1994                         _base_disable_msix(ioc);
1995                         kfree(entries);
1996                         goto try_ioapic;
1997                 }
1998         }
1999
2000         kfree(entries);
2001         return 0;
2002
2003 /* failback to io_apic interrupt routing */
2004  try_ioapic:
2005
2006         ioc->reply_queue_count = 1;
2007         r = _base_request_irq(ioc, 0, ioc->pdev->irq);
2008
2009         return r;
2010 }
2011
2012 /**
2013  * mpt3sas_base_unmap_resources - free controller resources
2014  * @ioc: per adapter object
2015  */
2016 void
2017 mpt3sas_base_unmap_resources(struct MPT3SAS_ADAPTER *ioc)
2018 {
2019         struct pci_dev *pdev = ioc->pdev;
2020
2021         dexitprintk(ioc, printk(MPT3SAS_FMT "%s\n",
2022                 ioc->name, __func__));
2023
2024         _base_free_irq(ioc);
2025         _base_disable_msix(ioc);
2026
2027         if (ioc->msix96_vector) {
2028                 kfree(ioc->replyPostRegisterIndex);
2029                 ioc->replyPostRegisterIndex = NULL;
2030         }
2031
2032         if (ioc->chip_phys) {
2033                 iounmap(ioc->chip);
2034                 ioc->chip_phys = 0;
2035         }
2036
2037         if (pci_is_enabled(pdev)) {
2038                 pci_release_selected_regions(ioc->pdev, ioc->bars);
2039                 pci_disable_pcie_error_reporting(pdev);
2040                 pci_disable_device(pdev);
2041         }
2042 }
2043
2044 /**
2045  * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
2046  * @ioc: per adapter object
2047  *
2048  * Returns 0 for success, non-zero for failure.
2049  */
2050 int
2051 mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
2052 {
2053         struct pci_dev *pdev = ioc->pdev;
2054         u32 memap_sz;
2055         u32 pio_sz;
2056         int i, r = 0;
2057         u64 pio_chip = 0;
2058         u64 chip_phys = 0;
2059         struct adapter_reply_queue *reply_q;
2060
2061         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n",
2062             ioc->name, __func__));
2063
2064         ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
2065         if (pci_enable_device_mem(pdev)) {
2066                 pr_warn(MPT3SAS_FMT "pci_enable_device_mem: failed\n",
2067                         ioc->name);
2068                 ioc->bars = 0;
2069                 return -ENODEV;
2070         }
2071
2072
2073         if (pci_request_selected_regions(pdev, ioc->bars,
2074             ioc->driver_name)) {
2075                 pr_warn(MPT3SAS_FMT "pci_request_selected_regions: failed\n",
2076                         ioc->name);
2077                 ioc->bars = 0;
2078                 r = -ENODEV;
2079                 goto out_fail;
2080         }
2081
2082 /* AER (Advanced Error Reporting) hooks */
2083         pci_enable_pcie_error_reporting(pdev);
2084
2085         pci_set_master(pdev);
2086
2087
2088         if (_base_config_dma_addressing(ioc, pdev) != 0) {
2089                 pr_warn(MPT3SAS_FMT "no suitable DMA mask for %s\n",
2090                     ioc->name, pci_name(pdev));
2091                 r = -ENODEV;
2092                 goto out_fail;
2093         }
2094
2095         for (i = 0, memap_sz = 0, pio_sz = 0; (i < DEVICE_COUNT_RESOURCE) &&
2096              (!memap_sz || !pio_sz); i++) {
2097                 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
2098                         if (pio_sz)
2099                                 continue;
2100                         pio_chip = (u64)pci_resource_start(pdev, i);
2101                         pio_sz = pci_resource_len(pdev, i);
2102                 } else if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
2103                         if (memap_sz)
2104                                 continue;
2105                         ioc->chip_phys = pci_resource_start(pdev, i);
2106                         chip_phys = (u64)ioc->chip_phys;
2107                         memap_sz = pci_resource_len(pdev, i);
2108                         ioc->chip = ioremap(ioc->chip_phys, memap_sz);
2109                 }
2110         }
2111
2112         if (ioc->chip == NULL) {
2113                 pr_err(MPT3SAS_FMT "unable to map adapter memory! "
2114                         " or resource not found\n", ioc->name);
2115                 r = -EINVAL;
2116                 goto out_fail;
2117         }
2118
2119         _base_mask_interrupts(ioc);
2120
2121         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
2122         if (r)
2123                 goto out_fail;
2124
2125         if (!ioc->rdpq_array_enable_assigned) {
2126                 ioc->rdpq_array_enable = ioc->rdpq_array_capable;
2127                 ioc->rdpq_array_enable_assigned = 1;
2128         }
2129
2130         r = _base_enable_msix(ioc);
2131         if (r)
2132                 goto out_fail;
2133
2134         /* Use the Combined reply queue feature only for SAS3 C0 & higher
2135          * revision HBAs and also only when reply queue count is greater than 8
2136          */
2137         if (ioc->msix96_vector && ioc->reply_queue_count > 8) {
2138                 /* Determine the Supplemental Reply Post Host Index Registers
2139                  * Addresse. Supplemental Reply Post Host Index Registers
2140                  * starts at offset MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET and
2141                  * each register is at offset bytes of
2142                  * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET from previous one.
2143                  */
2144                 ioc->replyPostRegisterIndex = kcalloc(
2145                      MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT,
2146                      sizeof(resource_size_t *), GFP_KERNEL);
2147                 if (!ioc->replyPostRegisterIndex) {
2148                         dfailprintk(ioc, printk(MPT3SAS_FMT
2149                         "allocation for reply Post Register Index failed!!!\n",
2150                                                                    ioc->name));
2151                         r = -ENOMEM;
2152                         goto out_fail;
2153                 }
2154
2155                 for (i = 0; i < MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT; i++) {
2156                         ioc->replyPostRegisterIndex[i] = (resource_size_t *)
2157                              ((u8 *)&ioc->chip->Doorbell +
2158                              MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET +
2159                              (i * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET));
2160                 }
2161         } else
2162                 ioc->msix96_vector = 0;
2163
2164         list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
2165                 pr_info(MPT3SAS_FMT "%s: IRQ %d\n",
2166                     reply_q->name,  ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
2167                     "IO-APIC enabled"), reply_q->vector);
2168
2169         pr_info(MPT3SAS_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
2170             ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
2171         pr_info(MPT3SAS_FMT "ioport(0x%016llx), size(%d)\n",
2172             ioc->name, (unsigned long long)pio_chip, pio_sz);
2173
2174         /* Save PCI configuration state for recovery from PCI AER/EEH errors */
2175         pci_save_state(pdev);
2176         return 0;
2177
2178  out_fail:
2179         mpt3sas_base_unmap_resources(ioc);
2180         return r;
2181 }
2182
2183 /**
2184  * mpt3sas_base_get_msg_frame - obtain request mf pointer
2185  * @ioc: per adapter object
2186  * @smid: system request message index(smid zero is invalid)
2187  *
2188  * Returns virt pointer to message frame.
2189  */
2190 void *
2191 mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2192 {
2193         return (void *)(ioc->request + (smid * ioc->request_sz));
2194 }
2195
2196 /**
2197  * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
2198  * @ioc: per adapter object
2199  * @smid: system request message index
2200  *
2201  * Returns virt pointer to sense buffer.
2202  */
2203 void *
2204 mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2205 {
2206         return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
2207 }
2208
2209 /**
2210  * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
2211  * @ioc: per adapter object
2212  * @smid: system request message index
2213  *
2214  * Returns phys pointer to the low 32bit address of the sense buffer.
2215  */
2216 __le32
2217 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2218 {
2219         return cpu_to_le32(ioc->sense_dma + ((smid - 1) *
2220             SCSI_SENSE_BUFFERSIZE));
2221 }
2222
2223 /**
2224  * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
2225  * @ioc: per adapter object
2226  * @phys_addr: lower 32 physical addr of the reply
2227  *
2228  * Converts 32bit lower physical addr into a virt address.
2229  */
2230 void *
2231 mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, u32 phys_addr)
2232 {
2233         if (!phys_addr)
2234                 return NULL;
2235         return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
2236 }
2237
2238 /**
2239  * mpt3sas_base_get_smid - obtain a free smid from internal queue
2240  * @ioc: per adapter object
2241  * @cb_idx: callback index
2242  *
2243  * Returns smid (zero is invalid)
2244  */
2245 u16
2246 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2247 {
2248         unsigned long flags;
2249         struct request_tracker *request;
2250         u16 smid;
2251
2252         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2253         if (list_empty(&ioc->internal_free_list)) {
2254                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2255                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2256                     ioc->name, __func__);
2257                 return 0;
2258         }
2259
2260         request = list_entry(ioc->internal_free_list.next,
2261             struct request_tracker, tracker_list);
2262         request->cb_idx = cb_idx;
2263         smid = request->smid;
2264         list_del(&request->tracker_list);
2265         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2266         return smid;
2267 }
2268
2269 /**
2270  * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
2271  * @ioc: per adapter object
2272  * @cb_idx: callback index
2273  * @scmd: pointer to scsi command object
2274  *
2275  * Returns smid (zero is invalid)
2276  */
2277 u16
2278 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
2279         struct scsi_cmnd *scmd)
2280 {
2281         unsigned long flags;
2282         struct scsiio_tracker *request;
2283         u16 smid;
2284
2285         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2286         if (list_empty(&ioc->free_list)) {
2287                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2288                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2289                     ioc->name, __func__);
2290                 return 0;
2291         }
2292
2293         request = list_entry(ioc->free_list.next,
2294             struct scsiio_tracker, tracker_list);
2295         request->scmd = scmd;
2296         request->cb_idx = cb_idx;
2297         smid = request->smid;
2298         list_del(&request->tracker_list);
2299         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2300         return smid;
2301 }
2302
2303 /**
2304  * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
2305  * @ioc: per adapter object
2306  * @cb_idx: callback index
2307  *
2308  * Returns smid (zero is invalid)
2309  */
2310 u16
2311 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2312 {
2313         unsigned long flags;
2314         struct request_tracker *request;
2315         u16 smid;
2316
2317         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2318         if (list_empty(&ioc->hpr_free_list)) {
2319                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2320                 return 0;
2321         }
2322
2323         request = list_entry(ioc->hpr_free_list.next,
2324             struct request_tracker, tracker_list);
2325         request->cb_idx = cb_idx;
2326         smid = request->smid;
2327         list_del(&request->tracker_list);
2328         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2329         return smid;
2330 }
2331
2332 /**
2333  * mpt3sas_base_free_smid - put smid back on free_list
2334  * @ioc: per adapter object
2335  * @smid: system request message index
2336  *
2337  * Return nothing.
2338  */
2339 void
2340 mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2341 {
2342         unsigned long flags;
2343         int i;
2344         struct chain_tracker *chain_req, *next;
2345
2346         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2347         if (smid < ioc->hi_priority_smid) {
2348                 /* scsiio queue */
2349                 i = smid - 1;
2350                 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
2351                         list_for_each_entry_safe(chain_req, next,
2352                             &ioc->scsi_lookup[i].chain_list, tracker_list) {
2353                                 list_del_init(&chain_req->tracker_list);
2354                                 list_add(&chain_req->tracker_list,
2355                                     &ioc->free_chain_list);
2356                         }
2357                 }
2358                 ioc->scsi_lookup[i].cb_idx = 0xFF;
2359                 ioc->scsi_lookup[i].scmd = NULL;
2360                 ioc->scsi_lookup[i].direct_io = 0;
2361                 list_add(&ioc->scsi_lookup[i].tracker_list, &ioc->free_list);
2362                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2363
2364                 /*
2365                  * See _wait_for_commands_to_complete() call with regards
2366                  * to this code.
2367                  */
2368                 if (ioc->shost_recovery && ioc->pending_io_count) {
2369                         if (ioc->pending_io_count == 1)
2370                                 wake_up(&ioc->reset_wq);
2371                         ioc->pending_io_count--;
2372                 }
2373                 return;
2374         } else if (smid < ioc->internal_smid) {
2375                 /* hi-priority */
2376                 i = smid - ioc->hi_priority_smid;
2377                 ioc->hpr_lookup[i].cb_idx = 0xFF;
2378                 list_add(&ioc->hpr_lookup[i].tracker_list, &ioc->hpr_free_list);
2379         } else if (smid <= ioc->hba_queue_depth) {
2380                 /* internal queue */
2381                 i = smid - ioc->internal_smid;
2382                 ioc->internal_lookup[i].cb_idx = 0xFF;
2383                 list_add(&ioc->internal_lookup[i].tracker_list,
2384                     &ioc->internal_free_list);
2385         }
2386         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2387 }
2388
2389 /**
2390  * _base_writeq - 64 bit write to MMIO
2391  * @ioc: per adapter object
2392  * @b: data payload
2393  * @addr: address in MMIO space
2394  * @writeq_lock: spin lock
2395  *
2396  * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
2397  * care of 32 bit environment where its not quarenteed to send the entire word
2398  * in one transfer.
2399  */
2400 #if defined(writeq) && defined(CONFIG_64BIT)
2401 static inline void
2402 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2403 {
2404         writeq(cpu_to_le64(b), addr);
2405 }
2406 #else
2407 static inline void
2408 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2409 {
2410         unsigned long flags;
2411         __u64 data_out = cpu_to_le64(b);
2412
2413         spin_lock_irqsave(writeq_lock, flags);
2414         writel((u32)(data_out), addr);
2415         writel((u32)(data_out >> 32), (addr + 4));
2416         spin_unlock_irqrestore(writeq_lock, flags);
2417 }
2418 #endif
2419
2420 static inline u8
2421 _base_get_msix_index(struct MPT3SAS_ADAPTER *ioc)
2422 {
2423         return ioc->cpu_msix_table[raw_smp_processor_id()];
2424 }
2425
2426 /**
2427  * mpt3sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
2428  * @ioc: per adapter object
2429  * @smid: system request message index
2430  * @handle: device handle
2431  *
2432  * Return nothing.
2433  */
2434 void
2435 mpt3sas_base_put_smid_scsi_io(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 handle)
2436 {
2437         Mpi2RequestDescriptorUnion_t descriptor;
2438         u64 *request = (u64 *)&descriptor;
2439
2440
2441         descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
2442         descriptor.SCSIIO.MSIxIndex =  _base_get_msix_index(ioc);
2443         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2444         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2445         descriptor.SCSIIO.LMID = 0;
2446         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2447             &ioc->scsi_lookup_lock);
2448 }
2449
2450 /**
2451  * mpt3sas_base_put_smid_fast_path - send fast path request to firmware
2452  * @ioc: per adapter object
2453  * @smid: system request message index
2454  * @handle: device handle
2455  *
2456  * Return nothing.
2457  */
2458 void
2459 mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
2460         u16 handle)
2461 {
2462         Mpi2RequestDescriptorUnion_t descriptor;
2463         u64 *request = (u64 *)&descriptor;
2464
2465         descriptor.SCSIIO.RequestFlags =
2466             MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO;
2467         descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
2468         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2469         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2470         descriptor.SCSIIO.LMID = 0;
2471         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2472             &ioc->scsi_lookup_lock);
2473 }
2474
2475 /**
2476  * mpt3sas_base_put_smid_hi_priority - send Task Managment request to firmware
2477  * @ioc: per adapter object
2478  * @smid: system request message index
2479  *
2480  * Return nothing.
2481  */
2482 void
2483 mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2484 {
2485         Mpi2RequestDescriptorUnion_t descriptor;
2486         u64 *request = (u64 *)&descriptor;
2487
2488         descriptor.HighPriority.RequestFlags =
2489             MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
2490         descriptor.HighPriority.MSIxIndex =  0;
2491         descriptor.HighPriority.SMID = cpu_to_le16(smid);
2492         descriptor.HighPriority.LMID = 0;
2493         descriptor.HighPriority.Reserved1 = 0;
2494         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2495             &ioc->scsi_lookup_lock);
2496 }
2497
2498 /**
2499  * mpt3sas_base_put_smid_default - Default, primarily used for config pages
2500  * @ioc: per adapter object
2501  * @smid: system request message index
2502  *
2503  * Return nothing.
2504  */
2505 void
2506 mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2507 {
2508         Mpi2RequestDescriptorUnion_t descriptor;
2509         u64 *request = (u64 *)&descriptor;
2510
2511         descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2512         descriptor.Default.MSIxIndex =  _base_get_msix_index(ioc);
2513         descriptor.Default.SMID = cpu_to_le16(smid);
2514         descriptor.Default.LMID = 0;
2515         descriptor.Default.DescriptorTypeDependent = 0;
2516         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2517             &ioc->scsi_lookup_lock);
2518 }
2519
2520 /**
2521  * _base_display_OEMs_branding - Display branding string
2522  * @ioc: per adapter object
2523  *
2524  * Return nothing.
2525  */
2526 static void
2527 _base_display_OEMs_branding(struct MPT3SAS_ADAPTER *ioc)
2528 {
2529         if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
2530                 return;
2531
2532         switch (ioc->pdev->subsystem_vendor) {
2533         case PCI_VENDOR_ID_INTEL:
2534                 switch (ioc->pdev->device) {
2535                 case MPI2_MFGPAGE_DEVID_SAS2008:
2536                         switch (ioc->pdev->subsystem_device) {
2537                         case MPT2SAS_INTEL_RMS2LL080_SSDID:
2538                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2539                                     MPT2SAS_INTEL_RMS2LL080_BRANDING);
2540                                 break;
2541                         case MPT2SAS_INTEL_RMS2LL040_SSDID:
2542                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2543                                     MPT2SAS_INTEL_RMS2LL040_BRANDING);
2544                                 break;
2545                         case MPT2SAS_INTEL_SSD910_SSDID:
2546                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2547                                     MPT2SAS_INTEL_SSD910_BRANDING);
2548                                 break;
2549                         default:
2550                                 pr_info(MPT3SAS_FMT
2551                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2552                                  ioc->name, ioc->pdev->subsystem_device);
2553                                 break;
2554                         }
2555                 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2556                         switch (ioc->pdev->subsystem_device) {
2557                         case MPT2SAS_INTEL_RS25GB008_SSDID:
2558                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2559                                     MPT2SAS_INTEL_RS25GB008_BRANDING);
2560                                 break;
2561                         case MPT2SAS_INTEL_RMS25JB080_SSDID:
2562                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2563                                     MPT2SAS_INTEL_RMS25JB080_BRANDING);
2564                                 break;
2565                         case MPT2SAS_INTEL_RMS25JB040_SSDID:
2566                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2567                                     MPT2SAS_INTEL_RMS25JB040_BRANDING);
2568                                 break;
2569                         case MPT2SAS_INTEL_RMS25KB080_SSDID:
2570                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2571                                     MPT2SAS_INTEL_RMS25KB080_BRANDING);
2572                                 break;
2573                         case MPT2SAS_INTEL_RMS25KB040_SSDID:
2574                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2575                                     MPT2SAS_INTEL_RMS25KB040_BRANDING);
2576                                 break;
2577                         case MPT2SAS_INTEL_RMS25LB040_SSDID:
2578                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2579                                     MPT2SAS_INTEL_RMS25LB040_BRANDING);
2580                                 break;
2581                         case MPT2SAS_INTEL_RMS25LB080_SSDID:
2582                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2583                                     MPT2SAS_INTEL_RMS25LB080_BRANDING);
2584                                 break;
2585                         default:
2586                                 pr_info(MPT3SAS_FMT
2587                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2588                                  ioc->name, ioc->pdev->subsystem_device);
2589                                 break;
2590                         }
2591                 case MPI25_MFGPAGE_DEVID_SAS3008:
2592                         switch (ioc->pdev->subsystem_device) {
2593                         case MPT3SAS_INTEL_RMS3JC080_SSDID:
2594                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2595                                         MPT3SAS_INTEL_RMS3JC080_BRANDING);
2596                                 break;
2597
2598                         case MPT3SAS_INTEL_RS3GC008_SSDID:
2599                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2600                                         MPT3SAS_INTEL_RS3GC008_BRANDING);
2601                                 break;
2602                         case MPT3SAS_INTEL_RS3FC044_SSDID:
2603                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2604                                         MPT3SAS_INTEL_RS3FC044_BRANDING);
2605                                 break;
2606                         case MPT3SAS_INTEL_RS3UC080_SSDID:
2607                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2608                                         MPT3SAS_INTEL_RS3UC080_BRANDING);
2609                                 break;
2610                         default:
2611                                 pr_info(MPT3SAS_FMT
2612                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2613                                  ioc->name, ioc->pdev->subsystem_device);
2614                                 break;
2615                         }
2616                         break;
2617                 default:
2618                         pr_info(MPT3SAS_FMT
2619                          "Intel(R) Controller: Subsystem ID: 0x%X\n",
2620                          ioc->name, ioc->pdev->subsystem_device);
2621                         break;
2622                 }
2623                 break;
2624         case PCI_VENDOR_ID_DELL:
2625                 switch (ioc->pdev->device) {
2626                 case MPI2_MFGPAGE_DEVID_SAS2008:
2627                         switch (ioc->pdev->subsystem_device) {
2628                         case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
2629                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2630                                  MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING);
2631                                 break;
2632                         case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
2633                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2634                                  MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING);
2635                                 break;
2636                         case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
2637                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2638                                  MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING);
2639                                 break;
2640                         case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
2641                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2642                                  MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING);
2643                                 break;
2644                         case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
2645                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2646                                  MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING);
2647                                 break;
2648                         case MPT2SAS_DELL_PERC_H200_SSDID:
2649                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2650                                  MPT2SAS_DELL_PERC_H200_BRANDING);
2651                                 break;
2652                         case MPT2SAS_DELL_6GBPS_SAS_SSDID:
2653                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2654                                  MPT2SAS_DELL_6GBPS_SAS_BRANDING);
2655                                 break;
2656                         default:
2657                                 pr_info(MPT3SAS_FMT
2658                                    "Dell 6Gbps HBA: Subsystem ID: 0x%X\n",
2659                                    ioc->name, ioc->pdev->subsystem_device);
2660                                 break;
2661                         }
2662                         break;
2663                 case MPI25_MFGPAGE_DEVID_SAS3008:
2664                         switch (ioc->pdev->subsystem_device) {
2665                         case MPT3SAS_DELL_12G_HBA_SSDID:
2666                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2667                                         MPT3SAS_DELL_12G_HBA_BRANDING);
2668                                 break;
2669                         default:
2670                                 pr_info(MPT3SAS_FMT
2671                                    "Dell 12Gbps HBA: Subsystem ID: 0x%X\n",
2672                                    ioc->name, ioc->pdev->subsystem_device);
2673                                 break;
2674                         }
2675                         break;
2676                 default:
2677                         pr_info(MPT3SAS_FMT
2678                            "Dell HBA: Subsystem ID: 0x%X\n", ioc->name,
2679                            ioc->pdev->subsystem_device);
2680                         break;
2681                 }
2682                 break;
2683         case PCI_VENDOR_ID_CISCO:
2684                 switch (ioc->pdev->device) {
2685                 case MPI25_MFGPAGE_DEVID_SAS3008:
2686                         switch (ioc->pdev->subsystem_device) {
2687                         case MPT3SAS_CISCO_12G_8E_HBA_SSDID:
2688                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2689                                         MPT3SAS_CISCO_12G_8E_HBA_BRANDING);
2690                                 break;
2691                         case MPT3SAS_CISCO_12G_8I_HBA_SSDID:
2692                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2693                                         MPT3SAS_CISCO_12G_8I_HBA_BRANDING);
2694                                 break;
2695                         case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2696                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2697                                         MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2698                                 break;
2699                         default:
2700                                 pr_info(MPT3SAS_FMT
2701                                   "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2702                                   ioc->name, ioc->pdev->subsystem_device);
2703                                 break;
2704                         }
2705                         break;
2706                 case MPI25_MFGPAGE_DEVID_SAS3108_1:
2707                         switch (ioc->pdev->subsystem_device) {
2708                         case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2709                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2710                                 MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2711                                 break;
2712                         case MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID:
2713                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2714                                 MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING
2715                                 );
2716                                 break;
2717                         default:
2718                                 pr_info(MPT3SAS_FMT
2719                                  "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2720                                  ioc->name, ioc->pdev->subsystem_device);
2721                                 break;
2722                         }
2723                         break;
2724                 default:
2725                         pr_info(MPT3SAS_FMT
2726                            "Cisco SAS HBA: Subsystem ID: 0x%X\n",
2727                            ioc->name, ioc->pdev->subsystem_device);
2728                         break;
2729                 }
2730                 break;
2731         case MPT2SAS_HP_3PAR_SSVID:
2732                 switch (ioc->pdev->device) {
2733                 case MPI2_MFGPAGE_DEVID_SAS2004:
2734                         switch (ioc->pdev->subsystem_device) {
2735                         case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
2736                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2737                                     MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
2738                                 break;
2739                         default:
2740                                 pr_info(MPT3SAS_FMT
2741                                    "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2742                                    ioc->name, ioc->pdev->subsystem_device);
2743                                 break;
2744                         }
2745                 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2746                         switch (ioc->pdev->subsystem_device) {
2747                         case MPT2SAS_HP_2_4_INTERNAL_SSDID:
2748                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2749                                     MPT2SAS_HP_2_4_INTERNAL_BRANDING);
2750                                 break;
2751                         case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
2752                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2753                                     MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
2754                                 break;
2755                         case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
2756                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2757                                  MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
2758                                 break;
2759                         case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
2760                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2761                                     MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
2762                                 break;
2763                         default:
2764                                 pr_info(MPT3SAS_FMT
2765                                    "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2766                                    ioc->name, ioc->pdev->subsystem_device);
2767                                 break;
2768                         }
2769                 default:
2770                         pr_info(MPT3SAS_FMT
2771                            "HP SAS HBA: Subsystem ID: 0x%X\n",
2772                            ioc->name, ioc->pdev->subsystem_device);
2773                         break;
2774                 }
2775         default:
2776                 break;
2777         }
2778 }
2779
2780 /**
2781  * _base_display_ioc_capabilities - Disply IOC's capabilities.
2782  * @ioc: per adapter object
2783  *
2784  * Return nothing.
2785  */
2786 static void
2787 _base_display_ioc_capabilities(struct MPT3SAS_ADAPTER *ioc)
2788 {
2789         int i = 0;
2790         char desc[16];
2791         u32 iounit_pg1_flags;
2792         u32 bios_version;
2793
2794         bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2795         strncpy(desc, ioc->manu_pg0.ChipName, 16);
2796         pr_info(MPT3SAS_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "\
2797            "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2798             ioc->name, desc,
2799            (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2800            (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2801            (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2802            ioc->facts.FWVersion.Word & 0x000000FF,
2803            ioc->pdev->revision,
2804            (bios_version & 0xFF000000) >> 24,
2805            (bios_version & 0x00FF0000) >> 16,
2806            (bios_version & 0x0000FF00) >> 8,
2807             bios_version & 0x000000FF);
2808
2809         _base_display_OEMs_branding(ioc);
2810
2811         pr_info(MPT3SAS_FMT "Protocol=(", ioc->name);
2812
2813         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2814                 pr_info("Initiator");
2815                 i++;
2816         }
2817
2818         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2819                 pr_info("%sTarget", i ? "," : "");
2820                 i++;
2821         }
2822
2823         i = 0;
2824         pr_info("), ");
2825         pr_info("Capabilities=(");
2826
2827         if (!ioc->hide_ir_msg) {
2828                 if (ioc->facts.IOCCapabilities &
2829                     MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2830                         pr_info("Raid");
2831                         i++;
2832                 }
2833         }
2834
2835         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2836                 pr_info("%sTLR", i ? "," : "");
2837                 i++;
2838         }
2839
2840         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2841                 pr_info("%sMulticast", i ? "," : "");
2842                 i++;
2843         }
2844
2845         if (ioc->facts.IOCCapabilities &
2846             MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2847                 pr_info("%sBIDI Target", i ? "," : "");
2848                 i++;
2849         }
2850
2851         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2852                 pr_info("%sEEDP", i ? "," : "");
2853                 i++;
2854         }
2855
2856         if (ioc->facts.IOCCapabilities &
2857             MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2858                 pr_info("%sSnapshot Buffer", i ? "," : "");
2859                 i++;
2860         }
2861
2862         if (ioc->facts.IOCCapabilities &
2863             MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2864                 pr_info("%sDiag Trace Buffer", i ? "," : "");
2865                 i++;
2866         }
2867
2868         if (ioc->facts.IOCCapabilities &
2869             MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2870                 pr_info("%sDiag Extended Buffer", i ? "," : "");
2871                 i++;
2872         }
2873
2874         if (ioc->facts.IOCCapabilities &
2875             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2876                 pr_info("%sTask Set Full", i ? "," : "");
2877                 i++;
2878         }
2879
2880         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2881         if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2882                 pr_info("%sNCQ", i ? "," : "");
2883                 i++;
2884         }
2885
2886         pr_info(")\n");
2887 }
2888
2889 /**
2890  * mpt3sas_base_update_missing_delay - change the missing delay timers
2891  * @ioc: per adapter object
2892  * @device_missing_delay: amount of time till device is reported missing
2893  * @io_missing_delay: interval IO is returned when there is a missing device
2894  *
2895  * Return nothing.
2896  *
2897  * Passed on the command line, this function will modify the device missing
2898  * delay, as well as the io missing delay. This should be called at driver
2899  * load time.
2900  */
2901 void
2902 mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
2903         u16 device_missing_delay, u8 io_missing_delay)
2904 {
2905         u16 dmd, dmd_new, dmd_orignal;
2906         u8 io_missing_delay_original;
2907         u16 sz;
2908         Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2909         Mpi2ConfigReply_t mpi_reply;
2910         u8 num_phys = 0;
2911         u16 ioc_status;
2912
2913         mpt3sas_config_get_number_hba_phys(ioc, &num_phys);
2914         if (!num_phys)
2915                 return;
2916
2917         sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2918             sizeof(Mpi2SasIOUnit1PhyData_t));
2919         sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2920         if (!sas_iounit_pg1) {
2921                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2922                     ioc->name, __FILE__, __LINE__, __func__);
2923                 goto out;
2924         }
2925         if ((mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2926             sas_iounit_pg1, sz))) {
2927                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2928                     ioc->name, __FILE__, __LINE__, __func__);
2929                 goto out;
2930         }
2931         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2932             MPI2_IOCSTATUS_MASK;
2933         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2934                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2935                     ioc->name, __FILE__, __LINE__, __func__);
2936                 goto out;
2937         }
2938
2939         /* device missing delay */
2940         dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2941         if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2942                 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2943         else
2944                 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2945         dmd_orignal = dmd;
2946         if (device_missing_delay > 0x7F) {
2947                 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2948                     device_missing_delay;
2949                 dmd = dmd / 16;
2950                 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2951         } else
2952                 dmd = device_missing_delay;
2953         sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2954
2955         /* io missing delay */
2956         io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2957         sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2958
2959         if (!mpt3sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2960             sz)) {
2961                 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2962                         dmd_new = (dmd &
2963                             MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2964                 else
2965                         dmd_new =
2966                     dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2967                 pr_info(MPT3SAS_FMT "device_missing_delay: old(%d), new(%d)\n",
2968                         ioc->name, dmd_orignal, dmd_new);
2969                 pr_info(MPT3SAS_FMT "ioc_missing_delay: old(%d), new(%d)\n",
2970                         ioc->name, io_missing_delay_original,
2971                     io_missing_delay);
2972                 ioc->device_missing_delay = dmd_new;
2973                 ioc->io_missing_delay = io_missing_delay;
2974         }
2975
2976 out:
2977         kfree(sas_iounit_pg1);
2978 }
2979 /**
2980  * _base_static_config_pages - static start of day config pages
2981  * @ioc: per adapter object
2982  *
2983  * Return nothing.
2984  */
2985 static void
2986 _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc)
2987 {
2988         Mpi2ConfigReply_t mpi_reply;
2989         u32 iounit_pg1_flags;
2990
2991         mpt3sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2992         if (ioc->ir_firmware)
2993                 mpt3sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2994                     &ioc->manu_pg10);
2995
2996         /*
2997          * Ensure correct T10 PI operation if vendor left EEDPTagMode
2998          * flag unset in NVDATA.
2999          */
3000         mpt3sas_config_get_manufacturing_pg11(ioc, &mpi_reply, &ioc->manu_pg11);
3001         if (ioc->manu_pg11.EEDPTagMode == 0) {
3002                 pr_err("%s: overriding NVDATA EEDPTagMode setting\n",
3003                     ioc->name);
3004                 ioc->manu_pg11.EEDPTagMode &= ~0x3;
3005                 ioc->manu_pg11.EEDPTagMode |= 0x1;
3006                 mpt3sas_config_set_manufacturing_pg11(ioc, &mpi_reply,
3007                     &ioc->manu_pg11);
3008         }
3009
3010         mpt3sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
3011         mpt3sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
3012         mpt3sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
3013         mpt3sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
3014         mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
3015         mpt3sas_config_get_iounit_pg8(ioc, &mpi_reply, &ioc->iounit_pg8);
3016         _base_display_ioc_capabilities(ioc);
3017
3018         /*
3019          * Enable task_set_full handling in iounit_pg1 when the
3020          * facts capabilities indicate that its supported.
3021          */
3022         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
3023         if ((ioc->facts.IOCCapabilities &
3024             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
3025                 iounit_pg1_flags &=
3026                     ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
3027         else
3028                 iounit_pg1_flags |=
3029                     MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
3030         ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
3031         mpt3sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
3032
3033         if (ioc->iounit_pg8.NumSensors)
3034                 ioc->temp_sensors_count = ioc->iounit_pg8.NumSensors;
3035 }
3036
3037 /**
3038  * _base_release_memory_pools - release memory
3039  * @ioc: per adapter object
3040  *
3041  * Free memory allocated from _base_allocate_memory_pools.
3042  *
3043  * Return nothing.
3044  */
3045 static void
3046 _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
3047 {
3048         int i = 0;
3049         struct reply_post_struct *rps;
3050
3051         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3052             __func__));
3053
3054         if (ioc->request) {
3055                 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
3056                     ioc->request,  ioc->request_dma);
3057                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3058                         "request_pool(0x%p): free\n",
3059                         ioc->name, ioc->request));
3060                 ioc->request = NULL;
3061         }
3062
3063         if (ioc->sense) {
3064                 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
3065                 if (ioc->sense_dma_pool)
3066                         pci_pool_destroy(ioc->sense_dma_pool);
3067                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3068                         "sense_pool(0x%p): free\n",
3069                         ioc->name, ioc->sense));
3070                 ioc->sense = NULL;
3071         }
3072
3073         if (ioc->reply) {
3074                 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
3075                 if (ioc->reply_dma_pool)
3076                         pci_pool_destroy(ioc->reply_dma_pool);
3077                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3078                         "reply_pool(0x%p): free\n",
3079                         ioc->name, ioc->reply));
3080                 ioc->reply = NULL;
3081         }
3082
3083         if (ioc->reply_free) {
3084                 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
3085                     ioc->reply_free_dma);
3086                 if (ioc->reply_free_dma_pool)
3087                         pci_pool_destroy(ioc->reply_free_dma_pool);
3088                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3089                         "reply_free_pool(0x%p): free\n",
3090                         ioc->name, ioc->reply_free));
3091                 ioc->reply_free = NULL;
3092         }
3093
3094         if (ioc->reply_post) {
3095                 do {
3096                         rps = &ioc->reply_post[i];
3097                         if (rps->reply_post_free) {
3098                                 pci_pool_free(
3099                                     ioc->reply_post_free_dma_pool,
3100                                     rps->reply_post_free,
3101                                     rps->reply_post_free_dma);
3102                                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3103                                     "reply_post_free_pool(0x%p): free\n",
3104                                     ioc->name, rps->reply_post_free));
3105                                 rps->reply_post_free = NULL;
3106                         }
3107                 } while (ioc->rdpq_array_enable &&
3108                            (++i < ioc->reply_queue_count));
3109
3110                 if (ioc->reply_post_free_dma_pool)
3111                         pci_pool_destroy(ioc->reply_post_free_dma_pool);
3112                 kfree(ioc->reply_post);
3113         }
3114
3115         if (ioc->config_page) {
3116                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3117                     "config_page(0x%p): free\n", ioc->name,
3118                     ioc->config_page));
3119                 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
3120                     ioc->config_page, ioc->config_page_dma);
3121         }
3122
3123         if (ioc->scsi_lookup) {
3124                 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
3125                 ioc->scsi_lookup = NULL;
3126         }
3127         kfree(ioc->hpr_lookup);
3128         kfree(ioc->internal_lookup);
3129         if (ioc->chain_lookup) {
3130                 for (i = 0; i < ioc->chain_depth; i++) {
3131                         if (ioc->chain_lookup[i].chain_buffer)
3132                                 pci_pool_free(ioc->chain_dma_pool,
3133                                     ioc->chain_lookup[i].chain_buffer,
3134                                     ioc->chain_lookup[i].chain_buffer_dma);
3135                 }
3136                 if (ioc->chain_dma_pool)
3137                         pci_pool_destroy(ioc->chain_dma_pool);
3138                 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
3139                 ioc->chain_lookup = NULL;
3140         }
3141 }
3142
3143 /**
3144  * _base_allocate_memory_pools - allocate start of day memory pools
3145  * @ioc: per adapter object
3146  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3147  *
3148  * Returns 0 success, anything else error
3149  */
3150 static int
3151 _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc,  int sleep_flag)
3152 {
3153         struct mpt3sas_facts *facts;
3154         u16 max_sge_elements;
3155         u16 chains_needed_per_io;
3156         u32 sz, total_sz, reply_post_free_sz;
3157         u32 retry_sz;
3158         u16 max_request_credit;
3159         unsigned short sg_tablesize;
3160         u16 sge_size;
3161         int i;
3162
3163         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3164             __func__));
3165
3166
3167         retry_sz = 0;
3168         facts = &ioc->facts;
3169
3170         /* command line tunables for max sgl entries */
3171         if (max_sgl_entries != -1)
3172                 sg_tablesize = max_sgl_entries;
3173         else {
3174                 if (ioc->hba_mpi_version_belonged == MPI2_VERSION)
3175                         sg_tablesize = MPT2SAS_SG_DEPTH;
3176                 else
3177                         sg_tablesize = MPT3SAS_SG_DEPTH;
3178         }
3179
3180         if (sg_tablesize < MPT_MIN_PHYS_SEGMENTS)
3181                 sg_tablesize = MPT_MIN_PHYS_SEGMENTS;
3182         else if (sg_tablesize > MPT_MAX_PHYS_SEGMENTS) {
3183                 sg_tablesize = min_t(unsigned short, sg_tablesize,
3184                                       SCSI_MAX_SG_CHAIN_SEGMENTS);
3185                 pr_warn(MPT3SAS_FMT
3186                  "sg_tablesize(%u) is bigger than kernel"
3187                  " defined SCSI_MAX_SG_SEGMENTS(%u)\n", ioc->name,
3188                  sg_tablesize, MPT_MAX_PHYS_SEGMENTS);
3189         }
3190         ioc->shost->sg_tablesize = sg_tablesize;
3191
3192         ioc->hi_priority_depth = facts->HighPriorityCredit;
3193         ioc->internal_depth = ioc->hi_priority_depth + (5);
3194         /* command line tunables  for max controller queue depth */
3195         if (max_queue_depth != -1 && max_queue_depth != 0) {
3196                 max_request_credit = min_t(u16, max_queue_depth +
3197                     ioc->hi_priority_depth + ioc->internal_depth,
3198                     facts->RequestCredit);
3199                 if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
3200                         max_request_credit =  MAX_HBA_QUEUE_DEPTH;
3201         } else
3202                 max_request_credit = min_t(u16, facts->RequestCredit,
3203                     MAX_HBA_QUEUE_DEPTH);
3204
3205         ioc->hba_queue_depth = max_request_credit;
3206
3207         /* request frame size */
3208         ioc->request_sz = facts->IOCRequestFrameSize * 4;
3209
3210         /* reply frame size */
3211         ioc->reply_sz = facts->ReplyFrameSize * 4;
3212
3213         /* calculate the max scatter element size */
3214         sge_size = max_t(u16, ioc->sge_size, ioc->sge_size_ieee);
3215
3216  retry_allocation:
3217         total_sz = 0;
3218         /* calculate number of sg elements left over in the 1st frame */
3219         max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
3220             sizeof(Mpi2SGEIOUnion_t)) + sge_size);
3221         ioc->max_sges_in_main_message = max_sge_elements/sge_size;
3222
3223         /* now do the same for a chain buffer */
3224         max_sge_elements = ioc->request_sz - sge_size;
3225         ioc->max_sges_in_chain_message = max_sge_elements/sge_size;
3226
3227         /*
3228          *  MPT3SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
3229          */
3230         chains_needed_per_io = ((ioc->shost->sg_tablesize -
3231            ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
3232             + 1;
3233         if (chains_needed_per_io > facts->MaxChainDepth) {
3234                 chains_needed_per_io = facts->MaxChainDepth;
3235                 ioc->shost->sg_tablesize = min_t(u16,
3236                 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
3237                 * chains_needed_per_io), ioc->shost->sg_tablesize);
3238         }
3239         ioc->chains_needed_per_io = chains_needed_per_io;
3240
3241         /* reply free queue sizing - taking into account for 64 FW events */
3242         ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3243
3244         /* calculate reply descriptor post queue depth */
3245         ioc->reply_post_queue_depth = ioc->hba_queue_depth +
3246                                 ioc->reply_free_queue_depth +  1 ;
3247         /* align the reply post queue on the next 16 count boundary */
3248         if (ioc->reply_post_queue_depth % 16)
3249                 ioc->reply_post_queue_depth += 16 -
3250                 (ioc->reply_post_queue_depth % 16);
3251
3252
3253         if (ioc->reply_post_queue_depth >
3254             facts->MaxReplyDescriptorPostQueueDepth) {
3255                 ioc->reply_post_queue_depth =
3256                                 facts->MaxReplyDescriptorPostQueueDepth -
3257                     (facts->MaxReplyDescriptorPostQueueDepth % 16);
3258                 ioc->hba_queue_depth =
3259                                 ((ioc->reply_post_queue_depth - 64) / 2) - 1;
3260                 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3261         }
3262
3263         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scatter gather: " \
3264             "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
3265             "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
3266             ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
3267             ioc->chains_needed_per_io));
3268
3269         /* reply post queue, 16 byte align */
3270         reply_post_free_sz = ioc->reply_post_queue_depth *
3271             sizeof(Mpi2DefaultReplyDescriptor_t);
3272
3273         sz = reply_post_free_sz;
3274         if (_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable)
3275                 sz *= ioc->reply_queue_count;
3276
3277         ioc->reply_post = kcalloc((ioc->rdpq_array_enable) ?
3278             (ioc->reply_queue_count):1,
3279             sizeof(struct reply_post_struct), GFP_KERNEL);
3280
3281         if (!ioc->reply_post) {
3282                 pr_err(MPT3SAS_FMT "reply_post_free pool: kcalloc failed\n",
3283                         ioc->name);
3284                 goto out;
3285         }
3286         ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
3287             ioc->pdev, sz, 16, 0);
3288         if (!ioc->reply_post_free_dma_pool) {
3289                 pr_err(MPT3SAS_FMT
3290                  "reply_post_free pool: pci_pool_create failed\n",
3291                  ioc->name);
3292                 goto out;
3293         }
3294         i = 0;
3295         do {
3296                 ioc->reply_post[i].reply_post_free =
3297                     pci_pool_alloc(ioc->reply_post_free_dma_pool,
3298                     GFP_KERNEL,
3299                     &ioc->reply_post[i].reply_post_free_dma);
3300                 if (!ioc->reply_post[i].reply_post_free) {
3301                         pr_err(MPT3SAS_FMT
3302                         "reply_post_free pool: pci_pool_alloc failed\n",
3303                         ioc->name);
3304                         goto out;
3305                 }
3306                 memset(ioc->reply_post[i].reply_post_free, 0, sz);
3307                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3308                     "reply post free pool (0x%p): depth(%d),"
3309                     "element_size(%d), pool_size(%d kB)\n", ioc->name,
3310                     ioc->reply_post[i].reply_post_free,
3311                     ioc->reply_post_queue_depth, 8, sz/1024));
3312                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3313                     "reply_post_free_dma = (0x%llx)\n", ioc->name,
3314                     (unsigned long long)
3315                     ioc->reply_post[i].reply_post_free_dma));
3316                 total_sz += sz;
3317         } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
3318
3319         if (ioc->dma_mask == 64) {
3320                 if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
3321                         pr_warn(MPT3SAS_FMT
3322                             "no suitable consistent DMA mask for %s\n",
3323                             ioc->name, pci_name(ioc->pdev));
3324                         goto out;
3325                 }
3326         }
3327
3328         ioc->scsiio_depth = ioc->hba_queue_depth -
3329             ioc->hi_priority_depth - ioc->internal_depth;
3330
3331         /* set the scsi host can_queue depth
3332          * with some internal commands that could be outstanding
3333          */
3334         ioc->shost->can_queue = ioc->scsiio_depth;
3335         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3336                 "scsi host: can_queue depth (%d)\n",
3337                 ioc->name, ioc->shost->can_queue));
3338
3339
3340         /* contiguous pool for request and chains, 16 byte align, one extra "
3341          * "frame for smid=0
3342          */
3343         ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
3344         sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
3345
3346         /* hi-priority queue */
3347         sz += (ioc->hi_priority_depth * ioc->request_sz);
3348
3349         /* internal queue */
3350         sz += (ioc->internal_depth * ioc->request_sz);
3351
3352         ioc->request_dma_sz = sz;
3353         ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
3354         if (!ioc->request) {
3355                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3356                     "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3357                     "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
3358                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3359                 if (ioc->scsiio_depth < MPT3SAS_SAS_QUEUE_DEPTH)
3360                         goto out;
3361                 retry_sz += 64;
3362                 ioc->hba_queue_depth = max_request_credit - retry_sz;
3363                 goto retry_allocation;
3364         }
3365
3366         if (retry_sz)
3367                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3368                     "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3369                     "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
3370                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3371
3372         /* hi-priority queue */
3373         ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
3374             ioc->request_sz);
3375         ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
3376             ioc->request_sz);
3377
3378         /* internal queue */
3379         ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
3380             ioc->request_sz);
3381         ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
3382             ioc->request_sz);
3383
3384         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3385                 "request pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3386                 ioc->name, ioc->request, ioc->hba_queue_depth, ioc->request_sz,
3387             (ioc->hba_queue_depth * ioc->request_sz)/1024));
3388
3389         dinitprintk(ioc, pr_info(MPT3SAS_FMT "request pool: dma(0x%llx)\n",
3390             ioc->name, (unsigned long long) ioc->request_dma));
3391         total_sz += sz;
3392
3393         sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
3394         ioc->scsi_lookup_pages = get_order(sz);
3395         ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
3396             GFP_KERNEL, ioc->scsi_lookup_pages);
3397         if (!ioc->scsi_lookup) {
3398                 pr_err(MPT3SAS_FMT "scsi_lookup: get_free_pages failed, sz(%d)\n",
3399                         ioc->name, (int)sz);
3400                 goto out;
3401         }
3402
3403         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scsiio(0x%p): depth(%d)\n",
3404                 ioc->name, ioc->request, ioc->scsiio_depth));
3405
3406         ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
3407         sz = ioc->chain_depth * sizeof(struct chain_tracker);
3408         ioc->chain_pages = get_order(sz);
3409         ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
3410             GFP_KERNEL, ioc->chain_pages);
3411         if (!ioc->chain_lookup) {
3412                 pr_err(MPT3SAS_FMT "chain_lookup: __get_free_pages failed\n",
3413                         ioc->name);
3414                 goto out;
3415         }
3416         ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
3417             ioc->request_sz, 16, 0);
3418         if (!ioc->chain_dma_pool) {
3419                 pr_err(MPT3SAS_FMT "chain_dma_pool: pci_pool_create failed\n",
3420                         ioc->name);
3421                 goto out;
3422         }
3423         for (i = 0; i < ioc->chain_depth; i++) {
3424                 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
3425                     ioc->chain_dma_pool , GFP_KERNEL,
3426                     &ioc->chain_lookup[i].chain_buffer_dma);
3427                 if (!ioc->chain_lookup[i].chain_buffer) {
3428                         ioc->chain_depth = i;
3429                         goto chain_done;
3430                 }
3431                 total_sz += ioc->request_sz;
3432         }
3433  chain_done:
3434         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3435                 "chain pool depth(%d), frame_size(%d), pool_size(%d kB)\n",
3436                 ioc->name, ioc->chain_depth, ioc->request_sz,
3437                 ((ioc->chain_depth *  ioc->request_sz))/1024));
3438
3439         /* initialize hi-priority queue smid's */
3440         ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
3441             sizeof(struct request_tracker), GFP_KERNEL);
3442         if (!ioc->hpr_lookup) {
3443                 pr_err(MPT3SAS_FMT "hpr_lookup: kcalloc failed\n",
3444                     ioc->name);
3445                 goto out;
3446         }
3447         ioc->hi_priority_smid = ioc->scsiio_depth + 1;
3448         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3449                 "hi_priority(0x%p): depth(%d), start smid(%d)\n",
3450                 ioc->name, ioc->hi_priority,
3451             ioc->hi_priority_depth, ioc->hi_priority_smid));
3452
3453         /* initialize internal queue smid's */
3454         ioc->internal_lookup = kcalloc(ioc->internal_depth,
3455             sizeof(struct request_tracker), GFP_KERNEL);
3456         if (!ioc->internal_lookup) {
3457                 pr_err(MPT3SAS_FMT "internal_lookup: kcalloc failed\n",
3458                     ioc->name);
3459                 goto out;
3460         }
3461         ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
3462         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3463                 "internal(0x%p): depth(%d), start smid(%d)\n",
3464                 ioc->name, ioc->internal,
3465             ioc->internal_depth, ioc->internal_smid));
3466
3467         /* sense buffers, 4 byte align */
3468         sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
3469         ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
3470             0);
3471         if (!ioc->sense_dma_pool) {
3472                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_create failed\n",
3473                     ioc->name);
3474                 goto out;
3475         }
3476         ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
3477             &ioc->sense_dma);
3478         if (!ioc->sense) {
3479                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_alloc failed\n",
3480                     ioc->name);
3481                 goto out;
3482         }
3483         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3484             "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
3485             "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
3486             SCSI_SENSE_BUFFERSIZE, sz/1024));
3487         dinitprintk(ioc, pr_info(MPT3SAS_FMT "sense_dma(0x%llx)\n",
3488             ioc->name, (unsigned long long)ioc->sense_dma));
3489         total_sz += sz;
3490
3491         /* reply pool, 4 byte align */
3492         sz = ioc->reply_free_queue_depth * ioc->reply_sz;
3493         ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
3494             0);
3495         if (!ioc->reply_dma_pool) {
3496                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_create failed\n",
3497                     ioc->name);
3498                 goto out;
3499         }
3500         ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
3501             &ioc->reply_dma);
3502         if (!ioc->reply) {
3503                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_alloc failed\n",
3504                     ioc->name);
3505                 goto out;
3506         }
3507         ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
3508         ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
3509         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3510                 "reply pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3511                 ioc->name, ioc->reply,
3512             ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
3513         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_dma(0x%llx)\n",
3514             ioc->name, (unsigned long long)ioc->reply_dma));
3515         total_sz += sz;
3516
3517         /* reply free queue, 16 byte align */
3518         sz = ioc->reply_free_queue_depth * 4;
3519         ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
3520             ioc->pdev, sz, 16, 0);
3521         if (!ioc->reply_free_dma_pool) {
3522                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_create failed\n",
3523                         ioc->name);
3524                 goto out;
3525         }
3526         ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
3527             &ioc->reply_free_dma);
3528         if (!ioc->reply_free) {
3529                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_alloc failed\n",
3530                         ioc->name);
3531                 goto out;
3532         }
3533         memset(ioc->reply_free, 0, sz);
3534         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_free pool(0x%p): " \
3535             "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
3536             ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
3537         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3538                 "reply_free_dma (0x%llx)\n",
3539                 ioc->name, (unsigned long long)ioc->reply_free_dma));
3540         total_sz += sz;
3541
3542         ioc->config_page_sz = 512;
3543         ioc->config_page = pci_alloc_consistent(ioc->pdev,
3544             ioc->config_page_sz, &ioc->config_page_dma);
3545         if (!ioc->config_page) {
3546                 pr_err(MPT3SAS_FMT
3547                         "config page: pci_pool_alloc failed\n",
3548                         ioc->name);
3549                 goto out;
3550         }
3551         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3552                 "config page(0x%p): size(%d)\n",
3553                 ioc->name, ioc->config_page, ioc->config_page_sz));
3554         dinitprintk(ioc, pr_info(MPT3SAS_FMT "config_page_dma(0x%llx)\n",
3555                 ioc->name, (unsigned long long)ioc->config_page_dma));
3556         total_sz += ioc->config_page_sz;
3557
3558         pr_info(MPT3SAS_FMT "Allocated physical memory: size(%d kB)\n",
3559             ioc->name, total_sz/1024);
3560         pr_info(MPT3SAS_FMT
3561                 "Current Controller Queue Depth(%d),Max Controller Queue Depth(%d)\n",
3562             ioc->name, ioc->shost->can_queue, facts->RequestCredit);
3563         pr_info(MPT3SAS_FMT "Scatter Gather Elements per IO(%d)\n",
3564             ioc->name, ioc->shost->sg_tablesize);
3565         return 0;
3566
3567  out:
3568         return -ENOMEM;
3569 }
3570
3571 /**
3572  * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
3573  * @ioc: Pointer to MPT_ADAPTER structure
3574  * @cooked: Request raw or cooked IOC state
3575  *
3576  * Returns all IOC Doorbell register bits if cooked==0, else just the
3577  * Doorbell bits in MPI_IOC_STATE_MASK.
3578  */
3579 u32
3580 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked)
3581 {
3582         u32 s, sc;
3583
3584         s = readl(&ioc->chip->Doorbell);
3585         sc = s & MPI2_IOC_STATE_MASK;
3586         return cooked ? sc : s;
3587 }
3588
3589 /**
3590  * _base_wait_on_iocstate - waiting on a particular ioc state
3591  * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
3592  * @timeout: timeout in second
3593  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3594  *
3595  * Returns 0 for success, non-zero for failure.
3596  */
3597 static int
3598 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
3599         int sleep_flag)
3600 {
3601         u32 count, cntdn;
3602         u32 current_state;
3603
3604         count = 0;
3605         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3606         do {
3607                 current_state = mpt3sas_base_get_iocstate(ioc, 1);
3608                 if (current_state == ioc_state)
3609                         return 0;
3610                 if (count && current_state == MPI2_IOC_STATE_FAULT)
3611                         break;
3612                 if (sleep_flag == CAN_SLEEP)
3613                         usleep_range(1000, 1500);
3614                 else
3615                         udelay(500);
3616                 count++;
3617         } while (--cntdn);
3618
3619         return current_state;
3620 }
3621
3622 /**
3623  * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
3624  * a write to the doorbell)
3625  * @ioc: per adapter object
3626  * @timeout: timeout in second
3627  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3628  *
3629  * Returns 0 for success, non-zero for failure.
3630  *
3631  * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
3632  */
3633 static int
3634 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
3635
3636 static int
3637 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout,
3638         int sleep_flag)
3639 {
3640         u32 cntdn, count;
3641         u32 int_status;
3642
3643         count = 0;
3644         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3645         do {
3646                 int_status = readl(&ioc->chip->HostInterruptStatus);
3647                 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3648                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3649                                 "%s: successful count(%d), timeout(%d)\n",
3650                                 ioc->name, __func__, count, timeout));
3651                         return 0;
3652                 }
3653                 if (sleep_flag == CAN_SLEEP)
3654                         usleep_range(1000, 1500);
3655                 else
3656                         udelay(500);
3657                 count++;
3658         } while (--cntdn);
3659
3660         pr_err(MPT3SAS_FMT
3661                 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3662                 ioc->name, __func__, count, int_status);
3663         return -EFAULT;
3664 }
3665
3666 /**
3667  * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
3668  * @ioc: per adapter object
3669  * @timeout: timeout in second
3670  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3671  *
3672  * Returns 0 for success, non-zero for failure.
3673  *
3674  * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
3675  * doorbell.
3676  */
3677 static int
3678 _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER *ioc, int timeout,
3679         int sleep_flag)
3680 {
3681         u32 cntdn, count;
3682         u32 int_status;
3683         u32 doorbell;
3684
3685         count = 0;
3686         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3687         do {
3688                 int_status = readl(&ioc->chip->HostInterruptStatus);
3689                 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
3690                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3691                                 "%s: successful count(%d), timeout(%d)\n",
3692                                 ioc->name, __func__, count, timeout));
3693                         return 0;
3694                 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3695                         doorbell = readl(&ioc->chip->Doorbell);
3696                         if ((doorbell & MPI2_IOC_STATE_MASK) ==
3697                             MPI2_IOC_STATE_FAULT) {
3698                                 mpt3sas_base_fault_info(ioc , doorbell);
3699                                 return -EFAULT;
3700                         }
3701                 } else if (int_status == 0xFFFFFFFF)
3702                         goto out;
3703
3704                 if (sleep_flag == CAN_SLEEP)
3705                         usleep_range(1000, 1500);
3706                 else
3707                         udelay(500);
3708                 count++;
3709         } while (--cntdn);
3710
3711  out:
3712         pr_err(MPT3SAS_FMT
3713          "%s: failed due to timeout count(%d), int_status(%x)!\n",
3714          ioc->name, __func__, count, int_status);
3715         return -EFAULT;
3716 }
3717
3718 /**
3719  * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
3720  * @ioc: per adapter object
3721  * @timeout: timeout in second
3722  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3723  *
3724  * Returns 0 for success, non-zero for failure.
3725  *
3726  */
3727 static int
3728 _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER *ioc, int timeout,
3729         int sleep_flag)
3730 {
3731         u32 cntdn, count;
3732         u32 doorbell_reg;
3733
3734         count = 0;
3735         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3736         do {
3737                 doorbell_reg = readl(&ioc->chip->Doorbell);
3738                 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
3739                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3740                                 "%s: successful count(%d), timeout(%d)\n",
3741                                 ioc->name, __func__, count, timeout));
3742                         return 0;
3743                 }
3744                 if (sleep_flag == CAN_SLEEP)
3745                         usleep_range(1000, 1500);
3746                 else
3747                         udelay(500);
3748                 count++;
3749         } while (--cntdn);
3750
3751         pr_err(MPT3SAS_FMT
3752                 "%s: failed due to timeout count(%d), doorbell_reg(%x)!\n",
3753                 ioc->name, __func__, count, doorbell_reg);
3754         return -EFAULT;
3755 }
3756
3757 /**
3758  * _base_send_ioc_reset - send doorbell reset
3759  * @ioc: per adapter object
3760  * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
3761  * @timeout: timeout in second
3762  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3763  *
3764  * Returns 0 for success, non-zero for failure.
3765  */
3766 static int
3767 _base_send_ioc_reset(struct MPT3SAS_ADAPTER *ioc, u8 reset_type, int timeout,
3768         int sleep_flag)
3769 {
3770         u32 ioc_state;
3771         int r = 0;
3772
3773         if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
3774                 pr_err(MPT3SAS_FMT "%s: unknown reset_type\n",
3775                     ioc->name, __func__);
3776                 return -EFAULT;
3777         }
3778
3779         if (!(ioc->facts.IOCCapabilities &
3780            MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
3781                 return -EFAULT;
3782
3783         pr_info(MPT3SAS_FMT "sending message unit reset !!\n", ioc->name);
3784
3785         writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
3786             &ioc->chip->Doorbell);
3787         if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
3788                 r = -EFAULT;
3789                 goto out;
3790         }
3791         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
3792             timeout, sleep_flag);
3793         if (ioc_state) {
3794                 pr_err(MPT3SAS_FMT
3795                         "%s: failed going to ready state (ioc_state=0x%x)\n",
3796                         ioc->name, __func__, ioc_state);
3797                 r = -EFAULT;
3798                 goto out;
3799         }
3800  out:
3801         pr_info(MPT3SAS_FMT "message unit reset: %s\n",
3802             ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3803         return r;
3804 }
3805
3806 /**
3807  * _base_handshake_req_reply_wait - send request thru doorbell interface
3808  * @ioc: per adapter object
3809  * @request_bytes: request length
3810  * @request: pointer having request payload
3811  * @reply_bytes: reply length
3812  * @reply: pointer to reply payload
3813  * @timeout: timeout in second
3814  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3815  *
3816  * Returns 0 for success, non-zero for failure.
3817  */
3818 static int
3819 _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes,
3820         u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3821 {
3822         MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3823         int i;
3824         u8 failed;
3825         u16 dummy;
3826         __le32 *mfp;
3827
3828         /* make sure doorbell is not in use */
3829         if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3830                 pr_err(MPT3SAS_FMT
3831                         "doorbell is in use (line=%d)\n",
3832                         ioc->name, __LINE__);
3833                 return -EFAULT;
3834         }
3835
3836         /* clear pending doorbell interrupts from previous state changes */
3837         if (readl(&ioc->chip->HostInterruptStatus) &
3838             MPI2_HIS_IOC2SYS_DB_STATUS)
3839                 writel(0, &ioc->chip->HostInterruptStatus);
3840
3841         /* send message to ioc */
3842         writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3843             ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3844             &ioc->chip->Doorbell);
3845
3846         if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3847                 pr_err(MPT3SAS_FMT
3848                         "doorbell handshake int failed (line=%d)\n",
3849                         ioc->name, __LINE__);
3850                 return -EFAULT;
3851         }
3852         writel(0, &ioc->chip->HostInterruptStatus);
3853
3854         if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3855                 pr_err(MPT3SAS_FMT
3856                         "doorbell handshake ack failed (line=%d)\n",
3857                         ioc->name, __LINE__);
3858                 return -EFAULT;
3859         }
3860
3861         /* send message 32-bits at a time */
3862         for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3863                 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3864                 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3865                         failed = 1;
3866         }
3867
3868         if (failed) {
3869                 pr_err(MPT3SAS_FMT
3870                         "doorbell handshake sending request failed (line=%d)\n",
3871                         ioc->name, __LINE__);
3872                 return -EFAULT;
3873         }
3874
3875         /* now wait for the reply */
3876         if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3877                 pr_err(MPT3SAS_FMT
3878                         "doorbell handshake int failed (line=%d)\n",
3879                         ioc->name, __LINE__);
3880                 return -EFAULT;
3881         }
3882
3883         /* read the first two 16-bits, it gives the total length of the reply */
3884         reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3885             & MPI2_DOORBELL_DATA_MASK);
3886         writel(0, &ioc->chip->HostInterruptStatus);
3887         if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3888                 pr_err(MPT3SAS_FMT
3889                         "doorbell handshake int failed (line=%d)\n",
3890                         ioc->name, __LINE__);
3891                 return -EFAULT;
3892         }
3893         reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3894             & MPI2_DOORBELL_DATA_MASK);
3895         writel(0, &ioc->chip->HostInterruptStatus);
3896
3897         for (i = 2; i < default_reply->MsgLength * 2; i++)  {
3898                 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3899                         pr_err(MPT3SAS_FMT
3900                                 "doorbell handshake int failed (line=%d)\n",
3901                                 ioc->name, __LINE__);
3902                         return -EFAULT;
3903                 }
3904                 if (i >=  reply_bytes/2) /* overflow case */
3905                         dummy = readl(&ioc->chip->Doorbell);
3906                 else
3907                         reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3908                             & MPI2_DOORBELL_DATA_MASK);
3909                 writel(0, &ioc->chip->HostInterruptStatus);
3910         }
3911
3912         _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3913         if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3914                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
3915                         "doorbell is in use (line=%d)\n", ioc->name, __LINE__));
3916         }
3917         writel(0, &ioc->chip->HostInterruptStatus);
3918
3919         if (ioc->logging_level & MPT_DEBUG_INIT) {
3920                 mfp = (__le32 *)reply;
3921                 pr_info("\toffset:data\n");
3922                 for (i = 0; i < reply_bytes/4; i++)
3923                         pr_info("\t[0x%02x]:%08x\n", i*4,
3924                             le32_to_cpu(mfp[i]));
3925         }
3926         return 0;
3927 }
3928
3929 /**
3930  * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
3931  * @ioc: per adapter object
3932  * @mpi_reply: the reply payload from FW
3933  * @mpi_request: the request payload sent to FW
3934  *
3935  * The SAS IO Unit Control Request message allows the host to perform low-level
3936  * operations, such as resets on the PHYs of the IO Unit, also allows the host
3937  * to obtain the IOC assigned device handles for a device if it has other
3938  * identifying information about the device, in addition allows the host to
3939  * remove IOC resources associated with the device.
3940  *
3941  * Returns 0 for success, non-zero for failure.
3942  */
3943 int
3944 mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
3945         Mpi2SasIoUnitControlReply_t *mpi_reply,
3946         Mpi2SasIoUnitControlRequest_t *mpi_request)
3947 {
3948         u16 smid;
3949         u32 ioc_state;
3950         unsigned long timeleft;
3951         bool issue_reset = false;
3952         int rc;
3953         void *request;
3954         u16 wait_state_count;
3955
3956         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3957             __func__));
3958
3959         mutex_lock(&ioc->base_cmds.mutex);
3960
3961         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
3962                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
3963                     ioc->name, __func__);
3964                 rc = -EAGAIN;
3965                 goto out;
3966         }
3967
3968         wait_state_count = 0;
3969         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3970         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3971                 if (wait_state_count++ == 10) {
3972                         pr_err(MPT3SAS_FMT
3973                             "%s: failed due to ioc not operational\n",
3974                             ioc->name, __func__);
3975                         rc = -EFAULT;
3976                         goto out;
3977                 }
3978                 ssleep(1);
3979                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3980                 pr_info(MPT3SAS_FMT
3981                         "%s: waiting for operational state(count=%d)\n",
3982                         ioc->name, __func__, wait_state_count);
3983         }
3984
3985         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
3986         if (!smid) {
3987                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
3988                     ioc->name, __func__);
3989                 rc = -EAGAIN;
3990                 goto out;
3991         }
3992
3993         rc = 0;
3994         ioc->base_cmds.status = MPT3_CMD_PENDING;
3995         request = mpt3sas_base_get_msg_frame(ioc, smid);
3996         ioc->base_cmds.smid = smid;
3997         memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
3998         if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3999             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
4000                 ioc->ioc_link_reset_in_progress = 1;
4001         init_completion(&ioc->base_cmds.done);
4002         mpt3sas_base_put_smid_default(ioc, smid);
4003         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
4004             msecs_to_jiffies(10000));
4005         if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
4006             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
4007             ioc->ioc_link_reset_in_progress)
4008                 ioc->ioc_link_reset_in_progress = 0;
4009         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4010                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4011                     ioc->name, __func__);
4012                 _debug_dump_mf(mpi_request,
4013                     sizeof(Mpi2SasIoUnitControlRequest_t)/4);
4014                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
4015                         issue_reset = true;
4016                 goto issue_host_reset;
4017         }
4018         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
4019                 memcpy(mpi_reply, ioc->base_cmds.reply,
4020                     sizeof(Mpi2SasIoUnitControlReply_t));
4021         else
4022                 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
4023         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4024         goto out;
4025
4026  issue_host_reset:
4027         if (issue_reset)
4028                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
4029                     FORCE_BIG_HAMMER);
4030         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4031         rc = -EFAULT;
4032  out:
4033         mutex_unlock(&ioc->base_cmds.mutex);
4034         return rc;
4035 }
4036
4037 /**
4038  * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
4039  * @ioc: per adapter object
4040  * @mpi_reply: the reply payload from FW
4041  * @mpi_request: the request payload sent to FW
4042  *
4043  * The SCSI Enclosure Processor request message causes the IOC to
4044  * communicate with SES devices to control LED status signals.
4045  *
4046  * Returns 0 for success, non-zero for failure.
4047  */
4048 int
4049 mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
4050         Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
4051 {
4052         u16 smid;
4053         u32 ioc_state;
4054         unsigned long timeleft;
4055         bool issue_reset = false;
4056         int rc;
4057         void *request;
4058         u16 wait_state_count;
4059
4060         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4061             __func__));
4062
4063         mutex_lock(&ioc->base_cmds.mutex);
4064
4065         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
4066                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
4067                     ioc->name, __func__);
4068                 rc = -EAGAIN;
4069                 goto out;
4070         }
4071
4072         wait_state_count = 0;
4073         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4074         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
4075                 if (wait_state_count++ == 10) {
4076                         pr_err(MPT3SAS_FMT
4077                             "%s: failed due to ioc not operational\n",
4078                             ioc->name, __func__);
4079                         rc = -EFAULT;
4080                         goto out;
4081                 }
4082                 ssleep(1);
4083                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4084                 pr_info(MPT3SAS_FMT
4085                         "%s: waiting for operational state(count=%d)\n",
4086                         ioc->name,
4087                     __func__, wait_state_count);
4088         }
4089
4090         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4091         if (!smid) {
4092                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4093                     ioc->name, __func__);
4094                 rc = -EAGAIN;
4095                 goto out;
4096         }
4097
4098         rc = 0;
4099         ioc->base_cmds.status = MPT3_CMD_PENDING;
4100         request = mpt3sas_base_get_msg_frame(ioc, smid);
4101         ioc->base_cmds.smid = smid;
4102         memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
4103         init_completion(&ioc->base_cmds.done);
4104         mpt3sas_base_put_smid_default(ioc, smid);
4105         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
4106             msecs_to_jiffies(10000));
4107         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4108                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4109                     ioc->name, __func__);
4110                 _debug_dump_mf(mpi_request,
4111                     sizeof(Mpi2SepRequest_t)/4);
4112                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
4113                         issue_reset = false;
4114                 goto issue_host_reset;
4115         }
4116         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
4117                 memcpy(mpi_reply, ioc->base_cmds.reply,
4118                     sizeof(Mpi2SepReply_t));
4119         else
4120                 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
4121         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4122         goto out;
4123
4124  issue_host_reset:
4125         if (issue_reset)
4126                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
4127                     FORCE_BIG_HAMMER);
4128         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4129         rc = -EFAULT;
4130  out:
4131         mutex_unlock(&ioc->base_cmds.mutex);
4132         return rc;
4133 }
4134
4135 /**
4136  * _base_get_port_facts - obtain port facts reply and save in ioc
4137  * @ioc: per adapter object
4138  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4139  *
4140  * Returns 0 for success, non-zero for failure.
4141  */
4142 static int
4143 _base_get_port_facts(struct MPT3SAS_ADAPTER *ioc, int port, int sleep_flag)
4144 {
4145         Mpi2PortFactsRequest_t mpi_request;
4146         Mpi2PortFactsReply_t mpi_reply;
4147         struct mpt3sas_port_facts *pfacts;
4148         int mpi_reply_sz, mpi_request_sz, r;
4149
4150         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4151             __func__));
4152
4153         mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
4154         mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
4155         memset(&mpi_request, 0, mpi_request_sz);
4156         mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
4157         mpi_request.PortNumber = port;
4158         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4159             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4160
4161         if (r != 0) {
4162                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4163                     ioc->name, __func__, r);
4164                 return r;
4165         }
4166
4167         pfacts = &ioc->pfacts[port];
4168         memset(pfacts, 0, sizeof(struct mpt3sas_port_facts));
4169         pfacts->PortNumber = mpi_reply.PortNumber;
4170         pfacts->VP_ID = mpi_reply.VP_ID;
4171         pfacts->VF_ID = mpi_reply.VF_ID;
4172         pfacts->MaxPostedCmdBuffers =
4173             le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
4174
4175         return 0;
4176 }
4177
4178 /**
4179  * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
4180  * @ioc: per adapter object
4181  * @timeout:
4182  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4183  *
4184  * Returns 0 for success, non-zero for failure.
4185  */
4186 static int
4187 _base_wait_for_iocstate(struct MPT3SAS_ADAPTER *ioc, int timeout,
4188         int sleep_flag)
4189 {
4190         u32 ioc_state;
4191         int rc;
4192
4193         dinitprintk(ioc, printk(MPT3SAS_FMT "%s\n", ioc->name,
4194             __func__));
4195
4196         if (ioc->pci_error_recovery) {
4197                 dfailprintk(ioc, printk(MPT3SAS_FMT
4198                     "%s: host in pci error recovery\n", ioc->name, __func__));
4199                 return -EFAULT;
4200         }
4201
4202         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4203         dhsprintk(ioc, printk(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4204             ioc->name, __func__, ioc_state));
4205
4206         if (((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) ||
4207             (ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4208                 return 0;
4209
4210         if (ioc_state & MPI2_DOORBELL_USED) {
4211                 dhsprintk(ioc, printk(MPT3SAS_FMT
4212                     "unexpected doorbell active!\n", ioc->name));
4213                 goto issue_diag_reset;
4214         }
4215
4216         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4217                 mpt3sas_base_fault_info(ioc, ioc_state &
4218                     MPI2_DOORBELL_DATA_MASK);
4219                 goto issue_diag_reset;
4220         }
4221
4222         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
4223             timeout, sleep_flag);
4224         if (ioc_state) {
4225                 dfailprintk(ioc, printk(MPT3SAS_FMT
4226                     "%s: failed going to ready state (ioc_state=0x%x)\n",
4227                     ioc->name, __func__, ioc_state));
4228                 return -EFAULT;
4229         }
4230
4231  issue_diag_reset:
4232         rc = _base_diag_reset(ioc, sleep_flag);
4233         return rc;
4234 }
4235
4236 /**
4237  * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
4238  * @ioc: per adapter object
4239  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4240  *
4241  * Returns 0 for success, non-zero for failure.
4242  */
4243 static int
4244 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4245 {
4246         Mpi2IOCFactsRequest_t mpi_request;
4247         Mpi2IOCFactsReply_t mpi_reply;
4248         struct mpt3sas_facts *facts;
4249         int mpi_reply_sz, mpi_request_sz, r;
4250
4251         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4252             __func__));
4253
4254         r = _base_wait_for_iocstate(ioc, 10, sleep_flag);
4255         if (r) {
4256                 dfailprintk(ioc, printk(MPT3SAS_FMT
4257                     "%s: failed getting to correct state\n",
4258                     ioc->name, __func__));
4259                 return r;
4260         }
4261         mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
4262         mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
4263         memset(&mpi_request, 0, mpi_request_sz);
4264         mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
4265         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4266             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4267
4268         if (r != 0) {
4269                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4270                     ioc->name, __func__, r);
4271                 return r;
4272         }
4273
4274         facts = &ioc->facts;
4275         memset(facts, 0, sizeof(struct mpt3sas_facts));
4276         facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
4277         facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
4278         facts->VP_ID = mpi_reply.VP_ID;
4279         facts->VF_ID = mpi_reply.VF_ID;
4280         facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
4281         facts->MaxChainDepth = mpi_reply.MaxChainDepth;
4282         facts->WhoInit = mpi_reply.WhoInit;
4283         facts->NumberOfPorts = mpi_reply.NumberOfPorts;
4284         facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
4285         facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
4286         facts->MaxReplyDescriptorPostQueueDepth =
4287             le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
4288         facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
4289         facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
4290         if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
4291                 ioc->ir_firmware = 1;
4292         if ((facts->IOCCapabilities &
4293               MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE))
4294                 ioc->rdpq_array_capable = 1;
4295         facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
4296         facts->IOCRequestFrameSize =
4297             le16_to_cpu(mpi_reply.IOCRequestFrameSize);
4298         facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
4299         facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
4300         ioc->shost->max_id = -1;
4301         facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
4302         facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
4303         facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
4304         facts->HighPriorityCredit =
4305             le16_to_cpu(mpi_reply.HighPriorityCredit);
4306         facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
4307         facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
4308
4309         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4310                 "hba queue depth(%d), max chains per io(%d)\n",
4311                 ioc->name, facts->RequestCredit,
4312             facts->MaxChainDepth));
4313         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4314                 "request frame size(%d), reply frame size(%d)\n", ioc->name,
4315             facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
4316         return 0;
4317 }
4318
4319 /**
4320  * _base_send_ioc_init - send ioc_init to firmware
4321  * @ioc: per adapter object
4322  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4323  *
4324  * Returns 0 for success, non-zero for failure.
4325  */
4326 static int
4327 _base_send_ioc_init(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4328 {
4329         Mpi2IOCInitRequest_t mpi_request;
4330         Mpi2IOCInitReply_t mpi_reply;
4331         int i, r = 0;
4332         struct timeval current_time;
4333         u16 ioc_status;
4334         u32 reply_post_free_array_sz = 0;
4335         Mpi2IOCInitRDPQArrayEntry *reply_post_free_array = NULL;
4336         dma_addr_t reply_post_free_array_dma;
4337
4338         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4339             __func__));
4340
4341         memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
4342         mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
4343         mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
4344         mpi_request.VF_ID = 0; /* TODO */
4345         mpi_request.VP_ID = 0;
4346         mpi_request.MsgVersion = cpu_to_le16(ioc->hba_mpi_version_belonged);
4347         mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
4348
4349         if (_base_is_controller_msix_enabled(ioc))
4350                 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
4351         mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
4352         mpi_request.ReplyDescriptorPostQueueDepth =
4353             cpu_to_le16(ioc->reply_post_queue_depth);
4354         mpi_request.ReplyFreeQueueDepth =
4355             cpu_to_le16(ioc->reply_free_queue_depth);
4356
4357         mpi_request.SenseBufferAddressHigh =
4358             cpu_to_le32((u64)ioc->sense_dma >> 32);
4359         mpi_request.SystemReplyAddressHigh =
4360             cpu_to_le32((u64)ioc->reply_dma >> 32);
4361         mpi_request.SystemRequestFrameBaseAddress =
4362             cpu_to_le64((u64)ioc->request_dma);
4363         mpi_request.ReplyFreeQueueAddress =
4364             cpu_to_le64((u64)ioc->reply_free_dma);
4365
4366         if (ioc->rdpq_array_enable) {
4367                 reply_post_free_array_sz = ioc->reply_queue_count *
4368                     sizeof(Mpi2IOCInitRDPQArrayEntry);
4369                 reply_post_free_array = pci_alloc_consistent(ioc->pdev,
4370                         reply_post_free_array_sz, &reply_post_free_array_dma);
4371                 if (!reply_post_free_array) {
4372                         pr_err(MPT3SAS_FMT
4373                         "reply_post_free_array: pci_alloc_consistent failed\n",
4374                         ioc->name);
4375                         r = -ENOMEM;
4376                         goto out;
4377                 }
4378                 memset(reply_post_free_array, 0, reply_post_free_array_sz);
4379                 for (i = 0; i < ioc->reply_queue_count; i++)
4380                         reply_post_free_array[i].RDPQBaseAddress =
4381                             cpu_to_le64(
4382                                 (u64)ioc->reply_post[i].reply_post_free_dma);
4383                 mpi_request.MsgFlags = MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE;
4384                 mpi_request.ReplyDescriptorPostQueueAddress =
4385                     cpu_to_le64((u64)reply_post_free_array_dma);
4386         } else {
4387                 mpi_request.ReplyDescriptorPostQueueAddress =
4388                     cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma);
4389         }
4390
4391         /* This time stamp specifies number of milliseconds
4392          * since epoch ~ midnight January 1, 1970.
4393          */
4394         do_gettimeofday(&current_time);
4395         mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
4396             (current_time.tv_usec / 1000));
4397
4398         if (ioc->logging_level & MPT_DEBUG_INIT) {
4399                 __le32 *mfp;
4400                 int i;
4401
4402                 mfp = (__le32 *)&mpi_request;
4403                 pr_info("\toffset:data\n");
4404                 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
4405                         pr_info("\t[0x%02x]:%08x\n", i*4,
4406                             le32_to_cpu(mfp[i]));
4407         }
4408
4409         r = _base_handshake_req_reply_wait(ioc,
4410             sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
4411             sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
4412             sleep_flag);
4413
4414         if (r != 0) {
4415                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4416                     ioc->name, __func__, r);
4417                 goto out;
4418         }
4419
4420         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
4421         if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
4422             mpi_reply.IOCLogInfo) {
4423                 pr_err(MPT3SAS_FMT "%s: failed\n", ioc->name, __func__);
4424                 r = -EIO;
4425         }
4426
4427 out:
4428         if (reply_post_free_array)
4429                 pci_free_consistent(ioc->pdev, reply_post_free_array_sz,
4430                                     reply_post_free_array,
4431                                     reply_post_free_array_dma);
4432         return r;
4433 }
4434
4435 /**
4436  * mpt3sas_port_enable_done - command completion routine for port enable
4437  * @ioc: per adapter object
4438  * @smid: system request message index
4439  * @msix_index: MSIX table index supplied by the OS
4440  * @reply: reply message frame(lower 32bit addr)
4441  *
4442  * Return 1 meaning mf should be freed from _base_interrupt
4443  *        0 means the mf is freed from this function.
4444  */
4445 u8
4446 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
4447         u32 reply)
4448 {
4449         MPI2DefaultReply_t *mpi_reply;
4450         u16 ioc_status;
4451
4452         if (ioc->port_enable_cmds.status == MPT3_CMD_NOT_USED)
4453                 return 1;
4454
4455         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
4456         if (!mpi_reply)
4457                 return 1;
4458
4459         if (mpi_reply->Function != MPI2_FUNCTION_PORT_ENABLE)
4460                 return 1;
4461
4462         ioc->port_enable_cmds.status &= ~MPT3_CMD_PENDING;
4463         ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE;
4464         ioc->port_enable_cmds.status |= MPT3_CMD_REPLY_VALID;
4465         memcpy(ioc->port_enable_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
4466         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4467         if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
4468                 ioc->port_enable_failed = 1;
4469
4470         if (ioc->is_driver_loading) {
4471                 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
4472                         mpt3sas_port_enable_complete(ioc);
4473                         return 1;
4474                 } else {
4475                         ioc->start_scan_failed = ioc_status;
4476                         ioc->start_scan = 0;
4477                         return 1;
4478                 }
4479         }
4480         complete(&ioc->port_enable_cmds.done);
4481         return 1;
4482 }
4483
4484 /**
4485  * _base_send_port_enable - send port_enable(discovery stuff) to firmware
4486  * @ioc: per adapter object
4487  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4488  *
4489  * Returns 0 for success, non-zero for failure.
4490  */
4491 static int
4492 _base_send_port_enable(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4493 {
4494         Mpi2PortEnableRequest_t *mpi_request;
4495         Mpi2PortEnableReply_t *mpi_reply;
4496         unsigned long timeleft;
4497         int r = 0;
4498         u16 smid;
4499         u16 ioc_status;
4500
4501         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4502
4503         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4504                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4505                     ioc->name, __func__);
4506                 return -EAGAIN;
4507         }
4508
4509         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4510         if (!smid) {
4511                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4512                     ioc->name, __func__);
4513                 return -EAGAIN;
4514         }
4515
4516         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4517         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4518         ioc->port_enable_cmds.smid = smid;
4519         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4520         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4521
4522         init_completion(&ioc->port_enable_cmds.done);
4523         mpt3sas_base_put_smid_default(ioc, smid);
4524         timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
4525             300*HZ);
4526         if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) {
4527                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4528                     ioc->name, __func__);
4529                 _debug_dump_mf(mpi_request,
4530                     sizeof(Mpi2PortEnableRequest_t)/4);
4531                 if (ioc->port_enable_cmds.status & MPT3_CMD_RESET)
4532                         r = -EFAULT;
4533                 else
4534                         r = -ETIME;
4535                 goto out;
4536         }
4537
4538         mpi_reply = ioc->port_enable_cmds.reply;
4539         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4540         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
4541                 pr_err(MPT3SAS_FMT "%s: failed with (ioc_status=0x%08x)\n",
4542                     ioc->name, __func__, ioc_status);
4543                 r = -EFAULT;
4544                 goto out;
4545         }
4546
4547  out:
4548         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
4549         pr_info(MPT3SAS_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
4550             "SUCCESS" : "FAILED"));
4551         return r;
4552 }
4553
4554 /**
4555  * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
4556  * @ioc: per adapter object
4557  *
4558  * Returns 0 for success, non-zero for failure.
4559  */
4560 int
4561 mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc)
4562 {
4563         Mpi2PortEnableRequest_t *mpi_request;
4564         u16 smid;
4565
4566         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4567
4568         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4569                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4570                     ioc->name, __func__);
4571                 return -EAGAIN;
4572         }
4573
4574         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4575         if (!smid) {
4576                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4577                     ioc->name, __func__);
4578                 return -EAGAIN;
4579         }
4580
4581         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4582         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4583         ioc->port_enable_cmds.smid = smid;
4584         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4585         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4586
4587         mpt3sas_base_put_smid_default(ioc, smid);
4588         return 0;
4589 }
4590
4591 /**
4592  * _base_determine_wait_on_discovery - desposition
4593  * @ioc: per adapter object
4594  *
4595  * Decide whether to wait on discovery to complete. Used to either
4596  * locate boot device, or report volumes ahead of physical devices.
4597  *
4598  * Returns 1 for wait, 0 for don't wait
4599  */
4600 static int
4601 _base_determine_wait_on_discovery(struct MPT3SAS_ADAPTER *ioc)
4602 {
4603         /* We wait for discovery to complete if IR firmware is loaded.
4604          * The sas topology events arrive before PD events, so we need time to
4605          * turn on the bit in ioc->pd_handles to indicate PD
4606          * Also, it maybe required to report Volumes ahead of physical
4607          * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
4608          */
4609         if (ioc->ir_firmware)
4610                 return 1;
4611
4612         /* if no Bios, then we don't need to wait */
4613         if (!ioc->bios_pg3.BiosVersion)
4614                 return 0;
4615
4616         /* Bios is present, then we drop down here.
4617          *
4618          * If there any entries in the Bios Page 2, then we wait
4619          * for discovery to complete.
4620          */
4621
4622         /* Current Boot Device */
4623         if ((ioc->bios_pg2.CurrentBootDeviceForm &
4624             MPI2_BIOSPAGE2_FORM_MASK) ==
4625             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4626         /* Request Boot Device */
4627            (ioc->bios_pg2.ReqBootDeviceForm &
4628             MPI2_BIOSPAGE2_FORM_MASK) ==
4629             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4630         /* Alternate Request Boot Device */
4631            (ioc->bios_pg2.ReqAltBootDeviceForm &
4632             MPI2_BIOSPAGE2_FORM_MASK) ==
4633             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
4634                 return 0;
4635
4636         return 1;
4637 }
4638
4639 /**
4640  * _base_unmask_events - turn on notification for this event
4641  * @ioc: per adapter object
4642  * @event: firmware event
4643  *
4644  * The mask is stored in ioc->event_masks.
4645  */
4646 static void
4647 _base_unmask_events(struct MPT3SAS_ADAPTER *ioc, u16 event)
4648 {
4649         u32 desired_event;
4650
4651         if (event >= 128)
4652                 return;
4653
4654         desired_event = (1 << (event % 32));
4655
4656         if (event < 32)
4657                 ioc->event_masks[0] &= ~desired_event;
4658         else if (event < 64)
4659                 ioc->event_masks[1] &= ~desired_event;
4660         else if (event < 96)
4661                 ioc->event_masks[2] &= ~desired_event;
4662         else if (event < 128)
4663                 ioc->event_masks[3] &= ~desired_event;
4664 }
4665
4666 /**
4667  * _base_event_notification - send event notification
4668  * @ioc: per adapter object
4669  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4670  *
4671  * Returns 0 for success, non-zero for failure.
4672  */
4673 static int
4674 _base_event_notification(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4675 {
4676         Mpi2EventNotificationRequest_t *mpi_request;
4677         unsigned long timeleft;
4678         u16 smid;
4679         int r = 0;
4680         int i;
4681
4682         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4683             __func__));
4684
4685         if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
4686                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4687                     ioc->name, __func__);
4688                 return -EAGAIN;
4689         }
4690
4691         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4692         if (!smid) {
4693                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4694                     ioc->name, __func__);
4695                 return -EAGAIN;
4696         }
4697         ioc->base_cmds.status = MPT3_CMD_PENDING;
4698         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4699         ioc->base_cmds.smid = smid;
4700         memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
4701         mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
4702         mpi_request->VF_ID = 0; /* TODO */
4703         mpi_request->VP_ID = 0;
4704         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4705                 mpi_request->EventMasks[i] =
4706                     cpu_to_le32(ioc->event_masks[i]);
4707         init_completion(&ioc->base_cmds.done);
4708         mpt3sas_base_put_smid_default(ioc, smid);
4709         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
4710         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4711                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4712                     ioc->name, __func__);
4713                 _debug_dump_mf(mpi_request,
4714                     sizeof(Mpi2EventNotificationRequest_t)/4);
4715                 if (ioc->base_cmds.status & MPT3_CMD_RESET)
4716                         r = -EFAULT;
4717                 else
4718                         r = -ETIME;
4719         } else
4720                 dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s: complete\n",
4721                     ioc->name, __func__));
4722         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4723         return r;
4724 }
4725
4726 /**
4727  * mpt3sas_base_validate_event_type - validating event types
4728  * @ioc: per adapter object
4729  * @event: firmware event
4730  *
4731  * This will turn on firmware event notification when application
4732  * ask for that event. We don't mask events that are already enabled.
4733  */
4734 void
4735 mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, u32 *event_type)
4736 {
4737         int i, j;
4738         u32 event_mask, desired_event;
4739         u8 send_update_to_fw;
4740
4741         for (i = 0, send_update_to_fw = 0; i <
4742             MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
4743                 event_mask = ~event_type[i];
4744                 desired_event = 1;
4745                 for (j = 0; j < 32; j++) {
4746                         if (!(event_mask & desired_event) &&
4747                             (ioc->event_masks[i] & desired_event)) {
4748                                 ioc->event_masks[i] &= ~desired_event;
4749                                 send_update_to_fw = 1;
4750                         }
4751                         desired_event = (desired_event << 1);
4752                 }
4753         }
4754
4755         if (!send_update_to_fw)
4756                 return;
4757
4758         mutex_lock(&ioc->base_cmds.mutex);
4759         _base_event_notification(ioc, CAN_SLEEP);
4760         mutex_unlock(&ioc->base_cmds.mutex);
4761 }
4762
4763 /**
4764  * _base_diag_reset - the "big hammer" start of day reset
4765  * @ioc: per adapter object
4766  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4767  *
4768  * Returns 0 for success, non-zero for failure.
4769  */
4770 static int
4771 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4772 {
4773         u32 host_diagnostic;
4774         u32 ioc_state;
4775         u32 count;
4776         u32 hcb_size;
4777
4778         pr_info(MPT3SAS_FMT "sending diag reset !!\n", ioc->name);
4779
4780         drsprintk(ioc, pr_info(MPT3SAS_FMT "clear interrupts\n",
4781             ioc->name));
4782
4783         count = 0;
4784         do {
4785                 /* Write magic sequence to WriteSequence register
4786                  * Loop until in diagnostic mode
4787                  */
4788                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4789                         "write magic sequence\n", ioc->name));
4790                 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4791                 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
4792                 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
4793                 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
4794                 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
4795                 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
4796                 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
4797
4798                 /* wait 100 msec */
4799                 if (sleep_flag == CAN_SLEEP)
4800                         msleep(100);
4801                 else
4802                         mdelay(100);
4803
4804                 if (count++ > 20)
4805                         goto out;
4806
4807                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4808                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4809                         "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n",
4810                     ioc->name, count, host_diagnostic));
4811
4812         } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
4813
4814         hcb_size = readl(&ioc->chip->HCBSize);
4815
4816         drsprintk(ioc, pr_info(MPT3SAS_FMT "diag reset: issued\n",
4817             ioc->name));
4818         writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
4819              &ioc->chip->HostDiagnostic);
4820
4821         /*This delay allows the chip PCIe hardware time to finish reset tasks*/
4822         if (sleep_flag == CAN_SLEEP)
4823                 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4824         else
4825                 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4826
4827         /* Approximately 300 second max wait */
4828         for (count = 0; count < (300000000 /
4829                 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
4830
4831                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4832
4833                 if (host_diagnostic == 0xFFFFFFFF)
4834                         goto out;
4835                 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
4836                         break;
4837
4838                 /* Wait to pass the second read delay window */
4839                 if (sleep_flag == CAN_SLEEP)
4840                         msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4841                                                                 / 1000);
4842                 else
4843                         mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4844                                                                 / 1000);
4845         }
4846
4847         if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
4848
4849                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4850                 "restart the adapter assuming the HCB Address points to good F/W\n",
4851                     ioc->name));
4852                 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
4853                 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
4854                 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
4855
4856                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4857                     "re-enable the HCDW\n", ioc->name));
4858                 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
4859                     &ioc->chip->HCBSize);
4860         }
4861
4862         drsprintk(ioc, pr_info(MPT3SAS_FMT "restart the adapter\n",
4863             ioc->name));
4864         writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
4865             &ioc->chip->HostDiagnostic);
4866
4867         drsprintk(ioc, pr_info(MPT3SAS_FMT
4868                 "disable writes to the diagnostic register\n", ioc->name));
4869         writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4870
4871         drsprintk(ioc, pr_info(MPT3SAS_FMT
4872                 "Wait for FW to go to the READY state\n", ioc->name));
4873         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
4874             sleep_flag);
4875         if (ioc_state) {
4876                 pr_err(MPT3SAS_FMT
4877                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4878                         ioc->name, __func__, ioc_state);
4879                 goto out;
4880         }
4881
4882         pr_info(MPT3SAS_FMT "diag reset: SUCCESS\n", ioc->name);
4883         return 0;
4884
4885  out:
4886         pr_err(MPT3SAS_FMT "diag reset: FAILED\n", ioc->name);
4887         return -EFAULT;
4888 }
4889
4890 /**
4891  * _base_make_ioc_ready - put controller in READY state
4892  * @ioc: per adapter object
4893  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4894  * @type: FORCE_BIG_HAMMER or SOFT_RESET
4895  *
4896  * Returns 0 for success, non-zero for failure.
4897  */
4898 static int
4899 _base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
4900         enum reset_type type)
4901 {
4902         u32 ioc_state;
4903         int rc;
4904         int count;
4905
4906         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4907             __func__));
4908
4909         if (ioc->pci_error_recovery)
4910                 return 0;
4911
4912         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4913         dhsprintk(ioc, pr_info(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4914             ioc->name, __func__, ioc_state));
4915
4916         /* if in RESET state, it should move to READY state shortly */
4917         count = 0;
4918         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_RESET) {
4919                 while ((ioc_state & MPI2_IOC_STATE_MASK) !=
4920                     MPI2_IOC_STATE_READY) {
4921                         if (count++ == 10) {
4922                                 pr_err(MPT3SAS_FMT
4923                                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4924                                     ioc->name, __func__, ioc_state);
4925                                 return -EFAULT;
4926                         }
4927                         if (sleep_flag == CAN_SLEEP)
4928                                 ssleep(1);
4929                         else
4930                                 mdelay(1000);
4931                         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4932                 }
4933         }
4934
4935         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
4936                 return 0;
4937
4938         if (ioc_state & MPI2_DOORBELL_USED) {
4939                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
4940                         "unexpected doorbell active!\n",
4941                         ioc->name));
4942                 goto issue_diag_reset;
4943         }
4944
4945         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4946                 mpt3sas_base_fault_info(ioc, ioc_state &
4947                     MPI2_DOORBELL_DATA_MASK);
4948                 goto issue_diag_reset;
4949         }
4950
4951         if (type == FORCE_BIG_HAMMER)
4952                 goto issue_diag_reset;
4953
4954         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4955                 if (!(_base_send_ioc_reset(ioc,
4956                     MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
4957                         return 0;
4958         }
4959
4960  issue_diag_reset:
4961         rc = _base_diag_reset(ioc, CAN_SLEEP);
4962         return rc;
4963 }
4964
4965 /**
4966  * _base_make_ioc_operational - put controller in OPERATIONAL state
4967  * @ioc: per adapter object
4968  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4969  *
4970  * Returns 0 for success, non-zero for failure.
4971  */
4972 static int
4973 _base_make_ioc_operational(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4974 {
4975         int r, i;
4976         unsigned long   flags;
4977         u32 reply_address;
4978         u16 smid;
4979         struct _tr_list *delayed_tr, *delayed_tr_next;
4980         u8 hide_flag;
4981         struct adapter_reply_queue *reply_q;
4982         long reply_post_free;
4983         u32 reply_post_free_sz, index = 0;
4984
4985         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4986             __func__));
4987
4988         /* clean the delayed target reset list */
4989         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4990             &ioc->delayed_tr_list, list) {
4991                 list_del(&delayed_tr->list);
4992                 kfree(delayed_tr);
4993         }
4994
4995
4996         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4997             &ioc->delayed_tr_volume_list, list) {
4998                 list_del(&delayed_tr->list);
4999                 kfree(delayed_tr);
5000         }
5001
5002         /* initialize the scsi lookup free list */
5003         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
5004         INIT_LIST_HEAD(&ioc->free_list);
5005         smid = 1;
5006         for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
5007                 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
5008                 ioc->scsi_lookup[i].cb_idx = 0xFF;
5009                 ioc->scsi_lookup[i].smid = smid;
5010                 ioc->scsi_lookup[i].scmd = NULL;
5011                 ioc->scsi_lookup[i].direct_io = 0;
5012                 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
5013                     &ioc->free_list);
5014         }
5015
5016         /* hi-priority queue */
5017         INIT_LIST_HEAD(&ioc->hpr_free_list);
5018         smid = ioc->hi_priority_smid;
5019         for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
5020                 ioc->hpr_lookup[i].cb_idx = 0xFF;
5021                 ioc->hpr_lookup[i].smid = smid;
5022                 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
5023                     &ioc->hpr_free_list);
5024         }
5025
5026         /* internal queue */
5027         INIT_LIST_HEAD(&ioc->internal_free_list);
5028         smid = ioc->internal_smid;
5029         for (i = 0; i < ioc->internal_depth; i++, smid++) {
5030                 ioc->internal_lookup[i].cb_idx = 0xFF;
5031                 ioc->internal_lookup[i].smid = smid;
5032                 list_add_tail(&ioc->internal_lookup[i].tracker_list,
5033                     &ioc->internal_free_list);
5034         }
5035
5036         /* chain pool */
5037         INIT_LIST_HEAD(&ioc->free_chain_list);
5038         for (i = 0; i < ioc->chain_depth; i++)
5039                 list_add_tail(&ioc->chain_lookup[i].tracker_list,
5040                     &ioc->free_chain_list);
5041
5042         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
5043
5044         /* initialize Reply Free Queue */
5045         for (i = 0, reply_address = (u32)ioc->reply_dma ;
5046             i < ioc->reply_free_queue_depth ; i++, reply_address +=
5047             ioc->reply_sz)
5048                 ioc->reply_free[i] = cpu_to_le32(reply_address);
5049
5050         /* initialize reply queues */
5051         if (ioc->is_driver_loading)
5052                 _base_assign_reply_queues(ioc);
5053
5054         /* initialize Reply Post Free Queue */
5055         reply_post_free_sz = ioc->reply_post_queue_depth *
5056             sizeof(Mpi2DefaultReplyDescriptor_t);
5057         reply_post_free = (long)ioc->reply_post[index].reply_post_free;
5058         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
5059                 reply_q->reply_post_host_index = 0;
5060                 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
5061                     reply_post_free;
5062                 for (i = 0; i < ioc->reply_post_queue_depth; i++)
5063                         reply_q->reply_post_free[i].Words =
5064                             cpu_to_le64(ULLONG_MAX);
5065                 if (!_base_is_controller_msix_enabled(ioc))
5066                         goto skip_init_reply_post_free_queue;
5067                 /*
5068                  * If RDPQ is enabled, switch to the next allocation.
5069                  * Otherwise advance within the contiguous region.
5070                  */
5071                 if (ioc->rdpq_array_enable)
5072                         reply_post_free = (long)
5073                             ioc->reply_post[++index].reply_post_free;
5074                 else
5075                         reply_post_free += reply_post_free_sz;
5076         }
5077  skip_init_reply_post_free_queue:
5078
5079         r = _base_send_ioc_init(ioc, sleep_flag);
5080         if (r)
5081                 return r;
5082
5083         /* initialize reply free host index */
5084         ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
5085         writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
5086
5087         /* initialize reply post host index */
5088         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
5089                 if (ioc->msix96_vector)
5090                         writel((reply_q->msix_index & 7)<<
5091                            MPI2_RPHI_MSIX_INDEX_SHIFT,
5092                            ioc->replyPostRegisterIndex[reply_q->msix_index/8]);
5093                 else
5094                         writel(reply_q->msix_index <<
5095                                 MPI2_RPHI_MSIX_INDEX_SHIFT,
5096                                 &ioc->chip->ReplyPostHostIndex);
5097
5098                 if (!_base_is_controller_msix_enabled(ioc))
5099                         goto skip_init_reply_post_host_index;
5100         }
5101
5102  skip_init_reply_post_host_index:
5103
5104         _base_unmask_interrupts(ioc);
5105         r = _base_event_notification(ioc, sleep_flag);
5106         if (r)
5107                 return r;
5108
5109         if (sleep_flag == CAN_SLEEP)
5110                 _base_static_config_pages(ioc);
5111
5112
5113         if (ioc->is_driver_loading) {
5114
5115                 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
5116                     == 0x80) {
5117                         hide_flag = (u8) (
5118                             le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
5119                             MFG_PAGE10_HIDE_SSDS_MASK);
5120                         if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
5121                                 ioc->mfg_pg10_hide_flag = hide_flag;
5122                 }
5123
5124                 ioc->wait_for_discovery_to_complete =
5125                     _base_determine_wait_on_discovery(ioc);
5126
5127                 return r; /* scan_start and scan_finished support */
5128         }
5129
5130         r = _base_send_port_enable(ioc, sleep_flag);
5131         if (r)
5132                 return r;
5133
5134         return r;
5135 }
5136
5137 /**
5138  * mpt3sas_base_free_resources - free resources controller resources
5139  * @ioc: per adapter object
5140  *
5141  * Return nothing.
5142  */
5143 void
5144 mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc)
5145 {
5146         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5147             __func__));
5148
5149         /* synchronizing freeing resource with pci_access_mutex lock */
5150         mutex_lock(&ioc->pci_access_mutex);
5151         if (ioc->chip_phys && ioc->chip) {
5152                 _base_mask_interrupts(ioc);
5153                 ioc->shost_recovery = 1;
5154                 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
5155                 ioc->shost_recovery = 0;
5156         }
5157
5158         mpt3sas_base_unmap_resources(ioc);
5159         mutex_unlock(&ioc->pci_access_mutex);
5160         return;
5161 }
5162
5163 /**
5164  * mpt3sas_base_attach - attach controller instance
5165  * @ioc: per adapter object
5166  *
5167  * Returns 0 for success, non-zero for failure.
5168  */
5169 int
5170 mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
5171 {
5172         int r, i;
5173         int cpu_id, last_cpu_id = 0;
5174
5175         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5176             __func__));
5177
5178         /* setup cpu_msix_table */
5179         ioc->cpu_count = num_online_cpus();
5180         for_each_online_cpu(cpu_id)
5181                 last_cpu_id = cpu_id;
5182         ioc->cpu_msix_table_sz = last_cpu_id + 1;
5183         ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
5184         ioc->reply_queue_count = 1;
5185         if (!ioc->cpu_msix_table) {
5186                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
5187                         "allocation for cpu_msix_table failed!!!\n",
5188                         ioc->name));
5189                 r = -ENOMEM;
5190                 goto out_free_resources;
5191         }
5192
5193         if (ioc->is_warpdrive) {
5194                 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
5195                     sizeof(resource_size_t *), GFP_KERNEL);
5196                 if (!ioc->reply_post_host_index) {
5197                         dfailprintk(ioc, pr_info(MPT3SAS_FMT "allocation "
5198                                 "for cpu_msix_table failed!!!\n", ioc->name));
5199                         r = -ENOMEM;
5200                         goto out_free_resources;
5201                 }
5202         }
5203
5204         ioc->rdpq_array_enable_assigned = 0;
5205         ioc->dma_mask = 0;
5206         r = mpt3sas_base_map_resources(ioc);
5207         if (r)
5208                 goto out_free_resources;
5209
5210         if (ioc->is_warpdrive) {
5211                 ioc->reply_post_host_index[0] = (resource_size_t __iomem *)
5212                     &ioc->chip->ReplyPostHostIndex;
5213
5214                 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
5215                         ioc->reply_post_host_index[i] =
5216                         (resource_size_t __iomem *)
5217                         ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
5218                         * 4)));
5219         }
5220
5221         pci_set_drvdata(ioc->pdev, ioc->shost);
5222         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5223         if (r)
5224                 goto out_free_resources;
5225
5226         switch (ioc->hba_mpi_version_belonged) {
5227         case MPI2_VERSION:
5228                 ioc->build_sg_scmd = &_base_build_sg_scmd;
5229                 ioc->build_sg = &_base_build_sg;
5230                 ioc->build_zero_len_sge = &_base_build_zero_len_sge;
5231                 break;
5232         case MPI25_VERSION:
5233         case MPI26_VERSION:
5234                 /*
5235                  * In SAS3.0,
5236                  * SCSI_IO, SMP_PASSTHRU, SATA_PASSTHRU, Target Assist, and
5237                  * Target Status - all require the IEEE formated scatter gather
5238                  * elements.
5239                  */
5240                 ioc->build_sg_scmd = &_base_build_sg_scmd_ieee;
5241                 ioc->build_sg = &_base_build_sg_ieee;
5242                 ioc->build_zero_len_sge = &_base_build_zero_len_sge_ieee;
5243                 ioc->sge_size_ieee = sizeof(Mpi2IeeeSgeSimple64_t);
5244                 break;
5245         }
5246
5247         /*
5248          * These function pointers for other requests that don't
5249          * the require IEEE scatter gather elements.
5250          *
5251          * For example Configuration Pages and SAS IOUNIT Control don't.
5252          */
5253         ioc->build_sg_mpi = &_base_build_sg;
5254         ioc->build_zero_len_sge_mpi = &_base_build_zero_len_sge;
5255
5256         r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
5257         if (r)
5258                 goto out_free_resources;
5259
5260         ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
5261             sizeof(struct mpt3sas_port_facts), GFP_KERNEL);
5262         if (!ioc->pfacts) {
5263                 r = -ENOMEM;
5264                 goto out_free_resources;
5265         }
5266
5267         for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
5268                 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
5269                 if (r)
5270                         goto out_free_resources;
5271         }
5272
5273         r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
5274         if (r)
5275                 goto out_free_resources;
5276
5277         init_waitqueue_head(&ioc->reset_wq);
5278
5279         /* allocate memory pd handle bitmask list */
5280         ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
5281         if (ioc->facts.MaxDevHandle % 8)
5282                 ioc->pd_handles_sz++;
5283         ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
5284             GFP_KERNEL);
5285         if (!ioc->pd_handles) {
5286                 r = -ENOMEM;
5287                 goto out_free_resources;
5288         }
5289         ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
5290             GFP_KERNEL);
5291         if (!ioc->blocking_handles) {
5292                 r = -ENOMEM;
5293                 goto out_free_resources;
5294         }
5295
5296         ioc->fwfault_debug = mpt3sas_fwfault_debug;
5297
5298         /* base internal command bits */
5299         mutex_init(&ioc->base_cmds.mutex);
5300         ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5301         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
5302
5303         /* port_enable command bits */
5304         ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5305         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
5306
5307         /* transport internal command bits */
5308         ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5309         ioc->transport_cmds.status = MPT3_CMD_NOT_USED;
5310         mutex_init(&ioc->transport_cmds.mutex);
5311
5312         /* scsih internal command bits */
5313         ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5314         ioc->scsih_cmds.status = MPT3_CMD_NOT_USED;
5315         mutex_init(&ioc->scsih_cmds.mutex);
5316
5317         /* task management internal command bits */
5318         ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5319         ioc->tm_cmds.status = MPT3_CMD_NOT_USED;
5320         mutex_init(&ioc->tm_cmds.mutex);
5321
5322         /* config page internal command bits */
5323         ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5324         ioc->config_cmds.status = MPT3_CMD_NOT_USED;
5325         mutex_init(&ioc->config_cmds.mutex);
5326
5327         /* ctl module internal command bits */
5328         ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5329         ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
5330         ioc->ctl_cmds.status = MPT3_CMD_NOT_USED;
5331         mutex_init(&ioc->ctl_cmds.mutex);
5332
5333         if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
5334             !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
5335             !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
5336             !ioc->ctl_cmds.sense) {
5337                 r = -ENOMEM;
5338                 goto out_free_resources;
5339         }
5340
5341         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
5342                 ioc->event_masks[i] = -1;
5343
5344         /* here we enable the events we care about */
5345         _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
5346         _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
5347         _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
5348         _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
5349         _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
5350         _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
5351         _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
5352         _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
5353         _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
5354         _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
5355         _base_unmask_events(ioc, MPI2_EVENT_TEMP_THRESHOLD);
5356
5357         r = _base_make_ioc_operational(ioc, CAN_SLEEP);
5358         if (r)
5359                 goto out_free_resources;
5360
5361         ioc->non_operational_loop = 0;
5362         return 0;
5363
5364  out_free_resources:
5365
5366         ioc->remove_host = 1;
5367
5368         mpt3sas_base_free_resources(ioc);
5369         _base_release_memory_pools(ioc);
5370         pci_set_drvdata(ioc->pdev, NULL);
5371         kfree(ioc->cpu_msix_table);
5372         if (ioc->is_warpdrive)
5373                 kfree(ioc->reply_post_host_index);
5374         kfree(ioc->pd_handles);
5375         kfree(ioc->blocking_handles);
5376         kfree(ioc->tm_cmds.reply);
5377         kfree(ioc->transport_cmds.reply);
5378         kfree(ioc->scsih_cmds.reply);
5379         kfree(ioc->config_cmds.reply);
5380         kfree(ioc->base_cmds.reply);
5381         kfree(ioc->port_enable_cmds.reply);
5382         kfree(ioc->ctl_cmds.reply);
5383         kfree(ioc->ctl_cmds.sense);
5384         kfree(ioc->pfacts);
5385         ioc->ctl_cmds.reply = NULL;
5386         ioc->base_cmds.reply = NULL;
5387         ioc->tm_cmds.reply = NULL;
5388         ioc->scsih_cmds.reply = NULL;
5389         ioc->transport_cmds.reply = NULL;
5390         ioc->config_cmds.reply = NULL;
5391         ioc->pfacts = NULL;
5392         return r;
5393 }
5394
5395
5396 /**
5397  * mpt3sas_base_detach - remove controller instance
5398  * @ioc: per adapter object
5399  *
5400  * Return nothing.
5401  */
5402 void
5403 mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc)
5404 {
5405         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5406             __func__));
5407
5408         mpt3sas_base_stop_watchdog(ioc);
5409         mpt3sas_base_free_resources(ioc);
5410         _base_release_memory_pools(ioc);
5411         pci_set_drvdata(ioc->pdev, NULL);
5412         kfree(ioc->cpu_msix_table);
5413         if (ioc->is_warpdrive)
5414                 kfree(ioc->reply_post_host_index);
5415         kfree(ioc->pd_handles);
5416         kfree(ioc->blocking_handles);
5417         kfree(ioc->pfacts);
5418         kfree(ioc->ctl_cmds.reply);
5419         kfree(ioc->ctl_cmds.sense);
5420         kfree(ioc->base_cmds.reply);
5421         kfree(ioc->port_enable_cmds.reply);
5422         kfree(ioc->tm_cmds.reply);
5423         kfree(ioc->transport_cmds.reply);
5424         kfree(ioc->scsih_cmds.reply);
5425         kfree(ioc->config_cmds.reply);
5426 }
5427
5428 /**
5429  * _base_reset_handler - reset callback handler (for base)
5430  * @ioc: per adapter object
5431  * @reset_phase: phase
5432  *
5433  * The handler for doing any required cleanup or initialization.
5434  *
5435  * The reset phase can be MPT3_IOC_PRE_RESET, MPT3_IOC_AFTER_RESET,
5436  * MPT3_IOC_DONE_RESET
5437  *
5438  * Return nothing.
5439  */
5440 static void
5441 _base_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase)
5442 {
5443         mpt3sas_scsih_reset_handler(ioc, reset_phase);
5444         mpt3sas_ctl_reset_handler(ioc, reset_phase);
5445         switch (reset_phase) {
5446         case MPT3_IOC_PRE_RESET:
5447                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5448                 "%s: MPT3_IOC_PRE_RESET\n", ioc->name, __func__));
5449                 break;
5450         case MPT3_IOC_AFTER_RESET:
5451                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5452                 "%s: MPT3_IOC_AFTER_RESET\n", ioc->name, __func__));
5453                 if (ioc->transport_cmds.status & MPT3_CMD_PENDING) {
5454                         ioc->transport_cmds.status |= MPT3_CMD_RESET;
5455                         mpt3sas_base_free_smid(ioc, ioc->transport_cmds.smid);
5456                         complete(&ioc->transport_cmds.done);
5457                 }
5458                 if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
5459                         ioc->base_cmds.status |= MPT3_CMD_RESET;
5460                         mpt3sas_base_free_smid(ioc, ioc->base_cmds.smid);
5461                         complete(&ioc->base_cmds.done);
5462                 }
5463                 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
5464                         ioc->port_enable_failed = 1;
5465                         ioc->port_enable_cmds.status |= MPT3_CMD_RESET;
5466                         mpt3sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
5467                         if (ioc->is_driver_loading) {
5468                                 ioc->start_scan_failed =
5469                                     MPI2_IOCSTATUS_INTERNAL_ERROR;
5470                                 ioc->start_scan = 0;
5471                                 ioc->port_enable_cmds.status =
5472                                     MPT3_CMD_NOT_USED;
5473                         } else
5474                                 complete(&ioc->port_enable_cmds.done);
5475                 }
5476                 if (ioc->config_cmds.status & MPT3_CMD_PENDING) {
5477                         ioc->config_cmds.status |= MPT3_CMD_RESET;
5478                         mpt3sas_base_free_smid(ioc, ioc->config_cmds.smid);
5479                         ioc->config_cmds.smid = USHRT_MAX;
5480                         complete(&ioc->config_cmds.done);
5481                 }
5482                 break;
5483         case MPT3_IOC_DONE_RESET:
5484                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5485                         "%s: MPT3_IOC_DONE_RESET\n", ioc->name, __func__));
5486                 break;
5487         }
5488 }
5489
5490 /**
5491  * _wait_for_commands_to_complete - reset controller
5492  * @ioc: Pointer to MPT_ADAPTER structure
5493  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5494  *
5495  * This function waiting(3s) for all pending commands to complete
5496  * prior to putting controller in reset.
5497  */
5498 static void
5499 _wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
5500 {
5501         u32 ioc_state;
5502         unsigned long flags;
5503         u16 i;
5504
5505         ioc->pending_io_count = 0;
5506         if (sleep_flag != CAN_SLEEP)
5507                 return;
5508
5509         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5510         if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
5511                 return;
5512
5513         /* pending command count */
5514         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
5515         for (i = 0; i < ioc->scsiio_depth; i++)
5516                 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
5517                         ioc->pending_io_count++;
5518         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
5519
5520         if (!ioc->pending_io_count)
5521                 return;
5522
5523         /* wait for pending commands to complete */
5524         wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
5525 }
5526
5527 /**
5528  * mpt3sas_base_hard_reset_handler - reset controller
5529  * @ioc: Pointer to MPT_ADAPTER structure
5530  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5531  * @type: FORCE_BIG_HAMMER or SOFT_RESET
5532  *
5533  * Returns 0 for success, non-zero for failure.
5534  */
5535 int
5536 mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
5537         enum reset_type type)
5538 {
5539         int r;
5540         unsigned long flags;
5541         u32 ioc_state;
5542         u8 is_fault = 0, is_trigger = 0;
5543
5544         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
5545             __func__));
5546
5547         if (ioc->pci_error_recovery) {
5548                 pr_err(MPT3SAS_FMT "%s: pci error recovery reset\n",
5549                     ioc->name, __func__);
5550                 r = 0;
5551                 goto out_unlocked;
5552         }
5553
5554         if (mpt3sas_fwfault_debug)
5555                 mpt3sas_halt_firmware(ioc);
5556
5557         /* TODO - What we really should be doing is pulling
5558          * out all the code associated with NO_SLEEP; its never used.
5559          * That is legacy code from mpt fusion driver, ported over.
5560          * I will leave this BUG_ON here for now till its been resolved.
5561          */
5562         BUG_ON(sleep_flag == NO_SLEEP);
5563
5564         /* wait for an active reset in progress to complete */
5565         if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
5566                 do {
5567                         ssleep(1);
5568                 } while (ioc->shost_recovery == 1);
5569                 dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5570                     __func__));
5571                 return ioc->ioc_reset_in_progress_status;
5572         }
5573
5574         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5575         ioc->shost_recovery = 1;
5576         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5577
5578         if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5579             MPT3_DIAG_BUFFER_IS_REGISTERED) &&
5580             (!(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5581             MPT3_DIAG_BUFFER_IS_RELEASED))) {
5582                 is_trigger = 1;
5583                 ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5584                 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
5585                         is_fault = 1;
5586         }
5587         _base_reset_handler(ioc, MPT3_IOC_PRE_RESET);
5588         _wait_for_commands_to_complete(ioc, sleep_flag);
5589         _base_mask_interrupts(ioc);
5590         r = _base_make_ioc_ready(ioc, sleep_flag, type);
5591         if (r)
5592                 goto out;
5593         _base_reset_handler(ioc, MPT3_IOC_AFTER_RESET);
5594
5595         /* If this hard reset is called while port enable is active, then
5596          * there is no reason to call make_ioc_operational
5597          */
5598         if (ioc->is_driver_loading && ioc->port_enable_failed) {
5599                 ioc->remove_host = 1;
5600                 r = -EFAULT;
5601                 goto out;
5602         }
5603         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5604         if (r)
5605                 goto out;
5606
5607         if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable)
5608                 panic("%s: Issue occurred with flashing controller firmware."
5609                       "Please reboot the system and ensure that the correct"
5610                       " firmware version is running\n", ioc->name);
5611
5612         r = _base_make_ioc_operational(ioc, sleep_flag);
5613         if (!r)
5614                 _base_reset_handler(ioc, MPT3_IOC_DONE_RESET);
5615
5616  out:
5617         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: %s\n",
5618             ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
5619
5620         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5621         ioc->ioc_reset_in_progress_status = r;
5622         ioc->shost_recovery = 0;
5623         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5624         ioc->ioc_reset_count++;
5625         mutex_unlock(&ioc->reset_in_progress_mutex);
5626
5627  out_unlocked:
5628         if ((r == 0) && is_trigger) {
5629                 if (is_fault)
5630                         mpt3sas_trigger_master(ioc, MASTER_TRIGGER_FW_FAULT);
5631                 else
5632                         mpt3sas_trigger_master(ioc,
5633                             MASTER_TRIGGER_ADAPTER_RESET);
5634         }
5635         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5636             __func__));
5637         return r;
5638 }