2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
8 #include "qla_target.h"
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
15 * qla2x00_mailbox_command
16 * Issue mailbox command and waits for completion.
19 * ha = adapter block pointer.
20 * mcp = driver internal mbx struct pointer.
23 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
26 * 0 : QLA_SUCCESS = cmd performed success
27 * 1 : QLA_FUNCTION_FAILED (error encountered)
28 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
34 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
37 unsigned long flags = 0;
43 uint16_t __iomem *optr;
46 uint16_t __iomem *mbx_reg;
47 unsigned long wait_time;
48 struct qla_hw_data *ha = vha->hw;
49 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
52 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
54 if (ha->pdev->error_state > pci_channel_io_frozen) {
55 ql_log(ql_log_warn, vha, 0x1001,
56 "error_state is greater than pci_channel_io_frozen, "
58 return QLA_FUNCTION_TIMEOUT;
61 if (vha->device_flags & DFLG_DEV_FAILED) {
62 ql_log(ql_log_warn, vha, 0x1002,
63 "Device in failed state, exiting.\n");
64 return QLA_FUNCTION_TIMEOUT;
68 io_lock_on = base_vha->flags.init_done;
71 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1003,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
80 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1004,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 return QLA_FUNCTION_TIMEOUT;
89 * Wait for active mailbox commands to finish by waiting at most tov
90 * seconds. This is to serialize actual issuing of mailbox cmds during
93 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
94 /* Timeout occurred. Return error. */
95 ql_log(ql_log_warn, vha, 0x1005,
96 "Cmd access timeout, cmd=0x%x, Exiting.\n",
98 return QLA_FUNCTION_TIMEOUT;
101 ha->flags.mbox_busy = 1;
102 /* Save mailbox command for debug */
105 ql_dbg(ql_dbg_mbx, vha, 0x1006,
106 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108 spin_lock_irqsave(&ha->hardware_lock, flags);
110 /* Load mailbox registers. */
112 optr = (uint16_t __iomem *)®->isp82.mailbox_in[0];
113 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
114 optr = (uint16_t __iomem *)®->isp24.mailbox0;
116 optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0);
119 command = mcp->mb[0];
120 mboxes = mcp->out_mb;
122 ql_dbg(ql_dbg_mbx, vha, 0x1111,
123 "Mailbox registers (OUT):\n");
124 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
125 if (IS_QLA2200(ha) && cnt == 8)
127 (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8);
128 if (mboxes & BIT_0) {
129 ql_dbg(ql_dbg_mbx, vha, 0x1112,
130 "mbox[%d]<-0x%04x\n", cnt, *iptr);
131 WRT_REG_WORD(optr, *iptr);
139 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
140 "I/O Address = %p.\n", optr);
142 /* Issue set host interrupt command to send cmd out. */
143 ha->flags.mbox_int = 0;
144 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
146 /* Unlock mbx registers and wait for interrupt */
147 ql_dbg(ql_dbg_mbx, vha, 0x100f,
148 "Going to unlock irq & waiting for interrupts. "
149 "jiffies=%lx.\n", jiffies);
151 /* Wait for mbx cmd completion until timeout */
153 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
154 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
156 if (IS_P3P_TYPE(ha)) {
157 if (RD_REG_DWORD(®->isp82.hint) &
158 HINT_MBX_INT_PENDING) {
159 spin_unlock_irqrestore(&ha->hardware_lock,
161 ha->flags.mbox_busy = 0;
162 ql_dbg(ql_dbg_mbx, vha, 0x1010,
163 "Pending mailbox timeout, exiting.\n");
164 rval = QLA_FUNCTION_TIMEOUT;
167 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
168 } else if (IS_FWI2_CAPABLE(ha))
169 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
171 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
172 spin_unlock_irqrestore(&ha->hardware_lock, flags);
174 if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
176 ql_dbg(ql_dbg_mbx, vha, 0x117a,
177 "cmd=%x Timeout.\n", command);
178 spin_lock_irqsave(&ha->hardware_lock, flags);
179 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
180 spin_unlock_irqrestore(&ha->hardware_lock, flags);
183 ql_dbg(ql_dbg_mbx, vha, 0x1011,
184 "Cmd=%x Polling Mode.\n", command);
186 if (IS_P3P_TYPE(ha)) {
187 if (RD_REG_DWORD(®->isp82.hint) &
188 HINT_MBX_INT_PENDING) {
189 spin_unlock_irqrestore(&ha->hardware_lock,
191 ha->flags.mbox_busy = 0;
192 ql_dbg(ql_dbg_mbx, vha, 0x1012,
193 "Pending mailbox timeout, exiting.\n");
194 rval = QLA_FUNCTION_TIMEOUT;
197 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
198 } else if (IS_FWI2_CAPABLE(ha))
199 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
201 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
202 spin_unlock_irqrestore(&ha->hardware_lock, flags);
204 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
205 while (!ha->flags.mbox_int) {
206 if (time_after(jiffies, wait_time))
209 /* Check for pending interrupts. */
210 qla2x00_poll(ha->rsp_q_map[0]);
212 if (!ha->flags.mbox_int &&
214 command == MBC_LOAD_RISC_RAM_EXTENDED))
217 ql_dbg(ql_dbg_mbx, vha, 0x1013,
219 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
222 /* Check whether we timed out */
223 if (ha->flags.mbox_int) {
226 ql_dbg(ql_dbg_mbx, vha, 0x1014,
227 "Cmd=%x completed.\n", command);
229 /* Got interrupt. Clear the flag. */
230 ha->flags.mbox_int = 0;
231 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
233 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
234 ha->flags.mbox_busy = 0;
235 /* Setting Link-Down error */
236 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
238 rval = QLA_FUNCTION_FAILED;
239 ql_log(ql_log_warn, vha, 0x1015,
240 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
244 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
245 rval = QLA_FUNCTION_FAILED;
247 /* Load return mailbox registers. */
249 iptr = (uint16_t *)&ha->mailbox_out[0];
252 ql_dbg(ql_dbg_mbx, vha, 0x1113,
253 "Mailbox registers (IN):\n");
254 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
255 if (mboxes & BIT_0) {
257 ql_dbg(ql_dbg_mbx, vha, 0x1114,
258 "mbox[%d]->0x%04x\n", cnt, *iptr2);
270 if (IS_FWI2_CAPABLE(ha)) {
271 mb0 = RD_REG_WORD(®->isp24.mailbox0);
272 ictrl = RD_REG_DWORD(®->isp24.ictrl);
274 mb0 = RD_MAILBOX_REG(ha, ®->isp, 0);
275 ictrl = RD_REG_WORD(®->isp.ictrl);
277 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
278 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
279 "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
280 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
283 * Attempt to capture a firmware dump for further analysis
284 * of the current firmware state. We do not need to do this
285 * if we are intentionally generating a dump.
287 if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
288 ha->isp_ops->fw_dump(vha, 0);
290 rval = QLA_FUNCTION_TIMEOUT;
293 ha->flags.mbox_busy = 0;
298 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
299 ql_dbg(ql_dbg_mbx, vha, 0x101a,
300 "Checking for additional resp interrupt.\n");
302 /* polling mode for non isp_abort commands. */
303 qla2x00_poll(ha->rsp_q_map[0]);
306 if (rval == QLA_FUNCTION_TIMEOUT &&
307 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
308 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
309 ha->flags.eeh_busy) {
310 /* not in dpc. schedule it for dpc to take over. */
311 ql_dbg(ql_dbg_mbx, vha, 0x101b,
312 "Timeout, schedule isp_abort_needed.\n");
314 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
315 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
316 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
317 if (IS_QLA82XX(ha)) {
318 ql_dbg(ql_dbg_mbx, vha, 0x112a,
319 "disabling pause transmit on port "
322 QLA82XX_CRB_NIU + 0x98,
323 CRB_NIU_XG_PAUSE_CTL_P0|
324 CRB_NIU_XG_PAUSE_CTL_P1);
326 ql_log(ql_log_info, base_vha, 0x101c,
327 "Mailbox cmd timeout occurred, cmd=0x%x, "
328 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
329 "abort.\n", command, mcp->mb[0],
331 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
332 qla2xxx_wake_dpc(vha);
334 } else if (!abort_active) {
335 /* call abort directly since we are in the DPC thread */
336 ql_dbg(ql_dbg_mbx, vha, 0x101d,
337 "Timeout, calling abort_isp.\n");
339 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
340 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
341 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
342 if (IS_QLA82XX(ha)) {
343 ql_dbg(ql_dbg_mbx, vha, 0x112b,
344 "disabling pause transmit on port "
347 QLA82XX_CRB_NIU + 0x98,
348 CRB_NIU_XG_PAUSE_CTL_P0|
349 CRB_NIU_XG_PAUSE_CTL_P1);
351 ql_log(ql_log_info, base_vha, 0x101e,
352 "Mailbox cmd timeout occurred, cmd=0x%x, "
353 "mb[0]=0x%x. Scheduling ISP abort ",
354 command, mcp->mb[0]);
355 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
356 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
357 /* Allow next mbx cmd to come in. */
358 complete(&ha->mbx_cmd_comp);
359 if (ha->isp_ops->abort_isp(vha)) {
360 /* Failed. retry later. */
361 set_bit(ISP_ABORT_NEEDED,
364 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
365 ql_dbg(ql_dbg_mbx, vha, 0x101f,
366 "Finished abort_isp.\n");
373 /* Allow next mbx cmd to come in. */
374 complete(&ha->mbx_cmd_comp);
378 ql_dbg(ql_dbg_disc, base_vha, 0x1020,
379 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
380 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
382 ql_dbg(ql_dbg_disc, vha, 0x1115,
383 "host status: 0x%x, flags:0x%lx, intr ctrl reg:0x%x, intr status:0x%x\n",
384 RD_REG_DWORD(®->isp24.host_status),
385 ha->fw_dump_cap_flags,
386 RD_REG_DWORD(®->isp24.ictrl),
387 RD_REG_DWORD(®->isp24.istatus));
389 mbx_reg = ®->isp24.mailbox0;
390 for (i = 0; i < 6; i++)
391 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x1116,
392 "mbox[%d] 0x%04x\n", i, RD_REG_WORD(mbx_reg++));
394 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
401 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
402 uint32_t risc_code_size)
405 struct qla_hw_data *ha = vha->hw;
407 mbx_cmd_t *mcp = &mc;
409 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
410 "Entered %s.\n", __func__);
412 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
413 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
414 mcp->mb[8] = MSW(risc_addr);
415 mcp->out_mb = MBX_8|MBX_0;
417 mcp->mb[0] = MBC_LOAD_RISC_RAM;
420 mcp->mb[1] = LSW(risc_addr);
421 mcp->mb[2] = MSW(req_dma);
422 mcp->mb[3] = LSW(req_dma);
423 mcp->mb[6] = MSW(MSD(req_dma));
424 mcp->mb[7] = LSW(MSD(req_dma));
425 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
426 if (IS_FWI2_CAPABLE(ha)) {
427 mcp->mb[4] = MSW(risc_code_size);
428 mcp->mb[5] = LSW(risc_code_size);
429 mcp->out_mb |= MBX_5|MBX_4;
431 mcp->mb[4] = LSW(risc_code_size);
432 mcp->out_mb |= MBX_4;
436 mcp->tov = MBX_TOV_SECONDS;
438 rval = qla2x00_mailbox_command(vha, mcp);
440 if (rval != QLA_SUCCESS) {
441 ql_dbg(ql_dbg_mbx, vha, 0x1023,
442 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
444 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
445 "Done %s.\n", __func__);
451 #define EXTENDED_BB_CREDITS BIT_0
454 * Start adapter firmware.
457 * ha = adapter block pointer.
458 * TARGET_QUEUE_LOCK must be released.
459 * ADAPTER_STATE_LOCK must be released.
462 * qla2x00 local function return status code.
468 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
471 struct qla_hw_data *ha = vha->hw;
473 mbx_cmd_t *mcp = &mc;
475 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
476 "Entered %s.\n", __func__);
478 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
481 if (IS_FWI2_CAPABLE(ha)) {
482 mcp->mb[1] = MSW(risc_addr);
483 mcp->mb[2] = LSW(risc_addr);
485 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
487 struct nvram_81xx *nv = ha->nvram;
488 mcp->mb[4] = (nv->enhanced_features &
489 EXTENDED_BB_CREDITS);
493 if (ha->flags.exlogins_enabled)
494 mcp->mb[4] |= ENABLE_EXTENDED_LOGIN;
496 if (ha->flags.exchoffld_enabled)
497 mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD;
499 mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
502 mcp->mb[1] = LSW(risc_addr);
503 mcp->out_mb |= MBX_1;
504 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
506 mcp->out_mb |= MBX_2;
510 mcp->tov = MBX_TOV_SECONDS;
512 rval = qla2x00_mailbox_command(vha, mcp);
514 if (rval != QLA_SUCCESS) {
515 ql_dbg(ql_dbg_mbx, vha, 0x1026,
516 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
518 if (IS_FWI2_CAPABLE(ha)) {
519 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
520 "Done exchanges=%x.\n", mcp->mb[1]);
522 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
523 "Done %s.\n", __func__);
531 * qla_get_exlogin_status
532 * Get extended login status
533 * uses the memory offload control/status Mailbox
536 * ha: adapter state pointer.
537 * fwopt: firmware options
540 * qla2x00 local function status
545 #define FETCH_XLOGINS_STAT 0x8
547 qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
548 uint16_t *ex_logins_cnt)
552 mbx_cmd_t *mcp = &mc;
554 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f,
555 "Entered %s\n", __func__);
557 memset(mcp->mb, 0 , sizeof(mcp->mb));
558 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
559 mcp->mb[1] = FETCH_XLOGINS_STAT;
560 mcp->out_mb = MBX_1|MBX_0;
561 mcp->in_mb = MBX_10|MBX_4|MBX_0;
562 mcp->tov = MBX_TOV_SECONDS;
565 rval = qla2x00_mailbox_command(vha, mcp);
566 if (rval != QLA_SUCCESS) {
567 ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval);
569 *buf_sz = mcp->mb[4];
570 *ex_logins_cnt = mcp->mb[10];
572 ql_log(ql_log_info, vha, 0x1190,
573 "buffer size 0x%x, exchange login count=%d\n",
574 mcp->mb[4], mcp->mb[10]);
576 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116,
577 "Done %s.\n", __func__);
584 * qla_set_exlogin_mem_cfg
585 * set extended login memory configuration
586 * Mbx needs to be issues before init_cb is set
589 * ha: adapter state pointer.
590 * buffer: buffer pointer
591 * phys_addr: physical address of buffer
592 * size: size of buffer
593 * TARGET_QUEUE_LOCK must be released
594 * ADAPTER_STATE_LOCK must be release
597 * qla2x00 local funxtion status code.
602 #define CONFIG_XLOGINS_MEM 0x3
604 qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
608 mbx_cmd_t *mcp = &mc;
609 struct qla_hw_data *ha = vha->hw;
610 int configured_count;
612 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
613 "Entered %s.\n", __func__);
615 memset(mcp->mb, 0 , sizeof(mcp->mb));
616 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
617 mcp->mb[1] = CONFIG_XLOGINS_MEM;
618 mcp->mb[2] = MSW(phys_addr);
619 mcp->mb[3] = LSW(phys_addr);
620 mcp->mb[6] = MSW(MSD(phys_addr));
621 mcp->mb[7] = LSW(MSD(phys_addr));
622 mcp->mb[8] = MSW(ha->exlogin_size);
623 mcp->mb[9] = LSW(ha->exlogin_size);
624 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
625 mcp->in_mb = MBX_11|MBX_0;
626 mcp->tov = MBX_TOV_SECONDS;
628 rval = qla2x00_mailbox_command(vha, mcp);
629 if (rval != QLA_SUCCESS) {
631 ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
633 configured_count = mcp->mb[11];
634 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
635 "Done %s.\n", __func__);
642 * qla_get_exchoffld_status
643 * Get exchange offload status
644 * uses the memory offload control/status Mailbox
647 * ha: adapter state pointer.
648 * fwopt: firmware options
651 * qla2x00 local function status
656 #define FETCH_XCHOFFLD_STAT 0x2
658 qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
659 uint16_t *ex_logins_cnt)
663 mbx_cmd_t *mcp = &mc;
665 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019,
666 "Entered %s\n", __func__);
668 memset(mcp->mb, 0 , sizeof(mcp->mb));
669 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
670 mcp->mb[1] = FETCH_XCHOFFLD_STAT;
671 mcp->out_mb = MBX_1|MBX_0;
672 mcp->in_mb = MBX_10|MBX_4|MBX_0;
673 mcp->tov = MBX_TOV_SECONDS;
676 rval = qla2x00_mailbox_command(vha, mcp);
677 if (rval != QLA_SUCCESS) {
678 ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval);
680 *buf_sz = mcp->mb[4];
681 *ex_logins_cnt = mcp->mb[10];
683 ql_log(ql_log_info, vha, 0x118e,
684 "buffer size 0x%x, exchange offload count=%d\n",
685 mcp->mb[4], mcp->mb[10]);
687 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156,
688 "Done %s.\n", __func__);
695 * qla_set_exchoffld_mem_cfg
696 * Set exchange offload memory configuration
697 * Mbx needs to be issues before init_cb is set
700 * ha: adapter state pointer.
701 * buffer: buffer pointer
702 * phys_addr: physical address of buffer
703 * size: size of buffer
704 * TARGET_QUEUE_LOCK must be released
705 * ADAPTER_STATE_LOCK must be release
708 * qla2x00 local funxtion status code.
713 #define CONFIG_XCHOFFLD_MEM 0x3
715 qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
719 mbx_cmd_t *mcp = &mc;
720 struct qla_hw_data *ha = vha->hw;
722 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157,
723 "Entered %s.\n", __func__);
725 memset(mcp->mb, 0 , sizeof(mcp->mb));
726 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
727 mcp->mb[1] = CONFIG_XCHOFFLD_MEM;
728 mcp->mb[2] = MSW(phys_addr);
729 mcp->mb[3] = LSW(phys_addr);
730 mcp->mb[6] = MSW(MSD(phys_addr));
731 mcp->mb[7] = LSW(MSD(phys_addr));
732 mcp->mb[8] = MSW(ha->exlogin_size);
733 mcp->mb[9] = LSW(ha->exlogin_size);
734 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
735 mcp->in_mb = MBX_11|MBX_0;
736 mcp->tov = MBX_TOV_SECONDS;
738 rval = qla2x00_mailbox_command(vha, mcp);
739 if (rval != QLA_SUCCESS) {
741 ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval);
743 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
744 "Done %s.\n", __func__);
751 * qla2x00_get_fw_version
752 * Get firmware version.
755 * ha: adapter state pointer.
756 * major: pointer for major number.
757 * minor: pointer for minor number.
758 * subminor: pointer for subminor number.
761 * qla2x00 local function return status code.
767 qla2x00_get_fw_version(scsi_qla_host_t *vha)
771 mbx_cmd_t *mcp = &mc;
772 struct qla_hw_data *ha = vha->hw;
774 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
775 "Entered %s.\n", __func__);
777 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
779 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
780 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
781 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
782 if (IS_FWI2_CAPABLE(ha))
783 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
785 mcp->in_mb |= MBX_23 | MBX_22 | MBX_21 | MBX_20 | MBX_19 |
786 MBX_18 | MBX_14 | MBX_13 | MBX_11 | MBX_10 | MBX_9 | MBX_8;
789 mcp->tov = MBX_TOV_SECONDS;
790 rval = qla2x00_mailbox_command(vha, mcp);
791 if (rval != QLA_SUCCESS)
794 /* Return mailbox data. */
795 ha->fw_major_version = mcp->mb[1];
796 ha->fw_minor_version = mcp->mb[2];
797 ha->fw_subminor_version = mcp->mb[3];
798 ha->fw_attributes = mcp->mb[6];
799 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
800 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
802 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
804 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
805 ha->mpi_version[0] = mcp->mb[10] & 0xff;
806 ha->mpi_version[1] = mcp->mb[11] >> 8;
807 ha->mpi_version[2] = mcp->mb[11] & 0xff;
808 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
809 ha->phy_version[0] = mcp->mb[8] & 0xff;
810 ha->phy_version[1] = mcp->mb[9] >> 8;
811 ha->phy_version[2] = mcp->mb[9] & 0xff;
814 if (IS_FWI2_CAPABLE(ha)) {
815 ha->fw_attributes_h = mcp->mb[15];
816 ha->fw_attributes_ext[0] = mcp->mb[16];
817 ha->fw_attributes_ext[1] = mcp->mb[17];
818 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
819 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
820 __func__, mcp->mb[15], mcp->mb[6]);
821 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
822 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
823 __func__, mcp->mb[17], mcp->mb[16]);
825 if (ha->fw_attributes_h & 0x4)
826 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d,
827 "%s: Firmware supports Extended Login 0x%x\n",
828 __func__, ha->fw_attributes_h);
830 if (ha->fw_attributes_h & 0x8)
831 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191,
832 "%s: Firmware supports Exchange Offload 0x%x\n",
833 __func__, ha->fw_attributes_h);
836 if (IS_QLA27XX(ha)) {
837 ha->mpi_version[0] = mcp->mb[10] & 0xff;
838 ha->mpi_version[1] = mcp->mb[11] >> 8;
839 ha->mpi_version[2] = mcp->mb[11] & 0xff;
840 ha->pep_version[0] = mcp->mb[13] & 0xff;
841 ha->pep_version[1] = mcp->mb[14] >> 8;
842 ha->pep_version[2] = mcp->mb[14] & 0xff;
843 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
844 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
848 if (rval != QLA_SUCCESS) {
850 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
853 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
854 "Done %s.\n", __func__);
860 * qla2x00_get_fw_options
861 * Set firmware options.
864 * ha = adapter block pointer.
865 * fwopt = pointer for firmware options.
868 * qla2x00 local function return status code.
874 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
878 mbx_cmd_t *mcp = &mc;
880 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
881 "Entered %s.\n", __func__);
883 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
885 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
886 mcp->tov = MBX_TOV_SECONDS;
888 rval = qla2x00_mailbox_command(vha, mcp);
890 if (rval != QLA_SUCCESS) {
892 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
894 fwopts[0] = mcp->mb[0];
895 fwopts[1] = mcp->mb[1];
896 fwopts[2] = mcp->mb[2];
897 fwopts[3] = mcp->mb[3];
899 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
900 "Done %s.\n", __func__);
908 * qla2x00_set_fw_options
909 * Set firmware options.
912 * ha = adapter block pointer.
913 * fwopt = pointer for firmware options.
916 * qla2x00 local function return status code.
922 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
926 mbx_cmd_t *mcp = &mc;
928 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
929 "Entered %s.\n", __func__);
931 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
932 mcp->mb[1] = fwopts[1];
933 mcp->mb[2] = fwopts[2];
934 mcp->mb[3] = fwopts[3];
935 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
937 if (IS_FWI2_CAPABLE(vha->hw)) {
940 mcp->mb[10] = fwopts[10];
941 mcp->mb[11] = fwopts[11];
942 mcp->mb[12] = 0; /* Undocumented, but used */
943 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
945 mcp->tov = MBX_TOV_SECONDS;
947 rval = qla2x00_mailbox_command(vha, mcp);
949 fwopts[0] = mcp->mb[0];
951 if (rval != QLA_SUCCESS) {
953 ql_dbg(ql_dbg_mbx, vha, 0x1030,
954 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
957 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
958 "Done %s.\n", __func__);
965 * qla2x00_mbx_reg_test
966 * Mailbox register wrap test.
969 * ha = adapter block pointer.
970 * TARGET_QUEUE_LOCK must be released.
971 * ADAPTER_STATE_LOCK must be released.
974 * qla2x00 local function return status code.
980 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
984 mbx_cmd_t *mcp = &mc;
986 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
987 "Entered %s.\n", __func__);
989 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
997 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
998 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
999 mcp->tov = MBX_TOV_SECONDS;
1001 rval = qla2x00_mailbox_command(vha, mcp);
1003 if (rval == QLA_SUCCESS) {
1004 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
1005 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
1006 rval = QLA_FUNCTION_FAILED;
1007 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
1008 mcp->mb[7] != 0x2525)
1009 rval = QLA_FUNCTION_FAILED;
1012 if (rval != QLA_SUCCESS) {
1014 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
1017 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
1018 "Done %s.\n", __func__);
1025 * qla2x00_verify_checksum
1026 * Verify firmware checksum.
1029 * ha = adapter block pointer.
1030 * TARGET_QUEUE_LOCK must be released.
1031 * ADAPTER_STATE_LOCK must be released.
1034 * qla2x00 local function return status code.
1040 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
1044 mbx_cmd_t *mcp = &mc;
1046 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
1047 "Entered %s.\n", __func__);
1049 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1050 mcp->out_mb = MBX_0;
1052 if (IS_FWI2_CAPABLE(vha->hw)) {
1053 mcp->mb[1] = MSW(risc_addr);
1054 mcp->mb[2] = LSW(risc_addr);
1055 mcp->out_mb |= MBX_2|MBX_1;
1056 mcp->in_mb |= MBX_2|MBX_1;
1058 mcp->mb[1] = LSW(risc_addr);
1059 mcp->out_mb |= MBX_1;
1060 mcp->in_mb |= MBX_1;
1063 mcp->tov = MBX_TOV_SECONDS;
1065 rval = qla2x00_mailbox_command(vha, mcp);
1067 if (rval != QLA_SUCCESS) {
1068 ql_dbg(ql_dbg_mbx, vha, 0x1036,
1069 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
1070 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
1072 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
1073 "Done %s.\n", __func__);
1080 * qla2x00_issue_iocb
1081 * Issue IOCB using mailbox command
1084 * ha = adapter state pointer.
1085 * buffer = buffer pointer.
1086 * phys_addr = physical address of buffer.
1087 * size = size of buffer.
1088 * TARGET_QUEUE_LOCK must be released.
1089 * ADAPTER_STATE_LOCK must be released.
1092 * qla2x00 local function return status code.
1098 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
1099 dma_addr_t phys_addr, size_t size, uint32_t tov)
1103 mbx_cmd_t *mcp = &mc;
1105 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
1106 "Entered %s.\n", __func__);
1108 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
1110 mcp->mb[2] = MSW(phys_addr);
1111 mcp->mb[3] = LSW(phys_addr);
1112 mcp->mb[6] = MSW(MSD(phys_addr));
1113 mcp->mb[7] = LSW(MSD(phys_addr));
1114 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1115 mcp->in_mb = MBX_2|MBX_0;
1118 rval = qla2x00_mailbox_command(vha, mcp);
1120 if (rval != QLA_SUCCESS) {
1122 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
1124 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
1126 /* Mask reserved bits. */
1127 sts_entry->entry_status &=
1128 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
1129 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
1130 "Done %s.\n", __func__);
1137 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
1140 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
1145 * qla2x00_abort_command
1146 * Abort command aborts a specified IOCB.
1149 * ha = adapter block pointer.
1150 * sp = SB structure pointer.
1153 * qla2x00 local function return status code.
1159 qla2x00_abort_command(srb_t *sp)
1161 unsigned long flags = 0;
1163 uint32_t handle = 0;
1165 mbx_cmd_t *mcp = &mc;
1166 fc_port_t *fcport = sp->fcport;
1167 scsi_qla_host_t *vha = fcport->vha;
1168 struct qla_hw_data *ha = vha->hw;
1169 struct req_que *req = vha->req;
1170 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1172 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
1173 "Entered %s.\n", __func__);
1175 spin_lock_irqsave(&ha->hardware_lock, flags);
1176 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1177 if (req->outstanding_cmds[handle] == sp)
1180 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1182 if (handle == req->num_outstanding_cmds) {
1183 /* command not found */
1184 return QLA_FUNCTION_FAILED;
1187 mcp->mb[0] = MBC_ABORT_COMMAND;
1188 if (HAS_EXTENDED_IDS(ha))
1189 mcp->mb[1] = fcport->loop_id;
1191 mcp->mb[1] = fcport->loop_id << 8;
1192 mcp->mb[2] = (uint16_t)handle;
1193 mcp->mb[3] = (uint16_t)(handle >> 16);
1194 mcp->mb[6] = (uint16_t)cmd->device->lun;
1195 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1197 mcp->tov = MBX_TOV_SECONDS;
1199 rval = qla2x00_mailbox_command(vha, mcp);
1201 if (rval != QLA_SUCCESS) {
1202 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
1204 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
1205 "Done %s.\n", __func__);
1212 qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
1216 mbx_cmd_t *mcp = &mc;
1217 scsi_qla_host_t *vha;
1218 struct req_que *req;
1219 struct rsp_que *rsp;
1224 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
1225 "Entered %s.\n", __func__);
1227 req = vha->hw->req_q_map[0];
1229 mcp->mb[0] = MBC_ABORT_TARGET;
1230 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
1231 if (HAS_EXTENDED_IDS(vha->hw)) {
1232 mcp->mb[1] = fcport->loop_id;
1234 mcp->out_mb |= MBX_10;
1236 mcp->mb[1] = fcport->loop_id << 8;
1238 mcp->mb[2] = vha->hw->loop_reset_delay;
1239 mcp->mb[9] = vha->vp_idx;
1242 mcp->tov = MBX_TOV_SECONDS;
1244 rval = qla2x00_mailbox_command(vha, mcp);
1245 if (rval != QLA_SUCCESS) {
1246 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
1247 "Failed=%x.\n", rval);
1250 /* Issue marker IOCB. */
1251 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
1253 if (rval2 != QLA_SUCCESS) {
1254 ql_dbg(ql_dbg_mbx, vha, 0x1040,
1255 "Failed to issue marker IOCB (%x).\n", rval2);
1257 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
1258 "Done %s.\n", __func__);
1265 qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1269 mbx_cmd_t *mcp = &mc;
1270 scsi_qla_host_t *vha;
1271 struct req_que *req;
1272 struct rsp_que *rsp;
1276 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1277 "Entered %s.\n", __func__);
1279 req = vha->hw->req_q_map[0];
1281 mcp->mb[0] = MBC_LUN_RESET;
1282 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1283 if (HAS_EXTENDED_IDS(vha->hw))
1284 mcp->mb[1] = fcport->loop_id;
1286 mcp->mb[1] = fcport->loop_id << 8;
1287 mcp->mb[2] = (u32)l;
1289 mcp->mb[9] = vha->vp_idx;
1292 mcp->tov = MBX_TOV_SECONDS;
1294 rval = qla2x00_mailbox_command(vha, mcp);
1295 if (rval != QLA_SUCCESS) {
1296 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1299 /* Issue marker IOCB. */
1300 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1302 if (rval2 != QLA_SUCCESS) {
1303 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1304 "Failed to issue marker IOCB (%x).\n", rval2);
1306 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1307 "Done %s.\n", __func__);
1314 * qla2x00_get_adapter_id
1315 * Get adapter ID and topology.
1318 * ha = adapter block pointer.
1319 * id = pointer for loop ID.
1320 * al_pa = pointer for AL_PA.
1321 * area = pointer for area.
1322 * domain = pointer for domain.
1323 * top = pointer for topology.
1324 * TARGET_QUEUE_LOCK must be released.
1325 * ADAPTER_STATE_LOCK must be released.
1328 * qla2x00 local function return status code.
1334 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1335 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1339 mbx_cmd_t *mcp = &mc;
1341 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1342 "Entered %s.\n", __func__);
1344 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1345 mcp->mb[9] = vha->vp_idx;
1346 mcp->out_mb = MBX_9|MBX_0;
1347 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1348 if (IS_CNA_CAPABLE(vha->hw))
1349 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1350 if (IS_FWI2_CAPABLE(vha->hw))
1351 mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1352 mcp->tov = MBX_TOV_SECONDS;
1354 rval = qla2x00_mailbox_command(vha, mcp);
1355 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1356 rval = QLA_COMMAND_ERROR;
1357 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1358 rval = QLA_INVALID_COMMAND;
1362 *al_pa = LSB(mcp->mb[2]);
1363 *area = MSB(mcp->mb[2]);
1364 *domain = LSB(mcp->mb[3]);
1366 *sw_cap = mcp->mb[7];
1368 if (rval != QLA_SUCCESS) {
1370 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1372 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1373 "Done %s.\n", __func__);
1375 if (IS_CNA_CAPABLE(vha->hw)) {
1376 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1377 vha->fcoe_fcf_idx = mcp->mb[10];
1378 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1379 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1380 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1381 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1382 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1383 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1385 /* If FA-WWN supported */
1386 if (IS_FAWWN_CAPABLE(vha->hw)) {
1387 if (mcp->mb[7] & BIT_14) {
1388 vha->port_name[0] = MSB(mcp->mb[16]);
1389 vha->port_name[1] = LSB(mcp->mb[16]);
1390 vha->port_name[2] = MSB(mcp->mb[17]);
1391 vha->port_name[3] = LSB(mcp->mb[17]);
1392 vha->port_name[4] = MSB(mcp->mb[18]);
1393 vha->port_name[5] = LSB(mcp->mb[18]);
1394 vha->port_name[6] = MSB(mcp->mb[19]);
1395 vha->port_name[7] = LSB(mcp->mb[19]);
1396 fc_host_port_name(vha->host) =
1397 wwn_to_u64(vha->port_name);
1398 ql_dbg(ql_dbg_mbx, vha, 0x10ca,
1399 "FA-WWN acquired %016llx\n",
1400 wwn_to_u64(vha->port_name));
1409 * qla2x00_get_retry_cnt
1410 * Get current firmware login retry count and delay.
1413 * ha = adapter block pointer.
1414 * retry_cnt = pointer to login retry count.
1415 * tov = pointer to login timeout value.
1418 * qla2x00 local function return status code.
1424 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1430 mbx_cmd_t *mcp = &mc;
1432 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1433 "Entered %s.\n", __func__);
1435 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1436 mcp->out_mb = MBX_0;
1437 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1438 mcp->tov = MBX_TOV_SECONDS;
1440 rval = qla2x00_mailbox_command(vha, mcp);
1442 if (rval != QLA_SUCCESS) {
1444 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1445 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1447 /* Convert returned data and check our values. */
1448 *r_a_tov = mcp->mb[3] / 2;
1449 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1450 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1451 /* Update to the larger values */
1452 *retry_cnt = (uint8_t)mcp->mb[1];
1456 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1457 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1464 * qla2x00_init_firmware
1465 * Initialize adapter firmware.
1468 * ha = adapter block pointer.
1469 * dptr = Initialization control block pointer.
1470 * size = size of initialization control block.
1471 * TARGET_QUEUE_LOCK must be released.
1472 * ADAPTER_STATE_LOCK must be released.
1475 * qla2x00 local function return status code.
1481 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1485 mbx_cmd_t *mcp = &mc;
1486 struct qla_hw_data *ha = vha->hw;
1488 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1489 "Entered %s.\n", __func__);
1491 if (IS_P3P_TYPE(ha) && ql2xdbwr)
1492 qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr,
1493 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1495 if (ha->flags.npiv_supported)
1496 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1498 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1501 mcp->mb[2] = MSW(ha->init_cb_dma);
1502 mcp->mb[3] = LSW(ha->init_cb_dma);
1503 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1504 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1505 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1506 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1508 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1509 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1510 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1511 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1512 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1513 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1515 /* 1 and 2 should normally be captured. */
1516 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1517 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1518 /* mb3 is additional info about the installed SFP. */
1519 mcp->in_mb |= MBX_3;
1520 mcp->buf_size = size;
1521 mcp->flags = MBX_DMA_OUT;
1522 mcp->tov = MBX_TOV_SECONDS;
1523 rval = qla2x00_mailbox_command(vha, mcp);
1525 if (rval != QLA_SUCCESS) {
1527 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1528 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1529 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1532 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1533 "Done %s.\n", __func__);
1540 * qla2x00_get_node_name_list
1541 * Issue get node name list mailbox command, kmalloc()
1542 * and return the resulting list. Caller must kfree() it!
1545 * ha = adapter state pointer.
1546 * out_data = resulting list
1547 * out_len = length of the resulting list
1550 * qla2x00 local function return status code.
1556 qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
1558 struct qla_hw_data *ha = vha->hw;
1559 struct qla_port_24xx_data *list = NULL;
1562 dma_addr_t pmap_dma;
1568 dma_size = left * sizeof(*list);
1569 pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
1570 &pmap_dma, GFP_KERNEL);
1572 ql_log(ql_log_warn, vha, 0x113f,
1573 "%s(%ld): DMA Alloc failed of %ld\n",
1574 __func__, vha->host_no, dma_size);
1575 rval = QLA_MEMORY_ALLOC_FAILED;
1579 mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
1580 mc.mb[1] = BIT_1 | BIT_3;
1581 mc.mb[2] = MSW(pmap_dma);
1582 mc.mb[3] = LSW(pmap_dma);
1583 mc.mb[6] = MSW(MSD(pmap_dma));
1584 mc.mb[7] = LSW(MSD(pmap_dma));
1585 mc.mb[8] = dma_size;
1586 mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
1587 mc.in_mb = MBX_0|MBX_1;
1589 mc.flags = MBX_DMA_IN;
1591 rval = qla2x00_mailbox_command(vha, &mc);
1592 if (rval != QLA_SUCCESS) {
1593 if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
1594 (mc.mb[1] == 0xA)) {
1595 left += le16_to_cpu(mc.mb[2]) /
1596 sizeof(struct qla_port_24xx_data);
1604 list = kmemdup(pmap, dma_size, GFP_KERNEL);
1606 ql_log(ql_log_warn, vha, 0x1140,
1607 "%s(%ld): failed to allocate node names list "
1608 "structure.\n", __func__, vha->host_no);
1609 rval = QLA_MEMORY_ALLOC_FAILED;
1614 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1618 *out_len = dma_size;
1624 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1629 * qla2x00_get_port_database
1630 * Issue normal/enhanced get port database mailbox command
1631 * and copy device name as necessary.
1634 * ha = adapter state pointer.
1635 * dev = structure pointer.
1636 * opt = enhanced cmd option byte.
1639 * qla2x00 local function return status code.
1645 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1649 mbx_cmd_t *mcp = &mc;
1650 port_database_t *pd;
1651 struct port_database_24xx *pd24;
1653 struct qla_hw_data *ha = vha->hw;
1655 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1656 "Entered %s.\n", __func__);
1659 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1661 ql_log(ql_log_warn, vha, 0x1050,
1662 "Failed to allocate port database structure.\n");
1663 return QLA_MEMORY_ALLOC_FAILED;
1665 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1667 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1668 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1669 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1670 mcp->mb[2] = MSW(pd_dma);
1671 mcp->mb[3] = LSW(pd_dma);
1672 mcp->mb[6] = MSW(MSD(pd_dma));
1673 mcp->mb[7] = LSW(MSD(pd_dma));
1674 mcp->mb[9] = vha->vp_idx;
1675 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1677 if (IS_FWI2_CAPABLE(ha)) {
1678 mcp->mb[1] = fcport->loop_id;
1680 mcp->out_mb |= MBX_10|MBX_1;
1681 mcp->in_mb |= MBX_1;
1682 } else if (HAS_EXTENDED_IDS(ha)) {
1683 mcp->mb[1] = fcport->loop_id;
1685 mcp->out_mb |= MBX_10|MBX_1;
1687 mcp->mb[1] = fcport->loop_id << 8 | opt;
1688 mcp->out_mb |= MBX_1;
1690 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1691 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1692 mcp->flags = MBX_DMA_IN;
1693 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1694 rval = qla2x00_mailbox_command(vha, mcp);
1695 if (rval != QLA_SUCCESS)
1698 if (IS_FWI2_CAPABLE(ha)) {
1700 pd24 = (struct port_database_24xx *) pd;
1702 /* Check for logged in state. */
1703 if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1704 pd24->last_login_state != PDS_PRLI_COMPLETE) {
1705 ql_dbg(ql_dbg_mbx, vha, 0x1051,
1706 "Unable to verify login-state (%x/%x) for "
1707 "loop_id %x.\n", pd24->current_login_state,
1708 pd24->last_login_state, fcport->loop_id);
1709 rval = QLA_FUNCTION_FAILED;
1713 if (fcport->loop_id == FC_NO_LOOP_ID ||
1714 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1715 memcmp(fcport->port_name, pd24->port_name, 8))) {
1716 /* We lost the device mid way. */
1717 rval = QLA_NOT_LOGGED_IN;
1721 /* Names are little-endian. */
1722 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1723 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1725 /* Get port_id of device. */
1726 fcport->d_id.b.domain = pd24->port_id[0];
1727 fcport->d_id.b.area = pd24->port_id[1];
1728 fcport->d_id.b.al_pa = pd24->port_id[2];
1729 fcport->d_id.b.rsvd_1 = 0;
1731 /* If not target must be initiator or unknown type. */
1732 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1733 fcport->port_type = FCT_INITIATOR;
1735 fcport->port_type = FCT_TARGET;
1737 /* Passback COS information. */
1738 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1739 FC_COS_CLASS2 : FC_COS_CLASS3;
1741 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1742 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1746 /* Check for logged in state. */
1747 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1748 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1749 ql_dbg(ql_dbg_mbx, vha, 0x100a,
1750 "Unable to verify login-state (%x/%x) - "
1751 "portid=%02x%02x%02x.\n", pd->master_state,
1752 pd->slave_state, fcport->d_id.b.domain,
1753 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1754 rval = QLA_FUNCTION_FAILED;
1758 if (fcport->loop_id == FC_NO_LOOP_ID ||
1759 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1760 memcmp(fcport->port_name, pd->port_name, 8))) {
1761 /* We lost the device mid way. */
1762 rval = QLA_NOT_LOGGED_IN;
1766 /* Names are little-endian. */
1767 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1768 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1770 /* Get port_id of device. */
1771 fcport->d_id.b.domain = pd->port_id[0];
1772 fcport->d_id.b.area = pd->port_id[3];
1773 fcport->d_id.b.al_pa = pd->port_id[2];
1774 fcport->d_id.b.rsvd_1 = 0;
1776 /* If not target must be initiator or unknown type. */
1777 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1778 fcport->port_type = FCT_INITIATOR;
1780 fcport->port_type = FCT_TARGET;
1782 /* Passback COS information. */
1783 fcport->supported_classes = (pd->options & BIT_4) ?
1784 FC_COS_CLASS2: FC_COS_CLASS3;
1788 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1790 if (rval != QLA_SUCCESS) {
1791 ql_dbg(ql_dbg_mbx, vha, 0x1052,
1792 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1793 mcp->mb[0], mcp->mb[1]);
1795 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1796 "Done %s.\n", __func__);
1803 * qla2x00_get_firmware_state
1804 * Get adapter firmware state.
1807 * ha = adapter block pointer.
1808 * dptr = pointer for firmware state.
1809 * TARGET_QUEUE_LOCK must be released.
1810 * ADAPTER_STATE_LOCK must be released.
1813 * qla2x00 local function return status code.
1819 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1823 mbx_cmd_t *mcp = &mc;
1825 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1826 "Entered %s.\n", __func__);
1828 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1829 mcp->out_mb = MBX_0;
1830 if (IS_FWI2_CAPABLE(vha->hw))
1831 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1833 mcp->in_mb = MBX_1|MBX_0;
1834 mcp->tov = MBX_TOV_SECONDS;
1836 rval = qla2x00_mailbox_command(vha, mcp);
1838 /* Return firmware states. */
1839 states[0] = mcp->mb[1];
1840 if (IS_FWI2_CAPABLE(vha->hw)) {
1841 states[1] = mcp->mb[2];
1842 states[2] = mcp->mb[3];
1843 states[3] = mcp->mb[4];
1844 states[4] = mcp->mb[5];
1845 states[5] = mcp->mb[6]; /* DPORT status */
1848 if (rval != QLA_SUCCESS) {
1850 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1853 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1854 "Done %s.\n", __func__);
1861 * qla2x00_get_port_name
1862 * Issue get port name mailbox command.
1863 * Returned name is in big endian format.
1866 * ha = adapter block pointer.
1867 * loop_id = loop ID of device.
1868 * name = pointer for name.
1869 * TARGET_QUEUE_LOCK must be released.
1870 * ADAPTER_STATE_LOCK must be released.
1873 * qla2x00 local function return status code.
1879 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1884 mbx_cmd_t *mcp = &mc;
1886 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1887 "Entered %s.\n", __func__);
1889 mcp->mb[0] = MBC_GET_PORT_NAME;
1890 mcp->mb[9] = vha->vp_idx;
1891 mcp->out_mb = MBX_9|MBX_1|MBX_0;
1892 if (HAS_EXTENDED_IDS(vha->hw)) {
1893 mcp->mb[1] = loop_id;
1895 mcp->out_mb |= MBX_10;
1897 mcp->mb[1] = loop_id << 8 | opt;
1900 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1901 mcp->tov = MBX_TOV_SECONDS;
1903 rval = qla2x00_mailbox_command(vha, mcp);
1905 if (rval != QLA_SUCCESS) {
1907 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1910 /* This function returns name in big endian. */
1911 name[0] = MSB(mcp->mb[2]);
1912 name[1] = LSB(mcp->mb[2]);
1913 name[2] = MSB(mcp->mb[3]);
1914 name[3] = LSB(mcp->mb[3]);
1915 name[4] = MSB(mcp->mb[6]);
1916 name[5] = LSB(mcp->mb[6]);
1917 name[6] = MSB(mcp->mb[7]);
1918 name[7] = LSB(mcp->mb[7]);
1921 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1922 "Done %s.\n", __func__);
1929 * qla24xx_link_initialization
1930 * Issue link initialization mailbox command.
1933 * ha = adapter block pointer.
1934 * TARGET_QUEUE_LOCK must be released.
1935 * ADAPTER_STATE_LOCK must be released.
1938 * qla2x00 local function return status code.
1944 qla24xx_link_initialize(scsi_qla_host_t *vha)
1948 mbx_cmd_t *mcp = &mc;
1950 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
1951 "Entered %s.\n", __func__);
1953 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
1954 return QLA_FUNCTION_FAILED;
1956 mcp->mb[0] = MBC_LINK_INITIALIZATION;
1958 if (vha->hw->operating_mode == LOOP)
1959 mcp->mb[1] |= BIT_6;
1961 mcp->mb[1] |= BIT_5;
1964 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1966 mcp->tov = MBX_TOV_SECONDS;
1968 rval = qla2x00_mailbox_command(vha, mcp);
1970 if (rval != QLA_SUCCESS) {
1971 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
1973 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
1974 "Done %s.\n", __func__);
1982 * Issue LIP reset mailbox command.
1985 * ha = adapter block pointer.
1986 * TARGET_QUEUE_LOCK must be released.
1987 * ADAPTER_STATE_LOCK must be released.
1990 * qla2x00 local function return status code.
1996 qla2x00_lip_reset(scsi_qla_host_t *vha)
2000 mbx_cmd_t *mcp = &mc;
2002 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
2003 "Entered %s.\n", __func__);
2005 if (IS_CNA_CAPABLE(vha->hw)) {
2006 /* Logout across all FCFs. */
2007 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2010 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2011 } else if (IS_FWI2_CAPABLE(vha->hw)) {
2012 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2015 mcp->mb[3] = vha->hw->loop_reset_delay;
2016 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2018 mcp->mb[0] = MBC_LIP_RESET;
2019 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2020 if (HAS_EXTENDED_IDS(vha->hw)) {
2021 mcp->mb[1] = 0x00ff;
2023 mcp->out_mb |= MBX_10;
2025 mcp->mb[1] = 0xff00;
2027 mcp->mb[2] = vha->hw->loop_reset_delay;
2031 mcp->tov = MBX_TOV_SECONDS;
2033 rval = qla2x00_mailbox_command(vha, mcp);
2035 if (rval != QLA_SUCCESS) {
2037 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
2040 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
2041 "Done %s.\n", __func__);
2052 * ha = adapter block pointer.
2053 * sns = pointer for command.
2054 * cmd_size = command size.
2055 * buf_size = response/command size.
2056 * TARGET_QUEUE_LOCK must be released.
2057 * ADAPTER_STATE_LOCK must be released.
2060 * qla2x00 local function return status code.
2066 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
2067 uint16_t cmd_size, size_t buf_size)
2071 mbx_cmd_t *mcp = &mc;
2073 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
2074 "Entered %s.\n", __func__);
2076 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
2077 "Retry cnt=%d ratov=%d total tov=%d.\n",
2078 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
2080 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
2081 mcp->mb[1] = cmd_size;
2082 mcp->mb[2] = MSW(sns_phys_address);
2083 mcp->mb[3] = LSW(sns_phys_address);
2084 mcp->mb[6] = MSW(MSD(sns_phys_address));
2085 mcp->mb[7] = LSW(MSD(sns_phys_address));
2086 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2087 mcp->in_mb = MBX_0|MBX_1;
2088 mcp->buf_size = buf_size;
2089 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
2090 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
2091 rval = qla2x00_mailbox_command(vha, mcp);
2093 if (rval != QLA_SUCCESS) {
2095 ql_dbg(ql_dbg_mbx, vha, 0x105f,
2096 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2097 rval, mcp->mb[0], mcp->mb[1]);
2100 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
2101 "Done %s.\n", __func__);
2108 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2109 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2113 struct logio_entry_24xx *lg;
2116 struct qla_hw_data *ha = vha->hw;
2117 struct req_que *req;
2119 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
2120 "Entered %s.\n", __func__);
2122 if (ha->flags.cpu_affinity_enabled)
2123 req = ha->req_q_map[0];
2127 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2129 ql_log(ql_log_warn, vha, 0x1062,
2130 "Failed to allocate login IOCB.\n");
2131 return QLA_MEMORY_ALLOC_FAILED;
2133 memset(lg, 0, sizeof(struct logio_entry_24xx));
2135 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2136 lg->entry_count = 1;
2137 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2138 lg->nport_handle = cpu_to_le16(loop_id);
2139 lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
2141 lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
2143 lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
2144 lg->port_id[0] = al_pa;
2145 lg->port_id[1] = area;
2146 lg->port_id[2] = domain;
2147 lg->vp_index = vha->vp_idx;
2148 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2149 (ha->r_a_tov / 10 * 2) + 2);
2150 if (rval != QLA_SUCCESS) {
2151 ql_dbg(ql_dbg_mbx, vha, 0x1063,
2152 "Failed to issue login IOCB (%x).\n", rval);
2153 } else if (lg->entry_status != 0) {
2154 ql_dbg(ql_dbg_mbx, vha, 0x1064,
2155 "Failed to complete IOCB -- error status (%x).\n",
2157 rval = QLA_FUNCTION_FAILED;
2158 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2159 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2160 iop[1] = le32_to_cpu(lg->io_parameter[1]);
2162 ql_dbg(ql_dbg_mbx, vha, 0x1065,
2163 "Failed to complete IOCB -- completion status (%x) "
2164 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2168 case LSC_SCODE_PORTID_USED:
2169 mb[0] = MBS_PORT_ID_USED;
2170 mb[1] = LSW(iop[1]);
2172 case LSC_SCODE_NPORT_USED:
2173 mb[0] = MBS_LOOP_ID_USED;
2175 case LSC_SCODE_NOLINK:
2176 case LSC_SCODE_NOIOCB:
2177 case LSC_SCODE_NOXCB:
2178 case LSC_SCODE_CMD_FAILED:
2179 case LSC_SCODE_NOFABRIC:
2180 case LSC_SCODE_FW_NOT_READY:
2181 case LSC_SCODE_NOT_LOGGED_IN:
2182 case LSC_SCODE_NOPCB:
2183 case LSC_SCODE_ELS_REJECT:
2184 case LSC_SCODE_CMD_PARAM_ERR:
2185 case LSC_SCODE_NONPORT:
2186 case LSC_SCODE_LOGGED_IN:
2187 case LSC_SCODE_NOFLOGI_ACC:
2189 mb[0] = MBS_COMMAND_ERROR;
2193 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
2194 "Done %s.\n", __func__);
2196 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2198 mb[0] = MBS_COMMAND_COMPLETE;
2200 if (iop[0] & BIT_4) {
2206 /* Passback COS information. */
2208 if (lg->io_parameter[7] || lg->io_parameter[8])
2209 mb[10] |= BIT_0; /* Class 2. */
2210 if (lg->io_parameter[9] || lg->io_parameter[10])
2211 mb[10] |= BIT_1; /* Class 3. */
2212 if (lg->io_parameter[0] & cpu_to_le32(BIT_7))
2213 mb[10] |= BIT_7; /* Confirmed Completion
2218 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2224 * qla2x00_login_fabric
2225 * Issue login fabric port mailbox command.
2228 * ha = adapter block pointer.
2229 * loop_id = device loop ID.
2230 * domain = device domain.
2231 * area = device area.
2232 * al_pa = device AL_PA.
2233 * status = pointer for return status.
2234 * opt = command options.
2235 * TARGET_QUEUE_LOCK must be released.
2236 * ADAPTER_STATE_LOCK must be released.
2239 * qla2x00 local function return status code.
2245 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2246 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2250 mbx_cmd_t *mcp = &mc;
2251 struct qla_hw_data *ha = vha->hw;
2253 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
2254 "Entered %s.\n", __func__);
2256 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
2257 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2258 if (HAS_EXTENDED_IDS(ha)) {
2259 mcp->mb[1] = loop_id;
2261 mcp->out_mb |= MBX_10;
2263 mcp->mb[1] = (loop_id << 8) | opt;
2265 mcp->mb[2] = domain;
2266 mcp->mb[3] = area << 8 | al_pa;
2268 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
2269 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2271 rval = qla2x00_mailbox_command(vha, mcp);
2273 /* Return mailbox statuses. */
2280 /* COS retrieved from Get-Port-Database mailbox command. */
2284 if (rval != QLA_SUCCESS) {
2285 /* RLU tmp code: need to change main mailbox_command function to
2286 * return ok even when the mailbox completion value is not
2287 * SUCCESS. The caller needs to be responsible to interpret
2288 * the return values of this mailbox command if we're not
2289 * to change too much of the existing code.
2291 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2292 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2293 mcp->mb[0] == 0x4006)
2297 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2298 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2299 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2302 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2303 "Done %s.\n", __func__);
2310 * qla2x00_login_local_device
2311 * Issue login loop port mailbox command.
2314 * ha = adapter block pointer.
2315 * loop_id = device loop ID.
2316 * opt = command options.
2319 * Return status code.
2326 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2327 uint16_t *mb_ret, uint8_t opt)
2331 mbx_cmd_t *mcp = &mc;
2332 struct qla_hw_data *ha = vha->hw;
2334 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2335 "Entered %s.\n", __func__);
2337 if (IS_FWI2_CAPABLE(ha))
2338 return qla24xx_login_fabric(vha, fcport->loop_id,
2339 fcport->d_id.b.domain, fcport->d_id.b.area,
2340 fcport->d_id.b.al_pa, mb_ret, opt);
2342 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2343 if (HAS_EXTENDED_IDS(ha))
2344 mcp->mb[1] = fcport->loop_id;
2346 mcp->mb[1] = fcport->loop_id << 8;
2348 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2349 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2350 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2352 rval = qla2x00_mailbox_command(vha, mcp);
2354 /* Return mailbox statuses. */
2355 if (mb_ret != NULL) {
2356 mb_ret[0] = mcp->mb[0];
2357 mb_ret[1] = mcp->mb[1];
2358 mb_ret[6] = mcp->mb[6];
2359 mb_ret[7] = mcp->mb[7];
2362 if (rval != QLA_SUCCESS) {
2363 /* AV tmp code: need to change main mailbox_command function to
2364 * return ok even when the mailbox completion value is not
2365 * SUCCESS. The caller needs to be responsible to interpret
2366 * the return values of this mailbox command if we're not
2367 * to change too much of the existing code.
2369 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2372 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2373 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2374 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2377 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2378 "Done %s.\n", __func__);
2385 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2386 uint8_t area, uint8_t al_pa)
2389 struct logio_entry_24xx *lg;
2391 struct qla_hw_data *ha = vha->hw;
2392 struct req_que *req;
2394 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2395 "Entered %s.\n", __func__);
2397 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2399 ql_log(ql_log_warn, vha, 0x106e,
2400 "Failed to allocate logout IOCB.\n");
2401 return QLA_MEMORY_ALLOC_FAILED;
2403 memset(lg, 0, sizeof(struct logio_entry_24xx));
2405 if (ql2xmaxqueues > 1)
2406 req = ha->req_q_map[0];
2409 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2410 lg->entry_count = 1;
2411 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2412 lg->nport_handle = cpu_to_le16(loop_id);
2414 cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2416 lg->port_id[0] = al_pa;
2417 lg->port_id[1] = area;
2418 lg->port_id[2] = domain;
2419 lg->vp_index = vha->vp_idx;
2420 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2421 (ha->r_a_tov / 10 * 2) + 2);
2422 if (rval != QLA_SUCCESS) {
2423 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2424 "Failed to issue logout IOCB (%x).\n", rval);
2425 } else if (lg->entry_status != 0) {
2426 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2427 "Failed to complete IOCB -- error status (%x).\n",
2429 rval = QLA_FUNCTION_FAILED;
2430 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2431 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2432 "Failed to complete IOCB -- completion status (%x) "
2433 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2434 le32_to_cpu(lg->io_parameter[0]),
2435 le32_to_cpu(lg->io_parameter[1]));
2438 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2439 "Done %s.\n", __func__);
2442 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2448 * qla2x00_fabric_logout
2449 * Issue logout fabric port mailbox command.
2452 * ha = adapter block pointer.
2453 * loop_id = device loop ID.
2454 * TARGET_QUEUE_LOCK must be released.
2455 * ADAPTER_STATE_LOCK must be released.
2458 * qla2x00 local function return status code.
2464 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2465 uint8_t area, uint8_t al_pa)
2469 mbx_cmd_t *mcp = &mc;
2471 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2472 "Entered %s.\n", __func__);
2474 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2475 mcp->out_mb = MBX_1|MBX_0;
2476 if (HAS_EXTENDED_IDS(vha->hw)) {
2477 mcp->mb[1] = loop_id;
2479 mcp->out_mb |= MBX_10;
2481 mcp->mb[1] = loop_id << 8;
2484 mcp->in_mb = MBX_1|MBX_0;
2485 mcp->tov = MBX_TOV_SECONDS;
2487 rval = qla2x00_mailbox_command(vha, mcp);
2489 if (rval != QLA_SUCCESS) {
2491 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2492 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2495 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2496 "Done %s.\n", __func__);
2503 * qla2x00_full_login_lip
2504 * Issue full login LIP mailbox command.
2507 * ha = adapter block pointer.
2508 * TARGET_QUEUE_LOCK must be released.
2509 * ADAPTER_STATE_LOCK must be released.
2512 * qla2x00 local function return status code.
2518 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2522 mbx_cmd_t *mcp = &mc;
2524 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2525 "Entered %s.\n", __func__);
2527 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2528 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2531 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2533 mcp->tov = MBX_TOV_SECONDS;
2535 rval = qla2x00_mailbox_command(vha, mcp);
2537 if (rval != QLA_SUCCESS) {
2539 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2542 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2543 "Done %s.\n", __func__);
2550 * qla2x00_get_id_list
2553 * ha = adapter block pointer.
2556 * qla2x00 local function return status code.
2562 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2567 mbx_cmd_t *mcp = &mc;
2569 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2570 "Entered %s.\n", __func__);
2572 if (id_list == NULL)
2573 return QLA_FUNCTION_FAILED;
2575 mcp->mb[0] = MBC_GET_ID_LIST;
2576 mcp->out_mb = MBX_0;
2577 if (IS_FWI2_CAPABLE(vha->hw)) {
2578 mcp->mb[2] = MSW(id_list_dma);
2579 mcp->mb[3] = LSW(id_list_dma);
2580 mcp->mb[6] = MSW(MSD(id_list_dma));
2581 mcp->mb[7] = LSW(MSD(id_list_dma));
2583 mcp->mb[9] = vha->vp_idx;
2584 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2586 mcp->mb[1] = MSW(id_list_dma);
2587 mcp->mb[2] = LSW(id_list_dma);
2588 mcp->mb[3] = MSW(MSD(id_list_dma));
2589 mcp->mb[6] = LSW(MSD(id_list_dma));
2590 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2592 mcp->in_mb = MBX_1|MBX_0;
2593 mcp->tov = MBX_TOV_SECONDS;
2595 rval = qla2x00_mailbox_command(vha, mcp);
2597 if (rval != QLA_SUCCESS) {
2599 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2601 *entries = mcp->mb[1];
2602 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2603 "Done %s.\n", __func__);
2610 * qla2x00_get_resource_cnts
2611 * Get current firmware resource counts.
2614 * ha = adapter block pointer.
2617 * qla2x00 local function return status code.
2623 qla2x00_get_resource_cnts(scsi_qla_host_t *vha)
2625 struct qla_hw_data *ha = vha->hw;
2628 mbx_cmd_t *mcp = &mc;
2630 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2631 "Entered %s.\n", __func__);
2633 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2634 mcp->out_mb = MBX_0;
2635 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2636 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw))
2637 mcp->in_mb |= MBX_12;
2638 mcp->tov = MBX_TOV_SECONDS;
2640 rval = qla2x00_mailbox_command(vha, mcp);
2642 if (rval != QLA_SUCCESS) {
2644 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2645 "Failed mb[0]=%x.\n", mcp->mb[0]);
2647 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2648 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2649 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2650 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2651 mcp->mb[11], mcp->mb[12]);
2653 ha->orig_fw_tgt_xcb_count = mcp->mb[1];
2654 ha->cur_fw_tgt_xcb_count = mcp->mb[2];
2655 ha->cur_fw_xcb_count = mcp->mb[3];
2656 ha->orig_fw_xcb_count = mcp->mb[6];
2657 ha->cur_fw_iocb_count = mcp->mb[7];
2658 ha->orig_fw_iocb_count = mcp->mb[10];
2659 if (ha->flags.npiv_supported)
2660 ha->max_npiv_vports = mcp->mb[11];
2661 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
2662 ha->fw_max_fcf_count = mcp->mb[12];
2669 * qla2x00_get_fcal_position_map
2670 * Get FCAL (LILP) position map using mailbox command
2673 * ha = adapter state pointer.
2674 * pos_map = buffer pointer (can be NULL).
2677 * qla2x00 local function return status code.
2683 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2687 mbx_cmd_t *mcp = &mc;
2689 dma_addr_t pmap_dma;
2690 struct qla_hw_data *ha = vha->hw;
2692 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2693 "Entered %s.\n", __func__);
2695 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2697 ql_log(ql_log_warn, vha, 0x1080,
2698 "Memory alloc failed.\n");
2699 return QLA_MEMORY_ALLOC_FAILED;
2701 memset(pmap, 0, FCAL_MAP_SIZE);
2703 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2704 mcp->mb[2] = MSW(pmap_dma);
2705 mcp->mb[3] = LSW(pmap_dma);
2706 mcp->mb[6] = MSW(MSD(pmap_dma));
2707 mcp->mb[7] = LSW(MSD(pmap_dma));
2708 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2709 mcp->in_mb = MBX_1|MBX_0;
2710 mcp->buf_size = FCAL_MAP_SIZE;
2711 mcp->flags = MBX_DMA_IN;
2712 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2713 rval = qla2x00_mailbox_command(vha, mcp);
2715 if (rval == QLA_SUCCESS) {
2716 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2717 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2718 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2719 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2723 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2725 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2727 if (rval != QLA_SUCCESS) {
2728 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2730 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2731 "Done %s.\n", __func__);
2738 * qla2x00_get_link_status
2741 * ha = adapter block pointer.
2742 * loop_id = device loop ID.
2743 * ret_buf = pointer to link status return buffer.
2747 * BIT_0 = mem alloc error.
2748 * BIT_1 = mailbox error.
2751 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2752 struct link_statistics *stats, dma_addr_t stats_dma)
2756 mbx_cmd_t *mcp = &mc;
2757 uint32_t *siter, *diter, dwords;
2758 struct qla_hw_data *ha = vha->hw;
2760 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2761 "Entered %s.\n", __func__);
2763 mcp->mb[0] = MBC_GET_LINK_STATUS;
2764 mcp->mb[2] = MSW(stats_dma);
2765 mcp->mb[3] = LSW(stats_dma);
2766 mcp->mb[6] = MSW(MSD(stats_dma));
2767 mcp->mb[7] = LSW(MSD(stats_dma));
2768 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2770 if (IS_FWI2_CAPABLE(ha)) {
2771 mcp->mb[1] = loop_id;
2774 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2775 mcp->in_mb |= MBX_1;
2776 } else if (HAS_EXTENDED_IDS(ha)) {
2777 mcp->mb[1] = loop_id;
2779 mcp->out_mb |= MBX_10|MBX_1;
2781 mcp->mb[1] = loop_id << 8;
2782 mcp->out_mb |= MBX_1;
2784 mcp->tov = MBX_TOV_SECONDS;
2785 mcp->flags = IOCTL_CMD;
2786 rval = qla2x00_mailbox_command(vha, mcp);
2788 if (rval == QLA_SUCCESS) {
2789 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2790 ql_dbg(ql_dbg_mbx, vha, 0x1085,
2791 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2792 rval = QLA_FUNCTION_FAILED;
2794 /* Copy over data -- firmware data is LE. */
2795 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2796 "Done %s.\n", __func__);
2797 dwords = offsetof(struct link_statistics, unused1) / 4;
2798 siter = diter = &stats->link_fail_cnt;
2800 *diter++ = le32_to_cpu(*siter++);
2804 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2811 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2812 dma_addr_t stats_dma)
2816 mbx_cmd_t *mcp = &mc;
2817 uint32_t *siter, *diter, dwords;
2819 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2820 "Entered %s.\n", __func__);
2822 mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2823 mcp->mb[2] = MSW(stats_dma);
2824 mcp->mb[3] = LSW(stats_dma);
2825 mcp->mb[6] = MSW(MSD(stats_dma));
2826 mcp->mb[7] = LSW(MSD(stats_dma));
2827 mcp->mb[8] = sizeof(struct link_statistics) / 4;
2828 mcp->mb[9] = vha->vp_idx;
2830 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2831 mcp->in_mb = MBX_2|MBX_1|MBX_0;
2832 mcp->tov = MBX_TOV_SECONDS;
2833 mcp->flags = IOCTL_CMD;
2834 rval = qla2x00_mailbox_command(vha, mcp);
2836 if (rval == QLA_SUCCESS) {
2837 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2838 ql_dbg(ql_dbg_mbx, vha, 0x1089,
2839 "Failed mb[0]=%x.\n", mcp->mb[0]);
2840 rval = QLA_FUNCTION_FAILED;
2842 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2843 "Done %s.\n", __func__);
2844 /* Copy over data -- firmware data is LE. */
2845 dwords = sizeof(struct link_statistics) / 4;
2846 siter = diter = &stats->link_fail_cnt;
2848 *diter++ = le32_to_cpu(*siter++);
2852 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2859 qla24xx_abort_command(srb_t *sp)
2862 unsigned long flags = 0;
2864 struct abort_entry_24xx *abt;
2867 fc_port_t *fcport = sp->fcport;
2868 struct scsi_qla_host *vha = fcport->vha;
2869 struct qla_hw_data *ha = vha->hw;
2870 struct req_que *req = vha->req;
2872 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2873 "Entered %s.\n", __func__);
2875 if (ql2xasynctmfenable)
2876 return qla24xx_async_abort_command(sp);
2878 spin_lock_irqsave(&ha->hardware_lock, flags);
2879 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2880 if (req->outstanding_cmds[handle] == sp)
2883 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2884 if (handle == req->num_outstanding_cmds) {
2885 /* Command not found. */
2886 return QLA_FUNCTION_FAILED;
2889 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2891 ql_log(ql_log_warn, vha, 0x108d,
2892 "Failed to allocate abort IOCB.\n");
2893 return QLA_MEMORY_ALLOC_FAILED;
2895 memset(abt, 0, sizeof(struct abort_entry_24xx));
2897 abt->entry_type = ABORT_IOCB_TYPE;
2898 abt->entry_count = 1;
2899 abt->handle = MAKE_HANDLE(req->id, abt->handle);
2900 abt->nport_handle = cpu_to_le16(fcport->loop_id);
2901 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2902 abt->port_id[0] = fcport->d_id.b.al_pa;
2903 abt->port_id[1] = fcport->d_id.b.area;
2904 abt->port_id[2] = fcport->d_id.b.domain;
2905 abt->vp_index = fcport->vha->vp_idx;
2907 abt->req_que_no = cpu_to_le16(req->id);
2909 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2910 if (rval != QLA_SUCCESS) {
2911 ql_dbg(ql_dbg_mbx, vha, 0x108e,
2912 "Failed to issue IOCB (%x).\n", rval);
2913 } else if (abt->entry_status != 0) {
2914 ql_dbg(ql_dbg_mbx, vha, 0x108f,
2915 "Failed to complete IOCB -- error status (%x).\n",
2917 rval = QLA_FUNCTION_FAILED;
2918 } else if (abt->nport_handle != cpu_to_le16(0)) {
2919 ql_dbg(ql_dbg_mbx, vha, 0x1090,
2920 "Failed to complete IOCB -- completion status (%x).\n",
2921 le16_to_cpu(abt->nport_handle));
2922 if (abt->nport_handle == CS_IOCB_ERROR)
2923 rval = QLA_FUNCTION_PARAMETER_ERROR;
2925 rval = QLA_FUNCTION_FAILED;
2927 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2928 "Done %s.\n", __func__);
2931 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2936 struct tsk_mgmt_cmd {
2938 struct tsk_mgmt_entry tsk;
2939 struct sts_entry_24xx sts;
2944 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2945 uint64_t l, int tag)
2948 struct tsk_mgmt_cmd *tsk;
2949 struct sts_entry_24xx *sts;
2951 scsi_qla_host_t *vha;
2952 struct qla_hw_data *ha;
2953 struct req_que *req;
2954 struct rsp_que *rsp;
2960 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2961 "Entered %s.\n", __func__);
2963 if (ha->flags.cpu_affinity_enabled)
2964 rsp = ha->rsp_q_map[tag + 1];
2967 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
2969 ql_log(ql_log_warn, vha, 0x1093,
2970 "Failed to allocate task management IOCB.\n");
2971 return QLA_MEMORY_ALLOC_FAILED;
2973 memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
2975 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
2976 tsk->p.tsk.entry_count = 1;
2977 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
2978 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
2979 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
2980 tsk->p.tsk.control_flags = cpu_to_le32(type);
2981 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
2982 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
2983 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
2984 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
2985 if (type == TCF_LUN_RESET) {
2986 int_to_scsilun(l, &tsk->p.tsk.lun);
2987 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
2988 sizeof(tsk->p.tsk.lun));
2992 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
2993 if (rval != QLA_SUCCESS) {
2994 ql_dbg(ql_dbg_mbx, vha, 0x1094,
2995 "Failed to issue %s reset IOCB (%x).\n", name, rval);
2996 } else if (sts->entry_status != 0) {
2997 ql_dbg(ql_dbg_mbx, vha, 0x1095,
2998 "Failed to complete IOCB -- error status (%x).\n",
3000 rval = QLA_FUNCTION_FAILED;
3001 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
3002 ql_dbg(ql_dbg_mbx, vha, 0x1096,
3003 "Failed to complete IOCB -- completion status (%x).\n",
3004 le16_to_cpu(sts->comp_status));
3005 rval = QLA_FUNCTION_FAILED;
3006 } else if (le16_to_cpu(sts->scsi_status) &
3007 SS_RESPONSE_INFO_LEN_VALID) {
3008 if (le32_to_cpu(sts->rsp_data_len) < 4) {
3009 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
3010 "Ignoring inconsistent data length -- not enough "
3011 "response info (%d).\n",
3012 le32_to_cpu(sts->rsp_data_len));
3013 } else if (sts->data[3]) {
3014 ql_dbg(ql_dbg_mbx, vha, 0x1098,
3015 "Failed to complete IOCB -- response (%x).\n",
3017 rval = QLA_FUNCTION_FAILED;
3021 /* Issue marker IOCB. */
3022 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
3023 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
3024 if (rval2 != QLA_SUCCESS) {
3025 ql_dbg(ql_dbg_mbx, vha, 0x1099,
3026 "Failed to issue marker IOCB (%x).\n", rval2);
3028 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
3029 "Done %s.\n", __func__);
3032 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
3038 qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
3040 struct qla_hw_data *ha = fcport->vha->hw;
3042 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3043 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
3045 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
3049 qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
3051 struct qla_hw_data *ha = fcport->vha->hw;
3053 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3054 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
3056 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
3060 qla2x00_system_error(scsi_qla_host_t *vha)
3064 mbx_cmd_t *mcp = &mc;
3065 struct qla_hw_data *ha = vha->hw;
3067 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
3068 return QLA_FUNCTION_FAILED;
3070 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
3071 "Entered %s.\n", __func__);
3073 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
3074 mcp->out_mb = MBX_0;
3078 rval = qla2x00_mailbox_command(vha, mcp);
3080 if (rval != QLA_SUCCESS) {
3081 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
3083 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
3084 "Done %s.\n", __func__);
3091 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
3095 mbx_cmd_t *mcp = &mc;
3097 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3098 !IS_QLA27XX(vha->hw))
3099 return QLA_FUNCTION_FAILED;
3101 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
3102 "Entered %s.\n", __func__);
3104 mcp->mb[0] = MBC_WRITE_SERDES;
3106 if (IS_QLA2031(vha->hw))
3107 mcp->mb[2] = data & 0xff;
3112 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
3114 mcp->tov = MBX_TOV_SECONDS;
3116 rval = qla2x00_mailbox_command(vha, mcp);
3118 if (rval != QLA_SUCCESS) {
3119 ql_dbg(ql_dbg_mbx, vha, 0x1183,
3120 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3122 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
3123 "Done %s.\n", __func__);
3130 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
3134 mbx_cmd_t *mcp = &mc;
3136 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3137 !IS_QLA27XX(vha->hw))
3138 return QLA_FUNCTION_FAILED;
3140 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
3141 "Entered %s.\n", __func__);
3143 mcp->mb[0] = MBC_READ_SERDES;
3146 mcp->out_mb = MBX_3|MBX_1|MBX_0;
3147 mcp->in_mb = MBX_1|MBX_0;
3148 mcp->tov = MBX_TOV_SECONDS;
3150 rval = qla2x00_mailbox_command(vha, mcp);
3152 if (IS_QLA2031(vha->hw))
3153 *data = mcp->mb[1] & 0xff;
3157 if (rval != QLA_SUCCESS) {
3158 ql_dbg(ql_dbg_mbx, vha, 0x1186,
3159 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3161 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
3162 "Done %s.\n", __func__);
3169 qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
3173 mbx_cmd_t *mcp = &mc;
3175 if (!IS_QLA8044(vha->hw))
3176 return QLA_FUNCTION_FAILED;
3178 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1186,
3179 "Entered %s.\n", __func__);
3181 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3182 mcp->mb[1] = HCS_WRITE_SERDES;
3183 mcp->mb[3] = LSW(addr);
3184 mcp->mb[4] = MSW(addr);
3185 mcp->mb[5] = LSW(data);
3186 mcp->mb[6] = MSW(data);
3187 mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
3189 mcp->tov = MBX_TOV_SECONDS;
3191 rval = qla2x00_mailbox_command(vha, mcp);
3193 if (rval != QLA_SUCCESS) {
3194 ql_dbg(ql_dbg_mbx, vha, 0x1187,
3195 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3197 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
3198 "Done %s.\n", __func__);
3205 qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
3209 mbx_cmd_t *mcp = &mc;
3211 if (!IS_QLA8044(vha->hw))
3212 return QLA_FUNCTION_FAILED;
3214 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
3215 "Entered %s.\n", __func__);
3217 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3218 mcp->mb[1] = HCS_READ_SERDES;
3219 mcp->mb[3] = LSW(addr);
3220 mcp->mb[4] = MSW(addr);
3221 mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
3222 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3223 mcp->tov = MBX_TOV_SECONDS;
3225 rval = qla2x00_mailbox_command(vha, mcp);
3227 *data = mcp->mb[2] << 16 | mcp->mb[1];
3229 if (rval != QLA_SUCCESS) {
3230 ql_dbg(ql_dbg_mbx, vha, 0x118a,
3231 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3233 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
3234 "Done %s.\n", __func__);
3241 * qla2x00_set_serdes_params() -
3247 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3248 uint16_t sw_em_2g, uint16_t sw_em_4g)
3252 mbx_cmd_t *mcp = &mc;
3254 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
3255 "Entered %s.\n", __func__);
3257 mcp->mb[0] = MBC_SERDES_PARAMS;
3259 mcp->mb[2] = sw_em_1g | BIT_15;
3260 mcp->mb[3] = sw_em_2g | BIT_15;
3261 mcp->mb[4] = sw_em_4g | BIT_15;
3262 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3264 mcp->tov = MBX_TOV_SECONDS;
3266 rval = qla2x00_mailbox_command(vha, mcp);
3268 if (rval != QLA_SUCCESS) {
3270 ql_dbg(ql_dbg_mbx, vha, 0x109f,
3271 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3274 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
3275 "Done %s.\n", __func__);
3282 qla2x00_stop_firmware(scsi_qla_host_t *vha)
3286 mbx_cmd_t *mcp = &mc;
3288 if (!IS_FWI2_CAPABLE(vha->hw))
3289 return QLA_FUNCTION_FAILED;
3291 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
3292 "Entered %s.\n", __func__);
3294 mcp->mb[0] = MBC_STOP_FIRMWARE;
3296 mcp->out_mb = MBX_1|MBX_0;
3300 rval = qla2x00_mailbox_command(vha, mcp);
3302 if (rval != QLA_SUCCESS) {
3303 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3304 if (mcp->mb[0] == MBS_INVALID_COMMAND)
3305 rval = QLA_INVALID_COMMAND;
3307 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
3308 "Done %s.\n", __func__);
3315 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3320 mbx_cmd_t *mcp = &mc;
3322 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
3323 "Entered %s.\n", __func__);
3325 if (!IS_FWI2_CAPABLE(vha->hw))
3326 return QLA_FUNCTION_FAILED;
3328 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3329 return QLA_FUNCTION_FAILED;
3331 mcp->mb[0] = MBC_TRACE_CONTROL;
3332 mcp->mb[1] = TC_EFT_ENABLE;
3333 mcp->mb[2] = LSW(eft_dma);
3334 mcp->mb[3] = MSW(eft_dma);
3335 mcp->mb[4] = LSW(MSD(eft_dma));
3336 mcp->mb[5] = MSW(MSD(eft_dma));
3337 mcp->mb[6] = buffers;
3338 mcp->mb[7] = TC_AEN_DISABLE;
3339 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3340 mcp->in_mb = MBX_1|MBX_0;
3341 mcp->tov = MBX_TOV_SECONDS;
3343 rval = qla2x00_mailbox_command(vha, mcp);
3344 if (rval != QLA_SUCCESS) {
3345 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
3346 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3347 rval, mcp->mb[0], mcp->mb[1]);
3349 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
3350 "Done %s.\n", __func__);
3357 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3361 mbx_cmd_t *mcp = &mc;
3363 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
3364 "Entered %s.\n", __func__);
3366 if (!IS_FWI2_CAPABLE(vha->hw))
3367 return QLA_FUNCTION_FAILED;
3369 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3370 return QLA_FUNCTION_FAILED;
3372 mcp->mb[0] = MBC_TRACE_CONTROL;
3373 mcp->mb[1] = TC_EFT_DISABLE;
3374 mcp->out_mb = MBX_1|MBX_0;
3375 mcp->in_mb = MBX_1|MBX_0;
3376 mcp->tov = MBX_TOV_SECONDS;
3378 rval = qla2x00_mailbox_command(vha, mcp);
3379 if (rval != QLA_SUCCESS) {
3380 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3381 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3382 rval, mcp->mb[0], mcp->mb[1]);
3384 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3385 "Done %s.\n", __func__);
3392 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3393 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3397 mbx_cmd_t *mcp = &mc;
3399 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3400 "Entered %s.\n", __func__);
3402 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3403 !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
3404 return QLA_FUNCTION_FAILED;
3406 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3407 return QLA_FUNCTION_FAILED;
3409 mcp->mb[0] = MBC_TRACE_CONTROL;
3410 mcp->mb[1] = TC_FCE_ENABLE;
3411 mcp->mb[2] = LSW(fce_dma);
3412 mcp->mb[3] = MSW(fce_dma);
3413 mcp->mb[4] = LSW(MSD(fce_dma));
3414 mcp->mb[5] = MSW(MSD(fce_dma));
3415 mcp->mb[6] = buffers;
3416 mcp->mb[7] = TC_AEN_DISABLE;
3418 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3419 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3420 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3422 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3423 mcp->tov = MBX_TOV_SECONDS;
3425 rval = qla2x00_mailbox_command(vha, mcp);
3426 if (rval != QLA_SUCCESS) {
3427 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3428 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3429 rval, mcp->mb[0], mcp->mb[1]);
3431 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3432 "Done %s.\n", __func__);
3435 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3444 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3448 mbx_cmd_t *mcp = &mc;
3450 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3451 "Entered %s.\n", __func__);
3453 if (!IS_FWI2_CAPABLE(vha->hw))
3454 return QLA_FUNCTION_FAILED;
3456 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3457 return QLA_FUNCTION_FAILED;
3459 mcp->mb[0] = MBC_TRACE_CONTROL;
3460 mcp->mb[1] = TC_FCE_DISABLE;
3461 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3462 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3463 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3465 mcp->tov = MBX_TOV_SECONDS;
3467 rval = qla2x00_mailbox_command(vha, mcp);
3468 if (rval != QLA_SUCCESS) {
3469 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3470 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3471 rval, mcp->mb[0], mcp->mb[1]);
3473 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3474 "Done %s.\n", __func__);
3477 *wr = (uint64_t) mcp->mb[5] << 48 |
3478 (uint64_t) mcp->mb[4] << 32 |
3479 (uint64_t) mcp->mb[3] << 16 |
3480 (uint64_t) mcp->mb[2];
3482 *rd = (uint64_t) mcp->mb[9] << 48 |
3483 (uint64_t) mcp->mb[8] << 32 |
3484 (uint64_t) mcp->mb[7] << 16 |
3485 (uint64_t) mcp->mb[6];
3492 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3493 uint16_t *port_speed, uint16_t *mb)
3497 mbx_cmd_t *mcp = &mc;
3499 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3500 "Entered %s.\n", __func__);
3502 if (!IS_IIDMA_CAPABLE(vha->hw))
3503 return QLA_FUNCTION_FAILED;
3505 mcp->mb[0] = MBC_PORT_PARAMS;
3506 mcp->mb[1] = loop_id;
3507 mcp->mb[2] = mcp->mb[3] = 0;
3508 mcp->mb[9] = vha->vp_idx;
3509 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3510 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3511 mcp->tov = MBX_TOV_SECONDS;
3513 rval = qla2x00_mailbox_command(vha, mcp);
3515 /* Return mailbox statuses. */
3522 if (rval != QLA_SUCCESS) {
3523 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3525 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3526 "Done %s.\n", __func__);
3528 *port_speed = mcp->mb[3];
3535 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3536 uint16_t port_speed, uint16_t *mb)
3540 mbx_cmd_t *mcp = &mc;
3542 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3543 "Entered %s.\n", __func__);
3545 if (!IS_IIDMA_CAPABLE(vha->hw))
3546 return QLA_FUNCTION_FAILED;
3548 mcp->mb[0] = MBC_PORT_PARAMS;
3549 mcp->mb[1] = loop_id;
3551 if (IS_CNA_CAPABLE(vha->hw))
3552 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3554 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
3555 mcp->mb[9] = vha->vp_idx;
3556 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3557 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3558 mcp->tov = MBX_TOV_SECONDS;
3560 rval = qla2x00_mailbox_command(vha, mcp);
3562 /* Return mailbox statuses. */
3569 if (rval != QLA_SUCCESS) {
3570 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3571 "Failed=%x.\n", rval);
3573 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3574 "Done %s.\n", __func__);
3581 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3582 struct vp_rpt_id_entry_24xx *rptid_entry)
3585 uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3586 struct qla_hw_data *ha = vha->hw;
3587 scsi_qla_host_t *vp;
3588 unsigned long flags;
3591 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3592 "Entered %s.\n", __func__);
3594 if (rptid_entry->entry_status != 0)
3597 if (rptid_entry->format == 0) {
3598 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3599 "Format 0 : Number of VPs setup %d, number of "
3600 "VPs acquired %d.\n",
3601 MSB(le16_to_cpu(rptid_entry->vp_count)),
3602 LSB(le16_to_cpu(rptid_entry->vp_count)));
3603 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3604 "Primary port id %02x%02x%02x.\n",
3605 rptid_entry->port_id[2], rptid_entry->port_id[1],
3606 rptid_entry->port_id[0]);
3607 } else if (rptid_entry->format == 1) {
3609 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3610 "Format 1: VP[%d] enabled - status %d - with "
3611 "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3612 rptid_entry->port_id[2], rptid_entry->port_id[1],
3613 rptid_entry->port_id[0]);
3615 /* FA-WWN is only for physical port */
3617 void *wwpn = ha->init_cb->port_name;
3620 if (rptid_entry->vp_idx_map[1] & BIT_6)
3621 wwpn = rptid_entry->reserved_4 + 8;
3623 memcpy(vha->port_name, wwpn, WWN_SIZE);
3624 fc_host_port_name(vha->host) =
3625 wwn_to_u64(vha->port_name);
3626 ql_dbg(ql_dbg_mbx, vha, 0x1018,
3627 "FA-WWN portname %016llx (%x)\n",
3628 fc_host_port_name(vha->host), MSB(stat));
3635 if (MSB(stat) != 0 && MSB(stat) != 2) {
3636 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3637 "Could not acquire ID for VP[%d].\n", vp_idx);
3642 spin_lock_irqsave(&ha->vport_slock, flags);
3643 list_for_each_entry(vp, &ha->vp_list, list) {
3644 if (vp_idx == vp->vp_idx) {
3649 spin_unlock_irqrestore(&ha->vport_slock, flags);
3654 vp->d_id.b.domain = rptid_entry->port_id[2];
3655 vp->d_id.b.area = rptid_entry->port_id[1];
3656 vp->d_id.b.al_pa = rptid_entry->port_id[0];
3659 * Cannot configure here as we are still sitting on the
3660 * response queue. Handle it in dpc context.
3662 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3665 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3666 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3667 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3668 qla2xxx_wake_dpc(vha);
3673 * qla24xx_modify_vp_config
3674 * Change VP configuration for vha
3677 * vha = adapter block pointer.
3680 * qla2xxx local function return status code.
3686 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3689 struct vp_config_entry_24xx *vpmod;
3690 dma_addr_t vpmod_dma;
3691 struct qla_hw_data *ha = vha->hw;
3692 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3694 /* This can be called by the parent */
3696 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3697 "Entered %s.\n", __func__);
3699 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3701 ql_log(ql_log_warn, vha, 0x10bc,
3702 "Failed to allocate modify VP IOCB.\n");
3703 return QLA_MEMORY_ALLOC_FAILED;
3706 memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3707 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3708 vpmod->entry_count = 1;
3709 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3710 vpmod->vp_count = 1;
3711 vpmod->vp_index1 = vha->vp_idx;
3712 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3714 qlt_modify_vp_config(vha, vpmod);
3716 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3717 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3718 vpmod->entry_count = 1;
3720 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3721 if (rval != QLA_SUCCESS) {
3722 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3723 "Failed to issue VP config IOCB (%x).\n", rval);
3724 } else if (vpmod->comp_status != 0) {
3725 ql_dbg(ql_dbg_mbx, vha, 0x10be,
3726 "Failed to complete IOCB -- error status (%x).\n",
3727 vpmod->comp_status);
3728 rval = QLA_FUNCTION_FAILED;
3729 } else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) {
3730 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3731 "Failed to complete IOCB -- completion status (%x).\n",
3732 le16_to_cpu(vpmod->comp_status));
3733 rval = QLA_FUNCTION_FAILED;
3736 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3737 "Done %s.\n", __func__);
3738 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3740 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3746 * qla24xx_control_vp
3747 * Enable a virtual port for given host
3750 * ha = adapter block pointer.
3751 * vhba = virtual adapter (unused)
3752 * index = index number for enabled VP
3755 * qla2xxx local function return status code.
3761 qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3765 struct vp_ctrl_entry_24xx *vce;
3767 struct qla_hw_data *ha = vha->hw;
3768 int vp_index = vha->vp_idx;
3769 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3771 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3772 "Entered %s enabling index %d.\n", __func__, vp_index);
3774 if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3775 return QLA_PARAMETER_ERROR;
3777 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3779 ql_log(ql_log_warn, vha, 0x10c2,
3780 "Failed to allocate VP control IOCB.\n");
3781 return QLA_MEMORY_ALLOC_FAILED;
3783 memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3785 vce->entry_type = VP_CTRL_IOCB_TYPE;
3786 vce->entry_count = 1;
3787 vce->command = cpu_to_le16(cmd);
3788 vce->vp_count = cpu_to_le16(1);
3790 /* index map in firmware starts with 1; decrement index
3791 * this is ok as we never use index 0
3793 map = (vp_index - 1) / 8;
3794 pos = (vp_index - 1) & 7;
3795 mutex_lock(&ha->vport_lock);
3796 vce->vp_idx_map[map] |= 1 << pos;
3797 mutex_unlock(&ha->vport_lock);
3799 rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3800 if (rval != QLA_SUCCESS) {
3801 ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3802 "Failed to issue VP control IOCB (%x).\n", rval);
3803 } else if (vce->entry_status != 0) {
3804 ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3805 "Failed to complete IOCB -- error status (%x).\n",
3807 rval = QLA_FUNCTION_FAILED;
3808 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
3809 ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3810 "Failed to complet IOCB -- completion status (%x).\n",
3811 le16_to_cpu(vce->comp_status));
3812 rval = QLA_FUNCTION_FAILED;
3814 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3815 "Done %s.\n", __func__);
3818 dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3824 * qla2x00_send_change_request
3825 * Receive or disable RSCN request from fabric controller
3828 * ha = adapter block pointer
3829 * format = registration format:
3831 * 1 - Fabric detected registration
3832 * 2 - N_port detected registration
3833 * 3 - Full registration
3834 * FF - clear registration
3835 * vp_idx = Virtual port index
3838 * qla2x00 local function return status code.
3845 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3850 mbx_cmd_t *mcp = &mc;
3852 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3853 "Entered %s.\n", __func__);
3855 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3856 mcp->mb[1] = format;
3857 mcp->mb[9] = vp_idx;
3858 mcp->out_mb = MBX_9|MBX_1|MBX_0;
3859 mcp->in_mb = MBX_0|MBX_1;
3860 mcp->tov = MBX_TOV_SECONDS;
3862 rval = qla2x00_mailbox_command(vha, mcp);
3864 if (rval == QLA_SUCCESS) {
3865 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3875 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3880 mbx_cmd_t *mcp = &mc;
3882 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3883 "Entered %s.\n", __func__);
3885 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3886 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3887 mcp->mb[8] = MSW(addr);
3888 mcp->out_mb = MBX_8|MBX_0;
3890 mcp->mb[0] = MBC_DUMP_RISC_RAM;
3891 mcp->out_mb = MBX_0;
3893 mcp->mb[1] = LSW(addr);
3894 mcp->mb[2] = MSW(req_dma);
3895 mcp->mb[3] = LSW(req_dma);
3896 mcp->mb[6] = MSW(MSD(req_dma));
3897 mcp->mb[7] = LSW(MSD(req_dma));
3898 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3899 if (IS_FWI2_CAPABLE(vha->hw)) {
3900 mcp->mb[4] = MSW(size);
3901 mcp->mb[5] = LSW(size);
3902 mcp->out_mb |= MBX_5|MBX_4;
3904 mcp->mb[4] = LSW(size);
3905 mcp->out_mb |= MBX_4;
3909 mcp->tov = MBX_TOV_SECONDS;
3911 rval = qla2x00_mailbox_command(vha, mcp);
3913 if (rval != QLA_SUCCESS) {
3914 ql_dbg(ql_dbg_mbx, vha, 0x1008,
3915 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3917 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3918 "Done %s.\n", __func__);
3923 /* 84XX Support **************************************************************/
3925 struct cs84xx_mgmt_cmd {
3927 struct verify_chip_entry_84xx req;
3928 struct verify_chip_rsp_84xx rsp;
3933 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3936 struct cs84xx_mgmt_cmd *mn;
3939 unsigned long flags;
3940 struct qla_hw_data *ha = vha->hw;
3942 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
3943 "Entered %s.\n", __func__);
3945 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
3947 return QLA_MEMORY_ALLOC_FAILED;
3951 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
3952 /* Diagnostic firmware? */
3953 /* options |= MENLO_DIAG_FW; */
3954 /* We update the firmware with only one data sequence. */
3955 options |= VCO_END_OF_DATA;
3959 memset(mn, 0, sizeof(*mn));
3960 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
3961 mn->p.req.entry_count = 1;
3962 mn->p.req.options = cpu_to_le16(options);
3964 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
3965 "Dump of Verify Request.\n");
3966 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
3967 (uint8_t *)mn, sizeof(*mn));
3969 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
3970 if (rval != QLA_SUCCESS) {
3971 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
3972 "Failed to issue verify IOCB (%x).\n", rval);
3976 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
3977 "Dump of Verify Response.\n");
3978 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
3979 (uint8_t *)mn, sizeof(*mn));
3981 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
3982 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
3983 le16_to_cpu(mn->p.rsp.failure_code) : 0;
3984 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
3985 "cs=%x fc=%x.\n", status[0], status[1]);
3987 if (status[0] != CS_COMPLETE) {
3988 rval = QLA_FUNCTION_FAILED;
3989 if (!(options & VCO_DONT_UPDATE_FW)) {
3990 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
3991 "Firmware update failed. Retrying "
3992 "without update firmware.\n");
3993 options |= VCO_DONT_UPDATE_FW;
3994 options &= ~VCO_FORCE_UPDATE;
3998 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
3999 "Firmware updated to %x.\n",
4000 le32_to_cpu(mn->p.rsp.fw_ver));
4002 /* NOTE: we only update OP firmware. */
4003 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
4004 ha->cs84xx->op_fw_version =
4005 le32_to_cpu(mn->p.rsp.fw_ver);
4006 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
4012 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
4014 if (rval != QLA_SUCCESS) {
4015 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
4016 "Failed=%x.\n", rval);
4018 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
4019 "Done %s.\n", __func__);
4026 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
4029 unsigned long flags;
4031 mbx_cmd_t *mcp = &mc;
4032 struct qla_hw_data *ha = vha->hw;
4034 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
4035 "Entered %s.\n", __func__);
4037 if (IS_SHADOW_REG_CAPABLE(ha))
4038 req->options |= BIT_13;
4040 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4041 mcp->mb[1] = req->options;
4042 mcp->mb[2] = MSW(LSD(req->dma));
4043 mcp->mb[3] = LSW(LSD(req->dma));
4044 mcp->mb[6] = MSW(MSD(req->dma));
4045 mcp->mb[7] = LSW(MSD(req->dma));
4046 mcp->mb[5] = req->length;
4048 mcp->mb[10] = req->rsp->id;
4049 mcp->mb[12] = req->qos;
4050 mcp->mb[11] = req->vp_idx;
4051 mcp->mb[13] = req->rid;
4052 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4055 mcp->mb[4] = req->id;
4056 /* que in ptr index */
4058 /* que out ptr index */
4059 mcp->mb[9] = *req->out_ptr = 0;
4060 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
4061 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4063 mcp->flags = MBX_DMA_OUT;
4064 mcp->tov = MBX_TOV_SECONDS * 2;
4066 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
4067 mcp->in_mb |= MBX_1;
4068 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4069 mcp->out_mb |= MBX_15;
4070 /* debug q create issue in SR-IOV */
4071 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4074 spin_lock_irqsave(&ha->hardware_lock, flags);
4075 if (!(req->options & BIT_0)) {
4076 WRT_REG_DWORD(req->req_q_in, 0);
4077 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4078 WRT_REG_DWORD(req->req_q_out, 0);
4080 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4082 rval = qla2x00_mailbox_command(vha, mcp);
4083 if (rval != QLA_SUCCESS) {
4084 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
4085 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4087 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
4088 "Done %s.\n", __func__);
4095 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
4098 unsigned long flags;
4100 mbx_cmd_t *mcp = &mc;
4101 struct qla_hw_data *ha = vha->hw;
4103 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
4104 "Entered %s.\n", __func__);
4106 if (IS_SHADOW_REG_CAPABLE(ha))
4107 rsp->options |= BIT_13;
4109 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4110 mcp->mb[1] = rsp->options;
4111 mcp->mb[2] = MSW(LSD(rsp->dma));
4112 mcp->mb[3] = LSW(LSD(rsp->dma));
4113 mcp->mb[6] = MSW(MSD(rsp->dma));
4114 mcp->mb[7] = LSW(MSD(rsp->dma));
4115 mcp->mb[5] = rsp->length;
4116 mcp->mb[14] = rsp->msix->entry;
4117 mcp->mb[13] = rsp->rid;
4118 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4121 mcp->mb[4] = rsp->id;
4122 /* que in ptr index */
4123 mcp->mb[8] = *rsp->in_ptr = 0;
4124 /* que out ptr index */
4126 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
4127 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4129 mcp->flags = MBX_DMA_OUT;
4130 mcp->tov = MBX_TOV_SECONDS * 2;
4132 if (IS_QLA81XX(ha)) {
4133 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
4134 mcp->in_mb |= MBX_1;
4135 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4136 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
4137 mcp->in_mb |= MBX_1;
4138 /* debug q create issue in SR-IOV */
4139 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4142 spin_lock_irqsave(&ha->hardware_lock, flags);
4143 if (!(rsp->options & BIT_0)) {
4144 WRT_REG_DWORD(rsp->rsp_q_out, 0);
4145 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4146 WRT_REG_DWORD(rsp->rsp_q_in, 0);
4149 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4151 rval = qla2x00_mailbox_command(vha, mcp);
4152 if (rval != QLA_SUCCESS) {
4153 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
4154 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4156 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
4157 "Done %s.\n", __func__);
4164 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
4168 mbx_cmd_t *mcp = &mc;
4170 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
4171 "Entered %s.\n", __func__);
4173 mcp->mb[0] = MBC_IDC_ACK;
4174 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4175 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4177 mcp->tov = MBX_TOV_SECONDS;
4179 rval = qla2x00_mailbox_command(vha, mcp);
4181 if (rval != QLA_SUCCESS) {
4182 ql_dbg(ql_dbg_mbx, vha, 0x10da,
4183 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4185 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
4186 "Done %s.\n", __func__);
4193 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
4197 mbx_cmd_t *mcp = &mc;
4199 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
4200 "Entered %s.\n", __func__);
4202 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4203 !IS_QLA27XX(vha->hw))
4204 return QLA_FUNCTION_FAILED;
4206 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4207 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
4208 mcp->out_mb = MBX_1|MBX_0;
4209 mcp->in_mb = MBX_1|MBX_0;
4210 mcp->tov = MBX_TOV_SECONDS;
4212 rval = qla2x00_mailbox_command(vha, mcp);
4214 if (rval != QLA_SUCCESS) {
4215 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
4216 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4217 rval, mcp->mb[0], mcp->mb[1]);
4219 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
4220 "Done %s.\n", __func__);
4221 *sector_size = mcp->mb[1];
4228 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
4232 mbx_cmd_t *mcp = &mc;
4234 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4235 !IS_QLA27XX(vha->hw))
4236 return QLA_FUNCTION_FAILED;
4238 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
4239 "Entered %s.\n", __func__);
4241 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4242 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
4243 FAC_OPT_CMD_WRITE_PROTECT;
4244 mcp->out_mb = MBX_1|MBX_0;
4245 mcp->in_mb = MBX_1|MBX_0;
4246 mcp->tov = MBX_TOV_SECONDS;
4248 rval = qla2x00_mailbox_command(vha, mcp);
4250 if (rval != QLA_SUCCESS) {
4251 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
4252 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4253 rval, mcp->mb[0], mcp->mb[1]);
4255 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
4256 "Done %s.\n", __func__);
4263 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
4267 mbx_cmd_t *mcp = &mc;
4269 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4270 !IS_QLA27XX(vha->hw))
4271 return QLA_FUNCTION_FAILED;
4273 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4274 "Entered %s.\n", __func__);
4276 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4277 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
4278 mcp->mb[2] = LSW(start);
4279 mcp->mb[3] = MSW(start);
4280 mcp->mb[4] = LSW(finish);
4281 mcp->mb[5] = MSW(finish);
4282 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4283 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4284 mcp->tov = MBX_TOV_SECONDS;
4286 rval = qla2x00_mailbox_command(vha, mcp);
4288 if (rval != QLA_SUCCESS) {
4289 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4290 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4291 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4293 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4294 "Done %s.\n", __func__);
4301 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
4305 mbx_cmd_t *mcp = &mc;
4307 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
4308 "Entered %s.\n", __func__);
4310 mcp->mb[0] = MBC_RESTART_MPI_FW;
4311 mcp->out_mb = MBX_0;
4312 mcp->in_mb = MBX_0|MBX_1;
4313 mcp->tov = MBX_TOV_SECONDS;
4315 rval = qla2x00_mailbox_command(vha, mcp);
4317 if (rval != QLA_SUCCESS) {
4318 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
4319 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4320 rval, mcp->mb[0], mcp->mb[1]);
4322 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
4323 "Done %s.\n", __func__);
4330 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4334 mbx_cmd_t *mcp = &mc;
4338 struct qla_hw_data *ha = vha->hw;
4340 if (!IS_P3P_TYPE(ha))
4341 return QLA_FUNCTION_FAILED;
4343 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
4344 "Entered %s.\n", __func__);
4346 str = (void *)version;
4347 len = strlen(version);
4349 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4350 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
4351 mcp->out_mb = MBX_1|MBX_0;
4352 for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4353 mcp->mb[i] = cpu_to_le16p(str);
4354 mcp->out_mb |= 1<<i;
4356 for (; i < 16; i++) {
4358 mcp->out_mb |= 1<<i;
4360 mcp->in_mb = MBX_1|MBX_0;
4361 mcp->tov = MBX_TOV_SECONDS;
4363 rval = qla2x00_mailbox_command(vha, mcp);
4365 if (rval != QLA_SUCCESS) {
4366 ql_dbg(ql_dbg_mbx, vha, 0x117c,
4367 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4369 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
4370 "Done %s.\n", __func__);
4377 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4381 mbx_cmd_t *mcp = &mc;
4386 struct qla_hw_data *ha = vha->hw;
4388 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
4390 return QLA_FUNCTION_FAILED;
4392 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4393 "Entered %s.\n", __func__);
4395 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4397 ql_log(ql_log_warn, vha, 0x117f,
4398 "Failed to allocate driver version param.\n");
4399 return QLA_MEMORY_ALLOC_FAILED;
4402 memcpy(str, "\x7\x3\x11\x0", 4);
4404 len = dwlen * 4 - 4;
4405 memset(str + 4, 0, len);
4406 if (len > strlen(version))
4407 len = strlen(version);
4408 memcpy(str + 4, version, len);
4410 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4411 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4412 mcp->mb[2] = MSW(LSD(str_dma));
4413 mcp->mb[3] = LSW(LSD(str_dma));
4414 mcp->mb[6] = MSW(MSD(str_dma));
4415 mcp->mb[7] = LSW(MSD(str_dma));
4416 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4417 mcp->in_mb = MBX_1|MBX_0;
4418 mcp->tov = MBX_TOV_SECONDS;
4420 rval = qla2x00_mailbox_command(vha, mcp);
4422 if (rval != QLA_SUCCESS) {
4423 ql_dbg(ql_dbg_mbx, vha, 0x1180,
4424 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4426 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4427 "Done %s.\n", __func__);
4430 dma_pool_free(ha->s_dma_pool, str, str_dma);
4436 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
4440 mbx_cmd_t *mcp = &mc;
4442 if (!IS_FWI2_CAPABLE(vha->hw))
4443 return QLA_FUNCTION_FAILED;
4445 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4446 "Entered %s.\n", __func__);
4448 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4449 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
4450 mcp->out_mb = MBX_1|MBX_0;
4451 mcp->in_mb = MBX_1|MBX_0;
4452 mcp->tov = MBX_TOV_SECONDS;
4454 rval = qla2x00_mailbox_command(vha, mcp);
4457 if (rval != QLA_SUCCESS) {
4458 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4459 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4461 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4462 "Done %s.\n", __func__);
4469 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4470 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4474 mbx_cmd_t *mcp = &mc;
4475 struct qla_hw_data *ha = vha->hw;
4477 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
4478 "Entered %s.\n", __func__);
4480 if (!IS_FWI2_CAPABLE(ha))
4481 return QLA_FUNCTION_FAILED;
4486 mcp->mb[0] = MBC_READ_SFP;
4488 mcp->mb[2] = MSW(sfp_dma);
4489 mcp->mb[3] = LSW(sfp_dma);
4490 mcp->mb[6] = MSW(MSD(sfp_dma));
4491 mcp->mb[7] = LSW(MSD(sfp_dma));
4495 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4496 mcp->in_mb = MBX_1|MBX_0;
4497 mcp->tov = MBX_TOV_SECONDS;
4499 rval = qla2x00_mailbox_command(vha, mcp);
4504 if (rval != QLA_SUCCESS) {
4505 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
4506 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4508 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
4509 "Done %s.\n", __func__);
4516 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4517 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4521 mbx_cmd_t *mcp = &mc;
4522 struct qla_hw_data *ha = vha->hw;
4524 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
4525 "Entered %s.\n", __func__);
4527 if (!IS_FWI2_CAPABLE(ha))
4528 return QLA_FUNCTION_FAILED;
4536 mcp->mb[0] = MBC_WRITE_SFP;
4538 mcp->mb[2] = MSW(sfp_dma);
4539 mcp->mb[3] = LSW(sfp_dma);
4540 mcp->mb[6] = MSW(MSD(sfp_dma));
4541 mcp->mb[7] = LSW(MSD(sfp_dma));
4545 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4546 mcp->in_mb = MBX_1|MBX_0;
4547 mcp->tov = MBX_TOV_SECONDS;
4549 rval = qla2x00_mailbox_command(vha, mcp);
4551 if (rval != QLA_SUCCESS) {
4552 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
4553 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4555 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
4556 "Done %s.\n", __func__);
4563 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4564 uint16_t size_in_bytes, uint16_t *actual_size)
4568 mbx_cmd_t *mcp = &mc;
4570 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4571 "Entered %s.\n", __func__);
4573 if (!IS_CNA_CAPABLE(vha->hw))
4574 return QLA_FUNCTION_FAILED;
4576 mcp->mb[0] = MBC_GET_XGMAC_STATS;
4577 mcp->mb[2] = MSW(stats_dma);
4578 mcp->mb[3] = LSW(stats_dma);
4579 mcp->mb[6] = MSW(MSD(stats_dma));
4580 mcp->mb[7] = LSW(MSD(stats_dma));
4581 mcp->mb[8] = size_in_bytes >> 2;
4582 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4583 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4584 mcp->tov = MBX_TOV_SECONDS;
4586 rval = qla2x00_mailbox_command(vha, mcp);
4588 if (rval != QLA_SUCCESS) {
4589 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4590 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4591 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4593 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4594 "Done %s.\n", __func__);
4597 *actual_size = mcp->mb[2] << 2;
4604 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4609 mbx_cmd_t *mcp = &mc;
4611 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4612 "Entered %s.\n", __func__);
4614 if (!IS_CNA_CAPABLE(vha->hw))
4615 return QLA_FUNCTION_FAILED;
4617 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4619 mcp->mb[2] = MSW(tlv_dma);
4620 mcp->mb[3] = LSW(tlv_dma);
4621 mcp->mb[6] = MSW(MSD(tlv_dma));
4622 mcp->mb[7] = LSW(MSD(tlv_dma));
4624 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4625 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4626 mcp->tov = MBX_TOV_SECONDS;
4628 rval = qla2x00_mailbox_command(vha, mcp);
4630 if (rval != QLA_SUCCESS) {
4631 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4632 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4633 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4635 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4636 "Done %s.\n", __func__);
4643 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4647 mbx_cmd_t *mcp = &mc;
4649 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4650 "Entered %s.\n", __func__);
4652 if (!IS_FWI2_CAPABLE(vha->hw))
4653 return QLA_FUNCTION_FAILED;
4655 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4656 mcp->mb[1] = LSW(risc_addr);
4657 mcp->mb[8] = MSW(risc_addr);
4658 mcp->out_mb = MBX_8|MBX_1|MBX_0;
4659 mcp->in_mb = MBX_3|MBX_2|MBX_0;
4662 rval = qla2x00_mailbox_command(vha, mcp);
4663 if (rval != QLA_SUCCESS) {
4664 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4665 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4667 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4668 "Done %s.\n", __func__);
4669 *data = mcp->mb[3] << 16 | mcp->mb[2];
4676 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4681 mbx_cmd_t *mcp = &mc;
4683 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4684 "Entered %s.\n", __func__);
4686 memset(mcp->mb, 0 , sizeof(mcp->mb));
4687 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4688 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
4690 /* transfer count */
4691 mcp->mb[10] = LSW(mreq->transfer_size);
4692 mcp->mb[11] = MSW(mreq->transfer_size);
4694 /* send data address */
4695 mcp->mb[14] = LSW(mreq->send_dma);
4696 mcp->mb[15] = MSW(mreq->send_dma);
4697 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4698 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4700 /* receive data address */
4701 mcp->mb[16] = LSW(mreq->rcv_dma);
4702 mcp->mb[17] = MSW(mreq->rcv_dma);
4703 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4704 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4706 /* Iteration count */
4707 mcp->mb[18] = LSW(mreq->iteration_count);
4708 mcp->mb[19] = MSW(mreq->iteration_count);
4710 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4711 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4712 if (IS_CNA_CAPABLE(vha->hw))
4713 mcp->out_mb |= MBX_2;
4714 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4716 mcp->buf_size = mreq->transfer_size;
4717 mcp->tov = MBX_TOV_SECONDS;
4718 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4720 rval = qla2x00_mailbox_command(vha, mcp);
4722 if (rval != QLA_SUCCESS) {
4723 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4724 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4725 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4726 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4728 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4729 "Done %s.\n", __func__);
4732 /* Copy mailbox information */
4733 memcpy( mresp, mcp->mb, 64);
4738 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4743 mbx_cmd_t *mcp = &mc;
4744 struct qla_hw_data *ha = vha->hw;
4746 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4747 "Entered %s.\n", __func__);
4749 memset(mcp->mb, 0 , sizeof(mcp->mb));
4750 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4751 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
4752 if (IS_CNA_CAPABLE(ha)) {
4753 mcp->mb[1] |= BIT_15;
4754 mcp->mb[2] = vha->fcoe_fcf_idx;
4756 mcp->mb[16] = LSW(mreq->rcv_dma);
4757 mcp->mb[17] = MSW(mreq->rcv_dma);
4758 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4759 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4761 mcp->mb[10] = LSW(mreq->transfer_size);
4763 mcp->mb[14] = LSW(mreq->send_dma);
4764 mcp->mb[15] = MSW(mreq->send_dma);
4765 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4766 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4768 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4769 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4770 if (IS_CNA_CAPABLE(ha))
4771 mcp->out_mb |= MBX_2;
4774 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4775 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4776 mcp->in_mb |= MBX_1;
4777 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4778 mcp->in_mb |= MBX_3;
4780 mcp->tov = MBX_TOV_SECONDS;
4781 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4782 mcp->buf_size = mreq->transfer_size;
4784 rval = qla2x00_mailbox_command(vha, mcp);
4786 if (rval != QLA_SUCCESS) {
4787 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4788 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4789 rval, mcp->mb[0], mcp->mb[1]);
4791 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4792 "Done %s.\n", __func__);
4795 /* Copy mailbox information */
4796 memcpy(mresp, mcp->mb, 64);
4801 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4805 mbx_cmd_t *mcp = &mc;
4807 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4808 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4810 mcp->mb[0] = MBC_ISP84XX_RESET;
4811 mcp->mb[1] = enable_diagnostic;
4812 mcp->out_mb = MBX_1|MBX_0;
4813 mcp->in_mb = MBX_1|MBX_0;
4814 mcp->tov = MBX_TOV_SECONDS;
4815 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4816 rval = qla2x00_mailbox_command(vha, mcp);
4818 if (rval != QLA_SUCCESS)
4819 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4821 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4822 "Done %s.\n", __func__);
4828 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4832 mbx_cmd_t *mcp = &mc;
4834 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4835 "Entered %s.\n", __func__);
4837 if (!IS_FWI2_CAPABLE(vha->hw))
4838 return QLA_FUNCTION_FAILED;
4840 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4841 mcp->mb[1] = LSW(risc_addr);
4842 mcp->mb[2] = LSW(data);
4843 mcp->mb[3] = MSW(data);
4844 mcp->mb[8] = MSW(risc_addr);
4845 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4849 rval = qla2x00_mailbox_command(vha, mcp);
4850 if (rval != QLA_SUCCESS) {
4851 ql_dbg(ql_dbg_mbx, vha, 0x1101,
4852 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4854 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4855 "Done %s.\n", __func__);
4862 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4865 uint32_t stat, timer;
4867 struct qla_hw_data *ha = vha->hw;
4868 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4872 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4873 "Entered %s.\n", __func__);
4875 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4877 /* Write the MBC data to the registers */
4878 WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER);
4879 WRT_REG_WORD(®->mailbox1, mb[0]);
4880 WRT_REG_WORD(®->mailbox2, mb[1]);
4881 WRT_REG_WORD(®->mailbox3, mb[2]);
4882 WRT_REG_WORD(®->mailbox4, mb[3]);
4884 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT);
4886 /* Poll for MBC interrupt */
4887 for (timer = 6000000; timer; timer--) {
4888 /* Check for pending interrupts. */
4889 stat = RD_REG_DWORD(®->host_status);
4890 if (stat & HSRX_RISC_INT) {
4893 if (stat == 0x1 || stat == 0x2 ||
4894 stat == 0x10 || stat == 0x11) {
4895 set_bit(MBX_INTERRUPT,
4896 &ha->mbx_cmd_flags);
4897 mb0 = RD_REG_WORD(®->mailbox0);
4898 WRT_REG_DWORD(®->hccr,
4899 HCCRX_CLR_RISC_INT);
4900 RD_REG_DWORD(®->hccr);
4907 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4908 rval = mb0 & MBS_MASK;
4910 rval = QLA_FUNCTION_FAILED;
4912 if (rval != QLA_SUCCESS) {
4913 ql_dbg(ql_dbg_mbx, vha, 0x1104,
4914 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4916 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4917 "Done %s.\n", __func__);
4924 qla2x00_get_data_rate(scsi_qla_host_t *vha)
4928 mbx_cmd_t *mcp = &mc;
4929 struct qla_hw_data *ha = vha->hw;
4931 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
4932 "Entered %s.\n", __func__);
4934 if (!IS_FWI2_CAPABLE(ha))
4935 return QLA_FUNCTION_FAILED;
4937 mcp->mb[0] = MBC_DATA_RATE;
4939 mcp->out_mb = MBX_1|MBX_0;
4940 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4941 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4942 mcp->in_mb |= MBX_3;
4943 mcp->tov = MBX_TOV_SECONDS;
4945 rval = qla2x00_mailbox_command(vha, mcp);
4946 if (rval != QLA_SUCCESS) {
4947 ql_dbg(ql_dbg_mbx, vha, 0x1107,
4948 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4950 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
4951 "Done %s.\n", __func__);
4952 if (mcp->mb[1] != 0x7)
4953 ha->link_data_rate = mcp->mb[1];
4960 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4964 mbx_cmd_t *mcp = &mc;
4965 struct qla_hw_data *ha = vha->hw;
4967 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
4968 "Entered %s.\n", __func__);
4970 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
4972 return QLA_FUNCTION_FAILED;
4973 mcp->mb[0] = MBC_GET_PORT_CONFIG;
4974 mcp->out_mb = MBX_0;
4975 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4976 mcp->tov = MBX_TOV_SECONDS;
4979 rval = qla2x00_mailbox_command(vha, mcp);
4981 if (rval != QLA_SUCCESS) {
4982 ql_dbg(ql_dbg_mbx, vha, 0x110a,
4983 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4985 /* Copy all bits to preserve original value */
4986 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
4988 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
4989 "Done %s.\n", __func__);
4995 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4999 mbx_cmd_t *mcp = &mc;
5001 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
5002 "Entered %s.\n", __func__);
5004 mcp->mb[0] = MBC_SET_PORT_CONFIG;
5005 /* Copy all bits to preserve original setting */
5006 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
5007 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5009 mcp->tov = MBX_TOV_SECONDS;
5011 rval = qla2x00_mailbox_command(vha, mcp);
5013 if (rval != QLA_SUCCESS) {
5014 ql_dbg(ql_dbg_mbx, vha, 0x110d,
5015 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5017 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
5018 "Done %s.\n", __func__);
5025 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
5030 mbx_cmd_t *mcp = &mc;
5031 struct qla_hw_data *ha = vha->hw;
5033 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
5034 "Entered %s.\n", __func__);
5036 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
5037 return QLA_FUNCTION_FAILED;
5039 mcp->mb[0] = MBC_PORT_PARAMS;
5040 mcp->mb[1] = loop_id;
5041 if (ha->flags.fcp_prio_enabled)
5045 mcp->mb[4] = priority & 0xf;
5046 mcp->mb[9] = vha->vp_idx;
5047 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5048 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5051 rval = qla2x00_mailbox_command(vha, mcp);
5059 if (rval != QLA_SUCCESS) {
5060 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
5062 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
5063 "Done %s.\n", __func__);
5070 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
5072 int rval = QLA_FUNCTION_FAILED;
5073 struct qla_hw_data *ha = vha->hw;
5076 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
5077 ql_dbg(ql_dbg_mbx, vha, 0x1150,
5078 "Thermal not supported by this card.\n");
5082 if (IS_QLA25XX(ha)) {
5083 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5084 ha->pdev->subsystem_device == 0x0175) {
5085 rval = qla2x00_read_sfp(vha, 0, &byte,
5086 0x98, 0x1, 1, BIT_13|BIT_0);
5090 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
5091 ha->pdev->subsystem_device == 0x338e) {
5092 rval = qla2x00_read_sfp(vha, 0, &byte,
5093 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
5097 ql_dbg(ql_dbg_mbx, vha, 0x10c9,
5098 "Thermal not supported by this card.\n");
5102 if (IS_QLA82XX(ha)) {
5103 *temp = qla82xx_read_temperature(vha);
5106 } else if (IS_QLA8044(ha)) {
5107 *temp = qla8044_read_temperature(vha);
5112 rval = qla2x00_read_asic_temperature(vha, temp);
5117 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
5120 struct qla_hw_data *ha = vha->hw;
5122 mbx_cmd_t *mcp = &mc;
5124 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
5125 "Entered %s.\n", __func__);
5127 if (!IS_FWI2_CAPABLE(ha))
5128 return QLA_FUNCTION_FAILED;
5130 memset(mcp, 0, sizeof(mbx_cmd_t));
5131 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5134 mcp->out_mb = MBX_1|MBX_0;
5139 rval = qla2x00_mailbox_command(vha, mcp);
5140 if (rval != QLA_SUCCESS) {
5141 ql_dbg(ql_dbg_mbx, vha, 0x1016,
5142 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5144 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
5145 "Done %s.\n", __func__);
5152 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
5155 struct qla_hw_data *ha = vha->hw;
5157 mbx_cmd_t *mcp = &mc;
5159 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
5160 "Entered %s.\n", __func__);
5162 if (!IS_P3P_TYPE(ha))
5163 return QLA_FUNCTION_FAILED;
5165 memset(mcp, 0, sizeof(mbx_cmd_t));
5166 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5169 mcp->out_mb = MBX_1|MBX_0;
5174 rval = qla2x00_mailbox_command(vha, mcp);
5175 if (rval != QLA_SUCCESS) {
5176 ql_dbg(ql_dbg_mbx, vha, 0x100c,
5177 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5179 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
5180 "Done %s.\n", __func__);
5187 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
5189 struct qla_hw_data *ha = vha->hw;
5191 mbx_cmd_t *mcp = &mc;
5192 int rval = QLA_FUNCTION_FAILED;
5194 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
5195 "Entered %s.\n", __func__);
5197 memset(mcp->mb, 0 , sizeof(mcp->mb));
5198 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5199 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5200 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
5201 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
5203 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5204 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
5205 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5207 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5208 mcp->tov = MBX_TOV_SECONDS;
5209 rval = qla2x00_mailbox_command(vha, mcp);
5211 /* Always copy back return mailbox values. */
5212 if (rval != QLA_SUCCESS) {
5213 ql_dbg(ql_dbg_mbx, vha, 0x1120,
5214 "mailbox command FAILED=0x%x, subcode=%x.\n",
5215 (mcp->mb[1] << 16) | mcp->mb[0],
5216 (mcp->mb[3] << 16) | mcp->mb[2]);
5218 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
5219 "Done %s.\n", __func__);
5220 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
5221 if (!ha->md_template_size) {
5222 ql_dbg(ql_dbg_mbx, vha, 0x1122,
5223 "Null template size obtained.\n");
5224 rval = QLA_FUNCTION_FAILED;
5231 qla82xx_md_get_template(scsi_qla_host_t *vha)
5233 struct qla_hw_data *ha = vha->hw;
5235 mbx_cmd_t *mcp = &mc;
5236 int rval = QLA_FUNCTION_FAILED;
5238 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
5239 "Entered %s.\n", __func__);
5241 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5242 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5243 if (!ha->md_tmplt_hdr) {
5244 ql_log(ql_log_warn, vha, 0x1124,
5245 "Unable to allocate memory for Minidump template.\n");
5249 memset(mcp->mb, 0 , sizeof(mcp->mb));
5250 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5251 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5252 mcp->mb[2] = LSW(RQST_TMPLT);
5253 mcp->mb[3] = MSW(RQST_TMPLT);
5254 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
5255 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
5256 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
5257 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
5258 mcp->mb[8] = LSW(ha->md_template_size);
5259 mcp->mb[9] = MSW(ha->md_template_size);
5261 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5262 mcp->tov = MBX_TOV_SECONDS;
5263 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5264 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5265 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5266 rval = qla2x00_mailbox_command(vha, mcp);
5268 if (rval != QLA_SUCCESS) {
5269 ql_dbg(ql_dbg_mbx, vha, 0x1125,
5270 "mailbox command FAILED=0x%x, subcode=%x.\n",
5271 ((mcp->mb[1] << 16) | mcp->mb[0]),
5272 ((mcp->mb[3] << 16) | mcp->mb[2]));
5274 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
5275 "Done %s.\n", __func__);
5280 qla8044_md_get_template(scsi_qla_host_t *vha)
5282 struct qla_hw_data *ha = vha->hw;
5284 mbx_cmd_t *mcp = &mc;
5285 int rval = QLA_FUNCTION_FAILED;
5286 int offset = 0, size = MINIDUMP_SIZE_36K;
5287 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
5288 "Entered %s.\n", __func__);
5290 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5291 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5292 if (!ha->md_tmplt_hdr) {
5293 ql_log(ql_log_warn, vha, 0xb11b,
5294 "Unable to allocate memory for Minidump template.\n");
5298 memset(mcp->mb, 0 , sizeof(mcp->mb));
5299 while (offset < ha->md_template_size) {
5300 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5301 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5302 mcp->mb[2] = LSW(RQST_TMPLT);
5303 mcp->mb[3] = MSW(RQST_TMPLT);
5304 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
5305 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
5306 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
5307 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
5308 mcp->mb[8] = LSW(size);
5309 mcp->mb[9] = MSW(size);
5310 mcp->mb[10] = offset & 0x0000FFFF;
5311 mcp->mb[11] = offset & 0xFFFF0000;
5312 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5313 mcp->tov = MBX_TOV_SECONDS;
5314 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5315 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5316 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5317 rval = qla2x00_mailbox_command(vha, mcp);
5319 if (rval != QLA_SUCCESS) {
5320 ql_dbg(ql_dbg_mbx, vha, 0xb11c,
5321 "mailbox command FAILED=0x%x, subcode=%x.\n",
5322 ((mcp->mb[1] << 16) | mcp->mb[0]),
5323 ((mcp->mb[3] << 16) | mcp->mb[2]));
5326 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
5327 "Done %s.\n", __func__);
5328 offset = offset + size;
5334 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5337 struct qla_hw_data *ha = vha->hw;
5339 mbx_cmd_t *mcp = &mc;
5341 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5342 return QLA_FUNCTION_FAILED;
5344 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
5345 "Entered %s.\n", __func__);
5347 memset(mcp, 0, sizeof(mbx_cmd_t));
5348 mcp->mb[0] = MBC_SET_LED_CONFIG;
5349 mcp->mb[1] = led_cfg[0];
5350 mcp->mb[2] = led_cfg[1];
5351 if (IS_QLA8031(ha)) {
5352 mcp->mb[3] = led_cfg[2];
5353 mcp->mb[4] = led_cfg[3];
5354 mcp->mb[5] = led_cfg[4];
5355 mcp->mb[6] = led_cfg[5];
5358 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5360 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5365 rval = qla2x00_mailbox_command(vha, mcp);
5366 if (rval != QLA_SUCCESS) {
5367 ql_dbg(ql_dbg_mbx, vha, 0x1134,
5368 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5370 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
5371 "Done %s.\n", __func__);
5378 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5381 struct qla_hw_data *ha = vha->hw;
5383 mbx_cmd_t *mcp = &mc;
5385 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5386 return QLA_FUNCTION_FAILED;
5388 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
5389 "Entered %s.\n", __func__);
5391 memset(mcp, 0, sizeof(mbx_cmd_t));
5392 mcp->mb[0] = MBC_GET_LED_CONFIG;
5394 mcp->out_mb = MBX_0;
5395 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5397 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5401 rval = qla2x00_mailbox_command(vha, mcp);
5402 if (rval != QLA_SUCCESS) {
5403 ql_dbg(ql_dbg_mbx, vha, 0x1137,
5404 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5406 led_cfg[0] = mcp->mb[1];
5407 led_cfg[1] = mcp->mb[2];
5408 if (IS_QLA8031(ha)) {
5409 led_cfg[2] = mcp->mb[3];
5410 led_cfg[3] = mcp->mb[4];
5411 led_cfg[4] = mcp->mb[5];
5412 led_cfg[5] = mcp->mb[6];
5414 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
5415 "Done %s.\n", __func__);
5422 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
5425 struct qla_hw_data *ha = vha->hw;
5427 mbx_cmd_t *mcp = &mc;
5429 if (!IS_P3P_TYPE(ha))
5430 return QLA_FUNCTION_FAILED;
5432 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5433 "Entered %s.\n", __func__);
5435 memset(mcp, 0, sizeof(mbx_cmd_t));
5436 mcp->mb[0] = MBC_SET_LED_CONFIG;
5442 mcp->out_mb = MBX_7|MBX_0;
5444 mcp->tov = MBX_TOV_SECONDS;
5447 rval = qla2x00_mailbox_command(vha, mcp);
5448 if (rval != QLA_SUCCESS) {
5449 ql_dbg(ql_dbg_mbx, vha, 0x1128,
5450 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5452 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5453 "Done %s.\n", __func__);
5460 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5463 struct qla_hw_data *ha = vha->hw;
5465 mbx_cmd_t *mcp = &mc;
5467 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5468 return QLA_FUNCTION_FAILED;
5470 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
5471 "Entered %s.\n", __func__);
5473 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
5474 mcp->mb[1] = LSW(reg);
5475 mcp->mb[2] = MSW(reg);
5476 mcp->mb[3] = LSW(data);
5477 mcp->mb[4] = MSW(data);
5478 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5480 mcp->in_mb = MBX_1|MBX_0;
5481 mcp->tov = MBX_TOV_SECONDS;
5483 rval = qla2x00_mailbox_command(vha, mcp);
5485 if (rval != QLA_SUCCESS) {
5486 ql_dbg(ql_dbg_mbx, vha, 0x1131,
5487 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5489 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5490 "Done %s.\n", __func__);
5497 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
5500 struct qla_hw_data *ha = vha->hw;
5502 mbx_cmd_t *mcp = &mc;
5504 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5505 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5506 "Implicit LOGO Unsupported.\n");
5507 return QLA_FUNCTION_FAILED;
5511 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
5512 "Entering %s.\n", __func__);
5514 /* Perform Implicit LOGO. */
5515 mcp->mb[0] = MBC_PORT_LOGOUT;
5516 mcp->mb[1] = fcport->loop_id;
5517 mcp->mb[10] = BIT_15;
5518 mcp->out_mb = MBX_10|MBX_1|MBX_0;
5520 mcp->tov = MBX_TOV_SECONDS;
5522 rval = qla2x00_mailbox_command(vha, mcp);
5523 if (rval != QLA_SUCCESS)
5524 ql_dbg(ql_dbg_mbx, vha, 0x113d,
5525 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5527 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
5528 "Done %s.\n", __func__);
5534 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
5538 mbx_cmd_t *mcp = &mc;
5539 struct qla_hw_data *ha = vha->hw;
5540 unsigned long retry_max_time = jiffies + (2 * HZ);
5542 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5543 return QLA_FUNCTION_FAILED;
5545 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
5548 mcp->mb[0] = MBC_READ_REMOTE_REG;
5549 mcp->mb[1] = LSW(reg);
5550 mcp->mb[2] = MSW(reg);
5551 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5552 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5553 mcp->tov = MBX_TOV_SECONDS;
5555 rval = qla2x00_mailbox_command(vha, mcp);
5557 if (rval != QLA_SUCCESS) {
5558 ql_dbg(ql_dbg_mbx, vha, 0x114c,
5559 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5560 rval, mcp->mb[0], mcp->mb[1]);
5562 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
5563 if (*data == QLA8XXX_BAD_VALUE) {
5565 * During soft-reset CAMRAM register reads might
5566 * return 0xbad0bad0. So retry for MAX of 2 sec
5567 * while reading camram registers.
5569 if (time_after(jiffies, retry_max_time)) {
5570 ql_dbg(ql_dbg_mbx, vha, 0x1141,
5571 "Failure to read CAMRAM register. "
5572 "data=0x%x.\n", *data);
5573 return QLA_FUNCTION_FAILED;
5578 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
5585 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
5589 mbx_cmd_t *mcp = &mc;
5590 struct qla_hw_data *ha = vha->hw;
5592 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5593 return QLA_FUNCTION_FAILED;
5595 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
5597 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
5598 mcp->out_mb = MBX_0;
5599 mcp->in_mb = MBX_1|MBX_0;
5600 mcp->tov = MBX_TOV_SECONDS;
5602 rval = qla2x00_mailbox_command(vha, mcp);
5604 if (rval != QLA_SUCCESS) {
5605 ql_dbg(ql_dbg_mbx, vha, 0x1144,
5606 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5607 rval, mcp->mb[0], mcp->mb[1]);
5608 ha->isp_ops->fw_dump(vha, 0);
5610 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
5617 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
5618 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
5622 mbx_cmd_t *mcp = &mc;
5623 uint8_t subcode = (uint8_t)options;
5624 struct qla_hw_data *ha = vha->hw;
5626 if (!IS_QLA8031(ha))
5627 return QLA_FUNCTION_FAILED;
5629 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5631 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5632 mcp->mb[1] = options;
5633 mcp->out_mb = MBX_1|MBX_0;
5634 if (subcode & BIT_2) {
5635 mcp->mb[2] = LSW(start_addr);
5636 mcp->mb[3] = MSW(start_addr);
5637 mcp->mb[4] = LSW(end_addr);
5638 mcp->mb[5] = MSW(end_addr);
5639 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5641 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5642 if (!(subcode & (BIT_2 | BIT_5)))
5643 mcp->in_mb |= MBX_4|MBX_3;
5644 mcp->tov = MBX_TOV_SECONDS;
5646 rval = qla2x00_mailbox_command(vha, mcp);
5648 if (rval != QLA_SUCCESS) {
5649 ql_dbg(ql_dbg_mbx, vha, 0x1147,
5650 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5651 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5653 ha->isp_ops->fw_dump(vha, 0);
5655 if (subcode & BIT_5)
5656 *sector_size = mcp->mb[1];
5657 else if (subcode & (BIT_6 | BIT_7)) {
5658 ql_dbg(ql_dbg_mbx, vha, 0x1148,
5659 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5660 } else if (subcode & (BIT_3 | BIT_4)) {
5661 ql_dbg(ql_dbg_mbx, vha, 0x1149,
5662 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5664 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5671 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5676 mbx_cmd_t *mcp = &mc;
5678 if (!IS_MCTP_CAPABLE(vha->hw))
5679 return QLA_FUNCTION_FAILED;
5681 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5682 "Entered %s.\n", __func__);
5684 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5685 mcp->mb[1] = LSW(addr);
5686 mcp->mb[2] = MSW(req_dma);
5687 mcp->mb[3] = LSW(req_dma);
5688 mcp->mb[4] = MSW(size);
5689 mcp->mb[5] = LSW(size);
5690 mcp->mb[6] = MSW(MSD(req_dma));
5691 mcp->mb[7] = LSW(MSD(req_dma));
5692 mcp->mb[8] = MSW(addr);
5693 /* Setting RAM ID to valid */
5694 mcp->mb[10] |= BIT_7;
5695 /* For MCTP RAM ID is 0x40 */
5696 mcp->mb[10] |= 0x40;
5698 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5702 mcp->tov = MBX_TOV_SECONDS;
5704 rval = qla2x00_mailbox_command(vha, mcp);
5706 if (rval != QLA_SUCCESS) {
5707 ql_dbg(ql_dbg_mbx, vha, 0x114e,
5708 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5710 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
5711 "Done %s.\n", __func__);