2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
8 #include "qla_target.h"
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
15 * qla2x00_mailbox_command
16 * Issue mailbox command and waits for completion.
19 * ha = adapter block pointer.
20 * mcp = driver internal mbx struct pointer.
23 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
26 * 0 : QLA_SUCCESS = cmd performed success
27 * 1 : QLA_FUNCTION_FAILED (error encountered)
28 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
34 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
37 unsigned long flags = 0;
43 uint16_t __iomem *optr;
46 uint16_t __iomem *mbx_reg;
47 unsigned long wait_time;
48 struct qla_hw_data *ha = vha->hw;
49 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
52 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
54 if (ha->pdev->error_state > pci_channel_io_frozen) {
55 ql_log(ql_log_warn, vha, 0x1001,
56 "error_state is greater than pci_channel_io_frozen, "
58 return QLA_FUNCTION_TIMEOUT;
61 if (vha->device_flags & DFLG_DEV_FAILED) {
62 ql_log(ql_log_warn, vha, 0x1002,
63 "Device in failed state, exiting.\n");
64 return QLA_FUNCTION_TIMEOUT;
68 io_lock_on = base_vha->flags.init_done;
71 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1003,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
80 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1004,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 return QLA_FUNCTION_TIMEOUT;
89 * Wait for active mailbox commands to finish by waiting at most tov
90 * seconds. This is to serialize actual issuing of mailbox cmds during
93 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
94 /* Timeout occurred. Return error. */
95 ql_log(ql_log_warn, vha, 0x1005,
96 "Cmd access timeout, cmd=0x%x, Exiting.\n",
98 return QLA_FUNCTION_TIMEOUT;
101 ha->flags.mbox_busy = 1;
102 /* Save mailbox command for debug */
105 ql_dbg(ql_dbg_mbx, vha, 0x1006,
106 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108 spin_lock_irqsave(&ha->hardware_lock, flags);
110 /* Load mailbox registers. */
112 optr = (uint16_t __iomem *)®->isp82.mailbox_in[0];
113 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
114 optr = (uint16_t __iomem *)®->isp24.mailbox0;
116 optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0);
119 command = mcp->mb[0];
120 mboxes = mcp->out_mb;
122 ql_dbg(ql_dbg_mbx, vha, 0x1111,
123 "Mailbox registers (OUT):\n");
124 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
125 if (IS_QLA2200(ha) && cnt == 8)
127 (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8);
128 if (mboxes & BIT_0) {
129 ql_dbg(ql_dbg_mbx, vha, 0x1112,
130 "mbox[%d]<-0x%04x\n", cnt, *iptr);
131 WRT_REG_WORD(optr, *iptr);
139 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
140 "I/O Address = %p.\n", optr);
142 /* Issue set host interrupt command to send cmd out. */
143 ha->flags.mbox_int = 0;
144 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
146 /* Unlock mbx registers and wait for interrupt */
147 ql_dbg(ql_dbg_mbx, vha, 0x100f,
148 "Going to unlock irq & waiting for interrupts. "
149 "jiffies=%lx.\n", jiffies);
151 /* Wait for mbx cmd completion until timeout */
153 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
154 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
156 if (IS_P3P_TYPE(ha)) {
157 if (RD_REG_DWORD(®->isp82.hint) &
158 HINT_MBX_INT_PENDING) {
159 spin_unlock_irqrestore(&ha->hardware_lock,
161 ha->flags.mbox_busy = 0;
162 ql_dbg(ql_dbg_mbx, vha, 0x1010,
163 "Pending mailbox timeout, exiting.\n");
164 rval = QLA_FUNCTION_TIMEOUT;
167 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
168 } else if (IS_FWI2_CAPABLE(ha))
169 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
171 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
172 spin_unlock_irqrestore(&ha->hardware_lock, flags);
174 if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
176 ql_dbg(ql_dbg_mbx, vha, 0x117a,
177 "cmd=%x Timeout.\n", command);
178 spin_lock_irqsave(&ha->hardware_lock, flags);
179 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
180 spin_unlock_irqrestore(&ha->hardware_lock, flags);
183 ql_dbg(ql_dbg_mbx, vha, 0x1011,
184 "Cmd=%x Polling Mode.\n", command);
186 if (IS_P3P_TYPE(ha)) {
187 if (RD_REG_DWORD(®->isp82.hint) &
188 HINT_MBX_INT_PENDING) {
189 spin_unlock_irqrestore(&ha->hardware_lock,
191 ha->flags.mbox_busy = 0;
192 ql_dbg(ql_dbg_mbx, vha, 0x1012,
193 "Pending mailbox timeout, exiting.\n");
194 rval = QLA_FUNCTION_TIMEOUT;
197 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
198 } else if (IS_FWI2_CAPABLE(ha))
199 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
201 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
202 spin_unlock_irqrestore(&ha->hardware_lock, flags);
204 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
205 while (!ha->flags.mbox_int) {
206 if (time_after(jiffies, wait_time))
209 /* Check for pending interrupts. */
210 qla2x00_poll(ha->rsp_q_map[0]);
212 if (!ha->flags.mbox_int &&
214 command == MBC_LOAD_RISC_RAM_EXTENDED))
217 ql_dbg(ql_dbg_mbx, vha, 0x1013,
219 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
222 /* Check whether we timed out */
223 if (ha->flags.mbox_int) {
226 ql_dbg(ql_dbg_mbx, vha, 0x1014,
227 "Cmd=%x completed.\n", command);
229 /* Got interrupt. Clear the flag. */
230 ha->flags.mbox_int = 0;
231 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
233 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
234 ha->flags.mbox_busy = 0;
235 /* Setting Link-Down error */
236 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
238 rval = QLA_FUNCTION_FAILED;
239 ql_log(ql_log_warn, vha, 0x1015,
240 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
244 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
245 rval = QLA_FUNCTION_FAILED;
247 /* Load return mailbox registers. */
249 iptr = (uint16_t *)&ha->mailbox_out[0];
252 ql_dbg(ql_dbg_mbx, vha, 0x1113,
253 "Mailbox registers (IN):\n");
254 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
255 if (mboxes & BIT_0) {
257 ql_dbg(ql_dbg_mbx, vha, 0x1114,
258 "mbox[%d]->0x%04x\n", cnt, *iptr2);
270 if (IS_FWI2_CAPABLE(ha)) {
271 mb0 = RD_REG_WORD(®->isp24.mailbox0);
272 ictrl = RD_REG_DWORD(®->isp24.ictrl);
274 mb0 = RD_MAILBOX_REG(ha, ®->isp, 0);
275 ictrl = RD_REG_WORD(®->isp.ictrl);
277 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
278 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
279 "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
280 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
283 * Attempt to capture a firmware dump for further analysis
284 * of the current firmware state. We do not need to do this
285 * if we are intentionally generating a dump.
287 if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
288 ha->isp_ops->fw_dump(vha, 0);
290 rval = QLA_FUNCTION_TIMEOUT;
293 ha->flags.mbox_busy = 0;
298 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
299 ql_dbg(ql_dbg_mbx, vha, 0x101a,
300 "Checking for additional resp interrupt.\n");
302 /* polling mode for non isp_abort commands. */
303 qla2x00_poll(ha->rsp_q_map[0]);
306 if (rval == QLA_FUNCTION_TIMEOUT &&
307 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
308 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
309 ha->flags.eeh_busy) {
310 /* not in dpc. schedule it for dpc to take over. */
311 ql_dbg(ql_dbg_mbx, vha, 0x101b,
312 "Timeout, schedule isp_abort_needed.\n");
314 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
315 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
316 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
317 if (IS_QLA82XX(ha)) {
318 ql_dbg(ql_dbg_mbx, vha, 0x112a,
319 "disabling pause transmit on port "
322 QLA82XX_CRB_NIU + 0x98,
323 CRB_NIU_XG_PAUSE_CTL_P0|
324 CRB_NIU_XG_PAUSE_CTL_P1);
326 ql_log(ql_log_info, base_vha, 0x101c,
327 "Mailbox cmd timeout occurred, cmd=0x%x, "
328 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
329 "abort.\n", command, mcp->mb[0],
331 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
332 qla2xxx_wake_dpc(vha);
334 } else if (!abort_active) {
335 /* call abort directly since we are in the DPC thread */
336 ql_dbg(ql_dbg_mbx, vha, 0x101d,
337 "Timeout, calling abort_isp.\n");
339 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
340 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
341 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
342 if (IS_QLA82XX(ha)) {
343 ql_dbg(ql_dbg_mbx, vha, 0x112b,
344 "disabling pause transmit on port "
347 QLA82XX_CRB_NIU + 0x98,
348 CRB_NIU_XG_PAUSE_CTL_P0|
349 CRB_NIU_XG_PAUSE_CTL_P1);
351 ql_log(ql_log_info, base_vha, 0x101e,
352 "Mailbox cmd timeout occurred, cmd=0x%x, "
353 "mb[0]=0x%x. Scheduling ISP abort ",
354 command, mcp->mb[0]);
355 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
356 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
357 /* Allow next mbx cmd to come in. */
358 complete(&ha->mbx_cmd_comp);
359 if (ha->isp_ops->abort_isp(vha)) {
360 /* Failed. retry later. */
361 set_bit(ISP_ABORT_NEEDED,
364 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
365 ql_dbg(ql_dbg_mbx, vha, 0x101f,
366 "Finished abort_isp.\n");
373 /* Allow next mbx cmd to come in. */
374 complete(&ha->mbx_cmd_comp);
378 ql_dbg(ql_dbg_disc, base_vha, 0x1020,
379 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
380 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
382 ql_dbg(ql_dbg_disc, vha, 0x1115,
383 "host status: 0x%x, flags:0x%lx, intr ctrl reg:0x%x, intr status:0x%x\n",
384 RD_REG_DWORD(®->isp24.host_status),
385 ha->fw_dump_cap_flags,
386 RD_REG_DWORD(®->isp24.ictrl),
387 RD_REG_DWORD(®->isp24.istatus));
389 mbx_reg = ®->isp24.mailbox0;
390 for (i = 0; i < 6; i++)
391 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x1116,
392 "mbox[%d] 0x%04x\n", i, RD_REG_WORD(mbx_reg++));
394 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
401 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
402 uint32_t risc_code_size)
405 struct qla_hw_data *ha = vha->hw;
407 mbx_cmd_t *mcp = &mc;
409 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
410 "Entered %s.\n", __func__);
412 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
413 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
414 mcp->mb[8] = MSW(risc_addr);
415 mcp->out_mb = MBX_8|MBX_0;
417 mcp->mb[0] = MBC_LOAD_RISC_RAM;
420 mcp->mb[1] = LSW(risc_addr);
421 mcp->mb[2] = MSW(req_dma);
422 mcp->mb[3] = LSW(req_dma);
423 mcp->mb[6] = MSW(MSD(req_dma));
424 mcp->mb[7] = LSW(MSD(req_dma));
425 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
426 if (IS_FWI2_CAPABLE(ha)) {
427 mcp->mb[4] = MSW(risc_code_size);
428 mcp->mb[5] = LSW(risc_code_size);
429 mcp->out_mb |= MBX_5|MBX_4;
431 mcp->mb[4] = LSW(risc_code_size);
432 mcp->out_mb |= MBX_4;
436 mcp->tov = MBX_TOV_SECONDS;
438 rval = qla2x00_mailbox_command(vha, mcp);
440 if (rval != QLA_SUCCESS) {
441 ql_dbg(ql_dbg_mbx, vha, 0x1023,
442 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
444 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
445 "Done %s.\n", __func__);
451 #define EXTENDED_BB_CREDITS BIT_0
454 * Start adapter firmware.
457 * ha = adapter block pointer.
458 * TARGET_QUEUE_LOCK must be released.
459 * ADAPTER_STATE_LOCK must be released.
462 * qla2x00 local function return status code.
468 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
471 struct qla_hw_data *ha = vha->hw;
473 mbx_cmd_t *mcp = &mc;
475 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
476 "Entered %s.\n", __func__);
478 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
481 if (IS_FWI2_CAPABLE(ha)) {
482 mcp->mb[1] = MSW(risc_addr);
483 mcp->mb[2] = LSW(risc_addr);
485 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
487 struct nvram_81xx *nv = ha->nvram;
488 mcp->mb[4] = (nv->enhanced_features &
489 EXTENDED_BB_CREDITS);
493 if (ha->flags.exlogins_enabled)
494 mcp->mb[4] |= ENABLE_EXTENDED_LOGIN;
496 if (ha->flags.exchoffld_enabled)
497 mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD;
499 mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
502 mcp->mb[1] = LSW(risc_addr);
503 mcp->out_mb |= MBX_1;
504 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
506 mcp->out_mb |= MBX_2;
510 mcp->tov = MBX_TOV_SECONDS;
512 rval = qla2x00_mailbox_command(vha, mcp);
514 if (rval != QLA_SUCCESS) {
515 ql_dbg(ql_dbg_mbx, vha, 0x1026,
516 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
518 if (IS_FWI2_CAPABLE(ha)) {
519 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
520 "Done exchanges=%x.\n", mcp->mb[1]);
522 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
523 "Done %s.\n", __func__);
531 * qla_get_exlogin_status
532 * Get extended login status
533 * uses the memory offload control/status Mailbox
536 * ha: adapter state pointer.
537 * fwopt: firmware options
540 * qla2x00 local function status
545 #define FETCH_XLOGINS_STAT 0x8
547 qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
548 uint16_t *ex_logins_cnt)
552 mbx_cmd_t *mcp = &mc;
554 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f,
555 "Entered %s\n", __func__);
557 memset(mcp->mb, 0 , sizeof(mcp->mb));
558 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
559 mcp->mb[1] = FETCH_XLOGINS_STAT;
560 mcp->out_mb = MBX_1|MBX_0;
561 mcp->in_mb = MBX_10|MBX_4|MBX_0;
562 mcp->tov = MBX_TOV_SECONDS;
565 rval = qla2x00_mailbox_command(vha, mcp);
566 if (rval != QLA_SUCCESS) {
567 ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval);
569 *buf_sz = mcp->mb[4];
570 *ex_logins_cnt = mcp->mb[10];
572 ql_log(ql_log_info, vha, 0x1190,
573 "buffer size 0x%x, exchange login count=%d\n",
574 mcp->mb[4], mcp->mb[10]);
576 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116,
577 "Done %s.\n", __func__);
584 * qla_set_exlogin_mem_cfg
585 * set extended login memory configuration
586 * Mbx needs to be issues before init_cb is set
589 * ha: adapter state pointer.
590 * buffer: buffer pointer
591 * phys_addr: physical address of buffer
592 * size: size of buffer
593 * TARGET_QUEUE_LOCK must be released
594 * ADAPTER_STATE_LOCK must be release
597 * qla2x00 local funxtion status code.
602 #define CONFIG_XLOGINS_MEM 0x3
604 qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
608 mbx_cmd_t *mcp = &mc;
609 struct qla_hw_data *ha = vha->hw;
610 int configured_count;
612 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
613 "Entered %s.\n", __func__);
615 memset(mcp->mb, 0 , sizeof(mcp->mb));
616 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
617 mcp->mb[1] = CONFIG_XLOGINS_MEM;
618 mcp->mb[2] = MSW(phys_addr);
619 mcp->mb[3] = LSW(phys_addr);
620 mcp->mb[6] = MSW(MSD(phys_addr));
621 mcp->mb[7] = LSW(MSD(phys_addr));
622 mcp->mb[8] = MSW(ha->exlogin_size);
623 mcp->mb[9] = LSW(ha->exlogin_size);
624 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
625 mcp->in_mb = MBX_11|MBX_0;
626 mcp->tov = MBX_TOV_SECONDS;
628 rval = qla2x00_mailbox_command(vha, mcp);
629 if (rval != QLA_SUCCESS) {
631 ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
633 configured_count = mcp->mb[11];
634 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
635 "Done %s.\n", __func__);
642 * qla_get_exchoffld_status
643 * Get exchange offload status
644 * uses the memory offload control/status Mailbox
647 * ha: adapter state pointer.
648 * fwopt: firmware options
651 * qla2x00 local function status
656 #define FETCH_XCHOFFLD_STAT 0x2
658 qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
659 uint16_t *ex_logins_cnt)
663 mbx_cmd_t *mcp = &mc;
665 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019,
666 "Entered %s\n", __func__);
668 memset(mcp->mb, 0 , sizeof(mcp->mb));
669 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
670 mcp->mb[1] = FETCH_XCHOFFLD_STAT;
671 mcp->out_mb = MBX_1|MBX_0;
672 mcp->in_mb = MBX_10|MBX_4|MBX_0;
673 mcp->tov = MBX_TOV_SECONDS;
676 rval = qla2x00_mailbox_command(vha, mcp);
677 if (rval != QLA_SUCCESS) {
678 ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval);
680 *buf_sz = mcp->mb[4];
681 *ex_logins_cnt = mcp->mb[10];
683 ql_log(ql_log_info, vha, 0x118e,
684 "buffer size 0x%x, exchange offload count=%d\n",
685 mcp->mb[4], mcp->mb[10]);
687 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156,
688 "Done %s.\n", __func__);
695 * qla_set_exchoffld_mem_cfg
696 * Set exchange offload memory configuration
697 * Mbx needs to be issues before init_cb is set
700 * ha: adapter state pointer.
701 * buffer: buffer pointer
702 * phys_addr: physical address of buffer
703 * size: size of buffer
704 * TARGET_QUEUE_LOCK must be released
705 * ADAPTER_STATE_LOCK must be release
708 * qla2x00 local funxtion status code.
713 #define CONFIG_XCHOFFLD_MEM 0x3
715 qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
719 mbx_cmd_t *mcp = &mc;
720 struct qla_hw_data *ha = vha->hw;
722 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157,
723 "Entered %s.\n", __func__);
725 memset(mcp->mb, 0 , sizeof(mcp->mb));
726 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
727 mcp->mb[1] = CONFIG_XCHOFFLD_MEM;
728 mcp->mb[2] = MSW(phys_addr);
729 mcp->mb[3] = LSW(phys_addr);
730 mcp->mb[6] = MSW(MSD(phys_addr));
731 mcp->mb[7] = LSW(MSD(phys_addr));
732 mcp->mb[8] = MSW(ha->exlogin_size);
733 mcp->mb[9] = LSW(ha->exlogin_size);
734 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
735 mcp->in_mb = MBX_11|MBX_0;
736 mcp->tov = MBX_TOV_SECONDS;
738 rval = qla2x00_mailbox_command(vha, mcp);
739 if (rval != QLA_SUCCESS) {
741 ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval);
743 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
744 "Done %s.\n", __func__);
751 * qla2x00_get_fw_version
752 * Get firmware version.
755 * ha: adapter state pointer.
756 * major: pointer for major number.
757 * minor: pointer for minor number.
758 * subminor: pointer for subminor number.
761 * qla2x00 local function return status code.
767 qla2x00_get_fw_version(scsi_qla_host_t *vha)
771 mbx_cmd_t *mcp = &mc;
772 struct qla_hw_data *ha = vha->hw;
774 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
775 "Entered %s.\n", __func__);
777 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
779 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
780 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
781 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
782 if (IS_FWI2_CAPABLE(ha))
783 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
785 mcp->in_mb |= MBX_23 | MBX_22 | MBX_21 | MBX_20 | MBX_19 |
786 MBX_18 | MBX_14 | MBX_13 | MBX_11 | MBX_10 | MBX_9 | MBX_8;
789 mcp->tov = MBX_TOV_SECONDS;
790 rval = qla2x00_mailbox_command(vha, mcp);
791 if (rval != QLA_SUCCESS)
794 /* Return mailbox data. */
795 ha->fw_major_version = mcp->mb[1];
796 ha->fw_minor_version = mcp->mb[2];
797 ha->fw_subminor_version = mcp->mb[3];
798 ha->fw_attributes = mcp->mb[6];
799 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
800 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
802 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
804 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
805 ha->mpi_version[0] = mcp->mb[10] & 0xff;
806 ha->mpi_version[1] = mcp->mb[11] >> 8;
807 ha->mpi_version[2] = mcp->mb[11] & 0xff;
808 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
809 ha->phy_version[0] = mcp->mb[8] & 0xff;
810 ha->phy_version[1] = mcp->mb[9] >> 8;
811 ha->phy_version[2] = mcp->mb[9] & 0xff;
814 if (IS_FWI2_CAPABLE(ha)) {
815 ha->fw_attributes_h = mcp->mb[15];
816 ha->fw_attributes_ext[0] = mcp->mb[16];
817 ha->fw_attributes_ext[1] = mcp->mb[17];
818 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
819 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
820 __func__, mcp->mb[15], mcp->mb[6]);
821 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
822 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
823 __func__, mcp->mb[17], mcp->mb[16]);
825 if (ha->fw_attributes_h & 0x4)
826 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d,
827 "%s: Firmware supports Extended Login 0x%x\n",
828 __func__, ha->fw_attributes_h);
830 if (ha->fw_attributes_h & 0x8)
831 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191,
832 "%s: Firmware supports Exchange Offload 0x%x\n",
833 __func__, ha->fw_attributes_h);
836 if (IS_QLA27XX(ha)) {
837 ha->mpi_version[0] = mcp->mb[10] & 0xff;
838 ha->mpi_version[1] = mcp->mb[11] >> 8;
839 ha->mpi_version[2] = mcp->mb[11] & 0xff;
840 ha->pep_version[0] = mcp->mb[13] & 0xff;
841 ha->pep_version[1] = mcp->mb[14] >> 8;
842 ha->pep_version[2] = mcp->mb[14] & 0xff;
843 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
844 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
848 if (rval != QLA_SUCCESS) {
850 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
853 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
854 "Done %s.\n", __func__);
860 * qla2x00_get_fw_options
861 * Set firmware options.
864 * ha = adapter block pointer.
865 * fwopt = pointer for firmware options.
868 * qla2x00 local function return status code.
874 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
878 mbx_cmd_t *mcp = &mc;
880 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
881 "Entered %s.\n", __func__);
883 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
885 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
886 mcp->tov = MBX_TOV_SECONDS;
888 rval = qla2x00_mailbox_command(vha, mcp);
890 if (rval != QLA_SUCCESS) {
892 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
894 fwopts[0] = mcp->mb[0];
895 fwopts[1] = mcp->mb[1];
896 fwopts[2] = mcp->mb[2];
897 fwopts[3] = mcp->mb[3];
899 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
900 "Done %s.\n", __func__);
908 * qla2x00_set_fw_options
909 * Set firmware options.
912 * ha = adapter block pointer.
913 * fwopt = pointer for firmware options.
916 * qla2x00 local function return status code.
922 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
926 mbx_cmd_t *mcp = &mc;
928 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
929 "Entered %s.\n", __func__);
931 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
932 mcp->mb[1] = fwopts[1];
933 mcp->mb[2] = fwopts[2];
934 mcp->mb[3] = fwopts[3];
935 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
937 if (IS_FWI2_CAPABLE(vha->hw)) {
940 mcp->mb[10] = fwopts[10];
941 mcp->mb[11] = fwopts[11];
942 mcp->mb[12] = 0; /* Undocumented, but used */
943 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
945 mcp->tov = MBX_TOV_SECONDS;
947 rval = qla2x00_mailbox_command(vha, mcp);
949 fwopts[0] = mcp->mb[0];
951 if (rval != QLA_SUCCESS) {
953 ql_dbg(ql_dbg_mbx, vha, 0x1030,
954 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
957 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
958 "Done %s.\n", __func__);
965 * qla2x00_mbx_reg_test
966 * Mailbox register wrap test.
969 * ha = adapter block pointer.
970 * TARGET_QUEUE_LOCK must be released.
971 * ADAPTER_STATE_LOCK must be released.
974 * qla2x00 local function return status code.
980 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
984 mbx_cmd_t *mcp = &mc;
986 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
987 "Entered %s.\n", __func__);
989 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
997 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
998 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
999 mcp->tov = MBX_TOV_SECONDS;
1001 rval = qla2x00_mailbox_command(vha, mcp);
1003 if (rval == QLA_SUCCESS) {
1004 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
1005 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
1006 rval = QLA_FUNCTION_FAILED;
1007 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
1008 mcp->mb[7] != 0x2525)
1009 rval = QLA_FUNCTION_FAILED;
1012 if (rval != QLA_SUCCESS) {
1014 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
1017 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
1018 "Done %s.\n", __func__);
1025 * qla2x00_verify_checksum
1026 * Verify firmware checksum.
1029 * ha = adapter block pointer.
1030 * TARGET_QUEUE_LOCK must be released.
1031 * ADAPTER_STATE_LOCK must be released.
1034 * qla2x00 local function return status code.
1040 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
1044 mbx_cmd_t *mcp = &mc;
1046 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
1047 "Entered %s.\n", __func__);
1049 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1050 mcp->out_mb = MBX_0;
1052 if (IS_FWI2_CAPABLE(vha->hw)) {
1053 mcp->mb[1] = MSW(risc_addr);
1054 mcp->mb[2] = LSW(risc_addr);
1055 mcp->out_mb |= MBX_2|MBX_1;
1056 mcp->in_mb |= MBX_2|MBX_1;
1058 mcp->mb[1] = LSW(risc_addr);
1059 mcp->out_mb |= MBX_1;
1060 mcp->in_mb |= MBX_1;
1063 mcp->tov = MBX_TOV_SECONDS;
1065 rval = qla2x00_mailbox_command(vha, mcp);
1067 if (rval != QLA_SUCCESS) {
1068 ql_dbg(ql_dbg_mbx, vha, 0x1036,
1069 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
1070 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
1072 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
1073 "Done %s.\n", __func__);
1080 * qla2x00_issue_iocb
1081 * Issue IOCB using mailbox command
1084 * ha = adapter state pointer.
1085 * buffer = buffer pointer.
1086 * phys_addr = physical address of buffer.
1087 * size = size of buffer.
1088 * TARGET_QUEUE_LOCK must be released.
1089 * ADAPTER_STATE_LOCK must be released.
1092 * qla2x00 local function return status code.
1098 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
1099 dma_addr_t phys_addr, size_t size, uint32_t tov)
1103 mbx_cmd_t *mcp = &mc;
1105 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
1106 "Entered %s.\n", __func__);
1108 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
1110 mcp->mb[2] = MSW(phys_addr);
1111 mcp->mb[3] = LSW(phys_addr);
1112 mcp->mb[6] = MSW(MSD(phys_addr));
1113 mcp->mb[7] = LSW(MSD(phys_addr));
1114 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1115 mcp->in_mb = MBX_2|MBX_0;
1118 rval = qla2x00_mailbox_command(vha, mcp);
1120 if (rval != QLA_SUCCESS) {
1122 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
1124 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
1126 /* Mask reserved bits. */
1127 sts_entry->entry_status &=
1128 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
1129 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
1130 "Done %s.\n", __func__);
1137 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
1140 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
1145 * qla2x00_abort_command
1146 * Abort command aborts a specified IOCB.
1149 * ha = adapter block pointer.
1150 * sp = SB structure pointer.
1153 * qla2x00 local function return status code.
1159 qla2x00_abort_command(srb_t *sp)
1161 unsigned long flags = 0;
1163 uint32_t handle = 0;
1165 mbx_cmd_t *mcp = &mc;
1166 fc_port_t *fcport = sp->fcport;
1167 scsi_qla_host_t *vha = fcport->vha;
1168 struct qla_hw_data *ha = vha->hw;
1169 struct req_que *req = vha->req;
1170 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1172 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
1173 "Entered %s.\n", __func__);
1175 spin_lock_irqsave(&ha->hardware_lock, flags);
1176 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1177 if (req->outstanding_cmds[handle] == sp)
1180 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1182 if (handle == req->num_outstanding_cmds) {
1183 /* command not found */
1184 return QLA_FUNCTION_FAILED;
1187 mcp->mb[0] = MBC_ABORT_COMMAND;
1188 if (HAS_EXTENDED_IDS(ha))
1189 mcp->mb[1] = fcport->loop_id;
1191 mcp->mb[1] = fcport->loop_id << 8;
1192 mcp->mb[2] = (uint16_t)handle;
1193 mcp->mb[3] = (uint16_t)(handle >> 16);
1194 mcp->mb[6] = (uint16_t)cmd->device->lun;
1195 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1197 mcp->tov = MBX_TOV_SECONDS;
1199 rval = qla2x00_mailbox_command(vha, mcp);
1201 if (rval != QLA_SUCCESS) {
1202 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
1204 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
1205 "Done %s.\n", __func__);
1212 qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
1216 mbx_cmd_t *mcp = &mc;
1217 scsi_qla_host_t *vha;
1218 struct req_que *req;
1219 struct rsp_que *rsp;
1224 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
1225 "Entered %s.\n", __func__);
1227 req = vha->hw->req_q_map[0];
1229 mcp->mb[0] = MBC_ABORT_TARGET;
1230 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
1231 if (HAS_EXTENDED_IDS(vha->hw)) {
1232 mcp->mb[1] = fcport->loop_id;
1234 mcp->out_mb |= MBX_10;
1236 mcp->mb[1] = fcport->loop_id << 8;
1238 mcp->mb[2] = vha->hw->loop_reset_delay;
1239 mcp->mb[9] = vha->vp_idx;
1242 mcp->tov = MBX_TOV_SECONDS;
1244 rval = qla2x00_mailbox_command(vha, mcp);
1245 if (rval != QLA_SUCCESS) {
1246 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
1247 "Failed=%x.\n", rval);
1250 /* Issue marker IOCB. */
1251 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
1253 if (rval2 != QLA_SUCCESS) {
1254 ql_dbg(ql_dbg_mbx, vha, 0x1040,
1255 "Failed to issue marker IOCB (%x).\n", rval2);
1257 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
1258 "Done %s.\n", __func__);
1265 qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1269 mbx_cmd_t *mcp = &mc;
1270 scsi_qla_host_t *vha;
1271 struct req_que *req;
1272 struct rsp_que *rsp;
1276 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1277 "Entered %s.\n", __func__);
1279 req = vha->hw->req_q_map[0];
1281 mcp->mb[0] = MBC_LUN_RESET;
1282 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1283 if (HAS_EXTENDED_IDS(vha->hw))
1284 mcp->mb[1] = fcport->loop_id;
1286 mcp->mb[1] = fcport->loop_id << 8;
1287 mcp->mb[2] = (u32)l;
1289 mcp->mb[9] = vha->vp_idx;
1292 mcp->tov = MBX_TOV_SECONDS;
1294 rval = qla2x00_mailbox_command(vha, mcp);
1295 if (rval != QLA_SUCCESS) {
1296 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1299 /* Issue marker IOCB. */
1300 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1302 if (rval2 != QLA_SUCCESS) {
1303 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1304 "Failed to issue marker IOCB (%x).\n", rval2);
1306 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1307 "Done %s.\n", __func__);
1314 * qla2x00_get_adapter_id
1315 * Get adapter ID and topology.
1318 * ha = adapter block pointer.
1319 * id = pointer for loop ID.
1320 * al_pa = pointer for AL_PA.
1321 * area = pointer for area.
1322 * domain = pointer for domain.
1323 * top = pointer for topology.
1324 * TARGET_QUEUE_LOCK must be released.
1325 * ADAPTER_STATE_LOCK must be released.
1328 * qla2x00 local function return status code.
1334 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1335 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1339 mbx_cmd_t *mcp = &mc;
1341 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1342 "Entered %s.\n", __func__);
1344 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1345 mcp->mb[9] = vha->vp_idx;
1346 mcp->out_mb = MBX_9|MBX_0;
1347 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1348 if (IS_CNA_CAPABLE(vha->hw))
1349 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1350 if (IS_FWI2_CAPABLE(vha->hw))
1351 mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1352 if (IS_QLA27XX(vha->hw))
1353 mcp->in_mb |= MBX_15;
1354 mcp->tov = MBX_TOV_SECONDS;
1356 rval = qla2x00_mailbox_command(vha, mcp);
1357 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1358 rval = QLA_COMMAND_ERROR;
1359 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1360 rval = QLA_INVALID_COMMAND;
1364 *al_pa = LSB(mcp->mb[2]);
1365 *area = MSB(mcp->mb[2]);
1366 *domain = LSB(mcp->mb[3]);
1368 *sw_cap = mcp->mb[7];
1370 if (rval != QLA_SUCCESS) {
1372 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1374 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1375 "Done %s.\n", __func__);
1377 if (IS_CNA_CAPABLE(vha->hw)) {
1378 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1379 vha->fcoe_fcf_idx = mcp->mb[10];
1380 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1381 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1382 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1383 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1384 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1385 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1387 /* If FA-WWN supported */
1388 if (IS_FAWWN_CAPABLE(vha->hw)) {
1389 if (mcp->mb[7] & BIT_14) {
1390 vha->port_name[0] = MSB(mcp->mb[16]);
1391 vha->port_name[1] = LSB(mcp->mb[16]);
1392 vha->port_name[2] = MSB(mcp->mb[17]);
1393 vha->port_name[3] = LSB(mcp->mb[17]);
1394 vha->port_name[4] = MSB(mcp->mb[18]);
1395 vha->port_name[5] = LSB(mcp->mb[18]);
1396 vha->port_name[6] = MSB(mcp->mb[19]);
1397 vha->port_name[7] = LSB(mcp->mb[19]);
1398 fc_host_port_name(vha->host) =
1399 wwn_to_u64(vha->port_name);
1400 ql_dbg(ql_dbg_mbx, vha, 0x10ca,
1401 "FA-WWN acquired %016llx\n",
1402 wwn_to_u64(vha->port_name));
1406 if (IS_QLA27XX(vha->hw))
1407 vha->bbcr = mcp->mb[15];
1414 * qla2x00_get_retry_cnt
1415 * Get current firmware login retry count and delay.
1418 * ha = adapter block pointer.
1419 * retry_cnt = pointer to login retry count.
1420 * tov = pointer to login timeout value.
1423 * qla2x00 local function return status code.
1429 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1435 mbx_cmd_t *mcp = &mc;
1437 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1438 "Entered %s.\n", __func__);
1440 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1441 mcp->out_mb = MBX_0;
1442 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1443 mcp->tov = MBX_TOV_SECONDS;
1445 rval = qla2x00_mailbox_command(vha, mcp);
1447 if (rval != QLA_SUCCESS) {
1449 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1450 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1452 /* Convert returned data and check our values. */
1453 *r_a_tov = mcp->mb[3] / 2;
1454 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1455 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1456 /* Update to the larger values */
1457 *retry_cnt = (uint8_t)mcp->mb[1];
1461 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1462 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1469 * qla2x00_init_firmware
1470 * Initialize adapter firmware.
1473 * ha = adapter block pointer.
1474 * dptr = Initialization control block pointer.
1475 * size = size of initialization control block.
1476 * TARGET_QUEUE_LOCK must be released.
1477 * ADAPTER_STATE_LOCK must be released.
1480 * qla2x00 local function return status code.
1486 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1490 mbx_cmd_t *mcp = &mc;
1491 struct qla_hw_data *ha = vha->hw;
1493 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1494 "Entered %s.\n", __func__);
1496 if (IS_P3P_TYPE(ha) && ql2xdbwr)
1497 qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr,
1498 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1500 if (ha->flags.npiv_supported)
1501 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1503 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1506 mcp->mb[2] = MSW(ha->init_cb_dma);
1507 mcp->mb[3] = LSW(ha->init_cb_dma);
1508 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1509 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1510 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1511 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1513 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1514 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1515 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1516 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1517 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1518 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1520 /* 1 and 2 should normally be captured. */
1521 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1522 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1523 /* mb3 is additional info about the installed SFP. */
1524 mcp->in_mb |= MBX_3;
1525 mcp->buf_size = size;
1526 mcp->flags = MBX_DMA_OUT;
1527 mcp->tov = MBX_TOV_SECONDS;
1528 rval = qla2x00_mailbox_command(vha, mcp);
1530 if (rval != QLA_SUCCESS) {
1532 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1533 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1534 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1537 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1538 "Done %s.\n", __func__);
1545 * qla2x00_get_node_name_list
1546 * Issue get node name list mailbox command, kmalloc()
1547 * and return the resulting list. Caller must kfree() it!
1550 * ha = adapter state pointer.
1551 * out_data = resulting list
1552 * out_len = length of the resulting list
1555 * qla2x00 local function return status code.
1561 qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
1563 struct qla_hw_data *ha = vha->hw;
1564 struct qla_port_24xx_data *list = NULL;
1567 dma_addr_t pmap_dma;
1573 dma_size = left * sizeof(*list);
1574 pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
1575 &pmap_dma, GFP_KERNEL);
1577 ql_log(ql_log_warn, vha, 0x113f,
1578 "%s(%ld): DMA Alloc failed of %ld\n",
1579 __func__, vha->host_no, dma_size);
1580 rval = QLA_MEMORY_ALLOC_FAILED;
1584 mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
1585 mc.mb[1] = BIT_1 | BIT_3;
1586 mc.mb[2] = MSW(pmap_dma);
1587 mc.mb[3] = LSW(pmap_dma);
1588 mc.mb[6] = MSW(MSD(pmap_dma));
1589 mc.mb[7] = LSW(MSD(pmap_dma));
1590 mc.mb[8] = dma_size;
1591 mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
1592 mc.in_mb = MBX_0|MBX_1;
1594 mc.flags = MBX_DMA_IN;
1596 rval = qla2x00_mailbox_command(vha, &mc);
1597 if (rval != QLA_SUCCESS) {
1598 if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
1599 (mc.mb[1] == 0xA)) {
1600 left += le16_to_cpu(mc.mb[2]) /
1601 sizeof(struct qla_port_24xx_data);
1609 list = kmemdup(pmap, dma_size, GFP_KERNEL);
1611 ql_log(ql_log_warn, vha, 0x1140,
1612 "%s(%ld): failed to allocate node names list "
1613 "structure.\n", __func__, vha->host_no);
1614 rval = QLA_MEMORY_ALLOC_FAILED;
1619 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1623 *out_len = dma_size;
1629 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1634 * qla2x00_get_port_database
1635 * Issue normal/enhanced get port database mailbox command
1636 * and copy device name as necessary.
1639 * ha = adapter state pointer.
1640 * dev = structure pointer.
1641 * opt = enhanced cmd option byte.
1644 * qla2x00 local function return status code.
1650 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1654 mbx_cmd_t *mcp = &mc;
1655 port_database_t *pd;
1656 struct port_database_24xx *pd24;
1658 struct qla_hw_data *ha = vha->hw;
1660 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1661 "Entered %s.\n", __func__);
1664 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1666 ql_log(ql_log_warn, vha, 0x1050,
1667 "Failed to allocate port database structure.\n");
1668 return QLA_MEMORY_ALLOC_FAILED;
1670 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1672 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1673 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1674 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1675 mcp->mb[2] = MSW(pd_dma);
1676 mcp->mb[3] = LSW(pd_dma);
1677 mcp->mb[6] = MSW(MSD(pd_dma));
1678 mcp->mb[7] = LSW(MSD(pd_dma));
1679 mcp->mb[9] = vha->vp_idx;
1680 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1682 if (IS_FWI2_CAPABLE(ha)) {
1683 mcp->mb[1] = fcport->loop_id;
1685 mcp->out_mb |= MBX_10|MBX_1;
1686 mcp->in_mb |= MBX_1;
1687 } else if (HAS_EXTENDED_IDS(ha)) {
1688 mcp->mb[1] = fcport->loop_id;
1690 mcp->out_mb |= MBX_10|MBX_1;
1692 mcp->mb[1] = fcport->loop_id << 8 | opt;
1693 mcp->out_mb |= MBX_1;
1695 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1696 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1697 mcp->flags = MBX_DMA_IN;
1698 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1699 rval = qla2x00_mailbox_command(vha, mcp);
1700 if (rval != QLA_SUCCESS)
1703 if (IS_FWI2_CAPABLE(ha)) {
1705 pd24 = (struct port_database_24xx *) pd;
1707 /* Check for logged in state. */
1708 if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1709 pd24->last_login_state != PDS_PRLI_COMPLETE) {
1710 ql_dbg(ql_dbg_mbx, vha, 0x1051,
1711 "Unable to verify login-state (%x/%x) for "
1712 "loop_id %x.\n", pd24->current_login_state,
1713 pd24->last_login_state, fcport->loop_id);
1714 rval = QLA_FUNCTION_FAILED;
1718 if (fcport->loop_id == FC_NO_LOOP_ID ||
1719 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1720 memcmp(fcport->port_name, pd24->port_name, 8))) {
1721 /* We lost the device mid way. */
1722 rval = QLA_NOT_LOGGED_IN;
1726 /* Names are little-endian. */
1727 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1728 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1730 /* Get port_id of device. */
1731 fcport->d_id.b.domain = pd24->port_id[0];
1732 fcport->d_id.b.area = pd24->port_id[1];
1733 fcport->d_id.b.al_pa = pd24->port_id[2];
1734 fcport->d_id.b.rsvd_1 = 0;
1736 /* If not target must be initiator or unknown type. */
1737 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1738 fcport->port_type = FCT_INITIATOR;
1740 fcport->port_type = FCT_TARGET;
1742 /* Passback COS information. */
1743 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1744 FC_COS_CLASS2 : FC_COS_CLASS3;
1746 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1747 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1751 /* Check for logged in state. */
1752 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1753 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1754 ql_dbg(ql_dbg_mbx, vha, 0x100a,
1755 "Unable to verify login-state (%x/%x) - "
1756 "portid=%02x%02x%02x.\n", pd->master_state,
1757 pd->slave_state, fcport->d_id.b.domain,
1758 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1759 rval = QLA_FUNCTION_FAILED;
1763 if (fcport->loop_id == FC_NO_LOOP_ID ||
1764 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1765 memcmp(fcport->port_name, pd->port_name, 8))) {
1766 /* We lost the device mid way. */
1767 rval = QLA_NOT_LOGGED_IN;
1771 /* Names are little-endian. */
1772 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1773 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1775 /* Get port_id of device. */
1776 fcport->d_id.b.domain = pd->port_id[0];
1777 fcport->d_id.b.area = pd->port_id[3];
1778 fcport->d_id.b.al_pa = pd->port_id[2];
1779 fcport->d_id.b.rsvd_1 = 0;
1781 /* If not target must be initiator or unknown type. */
1782 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1783 fcport->port_type = FCT_INITIATOR;
1785 fcport->port_type = FCT_TARGET;
1787 /* Passback COS information. */
1788 fcport->supported_classes = (pd->options & BIT_4) ?
1789 FC_COS_CLASS2: FC_COS_CLASS3;
1793 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1795 if (rval != QLA_SUCCESS) {
1796 ql_dbg(ql_dbg_mbx, vha, 0x1052,
1797 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1798 mcp->mb[0], mcp->mb[1]);
1800 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1801 "Done %s.\n", __func__);
1808 * qla2x00_get_firmware_state
1809 * Get adapter firmware state.
1812 * ha = adapter block pointer.
1813 * dptr = pointer for firmware state.
1814 * TARGET_QUEUE_LOCK must be released.
1815 * ADAPTER_STATE_LOCK must be released.
1818 * qla2x00 local function return status code.
1824 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1828 mbx_cmd_t *mcp = &mc;
1830 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1831 "Entered %s.\n", __func__);
1833 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1834 mcp->out_mb = MBX_0;
1835 if (IS_FWI2_CAPABLE(vha->hw))
1836 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1838 mcp->in_mb = MBX_1|MBX_0;
1839 mcp->tov = MBX_TOV_SECONDS;
1841 rval = qla2x00_mailbox_command(vha, mcp);
1843 /* Return firmware states. */
1844 states[0] = mcp->mb[1];
1845 if (IS_FWI2_CAPABLE(vha->hw)) {
1846 states[1] = mcp->mb[2];
1847 states[2] = mcp->mb[3];
1848 states[3] = mcp->mb[4];
1849 states[4] = mcp->mb[5];
1850 states[5] = mcp->mb[6]; /* DPORT status */
1853 if (rval != QLA_SUCCESS) {
1855 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1858 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1859 "Done %s.\n", __func__);
1866 * qla2x00_get_port_name
1867 * Issue get port name mailbox command.
1868 * Returned name is in big endian format.
1871 * ha = adapter block pointer.
1872 * loop_id = loop ID of device.
1873 * name = pointer for name.
1874 * TARGET_QUEUE_LOCK must be released.
1875 * ADAPTER_STATE_LOCK must be released.
1878 * qla2x00 local function return status code.
1884 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1889 mbx_cmd_t *mcp = &mc;
1891 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1892 "Entered %s.\n", __func__);
1894 mcp->mb[0] = MBC_GET_PORT_NAME;
1895 mcp->mb[9] = vha->vp_idx;
1896 mcp->out_mb = MBX_9|MBX_1|MBX_0;
1897 if (HAS_EXTENDED_IDS(vha->hw)) {
1898 mcp->mb[1] = loop_id;
1900 mcp->out_mb |= MBX_10;
1902 mcp->mb[1] = loop_id << 8 | opt;
1905 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1906 mcp->tov = MBX_TOV_SECONDS;
1908 rval = qla2x00_mailbox_command(vha, mcp);
1910 if (rval != QLA_SUCCESS) {
1912 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1915 /* This function returns name in big endian. */
1916 name[0] = MSB(mcp->mb[2]);
1917 name[1] = LSB(mcp->mb[2]);
1918 name[2] = MSB(mcp->mb[3]);
1919 name[3] = LSB(mcp->mb[3]);
1920 name[4] = MSB(mcp->mb[6]);
1921 name[5] = LSB(mcp->mb[6]);
1922 name[6] = MSB(mcp->mb[7]);
1923 name[7] = LSB(mcp->mb[7]);
1926 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1927 "Done %s.\n", __func__);
1934 * qla24xx_link_initialization
1935 * Issue link initialization mailbox command.
1938 * ha = adapter block pointer.
1939 * TARGET_QUEUE_LOCK must be released.
1940 * ADAPTER_STATE_LOCK must be released.
1943 * qla2x00 local function return status code.
1949 qla24xx_link_initialize(scsi_qla_host_t *vha)
1953 mbx_cmd_t *mcp = &mc;
1955 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
1956 "Entered %s.\n", __func__);
1958 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
1959 return QLA_FUNCTION_FAILED;
1961 mcp->mb[0] = MBC_LINK_INITIALIZATION;
1963 if (vha->hw->operating_mode == LOOP)
1964 mcp->mb[1] |= BIT_6;
1966 mcp->mb[1] |= BIT_5;
1969 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1971 mcp->tov = MBX_TOV_SECONDS;
1973 rval = qla2x00_mailbox_command(vha, mcp);
1975 if (rval != QLA_SUCCESS) {
1976 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
1978 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
1979 "Done %s.\n", __func__);
1987 * Issue LIP reset mailbox command.
1990 * ha = adapter block pointer.
1991 * TARGET_QUEUE_LOCK must be released.
1992 * ADAPTER_STATE_LOCK must be released.
1995 * qla2x00 local function return status code.
2001 qla2x00_lip_reset(scsi_qla_host_t *vha)
2005 mbx_cmd_t *mcp = &mc;
2007 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
2008 "Entered %s.\n", __func__);
2010 if (IS_CNA_CAPABLE(vha->hw)) {
2011 /* Logout across all FCFs. */
2012 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2015 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2016 } else if (IS_FWI2_CAPABLE(vha->hw)) {
2017 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2020 mcp->mb[3] = vha->hw->loop_reset_delay;
2021 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2023 mcp->mb[0] = MBC_LIP_RESET;
2024 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2025 if (HAS_EXTENDED_IDS(vha->hw)) {
2026 mcp->mb[1] = 0x00ff;
2028 mcp->out_mb |= MBX_10;
2030 mcp->mb[1] = 0xff00;
2032 mcp->mb[2] = vha->hw->loop_reset_delay;
2036 mcp->tov = MBX_TOV_SECONDS;
2038 rval = qla2x00_mailbox_command(vha, mcp);
2040 if (rval != QLA_SUCCESS) {
2042 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
2045 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
2046 "Done %s.\n", __func__);
2057 * ha = adapter block pointer.
2058 * sns = pointer for command.
2059 * cmd_size = command size.
2060 * buf_size = response/command size.
2061 * TARGET_QUEUE_LOCK must be released.
2062 * ADAPTER_STATE_LOCK must be released.
2065 * qla2x00 local function return status code.
2071 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
2072 uint16_t cmd_size, size_t buf_size)
2076 mbx_cmd_t *mcp = &mc;
2078 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
2079 "Entered %s.\n", __func__);
2081 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
2082 "Retry cnt=%d ratov=%d total tov=%d.\n",
2083 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
2085 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
2086 mcp->mb[1] = cmd_size;
2087 mcp->mb[2] = MSW(sns_phys_address);
2088 mcp->mb[3] = LSW(sns_phys_address);
2089 mcp->mb[6] = MSW(MSD(sns_phys_address));
2090 mcp->mb[7] = LSW(MSD(sns_phys_address));
2091 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2092 mcp->in_mb = MBX_0|MBX_1;
2093 mcp->buf_size = buf_size;
2094 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
2095 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
2096 rval = qla2x00_mailbox_command(vha, mcp);
2098 if (rval != QLA_SUCCESS) {
2100 ql_dbg(ql_dbg_mbx, vha, 0x105f,
2101 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2102 rval, mcp->mb[0], mcp->mb[1]);
2105 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
2106 "Done %s.\n", __func__);
2113 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2114 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2118 struct logio_entry_24xx *lg;
2121 struct qla_hw_data *ha = vha->hw;
2122 struct req_que *req;
2124 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
2125 "Entered %s.\n", __func__);
2127 if (ha->flags.cpu_affinity_enabled)
2128 req = ha->req_q_map[0];
2132 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2134 ql_log(ql_log_warn, vha, 0x1062,
2135 "Failed to allocate login IOCB.\n");
2136 return QLA_MEMORY_ALLOC_FAILED;
2138 memset(lg, 0, sizeof(struct logio_entry_24xx));
2140 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2141 lg->entry_count = 1;
2142 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2143 lg->nport_handle = cpu_to_le16(loop_id);
2144 lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
2146 lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
2148 lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
2149 lg->port_id[0] = al_pa;
2150 lg->port_id[1] = area;
2151 lg->port_id[2] = domain;
2152 lg->vp_index = vha->vp_idx;
2153 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2154 (ha->r_a_tov / 10 * 2) + 2);
2155 if (rval != QLA_SUCCESS) {
2156 ql_dbg(ql_dbg_mbx, vha, 0x1063,
2157 "Failed to issue login IOCB (%x).\n", rval);
2158 } else if (lg->entry_status != 0) {
2159 ql_dbg(ql_dbg_mbx, vha, 0x1064,
2160 "Failed to complete IOCB -- error status (%x).\n",
2162 rval = QLA_FUNCTION_FAILED;
2163 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2164 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2165 iop[1] = le32_to_cpu(lg->io_parameter[1]);
2167 ql_dbg(ql_dbg_mbx, vha, 0x1065,
2168 "Failed to complete IOCB -- completion status (%x) "
2169 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2173 case LSC_SCODE_PORTID_USED:
2174 mb[0] = MBS_PORT_ID_USED;
2175 mb[1] = LSW(iop[1]);
2177 case LSC_SCODE_NPORT_USED:
2178 mb[0] = MBS_LOOP_ID_USED;
2180 case LSC_SCODE_NOLINK:
2181 case LSC_SCODE_NOIOCB:
2182 case LSC_SCODE_NOXCB:
2183 case LSC_SCODE_CMD_FAILED:
2184 case LSC_SCODE_NOFABRIC:
2185 case LSC_SCODE_FW_NOT_READY:
2186 case LSC_SCODE_NOT_LOGGED_IN:
2187 case LSC_SCODE_NOPCB:
2188 case LSC_SCODE_ELS_REJECT:
2189 case LSC_SCODE_CMD_PARAM_ERR:
2190 case LSC_SCODE_NONPORT:
2191 case LSC_SCODE_LOGGED_IN:
2192 case LSC_SCODE_NOFLOGI_ACC:
2194 mb[0] = MBS_COMMAND_ERROR;
2198 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
2199 "Done %s.\n", __func__);
2201 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2203 mb[0] = MBS_COMMAND_COMPLETE;
2205 if (iop[0] & BIT_4) {
2211 /* Passback COS information. */
2213 if (lg->io_parameter[7] || lg->io_parameter[8])
2214 mb[10] |= BIT_0; /* Class 2. */
2215 if (lg->io_parameter[9] || lg->io_parameter[10])
2216 mb[10] |= BIT_1; /* Class 3. */
2217 if (lg->io_parameter[0] & cpu_to_le32(BIT_7))
2218 mb[10] |= BIT_7; /* Confirmed Completion
2223 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2229 * qla2x00_login_fabric
2230 * Issue login fabric port mailbox command.
2233 * ha = adapter block pointer.
2234 * loop_id = device loop ID.
2235 * domain = device domain.
2236 * area = device area.
2237 * al_pa = device AL_PA.
2238 * status = pointer for return status.
2239 * opt = command options.
2240 * TARGET_QUEUE_LOCK must be released.
2241 * ADAPTER_STATE_LOCK must be released.
2244 * qla2x00 local function return status code.
2250 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2251 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2255 mbx_cmd_t *mcp = &mc;
2256 struct qla_hw_data *ha = vha->hw;
2258 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
2259 "Entered %s.\n", __func__);
2261 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
2262 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2263 if (HAS_EXTENDED_IDS(ha)) {
2264 mcp->mb[1] = loop_id;
2266 mcp->out_mb |= MBX_10;
2268 mcp->mb[1] = (loop_id << 8) | opt;
2270 mcp->mb[2] = domain;
2271 mcp->mb[3] = area << 8 | al_pa;
2273 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
2274 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2276 rval = qla2x00_mailbox_command(vha, mcp);
2278 /* Return mailbox statuses. */
2285 /* COS retrieved from Get-Port-Database mailbox command. */
2289 if (rval != QLA_SUCCESS) {
2290 /* RLU tmp code: need to change main mailbox_command function to
2291 * return ok even when the mailbox completion value is not
2292 * SUCCESS. The caller needs to be responsible to interpret
2293 * the return values of this mailbox command if we're not
2294 * to change too much of the existing code.
2296 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2297 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2298 mcp->mb[0] == 0x4006)
2302 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2303 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2304 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2307 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2308 "Done %s.\n", __func__);
2315 * qla2x00_login_local_device
2316 * Issue login loop port mailbox command.
2319 * ha = adapter block pointer.
2320 * loop_id = device loop ID.
2321 * opt = command options.
2324 * Return status code.
2331 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2332 uint16_t *mb_ret, uint8_t opt)
2336 mbx_cmd_t *mcp = &mc;
2337 struct qla_hw_data *ha = vha->hw;
2339 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2340 "Entered %s.\n", __func__);
2342 if (IS_FWI2_CAPABLE(ha))
2343 return qla24xx_login_fabric(vha, fcport->loop_id,
2344 fcport->d_id.b.domain, fcport->d_id.b.area,
2345 fcport->d_id.b.al_pa, mb_ret, opt);
2347 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2348 if (HAS_EXTENDED_IDS(ha))
2349 mcp->mb[1] = fcport->loop_id;
2351 mcp->mb[1] = fcport->loop_id << 8;
2353 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2354 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2355 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2357 rval = qla2x00_mailbox_command(vha, mcp);
2359 /* Return mailbox statuses. */
2360 if (mb_ret != NULL) {
2361 mb_ret[0] = mcp->mb[0];
2362 mb_ret[1] = mcp->mb[1];
2363 mb_ret[6] = mcp->mb[6];
2364 mb_ret[7] = mcp->mb[7];
2367 if (rval != QLA_SUCCESS) {
2368 /* AV tmp code: need to change main mailbox_command function to
2369 * return ok even when the mailbox completion value is not
2370 * SUCCESS. The caller needs to be responsible to interpret
2371 * the return values of this mailbox command if we're not
2372 * to change too much of the existing code.
2374 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2377 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2378 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2379 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2382 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2383 "Done %s.\n", __func__);
2390 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2391 uint8_t area, uint8_t al_pa)
2394 struct logio_entry_24xx *lg;
2396 struct qla_hw_data *ha = vha->hw;
2397 struct req_que *req;
2399 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2400 "Entered %s.\n", __func__);
2402 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2404 ql_log(ql_log_warn, vha, 0x106e,
2405 "Failed to allocate logout IOCB.\n");
2406 return QLA_MEMORY_ALLOC_FAILED;
2408 memset(lg, 0, sizeof(struct logio_entry_24xx));
2410 if (ql2xmaxqueues > 1)
2411 req = ha->req_q_map[0];
2414 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2415 lg->entry_count = 1;
2416 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2417 lg->nport_handle = cpu_to_le16(loop_id);
2419 cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2421 lg->port_id[0] = al_pa;
2422 lg->port_id[1] = area;
2423 lg->port_id[2] = domain;
2424 lg->vp_index = vha->vp_idx;
2425 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2426 (ha->r_a_tov / 10 * 2) + 2);
2427 if (rval != QLA_SUCCESS) {
2428 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2429 "Failed to issue logout IOCB (%x).\n", rval);
2430 } else if (lg->entry_status != 0) {
2431 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2432 "Failed to complete IOCB -- error status (%x).\n",
2434 rval = QLA_FUNCTION_FAILED;
2435 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2436 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2437 "Failed to complete IOCB -- completion status (%x) "
2438 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2439 le32_to_cpu(lg->io_parameter[0]),
2440 le32_to_cpu(lg->io_parameter[1]));
2443 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2444 "Done %s.\n", __func__);
2447 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2453 * qla2x00_fabric_logout
2454 * Issue logout fabric port mailbox command.
2457 * ha = adapter block pointer.
2458 * loop_id = device loop ID.
2459 * TARGET_QUEUE_LOCK must be released.
2460 * ADAPTER_STATE_LOCK must be released.
2463 * qla2x00 local function return status code.
2469 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2470 uint8_t area, uint8_t al_pa)
2474 mbx_cmd_t *mcp = &mc;
2476 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2477 "Entered %s.\n", __func__);
2479 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2480 mcp->out_mb = MBX_1|MBX_0;
2481 if (HAS_EXTENDED_IDS(vha->hw)) {
2482 mcp->mb[1] = loop_id;
2484 mcp->out_mb |= MBX_10;
2486 mcp->mb[1] = loop_id << 8;
2489 mcp->in_mb = MBX_1|MBX_0;
2490 mcp->tov = MBX_TOV_SECONDS;
2492 rval = qla2x00_mailbox_command(vha, mcp);
2494 if (rval != QLA_SUCCESS) {
2496 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2497 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2500 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2501 "Done %s.\n", __func__);
2508 * qla2x00_full_login_lip
2509 * Issue full login LIP mailbox command.
2512 * ha = adapter block pointer.
2513 * TARGET_QUEUE_LOCK must be released.
2514 * ADAPTER_STATE_LOCK must be released.
2517 * qla2x00 local function return status code.
2523 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2527 mbx_cmd_t *mcp = &mc;
2529 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2530 "Entered %s.\n", __func__);
2532 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2533 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2536 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2538 mcp->tov = MBX_TOV_SECONDS;
2540 rval = qla2x00_mailbox_command(vha, mcp);
2542 if (rval != QLA_SUCCESS) {
2544 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2547 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2548 "Done %s.\n", __func__);
2555 * qla2x00_get_id_list
2558 * ha = adapter block pointer.
2561 * qla2x00 local function return status code.
2567 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2572 mbx_cmd_t *mcp = &mc;
2574 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2575 "Entered %s.\n", __func__);
2577 if (id_list == NULL)
2578 return QLA_FUNCTION_FAILED;
2580 mcp->mb[0] = MBC_GET_ID_LIST;
2581 mcp->out_mb = MBX_0;
2582 if (IS_FWI2_CAPABLE(vha->hw)) {
2583 mcp->mb[2] = MSW(id_list_dma);
2584 mcp->mb[3] = LSW(id_list_dma);
2585 mcp->mb[6] = MSW(MSD(id_list_dma));
2586 mcp->mb[7] = LSW(MSD(id_list_dma));
2588 mcp->mb[9] = vha->vp_idx;
2589 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2591 mcp->mb[1] = MSW(id_list_dma);
2592 mcp->mb[2] = LSW(id_list_dma);
2593 mcp->mb[3] = MSW(MSD(id_list_dma));
2594 mcp->mb[6] = LSW(MSD(id_list_dma));
2595 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2597 mcp->in_mb = MBX_1|MBX_0;
2598 mcp->tov = MBX_TOV_SECONDS;
2600 rval = qla2x00_mailbox_command(vha, mcp);
2602 if (rval != QLA_SUCCESS) {
2604 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2606 *entries = mcp->mb[1];
2607 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2608 "Done %s.\n", __func__);
2615 * qla2x00_get_resource_cnts
2616 * Get current firmware resource counts.
2619 * ha = adapter block pointer.
2622 * qla2x00 local function return status code.
2628 qla2x00_get_resource_cnts(scsi_qla_host_t *vha)
2630 struct qla_hw_data *ha = vha->hw;
2633 mbx_cmd_t *mcp = &mc;
2635 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2636 "Entered %s.\n", __func__);
2638 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2639 mcp->out_mb = MBX_0;
2640 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2641 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw))
2642 mcp->in_mb |= MBX_12;
2643 mcp->tov = MBX_TOV_SECONDS;
2645 rval = qla2x00_mailbox_command(vha, mcp);
2647 if (rval != QLA_SUCCESS) {
2649 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2650 "Failed mb[0]=%x.\n", mcp->mb[0]);
2652 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2653 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2654 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2655 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2656 mcp->mb[11], mcp->mb[12]);
2658 ha->orig_fw_tgt_xcb_count = mcp->mb[1];
2659 ha->cur_fw_tgt_xcb_count = mcp->mb[2];
2660 ha->cur_fw_xcb_count = mcp->mb[3];
2661 ha->orig_fw_xcb_count = mcp->mb[6];
2662 ha->cur_fw_iocb_count = mcp->mb[7];
2663 ha->orig_fw_iocb_count = mcp->mb[10];
2664 if (ha->flags.npiv_supported)
2665 ha->max_npiv_vports = mcp->mb[11];
2666 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
2667 ha->fw_max_fcf_count = mcp->mb[12];
2674 * qla2x00_get_fcal_position_map
2675 * Get FCAL (LILP) position map using mailbox command
2678 * ha = adapter state pointer.
2679 * pos_map = buffer pointer (can be NULL).
2682 * qla2x00 local function return status code.
2688 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2692 mbx_cmd_t *mcp = &mc;
2694 dma_addr_t pmap_dma;
2695 struct qla_hw_data *ha = vha->hw;
2697 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2698 "Entered %s.\n", __func__);
2700 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2702 ql_log(ql_log_warn, vha, 0x1080,
2703 "Memory alloc failed.\n");
2704 return QLA_MEMORY_ALLOC_FAILED;
2706 memset(pmap, 0, FCAL_MAP_SIZE);
2708 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2709 mcp->mb[2] = MSW(pmap_dma);
2710 mcp->mb[3] = LSW(pmap_dma);
2711 mcp->mb[6] = MSW(MSD(pmap_dma));
2712 mcp->mb[7] = LSW(MSD(pmap_dma));
2713 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2714 mcp->in_mb = MBX_1|MBX_0;
2715 mcp->buf_size = FCAL_MAP_SIZE;
2716 mcp->flags = MBX_DMA_IN;
2717 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2718 rval = qla2x00_mailbox_command(vha, mcp);
2720 if (rval == QLA_SUCCESS) {
2721 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2722 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2723 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2724 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2728 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2730 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2732 if (rval != QLA_SUCCESS) {
2733 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2735 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2736 "Done %s.\n", __func__);
2743 * qla2x00_get_link_status
2746 * ha = adapter block pointer.
2747 * loop_id = device loop ID.
2748 * ret_buf = pointer to link status return buffer.
2752 * BIT_0 = mem alloc error.
2753 * BIT_1 = mailbox error.
2756 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2757 struct link_statistics *stats, dma_addr_t stats_dma)
2761 mbx_cmd_t *mcp = &mc;
2762 uint32_t *iter, dwords;
2763 struct qla_hw_data *ha = vha->hw;
2765 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2766 "Entered %s.\n", __func__);
2768 mcp->mb[0] = MBC_GET_LINK_STATUS;
2769 mcp->mb[2] = MSW(stats_dma);
2770 mcp->mb[3] = LSW(stats_dma);
2771 mcp->mb[6] = MSW(MSD(stats_dma));
2772 mcp->mb[7] = LSW(MSD(stats_dma));
2773 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2775 if (IS_FWI2_CAPABLE(ha)) {
2776 mcp->mb[1] = loop_id;
2779 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2780 mcp->in_mb |= MBX_1;
2781 } else if (HAS_EXTENDED_IDS(ha)) {
2782 mcp->mb[1] = loop_id;
2784 mcp->out_mb |= MBX_10|MBX_1;
2786 mcp->mb[1] = loop_id << 8;
2787 mcp->out_mb |= MBX_1;
2789 mcp->tov = MBX_TOV_SECONDS;
2790 mcp->flags = IOCTL_CMD;
2791 rval = qla2x00_mailbox_command(vha, mcp);
2793 if (rval == QLA_SUCCESS) {
2794 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2795 ql_dbg(ql_dbg_mbx, vha, 0x1085,
2796 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2797 rval = QLA_FUNCTION_FAILED;
2799 /* Copy over data -- firmware data is LE. */
2800 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2801 "Done %s.\n", __func__);
2802 dwords = offsetof(struct link_statistics,
2804 iter = &stats->link_fail_cnt;
2805 for ( ; dwords--; iter++)
2810 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2817 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2818 dma_addr_t stats_dma)
2822 mbx_cmd_t *mcp = &mc;
2823 uint32_t *iter, dwords;
2825 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2826 "Entered %s.\n", __func__);
2828 mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2829 mcp->mb[2] = MSW(stats_dma);
2830 mcp->mb[3] = LSW(stats_dma);
2831 mcp->mb[6] = MSW(MSD(stats_dma));
2832 mcp->mb[7] = LSW(MSD(stats_dma));
2833 mcp->mb[8] = sizeof(struct link_statistics) / 4;
2834 mcp->mb[9] = vha->vp_idx;
2836 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2837 mcp->in_mb = MBX_2|MBX_1|MBX_0;
2838 mcp->tov = MBX_TOV_SECONDS;
2839 mcp->flags = IOCTL_CMD;
2840 rval = qla2x00_mailbox_command(vha, mcp);
2842 if (rval == QLA_SUCCESS) {
2843 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2844 ql_dbg(ql_dbg_mbx, vha, 0x1089,
2845 "Failed mb[0]=%x.\n", mcp->mb[0]);
2846 rval = QLA_FUNCTION_FAILED;
2848 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2849 "Done %s.\n", __func__);
2850 /* Copy over data -- firmware data is LE. */
2851 dwords = sizeof(struct link_statistics) / 4;
2852 iter = &stats->link_fail_cnt;
2853 for ( ; dwords--; iter++)
2858 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2865 qla24xx_abort_command(srb_t *sp)
2868 unsigned long flags = 0;
2870 struct abort_entry_24xx *abt;
2873 fc_port_t *fcport = sp->fcport;
2874 struct scsi_qla_host *vha = fcport->vha;
2875 struct qla_hw_data *ha = vha->hw;
2876 struct req_que *req = vha->req;
2878 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2879 "Entered %s.\n", __func__);
2881 if (ql2xasynctmfenable)
2882 return qla24xx_async_abort_command(sp);
2884 spin_lock_irqsave(&ha->hardware_lock, flags);
2885 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2886 if (req->outstanding_cmds[handle] == sp)
2889 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2890 if (handle == req->num_outstanding_cmds) {
2891 /* Command not found. */
2892 return QLA_FUNCTION_FAILED;
2895 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2897 ql_log(ql_log_warn, vha, 0x108d,
2898 "Failed to allocate abort IOCB.\n");
2899 return QLA_MEMORY_ALLOC_FAILED;
2901 memset(abt, 0, sizeof(struct abort_entry_24xx));
2903 abt->entry_type = ABORT_IOCB_TYPE;
2904 abt->entry_count = 1;
2905 abt->handle = MAKE_HANDLE(req->id, abt->handle);
2906 abt->nport_handle = cpu_to_le16(fcport->loop_id);
2907 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2908 abt->port_id[0] = fcport->d_id.b.al_pa;
2909 abt->port_id[1] = fcport->d_id.b.area;
2910 abt->port_id[2] = fcport->d_id.b.domain;
2911 abt->vp_index = fcport->vha->vp_idx;
2913 abt->req_que_no = cpu_to_le16(req->id);
2915 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2916 if (rval != QLA_SUCCESS) {
2917 ql_dbg(ql_dbg_mbx, vha, 0x108e,
2918 "Failed to issue IOCB (%x).\n", rval);
2919 } else if (abt->entry_status != 0) {
2920 ql_dbg(ql_dbg_mbx, vha, 0x108f,
2921 "Failed to complete IOCB -- error status (%x).\n",
2923 rval = QLA_FUNCTION_FAILED;
2924 } else if (abt->nport_handle != cpu_to_le16(0)) {
2925 ql_dbg(ql_dbg_mbx, vha, 0x1090,
2926 "Failed to complete IOCB -- completion status (%x).\n",
2927 le16_to_cpu(abt->nport_handle));
2928 if (abt->nport_handle == CS_IOCB_ERROR)
2929 rval = QLA_FUNCTION_PARAMETER_ERROR;
2931 rval = QLA_FUNCTION_FAILED;
2933 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2934 "Done %s.\n", __func__);
2937 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2942 struct tsk_mgmt_cmd {
2944 struct tsk_mgmt_entry tsk;
2945 struct sts_entry_24xx sts;
2950 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2951 uint64_t l, int tag)
2954 struct tsk_mgmt_cmd *tsk;
2955 struct sts_entry_24xx *sts;
2957 scsi_qla_host_t *vha;
2958 struct qla_hw_data *ha;
2959 struct req_que *req;
2960 struct rsp_que *rsp;
2966 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2967 "Entered %s.\n", __func__);
2969 if (ha->flags.cpu_affinity_enabled)
2970 rsp = ha->rsp_q_map[tag + 1];
2973 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
2975 ql_log(ql_log_warn, vha, 0x1093,
2976 "Failed to allocate task management IOCB.\n");
2977 return QLA_MEMORY_ALLOC_FAILED;
2979 memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
2981 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
2982 tsk->p.tsk.entry_count = 1;
2983 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
2984 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
2985 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
2986 tsk->p.tsk.control_flags = cpu_to_le32(type);
2987 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
2988 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
2989 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
2990 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
2991 if (type == TCF_LUN_RESET) {
2992 int_to_scsilun(l, &tsk->p.tsk.lun);
2993 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
2994 sizeof(tsk->p.tsk.lun));
2998 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
2999 if (rval != QLA_SUCCESS) {
3000 ql_dbg(ql_dbg_mbx, vha, 0x1094,
3001 "Failed to issue %s reset IOCB (%x).\n", name, rval);
3002 } else if (sts->entry_status != 0) {
3003 ql_dbg(ql_dbg_mbx, vha, 0x1095,
3004 "Failed to complete IOCB -- error status (%x).\n",
3006 rval = QLA_FUNCTION_FAILED;
3007 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
3008 ql_dbg(ql_dbg_mbx, vha, 0x1096,
3009 "Failed to complete IOCB -- completion status (%x).\n",
3010 le16_to_cpu(sts->comp_status));
3011 rval = QLA_FUNCTION_FAILED;
3012 } else if (le16_to_cpu(sts->scsi_status) &
3013 SS_RESPONSE_INFO_LEN_VALID) {
3014 if (le32_to_cpu(sts->rsp_data_len) < 4) {
3015 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
3016 "Ignoring inconsistent data length -- not enough "
3017 "response info (%d).\n",
3018 le32_to_cpu(sts->rsp_data_len));
3019 } else if (sts->data[3]) {
3020 ql_dbg(ql_dbg_mbx, vha, 0x1098,
3021 "Failed to complete IOCB -- response (%x).\n",
3023 rval = QLA_FUNCTION_FAILED;
3027 /* Issue marker IOCB. */
3028 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
3029 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
3030 if (rval2 != QLA_SUCCESS) {
3031 ql_dbg(ql_dbg_mbx, vha, 0x1099,
3032 "Failed to issue marker IOCB (%x).\n", rval2);
3034 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
3035 "Done %s.\n", __func__);
3038 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
3044 qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
3046 struct qla_hw_data *ha = fcport->vha->hw;
3048 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3049 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
3051 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
3055 qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
3057 struct qla_hw_data *ha = fcport->vha->hw;
3059 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3060 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
3062 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
3066 qla2x00_system_error(scsi_qla_host_t *vha)
3070 mbx_cmd_t *mcp = &mc;
3071 struct qla_hw_data *ha = vha->hw;
3073 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
3074 return QLA_FUNCTION_FAILED;
3076 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
3077 "Entered %s.\n", __func__);
3079 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
3080 mcp->out_mb = MBX_0;
3084 rval = qla2x00_mailbox_command(vha, mcp);
3086 if (rval != QLA_SUCCESS) {
3087 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
3089 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
3090 "Done %s.\n", __func__);
3097 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
3101 mbx_cmd_t *mcp = &mc;
3103 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3104 !IS_QLA27XX(vha->hw))
3105 return QLA_FUNCTION_FAILED;
3107 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
3108 "Entered %s.\n", __func__);
3110 mcp->mb[0] = MBC_WRITE_SERDES;
3112 if (IS_QLA2031(vha->hw))
3113 mcp->mb[2] = data & 0xff;
3118 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
3120 mcp->tov = MBX_TOV_SECONDS;
3122 rval = qla2x00_mailbox_command(vha, mcp);
3124 if (rval != QLA_SUCCESS) {
3125 ql_dbg(ql_dbg_mbx, vha, 0x1183,
3126 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3128 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
3129 "Done %s.\n", __func__);
3136 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
3140 mbx_cmd_t *mcp = &mc;
3142 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3143 !IS_QLA27XX(vha->hw))
3144 return QLA_FUNCTION_FAILED;
3146 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
3147 "Entered %s.\n", __func__);
3149 mcp->mb[0] = MBC_READ_SERDES;
3152 mcp->out_mb = MBX_3|MBX_1|MBX_0;
3153 mcp->in_mb = MBX_1|MBX_0;
3154 mcp->tov = MBX_TOV_SECONDS;
3156 rval = qla2x00_mailbox_command(vha, mcp);
3158 if (IS_QLA2031(vha->hw))
3159 *data = mcp->mb[1] & 0xff;
3163 if (rval != QLA_SUCCESS) {
3164 ql_dbg(ql_dbg_mbx, vha, 0x1186,
3165 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3167 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
3168 "Done %s.\n", __func__);
3175 qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
3179 mbx_cmd_t *mcp = &mc;
3181 if (!IS_QLA8044(vha->hw))
3182 return QLA_FUNCTION_FAILED;
3184 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1186,
3185 "Entered %s.\n", __func__);
3187 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3188 mcp->mb[1] = HCS_WRITE_SERDES;
3189 mcp->mb[3] = LSW(addr);
3190 mcp->mb[4] = MSW(addr);
3191 mcp->mb[5] = LSW(data);
3192 mcp->mb[6] = MSW(data);
3193 mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
3195 mcp->tov = MBX_TOV_SECONDS;
3197 rval = qla2x00_mailbox_command(vha, mcp);
3199 if (rval != QLA_SUCCESS) {
3200 ql_dbg(ql_dbg_mbx, vha, 0x1187,
3201 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3203 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
3204 "Done %s.\n", __func__);
3211 qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
3215 mbx_cmd_t *mcp = &mc;
3217 if (!IS_QLA8044(vha->hw))
3218 return QLA_FUNCTION_FAILED;
3220 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
3221 "Entered %s.\n", __func__);
3223 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3224 mcp->mb[1] = HCS_READ_SERDES;
3225 mcp->mb[3] = LSW(addr);
3226 mcp->mb[4] = MSW(addr);
3227 mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
3228 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3229 mcp->tov = MBX_TOV_SECONDS;
3231 rval = qla2x00_mailbox_command(vha, mcp);
3233 *data = mcp->mb[2] << 16 | mcp->mb[1];
3235 if (rval != QLA_SUCCESS) {
3236 ql_dbg(ql_dbg_mbx, vha, 0x118a,
3237 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3239 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
3240 "Done %s.\n", __func__);
3247 * qla2x00_set_serdes_params() -
3253 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3254 uint16_t sw_em_2g, uint16_t sw_em_4g)
3258 mbx_cmd_t *mcp = &mc;
3260 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
3261 "Entered %s.\n", __func__);
3263 mcp->mb[0] = MBC_SERDES_PARAMS;
3265 mcp->mb[2] = sw_em_1g | BIT_15;
3266 mcp->mb[3] = sw_em_2g | BIT_15;
3267 mcp->mb[4] = sw_em_4g | BIT_15;
3268 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3270 mcp->tov = MBX_TOV_SECONDS;
3272 rval = qla2x00_mailbox_command(vha, mcp);
3274 if (rval != QLA_SUCCESS) {
3276 ql_dbg(ql_dbg_mbx, vha, 0x109f,
3277 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3280 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
3281 "Done %s.\n", __func__);
3288 qla2x00_stop_firmware(scsi_qla_host_t *vha)
3292 mbx_cmd_t *mcp = &mc;
3294 if (!IS_FWI2_CAPABLE(vha->hw))
3295 return QLA_FUNCTION_FAILED;
3297 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
3298 "Entered %s.\n", __func__);
3300 mcp->mb[0] = MBC_STOP_FIRMWARE;
3302 mcp->out_mb = MBX_1|MBX_0;
3306 rval = qla2x00_mailbox_command(vha, mcp);
3308 if (rval != QLA_SUCCESS) {
3309 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3310 if (mcp->mb[0] == MBS_INVALID_COMMAND)
3311 rval = QLA_INVALID_COMMAND;
3313 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
3314 "Done %s.\n", __func__);
3321 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3326 mbx_cmd_t *mcp = &mc;
3328 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
3329 "Entered %s.\n", __func__);
3331 if (!IS_FWI2_CAPABLE(vha->hw))
3332 return QLA_FUNCTION_FAILED;
3334 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3335 return QLA_FUNCTION_FAILED;
3337 mcp->mb[0] = MBC_TRACE_CONTROL;
3338 mcp->mb[1] = TC_EFT_ENABLE;
3339 mcp->mb[2] = LSW(eft_dma);
3340 mcp->mb[3] = MSW(eft_dma);
3341 mcp->mb[4] = LSW(MSD(eft_dma));
3342 mcp->mb[5] = MSW(MSD(eft_dma));
3343 mcp->mb[6] = buffers;
3344 mcp->mb[7] = TC_AEN_DISABLE;
3345 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3346 mcp->in_mb = MBX_1|MBX_0;
3347 mcp->tov = MBX_TOV_SECONDS;
3349 rval = qla2x00_mailbox_command(vha, mcp);
3350 if (rval != QLA_SUCCESS) {
3351 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
3352 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3353 rval, mcp->mb[0], mcp->mb[1]);
3355 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
3356 "Done %s.\n", __func__);
3363 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3367 mbx_cmd_t *mcp = &mc;
3369 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
3370 "Entered %s.\n", __func__);
3372 if (!IS_FWI2_CAPABLE(vha->hw))
3373 return QLA_FUNCTION_FAILED;
3375 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3376 return QLA_FUNCTION_FAILED;
3378 mcp->mb[0] = MBC_TRACE_CONTROL;
3379 mcp->mb[1] = TC_EFT_DISABLE;
3380 mcp->out_mb = MBX_1|MBX_0;
3381 mcp->in_mb = MBX_1|MBX_0;
3382 mcp->tov = MBX_TOV_SECONDS;
3384 rval = qla2x00_mailbox_command(vha, mcp);
3385 if (rval != QLA_SUCCESS) {
3386 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3387 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3388 rval, mcp->mb[0], mcp->mb[1]);
3390 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3391 "Done %s.\n", __func__);
3398 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3399 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3403 mbx_cmd_t *mcp = &mc;
3405 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3406 "Entered %s.\n", __func__);
3408 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3409 !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
3410 return QLA_FUNCTION_FAILED;
3412 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3413 return QLA_FUNCTION_FAILED;
3415 mcp->mb[0] = MBC_TRACE_CONTROL;
3416 mcp->mb[1] = TC_FCE_ENABLE;
3417 mcp->mb[2] = LSW(fce_dma);
3418 mcp->mb[3] = MSW(fce_dma);
3419 mcp->mb[4] = LSW(MSD(fce_dma));
3420 mcp->mb[5] = MSW(MSD(fce_dma));
3421 mcp->mb[6] = buffers;
3422 mcp->mb[7] = TC_AEN_DISABLE;
3424 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3425 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3426 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3428 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3429 mcp->tov = MBX_TOV_SECONDS;
3431 rval = qla2x00_mailbox_command(vha, mcp);
3432 if (rval != QLA_SUCCESS) {
3433 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3434 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3435 rval, mcp->mb[0], mcp->mb[1]);
3437 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3438 "Done %s.\n", __func__);
3441 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3450 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3454 mbx_cmd_t *mcp = &mc;
3456 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3457 "Entered %s.\n", __func__);
3459 if (!IS_FWI2_CAPABLE(vha->hw))
3460 return QLA_FUNCTION_FAILED;
3462 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3463 return QLA_FUNCTION_FAILED;
3465 mcp->mb[0] = MBC_TRACE_CONTROL;
3466 mcp->mb[1] = TC_FCE_DISABLE;
3467 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3468 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3469 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3471 mcp->tov = MBX_TOV_SECONDS;
3473 rval = qla2x00_mailbox_command(vha, mcp);
3474 if (rval != QLA_SUCCESS) {
3475 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3476 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3477 rval, mcp->mb[0], mcp->mb[1]);
3479 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3480 "Done %s.\n", __func__);
3483 *wr = (uint64_t) mcp->mb[5] << 48 |
3484 (uint64_t) mcp->mb[4] << 32 |
3485 (uint64_t) mcp->mb[3] << 16 |
3486 (uint64_t) mcp->mb[2];
3488 *rd = (uint64_t) mcp->mb[9] << 48 |
3489 (uint64_t) mcp->mb[8] << 32 |
3490 (uint64_t) mcp->mb[7] << 16 |
3491 (uint64_t) mcp->mb[6];
3498 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3499 uint16_t *port_speed, uint16_t *mb)
3503 mbx_cmd_t *mcp = &mc;
3505 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3506 "Entered %s.\n", __func__);
3508 if (!IS_IIDMA_CAPABLE(vha->hw))
3509 return QLA_FUNCTION_FAILED;
3511 mcp->mb[0] = MBC_PORT_PARAMS;
3512 mcp->mb[1] = loop_id;
3513 mcp->mb[2] = mcp->mb[3] = 0;
3514 mcp->mb[9] = vha->vp_idx;
3515 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3516 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3517 mcp->tov = MBX_TOV_SECONDS;
3519 rval = qla2x00_mailbox_command(vha, mcp);
3521 /* Return mailbox statuses. */
3528 if (rval != QLA_SUCCESS) {
3529 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3531 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3532 "Done %s.\n", __func__);
3534 *port_speed = mcp->mb[3];
3541 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3542 uint16_t port_speed, uint16_t *mb)
3546 mbx_cmd_t *mcp = &mc;
3548 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3549 "Entered %s.\n", __func__);
3551 if (!IS_IIDMA_CAPABLE(vha->hw))
3552 return QLA_FUNCTION_FAILED;
3554 mcp->mb[0] = MBC_PORT_PARAMS;
3555 mcp->mb[1] = loop_id;
3557 if (IS_CNA_CAPABLE(vha->hw))
3558 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3560 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
3561 mcp->mb[9] = vha->vp_idx;
3562 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3563 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3564 mcp->tov = MBX_TOV_SECONDS;
3566 rval = qla2x00_mailbox_command(vha, mcp);
3568 /* Return mailbox statuses. */
3575 if (rval != QLA_SUCCESS) {
3576 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3577 "Failed=%x.\n", rval);
3579 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3580 "Done %s.\n", __func__);
3587 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3588 struct vp_rpt_id_entry_24xx *rptid_entry)
3591 uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3592 struct qla_hw_data *ha = vha->hw;
3593 scsi_qla_host_t *vp;
3594 unsigned long flags;
3597 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3598 "Entered %s.\n", __func__);
3600 if (rptid_entry->entry_status != 0)
3603 if (rptid_entry->format == 0) {
3604 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3605 "Format 0 : Number of VPs setup %d, number of "
3606 "VPs acquired %d.\n",
3607 MSB(le16_to_cpu(rptid_entry->vp_count)),
3608 LSB(le16_to_cpu(rptid_entry->vp_count)));
3609 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3610 "Primary port id %02x%02x%02x.\n",
3611 rptid_entry->port_id[2], rptid_entry->port_id[1],
3612 rptid_entry->port_id[0]);
3613 } else if (rptid_entry->format == 1) {
3615 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3616 "Format 1: VP[%d] enabled - status %d - with "
3617 "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3618 rptid_entry->port_id[2], rptid_entry->port_id[1],
3619 rptid_entry->port_id[0]);
3621 /* buffer to buffer credit flag */
3622 vha->flags.bbcr_enable = (rptid_entry->bbcr & 0xf) != 0;
3624 /* FA-WWN is only for physical port */
3626 void *wwpn = ha->init_cb->port_name;
3629 if (rptid_entry->vp_idx_map[1] & BIT_6)
3630 wwpn = rptid_entry->reserved_4 + 8;
3632 memcpy(vha->port_name, wwpn, WWN_SIZE);
3633 fc_host_port_name(vha->host) =
3634 wwn_to_u64(vha->port_name);
3635 ql_dbg(ql_dbg_mbx, vha, 0x1018,
3636 "FA-WWN portname %016llx (%x)\n",
3637 fc_host_port_name(vha->host), MSB(stat));
3644 if (MSB(stat) != 0 && MSB(stat) != 2) {
3645 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3646 "Could not acquire ID for VP[%d].\n", vp_idx);
3651 spin_lock_irqsave(&ha->vport_slock, flags);
3652 list_for_each_entry(vp, &ha->vp_list, list) {
3653 if (vp_idx == vp->vp_idx) {
3658 spin_unlock_irqrestore(&ha->vport_slock, flags);
3663 vp->d_id.b.domain = rptid_entry->port_id[2];
3664 vp->d_id.b.area = rptid_entry->port_id[1];
3665 vp->d_id.b.al_pa = rptid_entry->port_id[0];
3668 * Cannot configure here as we are still sitting on the
3669 * response queue. Handle it in dpc context.
3671 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3674 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3675 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3676 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3677 qla2xxx_wake_dpc(vha);
3682 * qla24xx_modify_vp_config
3683 * Change VP configuration for vha
3686 * vha = adapter block pointer.
3689 * qla2xxx local function return status code.
3695 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3698 struct vp_config_entry_24xx *vpmod;
3699 dma_addr_t vpmod_dma;
3700 struct qla_hw_data *ha = vha->hw;
3701 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3703 /* This can be called by the parent */
3705 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3706 "Entered %s.\n", __func__);
3708 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3710 ql_log(ql_log_warn, vha, 0x10bc,
3711 "Failed to allocate modify VP IOCB.\n");
3712 return QLA_MEMORY_ALLOC_FAILED;
3715 memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3716 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3717 vpmod->entry_count = 1;
3718 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3719 vpmod->vp_count = 1;
3720 vpmod->vp_index1 = vha->vp_idx;
3721 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3723 qlt_modify_vp_config(vha, vpmod);
3725 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3726 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3727 vpmod->entry_count = 1;
3729 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3730 if (rval != QLA_SUCCESS) {
3731 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3732 "Failed to issue VP config IOCB (%x).\n", rval);
3733 } else if (vpmod->comp_status != 0) {
3734 ql_dbg(ql_dbg_mbx, vha, 0x10be,
3735 "Failed to complete IOCB -- error status (%x).\n",
3736 vpmod->comp_status);
3737 rval = QLA_FUNCTION_FAILED;
3738 } else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) {
3739 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3740 "Failed to complete IOCB -- completion status (%x).\n",
3741 le16_to_cpu(vpmod->comp_status));
3742 rval = QLA_FUNCTION_FAILED;
3745 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3746 "Done %s.\n", __func__);
3747 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3749 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3755 * qla24xx_control_vp
3756 * Enable a virtual port for given host
3759 * ha = adapter block pointer.
3760 * vhba = virtual adapter (unused)
3761 * index = index number for enabled VP
3764 * qla2xxx local function return status code.
3770 qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3774 struct vp_ctrl_entry_24xx *vce;
3776 struct qla_hw_data *ha = vha->hw;
3777 int vp_index = vha->vp_idx;
3778 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3780 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3781 "Entered %s enabling index %d.\n", __func__, vp_index);
3783 if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3784 return QLA_PARAMETER_ERROR;
3786 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3788 ql_log(ql_log_warn, vha, 0x10c2,
3789 "Failed to allocate VP control IOCB.\n");
3790 return QLA_MEMORY_ALLOC_FAILED;
3792 memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3794 vce->entry_type = VP_CTRL_IOCB_TYPE;
3795 vce->entry_count = 1;
3796 vce->command = cpu_to_le16(cmd);
3797 vce->vp_count = cpu_to_le16(1);
3799 /* index map in firmware starts with 1; decrement index
3800 * this is ok as we never use index 0
3802 map = (vp_index - 1) / 8;
3803 pos = (vp_index - 1) & 7;
3804 mutex_lock(&ha->vport_lock);
3805 vce->vp_idx_map[map] |= 1 << pos;
3806 mutex_unlock(&ha->vport_lock);
3808 rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3809 if (rval != QLA_SUCCESS) {
3810 ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3811 "Failed to issue VP control IOCB (%x).\n", rval);
3812 } else if (vce->entry_status != 0) {
3813 ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3814 "Failed to complete IOCB -- error status (%x).\n",
3816 rval = QLA_FUNCTION_FAILED;
3817 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
3818 ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3819 "Failed to complet IOCB -- completion status (%x).\n",
3820 le16_to_cpu(vce->comp_status));
3821 rval = QLA_FUNCTION_FAILED;
3823 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3824 "Done %s.\n", __func__);
3827 dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3833 * qla2x00_send_change_request
3834 * Receive or disable RSCN request from fabric controller
3837 * ha = adapter block pointer
3838 * format = registration format:
3840 * 1 - Fabric detected registration
3841 * 2 - N_port detected registration
3842 * 3 - Full registration
3843 * FF - clear registration
3844 * vp_idx = Virtual port index
3847 * qla2x00 local function return status code.
3854 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3859 mbx_cmd_t *mcp = &mc;
3861 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3862 "Entered %s.\n", __func__);
3864 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3865 mcp->mb[1] = format;
3866 mcp->mb[9] = vp_idx;
3867 mcp->out_mb = MBX_9|MBX_1|MBX_0;
3868 mcp->in_mb = MBX_0|MBX_1;
3869 mcp->tov = MBX_TOV_SECONDS;
3871 rval = qla2x00_mailbox_command(vha, mcp);
3873 if (rval == QLA_SUCCESS) {
3874 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3884 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3889 mbx_cmd_t *mcp = &mc;
3891 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3892 "Entered %s.\n", __func__);
3894 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3895 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3896 mcp->mb[8] = MSW(addr);
3897 mcp->out_mb = MBX_8|MBX_0;
3899 mcp->mb[0] = MBC_DUMP_RISC_RAM;
3900 mcp->out_mb = MBX_0;
3902 mcp->mb[1] = LSW(addr);
3903 mcp->mb[2] = MSW(req_dma);
3904 mcp->mb[3] = LSW(req_dma);
3905 mcp->mb[6] = MSW(MSD(req_dma));
3906 mcp->mb[7] = LSW(MSD(req_dma));
3907 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3908 if (IS_FWI2_CAPABLE(vha->hw)) {
3909 mcp->mb[4] = MSW(size);
3910 mcp->mb[5] = LSW(size);
3911 mcp->out_mb |= MBX_5|MBX_4;
3913 mcp->mb[4] = LSW(size);
3914 mcp->out_mb |= MBX_4;
3918 mcp->tov = MBX_TOV_SECONDS;
3920 rval = qla2x00_mailbox_command(vha, mcp);
3922 if (rval != QLA_SUCCESS) {
3923 ql_dbg(ql_dbg_mbx, vha, 0x1008,
3924 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3926 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3927 "Done %s.\n", __func__);
3932 /* 84XX Support **************************************************************/
3934 struct cs84xx_mgmt_cmd {
3936 struct verify_chip_entry_84xx req;
3937 struct verify_chip_rsp_84xx rsp;
3942 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3945 struct cs84xx_mgmt_cmd *mn;
3948 unsigned long flags;
3949 struct qla_hw_data *ha = vha->hw;
3951 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
3952 "Entered %s.\n", __func__);
3954 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
3956 return QLA_MEMORY_ALLOC_FAILED;
3960 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
3961 /* Diagnostic firmware? */
3962 /* options |= MENLO_DIAG_FW; */
3963 /* We update the firmware with only one data sequence. */
3964 options |= VCO_END_OF_DATA;
3968 memset(mn, 0, sizeof(*mn));
3969 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
3970 mn->p.req.entry_count = 1;
3971 mn->p.req.options = cpu_to_le16(options);
3973 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
3974 "Dump of Verify Request.\n");
3975 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
3976 (uint8_t *)mn, sizeof(*mn));
3978 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
3979 if (rval != QLA_SUCCESS) {
3980 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
3981 "Failed to issue verify IOCB (%x).\n", rval);
3985 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
3986 "Dump of Verify Response.\n");
3987 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
3988 (uint8_t *)mn, sizeof(*mn));
3990 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
3991 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
3992 le16_to_cpu(mn->p.rsp.failure_code) : 0;
3993 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
3994 "cs=%x fc=%x.\n", status[0], status[1]);
3996 if (status[0] != CS_COMPLETE) {
3997 rval = QLA_FUNCTION_FAILED;
3998 if (!(options & VCO_DONT_UPDATE_FW)) {
3999 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
4000 "Firmware update failed. Retrying "
4001 "without update firmware.\n");
4002 options |= VCO_DONT_UPDATE_FW;
4003 options &= ~VCO_FORCE_UPDATE;
4007 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
4008 "Firmware updated to %x.\n",
4009 le32_to_cpu(mn->p.rsp.fw_ver));
4011 /* NOTE: we only update OP firmware. */
4012 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
4013 ha->cs84xx->op_fw_version =
4014 le32_to_cpu(mn->p.rsp.fw_ver);
4015 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
4021 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
4023 if (rval != QLA_SUCCESS) {
4024 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
4025 "Failed=%x.\n", rval);
4027 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
4028 "Done %s.\n", __func__);
4035 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
4038 unsigned long flags;
4040 mbx_cmd_t *mcp = &mc;
4041 struct qla_hw_data *ha = vha->hw;
4043 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
4044 "Entered %s.\n", __func__);
4046 if (IS_SHADOW_REG_CAPABLE(ha))
4047 req->options |= BIT_13;
4049 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4050 mcp->mb[1] = req->options;
4051 mcp->mb[2] = MSW(LSD(req->dma));
4052 mcp->mb[3] = LSW(LSD(req->dma));
4053 mcp->mb[6] = MSW(MSD(req->dma));
4054 mcp->mb[7] = LSW(MSD(req->dma));
4055 mcp->mb[5] = req->length;
4057 mcp->mb[10] = req->rsp->id;
4058 mcp->mb[12] = req->qos;
4059 mcp->mb[11] = req->vp_idx;
4060 mcp->mb[13] = req->rid;
4061 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4064 mcp->mb[4] = req->id;
4065 /* que in ptr index */
4067 /* que out ptr index */
4068 mcp->mb[9] = *req->out_ptr = 0;
4069 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
4070 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4072 mcp->flags = MBX_DMA_OUT;
4073 mcp->tov = MBX_TOV_SECONDS * 2;
4075 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
4076 mcp->in_mb |= MBX_1;
4077 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4078 mcp->out_mb |= MBX_15;
4079 /* debug q create issue in SR-IOV */
4080 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4083 spin_lock_irqsave(&ha->hardware_lock, flags);
4084 if (!(req->options & BIT_0)) {
4085 WRT_REG_DWORD(req->req_q_in, 0);
4086 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4087 WRT_REG_DWORD(req->req_q_out, 0);
4089 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4091 rval = qla2x00_mailbox_command(vha, mcp);
4092 if (rval != QLA_SUCCESS) {
4093 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
4094 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4096 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
4097 "Done %s.\n", __func__);
4104 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
4107 unsigned long flags;
4109 mbx_cmd_t *mcp = &mc;
4110 struct qla_hw_data *ha = vha->hw;
4112 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
4113 "Entered %s.\n", __func__);
4115 if (IS_SHADOW_REG_CAPABLE(ha))
4116 rsp->options |= BIT_13;
4118 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4119 mcp->mb[1] = rsp->options;
4120 mcp->mb[2] = MSW(LSD(rsp->dma));
4121 mcp->mb[3] = LSW(LSD(rsp->dma));
4122 mcp->mb[6] = MSW(MSD(rsp->dma));
4123 mcp->mb[7] = LSW(MSD(rsp->dma));
4124 mcp->mb[5] = rsp->length;
4125 mcp->mb[14] = rsp->msix->entry;
4126 mcp->mb[13] = rsp->rid;
4127 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4130 mcp->mb[4] = rsp->id;
4131 /* que in ptr index */
4132 mcp->mb[8] = *rsp->in_ptr = 0;
4133 /* que out ptr index */
4135 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
4136 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4138 mcp->flags = MBX_DMA_OUT;
4139 mcp->tov = MBX_TOV_SECONDS * 2;
4141 if (IS_QLA81XX(ha)) {
4142 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
4143 mcp->in_mb |= MBX_1;
4144 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4145 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
4146 mcp->in_mb |= MBX_1;
4147 /* debug q create issue in SR-IOV */
4148 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4151 spin_lock_irqsave(&ha->hardware_lock, flags);
4152 if (!(rsp->options & BIT_0)) {
4153 WRT_REG_DWORD(rsp->rsp_q_out, 0);
4154 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4155 WRT_REG_DWORD(rsp->rsp_q_in, 0);
4158 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4160 rval = qla2x00_mailbox_command(vha, mcp);
4161 if (rval != QLA_SUCCESS) {
4162 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
4163 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4165 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
4166 "Done %s.\n", __func__);
4173 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
4177 mbx_cmd_t *mcp = &mc;
4179 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
4180 "Entered %s.\n", __func__);
4182 mcp->mb[0] = MBC_IDC_ACK;
4183 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4184 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4186 mcp->tov = MBX_TOV_SECONDS;
4188 rval = qla2x00_mailbox_command(vha, mcp);
4190 if (rval != QLA_SUCCESS) {
4191 ql_dbg(ql_dbg_mbx, vha, 0x10da,
4192 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4194 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
4195 "Done %s.\n", __func__);
4202 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
4206 mbx_cmd_t *mcp = &mc;
4208 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
4209 "Entered %s.\n", __func__);
4211 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4212 !IS_QLA27XX(vha->hw))
4213 return QLA_FUNCTION_FAILED;
4215 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4216 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
4217 mcp->out_mb = MBX_1|MBX_0;
4218 mcp->in_mb = MBX_1|MBX_0;
4219 mcp->tov = MBX_TOV_SECONDS;
4221 rval = qla2x00_mailbox_command(vha, mcp);
4223 if (rval != QLA_SUCCESS) {
4224 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
4225 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4226 rval, mcp->mb[0], mcp->mb[1]);
4228 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
4229 "Done %s.\n", __func__);
4230 *sector_size = mcp->mb[1];
4237 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
4241 mbx_cmd_t *mcp = &mc;
4243 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4244 !IS_QLA27XX(vha->hw))
4245 return QLA_FUNCTION_FAILED;
4247 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
4248 "Entered %s.\n", __func__);
4250 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4251 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
4252 FAC_OPT_CMD_WRITE_PROTECT;
4253 mcp->out_mb = MBX_1|MBX_0;
4254 mcp->in_mb = MBX_1|MBX_0;
4255 mcp->tov = MBX_TOV_SECONDS;
4257 rval = qla2x00_mailbox_command(vha, mcp);
4259 if (rval != QLA_SUCCESS) {
4260 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
4261 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4262 rval, mcp->mb[0], mcp->mb[1]);
4264 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
4265 "Done %s.\n", __func__);
4272 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
4276 mbx_cmd_t *mcp = &mc;
4278 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4279 !IS_QLA27XX(vha->hw))
4280 return QLA_FUNCTION_FAILED;
4282 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4283 "Entered %s.\n", __func__);
4285 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4286 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
4287 mcp->mb[2] = LSW(start);
4288 mcp->mb[3] = MSW(start);
4289 mcp->mb[4] = LSW(finish);
4290 mcp->mb[5] = MSW(finish);
4291 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4292 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4293 mcp->tov = MBX_TOV_SECONDS;
4295 rval = qla2x00_mailbox_command(vha, mcp);
4297 if (rval != QLA_SUCCESS) {
4298 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4299 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4300 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4302 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4303 "Done %s.\n", __func__);
4310 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
4314 mbx_cmd_t *mcp = &mc;
4316 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
4317 "Entered %s.\n", __func__);
4319 mcp->mb[0] = MBC_RESTART_MPI_FW;
4320 mcp->out_mb = MBX_0;
4321 mcp->in_mb = MBX_0|MBX_1;
4322 mcp->tov = MBX_TOV_SECONDS;
4324 rval = qla2x00_mailbox_command(vha, mcp);
4326 if (rval != QLA_SUCCESS) {
4327 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
4328 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4329 rval, mcp->mb[0], mcp->mb[1]);
4331 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
4332 "Done %s.\n", __func__);
4339 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4343 mbx_cmd_t *mcp = &mc;
4347 struct qla_hw_data *ha = vha->hw;
4349 if (!IS_P3P_TYPE(ha))
4350 return QLA_FUNCTION_FAILED;
4352 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
4353 "Entered %s.\n", __func__);
4355 str = (void *)version;
4356 len = strlen(version);
4358 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4359 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
4360 mcp->out_mb = MBX_1|MBX_0;
4361 for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4362 mcp->mb[i] = cpu_to_le16p(str);
4363 mcp->out_mb |= 1<<i;
4365 for (; i < 16; i++) {
4367 mcp->out_mb |= 1<<i;
4369 mcp->in_mb = MBX_1|MBX_0;
4370 mcp->tov = MBX_TOV_SECONDS;
4372 rval = qla2x00_mailbox_command(vha, mcp);
4374 if (rval != QLA_SUCCESS) {
4375 ql_dbg(ql_dbg_mbx, vha, 0x117c,
4376 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4378 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
4379 "Done %s.\n", __func__);
4386 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4390 mbx_cmd_t *mcp = &mc;
4395 struct qla_hw_data *ha = vha->hw;
4397 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
4399 return QLA_FUNCTION_FAILED;
4401 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4402 "Entered %s.\n", __func__);
4404 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4406 ql_log(ql_log_warn, vha, 0x117f,
4407 "Failed to allocate driver version param.\n");
4408 return QLA_MEMORY_ALLOC_FAILED;
4411 memcpy(str, "\x7\x3\x11\x0", 4);
4413 len = dwlen * 4 - 4;
4414 memset(str + 4, 0, len);
4415 if (len > strlen(version))
4416 len = strlen(version);
4417 memcpy(str + 4, version, len);
4419 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4420 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4421 mcp->mb[2] = MSW(LSD(str_dma));
4422 mcp->mb[3] = LSW(LSD(str_dma));
4423 mcp->mb[6] = MSW(MSD(str_dma));
4424 mcp->mb[7] = LSW(MSD(str_dma));
4425 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4426 mcp->in_mb = MBX_1|MBX_0;
4427 mcp->tov = MBX_TOV_SECONDS;
4429 rval = qla2x00_mailbox_command(vha, mcp);
4431 if (rval != QLA_SUCCESS) {
4432 ql_dbg(ql_dbg_mbx, vha, 0x1180,
4433 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4435 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4436 "Done %s.\n", __func__);
4439 dma_pool_free(ha->s_dma_pool, str, str_dma);
4445 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
4449 mbx_cmd_t *mcp = &mc;
4451 if (!IS_FWI2_CAPABLE(vha->hw))
4452 return QLA_FUNCTION_FAILED;
4454 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4455 "Entered %s.\n", __func__);
4457 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4458 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
4459 mcp->out_mb = MBX_1|MBX_0;
4460 mcp->in_mb = MBX_1|MBX_0;
4461 mcp->tov = MBX_TOV_SECONDS;
4463 rval = qla2x00_mailbox_command(vha, mcp);
4466 if (rval != QLA_SUCCESS) {
4467 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4468 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4470 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4471 "Done %s.\n", __func__);
4478 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4479 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4483 mbx_cmd_t *mcp = &mc;
4484 struct qla_hw_data *ha = vha->hw;
4486 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
4487 "Entered %s.\n", __func__);
4489 if (!IS_FWI2_CAPABLE(ha))
4490 return QLA_FUNCTION_FAILED;
4495 mcp->mb[0] = MBC_READ_SFP;
4497 mcp->mb[2] = MSW(sfp_dma);
4498 mcp->mb[3] = LSW(sfp_dma);
4499 mcp->mb[6] = MSW(MSD(sfp_dma));
4500 mcp->mb[7] = LSW(MSD(sfp_dma));
4504 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4505 mcp->in_mb = MBX_1|MBX_0;
4506 mcp->tov = MBX_TOV_SECONDS;
4508 rval = qla2x00_mailbox_command(vha, mcp);
4513 if (rval != QLA_SUCCESS) {
4514 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
4515 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4517 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
4518 "Done %s.\n", __func__);
4525 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4526 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4530 mbx_cmd_t *mcp = &mc;
4531 struct qla_hw_data *ha = vha->hw;
4533 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
4534 "Entered %s.\n", __func__);
4536 if (!IS_FWI2_CAPABLE(ha))
4537 return QLA_FUNCTION_FAILED;
4545 mcp->mb[0] = MBC_WRITE_SFP;
4547 mcp->mb[2] = MSW(sfp_dma);
4548 mcp->mb[3] = LSW(sfp_dma);
4549 mcp->mb[6] = MSW(MSD(sfp_dma));
4550 mcp->mb[7] = LSW(MSD(sfp_dma));
4554 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4555 mcp->in_mb = MBX_1|MBX_0;
4556 mcp->tov = MBX_TOV_SECONDS;
4558 rval = qla2x00_mailbox_command(vha, mcp);
4560 if (rval != QLA_SUCCESS) {
4561 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
4562 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4564 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
4565 "Done %s.\n", __func__);
4572 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4573 uint16_t size_in_bytes, uint16_t *actual_size)
4577 mbx_cmd_t *mcp = &mc;
4579 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4580 "Entered %s.\n", __func__);
4582 if (!IS_CNA_CAPABLE(vha->hw))
4583 return QLA_FUNCTION_FAILED;
4585 mcp->mb[0] = MBC_GET_XGMAC_STATS;
4586 mcp->mb[2] = MSW(stats_dma);
4587 mcp->mb[3] = LSW(stats_dma);
4588 mcp->mb[6] = MSW(MSD(stats_dma));
4589 mcp->mb[7] = LSW(MSD(stats_dma));
4590 mcp->mb[8] = size_in_bytes >> 2;
4591 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4592 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4593 mcp->tov = MBX_TOV_SECONDS;
4595 rval = qla2x00_mailbox_command(vha, mcp);
4597 if (rval != QLA_SUCCESS) {
4598 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4599 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4600 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4602 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4603 "Done %s.\n", __func__);
4606 *actual_size = mcp->mb[2] << 2;
4613 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4618 mbx_cmd_t *mcp = &mc;
4620 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4621 "Entered %s.\n", __func__);
4623 if (!IS_CNA_CAPABLE(vha->hw))
4624 return QLA_FUNCTION_FAILED;
4626 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4628 mcp->mb[2] = MSW(tlv_dma);
4629 mcp->mb[3] = LSW(tlv_dma);
4630 mcp->mb[6] = MSW(MSD(tlv_dma));
4631 mcp->mb[7] = LSW(MSD(tlv_dma));
4633 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4634 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4635 mcp->tov = MBX_TOV_SECONDS;
4637 rval = qla2x00_mailbox_command(vha, mcp);
4639 if (rval != QLA_SUCCESS) {
4640 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4641 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4642 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4644 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4645 "Done %s.\n", __func__);
4652 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4656 mbx_cmd_t *mcp = &mc;
4658 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4659 "Entered %s.\n", __func__);
4661 if (!IS_FWI2_CAPABLE(vha->hw))
4662 return QLA_FUNCTION_FAILED;
4664 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4665 mcp->mb[1] = LSW(risc_addr);
4666 mcp->mb[8] = MSW(risc_addr);
4667 mcp->out_mb = MBX_8|MBX_1|MBX_0;
4668 mcp->in_mb = MBX_3|MBX_2|MBX_0;
4671 rval = qla2x00_mailbox_command(vha, mcp);
4672 if (rval != QLA_SUCCESS) {
4673 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4674 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4676 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4677 "Done %s.\n", __func__);
4678 *data = mcp->mb[3] << 16 | mcp->mb[2];
4685 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4690 mbx_cmd_t *mcp = &mc;
4692 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4693 "Entered %s.\n", __func__);
4695 memset(mcp->mb, 0 , sizeof(mcp->mb));
4696 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4697 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
4699 /* transfer count */
4700 mcp->mb[10] = LSW(mreq->transfer_size);
4701 mcp->mb[11] = MSW(mreq->transfer_size);
4703 /* send data address */
4704 mcp->mb[14] = LSW(mreq->send_dma);
4705 mcp->mb[15] = MSW(mreq->send_dma);
4706 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4707 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4709 /* receive data address */
4710 mcp->mb[16] = LSW(mreq->rcv_dma);
4711 mcp->mb[17] = MSW(mreq->rcv_dma);
4712 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4713 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4715 /* Iteration count */
4716 mcp->mb[18] = LSW(mreq->iteration_count);
4717 mcp->mb[19] = MSW(mreq->iteration_count);
4719 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4720 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4721 if (IS_CNA_CAPABLE(vha->hw))
4722 mcp->out_mb |= MBX_2;
4723 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4725 mcp->buf_size = mreq->transfer_size;
4726 mcp->tov = MBX_TOV_SECONDS;
4727 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4729 rval = qla2x00_mailbox_command(vha, mcp);
4731 if (rval != QLA_SUCCESS) {
4732 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4733 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4734 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4735 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4737 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4738 "Done %s.\n", __func__);
4741 /* Copy mailbox information */
4742 memcpy( mresp, mcp->mb, 64);
4747 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4752 mbx_cmd_t *mcp = &mc;
4753 struct qla_hw_data *ha = vha->hw;
4755 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4756 "Entered %s.\n", __func__);
4758 memset(mcp->mb, 0 , sizeof(mcp->mb));
4759 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4760 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
4761 if (IS_CNA_CAPABLE(ha)) {
4762 mcp->mb[1] |= BIT_15;
4763 mcp->mb[2] = vha->fcoe_fcf_idx;
4765 mcp->mb[16] = LSW(mreq->rcv_dma);
4766 mcp->mb[17] = MSW(mreq->rcv_dma);
4767 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4768 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4770 mcp->mb[10] = LSW(mreq->transfer_size);
4772 mcp->mb[14] = LSW(mreq->send_dma);
4773 mcp->mb[15] = MSW(mreq->send_dma);
4774 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4775 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4777 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4778 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4779 if (IS_CNA_CAPABLE(ha))
4780 mcp->out_mb |= MBX_2;
4783 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4784 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4785 mcp->in_mb |= MBX_1;
4786 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4787 mcp->in_mb |= MBX_3;
4789 mcp->tov = MBX_TOV_SECONDS;
4790 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4791 mcp->buf_size = mreq->transfer_size;
4793 rval = qla2x00_mailbox_command(vha, mcp);
4795 if (rval != QLA_SUCCESS) {
4796 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4797 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4798 rval, mcp->mb[0], mcp->mb[1]);
4800 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4801 "Done %s.\n", __func__);
4804 /* Copy mailbox information */
4805 memcpy(mresp, mcp->mb, 64);
4810 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4814 mbx_cmd_t *mcp = &mc;
4816 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4817 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4819 mcp->mb[0] = MBC_ISP84XX_RESET;
4820 mcp->mb[1] = enable_diagnostic;
4821 mcp->out_mb = MBX_1|MBX_0;
4822 mcp->in_mb = MBX_1|MBX_0;
4823 mcp->tov = MBX_TOV_SECONDS;
4824 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4825 rval = qla2x00_mailbox_command(vha, mcp);
4827 if (rval != QLA_SUCCESS)
4828 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4830 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4831 "Done %s.\n", __func__);
4837 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4841 mbx_cmd_t *mcp = &mc;
4843 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4844 "Entered %s.\n", __func__);
4846 if (!IS_FWI2_CAPABLE(vha->hw))
4847 return QLA_FUNCTION_FAILED;
4849 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4850 mcp->mb[1] = LSW(risc_addr);
4851 mcp->mb[2] = LSW(data);
4852 mcp->mb[3] = MSW(data);
4853 mcp->mb[8] = MSW(risc_addr);
4854 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4858 rval = qla2x00_mailbox_command(vha, mcp);
4859 if (rval != QLA_SUCCESS) {
4860 ql_dbg(ql_dbg_mbx, vha, 0x1101,
4861 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4863 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4864 "Done %s.\n", __func__);
4871 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4874 uint32_t stat, timer;
4876 struct qla_hw_data *ha = vha->hw;
4877 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4881 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4882 "Entered %s.\n", __func__);
4884 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4886 /* Write the MBC data to the registers */
4887 WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER);
4888 WRT_REG_WORD(®->mailbox1, mb[0]);
4889 WRT_REG_WORD(®->mailbox2, mb[1]);
4890 WRT_REG_WORD(®->mailbox3, mb[2]);
4891 WRT_REG_WORD(®->mailbox4, mb[3]);
4893 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT);
4895 /* Poll for MBC interrupt */
4896 for (timer = 6000000; timer; timer--) {
4897 /* Check for pending interrupts. */
4898 stat = RD_REG_DWORD(®->host_status);
4899 if (stat & HSRX_RISC_INT) {
4902 if (stat == 0x1 || stat == 0x2 ||
4903 stat == 0x10 || stat == 0x11) {
4904 set_bit(MBX_INTERRUPT,
4905 &ha->mbx_cmd_flags);
4906 mb0 = RD_REG_WORD(®->mailbox0);
4907 WRT_REG_DWORD(®->hccr,
4908 HCCRX_CLR_RISC_INT);
4909 RD_REG_DWORD(®->hccr);
4916 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4917 rval = mb0 & MBS_MASK;
4919 rval = QLA_FUNCTION_FAILED;
4921 if (rval != QLA_SUCCESS) {
4922 ql_dbg(ql_dbg_mbx, vha, 0x1104,
4923 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4925 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4926 "Done %s.\n", __func__);
4933 qla2x00_get_data_rate(scsi_qla_host_t *vha)
4937 mbx_cmd_t *mcp = &mc;
4938 struct qla_hw_data *ha = vha->hw;
4940 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
4941 "Entered %s.\n", __func__);
4943 if (!IS_FWI2_CAPABLE(ha))
4944 return QLA_FUNCTION_FAILED;
4946 mcp->mb[0] = MBC_DATA_RATE;
4948 mcp->out_mb = MBX_1|MBX_0;
4949 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4950 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4951 mcp->in_mb |= MBX_3;
4952 mcp->tov = MBX_TOV_SECONDS;
4954 rval = qla2x00_mailbox_command(vha, mcp);
4955 if (rval != QLA_SUCCESS) {
4956 ql_dbg(ql_dbg_mbx, vha, 0x1107,
4957 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4959 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
4960 "Done %s.\n", __func__);
4961 if (mcp->mb[1] != 0x7)
4962 ha->link_data_rate = mcp->mb[1];
4969 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4973 mbx_cmd_t *mcp = &mc;
4974 struct qla_hw_data *ha = vha->hw;
4976 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
4977 "Entered %s.\n", __func__);
4979 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
4981 return QLA_FUNCTION_FAILED;
4982 mcp->mb[0] = MBC_GET_PORT_CONFIG;
4983 mcp->out_mb = MBX_0;
4984 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4985 mcp->tov = MBX_TOV_SECONDS;
4988 rval = qla2x00_mailbox_command(vha, mcp);
4990 if (rval != QLA_SUCCESS) {
4991 ql_dbg(ql_dbg_mbx, vha, 0x110a,
4992 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4994 /* Copy all bits to preserve original value */
4995 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
4997 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
4998 "Done %s.\n", __func__);
5004 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5008 mbx_cmd_t *mcp = &mc;
5010 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
5011 "Entered %s.\n", __func__);
5013 mcp->mb[0] = MBC_SET_PORT_CONFIG;
5014 /* Copy all bits to preserve original setting */
5015 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
5016 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5018 mcp->tov = MBX_TOV_SECONDS;
5020 rval = qla2x00_mailbox_command(vha, mcp);
5022 if (rval != QLA_SUCCESS) {
5023 ql_dbg(ql_dbg_mbx, vha, 0x110d,
5024 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5026 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
5027 "Done %s.\n", __func__);
5034 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
5039 mbx_cmd_t *mcp = &mc;
5040 struct qla_hw_data *ha = vha->hw;
5042 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
5043 "Entered %s.\n", __func__);
5045 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
5046 return QLA_FUNCTION_FAILED;
5048 mcp->mb[0] = MBC_PORT_PARAMS;
5049 mcp->mb[1] = loop_id;
5050 if (ha->flags.fcp_prio_enabled)
5054 mcp->mb[4] = priority & 0xf;
5055 mcp->mb[9] = vha->vp_idx;
5056 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5057 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5060 rval = qla2x00_mailbox_command(vha, mcp);
5068 if (rval != QLA_SUCCESS) {
5069 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
5071 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
5072 "Done %s.\n", __func__);
5079 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
5081 int rval = QLA_FUNCTION_FAILED;
5082 struct qla_hw_data *ha = vha->hw;
5085 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
5086 ql_dbg(ql_dbg_mbx, vha, 0x1150,
5087 "Thermal not supported by this card.\n");
5091 if (IS_QLA25XX(ha)) {
5092 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5093 ha->pdev->subsystem_device == 0x0175) {
5094 rval = qla2x00_read_sfp(vha, 0, &byte,
5095 0x98, 0x1, 1, BIT_13|BIT_0);
5099 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
5100 ha->pdev->subsystem_device == 0x338e) {
5101 rval = qla2x00_read_sfp(vha, 0, &byte,
5102 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
5106 ql_dbg(ql_dbg_mbx, vha, 0x10c9,
5107 "Thermal not supported by this card.\n");
5111 if (IS_QLA82XX(ha)) {
5112 *temp = qla82xx_read_temperature(vha);
5115 } else if (IS_QLA8044(ha)) {
5116 *temp = qla8044_read_temperature(vha);
5121 rval = qla2x00_read_asic_temperature(vha, temp);
5126 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
5129 struct qla_hw_data *ha = vha->hw;
5131 mbx_cmd_t *mcp = &mc;
5133 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
5134 "Entered %s.\n", __func__);
5136 if (!IS_FWI2_CAPABLE(ha))
5137 return QLA_FUNCTION_FAILED;
5139 memset(mcp, 0, sizeof(mbx_cmd_t));
5140 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5143 mcp->out_mb = MBX_1|MBX_0;
5148 rval = qla2x00_mailbox_command(vha, mcp);
5149 if (rval != QLA_SUCCESS) {
5150 ql_dbg(ql_dbg_mbx, vha, 0x1016,
5151 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5153 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
5154 "Done %s.\n", __func__);
5161 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
5164 struct qla_hw_data *ha = vha->hw;
5166 mbx_cmd_t *mcp = &mc;
5168 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
5169 "Entered %s.\n", __func__);
5171 if (!IS_P3P_TYPE(ha))
5172 return QLA_FUNCTION_FAILED;
5174 memset(mcp, 0, sizeof(mbx_cmd_t));
5175 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5178 mcp->out_mb = MBX_1|MBX_0;
5183 rval = qla2x00_mailbox_command(vha, mcp);
5184 if (rval != QLA_SUCCESS) {
5185 ql_dbg(ql_dbg_mbx, vha, 0x100c,
5186 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5188 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
5189 "Done %s.\n", __func__);
5196 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
5198 struct qla_hw_data *ha = vha->hw;
5200 mbx_cmd_t *mcp = &mc;
5201 int rval = QLA_FUNCTION_FAILED;
5203 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
5204 "Entered %s.\n", __func__);
5206 memset(mcp->mb, 0 , sizeof(mcp->mb));
5207 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5208 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5209 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
5210 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
5212 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5213 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
5214 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5216 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5217 mcp->tov = MBX_TOV_SECONDS;
5218 rval = qla2x00_mailbox_command(vha, mcp);
5220 /* Always copy back return mailbox values. */
5221 if (rval != QLA_SUCCESS) {
5222 ql_dbg(ql_dbg_mbx, vha, 0x1120,
5223 "mailbox command FAILED=0x%x, subcode=%x.\n",
5224 (mcp->mb[1] << 16) | mcp->mb[0],
5225 (mcp->mb[3] << 16) | mcp->mb[2]);
5227 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
5228 "Done %s.\n", __func__);
5229 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
5230 if (!ha->md_template_size) {
5231 ql_dbg(ql_dbg_mbx, vha, 0x1122,
5232 "Null template size obtained.\n");
5233 rval = QLA_FUNCTION_FAILED;
5240 qla82xx_md_get_template(scsi_qla_host_t *vha)
5242 struct qla_hw_data *ha = vha->hw;
5244 mbx_cmd_t *mcp = &mc;
5245 int rval = QLA_FUNCTION_FAILED;
5247 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
5248 "Entered %s.\n", __func__);
5250 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5251 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5252 if (!ha->md_tmplt_hdr) {
5253 ql_log(ql_log_warn, vha, 0x1124,
5254 "Unable to allocate memory for Minidump template.\n");
5258 memset(mcp->mb, 0 , sizeof(mcp->mb));
5259 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5260 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5261 mcp->mb[2] = LSW(RQST_TMPLT);
5262 mcp->mb[3] = MSW(RQST_TMPLT);
5263 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
5264 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
5265 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
5266 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
5267 mcp->mb[8] = LSW(ha->md_template_size);
5268 mcp->mb[9] = MSW(ha->md_template_size);
5270 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5271 mcp->tov = MBX_TOV_SECONDS;
5272 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5273 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5274 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5275 rval = qla2x00_mailbox_command(vha, mcp);
5277 if (rval != QLA_SUCCESS) {
5278 ql_dbg(ql_dbg_mbx, vha, 0x1125,
5279 "mailbox command FAILED=0x%x, subcode=%x.\n",
5280 ((mcp->mb[1] << 16) | mcp->mb[0]),
5281 ((mcp->mb[3] << 16) | mcp->mb[2]));
5283 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
5284 "Done %s.\n", __func__);
5289 qla8044_md_get_template(scsi_qla_host_t *vha)
5291 struct qla_hw_data *ha = vha->hw;
5293 mbx_cmd_t *mcp = &mc;
5294 int rval = QLA_FUNCTION_FAILED;
5295 int offset = 0, size = MINIDUMP_SIZE_36K;
5296 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
5297 "Entered %s.\n", __func__);
5299 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5300 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5301 if (!ha->md_tmplt_hdr) {
5302 ql_log(ql_log_warn, vha, 0xb11b,
5303 "Unable to allocate memory for Minidump template.\n");
5307 memset(mcp->mb, 0 , sizeof(mcp->mb));
5308 while (offset < ha->md_template_size) {
5309 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5310 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5311 mcp->mb[2] = LSW(RQST_TMPLT);
5312 mcp->mb[3] = MSW(RQST_TMPLT);
5313 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
5314 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
5315 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
5316 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
5317 mcp->mb[8] = LSW(size);
5318 mcp->mb[9] = MSW(size);
5319 mcp->mb[10] = offset & 0x0000FFFF;
5320 mcp->mb[11] = offset & 0xFFFF0000;
5321 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5322 mcp->tov = MBX_TOV_SECONDS;
5323 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5324 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5325 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5326 rval = qla2x00_mailbox_command(vha, mcp);
5328 if (rval != QLA_SUCCESS) {
5329 ql_dbg(ql_dbg_mbx, vha, 0xb11c,
5330 "mailbox command FAILED=0x%x, subcode=%x.\n",
5331 ((mcp->mb[1] << 16) | mcp->mb[0]),
5332 ((mcp->mb[3] << 16) | mcp->mb[2]));
5335 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
5336 "Done %s.\n", __func__);
5337 offset = offset + size;
5343 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5346 struct qla_hw_data *ha = vha->hw;
5348 mbx_cmd_t *mcp = &mc;
5350 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5351 return QLA_FUNCTION_FAILED;
5353 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
5354 "Entered %s.\n", __func__);
5356 memset(mcp, 0, sizeof(mbx_cmd_t));
5357 mcp->mb[0] = MBC_SET_LED_CONFIG;
5358 mcp->mb[1] = led_cfg[0];
5359 mcp->mb[2] = led_cfg[1];
5360 if (IS_QLA8031(ha)) {
5361 mcp->mb[3] = led_cfg[2];
5362 mcp->mb[4] = led_cfg[3];
5363 mcp->mb[5] = led_cfg[4];
5364 mcp->mb[6] = led_cfg[5];
5367 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5369 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5374 rval = qla2x00_mailbox_command(vha, mcp);
5375 if (rval != QLA_SUCCESS) {
5376 ql_dbg(ql_dbg_mbx, vha, 0x1134,
5377 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5379 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
5380 "Done %s.\n", __func__);
5387 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5390 struct qla_hw_data *ha = vha->hw;
5392 mbx_cmd_t *mcp = &mc;
5394 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5395 return QLA_FUNCTION_FAILED;
5397 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
5398 "Entered %s.\n", __func__);
5400 memset(mcp, 0, sizeof(mbx_cmd_t));
5401 mcp->mb[0] = MBC_GET_LED_CONFIG;
5403 mcp->out_mb = MBX_0;
5404 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5406 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5410 rval = qla2x00_mailbox_command(vha, mcp);
5411 if (rval != QLA_SUCCESS) {
5412 ql_dbg(ql_dbg_mbx, vha, 0x1137,
5413 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5415 led_cfg[0] = mcp->mb[1];
5416 led_cfg[1] = mcp->mb[2];
5417 if (IS_QLA8031(ha)) {
5418 led_cfg[2] = mcp->mb[3];
5419 led_cfg[3] = mcp->mb[4];
5420 led_cfg[4] = mcp->mb[5];
5421 led_cfg[5] = mcp->mb[6];
5423 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
5424 "Done %s.\n", __func__);
5431 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
5434 struct qla_hw_data *ha = vha->hw;
5436 mbx_cmd_t *mcp = &mc;
5438 if (!IS_P3P_TYPE(ha))
5439 return QLA_FUNCTION_FAILED;
5441 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5442 "Entered %s.\n", __func__);
5444 memset(mcp, 0, sizeof(mbx_cmd_t));
5445 mcp->mb[0] = MBC_SET_LED_CONFIG;
5451 mcp->out_mb = MBX_7|MBX_0;
5453 mcp->tov = MBX_TOV_SECONDS;
5456 rval = qla2x00_mailbox_command(vha, mcp);
5457 if (rval != QLA_SUCCESS) {
5458 ql_dbg(ql_dbg_mbx, vha, 0x1128,
5459 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5461 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5462 "Done %s.\n", __func__);
5469 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5472 struct qla_hw_data *ha = vha->hw;
5474 mbx_cmd_t *mcp = &mc;
5476 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5477 return QLA_FUNCTION_FAILED;
5479 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
5480 "Entered %s.\n", __func__);
5482 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
5483 mcp->mb[1] = LSW(reg);
5484 mcp->mb[2] = MSW(reg);
5485 mcp->mb[3] = LSW(data);
5486 mcp->mb[4] = MSW(data);
5487 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5489 mcp->in_mb = MBX_1|MBX_0;
5490 mcp->tov = MBX_TOV_SECONDS;
5492 rval = qla2x00_mailbox_command(vha, mcp);
5494 if (rval != QLA_SUCCESS) {
5495 ql_dbg(ql_dbg_mbx, vha, 0x1131,
5496 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5498 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5499 "Done %s.\n", __func__);
5506 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
5509 struct qla_hw_data *ha = vha->hw;
5511 mbx_cmd_t *mcp = &mc;
5513 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5514 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5515 "Implicit LOGO Unsupported.\n");
5516 return QLA_FUNCTION_FAILED;
5520 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
5521 "Entering %s.\n", __func__);
5523 /* Perform Implicit LOGO. */
5524 mcp->mb[0] = MBC_PORT_LOGOUT;
5525 mcp->mb[1] = fcport->loop_id;
5526 mcp->mb[10] = BIT_15;
5527 mcp->out_mb = MBX_10|MBX_1|MBX_0;
5529 mcp->tov = MBX_TOV_SECONDS;
5531 rval = qla2x00_mailbox_command(vha, mcp);
5532 if (rval != QLA_SUCCESS)
5533 ql_dbg(ql_dbg_mbx, vha, 0x113d,
5534 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5536 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
5537 "Done %s.\n", __func__);
5543 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
5547 mbx_cmd_t *mcp = &mc;
5548 struct qla_hw_data *ha = vha->hw;
5549 unsigned long retry_max_time = jiffies + (2 * HZ);
5551 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5552 return QLA_FUNCTION_FAILED;
5554 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
5557 mcp->mb[0] = MBC_READ_REMOTE_REG;
5558 mcp->mb[1] = LSW(reg);
5559 mcp->mb[2] = MSW(reg);
5560 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5561 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5562 mcp->tov = MBX_TOV_SECONDS;
5564 rval = qla2x00_mailbox_command(vha, mcp);
5566 if (rval != QLA_SUCCESS) {
5567 ql_dbg(ql_dbg_mbx, vha, 0x114c,
5568 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5569 rval, mcp->mb[0], mcp->mb[1]);
5571 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
5572 if (*data == QLA8XXX_BAD_VALUE) {
5574 * During soft-reset CAMRAM register reads might
5575 * return 0xbad0bad0. So retry for MAX of 2 sec
5576 * while reading camram registers.
5578 if (time_after(jiffies, retry_max_time)) {
5579 ql_dbg(ql_dbg_mbx, vha, 0x1141,
5580 "Failure to read CAMRAM register. "
5581 "data=0x%x.\n", *data);
5582 return QLA_FUNCTION_FAILED;
5587 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
5594 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
5598 mbx_cmd_t *mcp = &mc;
5599 struct qla_hw_data *ha = vha->hw;
5601 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5602 return QLA_FUNCTION_FAILED;
5604 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
5606 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
5607 mcp->out_mb = MBX_0;
5608 mcp->in_mb = MBX_1|MBX_0;
5609 mcp->tov = MBX_TOV_SECONDS;
5611 rval = qla2x00_mailbox_command(vha, mcp);
5613 if (rval != QLA_SUCCESS) {
5614 ql_dbg(ql_dbg_mbx, vha, 0x1144,
5615 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5616 rval, mcp->mb[0], mcp->mb[1]);
5617 ha->isp_ops->fw_dump(vha, 0);
5619 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
5626 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
5627 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
5631 mbx_cmd_t *mcp = &mc;
5632 uint8_t subcode = (uint8_t)options;
5633 struct qla_hw_data *ha = vha->hw;
5635 if (!IS_QLA8031(ha))
5636 return QLA_FUNCTION_FAILED;
5638 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5640 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5641 mcp->mb[1] = options;
5642 mcp->out_mb = MBX_1|MBX_0;
5643 if (subcode & BIT_2) {
5644 mcp->mb[2] = LSW(start_addr);
5645 mcp->mb[3] = MSW(start_addr);
5646 mcp->mb[4] = LSW(end_addr);
5647 mcp->mb[5] = MSW(end_addr);
5648 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5650 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5651 if (!(subcode & (BIT_2 | BIT_5)))
5652 mcp->in_mb |= MBX_4|MBX_3;
5653 mcp->tov = MBX_TOV_SECONDS;
5655 rval = qla2x00_mailbox_command(vha, mcp);
5657 if (rval != QLA_SUCCESS) {
5658 ql_dbg(ql_dbg_mbx, vha, 0x1147,
5659 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5660 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5662 ha->isp_ops->fw_dump(vha, 0);
5664 if (subcode & BIT_5)
5665 *sector_size = mcp->mb[1];
5666 else if (subcode & (BIT_6 | BIT_7)) {
5667 ql_dbg(ql_dbg_mbx, vha, 0x1148,
5668 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5669 } else if (subcode & (BIT_3 | BIT_4)) {
5670 ql_dbg(ql_dbg_mbx, vha, 0x1149,
5671 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5673 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5680 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5685 mbx_cmd_t *mcp = &mc;
5687 if (!IS_MCTP_CAPABLE(vha->hw))
5688 return QLA_FUNCTION_FAILED;
5690 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5691 "Entered %s.\n", __func__);
5693 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5694 mcp->mb[1] = LSW(addr);
5695 mcp->mb[2] = MSW(req_dma);
5696 mcp->mb[3] = LSW(req_dma);
5697 mcp->mb[4] = MSW(size);
5698 mcp->mb[5] = LSW(size);
5699 mcp->mb[6] = MSW(MSD(req_dma));
5700 mcp->mb[7] = LSW(MSD(req_dma));
5701 mcp->mb[8] = MSW(addr);
5702 /* Setting RAM ID to valid */
5703 mcp->mb[10] |= BIT_7;
5704 /* For MCTP RAM ID is 0x40 */
5705 mcp->mb[10] |= 0x40;
5707 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5711 mcp->tov = MBX_TOV_SECONDS;
5713 rval = qla2x00_mailbox_command(vha, mcp);
5715 if (rval != QLA_SUCCESS) {
5716 ql_dbg(ql_dbg_mbx, vha, 0x114e,
5717 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5719 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
5720 "Done %s.\n", __func__);