drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF:\n"
 124                 " Default is 2.\n"
 125                 "  0 -- No DIF Support\n"
 126                 "  1 -- Enable DIF for all types\n"
 127                 "  2 -- Enable DIF for all types, except Type 0.\n");
 128
 129 int ql2xenablehba_err_chk = 2;
 130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- Error isolation disabled\n"
 135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 136                 "  2 -- Error isolation enabled for all Types\n");
 137
 138 int ql2xiidmaenable=1;
 139 module_param(ql2xiidmaenable, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xiidmaenable,
 141                 "Enables iIDMA settings "
 142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 143
 144 int ql2xmaxqueues = 1;
 145 module_param(ql2xmaxqueues, int, S_IRUGO);
 146 MODULE_PARM_DESC(ql2xmaxqueues,
 147                 "Enables MQ settings "
 148                 "Default is 1 for single queue. Set it to number "
 149                 "of queues in MQ mode.");
 150
 151 int ql2xmultique_tag;
 152 module_param(ql2xmultique_tag, int, S_IRUGO);
 153 MODULE_PARM_DESC(ql2xmultique_tag,
 154                 "Enables CPU affinity settings for the driver "
 155                 "Default is 0 for no affinity of request and response IO. "
 156                 "Set it to 1 to turn on the cpu affinity.");
 157
 158 int ql2xfwloadbin;
 159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 160 MODULE_PARM_DESC(ql2xfwloadbin,
 161                 "Option to specify location from which to load ISP firmware:.\n"
 162                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 163                 "      interface.\n"
 164                 " 1 -- load firmware from flash.\n"
 165                 " 0 -- use default semantics.\n");
 166
 167 int ql2xetsenable;
 168 module_param(ql2xetsenable, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xetsenable,
 170                 "Enables firmware ETS burst."
 171                 "Default is 0 - skip ETS enablement.");
 172
 173 int ql2xdbwr = 1;
 174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xdbwr,
 176                 "Option to specify scheme for request queue posting.\n"
 177                 " 0 -- Regular doorbell.\n"
 178                 " 1 -- CAMRAM doorbell (faster).\n");
 179
 180 int ql2xtargetreset = 1;
 181 module_param(ql2xtargetreset, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xtargetreset,
 183                  "Enable target reset."
 184                  "Default is 1 - use hw defaults.");
 185
 186 int ql2xgffidenable;
 187 module_param(ql2xgffidenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xgffidenable,
 189                 "Enables GFF_ID checks of port type. "
 190                 "Default is 0 - Do not use GFF_ID information.");
 191
 192 int ql2xasynctmfenable;
 193 module_param(ql2xasynctmfenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xasynctmfenable,
 195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 197
 198 int ql2xdontresethba;
 199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdontresethba,
 201                 "Option to specify reset behaviour.\n"
 202                 " 0 (Default) -- Reset on failure.\n"
 203                 " 1 -- Do not reset on failure.\n");
 204
 205 uint64_t ql2xmaxlun = MAX_LUNS;
 206 module_param(ql2xmaxlun, ullong, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xmaxlun,
 208                 "Defines the maximum LU number to register with the SCSI "
 209                 "midlayer. Default is 65535.");
 210
 211 int ql2xmdcapmask = 0x1F;
 212 module_param(ql2xmdcapmask, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xmdcapmask,
 214                 "Set the Minidump driver capture mask level. "
 215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 216
 217 int ql2xmdenable = 1;
 218 module_param(ql2xmdenable, int, S_IRUGO);
 219 MODULE_PARM_DESC(ql2xmdenable,
 220                 "Enable/disable MiniDump. "
 221                 "0 - MiniDump disabled. "
 222                 "1 (Default) - MiniDump enabled.");
 223
 224 /*
 225  * SCSI host template entry points
 226  */
 227 static int qla2xxx_slave_configure(struct scsi_device * device);
 228 static int qla2xxx_slave_alloc(struct scsi_device *);
 229 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 230 static void qla2xxx_scan_start(struct Scsi_Host *);
 231 static void qla2xxx_slave_destroy(struct scsi_device *);
 232 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 233 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 234 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 236 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 237 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 238
 239 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 240 static void qla2x00_free_device(scsi_qla_host_t *);
 241 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 242
 243 struct scsi_host_template qla2xxx_driver_template = {
 244         .module                 = THIS_MODULE,
 245         .name                   = QLA2XXX_DRIVER_NAME,
 246         .queuecommand           = qla2xxx_queuecommand,
 247
 248         .eh_abort_handler       = qla2xxx_eh_abort,
 249         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 250         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 251         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 252         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 253
 254         .slave_configure        = qla2xxx_slave_configure,
 255
 256         .slave_alloc            = qla2xxx_slave_alloc,
 257         .slave_destroy          = qla2xxx_slave_destroy,
 258         .scan_finished          = qla2xxx_scan_finished,
 259         .scan_start             = qla2xxx_scan_start,
 260         .change_queue_depth     = scsi_change_queue_depth,
 261         .change_queue_type      = scsi_change_queue_type,
 262         .this_id                = -1,
 263         .cmd_per_lun            = 3,
 264         .use_clustering         = ENABLE_CLUSTERING,
 265         .sg_tablesize           = SG_ALL,
 266
 267         .max_sectors            = 0xFFFF,
 268         .shost_attrs            = qla2x00_host_attrs,
 269
 270         .supported_mode         = MODE_INITIATOR,
 271         .use_blk_tags           = 1,
 272         .track_queue_depth      = 1,
 273 };
 274
 275 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 276 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 277
 278 /* TODO Convert to inlines
 279  *
 280  * Timer routines
 281  */
 282
 283 __inline__ void
 284 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 285 {
 286         init_timer(&vha->timer);
 287         vha->timer.expires = jiffies + interval * HZ;
 288         vha->timer.data = (unsigned long)vha;
 289         vha->timer.function = (void (*)(unsigned long))func;
 290         add_timer(&vha->timer);
 291         vha->timer_active = 1;
 292 }
 293
 294 static inline void
 295 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 296 {
 297         /* Currently used for 82XX only. */
 298         if (vha->device_flags & DFLG_DEV_FAILED) {
 299                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 300                     "Device in a failed state, returning.\n");
 301                 return;
 302         }
 303
 304         mod_timer(&vha->timer, jiffies + interval * HZ);
 305 }
 306
 307 static __inline__ void
 308 qla2x00_stop_timer(scsi_qla_host_t *vha)
 309 {
 310         del_timer_sync(&vha->timer);
 311         vha->timer_active = 0;
 312 }
 313
 314 static int qla2x00_do_dpc(void *data);
 315
 316 static void qla2x00_rst_aen(scsi_qla_host_t *);
 317
 318 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 319         struct req_que **, struct rsp_que **);
 320 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 321 static void qla2x00_mem_free(struct qla_hw_data *);
 322
 323 /* -------------------------------------------------------------------------- */
 324 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 325                                 struct rsp_que *rsp)
 326 {
 327         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 328         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 329                                 GFP_KERNEL);
 330         if (!ha->req_q_map) {
 331                 ql_log(ql_log_fatal, vha, 0x003b,
 332                     "Unable to allocate memory for request queue ptrs.\n");
 333                 goto fail_req_map;
 334         }
 335
 336         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 337                                 GFP_KERNEL);
 338         if (!ha->rsp_q_map) {
 339                 ql_log(ql_log_fatal, vha, 0x003c,
 340                     "Unable to allocate memory for response queue ptrs.\n");
 341                 goto fail_rsp_map;
 342         }
 343         /*
 344          * Make sure we record at least the request and response queue zero in
 345          * case we need to free them if part of the probe fails.
 346          */
 347         ha->rsp_q_map[0] = rsp;
 348         ha->req_q_map[0] = req;
 349         set_bit(0, ha->rsp_qid_map);
 350         set_bit(0, ha->req_qid_map);
 351         return 1;
 352
 353 fail_rsp_map:
 354         kfree(ha->req_q_map);
 355         ha->req_q_map = NULL;
 356 fail_req_map:
 357         return -ENOMEM;
 358 }
 359
 360 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 361 {
 362         if (IS_QLAFX00(ha)) {
 363                 if (req && req->ring_fx00)
 364                         dma_free_coherent(&ha->pdev->dev,
 365                             (req->length_fx00 + 1) * sizeof(request_t),
 366                             req->ring_fx00, req->dma_fx00);
 367         } else if (req && req->ring)
 368                 dma_free_coherent(&ha->pdev->dev,
 369                 (req->length + 1) * sizeof(request_t),
 370                 req->ring, req->dma);
 371
 372         if (req)
 373                 kfree(req->outstanding_cmds);
 374
 375         kfree(req);
 376         req = NULL;
 377 }
 378
 379 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 380 {
 381         if (IS_QLAFX00(ha)) {
 382                 if (rsp && rsp->ring)
 383                         dma_free_coherent(&ha->pdev->dev,
 384                             (rsp->length_fx00 + 1) * sizeof(request_t),
 385                             rsp->ring_fx00, rsp->dma_fx00);
 386         } else if (rsp && rsp->ring) {
 387                 dma_free_coherent(&ha->pdev->dev,
 388                 (rsp->length + 1) * sizeof(response_t),
 389                 rsp->ring, rsp->dma);
 390         }
 391         kfree(rsp);
 392         rsp = NULL;
 393 }
 394
 395 static void qla2x00_free_queues(struct qla_hw_data *ha)
 396 {
 397         struct req_que *req;
 398         struct rsp_que *rsp;
 399         int cnt;
 400
 401         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 402                 req = ha->req_q_map[cnt];
 403                 qla2x00_free_req_que(ha, req);
 404         }
 405         kfree(ha->req_q_map);
 406         ha->req_q_map = NULL;
 407
 408         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 409                 rsp = ha->rsp_q_map[cnt];
 410                 qla2x00_free_rsp_que(ha, rsp);
 411         }
 412         kfree(ha->rsp_q_map);
 413         ha->rsp_q_map = NULL;
 414 }
 415
 416 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 417 {
 418         uint16_t options = 0;
 419         int ques, req, ret;
 420         struct qla_hw_data *ha = vha->hw;
 421
 422         if (!(ha->fw_attributes & BIT_6)) {
 423                 ql_log(ql_log_warn, vha, 0x00d8,
 424                     "Firmware is not multi-queue capable.\n");
 425                 goto fail;
 426         }
 427         if (ql2xmultique_tag) {
 428                 /* create a request queue for IO */
 429                 options |= BIT_7;
 430                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 431                         QLA_DEFAULT_QUE_QOS);
 432                 if (!req) {
 433                         ql_log(ql_log_warn, vha, 0x00e0,
 434                             "Failed to create request queue.\n");
 435                         goto fail;
 436                 }
 437                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 438                 vha->req = ha->req_q_map[req];
 439                 options |= BIT_1;
 440                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 441                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 442                         if (!ret) {
 443                                 ql_log(ql_log_warn, vha, 0x00e8,
 444                                     "Failed to create response queue.\n");
 445                                 goto fail2;
 446                         }
 447                 }
 448                 ha->flags.cpu_affinity_enabled = 1;
 449                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 450                     "CPU affinity mode enalbed, "
 451                     "no. of response queues:%d no. of request queues:%d.\n",
 452                     ha->max_rsp_queues, ha->max_req_queues);
 453                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 454                     "CPU affinity mode enalbed, "
 455                     "no. of response queues:%d no. of request queues:%d.\n",
 456                     ha->max_rsp_queues, ha->max_req_queues);
 457         }
 458         return 0;
 459 fail2:
 460         qla25xx_delete_queues(vha);
 461         destroy_workqueue(ha->wq);
 462         ha->wq = NULL;
 463         vha->req = ha->req_q_map[0];
 464 fail:
 465         ha->mqenable = 0;
 466         kfree(ha->req_q_map);
 467         kfree(ha->rsp_q_map);
 468         ha->max_req_queues = ha->max_rsp_queues = 1;
 469         return 1;
 470 }
 471
 472 static char *
 473 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 474 {
 475         struct qla_hw_data *ha = vha->hw;
 476         static char *pci_bus_modes[] = {
 477                 "33", "66", "100", "133",
 478         };
 479         uint16_t pci_bus;
 480
 481         strcpy(str, "PCI");
 482         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 483         if (pci_bus) {
 484                 strcat(str, "-X (");
 485                 strcat(str, pci_bus_modes[pci_bus]);
 486         } else {
 487                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 488                 strcat(str, " (");
 489                 strcat(str, pci_bus_modes[pci_bus]);
 490         }
 491         strcat(str, " MHz)");
 492
 493         return (str);
 494 }
 495
 496 static char *
 497 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 498 {
 499         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 500         struct qla_hw_data *ha = vha->hw;
 501         uint32_t pci_bus;
 502
 503         if (pci_is_pcie(ha->pdev)) {
 504                 char lwstr[6];
 505                 uint32_t lstat, lspeed, lwidth;
 506
 507                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 508                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 509                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 510
 511                 strcpy(str, "PCIe (");
 512                 switch (lspeed) {
 513                 case 1:
 514                         strcat(str, "2.5GT/s ");
 515                         break;
 516                 case 2:
 517                         strcat(str, "5.0GT/s ");
 518                         break;
 519                 case 3:
 520                         strcat(str, "8.0GT/s ");
 521                         break;
 522                 default:
 523                         strcat(str, "<unknown> ");
 524                         break;
 525                 }
 526                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 527                 strcat(str, lwstr);
 528
 529                 return str;
 530         }
 531
 532         strcpy(str, "PCI");
 533         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 534         if (pci_bus == 0 || pci_bus == 8) {
 535                 strcat(str, " (");
 536                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 537         } else {
 538                 strcat(str, "-X ");
 539                 if (pci_bus & BIT_2)
 540                         strcat(str, "Mode 2");
 541                 else
 542                         strcat(str, "Mode 1");
 543                 strcat(str, " (");
 544                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 545         }
 546         strcat(str, " MHz)");
 547
 548         return str;
 549 }
 550
 551 static char *
 552 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 553 {
 554         char un_str[10];
 555         struct qla_hw_data *ha = vha->hw;
 556
 557         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 558             ha->fw_minor_version, ha->fw_subminor_version);
 559
 560         if (ha->fw_attributes & BIT_9) {
 561                 strcat(str, "FLX");
 562                 return (str);
 563         }
 564
 565         switch (ha->fw_attributes & 0xFF) {
 566         case 0x7:
 567                 strcat(str, "EF");
 568                 break;
 569         case 0x17:
 570                 strcat(str, "TP");
 571                 break;
 572         case 0x37:
 573                 strcat(str, "IP");
 574                 break;
 575         case 0x77:
 576                 strcat(str, "VI");
 577                 break;
 578         default:
 579                 sprintf(un_str, "(%x)", ha->fw_attributes);
 580                 strcat(str, un_str);
 581                 break;
 582         }
 583         if (ha->fw_attributes & 0x100)
 584                 strcat(str, "X");
 585
 586         return (str);
 587 }
 588
 589 static char *
 590 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 591 {
 592         struct qla_hw_data *ha = vha->hw;
 593
 594         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 595             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 596         return str;
 597 }
 598
 599 void
 600 qla2x00_sp_free_dma(void *vha, void *ptr)
 601 {
 602         srb_t *sp = (srb_t *)ptr;
 603         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 604         struct qla_hw_data *ha = sp->fcport->vha->hw;
 605         void *ctx = GET_CMD_CTX_SP(sp);
 606
 607         if (sp->flags & SRB_DMA_VALID) {
 608                 scsi_dma_unmap(cmd);
 609                 sp->flags &= ~SRB_DMA_VALID;
 610         }
 611
 612         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 613                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 614                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 615                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 616         }
 617
 618         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 619                 /* List assured to be having elements */
 620                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 621                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 622         }
 623
 624         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 625                 dma_pool_free(ha->dl_dma_pool, ctx,
 626                     ((struct crc_context *)ctx)->crc_ctx_dma);
 627                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 628         }
 629
 630         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 631                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 632
 633                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 634                         ctx1->fcp_cmnd_dma);
 635                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 636                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 637                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 638                 mempool_free(ctx1, ha->ctx_mempool);
 639                 ctx1 = NULL;
 640         }
 641
 642         CMD_SP(cmd) = NULL;
 643         qla2x00_rel_sp(sp->fcport->vha, sp);
 644 }
 645
 646 static void
 647 qla2x00_sp_compl(void *data, void *ptr, int res)
 648 {
 649         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 650         srb_t *sp = (srb_t *)ptr;
 651         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 652
 653         cmd->result = res;
 654
 655         if (atomic_read(&sp->ref_count) == 0) {
 656                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 657                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 658                     sp, GET_CMD_SP(sp));
 659                 if (ql2xextended_error_logging & ql_dbg_io)
 660                         BUG();
 661                 return;
 662         }
 663         if (!atomic_dec_and_test(&sp->ref_count))
 664                 return;
 665
 666         qla2x00_sp_free_dma(ha, sp);
 667         cmd->scsi_done(cmd);
 668 }
 669
 670 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 671  * does not have the changes necessary to avoid taking host->host_lock.
 672  */
 673 static int
 674 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 675 {
 676         scsi_qla_host_t *vha = shost_priv(host);
 677         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 678         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 679         struct qla_hw_data *ha = vha->hw;
 680         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 681         srb_t *sp;
 682         int rval;
 683
 684         if (ha->flags.eeh_busy) {
 685                 if (ha->flags.pci_channel_io_perm_failure) {
 686                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 687                             "PCI Channel IO permanent failure, exiting "
 688                             "cmd=%p.\n", cmd);
 689                         cmd->result = DID_NO_CONNECT << 16;
 690                 } else {
 691                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 692                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 693                         cmd->result = DID_REQUEUE << 16;
 694                 }
 695                 goto qc24_fail_command;
 696         }
 697
 698         rval = fc_remote_port_chkready(rport);
 699         if (rval) {
 700                 cmd->result = rval;
 701                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 702                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 703                     cmd, rval);
 704                 goto qc24_fail_command;
 705         }
 706
 707         if (!vha->flags.difdix_supported &&
 708                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 709                         ql_dbg(ql_dbg_io, vha, 0x3004,
 710                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 711                             cmd);
 712                         cmd->result = DID_NO_CONNECT << 16;
 713                         goto qc24_fail_command;
 714         }
 715
 716         if (!fcport) {
 717                 cmd->result = DID_NO_CONNECT << 16;
 718                 goto qc24_fail_command;
 719         }
 720
 721         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 722                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 723                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 724                         ql_dbg(ql_dbg_io, vha, 0x3005,
 725                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 726                             atomic_read(&fcport->state),
 727                             atomic_read(&base_vha->loop_state));
 728                         cmd->result = DID_NO_CONNECT << 16;
 729                         goto qc24_fail_command;
 730                 }
 731                 goto qc24_target_busy;
 732         }
 733
 734         /*
 735          * Return target busy if we've received a non-zero retry_delay_timer
 736          * in a FCP_RSP.
 737          */
 738         if (time_after(jiffies, fcport->retry_delay_timestamp))
 739                 fcport->retry_delay_timestamp = 0;
 740         else
 741                 goto qc24_target_busy;
 742
 743         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 744         if (!sp)
 745                 goto qc24_host_busy;
 746
 747         sp->u.scmd.cmd = cmd;
 748         sp->type = SRB_SCSI_CMD;
 749         atomic_set(&sp->ref_count, 1);
 750         CMD_SP(cmd) = (void *)sp;
 751         sp->free = qla2x00_sp_free_dma;
 752         sp->done = qla2x00_sp_compl;
 753
 754         rval = ha->isp_ops->start_scsi(sp);
 755         if (rval != QLA_SUCCESS) {
 756                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 757                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 758                 goto qc24_host_busy_free_sp;
 759         }
 760
 761         return 0;
 762
 763 qc24_host_busy_free_sp:
 764         qla2x00_sp_free_dma(ha, sp);
 765
 766 qc24_host_busy:
 767         return SCSI_MLQUEUE_HOST_BUSY;
 768
 769 qc24_target_busy:
 770         return SCSI_MLQUEUE_TARGET_BUSY;
 771
 772 qc24_fail_command:
 773         cmd->scsi_done(cmd);
 774
 775         return 0;
 776 }
 777
 778 /*
 779  * qla2x00_eh_wait_on_command
 780  *    Waits for the command to be returned by the Firmware for some
 781  *    max time.
 782  *
 783  * Input:
 784  *    cmd = Scsi Command to wait on.
 785  *
 786  * Return:
 787  *    Not Found : 0
 788  *    Found : 1
 789  */
 790 static int
 791 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 792 {
 793 #define ABORT_POLLING_PERIOD    1000
 794 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 795         unsigned long wait_iter = ABORT_WAIT_ITER;
 796         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 797         struct qla_hw_data *ha = vha->hw;
 798         int ret = QLA_SUCCESS;
 799
 800         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 801                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 802                     "Return:eh_wait.\n");
 803                 return ret;
 804         }
 805
 806         while (CMD_SP(cmd) && wait_iter--) {
 807                 msleep(ABORT_POLLING_PERIOD);
 808         }
 809         if (CMD_SP(cmd))
 810                 ret = QLA_FUNCTION_FAILED;
 811
 812         return ret;
 813 }
 814
 815 /*
 816  * qla2x00_wait_for_hba_online
 817  *    Wait till the HBA is online after going through
 818  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 819  *    finally HBA is disabled ie marked offline
 820  *
 821  * Input:
 822  *     ha - pointer to host adapter structure
 823  *
 824  * Note:
 825  *    Does context switching-Release SPIN_LOCK
 826  *    (if any) before calling this routine.
 827  *
 828  * Return:
 829  *    Success (Adapter is online) : 0
 830  *    Failed  (Adapter is offline/disabled) : 1
 831  */
 832 int
 833 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 834 {
 835         int             return_status;
 836         unsigned long   wait_online;
 837         struct qla_hw_data *ha = vha->hw;
 838         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 839
 840         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 841         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 842             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 843             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 844             ha->dpc_active) && time_before(jiffies, wait_online)) {
 845
 846                 msleep(1000);
 847         }
 848         if (base_vha->flags.online)
 849                 return_status = QLA_SUCCESS;
 850         else
 851                 return_status = QLA_FUNCTION_FAILED;
 852
 853         return (return_status);
 854 }
 855
 856 /*
 857  * qla2x00_wait_for_hba_ready
 858  * Wait till the HBA is ready before doing driver unload
 859  *
 860  * Input:
 861  *     ha - pointer to host adapter structure
 862  *
 863  * Note:
 864  *    Does context switching-Release SPIN_LOCK
 865  *    (if any) before calling this routine.
 866  *
 867  */
 868 static void
 869 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
 870 {
 871         struct qla_hw_data *ha = vha->hw;
 872
 873         while (((qla2x00_reset_active(vha)) || ha->dpc_active ||
 874             ha->flags.mbox_busy) ||
 875                 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
 876                 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags))
 877                 msleep(1000);
 878 }
 879
 880 int
 881 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 882 {
 883         int             return_status;
 884         unsigned long   wait_reset;
 885         struct qla_hw_data *ha = vha->hw;
 886         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 887
 888         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 889         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 890             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 891             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 892             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 893
 894                 msleep(1000);
 895
 896                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 897                     ha->flags.chip_reset_done)
 898                         break;
 899         }
 900         if (ha->flags.chip_reset_done)
 901                 return_status = QLA_SUCCESS;
 902         else
 903                 return_status = QLA_FUNCTION_FAILED;
 904
 905         return return_status;
 906 }
 907
 908 static void
 909 sp_get(struct srb *sp)
 910 {
 911         atomic_inc(&sp->ref_count);
 912 }
 913
 914 /**************************************************************************
 915 * qla2xxx_eh_abort
 916 *
 917 * Description:
 918 *    The abort function will abort the specified command.
 919 *
 920 * Input:
 921 *    cmd = Linux SCSI command packet to be aborted.
 922 *
 923 * Returns:
 924 *    Either SUCCESS or FAILED.
 925 *
 926 * Note:
 927 *    Only return FAILED if command not returned by firmware.
 928 **************************************************************************/
 929 static int
 930 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 931 {
 932         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 933         srb_t *sp;
 934         int ret;
 935         unsigned int id;
 936         uint64_t lun;
 937         unsigned long flags;
 938         int rval, wait = 0;
 939         struct qla_hw_data *ha = vha->hw;
 940
 941         if (!CMD_SP(cmd))
 942                 return SUCCESS;
 943
 944         ret = fc_block_scsi_eh(cmd);
 945         if (ret != 0)
 946                 return ret;
 947         ret = SUCCESS;
 948
 949         id = cmd->device->id;
 950         lun = cmd->device->lun;
 951
 952         spin_lock_irqsave(&ha->hardware_lock, flags);
 953         sp = (srb_t *) CMD_SP(cmd);
 954         if (!sp) {
 955                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 956                 return SUCCESS;
 957         }
 958
 959         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 960             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p\n",
 961             vha->host_no, id, lun, sp, cmd);
 962
 963         /* Get a reference to the sp and drop the lock.*/
 964         sp_get(sp);
 965
 966         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 967         rval = ha->isp_ops->abort_command(sp);
 968         if (rval) {
 969                 if (rval == QLA_FUNCTION_PARAMETER_ERROR) {
 970                         /*
 971                          * Decrement the ref_count since we can't find the
 972                          * command
 973                          */
 974                         atomic_dec(&sp->ref_count);
 975                         ret = SUCCESS;
 976                 } else
 977                         ret = FAILED;
 978
 979                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 980                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
 981         } else {
 982                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 983                     "Abort command mbx success cmd=%p.\n", cmd);
 984                 wait = 1;
 985         }
 986
 987         spin_lock_irqsave(&ha->hardware_lock, flags);
 988         /*
 989          * Clear the slot in the oustanding_cmds array if we can't find the
 990          * command to reclaim the resources.
 991          */
 992         if (rval == QLA_FUNCTION_PARAMETER_ERROR)
 993                 vha->req->outstanding_cmds[sp->handle] = NULL;
 994         sp->done(ha, sp, 0);
 995         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 996
 997         /* Did the command return during mailbox execution? */
 998         if (ret == FAILED && !CMD_SP(cmd))
 999                 ret = SUCCESS;
1000
1001         /* Wait for the command to be returned. */
1002         if (wait) {
1003                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1004                         ql_log(ql_log_warn, vha, 0x8006,
1005                             "Abort handler timed out cmd=%p.\n", cmd);
1006                         ret = FAILED;
1007                 }
1008         }
1009
1010         ql_log(ql_log_info, vha, 0x801c,
1011             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1012             vha->host_no, id, lun, wait, ret);
1013
1014         return ret;
1015 }
1016
1017 int
1018 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1019         uint64_t l, enum nexus_wait_type type)
1020 {
1021         int cnt, match, status;
1022         unsigned long flags;
1023         struct qla_hw_data *ha = vha->hw;
1024         struct req_que *req;
1025         srb_t *sp;
1026         struct scsi_cmnd *cmd;
1027
1028         status = QLA_SUCCESS;
1029
1030         spin_lock_irqsave(&ha->hardware_lock, flags);
1031         req = vha->req;
1032         for (cnt = 1; status == QLA_SUCCESS &&
1033                 cnt < req->num_outstanding_cmds; cnt++) {
1034                 sp = req->outstanding_cmds[cnt];
1035                 if (!sp)
1036                         continue;
1037                 if (sp->type != SRB_SCSI_CMD)
1038                         continue;
1039                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1040                         continue;
1041                 match = 0;
1042                 cmd = GET_CMD_SP(sp);
1043                 switch (type) {
1044                 case WAIT_HOST:
1045                         match = 1;
1046                         break;
1047                 case WAIT_TARGET:
1048                         match = cmd->device->id == t;
1049                         break;
1050                 case WAIT_LUN:
1051                         match = (cmd->device->id == t &&
1052                                 cmd->device->lun == l);
1053                         break;
1054                 }
1055                 if (!match)
1056                         continue;
1057
1058                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1059                 status = qla2x00_eh_wait_on_command(cmd);
1060                 spin_lock_irqsave(&ha->hardware_lock, flags);
1061         }
1062         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1063
1064         return status;
1065 }
1066
1067 static char *reset_errors[] = {
1068         "HBA not online",
1069         "HBA not ready",
1070         "Task management failed",
1071         "Waiting for command completions",
1072 };
1073
1074 static int
1075 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1076     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1077 {
1078         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1079         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1080         int err;
1081
1082         if (!fcport) {
1083                 return FAILED;
1084         }
1085
1086         err = fc_block_scsi_eh(cmd);
1087         if (err != 0)
1088                 return err;
1089
1090         ql_log(ql_log_info, vha, 0x8009,
1091             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1092             cmd->device->id, cmd->device->lun, cmd);
1093
1094         err = 0;
1095         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1096                 ql_log(ql_log_warn, vha, 0x800a,
1097                     "Wait for hba online failed for cmd=%p.\n", cmd);
1098                 goto eh_reset_failed;
1099         }
1100         err = 2;
1101         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1102                 != QLA_SUCCESS) {
1103                 ql_log(ql_log_warn, vha, 0x800c,
1104                     "do_reset failed for cmd=%p.\n", cmd);
1105                 goto eh_reset_failed;
1106         }
1107         err = 3;
1108         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1109             cmd->device->lun, type) != QLA_SUCCESS) {
1110                 ql_log(ql_log_warn, vha, 0x800d,
1111                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1112                 goto eh_reset_failed;
1113         }
1114
1115         ql_log(ql_log_info, vha, 0x800e,
1116             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1117             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1118
1119         return SUCCESS;
1120
1121 eh_reset_failed:
1122         ql_log(ql_log_info, vha, 0x800f,
1123             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1124             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1125             cmd);
1126         return FAILED;
1127 }
1128
1129 static int
1130 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1131 {
1132         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1133         struct qla_hw_data *ha = vha->hw;
1134
1135         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1136             ha->isp_ops->lun_reset);
1137 }
1138
1139 static int
1140 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1141 {
1142         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1143         struct qla_hw_data *ha = vha->hw;
1144
1145         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1146             ha->isp_ops->target_reset);
1147 }
1148
1149 /**************************************************************************
1150 * qla2xxx_eh_bus_reset
1151 *
1152 * Description:
1153 *    The bus reset function will reset the bus and abort any executing
1154 *    commands.
1155 *
1156 * Input:
1157 *    cmd = Linux SCSI command packet of the command that cause the
1158 *          bus reset.
1159 *
1160 * Returns:
1161 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1162 *
1163 **************************************************************************/
1164 static int
1165 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1166 {
1167         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1168         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1169         int ret = FAILED;
1170         unsigned int id;
1171         uint64_t lun;
1172
1173         id = cmd->device->id;
1174         lun = cmd->device->lun;
1175
1176         if (!fcport) {
1177                 return ret;
1178         }
1179
1180         ret = fc_block_scsi_eh(cmd);
1181         if (ret != 0)
1182                 return ret;
1183         ret = FAILED;
1184
1185         ql_log(ql_log_info, vha, 0x8012,
1186             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1187
1188         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1189                 ql_log(ql_log_fatal, vha, 0x8013,
1190                     "Wait for hba online failed board disabled.\n");
1191                 goto eh_bus_reset_done;
1192         }
1193
1194         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1195                 ret = SUCCESS;
1196
1197         if (ret == FAILED)
1198                 goto eh_bus_reset_done;
1199
1200         /* Flush outstanding commands. */
1201         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1202             QLA_SUCCESS) {
1203                 ql_log(ql_log_warn, vha, 0x8014,
1204                     "Wait for pending commands failed.\n");
1205                 ret = FAILED;
1206         }
1207
1208 eh_bus_reset_done:
1209         ql_log(ql_log_warn, vha, 0x802b,
1210             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1211             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1212
1213         return ret;
1214 }
1215
1216 /**************************************************************************
1217 * qla2xxx_eh_host_reset
1218 *
1219 * Description:
1220 *    The reset function will reset the Adapter.
1221 *
1222 * Input:
1223 *      cmd = Linux SCSI command packet of the command that cause the
1224 *            adapter reset.
1225 *
1226 * Returns:
1227 *      Either SUCCESS or FAILED.
1228 *
1229 * Note:
1230 **************************************************************************/
1231 static int
1232 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1233 {
1234         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1235         struct qla_hw_data *ha = vha->hw;
1236         int ret = FAILED;
1237         unsigned int id;
1238         uint64_t lun;
1239         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1240
1241         id = cmd->device->id;
1242         lun = cmd->device->lun;
1243
1244         ql_log(ql_log_info, vha, 0x8018,
1245             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1246
1247         /*
1248          * No point in issuing another reset if one is active.  Also do not
1249          * attempt a reset if we are updating flash.
1250          */
1251         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1252                 goto eh_host_reset_lock;
1253
1254         if (vha != base_vha) {
1255                 if (qla2x00_vp_abort_isp(vha))
1256                         goto eh_host_reset_lock;
1257         } else {
1258                 if (IS_P3P_TYPE(vha->hw)) {
1259                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1260                                 /* Ctx reset success */
1261                                 ret = SUCCESS;
1262                                 goto eh_host_reset_lock;
1263                         }
1264                         /* fall thru if ctx reset failed */
1265                 }
1266                 if (ha->wq)
1267                         flush_workqueue(ha->wq);
1268
1269                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1270                 if (ha->isp_ops->abort_isp(base_vha)) {
1271                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1272                         /* failed. schedule dpc to try */
1273                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1274
1275                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1276                                 ql_log(ql_log_warn, vha, 0x802a,
1277                                     "wait for hba online failed.\n");
1278                                 goto eh_host_reset_lock;
1279                         }
1280                 }
1281                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1282         }
1283
1284         /* Waiting for command to be returned to OS.*/
1285         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1286                 QLA_SUCCESS)
1287                 ret = SUCCESS;
1288
1289 eh_host_reset_lock:
1290         ql_log(ql_log_info, vha, 0x8017,
1291             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1292             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1293
1294         return ret;
1295 }
1296
1297 /*
1298 * qla2x00_loop_reset
1299 *      Issue loop reset.
1300 *
1301 * Input:
1302 *      ha = adapter block pointer.
1303 *
1304 * Returns:
1305 *      0 = success
1306 */
1307 int
1308 qla2x00_loop_reset(scsi_qla_host_t *vha)
1309 {
1310         int ret;
1311         struct fc_port *fcport;
1312         struct qla_hw_data *ha = vha->hw;
1313
1314         if (IS_QLAFX00(ha)) {
1315                 return qlafx00_loop_reset(vha);
1316         }
1317
1318         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1319                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1320                         if (fcport->port_type != FCT_TARGET)
1321                                 continue;
1322
1323                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1324                         if (ret != QLA_SUCCESS) {
1325                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1326                                     "Bus Reset failed: Reset=%d "
1327                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1328                         }
1329                 }
1330         }
1331
1332
1333         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1334                 atomic_set(&vha->loop_state, LOOP_DOWN);
1335                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1336                 qla2x00_mark_all_devices_lost(vha, 0);
1337                 ret = qla2x00_full_login_lip(vha);
1338                 if (ret != QLA_SUCCESS) {
1339                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1340                             "full_login_lip=%d.\n", ret);
1341                 }
1342         }
1343
1344         if (ha->flags.enable_lip_reset) {
1345                 ret = qla2x00_lip_reset(vha);
1346                 if (ret != QLA_SUCCESS)
1347                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1348                             "lip_reset failed (%d).\n", ret);
1349         }
1350
1351         /* Issue marker command only when we are going to start the I/O */
1352         vha->marker_needed = 1;
1353
1354         return QLA_SUCCESS;
1355 }
1356
1357 void
1358 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1359 {
1360         int que, cnt;
1361         unsigned long flags;
1362         srb_t *sp;
1363         struct qla_hw_data *ha = vha->hw;
1364         struct req_que *req;
1365
1366         qlt_host_reset_handler(ha);
1367
1368         spin_lock_irqsave(&ha->hardware_lock, flags);
1369         for (que = 0; que < ha->max_req_queues; que++) {
1370                 req = ha->req_q_map[que];
1371                 if (!req)
1372                         continue;
1373                 if (!req->outstanding_cmds)
1374                         continue;
1375                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1376                         sp = req->outstanding_cmds[cnt];
1377                         if (sp) {
1378                                 req->outstanding_cmds[cnt] = NULL;
1379                                 sp->done(vha, sp, res);
1380                         }
1381                 }
1382         }
1383         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1384 }
1385
1386 static int
1387 qla2xxx_slave_alloc(struct scsi_device *sdev)
1388 {
1389         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1390
1391         if (!rport || fc_remote_port_chkready(rport))
1392                 return -ENXIO;
1393
1394         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1395
1396         return 0;
1397 }
1398
1399 static int
1400 qla2xxx_slave_configure(struct scsi_device *sdev)
1401 {
1402         scsi_qla_host_t *vha = shost_priv(sdev->host);
1403         struct req_que *req = vha->req;
1404
1405         if (IS_T10_PI_CAPABLE(vha->hw))
1406                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1407
1408         scsi_change_queue_depth(sdev, req->max_q_depth);
1409         return 0;
1410 }
1411
1412 static void
1413 qla2xxx_slave_destroy(struct scsi_device *sdev)
1414 {
1415         sdev->hostdata = NULL;
1416 }
1417
1418 /**
1419  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1420  * @ha: HA context
1421  *
1422  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1423  * supported addressing method.
1424  */
1425 static void
1426 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1427 {
1428         /* Assume a 32bit DMA mask. */
1429         ha->flags.enable_64bit_addressing = 0;
1430
1431         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1432                 /* Any upper-dword bits set? */
1433                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1434                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1435                         /* Ok, a 64bit DMA mask is applicable. */
1436                         ha->flags.enable_64bit_addressing = 1;
1437                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1438                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1439                         return;
1440                 }
1441         }
1442
1443         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1444         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1445 }
1446
1447 static void
1448 qla2x00_enable_intrs(struct qla_hw_data *ha)
1449 {
1450         unsigned long flags = 0;
1451         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1452
1453         spin_lock_irqsave(&ha->hardware_lock, flags);
1454         ha->interrupts_on = 1;
1455         /* enable risc and host interrupts */
1456         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1457         RD_REG_WORD(&reg->ictrl);
1458         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1459
1460 }
1461
1462 static void
1463 qla2x00_disable_intrs(struct qla_hw_data *ha)
1464 {
1465         unsigned long flags = 0;
1466         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1467
1468         spin_lock_irqsave(&ha->hardware_lock, flags);
1469         ha->interrupts_on = 0;
1470         /* disable risc and host interrupts */
1471         WRT_REG_WORD(&reg->ictrl, 0);
1472         RD_REG_WORD(&reg->ictrl);
1473         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1474 }
1475
1476 static void
1477 qla24xx_enable_intrs(struct qla_hw_data *ha)
1478 {
1479         unsigned long flags = 0;
1480         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1481
1482         spin_lock_irqsave(&ha->hardware_lock, flags);
1483         ha->interrupts_on = 1;
1484         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1485         RD_REG_DWORD(&reg->ictrl);
1486         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1487 }
1488
1489 static void
1490 qla24xx_disable_intrs(struct qla_hw_data *ha)
1491 {
1492         unsigned long flags = 0;
1493         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1494
1495         if (IS_NOPOLLING_TYPE(ha))
1496                 return;
1497         spin_lock_irqsave(&ha->hardware_lock, flags);
1498         ha->interrupts_on = 0;
1499         WRT_REG_DWORD(&reg->ictrl, 0);
1500         RD_REG_DWORD(&reg->ictrl);
1501         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1502 }
1503
1504 static int
1505 qla2x00_iospace_config(struct qla_hw_data *ha)
1506 {
1507         resource_size_t pio;
1508         uint16_t msix;
1509         int cpus;
1510
1511         if (pci_request_selected_regions(ha->pdev, ha->bars,
1512             QLA2XXX_DRIVER_NAME)) {
1513                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1514                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1515                     pci_name(ha->pdev));
1516                 goto iospace_error_exit;
1517         }
1518         if (!(ha->bars & 1))
1519                 goto skip_pio;
1520
1521         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1522         pio = pci_resource_start(ha->pdev, 0);
1523         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1524                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1525                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1526                             "Invalid pci I/O region size (%s).\n",
1527                             pci_name(ha->pdev));
1528                         pio = 0;
1529                 }
1530         } else {
1531                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1532                     "Region #0 no a PIO resource (%s).\n",
1533                     pci_name(ha->pdev));
1534                 pio = 0;
1535         }
1536         ha->pio_address = pio;
1537         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1538             "PIO address=%llu.\n",
1539             (unsigned long long)ha->pio_address);
1540
1541 skip_pio:
1542         /* Use MMIO operations for all accesses. */
1543         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1544                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1545                     "Region #1 not an MMIO resource (%s), aborting.\n",
1546                     pci_name(ha->pdev));
1547                 goto iospace_error_exit;
1548         }
1549         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1550                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1551                     "Invalid PCI mem region size (%s), aborting.\n",
1552                     pci_name(ha->pdev));
1553                 goto iospace_error_exit;
1554         }
1555
1556         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1557         if (!ha->iobase) {
1558                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1559                     "Cannot remap MMIO (%s), aborting.\n",
1560                     pci_name(ha->pdev));
1561                 goto iospace_error_exit;
1562         }
1563
1564         /* Determine queue resources */
1565         ha->max_req_queues = ha->max_rsp_queues = 1;
1566         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1567                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1568                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1569                 goto mqiobase_exit;
1570
1571         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1572                         pci_resource_len(ha->pdev, 3));
1573         if (ha->mqiobase) {
1574                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1575                     "MQIO Base=%p.\n", ha->mqiobase);
1576                 /* Read MSIX vector size of the board */
1577                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1578                 ha->msix_count = msix;
1579                 /* Max queues are bounded by available msix vectors */
1580                 /* queue 0 uses two msix vectors */
1581                 if (ql2xmultique_tag) {
1582                         cpus = num_online_cpus();
1583                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1584                                 (cpus + 1) : (ha->msix_count - 1);
1585                         ha->max_req_queues = 2;
1586                 } else if (ql2xmaxqueues > 1) {
1587                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1588                             QLA_MQ_SIZE : ql2xmaxqueues;
1589                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1590                             "QoS mode set, max no of request queues:%d.\n",
1591                             ha->max_req_queues);
1592                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1593                             "QoS mode set, max no of request queues:%d.\n",
1594                             ha->max_req_queues);
1595                 }
1596                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1597                     "MSI-X vector count: %d.\n", msix);
1598         } else
1599                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1600                     "BAR 3 not enabled.\n");
1601
1602 mqiobase_exit:
1603         ha->msix_count = ha->max_rsp_queues + 1;
1604         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1605             "MSIX Count:%d.\n", ha->msix_count);
1606         return (0);
1607
1608 iospace_error_exit:
1609         return (-ENOMEM);
1610 }
1611
1612
1613 static int
1614 qla83xx_iospace_config(struct qla_hw_data *ha)
1615 {
1616         uint16_t msix;
1617         int cpus;
1618
1619         if (pci_request_selected_regions(ha->pdev, ha->bars,
1620             QLA2XXX_DRIVER_NAME)) {
1621                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1622                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1623                     pci_name(ha->pdev));
1624
1625                 goto iospace_error_exit;
1626         }
1627
1628         /* Use MMIO operations for all accesses. */
1629         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1630                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1631                     "Invalid pci I/O region size (%s).\n",
1632                     pci_name(ha->pdev));
1633                 goto iospace_error_exit;
1634         }
1635         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1636                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1637                     "Invalid PCI mem region size (%s), aborting\n",
1638                         pci_name(ha->pdev));
1639                 goto iospace_error_exit;
1640         }
1641
1642         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1643         if (!ha->iobase) {
1644                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1645                     "Cannot remap MMIO (%s), aborting.\n",
1646                     pci_name(ha->pdev));
1647                 goto iospace_error_exit;
1648         }
1649
1650         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1651         /* 83XX 26XX always use MQ type access for queues
1652          * - mbar 2, a.k.a region 4 */
1653         ha->max_req_queues = ha->max_rsp_queues = 1;
1654         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1655                         pci_resource_len(ha->pdev, 4));
1656
1657         if (!ha->mqiobase) {
1658                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1659                     "BAR2/region4 not enabled\n");
1660                 goto mqiobase_exit;
1661         }
1662
1663         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1664                         pci_resource_len(ha->pdev, 2));
1665         if (ha->msixbase) {
1666                 /* Read MSIX vector size of the board */
1667                 pci_read_config_word(ha->pdev,
1668                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1669                 ha->msix_count = msix;
1670                 /* Max queues are bounded by available msix vectors */
1671                 /* queue 0 uses two msix vectors */
1672                 if (ql2xmultique_tag) {
1673                         cpus = num_online_cpus();
1674                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1675                                 (cpus + 1) : (ha->msix_count - 1);
1676                         ha->max_req_queues = 2;
1677                 } else if (ql2xmaxqueues > 1) {
1678                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1679                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1680                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1681                             "QoS mode set, max no of request queues:%d.\n",
1682                             ha->max_req_queues);
1683                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1684                             "QoS mode set, max no of request queues:%d.\n",
1685                             ha->max_req_queues);
1686                 }
1687                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1688                     "MSI-X vector count: %d.\n", msix);
1689         } else
1690                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1691                     "BAR 1 not enabled.\n");
1692
1693 mqiobase_exit:
1694         ha->msix_count = ha->max_rsp_queues + 1;
1695
1696         qlt_83xx_iospace_config(ha);
1697
1698         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1699             "MSIX Count:%d.\n", ha->msix_count);
1700         return 0;
1701
1702 iospace_error_exit:
1703         return -ENOMEM;
1704 }
1705
1706 static struct isp_operations qla2100_isp_ops = {
1707         .pci_config             = qla2100_pci_config,
1708         .reset_chip             = qla2x00_reset_chip,
1709         .chip_diag              = qla2x00_chip_diag,
1710         .config_rings           = qla2x00_config_rings,
1711         .reset_adapter          = qla2x00_reset_adapter,
1712         .nvram_config           = qla2x00_nvram_config,
1713         .update_fw_options      = qla2x00_update_fw_options,
1714         .load_risc              = qla2x00_load_risc,
1715         .pci_info_str           = qla2x00_pci_info_str,
1716         .fw_version_str         = qla2x00_fw_version_str,
1717         .intr_handler           = qla2100_intr_handler,
1718         .enable_intrs           = qla2x00_enable_intrs,
1719         .disable_intrs          = qla2x00_disable_intrs,
1720         .abort_command          = qla2x00_abort_command,
1721         .target_reset           = qla2x00_abort_target,
1722         .lun_reset              = qla2x00_lun_reset,
1723         .fabric_login           = qla2x00_login_fabric,
1724         .fabric_logout          = qla2x00_fabric_logout,
1725         .calc_req_entries       = qla2x00_calc_iocbs_32,
1726         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1727         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1728         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1729         .read_nvram             = qla2x00_read_nvram_data,
1730         .write_nvram            = qla2x00_write_nvram_data,
1731         .fw_dump                = qla2100_fw_dump,
1732         .beacon_on              = NULL,
1733         .beacon_off             = NULL,
1734         .beacon_blink           = NULL,
1735         .read_optrom            = qla2x00_read_optrom_data,
1736         .write_optrom           = qla2x00_write_optrom_data,
1737         .get_flash_version      = qla2x00_get_flash_version,
1738         .start_scsi             = qla2x00_start_scsi,
1739         .abort_isp              = qla2x00_abort_isp,
1740         .iospace_config         = qla2x00_iospace_config,
1741         .initialize_adapter     = qla2x00_initialize_adapter,
1742 };
1743
1744 static struct isp_operations qla2300_isp_ops = {
1745         .pci_config             = qla2300_pci_config,
1746         .reset_chip             = qla2x00_reset_chip,
1747         .chip_diag              = qla2x00_chip_diag,
1748         .config_rings           = qla2x00_config_rings,
1749         .reset_adapter          = qla2x00_reset_adapter,
1750         .nvram_config           = qla2x00_nvram_config,
1751         .update_fw_options      = qla2x00_update_fw_options,
1752         .load_risc              = qla2x00_load_risc,
1753         .pci_info_str           = qla2x00_pci_info_str,
1754         .fw_version_str         = qla2x00_fw_version_str,
1755         .intr_handler           = qla2300_intr_handler,
1756         .enable_intrs           = qla2x00_enable_intrs,
1757         .disable_intrs          = qla2x00_disable_intrs,
1758         .abort_command          = qla2x00_abort_command,
1759         .target_reset           = qla2x00_abort_target,
1760         .lun_reset              = qla2x00_lun_reset,
1761         .fabric_login           = qla2x00_login_fabric,
1762         .fabric_logout          = qla2x00_fabric_logout,
1763         .calc_req_entries       = qla2x00_calc_iocbs_32,
1764         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1765         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1766         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1767         .read_nvram             = qla2x00_read_nvram_data,
1768         .write_nvram            = qla2x00_write_nvram_data,
1769         .fw_dump                = qla2300_fw_dump,
1770         .beacon_on              = qla2x00_beacon_on,
1771         .beacon_off             = qla2x00_beacon_off,
1772         .beacon_blink           = qla2x00_beacon_blink,
1773         .read_optrom            = qla2x00_read_optrom_data,
1774         .write_optrom           = qla2x00_write_optrom_data,
1775         .get_flash_version      = qla2x00_get_flash_version,
1776         .start_scsi             = qla2x00_start_scsi,
1777         .abort_isp              = qla2x00_abort_isp,
1778         .iospace_config         = qla2x00_iospace_config,
1779         .initialize_adapter     = qla2x00_initialize_adapter,
1780 };
1781
1782 static struct isp_operations qla24xx_isp_ops = {
1783         .pci_config             = qla24xx_pci_config,
1784         .reset_chip             = qla24xx_reset_chip,
1785         .chip_diag              = qla24xx_chip_diag,
1786         .config_rings           = qla24xx_config_rings,
1787         .reset_adapter          = qla24xx_reset_adapter,
1788         .nvram_config           = qla24xx_nvram_config,
1789         .update_fw_options      = qla24xx_update_fw_options,
1790         .load_risc              = qla24xx_load_risc,
1791         .pci_info_str           = qla24xx_pci_info_str,
1792         .fw_version_str         = qla24xx_fw_version_str,
1793         .intr_handler           = qla24xx_intr_handler,
1794         .enable_intrs           = qla24xx_enable_intrs,
1795         .disable_intrs          = qla24xx_disable_intrs,
1796         .abort_command          = qla24xx_abort_command,
1797         .target_reset           = qla24xx_abort_target,
1798         .lun_reset              = qla24xx_lun_reset,
1799         .fabric_login           = qla24xx_login_fabric,
1800         .fabric_logout          = qla24xx_fabric_logout,
1801         .calc_req_entries       = NULL,
1802         .build_iocbs            = NULL,
1803         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1804         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1805         .read_nvram             = qla24xx_read_nvram_data,
1806         .write_nvram            = qla24xx_write_nvram_data,
1807         .fw_dump                = qla24xx_fw_dump,
1808         .beacon_on              = qla24xx_beacon_on,
1809         .beacon_off             = qla24xx_beacon_off,
1810         .beacon_blink           = qla24xx_beacon_blink,
1811         .read_optrom            = qla24xx_read_optrom_data,
1812         .write_optrom           = qla24xx_write_optrom_data,
1813         .get_flash_version      = qla24xx_get_flash_version,
1814         .start_scsi             = qla24xx_start_scsi,
1815         .abort_isp              = qla2x00_abort_isp,
1816         .iospace_config         = qla2x00_iospace_config,
1817         .initialize_adapter     = qla2x00_initialize_adapter,
1818 };
1819
1820 static struct isp_operations qla25xx_isp_ops = {
1821         .pci_config             = qla25xx_pci_config,
1822         .reset_chip             = qla24xx_reset_chip,
1823         .chip_diag              = qla24xx_chip_diag,
1824         .config_rings           = qla24xx_config_rings,
1825         .reset_adapter          = qla24xx_reset_adapter,
1826         .nvram_config           = qla24xx_nvram_config,
1827         .update_fw_options      = qla24xx_update_fw_options,
1828         .load_risc              = qla24xx_load_risc,
1829         .pci_info_str           = qla24xx_pci_info_str,
1830         .fw_version_str         = qla24xx_fw_version_str,
1831         .intr_handler           = qla24xx_intr_handler,
1832         .enable_intrs           = qla24xx_enable_intrs,
1833         .disable_intrs          = qla24xx_disable_intrs,
1834         .abort_command          = qla24xx_abort_command,
1835         .target_reset           = qla24xx_abort_target,
1836         .lun_reset              = qla24xx_lun_reset,
1837         .fabric_login           = qla24xx_login_fabric,
1838         .fabric_logout          = qla24xx_fabric_logout,
1839         .calc_req_entries       = NULL,
1840         .build_iocbs            = NULL,
1841         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1842         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1843         .read_nvram             = qla25xx_read_nvram_data,
1844         .write_nvram            = qla25xx_write_nvram_data,
1845         .fw_dump                = qla25xx_fw_dump,
1846         .beacon_on              = qla24xx_beacon_on,
1847         .beacon_off             = qla24xx_beacon_off,
1848         .beacon_blink           = qla24xx_beacon_blink,
1849         .read_optrom            = qla25xx_read_optrom_data,
1850         .write_optrom           = qla24xx_write_optrom_data,
1851         .get_flash_version      = qla24xx_get_flash_version,
1852         .start_scsi             = qla24xx_dif_start_scsi,
1853         .abort_isp              = qla2x00_abort_isp,
1854         .iospace_config         = qla2x00_iospace_config,
1855         .initialize_adapter     = qla2x00_initialize_adapter,
1856 };
1857
1858 static struct isp_operations qla81xx_isp_ops = {
1859         .pci_config             = qla25xx_pci_config,
1860         .reset_chip             = qla24xx_reset_chip,
1861         .chip_diag              = qla24xx_chip_diag,
1862         .config_rings           = qla24xx_config_rings,
1863         .reset_adapter          = qla24xx_reset_adapter,
1864         .nvram_config           = qla81xx_nvram_config,
1865         .update_fw_options      = qla81xx_update_fw_options,
1866         .load_risc              = qla81xx_load_risc,
1867         .pci_info_str           = qla24xx_pci_info_str,
1868         .fw_version_str         = qla24xx_fw_version_str,
1869         .intr_handler           = qla24xx_intr_handler,
1870         .enable_intrs           = qla24xx_enable_intrs,
1871         .disable_intrs          = qla24xx_disable_intrs,
1872         .abort_command          = qla24xx_abort_command,
1873         .target_reset           = qla24xx_abort_target,
1874         .lun_reset              = qla24xx_lun_reset,
1875         .fabric_login           = qla24xx_login_fabric,
1876         .fabric_logout          = qla24xx_fabric_logout,
1877         .calc_req_entries       = NULL,
1878         .build_iocbs            = NULL,
1879         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1880         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1881         .read_nvram             = NULL,
1882         .write_nvram            = NULL,
1883         .fw_dump                = qla81xx_fw_dump,
1884         .beacon_on              = qla24xx_beacon_on,
1885         .beacon_off             = qla24xx_beacon_off,
1886         .beacon_blink           = qla83xx_beacon_blink,
1887         .read_optrom            = qla25xx_read_optrom_data,
1888         .write_optrom           = qla24xx_write_optrom_data,
1889         .get_flash_version      = qla24xx_get_flash_version,
1890         .start_scsi             = qla24xx_dif_start_scsi,
1891         .abort_isp              = qla2x00_abort_isp,
1892         .iospace_config         = qla2x00_iospace_config,
1893         .initialize_adapter     = qla2x00_initialize_adapter,
1894 };
1895
1896 static struct isp_operations qla82xx_isp_ops = {
1897         .pci_config             = qla82xx_pci_config,
1898         .reset_chip             = qla82xx_reset_chip,
1899         .chip_diag              = qla24xx_chip_diag,
1900         .config_rings           = qla82xx_config_rings,
1901         .reset_adapter          = qla24xx_reset_adapter,
1902         .nvram_config           = qla81xx_nvram_config,
1903         .update_fw_options      = qla24xx_update_fw_options,
1904         .load_risc              = qla82xx_load_risc,
1905         .pci_info_str           = qla24xx_pci_info_str,
1906         .fw_version_str         = qla24xx_fw_version_str,
1907         .intr_handler           = qla82xx_intr_handler,
1908         .enable_intrs           = qla82xx_enable_intrs,
1909         .disable_intrs          = qla82xx_disable_intrs,
1910         .abort_command          = qla24xx_abort_command,
1911         .target_reset           = qla24xx_abort_target,
1912         .lun_reset              = qla24xx_lun_reset,
1913         .fabric_login           = qla24xx_login_fabric,
1914         .fabric_logout          = qla24xx_fabric_logout,
1915         .calc_req_entries       = NULL,
1916         .build_iocbs            = NULL,
1917         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1918         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1919         .read_nvram             = qla24xx_read_nvram_data,
1920         .write_nvram            = qla24xx_write_nvram_data,
1921         .fw_dump                = qla82xx_fw_dump,
1922         .beacon_on              = qla82xx_beacon_on,
1923         .beacon_off             = qla82xx_beacon_off,
1924         .beacon_blink           = NULL,
1925         .read_optrom            = qla82xx_read_optrom_data,
1926         .write_optrom           = qla82xx_write_optrom_data,
1927         .get_flash_version      = qla82xx_get_flash_version,
1928         .start_scsi             = qla82xx_start_scsi,
1929         .abort_isp              = qla82xx_abort_isp,
1930         .iospace_config         = qla82xx_iospace_config,
1931         .initialize_adapter     = qla2x00_initialize_adapter,
1932 };
1933
1934 static struct isp_operations qla8044_isp_ops = {
1935         .pci_config             = qla82xx_pci_config,
1936         .reset_chip             = qla82xx_reset_chip,
1937         .chip_diag              = qla24xx_chip_diag,
1938         .config_rings           = qla82xx_config_rings,
1939         .reset_adapter          = qla24xx_reset_adapter,
1940         .nvram_config           = qla81xx_nvram_config,
1941         .update_fw_options      = qla24xx_update_fw_options,
1942         .load_risc              = qla82xx_load_risc,
1943         .pci_info_str           = qla24xx_pci_info_str,
1944         .fw_version_str         = qla24xx_fw_version_str,
1945         .intr_handler           = qla8044_intr_handler,
1946         .enable_intrs           = qla82xx_enable_intrs,
1947         .disable_intrs          = qla82xx_disable_intrs,
1948         .abort_command          = qla24xx_abort_command,
1949         .target_reset           = qla24xx_abort_target,
1950         .lun_reset              = qla24xx_lun_reset,
1951         .fabric_login           = qla24xx_login_fabric,
1952         .fabric_logout          = qla24xx_fabric_logout,
1953         .calc_req_entries       = NULL,
1954         .build_iocbs            = NULL,
1955         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1956         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1957         .read_nvram             = NULL,
1958         .write_nvram            = NULL,
1959         .fw_dump                = qla8044_fw_dump,
1960         .beacon_on              = qla82xx_beacon_on,
1961         .beacon_off             = qla82xx_beacon_off,
1962         .beacon_blink           = NULL,
1963         .read_optrom            = qla8044_read_optrom_data,
1964         .write_optrom           = qla8044_write_optrom_data,
1965         .get_flash_version      = qla82xx_get_flash_version,
1966         .start_scsi             = qla82xx_start_scsi,
1967         .abort_isp              = qla8044_abort_isp,
1968         .iospace_config         = qla82xx_iospace_config,
1969         .initialize_adapter     = qla2x00_initialize_adapter,
1970 };
1971
1972 static struct isp_operations qla83xx_isp_ops = {
1973         .pci_config             = qla25xx_pci_config,
1974         .reset_chip             = qla24xx_reset_chip,
1975         .chip_diag              = qla24xx_chip_diag,
1976         .config_rings           = qla24xx_config_rings,
1977         .reset_adapter          = qla24xx_reset_adapter,
1978         .nvram_config           = qla81xx_nvram_config,
1979         .update_fw_options      = qla81xx_update_fw_options,
1980         .load_risc              = qla81xx_load_risc,
1981         .pci_info_str           = qla24xx_pci_info_str,
1982         .fw_version_str         = qla24xx_fw_version_str,
1983         .intr_handler           = qla24xx_intr_handler,
1984         .enable_intrs           = qla24xx_enable_intrs,
1985         .disable_intrs          = qla24xx_disable_intrs,
1986         .abort_command          = qla24xx_abort_command,
1987         .target_reset           = qla24xx_abort_target,
1988         .lun_reset              = qla24xx_lun_reset,
1989         .fabric_login           = qla24xx_login_fabric,
1990         .fabric_logout          = qla24xx_fabric_logout,
1991         .calc_req_entries       = NULL,
1992         .build_iocbs            = NULL,
1993         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1994         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1995         .read_nvram             = NULL,
1996         .write_nvram            = NULL,
1997         .fw_dump                = qla83xx_fw_dump,
1998         .beacon_on              = qla24xx_beacon_on,
1999         .beacon_off             = qla24xx_beacon_off,
2000         .beacon_blink           = qla83xx_beacon_blink,
2001         .read_optrom            = qla25xx_read_optrom_data,
2002         .write_optrom           = qla24xx_write_optrom_data,
2003         .get_flash_version      = qla24xx_get_flash_version,
2004         .start_scsi             = qla24xx_dif_start_scsi,
2005         .abort_isp              = qla2x00_abort_isp,
2006         .iospace_config         = qla83xx_iospace_config,
2007         .initialize_adapter     = qla2x00_initialize_adapter,
2008 };
2009
2010 static struct isp_operations qlafx00_isp_ops = {
2011         .pci_config             = qlafx00_pci_config,
2012         .reset_chip             = qlafx00_soft_reset,
2013         .chip_diag              = qlafx00_chip_diag,
2014         .config_rings           = qlafx00_config_rings,
2015         .reset_adapter          = qlafx00_soft_reset,
2016         .nvram_config           = NULL,
2017         .update_fw_options      = NULL,
2018         .load_risc              = NULL,
2019         .pci_info_str           = qlafx00_pci_info_str,
2020         .fw_version_str         = qlafx00_fw_version_str,
2021         .intr_handler           = qlafx00_intr_handler,
2022         .enable_intrs           = qlafx00_enable_intrs,
2023         .disable_intrs          = qlafx00_disable_intrs,
2024         .abort_command          = qla24xx_async_abort_command,
2025         .target_reset           = qlafx00_abort_target,
2026         .lun_reset              = qlafx00_lun_reset,
2027         .fabric_login           = NULL,
2028         .fabric_logout          = NULL,
2029         .calc_req_entries       = NULL,
2030         .build_iocbs            = NULL,
2031         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2032         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2033         .read_nvram             = qla24xx_read_nvram_data,
2034         .write_nvram            = qla24xx_write_nvram_data,
2035         .fw_dump                = NULL,
2036         .beacon_on              = qla24xx_beacon_on,
2037         .beacon_off             = qla24xx_beacon_off,
2038         .beacon_blink           = NULL,
2039         .read_optrom            = qla24xx_read_optrom_data,
2040         .write_optrom           = qla24xx_write_optrom_data,
2041         .get_flash_version      = qla24xx_get_flash_version,
2042         .start_scsi             = qlafx00_start_scsi,
2043         .abort_isp              = qlafx00_abort_isp,
2044         .iospace_config         = qlafx00_iospace_config,
2045         .initialize_adapter     = qlafx00_initialize_adapter,
2046 };
2047
2048 static struct isp_operations qla27xx_isp_ops = {
2049         .pci_config             = qla25xx_pci_config,
2050         .reset_chip             = qla24xx_reset_chip,
2051         .chip_diag              = qla24xx_chip_diag,
2052         .config_rings           = qla24xx_config_rings,
2053         .reset_adapter          = qla24xx_reset_adapter,
2054         .nvram_config           = qla81xx_nvram_config,
2055         .update_fw_options      = qla81xx_update_fw_options,
2056         .load_risc              = qla81xx_load_risc,
2057         .pci_info_str           = qla24xx_pci_info_str,
2058         .fw_version_str         = qla24xx_fw_version_str,
2059         .intr_handler           = qla24xx_intr_handler,
2060         .enable_intrs           = qla24xx_enable_intrs,
2061         .disable_intrs          = qla24xx_disable_intrs,
2062         .abort_command          = qla24xx_abort_command,
2063         .target_reset           = qla24xx_abort_target,
2064         .lun_reset              = qla24xx_lun_reset,
2065         .fabric_login           = qla24xx_login_fabric,
2066         .fabric_logout          = qla24xx_fabric_logout,
2067         .calc_req_entries       = NULL,
2068         .build_iocbs            = NULL,
2069         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2070         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2071         .read_nvram             = NULL,
2072         .write_nvram            = NULL,
2073         .fw_dump                = qla27xx_fwdump,
2074         .beacon_on              = qla24xx_beacon_on,
2075         .beacon_off             = qla24xx_beacon_off,
2076         .beacon_blink           = qla83xx_beacon_blink,
2077         .read_optrom            = qla25xx_read_optrom_data,
2078         .write_optrom           = qla24xx_write_optrom_data,
2079         .get_flash_version      = qla24xx_get_flash_version,
2080         .start_scsi             = qla24xx_dif_start_scsi,
2081         .abort_isp              = qla2x00_abort_isp,
2082         .iospace_config         = qla83xx_iospace_config,
2083         .initialize_adapter     = qla2x00_initialize_adapter,
2084 };
2085
2086 static inline void
2087 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2088 {
2089         ha->device_type = DT_EXTENDED_IDS;
2090         switch (ha->pdev->device) {
2091         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2092                 ha->device_type |= DT_ISP2100;
2093                 ha->device_type &= ~DT_EXTENDED_IDS;
2094                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2095                 break;
2096         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2097                 ha->device_type |= DT_ISP2200;
2098                 ha->device_type &= ~DT_EXTENDED_IDS;
2099                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2100                 break;
2101         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2102                 ha->device_type |= DT_ISP2300;
2103                 ha->device_type |= DT_ZIO_SUPPORTED;
2104                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2105                 break;
2106         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2107                 ha->device_type |= DT_ISP2312;
2108                 ha->device_type |= DT_ZIO_SUPPORTED;
2109                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2110                 break;
2111         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2112                 ha->device_type |= DT_ISP2322;
2113                 ha->device_type |= DT_ZIO_SUPPORTED;
2114                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2115                     ha->pdev->subsystem_device == 0x0170)
2116                         ha->device_type |= DT_OEM_001;
2117                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2118                 break;
2119         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2120                 ha->device_type |= DT_ISP6312;
2121                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2122                 break;
2123         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2124                 ha->device_type |= DT_ISP6322;
2125                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2126                 break;
2127         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2128                 ha->device_type |= DT_ISP2422;
2129                 ha->device_type |= DT_ZIO_SUPPORTED;
2130                 ha->device_type |= DT_FWI2;
2131                 ha->device_type |= DT_IIDMA;
2132                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2133                 break;
2134         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2135                 ha->device_type |= DT_ISP2432;
2136                 ha->device_type |= DT_ZIO_SUPPORTED;
2137                 ha->device_type |= DT_FWI2;
2138                 ha->device_type |= DT_IIDMA;
2139                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2140                 break;
2141         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2142                 ha->device_type |= DT_ISP8432;
2143                 ha->device_type |= DT_ZIO_SUPPORTED;
2144                 ha->device_type |= DT_FWI2;
2145                 ha->device_type |= DT_IIDMA;
2146                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2147                 break;
2148         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2149                 ha->device_type |= DT_ISP5422;
2150                 ha->device_type |= DT_FWI2;
2151                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2152                 break;
2153         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2154                 ha->device_type |= DT_ISP5432;
2155                 ha->device_type |= DT_FWI2;
2156                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2157                 break;
2158         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2159                 ha->device_type |= DT_ISP2532;
2160                 ha->device_type |= DT_ZIO_SUPPORTED;
2161                 ha->device_type |= DT_FWI2;
2162                 ha->device_type |= DT_IIDMA;
2163                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2164                 break;
2165         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2166                 ha->device_type |= DT_ISP8001;
2167                 ha->device_type |= DT_ZIO_SUPPORTED;
2168                 ha->device_type |= DT_FWI2;
2169                 ha->device_type |= DT_IIDMA;
2170                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2171                 break;
2172         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2173                 ha->device_type |= DT_ISP8021;
2174                 ha->device_type |= DT_ZIO_SUPPORTED;
2175                 ha->device_type |= DT_FWI2;
2176                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2177                 /* Initialize 82XX ISP flags */
2178                 qla82xx_init_flags(ha);
2179                 break;
2180          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2181                 ha->device_type |= DT_ISP8044;
2182                 ha->device_type |= DT_ZIO_SUPPORTED;
2183                 ha->device_type |= DT_FWI2;
2184                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2185                 /* Initialize 82XX ISP flags */
2186                 qla82xx_init_flags(ha);
2187                 break;
2188         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2189                 ha->device_type |= DT_ISP2031;
2190                 ha->device_type |= DT_ZIO_SUPPORTED;
2191                 ha->device_type |= DT_FWI2;
2192                 ha->device_type |= DT_IIDMA;
2193                 ha->device_type |= DT_T10_PI;
2194                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2195                 break;
2196         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2197                 ha->device_type |= DT_ISP8031;
2198                 ha->device_type |= DT_ZIO_SUPPORTED;
2199                 ha->device_type |= DT_FWI2;
2200                 ha->device_type |= DT_IIDMA;
2201                 ha->device_type |= DT_T10_PI;
2202                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2203                 break;
2204         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2205                 ha->device_type |= DT_ISPFX00;
2206                 break;
2207         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2208                 ha->device_type |= DT_ISP2071;
2209                 ha->device_type |= DT_ZIO_SUPPORTED;
2210                 ha->device_type |= DT_FWI2;
2211                 ha->device_type |= DT_IIDMA;
2212                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2213                 break;
2214         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2215                 ha->device_type |= DT_ISP2271;
2216                 ha->device_type |= DT_ZIO_SUPPORTED;
2217                 ha->device_type |= DT_FWI2;
2218                 ha->device_type |= DT_IIDMA;
2219                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2220                 break;
2221         }
2222
2223         if (IS_QLA82XX(ha))
2224                 ha->port_no = ha->portnum & 1;
2225         else {
2226                 /* Get adapter physical port no from interrupt pin register. */
2227                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2228                 if (IS_QLA27XX(ha))
2229                         ha->port_no--;
2230                 else
2231                         ha->port_no = !(ha->port_no & 1);
2232         }
2233
2234         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2235             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2236             ha->device_type, ha->port_no, ha->fw_srisc_address);
2237 }
2238
2239 static void
2240 qla2xxx_scan_start(struct Scsi_Host *shost)
2241 {
2242         scsi_qla_host_t *vha = shost_priv(shost);
2243
2244         if (vha->hw->flags.running_gold_fw)
2245                 return;
2246
2247         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2248         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2249         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2250         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2251 }
2252
2253 static int
2254 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2255 {
2256         scsi_qla_host_t *vha = shost_priv(shost);
2257
2258         if (!vha->host)
2259                 return 1;
2260         if (time > vha->hw->loop_reset_delay * HZ)
2261                 return 1;
2262
2263         return atomic_read(&vha->loop_state) == LOOP_READY;
2264 }
2265
2266 /*
2267  * PCI driver interface
2268  */
2269 static int
2270 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2271 {
2272         int     ret = -ENODEV;
2273         struct Scsi_Host *host;
2274         scsi_qla_host_t *base_vha = NULL;
2275         struct qla_hw_data *ha;
2276         char pci_info[30];
2277         char fw_str[30], wq_name[30];
2278         struct scsi_host_template *sht;
2279         int bars, mem_only = 0;
2280         uint16_t req_length = 0, rsp_length = 0;
2281         struct req_que *req = NULL;
2282         struct rsp_que *rsp = NULL;
2283         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2284         sht = &qla2xxx_driver_template;
2285         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2286             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2287             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2288             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2289             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2290             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2291             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2292             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2293             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2294             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2295             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2296             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2297             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2298             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271) {
2299                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2300                 mem_only = 1;
2301                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2302                     "Mem only adapter.\n");
2303         }
2304         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2305             "Bars=%d.\n", bars);
2306
2307         if (mem_only) {
2308                 if (pci_enable_device_mem(pdev))
2309                         goto probe_out;
2310         } else {
2311                 if (pci_enable_device(pdev))
2312                         goto probe_out;
2313         }
2314
2315         /* This may fail but that's ok */
2316         pci_enable_pcie_error_reporting(pdev);
2317
2318         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2319         if (!ha) {
2320                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2321                     "Unable to allocate memory for ha.\n");
2322                 goto probe_out;
2323         }
2324         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2325             "Memory allocated for ha=%p.\n", ha);
2326         ha->pdev = pdev;
2327         ha->tgt.enable_class_2 = ql2xenableclass2;
2328         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2329         spin_lock_init(&ha->tgt.q_full_lock);
2330
2331         /* Clear our data area */
2332         ha->bars = bars;
2333         ha->mem_only = mem_only;
2334         spin_lock_init(&ha->hardware_lock);
2335         spin_lock_init(&ha->vport_slock);
2336         mutex_init(&ha->selflogin_lock);
2337         mutex_init(&ha->optrom_mutex);
2338
2339         /* Set ISP-type information. */
2340         qla2x00_set_isp_flags(ha);
2341
2342         /* Set EEH reset type to fundamental if required by hba */
2343         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2344             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2345                 pdev->needs_freset = 1;
2346
2347         ha->prev_topology = 0;
2348         ha->init_cb_size = sizeof(init_cb_t);
2349         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2350         ha->optrom_size = OPTROM_SIZE_2300;
2351
2352         /* Assign ISP specific operations. */
2353         if (IS_QLA2100(ha)) {
2354                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2355                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2356                 req_length = REQUEST_ENTRY_CNT_2100;
2357                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2358                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2359                 ha->gid_list_info_size = 4;
2360                 ha->flash_conf_off = ~0;
2361                 ha->flash_data_off = ~0;
2362                 ha->nvram_conf_off = ~0;
2363                 ha->nvram_data_off = ~0;
2364                 ha->isp_ops = &qla2100_isp_ops;
2365         } else if (IS_QLA2200(ha)) {
2366                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2367                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2368                 req_length = REQUEST_ENTRY_CNT_2200;
2369                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2370                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2371                 ha->gid_list_info_size = 4;
2372                 ha->flash_conf_off = ~0;
2373                 ha->flash_data_off = ~0;
2374                 ha->nvram_conf_off = ~0;
2375                 ha->nvram_data_off = ~0;
2376                 ha->isp_ops = &qla2100_isp_ops;
2377         } else if (IS_QLA23XX(ha)) {
2378                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2379                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2380                 req_length = REQUEST_ENTRY_CNT_2200;
2381                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2382                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2383                 ha->gid_list_info_size = 6;
2384                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2385                         ha->optrom_size = OPTROM_SIZE_2322;
2386                 ha->flash_conf_off = ~0;
2387                 ha->flash_data_off = ~0;
2388                 ha->nvram_conf_off = ~0;
2389                 ha->nvram_data_off = ~0;
2390                 ha->isp_ops = &qla2300_isp_ops;
2391         } else if (IS_QLA24XX_TYPE(ha)) {
2392                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2393                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2394                 req_length = REQUEST_ENTRY_CNT_24XX;
2395                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2396                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2397                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2398                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2399                 ha->gid_list_info_size = 8;
2400                 ha->optrom_size = OPTROM_SIZE_24XX;
2401                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2402                 ha->isp_ops = &qla24xx_isp_ops;
2403                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2404                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2405                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2406                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2407         } else if (IS_QLA25XX(ha)) {
2408                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2409                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2410                 req_length = REQUEST_ENTRY_CNT_24XX;
2411                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2412                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2413                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2414                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2415                 ha->gid_list_info_size = 8;
2416                 ha->optrom_size = OPTROM_SIZE_25XX;
2417                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2418                 ha->isp_ops = &qla25xx_isp_ops;
2419                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2420                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2421                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2422                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2423         } else if (IS_QLA81XX(ha)) {
2424                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2425                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2426                 req_length = REQUEST_ENTRY_CNT_24XX;
2427                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2428                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2429                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2430                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2431                 ha->gid_list_info_size = 8;
2432                 ha->optrom_size = OPTROM_SIZE_81XX;
2433                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2434                 ha->isp_ops = &qla81xx_isp_ops;
2435                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2436                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2437                 ha->nvram_conf_off = ~0;
2438                 ha->nvram_data_off = ~0;
2439         } else if (IS_QLA82XX(ha)) {
2440                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2441                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2442                 req_length = REQUEST_ENTRY_CNT_82XX;
2443                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2444                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2445                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2446                 ha->gid_list_info_size = 8;
2447                 ha->optrom_size = OPTROM_SIZE_82XX;
2448                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2449                 ha->isp_ops = &qla82xx_isp_ops;
2450                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2451                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2452                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2453                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2454         } else if (IS_QLA8044(ha)) {
2455                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2456                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2457                 req_length = REQUEST_ENTRY_CNT_82XX;
2458                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2459                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2460                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2461                 ha->gid_list_info_size = 8;
2462                 ha->optrom_size = OPTROM_SIZE_83XX;
2463                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2464                 ha->isp_ops = &qla8044_isp_ops;
2465                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2466                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2467                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2468                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2469         } else if (IS_QLA83XX(ha)) {
2470                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2471                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2472                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2473                 req_length = REQUEST_ENTRY_CNT_83XX;
2474                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2475                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2476                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2477                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2478                 ha->gid_list_info_size = 8;
2479                 ha->optrom_size = OPTROM_SIZE_83XX;
2480                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2481                 ha->isp_ops = &qla83xx_isp_ops;
2482                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2483                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2484                 ha->nvram_conf_off = ~0;
2485                 ha->nvram_data_off = ~0;
2486         }  else if (IS_QLAFX00(ha)) {
2487                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2488                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2489                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2490                 req_length = REQUEST_ENTRY_CNT_FX00;
2491                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2492                 ha->isp_ops = &qlafx00_isp_ops;
2493                 ha->port_down_retry_count = 30; /* default value */
2494                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2495                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2496                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2497                 ha->mr.fw_hbt_en = 1;
2498                 ha->mr.host_info_resend = false;
2499                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2500         } else if (IS_QLA27XX(ha)) {
2501                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2502                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2503                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2504                 req_length = REQUEST_ENTRY_CNT_24XX;
2505                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2506                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2507                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2508                 ha->gid_list_info_size = 8;
2509                 ha->optrom_size = OPTROM_SIZE_83XX;
2510                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2511                 ha->isp_ops = &qla27xx_isp_ops;
2512                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2513                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2514                 ha->nvram_conf_off = ~0;
2515                 ha->nvram_data_off = ~0;
2516         }
2517
2518         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2519             "mbx_count=%d, req_length=%d, "
2520             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2521             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2522             "max_fibre_devices=%d.\n",
2523             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2524             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2525             ha->nvram_npiv_size, ha->max_fibre_devices);
2526         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2527             "isp_ops=%p, flash_conf_off=%d, "
2528             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2529             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2530             ha->nvram_conf_off, ha->nvram_data_off);
2531
2532         /* Configure PCI I/O space */
2533         ret = ha->isp_ops->iospace_config(ha);
2534         if (ret)
2535                 goto iospace_config_failed;
2536
2537         ql_log_pci(ql_log_info, pdev, 0x001d,
2538             "Found an ISP%04X irq %d iobase 0x%p.\n",
2539             pdev->device, pdev->irq, ha->iobase);
2540         mutex_init(&ha->vport_lock);
2541         init_completion(&ha->mbx_cmd_comp);
2542         complete(&ha->mbx_cmd_comp);
2543         init_completion(&ha->mbx_intr_comp);
2544         init_completion(&ha->dcbx_comp);
2545         init_completion(&ha->lb_portup_comp);
2546
2547         set_bit(0, (unsigned long *) ha->vp_idx_map);
2548
2549         qla2x00_config_dma_addressing(ha);
2550         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2551             "64 Bit addressing is %s.\n",
2552             ha->flags.enable_64bit_addressing ? "enable" :
2553             "disable");
2554         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2555         if (ret) {
2556                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2557                     "Failed to allocate memory for adapter, aborting.\n");
2558
2559                 goto probe_hw_failed;
2560         }
2561
2562         req->max_q_depth = MAX_Q_DEPTH;
2563         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2564                 req->max_q_depth = ql2xmaxqdepth;
2565
2566
2567         base_vha = qla2x00_create_host(sht, ha);
2568         if (!base_vha) {
2569                 ret = -ENOMEM;
2570                 qla2x00_mem_free(ha);
2571                 qla2x00_free_req_que(ha, req);
2572                 qla2x00_free_rsp_que(ha, rsp);
2573                 goto probe_hw_failed;
2574         }
2575
2576         pci_set_drvdata(pdev, base_vha);
2577         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2578
2579         host = base_vha->host;
2580         base_vha->req = req;
2581         if (IS_QLA2XXX_MIDTYPE(ha))
2582                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2583         else
2584                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2585                                                 base_vha->vp_idx;
2586
2587         /* Setup fcport template structure. */
2588         ha->mr.fcport.vha = base_vha;
2589         ha->mr.fcport.port_type = FCT_UNKNOWN;
2590         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2591         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2592         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2593         ha->mr.fcport.scan_state = 1;
2594
2595         /* Set the SG table size based on ISP type */
2596         if (!IS_FWI2_CAPABLE(ha)) {
2597                 if (IS_QLA2100(ha))
2598                         host->sg_tablesize = 32;
2599         } else {
2600                 if (!IS_QLA82XX(ha))
2601                         host->sg_tablesize = QLA_SG_ALL;
2602         }
2603         host->max_id = ha->max_fibre_devices;
2604         host->cmd_per_lun = 3;
2605         host->unique_id = host->host_no;
2606         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2607                 host->max_cmd_len = 32;
2608         else
2609                 host->max_cmd_len = MAX_CMDSZ;
2610         host->max_channel = MAX_BUSES - 1;
2611         /* Older HBAs support only 16-bit LUNs */
2612         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2613             ql2xmaxlun > 0xffff)
2614                 host->max_lun = 0xffff;
2615         else
2616                 host->max_lun = ql2xmaxlun;
2617         host->transportt = qla2xxx_transport_template;
2618         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2619
2620         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2621             "max_id=%d this_id=%d "
2622             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2623             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2624             host->this_id, host->cmd_per_lun, host->unique_id,
2625             host->max_cmd_len, host->max_channel, host->max_lun,
2626             host->transportt, sht->vendor_id);
2627
2628 que_init:
2629         /* Alloc arrays of request and response ring ptrs */
2630         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2631                 ql_log(ql_log_fatal, base_vha, 0x003d,
2632                     "Failed to allocate memory for queue pointers..."
2633                     "aborting.\n");
2634                 goto probe_init_failed;
2635         }
2636
2637         qlt_probe_one_stage1(base_vha, ha);
2638
2639         /* Set up the irqs */
2640         ret = qla2x00_request_irqs(ha, rsp);
2641         if (ret)
2642                 goto probe_init_failed;
2643
2644         pci_save_state(pdev);
2645
2646         /* Assign back pointers */
2647         rsp->req = req;
2648         req->rsp = rsp;
2649
2650         if (IS_QLAFX00(ha)) {
2651                 ha->rsp_q_map[0] = rsp;
2652                 ha->req_q_map[0] = req;
2653                 set_bit(0, ha->req_qid_map);
2654                 set_bit(0, ha->rsp_qid_map);
2655         }
2656
2657         /* FWI2-capable only. */
2658         req->req_q_in = &ha->iobase->isp24.req_q_in;
2659         req->req_q_out = &ha->iobase->isp24.req_q_out;
2660         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2661         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2662         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2663                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2664                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2665                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2666                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2667         }
2668
2669         if (IS_QLAFX00(ha)) {
2670                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2671                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2672                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2673                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2674         }
2675
2676         if (IS_P3P_TYPE(ha)) {
2677                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2678                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2679                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2680         }
2681
2682         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2683             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2684             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2685         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2686             "req->req_q_in=%p req->req_q_out=%p "
2687             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2688             req->req_q_in, req->req_q_out,
2689             rsp->rsp_q_in, rsp->rsp_q_out);
2690         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2691             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2692             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2693         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2694             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2695             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2696
2697         if (ha->isp_ops->initialize_adapter(base_vha)) {
2698                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2699                     "Failed to initialize adapter - Adapter flags %x.\n",
2700                     base_vha->device_flags);
2701
2702                 if (IS_QLA82XX(ha)) {
2703                         qla82xx_idc_lock(ha);
2704                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2705                                 QLA8XXX_DEV_FAILED);
2706                         qla82xx_idc_unlock(ha);
2707                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2708                             "HW State: FAILED.\n");
2709                 } else if (IS_QLA8044(ha)) {
2710                         qla8044_idc_lock(ha);
2711                         qla8044_wr_direct(base_vha,
2712                                 QLA8044_CRB_DEV_STATE_INDEX,
2713                                 QLA8XXX_DEV_FAILED);
2714                         qla8044_idc_unlock(ha);
2715                         ql_log(ql_log_fatal, base_vha, 0x0150,
2716                             "HW State: FAILED.\n");
2717                 }
2718
2719                 ret = -ENODEV;
2720                 goto probe_failed;
2721         }
2722
2723         if (IS_QLAFX00(ha))
2724                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2725         else
2726                 host->can_queue = req->num_outstanding_cmds - 10;
2727
2728         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2729             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2730             host->can_queue, base_vha->req,
2731             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2732
2733         if (ha->mqenable) {
2734                 if (qla25xx_setup_mode(base_vha)) {
2735                         ql_log(ql_log_warn, base_vha, 0x00ec,
2736                             "Failed to create queues, falling back to single queue mode.\n");
2737                         goto que_init;
2738                 }
2739         }
2740
2741         if (ha->flags.running_gold_fw)
2742                 goto skip_dpc;
2743
2744         /*
2745          * Startup the kernel thread for this host adapter
2746          */
2747         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2748             "%s_dpc", base_vha->host_str);
2749         if (IS_ERR(ha->dpc_thread)) {
2750                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2751                     "Failed to start DPC thread.\n");
2752                 ret = PTR_ERR(ha->dpc_thread);
2753                 goto probe_failed;
2754         }
2755         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2756             "DPC thread started successfully.\n");
2757
2758         /*
2759          * If we're not coming up in initiator mode, we might sit for
2760          * a while without waking up the dpc thread, which leads to a
2761          * stuck process warning.  So just kick the dpc once here and
2762          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2763          */
2764         qla2xxx_wake_dpc(base_vha);
2765
2766         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2767
2768         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2769                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2770                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2771                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2772
2773                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2774                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2775                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2776                 INIT_WORK(&ha->idc_state_handler,
2777                     qla83xx_idc_state_handler_work);
2778                 INIT_WORK(&ha->nic_core_unrecoverable,
2779                     qla83xx_nic_core_unrecoverable_work);
2780         }
2781
2782 skip_dpc:
2783         list_add_tail(&base_vha->list, &ha->vp_list);
2784         base_vha->host->irq = ha->pdev->irq;
2785
2786         /* Initialized the timer */
2787         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2788         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2789             "Started qla2x00_timer with "
2790             "interval=%d.\n", WATCH_INTERVAL);
2791         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2792             "Detected hba at address=%p.\n",
2793             ha);
2794
2795         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2796                 if (ha->fw_attributes & BIT_4) {
2797                         int prot = 0, guard;
2798                         base_vha->flags.difdix_supported = 1;
2799                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2800                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2801                         if (ql2xenabledif == 1)
2802                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2803                         scsi_host_set_prot(host,
2804                             prot | SHOST_DIF_TYPE1_PROTECTION
2805                             | SHOST_DIF_TYPE2_PROTECTION
2806                             | SHOST_DIF_TYPE3_PROTECTION
2807                             | SHOST_DIX_TYPE1_PROTECTION
2808                             | SHOST_DIX_TYPE2_PROTECTION
2809                             | SHOST_DIX_TYPE3_PROTECTION);
2810
2811                         guard = SHOST_DIX_GUARD_CRC;
2812
2813                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2814                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2815                                 guard |= SHOST_DIX_GUARD_IP;
2816
2817                         scsi_host_set_guard(host, guard);
2818                 } else
2819                         base_vha->flags.difdix_supported = 0;
2820         }
2821
2822         ha->isp_ops->enable_intrs(ha);
2823
2824         if (IS_QLAFX00(ha)) {
2825                 ret = qlafx00_fx_disc(base_vha,
2826                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2827                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2828                     QLA_SG_ALL : 128;
2829         }
2830
2831         ret = scsi_add_host(host, &pdev->dev);
2832         if (ret)
2833                 goto probe_failed;
2834
2835         base_vha->flags.init_done = 1;
2836         base_vha->flags.online = 1;
2837         ha->prev_minidump_failed = 0;
2838
2839         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2840             "Init done and hba is online.\n");
2841
2842         if (qla_ini_mode_enabled(base_vha))
2843                 scsi_scan_host(host);
2844         else
2845                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2846                         "skipping scsi_scan_host() for non-initiator port\n");
2847
2848         qla2x00_alloc_sysfs_attr(base_vha);
2849
2850         if (IS_QLAFX00(ha)) {
2851                 ret = qlafx00_fx_disc(base_vha,
2852                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2853
2854                 /* Register system information */
2855                 ret =  qlafx00_fx_disc(base_vha,
2856                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2857         }
2858
2859         qla2x00_init_host_attr(base_vha);
2860
2861         qla2x00_dfs_setup(base_vha);
2862
2863         ql_log(ql_log_info, base_vha, 0x00fb,
2864             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2865         ql_log(ql_log_info, base_vha, 0x00fc,
2866             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2867             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2868             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2869             base_vha->host_no,
2870             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
2871
2872         qlt_add_target(ha, base_vha);
2873
2874         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2875         return 0;
2876
2877 probe_init_failed:
2878         qla2x00_free_req_que(ha, req);
2879         ha->req_q_map[0] = NULL;
2880         clear_bit(0, ha->req_qid_map);
2881         qla2x00_free_rsp_que(ha, rsp);
2882         ha->rsp_q_map[0] = NULL;
2883         clear_bit(0, ha->rsp_qid_map);
2884         ha->max_req_queues = ha->max_rsp_queues = 0;
2885
2886 probe_failed:
2887         if (base_vha->timer_active)
2888                 qla2x00_stop_timer(base_vha);
2889         base_vha->flags.online = 0;
2890         if (ha->dpc_thread) {
2891                 struct task_struct *t = ha->dpc_thread;
2892
2893                 ha->dpc_thread = NULL;
2894                 kthread_stop(t);
2895         }
2896
2897         qla2x00_free_device(base_vha);
2898
2899         scsi_host_put(base_vha->host);
2900
2901 probe_hw_failed:
2902         qla2x00_clear_drv_active(ha);
2903
2904 iospace_config_failed:
2905         if (IS_P3P_TYPE(ha)) {
2906                 if (!ha->nx_pcibase)
2907                         iounmap((device_reg_t *)ha->nx_pcibase);
2908                 if (!ql2xdbwr)
2909                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2910         } else {
2911                 if (ha->iobase)
2912                         iounmap(ha->iobase);
2913                 if (ha->cregbase)
2914                         iounmap(ha->cregbase);
2915         }
2916         pci_release_selected_regions(ha->pdev, ha->bars);
2917         kfree(ha);
2918         ha = NULL;
2919
2920 probe_out:
2921         pci_disable_device(pdev);
2922         return ret;
2923 }
2924
2925 static void
2926 qla2x00_shutdown(struct pci_dev *pdev)
2927 {
2928         scsi_qla_host_t *vha;
2929         struct qla_hw_data  *ha;
2930
2931         if (!atomic_read(&pdev->enable_cnt))
2932                 return;
2933
2934         vha = pci_get_drvdata(pdev);
2935         ha = vha->hw;
2936
2937         /* Notify ISPFX00 firmware */
2938         if (IS_QLAFX00(ha))
2939                 qlafx00_driver_shutdown(vha, 20);
2940
2941         /* Turn-off FCE trace */
2942         if (ha->flags.fce_enabled) {
2943                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2944                 ha->flags.fce_enabled = 0;
2945         }
2946
2947         /* Turn-off EFT trace */
2948         if (ha->eft)
2949                 qla2x00_disable_eft_trace(vha);
2950
2951         /* Stop currently executing firmware. */
2952         qla2x00_try_to_stop_firmware(vha);
2953
2954         /* Turn adapter off line */
2955         vha->flags.online = 0;
2956
2957         /* turn-off interrupts on the card */
2958         if (ha->interrupts_on) {
2959                 vha->flags.init_done = 0;
2960                 ha->isp_ops->disable_intrs(ha);
2961         }
2962
2963         qla2x00_free_irqs(vha);
2964
2965         qla2x00_free_fw_dump(ha);
2966
2967         pci_disable_pcie_error_reporting(pdev);
2968         pci_disable_device(pdev);
2969 }
2970
2971 /* Deletes all the virtual ports for a given ha */
2972 static void
2973 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
2974 {
2975         struct Scsi_Host *scsi_host;
2976         scsi_qla_host_t *vha;
2977         unsigned long flags;
2978
2979         mutex_lock(&ha->vport_lock);
2980         while (ha->cur_vport_count) {
2981                 spin_lock_irqsave(&ha->vport_slock, flags);
2982
2983                 BUG_ON(base_vha->list.next == &ha->vp_list);
2984                 /* This assumes first entry in ha->vp_list is always base vha */
2985                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2986                 scsi_host = scsi_host_get(vha->host);
2987
2988                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2989                 mutex_unlock(&ha->vport_lock);
2990
2991                 fc_vport_terminate(vha->fc_vport);
2992                 scsi_host_put(vha->host);
2993
2994                 mutex_lock(&ha->vport_lock);
2995         }
2996         mutex_unlock(&ha->vport_lock);
2997 }
2998
2999 /* Stops all deferred work threads */
3000 static void
3001 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3002 {
3003         /* Flush the work queue and remove it */
3004         if (ha->wq) {
3005                 flush_workqueue(ha->wq);
3006                 destroy_workqueue(ha->wq);
3007                 ha->wq = NULL;
3008         }
3009
3010         /* Cancel all work and destroy DPC workqueues */
3011         if (ha->dpc_lp_wq) {
3012                 cancel_work_sync(&ha->idc_aen);
3013                 destroy_workqueue(ha->dpc_lp_wq);
3014                 ha->dpc_lp_wq = NULL;
3015         }
3016
3017         if (ha->dpc_hp_wq) {
3018                 cancel_work_sync(&ha->nic_core_reset);
3019                 cancel_work_sync(&ha->idc_state_handler);
3020                 cancel_work_sync(&ha->nic_core_unrecoverable);
3021                 destroy_workqueue(ha->dpc_hp_wq);
3022                 ha->dpc_hp_wq = NULL;
3023         }
3024
3025         /* Kill the kernel thread for this host */
3026         if (ha->dpc_thread) {
3027                 struct task_struct *t = ha->dpc_thread;
3028
3029                 /*
3030                  * qla2xxx_wake_dpc checks for ->dpc_thread
3031                  * so we need to zero it out.
3032                  */
3033                 ha->dpc_thread = NULL;
3034                 kthread_stop(t);
3035         }
3036 }
3037
3038 static void
3039 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3040 {
3041         if (IS_QLA82XX(ha)) {
3042
3043                 iounmap((device_reg_t *)ha->nx_pcibase);
3044                 if (!ql2xdbwr)
3045                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3046         } else {
3047                 if (ha->iobase)
3048                         iounmap(ha->iobase);
3049
3050                 if (ha->cregbase)
3051                         iounmap(ha->cregbase);
3052
3053                 if (ha->mqiobase)
3054                         iounmap(ha->mqiobase);
3055
3056                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3057                         iounmap(ha->msixbase);
3058         }
3059 }
3060
3061 static void
3062 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3063 {
3064         if (IS_QLA8044(ha)) {
3065                 qla8044_idc_lock(ha);
3066                 qla8044_clear_drv_active(ha);
3067                 qla8044_idc_unlock(ha);
3068         } else if (IS_QLA82XX(ha)) {
3069                 qla82xx_idc_lock(ha);
3070                 qla82xx_clear_drv_active(ha);
3071                 qla82xx_idc_unlock(ha);
3072         }
3073 }
3074
3075 static void
3076 qla2x00_remove_one(struct pci_dev *pdev)
3077 {
3078         scsi_qla_host_t *base_vha;
3079         struct qla_hw_data  *ha;
3080
3081         base_vha = pci_get_drvdata(pdev);
3082         ha = base_vha->hw;
3083
3084         /* Indicate device removal to prevent future board_disable and wait
3085          * until any pending board_disable has completed. */
3086         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3087         cancel_work_sync(&ha->board_disable);
3088
3089         /*
3090          * If the PCI device is disabled then there was a PCI-disconnect and
3091          * qla2x00_disable_board_on_pci_error has taken care of most of the
3092          * resources.
3093          */
3094         if (!atomic_read(&pdev->enable_cnt)) {
3095                 scsi_host_put(base_vha->host);
3096                 kfree(ha);
3097                 pci_set_drvdata(pdev, NULL);
3098                 return;
3099         }
3100
3101         qla2x00_wait_for_hba_ready(base_vha);
3102
3103         set_bit(UNLOADING, &base_vha->dpc_flags);
3104
3105         if (IS_QLAFX00(ha))
3106                 qlafx00_driver_shutdown(base_vha, 20);
3107
3108         qla2x00_delete_all_vps(ha, base_vha);
3109
3110         if (IS_QLA8031(ha)) {
3111                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3112                     "Clearing fcoe driver presence.\n");
3113                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3114                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3115                             "Error while clearing DRV-Presence.\n");
3116         }
3117
3118         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3119
3120         qla2x00_dfs_remove(base_vha);
3121
3122         qla84xx_put_chip(base_vha);
3123
3124         /* Laser should be disabled only for ISP2031 */
3125         if (IS_QLA2031(ha))
3126                 qla83xx_disable_laser(base_vha);
3127
3128         /* Disable timer */
3129         if (base_vha->timer_active)
3130                 qla2x00_stop_timer(base_vha);
3131
3132         base_vha->flags.online = 0;
3133
3134         qla2x00_destroy_deferred_work(ha);
3135
3136         qlt_remove_target(ha, base_vha);
3137
3138         qla2x00_free_sysfs_attr(base_vha, true);
3139
3140         fc_remove_host(base_vha->host);
3141
3142         scsi_remove_host(base_vha->host);
3143
3144         qla2x00_free_device(base_vha);
3145
3146         qla2x00_clear_drv_active(ha);
3147
3148         scsi_host_put(base_vha->host);
3149
3150         qla2x00_unmap_iobases(ha);
3151
3152         pci_release_selected_regions(ha->pdev, ha->bars);
3153         kfree(ha);
3154         ha = NULL;
3155
3156         pci_disable_pcie_error_reporting(pdev);
3157
3158         pci_disable_device(pdev);
3159 }
3160
3161 static void
3162 qla2x00_free_device(scsi_qla_host_t *vha)
3163 {
3164         struct qla_hw_data *ha = vha->hw;
3165
3166         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3167
3168         /* Disable timer */
3169         if (vha->timer_active)
3170                 qla2x00_stop_timer(vha);
3171
3172         qla25xx_delete_queues(vha);
3173
3174         if (ha->flags.fce_enabled)
3175                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3176
3177         if (ha->eft)
3178                 qla2x00_disable_eft_trace(vha);
3179
3180         /* Stop currently executing firmware. */
3181         qla2x00_try_to_stop_firmware(vha);
3182
3183         vha->flags.online = 0;
3184
3185         /* turn-off interrupts on the card */
3186         if (ha->interrupts_on) {
3187                 vha->flags.init_done = 0;
3188                 ha->isp_ops->disable_intrs(ha);
3189         }
3190
3191         qla2x00_free_irqs(vha);
3192
3193         qla2x00_free_fcports(vha);
3194
3195         qla2x00_mem_free(ha);
3196
3197         qla82xx_md_free(vha);
3198
3199         qla2x00_free_queues(ha);
3200 }
3201
3202 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3203 {
3204         fc_port_t *fcport, *tfcport;
3205
3206         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3207                 list_del(&fcport->list);
3208                 qla2x00_clear_loop_id(fcport);
3209                 kfree(fcport);
3210                 fcport = NULL;
3211         }
3212 }
3213
3214 static inline void
3215 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3216     int defer)
3217 {
3218         struct fc_rport *rport;
3219         scsi_qla_host_t *base_vha;
3220         unsigned long flags;
3221
3222         if (!fcport->rport)
3223                 return;
3224
3225         rport = fcport->rport;
3226         if (defer) {
3227                 base_vha = pci_get_drvdata(vha->hw->pdev);
3228                 spin_lock_irqsave(vha->host->host_lock, flags);
3229                 fcport->drport = rport;
3230                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3231                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3232                 qla2xxx_wake_dpc(base_vha);
3233         } else {
3234                 fc_remote_port_delete(rport);
3235                 qlt_fc_port_deleted(vha, fcport);
3236         }
3237 }
3238
3239 /*
3240  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3241  *
3242  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3243  *
3244  * Return: None.
3245  *
3246  * Context:
3247  */
3248 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3249     int do_login, int defer)
3250 {
3251         if (IS_QLAFX00(vha->hw)) {
3252                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3253                 qla2x00_schedule_rport_del(vha, fcport, defer);
3254                 return;
3255         }
3256
3257         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3258             vha->vp_idx == fcport->vha->vp_idx) {
3259                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3260                 qla2x00_schedule_rport_del(vha, fcport, defer);
3261         }
3262         /*
3263          * We may need to retry the login, so don't change the state of the
3264          * port but do the retries.
3265          */
3266         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3267                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3268
3269         if (!do_login)
3270                 return;
3271
3272         if (fcport->login_retry == 0) {
3273                 fcport->login_retry = vha->hw->login_retry_count;
3274                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3275
3276                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3277                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3278                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3279         }
3280 }
3281
3282 /*
3283  * qla2x00_mark_all_devices_lost
3284  *      Updates fcport state when device goes offline.
3285  *
3286  * Input:
3287  *      ha = adapter block pointer.
3288  *      fcport = port structure pointer.
3289  *
3290  * Return:
3291  *      None.
3292  *
3293  * Context:
3294  */
3295 void
3296 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3297 {
3298         fc_port_t *fcport;
3299
3300         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3301                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3302                         continue;
3303
3304                 /*
3305                  * No point in marking the device as lost, if the device is
3306                  * already DEAD.
3307                  */
3308                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3309                         continue;
3310                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3311                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3312                         if (defer)
3313                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3314                         else if (vha->vp_idx == fcport->vha->vp_idx)
3315                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3316                 }
3317         }
3318 }
3319
3320 /*
3321 * qla2x00_mem_alloc
3322 *      Allocates adapter memory.
3323 *
3324 * Returns:
3325 *      0  = success.
3326 *      !0  = failure.
3327 */
3328 static int
3329 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3330         struct req_que **req, struct rsp_que **rsp)
3331 {
3332         char    name[16];
3333
3334         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3335                 &ha->init_cb_dma, GFP_KERNEL);
3336         if (!ha->init_cb)
3337                 goto fail;
3338
3339         if (qlt_mem_alloc(ha) < 0)
3340                 goto fail_free_init_cb;
3341
3342         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3343                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3344         if (!ha->gid_list)
3345                 goto fail_free_tgt_mem;
3346
3347         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3348         if (!ha->srb_mempool)
3349                 goto fail_free_gid_list;
3350
3351         if (IS_P3P_TYPE(ha)) {
3352                 /* Allocate cache for CT6 Ctx. */
3353                 if (!ctx_cachep) {
3354                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3355                                 sizeof(struct ct6_dsd), 0,
3356                                 SLAB_HWCACHE_ALIGN, NULL);
3357                         if (!ctx_cachep)
3358                                 goto fail_free_gid_list;
3359                 }
3360                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3361                         ctx_cachep);
3362                 if (!ha->ctx_mempool)
3363                         goto fail_free_srb_mempool;
3364                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3365                     "ctx_cachep=%p ctx_mempool=%p.\n",
3366                     ctx_cachep, ha->ctx_mempool);
3367         }
3368
3369         /* Get memory for cached NVRAM */
3370         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3371         if (!ha->nvram)
3372                 goto fail_free_ctx_mempool;
3373
3374         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3375                 ha->pdev->device);
3376         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3377                 DMA_POOL_SIZE, 8, 0);
3378         if (!ha->s_dma_pool)
3379                 goto fail_free_nvram;
3380
3381         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3382             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3383             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3384
3385         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3386                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3387                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3388                 if (!ha->dl_dma_pool) {
3389                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3390                             "Failed to allocate memory for dl_dma_pool.\n");
3391                         goto fail_s_dma_pool;
3392                 }
3393
3394                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3395                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3396                 if (!ha->fcp_cmnd_dma_pool) {
3397                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3398                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3399                         goto fail_dl_dma_pool;
3400                 }
3401                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3402                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3403                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3404         }
3405
3406         /* Allocate memory for SNS commands */
3407         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3408         /* Get consistent memory allocated for SNS commands */
3409                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3410                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3411                 if (!ha->sns_cmd)
3412                         goto fail_dma_pool;
3413                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3414                     "sns_cmd: %p.\n", ha->sns_cmd);
3415         } else {
3416         /* Get consistent memory allocated for MS IOCB */
3417                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3418                         &ha->ms_iocb_dma);
3419                 if (!ha->ms_iocb)
3420                         goto fail_dma_pool;
3421         /* Get consistent memory allocated for CT SNS commands */
3422                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3423                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3424                 if (!ha->ct_sns)
3425                         goto fail_free_ms_iocb;
3426                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3427                     "ms_iocb=%p ct_sns=%p.\n",
3428                     ha->ms_iocb, ha->ct_sns);
3429         }
3430
3431         /* Allocate memory for request ring */
3432         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3433         if (!*req) {
3434                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3435                     "Failed to allocate memory for req.\n");
3436                 goto fail_req;
3437         }
3438         (*req)->length = req_len;
3439         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3440                 ((*req)->length + 1) * sizeof(request_t),
3441                 &(*req)->dma, GFP_KERNEL);
3442         if (!(*req)->ring) {
3443                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3444                     "Failed to allocate memory for req_ring.\n");
3445                 goto fail_req_ring;
3446         }
3447         /* Allocate memory for response ring */
3448         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3449         if (!*rsp) {
3450                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3451                     "Failed to allocate memory for rsp.\n");
3452                 goto fail_rsp;
3453         }
3454         (*rsp)->hw = ha;
3455         (*rsp)->length = rsp_len;
3456         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3457                 ((*rsp)->length + 1) * sizeof(response_t),
3458                 &(*rsp)->dma, GFP_KERNEL);
3459         if (!(*rsp)->ring) {
3460                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3461                     "Failed to allocate memory for rsp_ring.\n");
3462                 goto fail_rsp_ring;
3463         }
3464         (*req)->rsp = *rsp;
3465         (*rsp)->req = *req;
3466         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3467             "req=%p req->length=%d req->ring=%p rsp=%p "
3468             "rsp->length=%d rsp->ring=%p.\n",
3469             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3470             (*rsp)->ring);
3471         /* Allocate memory for NVRAM data for vports */
3472         if (ha->nvram_npiv_size) {
3473                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3474                     ha->nvram_npiv_size, GFP_KERNEL);
3475                 if (!ha->npiv_info) {
3476                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3477                             "Failed to allocate memory for npiv_info.\n");
3478                         goto fail_npiv_info;
3479                 }
3480         } else
3481                 ha->npiv_info = NULL;
3482
3483         /* Get consistent memory allocated for EX-INIT-CB. */
3484         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3485                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3486                     &ha->ex_init_cb_dma);
3487                 if (!ha->ex_init_cb)
3488                         goto fail_ex_init_cb;
3489                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3490                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3491         }
3492
3493         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3494
3495         /* Get consistent memory allocated for Async Port-Database. */
3496         if (!IS_FWI2_CAPABLE(ha)) {
3497                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3498                         &ha->async_pd_dma);
3499                 if (!ha->async_pd)
3500                         goto fail_async_pd;
3501                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3502                     "async_pd=%p.\n", ha->async_pd);
3503         }
3504
3505         INIT_LIST_HEAD(&ha->vp_list);
3506
3507         /* Allocate memory for our loop_id bitmap */
3508         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3509             GFP_KERNEL);
3510         if (!ha->loop_id_map)
3511                 goto fail_async_pd;
3512         else {
3513                 qla2x00_set_reserved_loop_ids(ha);
3514                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3515                     "loop_id_map=%p.\n", ha->loop_id_map);
3516         }
3517
3518         return 0;
3519
3520 fail_async_pd:
3521         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3522 fail_ex_init_cb:
3523         kfree(ha->npiv_info);
3524 fail_npiv_info:
3525         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3526                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3527         (*rsp)->ring = NULL;
3528         (*rsp)->dma = 0;
3529 fail_rsp_ring:
3530         kfree(*rsp);
3531 fail_rsp:
3532         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3533                 sizeof(request_t), (*req)->ring, (*req)->dma);
3534         (*req)->ring = NULL;
3535         (*req)->dma = 0;
3536 fail_req_ring:
3537         kfree(*req);
3538 fail_req:
3539         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3540                 ha->ct_sns, ha->ct_sns_dma);
3541         ha->ct_sns = NULL;
3542         ha->ct_sns_dma = 0;
3543 fail_free_ms_iocb:
3544         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3545         ha->ms_iocb = NULL;
3546         ha->ms_iocb_dma = 0;
3547 fail_dma_pool:
3548         if (IS_QLA82XX(ha) || ql2xenabledif) {
3549                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3550                 ha->fcp_cmnd_dma_pool = NULL;
3551         }
3552 fail_dl_dma_pool:
3553         if (IS_QLA82XX(ha) || ql2xenabledif) {
3554                 dma_pool_destroy(ha->dl_dma_pool);
3555                 ha->dl_dma_pool = NULL;
3556         }
3557 fail_s_dma_pool:
3558         dma_pool_destroy(ha->s_dma_pool);
3559         ha->s_dma_pool = NULL;
3560 fail_free_nvram:
3561         kfree(ha->nvram);
3562         ha->nvram = NULL;
3563 fail_free_ctx_mempool:
3564         mempool_destroy(ha->ctx_mempool);
3565         ha->ctx_mempool = NULL;
3566 fail_free_srb_mempool:
3567         mempool_destroy(ha->srb_mempool);
3568         ha->srb_mempool = NULL;
3569 fail_free_gid_list:
3570         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3571         ha->gid_list,
3572         ha->gid_list_dma);
3573         ha->gid_list = NULL;
3574         ha->gid_list_dma = 0;
3575 fail_free_tgt_mem:
3576         qlt_mem_free(ha);
3577 fail_free_init_cb:
3578         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3579         ha->init_cb_dma);
3580         ha->init_cb = NULL;
3581         ha->init_cb_dma = 0;
3582 fail:
3583         ql_log(ql_log_fatal, NULL, 0x0030,
3584             "Memory allocation failure.\n");
3585         return -ENOMEM;
3586 }
3587
3588 /*
3589 * qla2x00_free_fw_dump
3590 *       Frees fw dump stuff.
3591 *
3592 * Input:
3593 *       ha = adapter block pointer
3594 */
3595 static void
3596 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3597 {
3598         if (ha->fce)
3599                 dma_free_coherent(&ha->pdev->dev,
3600                     FCE_SIZE, ha->fce, ha->fce_dma);
3601
3602         if (ha->eft)
3603                 dma_free_coherent(&ha->pdev->dev,
3604                     EFT_SIZE, ha->eft, ha->eft_dma);
3605
3606         if (ha->fw_dump)
3607                 vfree(ha->fw_dump);
3608         if (ha->fw_dump_template)
3609                 vfree(ha->fw_dump_template);
3610
3611         ha->fce = NULL;
3612         ha->fce_dma = 0;
3613         ha->eft = NULL;
3614         ha->eft_dma = 0;
3615         ha->fw_dumped = 0;
3616         ha->fw_dump_cap_flags = 0;
3617         ha->fw_dump_reading = 0;
3618         ha->fw_dump = NULL;
3619         ha->fw_dump_len = 0;
3620         ha->fw_dump_template = NULL;
3621         ha->fw_dump_template_len = 0;
3622 }
3623
3624 /*
3625 * qla2x00_mem_free
3626 *      Frees all adapter allocated memory.
3627 *
3628 * Input:
3629 *      ha = adapter block pointer.
3630 */
3631 static void
3632 qla2x00_mem_free(struct qla_hw_data *ha)
3633 {
3634         qla2x00_free_fw_dump(ha);
3635
3636         if (ha->mctp_dump)
3637                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3638                     ha->mctp_dump_dma);
3639
3640         if (ha->srb_mempool)
3641                 mempool_destroy(ha->srb_mempool);
3642
3643         if (ha->dcbx_tlv)
3644                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3645                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3646
3647         if (ha->xgmac_data)
3648                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3649                     ha->xgmac_data, ha->xgmac_data_dma);
3650
3651         if (ha->sns_cmd)
3652                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3653                 ha->sns_cmd, ha->sns_cmd_dma);
3654
3655         if (ha->ct_sns)
3656                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3657                 ha->ct_sns, ha->ct_sns_dma);
3658
3659         if (ha->sfp_data)
3660                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3661
3662         if (ha->ms_iocb)
3663                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3664
3665         if (ha->ex_init_cb)
3666                 dma_pool_free(ha->s_dma_pool,
3667                         ha->ex_init_cb, ha->ex_init_cb_dma);
3668
3669         if (ha->async_pd)
3670                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3671
3672         if (ha->s_dma_pool)
3673                 dma_pool_destroy(ha->s_dma_pool);
3674
3675         if (ha->gid_list)
3676                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3677                 ha->gid_list, ha->gid_list_dma);
3678
3679         if (IS_QLA82XX(ha)) {
3680                 if (!list_empty(&ha->gbl_dsd_list)) {
3681                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3682
3683                         /* clean up allocated prev pool */
3684                         list_for_each_entry_safe(dsd_ptr,
3685                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3686                                 dma_pool_free(ha->dl_dma_pool,
3687                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3688                                 list_del(&dsd_ptr->list);
3689                                 kfree(dsd_ptr);
3690                         }
3691                 }
3692         }
3693
3694         if (ha->dl_dma_pool)
3695                 dma_pool_destroy(ha->dl_dma_pool);
3696
3697         if (ha->fcp_cmnd_dma_pool)
3698                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3699
3700         if (ha->ctx_mempool)
3701                 mempool_destroy(ha->ctx_mempool);
3702
3703         qlt_mem_free(ha);
3704
3705         if (ha->init_cb)
3706                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3707                         ha->init_cb, ha->init_cb_dma);
3708         vfree(ha->optrom_buffer);
3709         kfree(ha->nvram);
3710         kfree(ha->npiv_info);
3711         kfree(ha->swl);
3712         kfree(ha->loop_id_map);
3713
3714         ha->srb_mempool = NULL;
3715         ha->ctx_mempool = NULL;
3716         ha->sns_cmd = NULL;
3717         ha->sns_cmd_dma = 0;
3718         ha->ct_sns = NULL;
3719         ha->ct_sns_dma = 0;
3720         ha->ms_iocb = NULL;
3721         ha->ms_iocb_dma = 0;
3722         ha->init_cb = NULL;
3723         ha->init_cb_dma = 0;
3724         ha->ex_init_cb = NULL;
3725         ha->ex_init_cb_dma = 0;
3726         ha->async_pd = NULL;
3727         ha->async_pd_dma = 0;
3728
3729         ha->s_dma_pool = NULL;
3730         ha->dl_dma_pool = NULL;
3731         ha->fcp_cmnd_dma_pool = NULL;
3732
3733         ha->gid_list = NULL;
3734         ha->gid_list_dma = 0;
3735
3736         ha->tgt.atio_ring = NULL;
3737         ha->tgt.atio_dma = 0;
3738         ha->tgt.tgt_vp_map = NULL;
3739 }
3740
3741 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3742                                                 struct qla_hw_data *ha)
3743 {
3744         struct Scsi_Host *host;
3745         struct scsi_qla_host *vha = NULL;
3746
3747         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3748         if (host == NULL) {
3749                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3750                     "Failed to allocate host from the scsi layer, aborting.\n");
3751                 goto fail;
3752         }
3753
3754         /* Clear our data area */
3755         vha = shost_priv(host);
3756         memset(vha, 0, sizeof(scsi_qla_host_t));
3757
3758         vha->host = host;
3759         vha->host_no = host->host_no;
3760         vha->hw = ha;
3761
3762         INIT_LIST_HEAD(&vha->vp_fcports);
3763         INIT_LIST_HEAD(&vha->work_list);
3764         INIT_LIST_HEAD(&vha->list);
3765
3766         spin_lock_init(&vha->work_lock);
3767
3768         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3769         ql_dbg(ql_dbg_init, vha, 0x0041,
3770             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3771             vha->host, vha->hw, vha,
3772             dev_name(&(ha->pdev->dev)));
3773
3774         return vha;
3775
3776 fail:
3777         return vha;
3778 }
3779
3780 static struct qla_work_evt *
3781 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3782 {
3783         struct qla_work_evt *e;
3784         uint8_t bail;
3785
3786         QLA_VHA_MARK_BUSY(vha, bail);
3787         if (bail)
3788                 return NULL;
3789
3790         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3791         if (!e) {
3792                 QLA_VHA_MARK_NOT_BUSY(vha);
3793                 return NULL;
3794         }
3795
3796         INIT_LIST_HEAD(&e->list);
3797         e->type = type;
3798         e->flags = QLA_EVT_FLAG_FREE;
3799         return e;
3800 }
3801
3802 static int
3803 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3804 {
3805         unsigned long flags;
3806
3807         spin_lock_irqsave(&vha->work_lock, flags);
3808         list_add_tail(&e->list, &vha->work_list);
3809         spin_unlock_irqrestore(&vha->work_lock, flags);
3810         qla2xxx_wake_dpc(vha);
3811
3812         return QLA_SUCCESS;
3813 }
3814
3815 int
3816 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3817     u32 data)
3818 {
3819         struct qla_work_evt *e;
3820
3821         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3822         if (!e)
3823                 return QLA_FUNCTION_FAILED;
3824
3825         e->u.aen.code = code;
3826         e->u.aen.data = data;
3827         return qla2x00_post_work(vha, e);
3828 }
3829
3830 int
3831 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3832 {
3833         struct qla_work_evt *e;
3834
3835         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3836         if (!e)
3837                 return QLA_FUNCTION_FAILED;
3838
3839         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3840         return qla2x00_post_work(vha, e);
3841 }
3842
3843 #define qla2x00_post_async_work(name, type)     \
3844 int qla2x00_post_async_##name##_work(           \
3845     struct scsi_qla_host *vha,                  \
3846     fc_port_t *fcport, uint16_t *data)          \
3847 {                                               \
3848         struct qla_work_evt *e;                 \
3849                                                 \
3850         e = qla2x00_alloc_work(vha, type);      \
3851         if (!e)                                 \
3852                 return QLA_FUNCTION_FAILED;     \
3853                                                 \
3854         e->u.logio.fcport = fcport;             \
3855         if (data) {                             \
3856                 e->u.logio.data[0] = data[0];   \
3857                 e->u.logio.data[1] = data[1];   \
3858         }                                       \
3859         return qla2x00_post_work(vha, e);       \
3860 }
3861
3862 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3863 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3864 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3865 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3866 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3867 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3868
3869 int
3870 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3871 {
3872         struct qla_work_evt *e;
3873
3874         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3875         if (!e)
3876                 return QLA_FUNCTION_FAILED;
3877
3878         e->u.uevent.code = code;
3879         return qla2x00_post_work(vha, e);
3880 }
3881
3882 static void
3883 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3884 {
3885         char event_string[40];
3886         char *envp[] = { event_string, NULL };
3887
3888         switch (code) {
3889         case QLA_UEVENT_CODE_FW_DUMP:
3890                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3891                     vha->host_no);
3892                 break;
3893         default:
3894                 /* do nothing */
3895                 break;
3896         }
3897         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3898 }
3899
3900 int
3901 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3902                         uint32_t *data, int cnt)
3903 {
3904         struct qla_work_evt *e;
3905
3906         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3907         if (!e)
3908                 return QLA_FUNCTION_FAILED;
3909
3910         e->u.aenfx.evtcode = evtcode;
3911         e->u.aenfx.count = cnt;
3912         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3913         return qla2x00_post_work(vha, e);
3914 }
3915
3916 void
3917 qla2x00_do_work(struct scsi_qla_host *vha)
3918 {
3919         struct qla_work_evt *e, *tmp;
3920         unsigned long flags;
3921         LIST_HEAD(work);
3922
3923         spin_lock_irqsave(&vha->work_lock, flags);
3924         list_splice_init(&vha->work_list, &work);
3925         spin_unlock_irqrestore(&vha->work_lock, flags);
3926
3927         list_for_each_entry_safe(e, tmp, &work, list) {
3928                 list_del_init(&e->list);
3929
3930                 switch (e->type) {
3931                 case QLA_EVT_AEN:
3932                         fc_host_post_event(vha->host, fc_get_event_number(),
3933                             e->u.aen.code, e->u.aen.data);
3934                         break;
3935                 case QLA_EVT_IDC_ACK:
3936                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3937                         break;
3938                 case QLA_EVT_ASYNC_LOGIN:
3939                         qla2x00_async_login(vha, e->u.logio.fcport,
3940                             e->u.logio.data);
3941                         break;
3942                 case QLA_EVT_ASYNC_LOGIN_DONE:
3943                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3944                             e->u.logio.data);
3945                         break;
3946                 case QLA_EVT_ASYNC_LOGOUT:
3947                         qla2x00_async_logout(vha, e->u.logio.fcport);
3948                         break;
3949                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3950                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3951                             e->u.logio.data);
3952                         break;
3953                 case QLA_EVT_ASYNC_ADISC:
3954                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3955                             e->u.logio.data);
3956                         break;
3957                 case QLA_EVT_ASYNC_ADISC_DONE:
3958                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3959                             e->u.logio.data);
3960                         break;
3961                 case QLA_EVT_UEVENT:
3962                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3963                         break;
3964                 case QLA_EVT_AENFX:
3965                         qlafx00_process_aen(vha, e);
3966                         break;
3967                 }
3968                 if (e->flags & QLA_EVT_FLAG_FREE)
3969                         kfree(e);
3970
3971                 /* For each work completed decrement vha ref count */
3972                 QLA_VHA_MARK_NOT_BUSY(vha);
3973         }
3974 }
3975
3976 /* Relogins all the fcports of a vport
3977  * Context: dpc thread
3978  */
3979 void qla2x00_relogin(struct scsi_qla_host *vha)
3980 {
3981         fc_port_t       *fcport;
3982         int status;
3983         uint16_t        next_loopid = 0;
3984         struct qla_hw_data *ha = vha->hw;
3985         uint16_t data[2];
3986
3987         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3988         /*
3989          * If the port is not ONLINE then try to login
3990          * to it if we haven't run out of retries.
3991          */
3992                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3993                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3994                         fcport->login_retry--;
3995                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3996                                 if (fcport->flags & FCF_FCP2_DEVICE)
3997                                         ha->isp_ops->fabric_logout(vha,
3998                                                         fcport->loop_id,
3999                                                         fcport->d_id.b.domain,
4000                                                         fcport->d_id.b.area,
4001                                                         fcport->d_id.b.al_pa);
4002
4003                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4004                                         fcport->loop_id = next_loopid =
4005                                             ha->min_external_loopid;
4006                                         status = qla2x00_find_new_loop_id(
4007                                             vha, fcport);
4008                                         if (status != QLA_SUCCESS) {
4009                                                 /* Ran out of IDs to use */
4010                                                 break;
4011                                         }
4012                                 }
4013
4014                                 if (IS_ALOGIO_CAPABLE(ha)) {
4015                                         fcport->flags |= FCF_ASYNC_SENT;
4016                                         data[0] = 0;
4017                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4018                                         status = qla2x00_post_async_login_work(
4019                                             vha, fcport, data);
4020                                         if (status == QLA_SUCCESS)
4021                                                 continue;
4022                                         /* Attempt a retry. */
4023                                         status = 1;
4024                                 } else {
4025                                         status = qla2x00_fabric_login(vha,
4026                                             fcport, &next_loopid);
4027                                         if (status ==  QLA_SUCCESS) {
4028                                                 int status2;
4029                                                 uint8_t opts;
4030
4031                                                 opts = 0;
4032                                                 if (fcport->flags &
4033                                                     FCF_FCP2_DEVICE)
4034                                                         opts |= BIT_1;
4035                                                 status2 =
4036                                                     qla2x00_get_port_database(
4037                                                         vha, fcport, opts);
4038                                                 if (status2 != QLA_SUCCESS)
4039                                                         status = 1;
4040                                         }
4041                                 }
4042                         } else
4043                                 status = qla2x00_local_device_login(vha,
4044                                                                 fcport);
4045
4046                         if (status == QLA_SUCCESS) {
4047                                 fcport->old_loop_id = fcport->loop_id;
4048
4049                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4050                                     "Port login OK: logged in ID 0x%x.\n",
4051                                     fcport->loop_id);
4052
4053                                 qla2x00_update_fcport(vha, fcport);
4054
4055                         } else if (status == 1) {
4056                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4057                                 /* retry the login again */
4058                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4059                                     "Retrying %d login again loop_id 0x%x.\n",
4060                                     fcport->login_retry, fcport->loop_id);
4061                         } else {
4062                                 fcport->login_retry = 0;
4063                         }
4064
4065                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4066                                 qla2x00_clear_loop_id(fcport);
4067                 }
4068                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4069                         break;
4070         }
4071 }
4072
4073 /* Schedule work on any of the dpc-workqueues */
4074 void
4075 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4076 {
4077         struct qla_hw_data *ha = base_vha->hw;
4078
4079         switch (work_code) {
4080         case MBA_IDC_AEN: /* 0x8200 */
4081                 if (ha->dpc_lp_wq)
4082                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4083                 break;
4084
4085         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4086                 if (!ha->flags.nic_core_reset_hdlr_active) {
4087                         if (ha->dpc_hp_wq)
4088                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4089                 } else
4090                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4091                             "NIC Core reset is already active. Skip "
4092                             "scheduling it again.\n");
4093                 break;
4094         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4095                 if (ha->dpc_hp_wq)
4096                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4097                 break;
4098         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4099                 if (ha->dpc_hp_wq)
4100                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4101                 break;
4102         default:
4103                 ql_log(ql_log_warn, base_vha, 0xb05f,
4104                     "Unknow work-code=0x%x.\n", work_code);
4105         }
4106
4107         return;
4108 }
4109
4110 /* Work: Perform NIC Core Unrecoverable state handling */
4111 void
4112 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4113 {
4114         struct qla_hw_data *ha =
4115                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4116         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4117         uint32_t dev_state = 0;
4118
4119         qla83xx_idc_lock(base_vha, 0);
4120         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4121         qla83xx_reset_ownership(base_vha);
4122         if (ha->flags.nic_core_reset_owner) {
4123                 ha->flags.nic_core_reset_owner = 0;
4124                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4125                     QLA8XXX_DEV_FAILED);
4126                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4127                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4128         }
4129         qla83xx_idc_unlock(base_vha, 0);
4130 }
4131
4132 /* Work: Execute IDC state handler */
4133 void
4134 qla83xx_idc_state_handler_work(struct work_struct *work)
4135 {
4136         struct qla_hw_data *ha =
4137                 container_of(work, struct qla_hw_data, idc_state_handler);
4138         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4139         uint32_t dev_state = 0;
4140
4141         qla83xx_idc_lock(base_vha, 0);
4142         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4143         if (dev_state == QLA8XXX_DEV_FAILED ||
4144                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4145                 qla83xx_idc_state_handler(base_vha);
4146         qla83xx_idc_unlock(base_vha, 0);
4147 }
4148
4149 static int
4150 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4151 {
4152         int rval = QLA_SUCCESS;
4153         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4154         uint32_t heart_beat_counter1, heart_beat_counter2;
4155
4156         do {
4157                 if (time_after(jiffies, heart_beat_wait)) {
4158                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4159                             "Nic Core f/w is not alive.\n");
4160                         rval = QLA_FUNCTION_FAILED;
4161                         break;
4162                 }
4163
4164                 qla83xx_idc_lock(base_vha, 0);
4165                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4166                     &heart_beat_counter1);
4167                 qla83xx_idc_unlock(base_vha, 0);
4168                 msleep(100);
4169                 qla83xx_idc_lock(base_vha, 0);
4170                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4171                     &heart_beat_counter2);
4172                 qla83xx_idc_unlock(base_vha, 0);
4173         } while (heart_beat_counter1 == heart_beat_counter2);
4174
4175         return rval;
4176 }
4177
4178 /* Work: Perform NIC Core Reset handling */
4179 void
4180 qla83xx_nic_core_reset_work(struct work_struct *work)
4181 {
4182         struct qla_hw_data *ha =
4183                 container_of(work, struct qla_hw_data, nic_core_reset);
4184         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4185         uint32_t dev_state = 0;
4186
4187         if (IS_QLA2031(ha)) {
4188                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4189                         ql_log(ql_log_warn, base_vha, 0xb081,
4190                             "Failed to dump mctp\n");
4191                 return;
4192         }
4193
4194         if (!ha->flags.nic_core_reset_hdlr_active) {
4195                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4196                         qla83xx_idc_lock(base_vha, 0);
4197                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4198                             &dev_state);
4199                         qla83xx_idc_unlock(base_vha, 0);
4200                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4201                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4202                                     "Nic Core f/w is alive.\n");
4203                                 return;
4204                         }
4205                 }
4206
4207                 ha->flags.nic_core_reset_hdlr_active = 1;
4208                 if (qla83xx_nic_core_reset(base_vha)) {
4209                         /* NIC Core reset failed. */
4210                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4211                             "NIC Core reset failed.\n");
4212                 }
4213                 ha->flags.nic_core_reset_hdlr_active = 0;
4214         }
4215 }
4216
4217 /* Work: Handle 8200 IDC aens */
4218 void
4219 qla83xx_service_idc_aen(struct work_struct *work)
4220 {
4221         struct qla_hw_data *ha =
4222                 container_of(work, struct qla_hw_data, idc_aen);
4223         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4224         uint32_t dev_state, idc_control;
4225
4226         qla83xx_idc_lock(base_vha, 0);
4227         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4228         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4229         qla83xx_idc_unlock(base_vha, 0);
4230         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4231                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4232                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4233                             "Application requested NIC Core Reset.\n");
4234                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4235                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4236                     QLA_SUCCESS) {
4237                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4238                             "Other protocol driver requested NIC Core Reset.\n");
4239                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4240                 }
4241         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4242                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4243                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4244         }
4245 }
4246
4247 static void
4248 qla83xx_wait_logic(void)
4249 {
4250         int i;
4251
4252         /* Yield CPU */
4253         if (!in_interrupt()) {
4254                 /*
4255                  * Wait about 200ms before retrying again.
4256                  * This controls the number of retries for single
4257                  * lock operation.
4258                  */
4259                 msleep(100);
4260                 schedule();
4261         } else {
4262                 for (i = 0; i < 20; i++)
4263                         cpu_relax(); /* This a nop instr on i386 */
4264         }
4265 }
4266
4267 static int
4268 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4269 {
4270         int rval;
4271         uint32_t data;
4272         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4273         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4274         struct qla_hw_data *ha = base_vha->hw;
4275         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4276             "Trying force recovery of the IDC lock.\n");
4277
4278         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4279         if (rval)
4280                 return rval;
4281
4282         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4283                 return QLA_SUCCESS;
4284         } else {
4285                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4286                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4287                     data);
4288                 if (rval)
4289                         return rval;
4290
4291                 msleep(200);
4292
4293                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4294                     &data);
4295                 if (rval)
4296                         return rval;
4297
4298                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4299                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4300                                         ~(idc_lck_rcvry_stage_mask));
4301                         rval = qla83xx_wr_reg(base_vha,
4302                             QLA83XX_IDC_LOCK_RECOVERY, data);
4303                         if (rval)
4304                                 return rval;
4305
4306                         /* Forcefully perform IDC UnLock */
4307                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4308                             &data);
4309                         if (rval)
4310                                 return rval;
4311                         /* Clear lock-id by setting 0xff */
4312                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4313                             0xff);
4314                         if (rval)
4315                                 return rval;
4316                         /* Clear lock-recovery by setting 0x0 */
4317                         rval = qla83xx_wr_reg(base_vha,
4318                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4319                         if (rval)
4320                                 return rval;
4321                 } else
4322                         return QLA_SUCCESS;
4323         }
4324
4325         return rval;
4326 }
4327
4328 static int
4329 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4330 {
4331         int rval = QLA_SUCCESS;
4332         uint32_t o_drv_lockid, n_drv_lockid;
4333         unsigned long lock_recovery_timeout;
4334
4335         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4336 retry_lockid:
4337         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4338         if (rval)
4339                 goto exit;
4340
4341         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4342         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4343                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4344                         return QLA_SUCCESS;
4345                 else
4346                         return QLA_FUNCTION_FAILED;
4347         }
4348
4349         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4350         if (rval)
4351                 goto exit;
4352
4353         if (o_drv_lockid == n_drv_lockid) {
4354                 qla83xx_wait_logic();
4355                 goto retry_lockid;
4356         } else
4357                 return QLA_SUCCESS;
4358
4359 exit:
4360         return rval;
4361 }
4362
4363 void
4364 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4365 {
4366         uint16_t options = (requester_id << 15) | BIT_6;
4367         uint32_t data;
4368         uint32_t lock_owner;
4369         struct qla_hw_data *ha = base_vha->hw;
4370
4371         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4372 retry_lock:
4373         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4374             == QLA_SUCCESS) {
4375                 if (data) {
4376                         /* Setting lock-id to our function-number */
4377                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4378                             ha->portnum);
4379                 } else {
4380                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4381                             &lock_owner);
4382                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4383                             "Failed to acquire IDC lock, acquired by %d, "
4384                             "retrying...\n", lock_owner);
4385
4386                         /* Retry/Perform IDC-Lock recovery */
4387                         if (qla83xx_idc_lock_recovery(base_vha)
4388                             == QLA_SUCCESS) {
4389                                 qla83xx_wait_logic();
4390                                 goto retry_lock;
4391                         } else
4392                                 ql_log(ql_log_warn, base_vha, 0xb075,
4393                                     "IDC Lock recovery FAILED.\n");
4394                 }
4395
4396         }
4397
4398         return;
4399
4400         /* XXX: IDC-lock implementation using access-control mbx */
4401 retry_lock2:
4402         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4403                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4404                     "Failed to acquire IDC lock. retrying...\n");
4405                 /* Retry/Perform IDC-Lock recovery */
4406                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4407                         qla83xx_wait_logic();
4408                         goto retry_lock2;
4409                 } else
4410                         ql_log(ql_log_warn, base_vha, 0xb076,
4411                             "IDC Lock recovery FAILED.\n");
4412         }
4413
4414         return;
4415 }
4416
4417 void
4418 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4419 {
4420         uint16_t options = (requester_id << 15) | BIT_7, retry;
4421         uint32_t data;
4422         struct qla_hw_data *ha = base_vha->hw;
4423
4424         /* IDC-unlock implementation using driver-unlock/lock-id
4425          * remote registers
4426          */
4427         retry = 0;
4428 retry_unlock:
4429         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4430             == QLA_SUCCESS) {
4431                 if (data == ha->portnum) {
4432                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4433                         /* Clearing lock-id by setting 0xff */
4434                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4435                 } else if (retry < 10) {
4436                         /* SV: XXX: IDC unlock retrying needed here? */
4437
4438                         /* Retry for IDC-unlock */
4439                         qla83xx_wait_logic();
4440                         retry++;
4441                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4442                             "Failed to release IDC lock, retyring=%d\n", retry);
4443                         goto retry_unlock;
4444                 }
4445         } else if (retry < 10) {
4446                 /* Retry for IDC-unlock */
4447                 qla83xx_wait_logic();
4448                 retry++;
4449                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4450                     "Failed to read drv-lockid, retyring=%d\n", retry);
4451                 goto retry_unlock;
4452         }
4453
4454         return;
4455
4456         /* XXX: IDC-unlock implementation using access-control mbx */
4457         retry = 0;
4458 retry_unlock2:
4459         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4460                 if (retry < 10) {
4461                         /* Retry for IDC-unlock */
4462                         qla83xx_wait_logic();
4463                         retry++;
4464                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4465                             "Failed to release IDC lock, retyring=%d\n", retry);
4466                         goto retry_unlock2;
4467                 }
4468         }
4469
4470         return;
4471 }
4472
4473 int
4474 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4475 {
4476         int rval = QLA_SUCCESS;
4477         struct qla_hw_data *ha = vha->hw;
4478         uint32_t drv_presence;
4479
4480         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4481         if (rval == QLA_SUCCESS) {
4482                 drv_presence |= (1 << ha->portnum);
4483                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4484                     drv_presence);
4485         }
4486
4487         return rval;
4488 }
4489
4490 int
4491 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4492 {
4493         int rval = QLA_SUCCESS;
4494
4495         qla83xx_idc_lock(vha, 0);
4496         rval = __qla83xx_set_drv_presence(vha);
4497         qla83xx_idc_unlock(vha, 0);
4498
4499         return rval;
4500 }
4501
4502 int
4503 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4504 {
4505         int rval = QLA_SUCCESS;
4506         struct qla_hw_data *ha = vha->hw;
4507         uint32_t drv_presence;
4508
4509         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4510         if (rval == QLA_SUCCESS) {
4511                 drv_presence &= ~(1 << ha->portnum);
4512                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4513                     drv_presence);
4514         }
4515
4516         return rval;
4517 }
4518
4519 int
4520 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4521 {
4522         int rval = QLA_SUCCESS;
4523
4524         qla83xx_idc_lock(vha, 0);
4525         rval = __qla83xx_clear_drv_presence(vha);
4526         qla83xx_idc_unlock(vha, 0);
4527
4528         return rval;
4529 }
4530
4531 static void
4532 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4533 {
4534         struct qla_hw_data *ha = vha->hw;
4535         uint32_t drv_ack, drv_presence;
4536         unsigned long ack_timeout;
4537
4538         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4539         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4540         while (1) {
4541                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4542                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4543                 if ((drv_ack & drv_presence) == drv_presence)
4544                         break;
4545
4546                 if (time_after_eq(jiffies, ack_timeout)) {
4547                         ql_log(ql_log_warn, vha, 0xb067,
4548                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4549                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4550                         /*
4551                          * The function(s) which did not ack in time are forced
4552                          * to withdraw any further participation in the IDC
4553                          * reset.
4554                          */
4555                         if (drv_ack != drv_presence)
4556                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4557                                     drv_ack);
4558                         break;
4559                 }
4560
4561                 qla83xx_idc_unlock(vha, 0);
4562                 msleep(1000);
4563                 qla83xx_idc_lock(vha, 0);
4564         }
4565
4566         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4567         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4568 }
4569
4570 static int
4571 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4572 {
4573         int rval = QLA_SUCCESS;
4574         uint32_t idc_control;
4575
4576         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4577         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4578
4579         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4580         __qla83xx_get_idc_control(vha, &idc_control);
4581         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4582         __qla83xx_set_idc_control(vha, 0);
4583
4584         qla83xx_idc_unlock(vha, 0);
4585         rval = qla83xx_restart_nic_firmware(vha);
4586         qla83xx_idc_lock(vha, 0);
4587
4588         if (rval != QLA_SUCCESS) {
4589                 ql_log(ql_log_fatal, vha, 0xb06a,
4590                     "Failed to restart NIC f/w.\n");
4591                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4592                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4593         } else {
4594                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4595                     "Success in restarting nic f/w.\n");
4596                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4597                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4598         }
4599
4600         return rval;
4601 }
4602
4603 /* Assumes idc_lock always held on entry */
4604 int
4605 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4606 {
4607         struct qla_hw_data *ha = base_vha->hw;
4608         int rval = QLA_SUCCESS;
4609         unsigned long dev_init_timeout;
4610         uint32_t dev_state;
4611
4612         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4613         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4614
4615         while (1) {
4616
4617                 if (time_after_eq(jiffies, dev_init_timeout)) {
4618                         ql_log(ql_log_warn, base_vha, 0xb06e,
4619                             "Initialization TIMEOUT!\n");
4620                         /* Init timeout. Disable further NIC Core
4621                          * communication.
4622                          */
4623                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4624                                 QLA8XXX_DEV_FAILED);
4625                         ql_log(ql_log_info, base_vha, 0xb06f,
4626                             "HW State: FAILED.\n");
4627                 }
4628
4629                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4630                 switch (dev_state) {
4631                 case QLA8XXX_DEV_READY:
4632                         if (ha->flags.nic_core_reset_owner)
4633                                 qla83xx_idc_audit(base_vha,
4634                                     IDC_AUDIT_COMPLETION);
4635                         ha->flags.nic_core_reset_owner = 0;
4636                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4637                             "Reset_owner reset by 0x%x.\n",
4638                             ha->portnum);
4639                         goto exit;
4640                 case QLA8XXX_DEV_COLD:
4641                         if (ha->flags.nic_core_reset_owner)
4642                                 rval = qla83xx_device_bootstrap(base_vha);
4643                         else {
4644                         /* Wait for AEN to change device-state */
4645                                 qla83xx_idc_unlock(base_vha, 0);
4646                                 msleep(1000);
4647                                 qla83xx_idc_lock(base_vha, 0);
4648                         }
4649                         break;
4650                 case QLA8XXX_DEV_INITIALIZING:
4651                         /* Wait for AEN to change device-state */
4652                         qla83xx_idc_unlock(base_vha, 0);
4653                         msleep(1000);
4654                         qla83xx_idc_lock(base_vha, 0);
4655                         break;
4656                 case QLA8XXX_DEV_NEED_RESET:
4657                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4658                                 qla83xx_need_reset_handler(base_vha);
4659                         else {
4660                                 /* Wait for AEN to change device-state */
4661                                 qla83xx_idc_unlock(base_vha, 0);
4662                                 msleep(1000);
4663                                 qla83xx_idc_lock(base_vha, 0);
4664                         }
4665                         /* reset timeout value after need reset handler */
4666                         dev_init_timeout = jiffies +
4667                             (ha->fcoe_dev_init_timeout * HZ);
4668                         break;
4669                 case QLA8XXX_DEV_NEED_QUIESCENT:
4670                         /* XXX: DEBUG for now */
4671                         qla83xx_idc_unlock(base_vha, 0);
4672                         msleep(1000);
4673                         qla83xx_idc_lock(base_vha, 0);
4674                         break;
4675                 case QLA8XXX_DEV_QUIESCENT:
4676                         /* XXX: DEBUG for now */
4677                         if (ha->flags.quiesce_owner)
4678                                 goto exit;
4679
4680                         qla83xx_idc_unlock(base_vha, 0);
4681                         msleep(1000);
4682                         qla83xx_idc_lock(base_vha, 0);
4683                         dev_init_timeout = jiffies +
4684                             (ha->fcoe_dev_init_timeout * HZ);
4685                         break;
4686                 case QLA8XXX_DEV_FAILED:
4687                         if (ha->flags.nic_core_reset_owner)
4688                                 qla83xx_idc_audit(base_vha,
4689                                     IDC_AUDIT_COMPLETION);
4690                         ha->flags.nic_core_reset_owner = 0;
4691                         __qla83xx_clear_drv_presence(base_vha);
4692                         qla83xx_idc_unlock(base_vha, 0);
4693                         qla8xxx_dev_failed_handler(base_vha);
4694                         rval = QLA_FUNCTION_FAILED;
4695                         qla83xx_idc_lock(base_vha, 0);
4696                         goto exit;
4697                 case QLA8XXX_BAD_VALUE:
4698                         qla83xx_idc_unlock(base_vha, 0);
4699                         msleep(1000);
4700                         qla83xx_idc_lock(base_vha, 0);
4701                         break;
4702                 default:
4703                         ql_log(ql_log_warn, base_vha, 0xb071,
4704                             "Unknow Device State: %x.\n", dev_state);
4705                         qla83xx_idc_unlock(base_vha, 0);
4706                         qla8xxx_dev_failed_handler(base_vha);
4707                         rval = QLA_FUNCTION_FAILED;
4708                         qla83xx_idc_lock(base_vha, 0);
4709                         goto exit;
4710                 }
4711         }
4712
4713 exit:
4714         return rval;
4715 }
4716
4717 void
4718 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4719 {
4720         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4721             board_disable);
4722         struct pci_dev *pdev = ha->pdev;
4723         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4724
4725         ql_log(ql_log_warn, base_vha, 0x015b,
4726             "Disabling adapter.\n");
4727
4728         set_bit(UNLOADING, &base_vha->dpc_flags);
4729
4730         qla2x00_delete_all_vps(ha, base_vha);
4731
4732         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4733
4734         qla2x00_dfs_remove(base_vha);
4735
4736         qla84xx_put_chip(base_vha);
4737
4738         if (base_vha->timer_active)
4739                 qla2x00_stop_timer(base_vha);
4740
4741         base_vha->flags.online = 0;
4742
4743         qla2x00_destroy_deferred_work(ha);
4744
4745         /*
4746          * Do not try to stop beacon blink as it will issue a mailbox
4747          * command.
4748          */
4749         qla2x00_free_sysfs_attr(base_vha, false);
4750
4751         fc_remove_host(base_vha->host);
4752
4753         scsi_remove_host(base_vha->host);
4754
4755         base_vha->flags.init_done = 0;
4756         qla25xx_delete_queues(base_vha);
4757         qla2x00_free_irqs(base_vha);
4758         qla2x00_free_fcports(base_vha);
4759         qla2x00_mem_free(ha);
4760         qla82xx_md_free(base_vha);
4761         qla2x00_free_queues(ha);
4762
4763         qla2x00_unmap_iobases(ha);
4764
4765         pci_release_selected_regions(ha->pdev, ha->bars);
4766         pci_disable_pcie_error_reporting(pdev);
4767         pci_disable_device(pdev);
4768
4769         /*
4770          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
4771          */
4772 }
4773
4774 /**************************************************************************
4775 * qla2x00_do_dpc
4776 *   This kernel thread is a task that is schedule by the interrupt handler
4777 *   to perform the background processing for interrupts.
4778 *
4779 * Notes:
4780 * This task always run in the context of a kernel thread.  It
4781 * is kick-off by the driver's detect code and starts up
4782 * up one per adapter. It immediately goes to sleep and waits for
4783 * some fibre event.  When either the interrupt handler or
4784 * the timer routine detects a event it will one of the task
4785 * bits then wake us up.
4786 **************************************************************************/
4787 static int
4788 qla2x00_do_dpc(void *data)
4789 {
4790         int             rval;
4791         scsi_qla_host_t *base_vha;
4792         struct qla_hw_data *ha;
4793
4794         ha = (struct qla_hw_data *)data;
4795         base_vha = pci_get_drvdata(ha->pdev);
4796
4797         set_user_nice(current, MIN_NICE);
4798
4799         set_current_state(TASK_INTERRUPTIBLE);
4800         while (!kthread_should_stop()) {
4801                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4802                     "DPC handler sleeping.\n");
4803
4804                 schedule();
4805
4806                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4807                         goto end_loop;
4808
4809                 if (ha->flags.eeh_busy) {
4810                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4811                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4812                         goto end_loop;
4813                 }
4814
4815                 ha->dpc_active = 1;
4816
4817                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4818                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4819                     base_vha->dpc_flags);
4820
4821                 qla2x00_do_work(base_vha);
4822
4823                 if (IS_P3P_TYPE(ha)) {
4824                         if (IS_QLA8044(ha)) {
4825                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4826                                         &base_vha->dpc_flags)) {
4827                                         qla8044_idc_lock(ha);
4828                                         qla8044_wr_direct(base_vha,
4829                                                 QLA8044_CRB_DEV_STATE_INDEX,
4830                                                 QLA8XXX_DEV_FAILED);
4831                                         qla8044_idc_unlock(ha);
4832                                         ql_log(ql_log_info, base_vha, 0x4004,
4833                                                 "HW State: FAILED.\n");
4834                                         qla8044_device_state_handler(base_vha);
4835                                         continue;
4836                                 }
4837
4838                         } else {
4839                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4840                                         &base_vha->dpc_flags)) {
4841                                         qla82xx_idc_lock(ha);
4842                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4843                                                 QLA8XXX_DEV_FAILED);
4844                                         qla82xx_idc_unlock(ha);
4845                                         ql_log(ql_log_info, base_vha, 0x0151,
4846                                                 "HW State: FAILED.\n");
4847                                         qla82xx_device_state_handler(base_vha);
4848                                         continue;
4849                                 }
4850                         }
4851
4852                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4853                                 &base_vha->dpc_flags)) {
4854
4855                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4856                                     "FCoE context reset scheduled.\n");
4857                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4858                                         &base_vha->dpc_flags))) {
4859                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4860                                                 /* FCoE-ctx reset failed.
4861                                                  * Escalate to chip-reset
4862                                                  */
4863                                                 set_bit(ISP_ABORT_NEEDED,
4864                                                         &base_vha->dpc_flags);
4865                                         }
4866                                         clear_bit(ABORT_ISP_ACTIVE,
4867                                                 &base_vha->dpc_flags);
4868                                 }
4869
4870                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4871                                     "FCoE context reset end.\n");
4872                         }
4873                 } else if (IS_QLAFX00(ha)) {
4874                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4875                                 &base_vha->dpc_flags)) {
4876                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4877                                     "Firmware Reset Recovery\n");
4878                                 if (qlafx00_reset_initialize(base_vha)) {
4879                                         /* Failed. Abort isp later. */
4880                                         if (!test_bit(UNLOADING,
4881                                             &base_vha->dpc_flags)) {
4882                                                 set_bit(ISP_UNRECOVERABLE,
4883                                                     &base_vha->dpc_flags);
4884                                                 ql_dbg(ql_dbg_dpc, base_vha,
4885                                                     0x4021,
4886                                                     "Reset Recovery Failed\n");
4887                                         }
4888                                 }
4889                         }
4890
4891                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4892                                 &base_vha->dpc_flags)) {
4893                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4894                                     "ISPFx00 Target Scan scheduled\n");
4895                                 if (qlafx00_rescan_isp(base_vha)) {
4896                                         if (!test_bit(UNLOADING,
4897                                             &base_vha->dpc_flags))
4898                                                 set_bit(ISP_UNRECOVERABLE,
4899                                                     &base_vha->dpc_flags);
4900                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4901                                             "ISPFx00 Target Scan Failed\n");
4902                                 }
4903                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4904                                     "ISPFx00 Target Scan End\n");
4905                         }
4906                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4907                                 &base_vha->dpc_flags)) {
4908                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4909                                     "ISPFx00 Host Info resend scheduled\n");
4910                                 qlafx00_fx_disc(base_vha,
4911                                     &base_vha->hw->mr.fcport,
4912                                     FXDISC_REG_HOST_INFO);
4913                         }
4914                 }
4915
4916                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4917                                                 &base_vha->dpc_flags)) {
4918
4919                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4920                             "ISP abort scheduled.\n");
4921                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4922                             &base_vha->dpc_flags))) {
4923
4924                                 if (ha->isp_ops->abort_isp(base_vha)) {
4925                                         /* failed. retry later */
4926                                         set_bit(ISP_ABORT_NEEDED,
4927                                             &base_vha->dpc_flags);
4928                                 }
4929                                 clear_bit(ABORT_ISP_ACTIVE,
4930                                                 &base_vha->dpc_flags);
4931                         }
4932
4933                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4934                             "ISP abort end.\n");
4935                 }
4936
4937                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4938                     &base_vha->dpc_flags)) {
4939                         qla2x00_update_fcports(base_vha);
4940                 }
4941
4942                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4943                         int ret;
4944                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4945                         if (ret != QLA_SUCCESS)
4946                                 ql_log(ql_log_warn, base_vha, 0x121,
4947                                     "Failed to enable receiving of RSCN "
4948                                     "requests: 0x%x.\n", ret);
4949                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4950                 }
4951
4952                 if (IS_QLAFX00(ha))
4953                         goto loop_resync_check;
4954
4955                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4956                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4957                             "Quiescence mode scheduled.\n");
4958                         if (IS_P3P_TYPE(ha)) {
4959                                 if (IS_QLA82XX(ha))
4960                                         qla82xx_device_state_handler(base_vha);
4961                                 if (IS_QLA8044(ha))
4962                                         qla8044_device_state_handler(base_vha);
4963                                 clear_bit(ISP_QUIESCE_NEEDED,
4964                                     &base_vha->dpc_flags);
4965                                 if (!ha->flags.quiesce_owner) {
4966                                         qla2x00_perform_loop_resync(base_vha);
4967                                         if (IS_QLA82XX(ha)) {
4968                                                 qla82xx_idc_lock(ha);
4969                                                 qla82xx_clear_qsnt_ready(
4970                                                     base_vha);
4971                                                 qla82xx_idc_unlock(ha);
4972                                         } else if (IS_QLA8044(ha)) {
4973                                                 qla8044_idc_lock(ha);
4974                                                 qla8044_clear_qsnt_ready(
4975                                                     base_vha);
4976                                                 qla8044_idc_unlock(ha);
4977                                         }
4978                                 }
4979                         } else {
4980                                 clear_bit(ISP_QUIESCE_NEEDED,
4981                                     &base_vha->dpc_flags);
4982                                 qla2x00_quiesce_io(base_vha);
4983                         }
4984                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4985                             "Quiescence mode end.\n");
4986                 }
4987
4988                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4989                                 &base_vha->dpc_flags) &&
4990                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4991
4992                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4993                             "Reset marker scheduled.\n");
4994                         qla2x00_rst_aen(base_vha);
4995                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4996                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4997                             "Reset marker end.\n");
4998                 }
4999
5000                 /* Retry each device up to login retry count */
5001                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5002                                                 &base_vha->dpc_flags)) &&
5003                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5004                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5005
5006                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5007                             "Relogin scheduled.\n");
5008                         qla2x00_relogin(base_vha);
5009                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5010                             "Relogin end.\n");
5011                 }
5012 loop_resync_check:
5013                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5014                     &base_vha->dpc_flags)) {
5015
5016                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5017                             "Loop resync scheduled.\n");
5018
5019                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5020                             &base_vha->dpc_flags))) {
5021
5022                                 rval = qla2x00_loop_resync(base_vha);
5023
5024                                 clear_bit(LOOP_RESYNC_ACTIVE,
5025                                                 &base_vha->dpc_flags);
5026                         }
5027
5028                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5029                             "Loop resync end.\n");
5030                 }
5031
5032                 if (IS_QLAFX00(ha))
5033                         goto intr_on_check;
5034
5035                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5036                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5037                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5038                         qla2xxx_flash_npiv_conf(base_vha);
5039                 }
5040
5041 intr_on_check:
5042                 if (!ha->interrupts_on)
5043                         ha->isp_ops->enable_intrs(ha);
5044
5045                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5046                                         &base_vha->dpc_flags)) {
5047                         if (ha->beacon_blink_led == 1)
5048                                 ha->isp_ops->beacon_blink(base_vha);
5049                 }
5050
5051                 if (!IS_QLAFX00(ha))
5052                         qla2x00_do_dpc_all_vps(base_vha);
5053
5054                 ha->dpc_active = 0;
5055 end_loop:
5056                 set_current_state(TASK_INTERRUPTIBLE);
5057         } /* End of while(1) */
5058         __set_current_state(TASK_RUNNING);
5059
5060         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5061             "DPC handler exiting.\n");
5062
5063         /*
5064          * Make sure that nobody tries to wake us up again.
5065          */
5066         ha->dpc_active = 0;
5067
5068         /* Cleanup any residual CTX SRBs. */
5069         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5070
5071         return 0;
5072 }
5073
5074 void
5075 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5076 {
5077         struct qla_hw_data *ha = vha->hw;
5078         struct task_struct *t = ha->dpc_thread;
5079
5080         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5081                 wake_up_process(t);
5082 }
5083
5084 /*
5085 *  qla2x00_rst_aen
5086 *      Processes asynchronous reset.
5087 *
5088 * Input:
5089 *      ha  = adapter block pointer.
5090 */
5091 static void
5092 qla2x00_rst_aen(scsi_qla_host_t *vha)
5093 {
5094         if (vha->flags.online && !vha->flags.reset_active &&
5095             !atomic_read(&vha->loop_down_timer) &&
5096             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5097                 do {
5098                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5099
5100                         /*
5101                          * Issue marker command only when we are going to start
5102                          * the I/O.
5103                          */
5104                         vha->marker_needed = 1;
5105                 } while (!atomic_read(&vha->loop_down_timer) &&
5106                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5107         }
5108 }
5109
5110 /**************************************************************************
5111 *   qla2x00_timer
5112 *
5113 * Description:
5114 *   One second timer
5115 *
5116 * Context: Interrupt
5117 ***************************************************************************/
5118 void
5119 qla2x00_timer(scsi_qla_host_t *vha)
5120 {
5121         unsigned long   cpu_flags = 0;
5122         int             start_dpc = 0;
5123         int             index;
5124         srb_t           *sp;
5125         uint16_t        w;
5126         struct qla_hw_data *ha = vha->hw;
5127         struct req_que *req;
5128
5129         if (ha->flags.eeh_busy) {
5130                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5131                     "EEH = %d, restarting timer.\n",
5132                     ha->flags.eeh_busy);
5133                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5134                 return;
5135         }
5136
5137         /*
5138          * Hardware read to raise pending EEH errors during mailbox waits. If
5139          * the read returns -1 then disable the board.
5140          */
5141         if (!pci_channel_offline(ha->pdev)) {
5142                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5143                 qla2x00_check_reg16_for_disconnect(vha, w);
5144         }
5145
5146         /* Make sure qla82xx_watchdog is run only for physical port */
5147         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5148                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5149                         start_dpc++;
5150                 if (IS_QLA82XX(ha))
5151                         qla82xx_watchdog(vha);
5152                 else if (IS_QLA8044(ha))
5153                         qla8044_watchdog(vha);
5154         }
5155
5156         if (!vha->vp_idx && IS_QLAFX00(ha))
5157                 qlafx00_timer_routine(vha);
5158
5159         /* Loop down handler. */
5160         if (atomic_read(&vha->loop_down_timer) > 0 &&
5161             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5162             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5163                 && vha->flags.online) {
5164
5165                 if (atomic_read(&vha->loop_down_timer) ==
5166                     vha->loop_down_abort_time) {
5167
5168                         ql_log(ql_log_info, vha, 0x6008,
5169                             "Loop down - aborting the queues before time expires.\n");
5170
5171                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5172                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5173
5174                         /*
5175                          * Schedule an ISP abort to return any FCP2-device
5176                          * commands.
5177                          */
5178                         /* NPIV - scan physical port only */
5179                         if (!vha->vp_idx) {
5180                                 spin_lock_irqsave(&ha->hardware_lock,
5181                                     cpu_flags);
5182                                 req = ha->req_q_map[0];
5183                                 for (index = 1;
5184                                     index < req->num_outstanding_cmds;
5185                                     index++) {
5186                                         fc_port_t *sfcp;
5187
5188                                         sp = req->outstanding_cmds[index];
5189                                         if (!sp)
5190                                                 continue;
5191                                         if (sp->type != SRB_SCSI_CMD)
5192                                                 continue;
5193                                         sfcp = sp->fcport;
5194                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5195                                                 continue;
5196
5197                                         if (IS_QLA82XX(ha))
5198                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5199                                                         &vha->dpc_flags);
5200                                         else
5201                                                 set_bit(ISP_ABORT_NEEDED,
5202                                                         &vha->dpc_flags);
5203                                         break;
5204                                 }
5205                                 spin_unlock_irqrestore(&ha->hardware_lock,
5206                                                                 cpu_flags);
5207                         }
5208                         start_dpc++;
5209                 }
5210
5211                 /* if the loop has been down for 4 minutes, reinit adapter */
5212                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5213                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5214                                 ql_log(ql_log_warn, vha, 0x6009,
5215                                     "Loop down - aborting ISP.\n");
5216
5217                                 if (IS_QLA82XX(ha))
5218                                         set_bit(FCOE_CTX_RESET_NEEDED,
5219                                                 &vha->dpc_flags);
5220                                 else
5221                                         set_bit(ISP_ABORT_NEEDED,
5222                                                 &vha->dpc_flags);
5223                         }
5224                 }
5225                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5226                     "Loop down - seconds remaining %d.\n",
5227                     atomic_read(&vha->loop_down_timer));
5228         }
5229         /* Check if beacon LED needs to be blinked for physical host only */
5230         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5231                 /* There is no beacon_blink function for ISP82xx */
5232                 if (!IS_P3P_TYPE(ha)) {
5233                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5234                         start_dpc++;
5235                 }
5236         }
5237
5238         /* Process any deferred work. */
5239         if (!list_empty(&vha->work_list))
5240                 start_dpc++;
5241
5242         /* Schedule the DPC routine if needed */
5243         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5244             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5245             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5246             start_dpc ||
5247             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5248             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5249             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5250             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5251             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5252             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5253                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5254                     "isp_abort_needed=%d loop_resync_needed=%d "
5255                     "fcport_update_needed=%d start_dpc=%d "
5256                     "reset_marker_needed=%d",
5257                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5258                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5259                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5260                     start_dpc,
5261                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5262                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5263                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5264                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5265                     "relogin_needed=%d.\n",
5266                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5267                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5268                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5269                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5270                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5271                 qla2xxx_wake_dpc(vha);
5272         }
5273
5274         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5275 }
5276
5277 /* Firmware interface routines. */
5278
5279 #define FW_BLOBS        11
5280 #define FW_ISP21XX      0
5281 #define FW_ISP22XX      1
5282 #define FW_ISP2300      2
5283 #define FW_ISP2322      3
5284 #define FW_ISP24XX      4
5285 #define FW_ISP25XX      5
5286 #define FW_ISP81XX      6
5287 #define FW_ISP82XX      7
5288 #define FW_ISP2031      8
5289 #define FW_ISP8031      9
5290 #define FW_ISP27XX      10
5291
5292 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5293 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5294 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5295 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5296 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5297 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5298 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5299 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5300 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5301 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5302 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5303
5304
5305 static DEFINE_MUTEX(qla_fw_lock);
5306
5307 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5308         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5309         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5310         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5311         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5312         { .name = FW_FILE_ISP24XX, },
5313         { .name = FW_FILE_ISP25XX, },
5314         { .name = FW_FILE_ISP81XX, },
5315         { .name = FW_FILE_ISP82XX, },
5316         { .name = FW_FILE_ISP2031, },
5317         { .name = FW_FILE_ISP8031, },
5318         { .name = FW_FILE_ISP27XX, },
5319 };
5320
5321 struct fw_blob *
5322 qla2x00_request_firmware(scsi_qla_host_t *vha)
5323 {
5324         struct qla_hw_data *ha = vha->hw;
5325         struct fw_blob *blob;
5326
5327         if (IS_QLA2100(ha)) {
5328                 blob = &qla_fw_blobs[FW_ISP21XX];
5329         } else if (IS_QLA2200(ha)) {
5330                 blob = &qla_fw_blobs[FW_ISP22XX];
5331         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5332                 blob = &qla_fw_blobs[FW_ISP2300];
5333         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5334                 blob = &qla_fw_blobs[FW_ISP2322];
5335         } else if (IS_QLA24XX_TYPE(ha)) {
5336                 blob = &qla_fw_blobs[FW_ISP24XX];
5337         } else if (IS_QLA25XX(ha)) {
5338                 blob = &qla_fw_blobs[FW_ISP25XX];
5339         } else if (IS_QLA81XX(ha)) {
5340                 blob = &qla_fw_blobs[FW_ISP81XX];
5341         } else if (IS_QLA82XX(ha)) {
5342                 blob = &qla_fw_blobs[FW_ISP82XX];
5343         } else if (IS_QLA2031(ha)) {
5344                 blob = &qla_fw_blobs[FW_ISP2031];
5345         } else if (IS_QLA8031(ha)) {
5346                 blob = &qla_fw_blobs[FW_ISP8031];
5347         } else if (IS_QLA27XX(ha)) {
5348                 blob = &qla_fw_blobs[FW_ISP27XX];
5349         } else {
5350                 return NULL;
5351         }
5352
5353         mutex_lock(&qla_fw_lock);
5354         if (blob->fw)
5355                 goto out;
5356
5357         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5358                 ql_log(ql_log_warn, vha, 0x0063,
5359                     "Failed to load firmware image (%s).\n", blob->name);
5360                 blob->fw = NULL;
5361                 blob = NULL;
5362                 goto out;
5363         }
5364
5365 out:
5366         mutex_unlock(&qla_fw_lock);
5367         return blob;
5368 }
5369
5370 static void
5371 qla2x00_release_firmware(void)
5372 {
5373         int idx;
5374
5375         mutex_lock(&qla_fw_lock);
5376         for (idx = 0; idx < FW_BLOBS; idx++)
5377                 release_firmware(qla_fw_blobs[idx].fw);
5378         mutex_unlock(&qla_fw_lock);
5379 }
5380
5381 static pci_ers_result_t
5382 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5383 {
5384         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5385         struct qla_hw_data *ha = vha->hw;
5386
5387         ql_dbg(ql_dbg_aer, vha, 0x9000,
5388             "PCI error detected, state %x.\n", state);
5389
5390         switch (state) {
5391         case pci_channel_io_normal:
5392                 ha->flags.eeh_busy = 0;
5393                 return PCI_ERS_RESULT_CAN_RECOVER;
5394         case pci_channel_io_frozen:
5395                 ha->flags.eeh_busy = 1;
5396                 /* For ISP82XX complete any pending mailbox cmd */
5397                 if (IS_QLA82XX(ha)) {
5398                         ha->flags.isp82xx_fw_hung = 1;
5399                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5400                         qla82xx_clear_pending_mbx(vha);
5401                 }
5402                 qla2x00_free_irqs(vha);
5403                 pci_disable_device(pdev);
5404                 /* Return back all IOs */
5405                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5406                 return PCI_ERS_RESULT_NEED_RESET;
5407         case pci_channel_io_perm_failure:
5408                 ha->flags.pci_channel_io_perm_failure = 1;
5409                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5410                 return PCI_ERS_RESULT_DISCONNECT;
5411         }
5412         return PCI_ERS_RESULT_NEED_RESET;
5413 }
5414
5415 static pci_ers_result_t
5416 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5417 {
5418         int risc_paused = 0;
5419         uint32_t stat;
5420         unsigned long flags;
5421         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5422         struct qla_hw_data *ha = base_vha->hw;
5423         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5424         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5425
5426         if (IS_QLA82XX(ha))
5427                 return PCI_ERS_RESULT_RECOVERED;
5428
5429         spin_lock_irqsave(&ha->hardware_lock, flags);
5430         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5431                 stat = RD_REG_DWORD(&reg->hccr);
5432                 if (stat & HCCR_RISC_PAUSE)
5433                         risc_paused = 1;
5434         } else if (IS_QLA23XX(ha)) {
5435                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5436                 if (stat & HSR_RISC_PAUSED)
5437                         risc_paused = 1;
5438         } else if (IS_FWI2_CAPABLE(ha)) {
5439                 stat = RD_REG_DWORD(&reg24->host_status);
5440                 if (stat & HSRX_RISC_PAUSED)
5441                         risc_paused = 1;
5442         }
5443         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5444
5445         if (risc_paused) {
5446                 ql_log(ql_log_info, base_vha, 0x9003,
5447                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5448                 ha->isp_ops->fw_dump(base_vha, 0);
5449
5450                 return PCI_ERS_RESULT_NEED_RESET;
5451         } else
5452                 return PCI_ERS_RESULT_RECOVERED;
5453 }
5454
5455 static uint32_t
5456 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5457 {
5458         uint32_t rval = QLA_FUNCTION_FAILED;
5459         uint32_t drv_active = 0;
5460         struct qla_hw_data *ha = base_vha->hw;
5461         int fn;
5462         struct pci_dev *other_pdev = NULL;
5463
5464         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5465             "Entered %s.\n", __func__);
5466
5467         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5468
5469         if (base_vha->flags.online) {
5470                 /* Abort all outstanding commands,
5471                  * so as to be requeued later */
5472                 qla2x00_abort_isp_cleanup(base_vha);
5473         }
5474
5475
5476         fn = PCI_FUNC(ha->pdev->devfn);
5477         while (fn > 0) {
5478                 fn--;
5479                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5480                     "Finding pci device at function = 0x%x.\n", fn);
5481                 other_pdev =
5482                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5483                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5484                     fn));
5485
5486                 if (!other_pdev)
5487                         continue;
5488                 if (atomic_read(&other_pdev->enable_cnt)) {
5489                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5490                             "Found PCI func available and enable at 0x%x.\n",
5491                             fn);
5492                         pci_dev_put(other_pdev);
5493                         break;
5494                 }
5495                 pci_dev_put(other_pdev);
5496         }
5497
5498         if (!fn) {
5499                 /* Reset owner */
5500                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5501                     "This devfn is reset owner = 0x%x.\n",
5502                     ha->pdev->devfn);
5503                 qla82xx_idc_lock(ha);
5504
5505                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5506                     QLA8XXX_DEV_INITIALIZING);
5507
5508                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5509                     QLA82XX_IDC_VERSION);
5510
5511                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5512                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5513                     "drv_active = 0x%x.\n", drv_active);
5514
5515                 qla82xx_idc_unlock(ha);
5516                 /* Reset if device is not already reset
5517                  * drv_active would be 0 if a reset has already been done
5518                  */
5519                 if (drv_active)
5520                         rval = qla82xx_start_firmware(base_vha);
5521                 else
5522                         rval = QLA_SUCCESS;
5523                 qla82xx_idc_lock(ha);
5524
5525                 if (rval != QLA_SUCCESS) {
5526                         ql_log(ql_log_info, base_vha, 0x900b,
5527                             "HW State: FAILED.\n");
5528                         qla82xx_clear_drv_active(ha);
5529                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5530                             QLA8XXX_DEV_FAILED);
5531                 } else {
5532                         ql_log(ql_log_info, base_vha, 0x900c,
5533                             "HW State: READY.\n");
5534                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5535                             QLA8XXX_DEV_READY);
5536                         qla82xx_idc_unlock(ha);
5537                         ha->flags.isp82xx_fw_hung = 0;
5538                         rval = qla82xx_restart_isp(base_vha);
5539                         qla82xx_idc_lock(ha);
5540                         /* Clear driver state register */
5541                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5542                         qla82xx_set_drv_active(base_vha);
5543                 }
5544                 qla82xx_idc_unlock(ha);
5545         } else {
5546                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5547                     "This devfn is not reset owner = 0x%x.\n",
5548                     ha->pdev->devfn);
5549                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5550                     QLA8XXX_DEV_READY)) {
5551                         ha->flags.isp82xx_fw_hung = 0;
5552                         rval = qla82xx_restart_isp(base_vha);
5553                         qla82xx_idc_lock(ha);
5554                         qla82xx_set_drv_active(base_vha);
5555                         qla82xx_idc_unlock(ha);
5556                 }
5557         }
5558         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5559
5560         return rval;
5561 }
5562
5563 static pci_ers_result_t
5564 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5565 {
5566         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5567         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5568         struct qla_hw_data *ha = base_vha->hw;
5569         struct rsp_que *rsp;
5570         int rc, retries = 10;
5571
5572         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5573             "Slot Reset.\n");
5574
5575         /* Workaround: qla2xxx driver which access hardware earlier
5576          * needs error state to be pci_channel_io_online.
5577          * Otherwise mailbox command timesout.
5578          */
5579         pdev->error_state = pci_channel_io_normal;
5580
5581         pci_restore_state(pdev);
5582
5583         /* pci_restore_state() clears the saved_state flag of the device
5584          * save restored state which resets saved_state flag
5585          */
5586         pci_save_state(pdev);
5587
5588         if (ha->mem_only)
5589                 rc = pci_enable_device_mem(pdev);
5590         else
5591                 rc = pci_enable_device(pdev);
5592
5593         if (rc) {
5594                 ql_log(ql_log_warn, base_vha, 0x9005,
5595                     "Can't re-enable PCI device after reset.\n");
5596                 goto exit_slot_reset;
5597         }
5598
5599         rsp = ha->rsp_q_map[0];
5600         if (qla2x00_request_irqs(ha, rsp))
5601                 goto exit_slot_reset;
5602
5603         if (ha->isp_ops->pci_config(base_vha))
5604                 goto exit_slot_reset;
5605
5606         if (IS_QLA82XX(ha)) {
5607                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5608                         ret = PCI_ERS_RESULT_RECOVERED;
5609                         goto exit_slot_reset;
5610                 } else
5611                         goto exit_slot_reset;
5612         }
5613
5614         while (ha->flags.mbox_busy && retries--)
5615                 msleep(1000);
5616
5617         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5618         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5619                 ret =  PCI_ERS_RESULT_RECOVERED;
5620         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5621
5622
5623 exit_slot_reset:
5624         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5625             "slot_reset return %x.\n", ret);
5626
5627         return ret;
5628 }
5629
5630 static void
5631 qla2xxx_pci_resume(struct pci_dev *pdev)
5632 {
5633         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5634         struct qla_hw_data *ha = base_vha->hw;
5635         int ret;
5636
5637         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5638             "pci_resume.\n");
5639
5640         ret = qla2x00_wait_for_hba_online(base_vha);
5641         if (ret != QLA_SUCCESS) {
5642                 ql_log(ql_log_fatal, base_vha, 0x9002,
5643                     "The device failed to resume I/O from slot/link_reset.\n");
5644         }
5645
5646         pci_cleanup_aer_uncorrect_error_status(pdev);
5647
5648         ha->flags.eeh_busy = 0;
5649 }
5650
5651 static void
5652 qla83xx_disable_laser(scsi_qla_host_t *vha)
5653 {
5654         uint32_t reg, data, fn;
5655         struct qla_hw_data *ha = vha->hw;
5656         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
5657
5658         /* pci func #/port # */
5659         ql_dbg(ql_dbg_init, vha, 0x004b,
5660             "Disabling Laser for hba: %p\n", vha);
5661
5662         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
5663                 (BIT_15|BIT_14|BIT_13|BIT_12));
5664
5665         fn = (fn >> 12);
5666
5667         if (fn & 1)
5668                 reg = PORT_1_2031;
5669         else
5670                 reg = PORT_0_2031;
5671
5672         data = LASER_OFF_2031;
5673
5674         qla83xx_wr_reg(vha, reg, data);
5675 }
5676
5677 static const struct pci_error_handlers qla2xxx_err_handler = {
5678         .error_detected = qla2xxx_pci_error_detected,
5679         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5680         .slot_reset = qla2xxx_pci_slot_reset,
5681         .resume = qla2xxx_pci_resume,
5682 };
5683
5684 static struct pci_device_id qla2xxx_pci_tbl[] = {
5685         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5686         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5687         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5688         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5689         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5690         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5691         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5692         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5693         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5694         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5695         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5696         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5697         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5698         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5699         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5700         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5701         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5702         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5703         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5704         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5705         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5706         { 0 },
5707 };
5708 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5709
5710 static struct pci_driver qla2xxx_pci_driver = {
5711         .name           = QLA2XXX_DRIVER_NAME,
5712         .driver         = {
5713                 .owner          = THIS_MODULE,
5714         },
5715         .id_table       = qla2xxx_pci_tbl,
5716         .probe          = qla2x00_probe_one,
5717         .remove         = qla2x00_remove_one,
5718         .shutdown       = qla2x00_shutdown,
5719         .err_handler    = &qla2xxx_err_handler,
5720 };
5721
5722 static const struct file_operations apidev_fops = {
5723         .owner = THIS_MODULE,
5724         .llseek = noop_llseek,
5725 };
5726
5727 /**
5728  * qla2x00_module_init - Module initialization.
5729  **/
5730 static int __init
5731 qla2x00_module_init(void)
5732 {
5733         int ret = 0;
5734
5735         /* Allocate cache for SRBs. */
5736         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5737             SLAB_HWCACHE_ALIGN, NULL);
5738         if (srb_cachep == NULL) {
5739                 ql_log(ql_log_fatal, NULL, 0x0001,
5740                     "Unable to allocate SRB cache...Failing load!.\n");
5741                 return -ENOMEM;
5742         }
5743
5744         /* Initialize target kmem_cache and mem_pools */
5745         ret = qlt_init();
5746         if (ret < 0) {
5747                 kmem_cache_destroy(srb_cachep);
5748                 return ret;
5749         } else if (ret > 0) {
5750                 /*
5751                  * If initiator mode is explictly disabled by qlt_init(),
5752                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5753                  * performing scsi_scan_target() during LOOP UP event.
5754                  */
5755                 qla2xxx_transport_functions.disable_target_scan = 1;
5756                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5757         }
5758
5759         /* Derive version string. */
5760         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5761         if (ql2xextended_error_logging)
5762                 strcat(qla2x00_version_str, "-debug");
5763
5764         qla2xxx_transport_template =
5765             fc_attach_transport(&qla2xxx_transport_functions);
5766         if (!qla2xxx_transport_template) {
5767                 kmem_cache_destroy(srb_cachep);
5768                 ql_log(ql_log_fatal, NULL, 0x0002,
5769                     "fc_attach_transport failed...Failing load!.\n");
5770                 qlt_exit();
5771                 return -ENODEV;
5772         }
5773
5774         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5775         if (apidev_major < 0) {
5776                 ql_log(ql_log_fatal, NULL, 0x0003,
5777                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5778         }
5779
5780         qla2xxx_transport_vport_template =
5781             fc_attach_transport(&qla2xxx_transport_vport_functions);
5782         if (!qla2xxx_transport_vport_template) {
5783                 kmem_cache_destroy(srb_cachep);
5784                 qlt_exit();
5785                 fc_release_transport(qla2xxx_transport_template);
5786                 ql_log(ql_log_fatal, NULL, 0x0004,
5787                     "fc_attach_transport vport failed...Failing load!.\n");
5788                 return -ENODEV;
5789         }
5790         ql_log(ql_log_info, NULL, 0x0005,
5791             "QLogic Fibre Channel HBA Driver: %s.\n",
5792             qla2x00_version_str);
5793         ret = pci_register_driver(&qla2xxx_pci_driver);
5794         if (ret) {
5795                 kmem_cache_destroy(srb_cachep);
5796                 qlt_exit();
5797                 fc_release_transport(qla2xxx_transport_template);
5798                 fc_release_transport(qla2xxx_transport_vport_template);
5799                 ql_log(ql_log_fatal, NULL, 0x0006,
5800                     "pci_register_driver failed...ret=%d Failing load!.\n",
5801                     ret);
5802         }
5803         return ret;
5804 }
5805
5806 /**
5807  * qla2x00_module_exit - Module cleanup.
5808  **/
5809 static void __exit
5810 qla2x00_module_exit(void)
5811 {
5812         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5813         pci_unregister_driver(&qla2xxx_pci_driver);
5814         qla2x00_release_firmware();
5815         kmem_cache_destroy(srb_cachep);
5816         qlt_exit();
5817         if (ctx_cachep)
5818                 kmem_cache_destroy(ctx_cachep);
5819         fc_release_transport(qla2xxx_transport_template);
5820         fc_release_transport(qla2xxx_transport_vport_template);
5821 }
5822
5823 module_init(qla2x00_module_init);
5824 module_exit(qla2x00_module_exit);
5825
5826 MODULE_AUTHOR("QLogic Corporation");
5827 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5828 MODULE_LICENSE("GPL");
5829 MODULE_VERSION(QLA2XXX_VERSION);
5830 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5831 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5832 MODULE_FIRMWARE(FW_FILE_ISP2300);
5833 MODULE_FIRMWARE(FW_FILE_ISP2322);
5834 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5835 MODULE_FIRMWARE(FW_FILE_ISP25XX);