drivers/scsi/qla2xxx/qla_tmpl.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8 #include "qla_tmpl.h"
   9
  10 /* note default template is in big endian */
  11 static const uint32_t ql27xx_fwdt_default_template[] = {
  12         0x63000000, 0xa4000000, 0x7c050000, 0x00000000,
  13         0x30000000, 0x01000000, 0x00000000, 0xc0406eb4,
  14         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  15         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  16         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  17         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  18         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  19         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  20         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  21         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  22         0x00000000, 0x04010000, 0x14000000, 0x00000000,
  23         0x02000000, 0x44000000, 0x09010000, 0x10000000,
  24         0x00000000, 0x02000000, 0x01010000, 0x1c000000,
  25         0x00000000, 0x02000000, 0x00600000, 0x00000000,
  26         0xc0000000, 0x01010000, 0x1c000000, 0x00000000,
  27         0x02000000, 0x00600000, 0x00000000, 0xcc000000,
  28         0x01010000, 0x1c000000, 0x00000000, 0x02000000,
  29         0x10600000, 0x00000000, 0xd4000000, 0x01010000,
  30         0x1c000000, 0x00000000, 0x02000000, 0x700f0000,
  31         0x00000060, 0xf0000000, 0x00010000, 0x18000000,
  32         0x00000000, 0x02000000, 0x00700000, 0x041000c0,
  33         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  34         0x10700000, 0x041000c0, 0x00010000, 0x18000000,
  35         0x00000000, 0x02000000, 0x40700000, 0x041000c0,
  36         0x01010000, 0x1c000000, 0x00000000, 0x02000000,
  37         0x007c0000, 0x01000000, 0xc0000000, 0x00010000,
  38         0x18000000, 0x00000000, 0x02000000, 0x007c0000,
  39         0x040300c4, 0x00010000, 0x18000000, 0x00000000,
  40         0x02000000, 0x007c0000, 0x040100c0, 0x01010000,
  41         0x1c000000, 0x00000000, 0x02000000, 0x007c0000,
  42         0x00000000, 0xc0000000, 0x00010000, 0x18000000,
  43         0x00000000, 0x02000000, 0x007c0000, 0x04200000,
  44         0x0b010000, 0x18000000, 0x00000000, 0x02000000,
  45         0x0c000000, 0x00000000, 0x02010000, 0x20000000,
  46         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  47         0xf0000000, 0x000000b0, 0x02010000, 0x20000000,
  48         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  49         0xf0000000, 0x000010b0, 0x02010000, 0x20000000,
  50         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  51         0xf0000000, 0x000020b0, 0x02010000, 0x20000000,
  52         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  53         0xf0000000, 0x000030b0, 0x02010000, 0x20000000,
  54         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  55         0xf0000000, 0x000040b0, 0x02010000, 0x20000000,
  56         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  57         0xf0000000, 0x000050b0, 0x02010000, 0x20000000,
  58         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  59         0xf0000000, 0x000060b0, 0x02010000, 0x20000000,
  60         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  61         0xf0000000, 0x000070b0, 0x02010000, 0x20000000,
  62         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  63         0xf0000000, 0x000080b0, 0x02010000, 0x20000000,
  64         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  65         0xf0000000, 0x000090b0, 0x02010000, 0x20000000,
  66         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  67         0xf0000000, 0x0000a0b0, 0x00010000, 0x18000000,
  68         0x00000000, 0x02000000, 0x0a000000, 0x040100c0,
  69         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  70         0x0a000000, 0x04200080, 0x00010000, 0x18000000,
  71         0x00000000, 0x02000000, 0x00be0000, 0x041000c0,
  72         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  73         0x10be0000, 0x041000c0, 0x00010000, 0x18000000,
  74         0x00000000, 0x02000000, 0x20be0000, 0x041000c0,
  75         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  76         0x30be0000, 0x041000c0, 0x00010000, 0x18000000,
  77         0x00000000, 0x02000000, 0x00b00000, 0x041000c0,
  78         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  79         0x10b00000, 0x041000c0, 0x00010000, 0x18000000,
  80         0x00000000, 0x02000000, 0x20b00000, 0x041000c0,
  81         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  82         0x30b00000, 0x041000c0, 0x00010000, 0x18000000,
  83         0x00000000, 0x02000000, 0x00300000, 0x041000c0,
  84         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  85         0x10300000, 0x041000c0, 0x00010000, 0x18000000,
  86         0x00000000, 0x02000000, 0x20300000, 0x041000c0,
  87         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  88         0x30300000, 0x041000c0, 0x0a010000, 0x10000000,
  89         0x00000000, 0x02000000, 0x06010000, 0x1c000000,
  90         0x00000000, 0x02000000, 0x01000000, 0x00000200,
  91         0xff230200, 0x06010000, 0x1c000000, 0x00000000,
  92         0x02000000, 0x02000000, 0x00001000, 0x00000000,
  93         0x07010000, 0x18000000, 0x00000000, 0x02000000,
  94         0x00000000, 0x01000000, 0x07010000, 0x18000000,
  95         0x00000000, 0x02000000, 0x00000000, 0x02000000,
  96         0x07010000, 0x18000000, 0x00000000, 0x02000000,
  97         0x00000000, 0x03000000, 0x0d010000, 0x14000000,
  98         0x00000000, 0x02000000, 0x00000000, 0xff000000,
  99         0x10000000, 0x00000000, 0x00000080,
 100 };
 101
 102 static inline void __iomem *
 103 qla27xx_isp_reg(struct scsi_qla_host *vha)
 104 {
 105         return &vha->hw->iobase->isp24;
 106 }
 107
 108 static inline void
 109 qla27xx_insert16(uint16_t value, void *buf, ulong *len)
 110 {
 111         if (buf) {
 112                 buf += *len;
 113                 *(__le16 *)buf = cpu_to_le16(value);
 114         }
 115         *len += sizeof(value);
 116 }
 117
 118 static inline void
 119 qla27xx_insert32(uint32_t value, void *buf, ulong *len)
 120 {
 121         if (buf) {
 122                 buf += *len;
 123                 *(__le32 *)buf = cpu_to_le32(value);
 124         }
 125         *len += sizeof(value);
 126 }
 127
 128 static inline void
 129 qla27xx_insertbuf(void *mem, ulong size, void *buf, ulong *len)
 130 {
 131
 132         if (buf && mem && size) {
 133                 buf += *len;
 134                 memcpy(buf, mem, size);
 135         }
 136         *len += size;
 137 }
 138
 139 static inline void
 140 qla27xx_read8(void *window, void *buf, ulong *len)
 141 {
 142         uint8_t value = ~0;
 143
 144         if (buf) {
 145                 value = RD_REG_BYTE((__iomem void *)window);
 146         }
 147         qla27xx_insert32(value, buf, len);
 148 }
 149
 150 static inline void
 151 qla27xx_read16(void *window, void *buf, ulong *len)
 152 {
 153         uint16_t value = ~0;
 154
 155         if (buf) {
 156                 value = RD_REG_WORD((__iomem void *)window);
 157         }
 158         qla27xx_insert32(value, buf, len);
 159 }
 160
 161 static inline void
 162 qla27xx_read32(void *window, void *buf, ulong *len)
 163 {
 164         uint32_t value = ~0;
 165
 166         if (buf) {
 167                 value = RD_REG_DWORD((__iomem void *)window);
 168         }
 169         qla27xx_insert32(value, buf, len);
 170 }
 171
 172 static inline void (*qla27xx_read_vector(uint width))(void *, void *, ulong *)
 173 {
 174         return
 175             (width == 1) ? qla27xx_read8 :
 176             (width == 2) ? qla27xx_read16 :
 177                            qla27xx_read32;
 178 }
 179
 180 static inline void
 181 qla27xx_read_reg(__iomem struct device_reg_24xx *reg,
 182         uint offset, void *buf, ulong *len)
 183 {
 184         void *window = (void *)reg + offset;
 185
 186         qla27xx_read32(window, buf, len);
 187 }
 188
 189 static inline void
 190 qla27xx_write_reg(__iomem struct device_reg_24xx *reg,
 191         uint offset, uint32_t data, void *buf)
 192 {
 193         __iomem void *window = reg + offset;
 194
 195         if (buf) {
 196                 WRT_REG_DWORD(window, data);
 197         }
 198 }
 199
 200 static inline void
 201 qla27xx_read_window(__iomem struct device_reg_24xx *reg,
 202         uint32_t addr, uint offset, uint count, uint width, void *buf,
 203         ulong *len)
 204 {
 205         void *window = (void *)reg + offset;
 206         void (*readn)(void *, void *, ulong *) = qla27xx_read_vector(width);
 207
 208         qla27xx_write_reg(reg, IOBASE_ADDR, addr, buf);
 209         while (count--) {
 210                 qla27xx_insert32(addr, buf, len);
 211                 readn(window, buf, len);
 212                 window += width;
 213                 addr++;
 214         }
 215 }
 216
 217 static inline void
 218 qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf)
 219 {
 220         if (buf)
 221                 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY;
 222 }
 223
 224 static int
 225 qla27xx_fwdt_entry_t0(struct scsi_qla_host *vha,
 226         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 227 {
 228         ql_dbg(ql_dbg_misc, vha, 0xd100,
 229             "%s: nop [%lx]\n", __func__, *len);
 230         qla27xx_skip_entry(ent, buf);
 231
 232         return false;
 233 }
 234
 235 static int
 236 qla27xx_fwdt_entry_t255(struct scsi_qla_host *vha,
 237         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 238 {
 239         ql_dbg(ql_dbg_misc, vha, 0xd1ff,
 240             "%s: end [%lx]\n", __func__, *len);
 241         qla27xx_skip_entry(ent, buf);
 242
 243         /* terminate */
 244         return true;
 245 }
 246
 247 static int
 248 qla27xx_fwdt_entry_t256(struct scsi_qla_host *vha,
 249         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 250 {
 251         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 252
 253         ql_dbg(ql_dbg_misc, vha, 0xd200,
 254             "%s: rdio t1 [%lx]\n", __func__, *len);
 255         qla27xx_read_window(reg, ent->t256.base_addr, ent->t256.pci_offset,
 256             ent->t256.reg_count, ent->t256.reg_width, buf, len);
 257
 258         return false;
 259 }
 260
 261 static int
 262 qla27xx_fwdt_entry_t257(struct scsi_qla_host *vha,
 263         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 264 {
 265         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 266
 267         ql_dbg(ql_dbg_misc, vha, 0xd201,
 268             "%s: wrio t1 [%lx]\n", __func__, *len);
 269         qla27xx_write_reg(reg, IOBASE_ADDR, ent->t257.base_addr, buf);
 270         qla27xx_write_reg(reg, ent->t257.pci_offset, ent->t257.write_data, buf);
 271
 272         return false;
 273 }
 274
 275 static int
 276 qla27xx_fwdt_entry_t258(struct scsi_qla_host *vha,
 277         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 278 {
 279         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 280
 281         ql_dbg(ql_dbg_misc, vha, 0xd202,
 282             "%s: rdio t2 [%lx]\n", __func__, *len);
 283         qla27xx_write_reg(reg, ent->t258.banksel_offset, ent->t258.bank, buf);
 284         qla27xx_read_window(reg, ent->t258.base_addr, ent->t258.pci_offset,
 285             ent->t258.reg_count, ent->t258.reg_width, buf, len);
 286
 287         return false;
 288 }
 289
 290 static int
 291 qla27xx_fwdt_entry_t259(struct scsi_qla_host *vha,
 292         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 293 {
 294         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 295
 296         ql_dbg(ql_dbg_misc, vha, 0xd203,
 297             "%s: wrio t2 [%lx]\n", __func__, *len);
 298         qla27xx_write_reg(reg, IOBASE_ADDR, ent->t259.base_addr, buf);
 299         qla27xx_write_reg(reg, ent->t259.banksel_offset, ent->t259.bank, buf);
 300         qla27xx_write_reg(reg, ent->t259.pci_offset, ent->t259.write_data, buf);
 301
 302         return false;
 303 }
 304
 305 static int
 306 qla27xx_fwdt_entry_t260(struct scsi_qla_host *vha,
 307         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 308 {
 309         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 310
 311         ql_dbg(ql_dbg_misc, vha, 0xd204,
 312             "%s: rdpci [%lx]\n", __func__, *len);
 313         qla27xx_insert32(ent->t260.pci_offset, buf, len);
 314         qla27xx_read_reg(reg, ent->t260.pci_offset, buf, len);
 315
 316         return false;
 317 }
 318
 319 static int
 320 qla27xx_fwdt_entry_t261(struct scsi_qla_host *vha,
 321         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 322 {
 323         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 324
 325         ql_dbg(ql_dbg_misc, vha, 0xd205,
 326             "%s: wrpci [%lx]\n", __func__, *len);
 327         qla27xx_write_reg(reg, ent->t261.pci_offset, ent->t261.write_data, buf);
 328
 329         return false;
 330 }
 331
 332 static int
 333 qla27xx_fwdt_entry_t262(struct scsi_qla_host *vha,
 334         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 335 {
 336         ulong dwords;
 337         ulong start;
 338         ulong end;
 339
 340         ql_dbg(ql_dbg_misc, vha, 0xd206,
 341             "%s: rdram(%x) [%lx]\n", __func__, ent->t262.ram_area, *len);
 342         start = ent->t262.start_addr;
 343         end = ent->t262.end_addr;
 344
 345         if (ent->t262.ram_area == T262_RAM_AREA_CRITICAL_RAM) {
 346                 ;
 347         } else if (ent->t262.ram_area == T262_RAM_AREA_EXTERNAL_RAM) {
 348                 end = vha->hw->fw_memory_size;
 349                 if (buf)
 350                         ent->t262.end_addr = end;
 351         } else if (ent->t262.ram_area == T262_RAM_AREA_SHARED_RAM) {
 352                 start = vha->hw->fw_shared_ram_start;
 353                 end = vha->hw->fw_shared_ram_end;
 354                 if (buf) {
 355                         ent->t262.start_addr = start;
 356                         ent->t262.end_addr = end;
 357                 }
 358         } else {
 359                 ql_dbg(ql_dbg_misc, vha, 0xd022,
 360                     "%s: unknown area %x\n", __func__, ent->t262.ram_area);
 361                 qla27xx_skip_entry(ent, buf);
 362                 goto done;
 363         }
 364
 365         if (end < start || end == 0) {
 366                 ql_dbg(ql_dbg_misc, vha, 0xd023,
 367                     "%s: unusable range (start=%x end=%x)\n", __func__,
 368                     ent->t262.end_addr, ent->t262.start_addr);
 369                 qla27xx_skip_entry(ent, buf);
 370                 goto done;
 371         }
 372
 373         dwords = end - start + 1;
 374         if (buf) {
 375                 buf += *len;
 376                 qla24xx_dump_ram(vha->hw, start, buf, dwords, &buf);
 377         }
 378         *len += dwords * sizeof(uint32_t);
 379 done:
 380         return false;
 381 }
 382
 383 static int
 384 qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha,
 385         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 386 {
 387         uint count = 0;
 388         uint i;
 389         uint length;
 390
 391         ql_dbg(ql_dbg_misc, vha, 0xd207,
 392             "%s: getq(%x) [%lx]\n", __func__, ent->t263.queue_type, *len);
 393         if (ent->t263.queue_type == T263_QUEUE_TYPE_REQ) {
 394                 for (i = 0; i < vha->hw->max_req_queues; i++) {
 395                         struct req_que *req = vha->hw->req_q_map[i];
 396                         if (req || !buf) {
 397                                 length = req ?
 398                                     req->length : REQUEST_ENTRY_CNT_24XX;
 399                                 qla27xx_insert16(i, buf, len);
 400                                 qla27xx_insert16(length, buf, len);
 401                                 qla27xx_insertbuf(req ? req->ring : NULL,
 402                                     length * sizeof(*req->ring), buf, len);
 403                                 count++;
 404                         }
 405                 }
 406         } else if (ent->t263.queue_type == T263_QUEUE_TYPE_RSP) {
 407                 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
 408                         struct rsp_que *rsp = vha->hw->rsp_q_map[i];
 409                         if (rsp || !buf) {
 410                                 length = rsp ?
 411                                     rsp->length : RESPONSE_ENTRY_CNT_MQ;
 412                                 qla27xx_insert16(i, buf, len);
 413                                 qla27xx_insert16(length, buf, len);
 414                                 qla27xx_insertbuf(rsp ? rsp->ring : NULL,
 415                                     length * sizeof(*rsp->ring), buf, len);
 416                                 count++;
 417                         }
 418                 }
 419         } else {
 420                 ql_dbg(ql_dbg_misc, vha, 0xd026,
 421                     "%s: unknown queue %x\n", __func__, ent->t263.queue_type);
 422                 qla27xx_skip_entry(ent, buf);
 423         }
 424
 425         if (buf)
 426                 ent->t263.num_queues = count;
 427
 428         return false;
 429 }
 430
 431 static int
 432 qla27xx_fwdt_entry_t264(struct scsi_qla_host *vha,
 433         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 434 {
 435         ql_dbg(ql_dbg_misc, vha, 0xd208,
 436             "%s: getfce [%lx]\n", __func__, *len);
 437         if (vha->hw->fce) {
 438                 if (buf) {
 439                         ent->t264.fce_trace_size = FCE_SIZE;
 440                         ent->t264.write_pointer = vha->hw->fce_wr;
 441                         ent->t264.base_pointer = vha->hw->fce_dma;
 442                         ent->t264.fce_enable_mb0 = vha->hw->fce_mb[0];
 443                         ent->t264.fce_enable_mb2 = vha->hw->fce_mb[2];
 444                         ent->t264.fce_enable_mb3 = vha->hw->fce_mb[3];
 445                         ent->t264.fce_enable_mb4 = vha->hw->fce_mb[4];
 446                         ent->t264.fce_enable_mb5 = vha->hw->fce_mb[5];
 447                         ent->t264.fce_enable_mb6 = vha->hw->fce_mb[6];
 448                 }
 449                 qla27xx_insertbuf(vha->hw->fce, FCE_SIZE, buf, len);
 450         } else {
 451                 ql_dbg(ql_dbg_misc, vha, 0xd027,
 452                     "%s: missing fce\n", __func__);
 453                 qla27xx_skip_entry(ent, buf);
 454         }
 455
 456         return false;
 457 }
 458
 459 static int
 460 qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha,
 461         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 462 {
 463         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 464
 465         ql_dbg(ql_dbg_misc, vha, 0xd209,
 466             "%s: pause risc [%lx]\n", __func__, *len);
 467         if (buf)
 468                 qla24xx_pause_risc(reg, vha->hw);
 469
 470         return false;
 471 }
 472
 473 static int
 474 qla27xx_fwdt_entry_t266(struct scsi_qla_host *vha,
 475         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 476 {
 477         ql_dbg(ql_dbg_misc, vha, 0xd20a,
 478             "%s: reset risc [%lx]\n", __func__, *len);
 479         if (buf)
 480                 qla24xx_soft_reset(vha->hw);
 481
 482         return false;
 483 }
 484
 485 static int
 486 qla27xx_fwdt_entry_t267(struct scsi_qla_host *vha,
 487         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 488 {
 489         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 490
 491         ql_dbg(ql_dbg_misc, vha, 0xd20b,
 492             "%s: dis intr [%lx]\n", __func__, *len);
 493         qla27xx_write_reg(reg, ent->t267.pci_offset, ent->t267.data, buf);
 494
 495         return false;
 496 }
 497
 498 static int
 499 qla27xx_fwdt_entry_t268(struct scsi_qla_host *vha,
 500         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 501 {
 502         ql_dbg(ql_dbg_misc, vha, 0xd20c,
 503             "%s: gethb(%x) [%lx]\n", __func__, ent->t268.buf_type, *len);
 504         if (ent->t268.buf_type == T268_BUF_TYPE_EXTD_TRACE) {
 505                 if (vha->hw->eft) {
 506                         if (buf) {
 507                                 ent->t268.buf_size = EFT_SIZE;
 508                                 ent->t268.start_addr = vha->hw->eft_dma;
 509                         }
 510                         qla27xx_insertbuf(vha->hw->eft, EFT_SIZE, buf, len);
 511                 } else {
 512                         ql_dbg(ql_dbg_misc, vha, 0xd028,
 513                             "%s: missing eft\n", __func__);
 514                         qla27xx_skip_entry(ent, buf);
 515                 }
 516         } else {
 517                 ql_dbg(ql_dbg_misc, vha, 0xd02b,
 518                     "%s: unknown buffer %x\n", __func__, ent->t268.buf_type);
 519                 qla27xx_skip_entry(ent, buf);
 520         }
 521
 522         return false;
 523 }
 524
 525 static int
 526 qla27xx_fwdt_entry_t269(struct scsi_qla_host *vha,
 527         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 528 {
 529         ql_dbg(ql_dbg_misc, vha, 0xd20d,
 530             "%s: scratch [%lx]\n", __func__, *len);
 531         qla27xx_insert32(0xaaaaaaaa, buf, len);
 532         qla27xx_insert32(0xbbbbbbbb, buf, len);
 533         qla27xx_insert32(0xcccccccc, buf, len);
 534         qla27xx_insert32(0xdddddddd, buf, len);
 535         qla27xx_insert32(*len + sizeof(uint32_t), buf, len);
 536         if (buf)
 537                 ent->t269.scratch_size = 5 * sizeof(uint32_t);
 538
 539         return false;
 540 }
 541
 542 static int
 543 qla27xx_fwdt_entry_t270(struct scsi_qla_host *vha,
 544         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 545 {
 546         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 547         ulong dwords = ent->t270.count;
 548         ulong addr = ent->t270.addr;
 549
 550         ql_dbg(ql_dbg_misc, vha, 0xd20e,
 551             "%s: rdremreg [%lx]\n", __func__, *len);
 552         qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
 553         while (dwords--) {
 554                 qla27xx_write_reg(reg, 0xc0, addr|0x80000000, buf);
 555                 qla27xx_insert32(addr, buf, len);
 556                 qla27xx_read_reg(reg, 0xc4, buf, len);
 557                 addr += sizeof(uint32_t);
 558         }
 559
 560         return false;
 561 }
 562
 563 static int
 564 qla27xx_fwdt_entry_t271(struct scsi_qla_host *vha,
 565         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 566 {
 567         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 568         ulong addr = ent->t271.addr;
 569         ulong data = ent->t271.data;
 570
 571         ql_dbg(ql_dbg_misc, vha, 0xd20f,
 572             "%s: wrremreg [%lx]\n", __func__, *len);
 573         qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
 574         qla27xx_write_reg(reg, 0xc4, data, buf);
 575         qla27xx_write_reg(reg, 0xc0, addr, buf);
 576
 577         return false;
 578 }
 579
 580 static int
 581 qla27xx_fwdt_entry_t272(struct scsi_qla_host *vha,
 582         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 583 {
 584         ulong dwords = ent->t272.count;
 585         ulong start = ent->t272.addr;
 586
 587         ql_dbg(ql_dbg_misc, vha, 0xd210,
 588             "%s: rdremram [%lx]\n", __func__, *len);
 589         if (buf) {
 590                 ql_dbg(ql_dbg_misc, vha, 0xd02c,
 591                     "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords);
 592                 buf += *len;
 593                 qla27xx_dump_mpi_ram(vha->hw, start, buf, dwords, &buf);
 594         }
 595         *len += dwords * sizeof(uint32_t);
 596
 597         return false;
 598 }
 599
 600 static int
 601 qla27xx_fwdt_entry_t273(struct scsi_qla_host *vha,
 602         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 603 {
 604         ulong dwords = ent->t273.count;
 605         ulong addr = ent->t273.addr;
 606         uint32_t value;
 607
 608         ql_dbg(ql_dbg_misc, vha, 0xd211,
 609             "%s: pcicfg [%lx]\n", __func__, *len);
 610         while (dwords--) {
 611                 value = ~0;
 612                 if (pci_read_config_dword(vha->hw->pdev, addr, &value))
 613                         ql_dbg(ql_dbg_misc, vha, 0xd02d,
 614                             "%s: failed pcicfg read at %lx\n", __func__, addr);
 615                 qla27xx_insert32(addr, buf, len);
 616                 qla27xx_insert32(value, buf, len);
 617                 addr += sizeof(uint32_t);
 618         }
 619
 620         return false;
 621 }
 622
 623 static int
 624 qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha,
 625         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 626 {
 627         uint count = 0;
 628         uint i;
 629
 630         ql_dbg(ql_dbg_misc, vha, 0xd212,
 631             "%s: getqsh(%x) [%lx]\n", __func__, ent->t274.queue_type, *len);
 632         if (ent->t274.queue_type == T274_QUEUE_TYPE_REQ_SHAD) {
 633                 for (i = 0; i < vha->hw->max_req_queues; i++) {
 634                         struct req_que *req = vha->hw->req_q_map[i];
 635                         if (req || !buf) {
 636                                 qla27xx_insert16(i, buf, len);
 637                                 qla27xx_insert16(1, buf, len);
 638                                 qla27xx_insert32(req && req->out_ptr ?
 639                                     *req->out_ptr : 0, buf, len);
 640                                 count++;
 641                         }
 642                 }
 643         } else if (ent->t274.queue_type == T274_QUEUE_TYPE_RSP_SHAD) {
 644                 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
 645                         struct rsp_que *rsp = vha->hw->rsp_q_map[i];
 646                         if (rsp || !buf) {
 647                                 qla27xx_insert16(i, buf, len);
 648                                 qla27xx_insert16(1, buf, len);
 649                                 qla27xx_insert32(rsp && rsp->in_ptr ?
 650                                     *rsp->in_ptr : 0, buf, len);
 651                                 count++;
 652                         }
 653                 }
 654         } else {
 655                 ql_dbg(ql_dbg_misc, vha, 0xd02f,
 656                     "%s: unknown queue %x\n", __func__, ent->t274.queue_type);
 657                 qla27xx_skip_entry(ent, buf);
 658         }
 659
 660         if (buf)
 661                 ent->t274.num_queues = count;
 662
 663         if (!count)
 664                 qla27xx_skip_entry(ent, buf);
 665
 666         return false;
 667 }
 668
 669 static int
 670 qla27xx_fwdt_entry_t275(struct scsi_qla_host *vha,
 671         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 672 {
 673         ulong offset = offsetof(typeof(*ent), t275.buffer);
 674
 675         ql_dbg(ql_dbg_misc, vha, 0xd213,
 676             "%s: buffer(%x) [%lx]\n", __func__, ent->t275.length, *len);
 677         if (!ent->t275.length) {
 678                 ql_dbg(ql_dbg_misc, vha, 0xd020,
 679                     "%s: buffer zero length\n", __func__);
 680                 qla27xx_skip_entry(ent, buf);
 681                 goto done;
 682         }
 683         if (offset + ent->t275.length > ent->hdr.entry_size) {
 684                 ql_dbg(ql_dbg_misc, vha, 0xd030,
 685                     "%s: buffer overflow\n", __func__);
 686                 qla27xx_skip_entry(ent, buf);
 687                 goto done;
 688         }
 689
 690         qla27xx_insertbuf(ent->t275.buffer, ent->t275.length, buf, len);
 691 done:
 692         return false;
 693 }
 694
 695 static int
 696 qla27xx_fwdt_entry_other(struct scsi_qla_host *vha,
 697         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 698 {
 699         ql_dbg(ql_dbg_misc, vha, 0xd2ff,
 700             "%s: type %x [%lx]\n", __func__, ent->hdr.entry_type, *len);
 701         qla27xx_skip_entry(ent, buf);
 702
 703         return false;
 704 }
 705
 706 struct qla27xx_fwdt_entry_call {
 707         uint type;
 708         int (*call)(
 709             struct scsi_qla_host *,
 710             struct qla27xx_fwdt_entry *,
 711             void *,
 712             ulong *);
 713 };
 714
 715 static struct qla27xx_fwdt_entry_call ql27xx_fwdt_entry_call_list[] = {
 716         { ENTRY_TYPE_NOP                , qla27xx_fwdt_entry_t0    } ,
 717         { ENTRY_TYPE_TMP_END            , qla27xx_fwdt_entry_t255  } ,
 718         { ENTRY_TYPE_RD_IOB_T1          , qla27xx_fwdt_entry_t256  } ,
 719         { ENTRY_TYPE_WR_IOB_T1          , qla27xx_fwdt_entry_t257  } ,
 720         { ENTRY_TYPE_RD_IOB_T2          , qla27xx_fwdt_entry_t258  } ,
 721         { ENTRY_TYPE_WR_IOB_T2          , qla27xx_fwdt_entry_t259  } ,
 722         { ENTRY_TYPE_RD_PCI             , qla27xx_fwdt_entry_t260  } ,
 723         { ENTRY_TYPE_WR_PCI             , qla27xx_fwdt_entry_t261  } ,
 724         { ENTRY_TYPE_RD_RAM             , qla27xx_fwdt_entry_t262  } ,
 725         { ENTRY_TYPE_GET_QUEUE          , qla27xx_fwdt_entry_t263  } ,
 726         { ENTRY_TYPE_GET_FCE            , qla27xx_fwdt_entry_t264  } ,
 727         { ENTRY_TYPE_PSE_RISC           , qla27xx_fwdt_entry_t265  } ,
 728         { ENTRY_TYPE_RST_RISC           , qla27xx_fwdt_entry_t266  } ,
 729         { ENTRY_TYPE_DIS_INTR           , qla27xx_fwdt_entry_t267  } ,
 730         { ENTRY_TYPE_GET_HBUF           , qla27xx_fwdt_entry_t268  } ,
 731         { ENTRY_TYPE_SCRATCH            , qla27xx_fwdt_entry_t269  } ,
 732         { ENTRY_TYPE_RDREMREG           , qla27xx_fwdt_entry_t270  } ,
 733         { ENTRY_TYPE_WRREMREG           , qla27xx_fwdt_entry_t271  } ,
 734         { ENTRY_TYPE_RDREMRAM           , qla27xx_fwdt_entry_t272  } ,
 735         { ENTRY_TYPE_PCICFG             , qla27xx_fwdt_entry_t273  } ,
 736         { ENTRY_TYPE_GET_SHADOW         , qla27xx_fwdt_entry_t274  } ,
 737         { ENTRY_TYPE_WRITE_BUF          , qla27xx_fwdt_entry_t275  } ,
 738         { -1                            , qla27xx_fwdt_entry_other }
 739 };
 740
 741 static inline int (*qla27xx_find_entry(uint type))
 742         (struct scsi_qla_host *, struct qla27xx_fwdt_entry *, void *, ulong *)
 743 {
 744         struct qla27xx_fwdt_entry_call *list = ql27xx_fwdt_entry_call_list;
 745
 746         while (list->type < type)
 747                 list++;
 748
 749         if (list->type == type)
 750                 return list->call;
 751         return qla27xx_fwdt_entry_other;
 752 }
 753
 754 static inline void *
 755 qla27xx_next_entry(void *p)
 756 {
 757         struct qla27xx_fwdt_entry *ent = p;
 758
 759         return p + ent->hdr.entry_size;
 760 }
 761
 762 static void
 763 qla27xx_walk_template(struct scsi_qla_host *vha,
 764         struct qla27xx_fwdt_template *tmp, void *buf, ulong *len)
 765 {
 766         struct qla27xx_fwdt_entry *ent = (void *)tmp + tmp->entry_offset;
 767         ulong count = tmp->entry_count;
 768
 769         ql_dbg(ql_dbg_misc, vha, 0xd01a,
 770             "%s: entry count %lx\n", __func__, count);
 771         while (count--) {
 772                 if (qla27xx_find_entry(ent->hdr.entry_type)(vha, ent, buf, len))
 773                         break;
 774                 ent = qla27xx_next_entry(ent);
 775         }
 776
 777         if (count)
 778                 ql_dbg(ql_dbg_misc, vha, 0xd018,
 779                     "%s: residual count (%lx)\n", __func__, count);
 780
 781         if (ent->hdr.entry_type != ENTRY_TYPE_TMP_END)
 782                 ql_dbg(ql_dbg_misc, vha, 0xd019,
 783                     "%s: missing end (%lx)\n", __func__, count);
 784
 785         ql_dbg(ql_dbg_misc, vha, 0xd01b,
 786             "%s: len=%lx\n", __func__, *len);
 787 }
 788
 789 static void
 790 qla27xx_time_stamp(struct qla27xx_fwdt_template *tmp)
 791 {
 792         tmp->capture_timestamp = jiffies;
 793 }
 794
 795 static void
 796 qla27xx_driver_info(struct qla27xx_fwdt_template *tmp)
 797 {
 798         uint8_t v[] = { 0, 0, 0, 0, 0, 0 };
 799         int rval = 0;
 800
 801         rval = sscanf(qla2x00_version_str, "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu",
 802             v+0, v+1, v+2, v+3, v+4, v+5);
 803
 804         tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0];
 805         tmp->driver_info[1] = v[5] << 8 | v[4];
 806         tmp->driver_info[2] = 0x12345678;
 807 }
 808
 809 static void
 810 qla27xx_firmware_info(struct qla27xx_fwdt_template *tmp,
 811         struct scsi_qla_host *vha)
 812 {
 813         tmp->firmware_version[0] = vha->hw->fw_major_version;
 814         tmp->firmware_version[1] = vha->hw->fw_minor_version;
 815         tmp->firmware_version[2] = vha->hw->fw_subminor_version;
 816         tmp->firmware_version[3] =
 817             vha->hw->fw_attributes_h << 16 | vha->hw->fw_attributes;
 818         tmp->firmware_version[4] =
 819             vha->hw->fw_attributes_ext[1] << 16 | vha->hw->fw_attributes_ext[0];
 820 }
 821
 822 static void
 823 ql27xx_edit_template(struct scsi_qla_host *vha,
 824         struct qla27xx_fwdt_template *tmp)
 825 {
 826         qla27xx_time_stamp(tmp);
 827         qla27xx_driver_info(tmp);
 828         qla27xx_firmware_info(tmp, vha);
 829 }
 830
 831 static inline uint32_t
 832 qla27xx_template_checksum(void *p, ulong size)
 833 {
 834         uint32_t *buf = p;
 835         uint64_t sum = 0;
 836
 837         size /= sizeof(*buf);
 838
 839         while (size--)
 840                 sum += *buf++;
 841
 842         sum = (sum & 0xffffffff) + (sum >> 32);
 843
 844         return ~sum;
 845 }
 846
 847 static inline int
 848 qla27xx_verify_template_checksum(struct qla27xx_fwdt_template *tmp)
 849 {
 850         return qla27xx_template_checksum(tmp, tmp->template_size) == 0;
 851 }
 852
 853 static inline int
 854 qla27xx_verify_template_header(struct qla27xx_fwdt_template *tmp)
 855 {
 856         return tmp->template_type == TEMPLATE_TYPE_FWDUMP;
 857 }
 858
 859 static void
 860 qla27xx_execute_fwdt_template(struct scsi_qla_host *vha)
 861 {
 862         struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
 863         ulong len;
 864
 865         if (qla27xx_fwdt_template_valid(tmp)) {
 866                 len = tmp->template_size;
 867                 tmp = memcpy(vha->hw->fw_dump, tmp, len);
 868                 ql27xx_edit_template(vha, tmp);
 869                 qla27xx_walk_template(vha, tmp, tmp, &len);
 870                 vha->hw->fw_dump_len = len;
 871                 vha->hw->fw_dumped = 1;
 872         }
 873 }
 874
 875 ulong
 876 qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host *vha)
 877 {
 878         struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
 879         ulong len = 0;
 880
 881         if (qla27xx_fwdt_template_valid(tmp)) {
 882                 len = tmp->template_size;
 883                 qla27xx_walk_template(vha, tmp, NULL, &len);
 884         }
 885
 886         return len;
 887 }
 888
 889 ulong
 890 qla27xx_fwdt_template_size(void *p)
 891 {
 892         struct qla27xx_fwdt_template *tmp = p;
 893
 894         return tmp->template_size;
 895 }
 896
 897 ulong
 898 qla27xx_fwdt_template_default_size(void)
 899 {
 900         return sizeof(ql27xx_fwdt_default_template);
 901 }
 902
 903 const void *
 904 qla27xx_fwdt_template_default(void)
 905 {
 906         return ql27xx_fwdt_default_template;
 907 }
 908
 909 int
 910 qla27xx_fwdt_template_valid(void *p)
 911 {
 912         struct qla27xx_fwdt_template *tmp = p;
 913
 914         if (!qla27xx_verify_template_header(tmp)) {
 915                 ql_log(ql_log_warn, NULL, 0xd01c,
 916                     "%s: template type %x\n", __func__, tmp->template_type);
 917                 return false;
 918         }
 919
 920         if (!qla27xx_verify_template_checksum(tmp)) {
 921                 ql_log(ql_log_warn, NULL, 0xd01d,
 922                     "%s: failed template checksum\n", __func__);
 923                 return false;
 924         }
 925
 926         return true;
 927 }
 928
 929 void
 930 qla27xx_fwdump(scsi_qla_host_t *vha, int hardware_locked)
 931 {
 932         ulong flags = 0;
 933
 934         if (!hardware_locked)
 935                 spin_lock_irqsave(&vha->hw->hardware_lock, flags);
 936
 937         if (!vha->hw->fw_dump)
 938                 ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n");
 939         else if (!vha->hw->fw_dump_template)
 940                 ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n");
 941         else
 942                 qla27xx_execute_fwdt_template(vha);
 943
 944         if (!hardware_locked)
 945                 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
 946 }