2 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
4 * Sun3 DMA additions by Sam Creasey (sammy@sammy.net)
6 * Adapted from mac_scsinew.h:
9 * Cumana Generic NCR5380 driver defines
11 * Copyright 1993, Drew Eckhardt
13 * (Unix and Linux consulting and custom programming)
22 * Int: level 2 autovector
23 * IO: type 1, base 0x00140000, 5 bits phys space: A<4..0>
25 #define IRQ_SUN3_SCSI 2
26 #define IOBASE_SUN3_SCSI 0x00140000
28 #define IOBASE_SUN3_VMESCSI 0xff200000
32 #include <scsi/scsicam.h>
35 #define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI"
37 #define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI"
40 #define NCR5380_implementation_fields /* none */
42 #define NCR5380_local_declare() \
43 struct Scsi_Host *_instance
45 #define NCR5380_setup(instance) \
48 #define NCR5380_read(reg) sun3scsi_read(reg)
49 #define NCR5380_write(reg, value) sun3scsi_write(reg, value)
51 #define NCR5380_queue_command sun3scsi_queue_command
52 #define NCR5380_bus_reset sun3scsi_bus_reset
53 #define NCR5380_abort sun3scsi_abort
54 #define NCR5380_show_info sun3scsi_show_info
55 #define NCR5380_info sun3scsi_info
56 #define NCR5380_dma_xfer_len(i, cmd, phase) \
57 sun3scsi_dma_xfer_len(cmd->SCp.this_residual,cmd,((phase) & SR_IO) ? 0 : 1)
59 #define NCR5380_dma_write_setup(instance, data, count) sun3scsi_dma_setup(data, count, 1)
60 #define NCR5380_dma_read_setup(instance, data, count) sun3scsi_dma_setup(data, count, 0)
61 #define NCR5380_dma_residual sun3scsi_dma_residual
63 /* additional registers - mainly DMA control regs */
64 /* these start at regbase + 8 -- directly after the NCR regs */
65 struct sun3_dma_regs {
66 unsigned short dma_addr_hi; /* vme only */
67 unsigned short dma_addr_lo; /* vme only */
68 unsigned short dma_count_hi; /* vme only */
69 unsigned short dma_count_lo; /* vme only */
70 unsigned short udc_data; /* udc dma data reg (obio only) */
71 unsigned short udc_addr; /* uda dma addr reg (obio only) */
72 unsigned short fifo_data; /* fifo data reg, holds extra byte on
74 unsigned short fifo_count;
75 unsigned short csr; /* control/status reg */
76 unsigned short bpack_hi; /* vme only */
77 unsigned short bpack_lo; /* vme only */
78 unsigned short ivect; /* vme only */
79 unsigned short fifo_count_hi; /* vme only */
82 /* ucd chip specific regs - live in dvma space */
83 struct sun3_udc_regs {
84 unsigned short rsel; /* select regs to load */
85 unsigned short addr_hi; /* high word of addr */
86 unsigned short addr_lo; /* low word */
87 unsigned short count; /* words to be xfer'd */
88 unsigned short mode_hi; /* high word of channel mode */
89 unsigned short mode_lo; /* low word of channel mode */
92 /* addresses of the udc registers */
94 #define UDC_CSR 0x2e /* command/status */
95 #define UDC_CHN_HI 0x26 /* chain high word */
96 #define UDC_CHN_LO 0x22 /* chain lo word */
97 #define UDC_CURA_HI 0x1a /* cur reg A high */
98 #define UDC_CURA_LO 0x0a /* cur reg A low */
99 #define UDC_CURB_HI 0x12 /* cur reg B high */
100 #define UDC_CURB_LO 0x02 /* cur reg B low */
101 #define UDC_MODE_HI 0x56 /* mode reg high */
102 #define UDC_MODE_LO 0x52 /* mode reg low */
103 #define UDC_COUNT 0x32 /* words to xfer */
105 /* some udc commands */
107 #define UDC_CHN_START 0xa0 /* start chain */
108 #define UDC_INT_ENABLE 0x32 /* channel 1 int on */
111 #define UDC_MODE_HIWORD 0x40
112 #define UDC_MODE_LSEND 0xc2
113 #define UDC_MODE_LRECV 0xd2
115 /* udc reg selections */
116 #define UDC_RSEL_SEND 0x282
117 #define UDC_RSEL_RECV 0x182
119 /* bits in csr reg */
120 #define CSR_DMA_ACTIVE 0x8000
121 #define CSR_DMA_CONFLICT 0x4000
122 #define CSR_DMA_BUSERR 0x2000
124 #define CSR_FIFO_EMPTY 0x400 /* fifo flushed? */
125 #define CSR_SDB_INT 0x200 /* sbc interrupt pending */
126 #define CSR_DMA_INT 0x100 /* dma interrupt pending */
128 #define CSR_LEFT 0xc0
129 #define CSR_LEFT_3 0xc0
130 #define CSR_LEFT_2 0x80
131 #define CSR_LEFT_1 0x40
132 #define CSR_PACK_ENABLE 0x20
134 #define CSR_DMA_ENABLE 0x10
136 #define CSR_SEND 0x8 /* 1 = send 0 = recv */
137 #define CSR_FIFO 0x2 /* reset fifo */
138 #define CSR_INTR 0x4 /* interrupt enable */
141 #define VME_DATA24 0x3d00
143 #endif /* SUN3_SCSI_H */