scsi: ufs: fix static checker warning in __ufshcd_setup_clocks
[cascardo/linux.git] / drivers / scsi / ufs / ufshcd.c
1 /*
2  * Universal Flash Storage Host controller driver Core
3  *
4  * This code is based on drivers/scsi/ufs/ufshcd.c
5  * Copyright (C) 2011-2013 Samsung India Software Operations
6  * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
7  *
8  * Authors:
9  *      Santosh Yaraganavi <santosh.sy@samsung.com>
10  *      Vinayak Holikatti <h.vinayak@samsung.com>
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License
14  * as published by the Free Software Foundation; either version 2
15  * of the License, or (at your option) any later version.
16  * See the COPYING file in the top-level directory or visit
17  * <http://www.gnu.org/licenses/gpl-2.0.html>
18  *
19  * This program is distributed in the hope that it will be useful,
20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22  * GNU General Public License for more details.
23  *
24  * This program is provided "AS IS" and "WITH ALL FAULTS" and
25  * without warranty of any kind. You are solely responsible for
26  * determining the appropriateness of using and distributing
27  * the program and assume all risks associated with your exercise
28  * of rights with respect to the program, including but not limited
29  * to infringement of third party rights, the risks and costs of
30  * program errors, damage to or loss of data, programs or equipment,
31  * and unavailability or interruption of operations. Under no
32  * circumstances will the contributor of this Program be liable for
33  * any damages of any kind arising from your use or distribution of
34  * this program.
35  *
36  * The Linux Foundation chooses to take subject only to the GPLv2
37  * license terms, and distributes only under these terms.
38  */
39
40 #include <linux/async.h>
41 #include <linux/devfreq.h>
42
43 #include "ufshcd.h"
44 #include "unipro.h"
45
46 #define UFSHCD_ENABLE_INTRS     (UTP_TRANSFER_REQ_COMPL |\
47                                  UTP_TASK_REQ_COMPL |\
48                                  UFSHCD_ERROR_MASK)
49 /* UIC command timeout, unit: ms */
50 #define UIC_CMD_TIMEOUT 500
51
52 /* NOP OUT retries waiting for NOP IN response */
53 #define NOP_OUT_RETRIES    10
54 /* Timeout after 30 msecs if NOP OUT hangs without response */
55 #define NOP_OUT_TIMEOUT    30 /* msecs */
56
57 /* Query request retries */
58 #define QUERY_REQ_RETRIES 10
59 /* Query request timeout */
60 #define QUERY_REQ_TIMEOUT 30 /* msec */
61
62 /* Task management command timeout */
63 #define TM_CMD_TIMEOUT  100 /* msecs */
64
65 /* maximum number of link-startup retries */
66 #define DME_LINKSTARTUP_RETRIES 3
67
68 /* maximum number of reset retries before giving up */
69 #define MAX_HOST_RESET_RETRIES 5
70
71 /* Expose the flag value from utp_upiu_query.value */
72 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
73
74 /* Interrupt aggregation default timeout, unit: 40us */
75 #define INT_AGGR_DEF_TO 0x02
76
77 #define ufshcd_toggle_vreg(_dev, _vreg, _on)                            \
78         ({                                                              \
79                 int _ret;                                               \
80                 if (_on)                                                \
81                         _ret = ufshcd_enable_vreg(_dev, _vreg);         \
82                 else                                                    \
83                         _ret = ufshcd_disable_vreg(_dev, _vreg);        \
84                 _ret;                                                   \
85         })
86
87 static u32 ufs_query_desc_max_size[] = {
88         QUERY_DESC_DEVICE_MAX_SIZE,
89         QUERY_DESC_CONFIGURAION_MAX_SIZE,
90         QUERY_DESC_UNIT_MAX_SIZE,
91         QUERY_DESC_RFU_MAX_SIZE,
92         QUERY_DESC_INTERCONNECT_MAX_SIZE,
93         QUERY_DESC_STRING_MAX_SIZE,
94         QUERY_DESC_RFU_MAX_SIZE,
95         QUERY_DESC_GEOMETRY_MAZ_SIZE,
96         QUERY_DESC_POWER_MAX_SIZE,
97         QUERY_DESC_RFU_MAX_SIZE,
98 };
99
100 enum {
101         UFSHCD_MAX_CHANNEL      = 0,
102         UFSHCD_MAX_ID           = 1,
103         UFSHCD_CMD_PER_LUN      = 32,
104         UFSHCD_CAN_QUEUE        = 32,
105 };
106
107 /* UFSHCD states */
108 enum {
109         UFSHCD_STATE_RESET,
110         UFSHCD_STATE_ERROR,
111         UFSHCD_STATE_OPERATIONAL,
112 };
113
114 /* UFSHCD error handling flags */
115 enum {
116         UFSHCD_EH_IN_PROGRESS = (1 << 0),
117 };
118
119 /* UFSHCD UIC layer error flags */
120 enum {
121         UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
122         UFSHCD_UIC_NL_ERROR = (1 << 1), /* Network layer error */
123         UFSHCD_UIC_TL_ERROR = (1 << 2), /* Transport Layer error */
124         UFSHCD_UIC_DME_ERROR = (1 << 3), /* DME error */
125 };
126
127 /* Interrupt configuration options */
128 enum {
129         UFSHCD_INT_DISABLE,
130         UFSHCD_INT_ENABLE,
131         UFSHCD_INT_CLEAR,
132 };
133
134 #define ufshcd_set_eh_in_progress(h) \
135         (h->eh_flags |= UFSHCD_EH_IN_PROGRESS)
136 #define ufshcd_eh_in_progress(h) \
137         (h->eh_flags & UFSHCD_EH_IN_PROGRESS)
138 #define ufshcd_clear_eh_in_progress(h) \
139         (h->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
140
141 #define ufshcd_set_ufs_dev_active(h) \
142         ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
143 #define ufshcd_set_ufs_dev_sleep(h) \
144         ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
145 #define ufshcd_set_ufs_dev_poweroff(h) \
146         ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
147 #define ufshcd_is_ufs_dev_active(h) \
148         ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
149 #define ufshcd_is_ufs_dev_sleep(h) \
150         ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
151 #define ufshcd_is_ufs_dev_poweroff(h) \
152         ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
153
154 static struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
155         {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
156         {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
157         {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
158         {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
159         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
160         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
161 };
162
163 static inline enum ufs_dev_pwr_mode
164 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
165 {
166         return ufs_pm_lvl_states[lvl].dev_state;
167 }
168
169 static inline enum uic_link_state
170 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
171 {
172         return ufs_pm_lvl_states[lvl].link_state;
173 }
174
175 static void ufshcd_tmc_handler(struct ufs_hba *hba);
176 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
177 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
178 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
179 static void ufshcd_hba_exit(struct ufs_hba *hba);
180 static int ufshcd_probe_hba(struct ufs_hba *hba);
181 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
182                                  bool skip_ref_clk);
183 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
184 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
185 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
186 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
187 static irqreturn_t ufshcd_intr(int irq, void *__hba);
188 static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
189                 struct ufs_pa_layer_attr *desired_pwr_mode);
190
191 static inline int ufshcd_enable_irq(struct ufs_hba *hba)
192 {
193         int ret = 0;
194
195         if (!hba->is_irq_enabled) {
196                 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
197                                 hba);
198                 if (ret)
199                         dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
200                                 __func__, ret);
201                 hba->is_irq_enabled = true;
202         }
203
204         return ret;
205 }
206
207 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
208 {
209         if (hba->is_irq_enabled) {
210                 free_irq(hba->irq, hba);
211                 hba->is_irq_enabled = false;
212         }
213 }
214
215 /*
216  * ufshcd_wait_for_register - wait for register value to change
217  * @hba - per-adapter interface
218  * @reg - mmio register offset
219  * @mask - mask to apply to read register value
220  * @val - wait condition
221  * @interval_us - polling interval in microsecs
222  * @timeout_ms - timeout in millisecs
223  *
224  * Returns -ETIMEDOUT on error, zero on success
225  */
226 static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
227                 u32 val, unsigned long interval_us, unsigned long timeout_ms)
228 {
229         int err = 0;
230         unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
231
232         /* ignore bits that we don't intend to wait on */
233         val = val & mask;
234
235         while ((ufshcd_readl(hba, reg) & mask) != val) {
236                 /* wakeup within 50us of expiry */
237                 usleep_range(interval_us, interval_us + 50);
238
239                 if (time_after(jiffies, timeout)) {
240                         if ((ufshcd_readl(hba, reg) & mask) != val)
241                                 err = -ETIMEDOUT;
242                         break;
243                 }
244         }
245
246         return err;
247 }
248
249 /**
250  * ufshcd_get_intr_mask - Get the interrupt bit mask
251  * @hba - Pointer to adapter instance
252  *
253  * Returns interrupt bit mask per version
254  */
255 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
256 {
257         if (hba->ufs_version == UFSHCI_VERSION_10)
258                 return INTERRUPT_MASK_ALL_VER_10;
259         else
260                 return INTERRUPT_MASK_ALL_VER_11;
261 }
262
263 /**
264  * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
265  * @hba - Pointer to adapter instance
266  *
267  * Returns UFSHCI version supported by the controller
268  */
269 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
270 {
271         return ufshcd_readl(hba, REG_UFS_VERSION);
272 }
273
274 /**
275  * ufshcd_is_device_present - Check if any device connected to
276  *                            the host controller
277  * @hba: pointer to adapter instance
278  *
279  * Returns 1 if device present, 0 if no device detected
280  */
281 static inline int ufshcd_is_device_present(struct ufs_hba *hba)
282 {
283         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
284                                                 DEVICE_PRESENT) ? 1 : 0;
285 }
286
287 /**
288  * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
289  * @lrb: pointer to local command reference block
290  *
291  * This function is used to get the OCS field from UTRD
292  * Returns the OCS field in the UTRD
293  */
294 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
295 {
296         return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
297 }
298
299 /**
300  * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
301  * @task_req_descp: pointer to utp_task_req_desc structure
302  *
303  * This function is used to get the OCS field from UTMRD
304  * Returns the OCS field in the UTMRD
305  */
306 static inline int
307 ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
308 {
309         return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
310 }
311
312 /**
313  * ufshcd_get_tm_free_slot - get a free slot for task management request
314  * @hba: per adapter instance
315  * @free_slot: pointer to variable with available slot value
316  *
317  * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
318  * Returns 0 if free slot is not available, else return 1 with tag value
319  * in @free_slot.
320  */
321 static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
322 {
323         int tag;
324         bool ret = false;
325
326         if (!free_slot)
327                 goto out;
328
329         do {
330                 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
331                 if (tag >= hba->nutmrs)
332                         goto out;
333         } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
334
335         *free_slot = tag;
336         ret = true;
337 out:
338         return ret;
339 }
340
341 static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
342 {
343         clear_bit_unlock(slot, &hba->tm_slots_in_use);
344 }
345
346 /**
347  * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
348  * @hba: per adapter instance
349  * @pos: position of the bit to be cleared
350  */
351 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
352 {
353         ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
354 }
355
356 /**
357  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
358  * @reg: Register value of host controller status
359  *
360  * Returns integer, 0 on Success and positive value if failed
361  */
362 static inline int ufshcd_get_lists_status(u32 reg)
363 {
364         /*
365          * The mask 0xFF is for the following HCS register bits
366          * Bit          Description
367          *  0           Device Present
368          *  1           UTRLRDY
369          *  2           UTMRLRDY
370          *  3           UCRDY
371          *  4           HEI
372          *  5           DEI
373          * 6-7          reserved
374          */
375         return (((reg) & (0xFF)) >> 1) ^ (0x07);
376 }
377
378 /**
379  * ufshcd_get_uic_cmd_result - Get the UIC command result
380  * @hba: Pointer to adapter instance
381  *
382  * This function gets the result of UIC command completion
383  * Returns 0 on success, non zero value on error
384  */
385 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
386 {
387         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
388                MASK_UIC_COMMAND_RESULT;
389 }
390
391 /**
392  * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
393  * @hba: Pointer to adapter instance
394  *
395  * This function gets UIC command argument3
396  * Returns 0 on success, non zero value on error
397  */
398 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
399 {
400         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
401 }
402
403 /**
404  * ufshcd_get_req_rsp - returns the TR response transaction type
405  * @ucd_rsp_ptr: pointer to response UPIU
406  */
407 static inline int
408 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
409 {
410         return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
411 }
412
413 /**
414  * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
415  * @ucd_rsp_ptr: pointer to response UPIU
416  *
417  * This function gets the response status and scsi_status from response UPIU
418  * Returns the response result code.
419  */
420 static inline int
421 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
422 {
423         return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
424 }
425
426 /*
427  * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
428  *                              from response UPIU
429  * @ucd_rsp_ptr: pointer to response UPIU
430  *
431  * Return the data segment length.
432  */
433 static inline unsigned int
434 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
435 {
436         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
437                 MASK_RSP_UPIU_DATA_SEG_LEN;
438 }
439
440 /**
441  * ufshcd_is_exception_event - Check if the device raised an exception event
442  * @ucd_rsp_ptr: pointer to response UPIU
443  *
444  * The function checks if the device raised an exception event indicated in
445  * the Device Information field of response UPIU.
446  *
447  * Returns true if exception is raised, false otherwise.
448  */
449 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
450 {
451         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
452                         MASK_RSP_EXCEPTION_EVENT ? true : false;
453 }
454
455 /**
456  * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
457  * @hba: per adapter instance
458  */
459 static inline void
460 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
461 {
462         ufshcd_writel(hba, INT_AGGR_ENABLE |
463                       INT_AGGR_COUNTER_AND_TIMER_RESET,
464                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
465 }
466
467 /**
468  * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
469  * @hba: per adapter instance
470  * @cnt: Interrupt aggregation counter threshold
471  * @tmout: Interrupt aggregation timeout value
472  */
473 static inline void
474 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
475 {
476         ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
477                       INT_AGGR_COUNTER_THLD_VAL(cnt) |
478                       INT_AGGR_TIMEOUT_VAL(tmout),
479                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
480 }
481
482 /**
483  * ufshcd_enable_run_stop_reg - Enable run-stop registers,
484  *                      When run-stop registers are set to 1, it indicates the
485  *                      host controller that it can process the requests
486  * @hba: per adapter instance
487  */
488 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
489 {
490         ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
491                       REG_UTP_TASK_REQ_LIST_RUN_STOP);
492         ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
493                       REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
494 }
495
496 /**
497  * ufshcd_hba_start - Start controller initialization sequence
498  * @hba: per adapter instance
499  */
500 static inline void ufshcd_hba_start(struct ufs_hba *hba)
501 {
502         ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
503 }
504
505 /**
506  * ufshcd_is_hba_active - Get controller state
507  * @hba: per adapter instance
508  *
509  * Returns zero if controller is active, 1 otherwise
510  */
511 static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
512 {
513         return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
514 }
515
516 static void ufshcd_ungate_work(struct work_struct *work)
517 {
518         int ret;
519         unsigned long flags;
520         struct ufs_hba *hba = container_of(work, struct ufs_hba,
521                         clk_gating.ungate_work);
522
523         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
524
525         spin_lock_irqsave(hba->host->host_lock, flags);
526         if (hba->clk_gating.state == CLKS_ON) {
527                 spin_unlock_irqrestore(hba->host->host_lock, flags);
528                 goto unblock_reqs;
529         }
530
531         spin_unlock_irqrestore(hba->host->host_lock, flags);
532         ufshcd_setup_clocks(hba, true);
533
534         /* Exit from hibern8 */
535         if (ufshcd_can_hibern8_during_gating(hba)) {
536                 /* Prevent gating in this path */
537                 hba->clk_gating.is_suspended = true;
538                 if (ufshcd_is_link_hibern8(hba)) {
539                         ret = ufshcd_uic_hibern8_exit(hba);
540                         if (ret)
541                                 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
542                                         __func__, ret);
543                         else
544                                 ufshcd_set_link_active(hba);
545                 }
546                 hba->clk_gating.is_suspended = false;
547         }
548 unblock_reqs:
549         if (ufshcd_is_clkscaling_enabled(hba))
550                 devfreq_resume_device(hba->devfreq);
551         scsi_unblock_requests(hba->host);
552 }
553
554 /**
555  * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
556  * Also, exit from hibern8 mode and set the link as active.
557  * @hba: per adapter instance
558  * @async: This indicates whether caller should ungate clocks asynchronously.
559  */
560 int ufshcd_hold(struct ufs_hba *hba, bool async)
561 {
562         int rc = 0;
563         unsigned long flags;
564
565         if (!ufshcd_is_clkgating_allowed(hba))
566                 goto out;
567         spin_lock_irqsave(hba->host->host_lock, flags);
568         hba->clk_gating.active_reqs++;
569
570 start:
571         switch (hba->clk_gating.state) {
572         case CLKS_ON:
573                 break;
574         case REQ_CLKS_OFF:
575                 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
576                         hba->clk_gating.state = CLKS_ON;
577                         break;
578                 }
579                 /*
580                  * If we here, it means gating work is either done or
581                  * currently running. Hence, fall through to cancel gating
582                  * work and to enable clocks.
583                  */
584         case CLKS_OFF:
585                 scsi_block_requests(hba->host);
586                 hba->clk_gating.state = REQ_CLKS_ON;
587                 schedule_work(&hba->clk_gating.ungate_work);
588                 /*
589                  * fall through to check if we should wait for this
590                  * work to be done or not.
591                  */
592         case REQ_CLKS_ON:
593                 if (async) {
594                         rc = -EAGAIN;
595                         hba->clk_gating.active_reqs--;
596                         break;
597                 }
598
599                 spin_unlock_irqrestore(hba->host->host_lock, flags);
600                 flush_work(&hba->clk_gating.ungate_work);
601                 /* Make sure state is CLKS_ON before returning */
602                 spin_lock_irqsave(hba->host->host_lock, flags);
603                 goto start;
604         default:
605                 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
606                                 __func__, hba->clk_gating.state);
607                 break;
608         }
609         spin_unlock_irqrestore(hba->host->host_lock, flags);
610 out:
611         return rc;
612 }
613
614 static void ufshcd_gate_work(struct work_struct *work)
615 {
616         struct ufs_hba *hba = container_of(work, struct ufs_hba,
617                         clk_gating.gate_work.work);
618         unsigned long flags;
619
620         spin_lock_irqsave(hba->host->host_lock, flags);
621         if (hba->clk_gating.is_suspended) {
622                 hba->clk_gating.state = CLKS_ON;
623                 goto rel_lock;
624         }
625
626         if (hba->clk_gating.active_reqs
627                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
628                 || hba->lrb_in_use || hba->outstanding_tasks
629                 || hba->active_uic_cmd || hba->uic_async_done)
630                 goto rel_lock;
631
632         spin_unlock_irqrestore(hba->host->host_lock, flags);
633
634         /* put the link into hibern8 mode before turning off clocks */
635         if (ufshcd_can_hibern8_during_gating(hba)) {
636                 if (ufshcd_uic_hibern8_enter(hba)) {
637                         hba->clk_gating.state = CLKS_ON;
638                         goto out;
639                 }
640                 ufshcd_set_link_hibern8(hba);
641         }
642
643         if (ufshcd_is_clkscaling_enabled(hba)) {
644                 devfreq_suspend_device(hba->devfreq);
645                 hba->clk_scaling.window_start_t = 0;
646         }
647
648         if (!ufshcd_is_link_active(hba))
649                 ufshcd_setup_clocks(hba, false);
650         else
651                 /* If link is active, device ref_clk can't be switched off */
652                 __ufshcd_setup_clocks(hba, false, true);
653
654         /*
655          * In case you are here to cancel this work the gating state
656          * would be marked as REQ_CLKS_ON. In this case keep the state
657          * as REQ_CLKS_ON which would anyway imply that clocks are off
658          * and a request to turn them on is pending. By doing this way,
659          * we keep the state machine in tact and this would ultimately
660          * prevent from doing cancel work multiple times when there are
661          * new requests arriving before the current cancel work is done.
662          */
663         spin_lock_irqsave(hba->host->host_lock, flags);
664         if (hba->clk_gating.state == REQ_CLKS_OFF)
665                 hba->clk_gating.state = CLKS_OFF;
666
667 rel_lock:
668         spin_unlock_irqrestore(hba->host->host_lock, flags);
669 out:
670         return;
671 }
672
673 /* host lock must be held before calling this variant */
674 static void __ufshcd_release(struct ufs_hba *hba)
675 {
676         if (!ufshcd_is_clkgating_allowed(hba))
677                 return;
678
679         hba->clk_gating.active_reqs--;
680
681         if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
682                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
683                 || hba->lrb_in_use || hba->outstanding_tasks
684                 || hba->active_uic_cmd || hba->uic_async_done)
685                 return;
686
687         hba->clk_gating.state = REQ_CLKS_OFF;
688         schedule_delayed_work(&hba->clk_gating.gate_work,
689                         msecs_to_jiffies(hba->clk_gating.delay_ms));
690 }
691
692 void ufshcd_release(struct ufs_hba *hba)
693 {
694         unsigned long flags;
695
696         spin_lock_irqsave(hba->host->host_lock, flags);
697         __ufshcd_release(hba);
698         spin_unlock_irqrestore(hba->host->host_lock, flags);
699 }
700
701 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
702                 struct device_attribute *attr, char *buf)
703 {
704         struct ufs_hba *hba = dev_get_drvdata(dev);
705
706         return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
707 }
708
709 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
710                 struct device_attribute *attr, const char *buf, size_t count)
711 {
712         struct ufs_hba *hba = dev_get_drvdata(dev);
713         unsigned long flags, value;
714
715         if (kstrtoul(buf, 0, &value))
716                 return -EINVAL;
717
718         spin_lock_irqsave(hba->host->host_lock, flags);
719         hba->clk_gating.delay_ms = value;
720         spin_unlock_irqrestore(hba->host->host_lock, flags);
721         return count;
722 }
723
724 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
725 {
726         if (!ufshcd_is_clkgating_allowed(hba))
727                 return;
728
729         hba->clk_gating.delay_ms = 150;
730         INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
731         INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
732
733         hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
734         hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
735         sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
736         hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
737         hba->clk_gating.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
738         if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
739                 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
740 }
741
742 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
743 {
744         if (!ufshcd_is_clkgating_allowed(hba))
745                 return;
746         device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
747 }
748
749 /* Must be called with host lock acquired */
750 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
751 {
752         if (!ufshcd_is_clkscaling_enabled(hba))
753                 return;
754
755         if (!hba->clk_scaling.is_busy_started) {
756                 hba->clk_scaling.busy_start_t = ktime_get();
757                 hba->clk_scaling.is_busy_started = true;
758         }
759 }
760
761 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
762 {
763         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
764
765         if (!ufshcd_is_clkscaling_enabled(hba))
766                 return;
767
768         if (!hba->outstanding_reqs && scaling->is_busy_started) {
769                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
770                                         scaling->busy_start_t));
771                 scaling->busy_start_t = ktime_set(0, 0);
772                 scaling->is_busy_started = false;
773         }
774 }
775 /**
776  * ufshcd_send_command - Send SCSI or device management commands
777  * @hba: per adapter instance
778  * @task_tag: Task tag of the command
779  */
780 static inline
781 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
782 {
783         ufshcd_clk_scaling_start_busy(hba);
784         __set_bit(task_tag, &hba->outstanding_reqs);
785         ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
786 }
787
788 /**
789  * ufshcd_copy_sense_data - Copy sense data in case of check condition
790  * @lrb - pointer to local reference block
791  */
792 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
793 {
794         int len;
795         if (lrbp->sense_buffer &&
796             ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
797                 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
798                 memcpy(lrbp->sense_buffer,
799                         lrbp->ucd_rsp_ptr->sr.sense_data,
800                         min_t(int, len, SCSI_SENSE_BUFFERSIZE));
801         }
802 }
803
804 /**
805  * ufshcd_copy_query_response() - Copy the Query Response and the data
806  * descriptor
807  * @hba: per adapter instance
808  * @lrb - pointer to local reference block
809  */
810 static
811 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
812 {
813         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
814
815         memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
816
817         /* Get the descriptor */
818         if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
819                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
820                                 GENERAL_UPIU_REQUEST_SIZE;
821                 u16 resp_len;
822                 u16 buf_len;
823
824                 /* data segment length */
825                 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
826                                                 MASK_QUERY_DATA_SEG_LEN;
827                 buf_len = be16_to_cpu(
828                                 hba->dev_cmd.query.request.upiu_req.length);
829                 if (likely(buf_len >= resp_len)) {
830                         memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
831                 } else {
832                         dev_warn(hba->dev,
833                                 "%s: Response size is bigger than buffer",
834                                 __func__);
835                         return -EINVAL;
836                 }
837         }
838
839         return 0;
840 }
841
842 /**
843  * ufshcd_hba_capabilities - Read controller capabilities
844  * @hba: per adapter instance
845  */
846 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
847 {
848         hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
849
850         /* nutrs and nutmrs are 0 based values */
851         hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
852         hba->nutmrs =
853         ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
854 }
855
856 /**
857  * ufshcd_ready_for_uic_cmd - Check if controller is ready
858  *                            to accept UIC commands
859  * @hba: per adapter instance
860  * Return true on success, else false
861  */
862 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
863 {
864         if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
865                 return true;
866         else
867                 return false;
868 }
869
870 /**
871  * ufshcd_get_upmcrs - Get the power mode change request status
872  * @hba: Pointer to adapter instance
873  *
874  * This function gets the UPMCRS field of HCS register
875  * Returns value of UPMCRS field
876  */
877 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
878 {
879         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
880 }
881
882 /**
883  * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
884  * @hba: per adapter instance
885  * @uic_cmd: UIC command
886  *
887  * Mutex must be held.
888  */
889 static inline void
890 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
891 {
892         WARN_ON(hba->active_uic_cmd);
893
894         hba->active_uic_cmd = uic_cmd;
895
896         /* Write Args */
897         ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
898         ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
899         ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
900
901         /* Write UIC Cmd */
902         ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
903                       REG_UIC_COMMAND);
904 }
905
906 /**
907  * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
908  * @hba: per adapter instance
909  * @uic_command: UIC command
910  *
911  * Must be called with mutex held.
912  * Returns 0 only if success.
913  */
914 static int
915 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
916 {
917         int ret;
918         unsigned long flags;
919
920         if (wait_for_completion_timeout(&uic_cmd->done,
921                                         msecs_to_jiffies(UIC_CMD_TIMEOUT)))
922                 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
923         else
924                 ret = -ETIMEDOUT;
925
926         spin_lock_irqsave(hba->host->host_lock, flags);
927         hba->active_uic_cmd = NULL;
928         spin_unlock_irqrestore(hba->host->host_lock, flags);
929
930         return ret;
931 }
932
933 /**
934  * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
935  * @hba: per adapter instance
936  * @uic_cmd: UIC command
937  *
938  * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
939  * with mutex held and host_lock locked.
940  * Returns 0 only if success.
941  */
942 static int
943 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
944 {
945         if (!ufshcd_ready_for_uic_cmd(hba)) {
946                 dev_err(hba->dev,
947                         "Controller not ready to accept UIC commands\n");
948                 return -EIO;
949         }
950
951         init_completion(&uic_cmd->done);
952
953         ufshcd_dispatch_uic_cmd(hba, uic_cmd);
954
955         return 0;
956 }
957
958 /**
959  * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
960  * @hba: per adapter instance
961  * @uic_cmd: UIC command
962  *
963  * Returns 0 only if success.
964  */
965 static int
966 ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
967 {
968         int ret;
969         unsigned long flags;
970
971         ufshcd_hold(hba, false);
972         mutex_lock(&hba->uic_cmd_mutex);
973         spin_lock_irqsave(hba->host->host_lock, flags);
974         ret = __ufshcd_send_uic_cmd(hba, uic_cmd);
975         spin_unlock_irqrestore(hba->host->host_lock, flags);
976         if (!ret)
977                 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
978
979         mutex_unlock(&hba->uic_cmd_mutex);
980
981         ufshcd_release(hba);
982         return ret;
983 }
984
985 /**
986  * ufshcd_map_sg - Map scatter-gather list to prdt
987  * @lrbp - pointer to local reference block
988  *
989  * Returns 0 in case of success, non-zero value in case of failure
990  */
991 static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
992 {
993         struct ufshcd_sg_entry *prd_table;
994         struct scatterlist *sg;
995         struct scsi_cmnd *cmd;
996         int sg_segments;
997         int i;
998
999         cmd = lrbp->cmd;
1000         sg_segments = scsi_dma_map(cmd);
1001         if (sg_segments < 0)
1002                 return sg_segments;
1003
1004         if (sg_segments) {
1005                 lrbp->utr_descriptor_ptr->prd_table_length =
1006                                         cpu_to_le16((u16) (sg_segments));
1007
1008                 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
1009
1010                 scsi_for_each_sg(cmd, sg, sg_segments, i) {
1011                         prd_table[i].size  =
1012                                 cpu_to_le32(((u32) sg_dma_len(sg))-1);
1013                         prd_table[i].base_addr =
1014                                 cpu_to_le32(lower_32_bits(sg->dma_address));
1015                         prd_table[i].upper_addr =
1016                                 cpu_to_le32(upper_32_bits(sg->dma_address));
1017                 }
1018         } else {
1019                 lrbp->utr_descriptor_ptr->prd_table_length = 0;
1020         }
1021
1022         return 0;
1023 }
1024
1025 /**
1026  * ufshcd_enable_intr - enable interrupts
1027  * @hba: per adapter instance
1028  * @intrs: interrupt bits
1029  */
1030 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
1031 {
1032         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
1033
1034         if (hba->ufs_version == UFSHCI_VERSION_10) {
1035                 u32 rw;
1036                 rw = set & INTERRUPT_MASK_RW_VER_10;
1037                 set = rw | ((set ^ intrs) & intrs);
1038         } else {
1039                 set |= intrs;
1040         }
1041
1042         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
1043 }
1044
1045 /**
1046  * ufshcd_disable_intr - disable interrupts
1047  * @hba: per adapter instance
1048  * @intrs: interrupt bits
1049  */
1050 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
1051 {
1052         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
1053
1054         if (hba->ufs_version == UFSHCI_VERSION_10) {
1055                 u32 rw;
1056                 rw = (set & INTERRUPT_MASK_RW_VER_10) &
1057                         ~(intrs & INTERRUPT_MASK_RW_VER_10);
1058                 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
1059
1060         } else {
1061                 set &= ~intrs;
1062         }
1063
1064         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
1065 }
1066
1067 /**
1068  * ufshcd_prepare_req_desc_hdr() - Fills the requests header
1069  * descriptor according to request
1070  * @lrbp: pointer to local reference block
1071  * @upiu_flags: flags required in the header
1072  * @cmd_dir: requests data direction
1073  */
1074 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
1075                 u32 *upiu_flags, enum dma_data_direction cmd_dir)
1076 {
1077         struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
1078         u32 data_direction;
1079         u32 dword_0;
1080
1081         if (cmd_dir == DMA_FROM_DEVICE) {
1082                 data_direction = UTP_DEVICE_TO_HOST;
1083                 *upiu_flags = UPIU_CMD_FLAGS_READ;
1084         } else if (cmd_dir == DMA_TO_DEVICE) {
1085                 data_direction = UTP_HOST_TO_DEVICE;
1086                 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
1087         } else {
1088                 data_direction = UTP_NO_DATA_TRANSFER;
1089                 *upiu_flags = UPIU_CMD_FLAGS_NONE;
1090         }
1091
1092         dword_0 = data_direction | (lrbp->command_type
1093                                 << UPIU_COMMAND_TYPE_OFFSET);
1094         if (lrbp->intr_cmd)
1095                 dword_0 |= UTP_REQ_DESC_INT_CMD;
1096
1097         /* Transfer request descriptor header fields */
1098         req_desc->header.dword_0 = cpu_to_le32(dword_0);
1099
1100         /*
1101          * assigning invalid value for command status. Controller
1102          * updates OCS on command completion, with the command
1103          * status
1104          */
1105         req_desc->header.dword_2 =
1106                 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
1107 }
1108
1109 /**
1110  * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
1111  * for scsi commands
1112  * @lrbp - local reference block pointer
1113  * @upiu_flags - flags
1114  */
1115 static
1116 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
1117 {
1118         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
1119
1120         /* command descriptor fields */
1121         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
1122                                 UPIU_TRANSACTION_COMMAND, upiu_flags,
1123                                 lrbp->lun, lrbp->task_tag);
1124         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
1125                                 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
1126
1127         /* Total EHS length and Data segment length will be zero */
1128         ucd_req_ptr->header.dword_2 = 0;
1129
1130         ucd_req_ptr->sc.exp_data_transfer_len =
1131                 cpu_to_be32(lrbp->cmd->sdb.length);
1132
1133         memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd,
1134                 (min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE)));
1135 }
1136
1137 /**
1138  * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
1139  * for query requsts
1140  * @hba: UFS hba
1141  * @lrbp: local reference block pointer
1142  * @upiu_flags: flags
1143  */
1144 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
1145                                 struct ufshcd_lrb *lrbp, u32 upiu_flags)
1146 {
1147         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
1148         struct ufs_query *query = &hba->dev_cmd.query;
1149         u16 len = be16_to_cpu(query->request.upiu_req.length);
1150         u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
1151
1152         /* Query request header */
1153         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
1154                         UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
1155                         lrbp->lun, lrbp->task_tag);
1156         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
1157                         0, query->request.query_func, 0, 0);
1158
1159         /* Data segment length */
1160         ucd_req_ptr->header.dword_2 = UPIU_HEADER_DWORD(
1161                         0, 0, len >> 8, (u8)len);
1162
1163         /* Copy the Query Request buffer as is */
1164         memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
1165                         QUERY_OSF_SIZE);
1166
1167         /* Copy the Descriptor */
1168         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
1169                 memcpy(descp, query->descriptor, len);
1170
1171 }
1172
1173 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
1174 {
1175         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
1176
1177         memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
1178
1179         /* command descriptor fields */
1180         ucd_req_ptr->header.dword_0 =
1181                 UPIU_HEADER_DWORD(
1182                         UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
1183 }
1184
1185 /**
1186  * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
1187  * @hba - per adapter instance
1188  * @lrb - pointer to local reference block
1189  */
1190 static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1191 {
1192         u32 upiu_flags;
1193         int ret = 0;
1194
1195         switch (lrbp->command_type) {
1196         case UTP_CMD_TYPE_SCSI:
1197                 if (likely(lrbp->cmd)) {
1198                         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
1199                                         lrbp->cmd->sc_data_direction);
1200                         ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
1201                 } else {
1202                         ret = -EINVAL;
1203                 }
1204                 break;
1205         case UTP_CMD_TYPE_DEV_MANAGE:
1206                 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
1207                 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
1208                         ufshcd_prepare_utp_query_req_upiu(
1209                                         hba, lrbp, upiu_flags);
1210                 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
1211                         ufshcd_prepare_utp_nop_upiu(lrbp);
1212                 else
1213                         ret = -EINVAL;
1214                 break;
1215         case UTP_CMD_TYPE_UFS:
1216                 /* For UFS native command implementation */
1217                 ret = -ENOTSUPP;
1218                 dev_err(hba->dev, "%s: UFS native command are not supported\n",
1219                         __func__);
1220                 break;
1221         default:
1222                 ret = -ENOTSUPP;
1223                 dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
1224                                 __func__, lrbp->command_type);
1225                 break;
1226         } /* end of switch */
1227
1228         return ret;
1229 }
1230
1231 /*
1232  * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1233  * @scsi_lun: scsi LUN id
1234  *
1235  * Returns UPIU LUN id
1236  */
1237 static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1238 {
1239         if (scsi_is_wlun(scsi_lun))
1240                 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1241                         | UFS_UPIU_WLUN_ID;
1242         else
1243                 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1244 }
1245
1246 /**
1247  * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
1248  * @scsi_lun: UPIU W-LUN id
1249  *
1250  * Returns SCSI W-LUN id
1251  */
1252 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
1253 {
1254         return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
1255 }
1256
1257 /**
1258  * ufshcd_queuecommand - main entry point for SCSI requests
1259  * @cmd: command from SCSI Midlayer
1260  * @done: call back function
1261  *
1262  * Returns 0 for success, non-zero in case of failure
1263  */
1264 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
1265 {
1266         struct ufshcd_lrb *lrbp;
1267         struct ufs_hba *hba;
1268         unsigned long flags;
1269         int tag;
1270         int err = 0;
1271
1272         hba = shost_priv(host);
1273
1274         tag = cmd->request->tag;
1275
1276         spin_lock_irqsave(hba->host->host_lock, flags);
1277         switch (hba->ufshcd_state) {
1278         case UFSHCD_STATE_OPERATIONAL:
1279                 break;
1280         case UFSHCD_STATE_RESET:
1281                 err = SCSI_MLQUEUE_HOST_BUSY;
1282                 goto out_unlock;
1283         case UFSHCD_STATE_ERROR:
1284                 set_host_byte(cmd, DID_ERROR);
1285                 cmd->scsi_done(cmd);
1286                 goto out_unlock;
1287         default:
1288                 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
1289                                 __func__, hba->ufshcd_state);
1290                 set_host_byte(cmd, DID_BAD_TARGET);
1291                 cmd->scsi_done(cmd);
1292                 goto out_unlock;
1293         }
1294         spin_unlock_irqrestore(hba->host->host_lock, flags);
1295
1296         /* acquire the tag to make sure device cmds don't use it */
1297         if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
1298                 /*
1299                  * Dev manage command in progress, requeue the command.
1300                  * Requeuing the command helps in cases where the request *may*
1301                  * find different tag instead of waiting for dev manage command
1302                  * completion.
1303                  */
1304                 err = SCSI_MLQUEUE_HOST_BUSY;
1305                 goto out;
1306         }
1307
1308         err = ufshcd_hold(hba, true);
1309         if (err) {
1310                 err = SCSI_MLQUEUE_HOST_BUSY;
1311                 clear_bit_unlock(tag, &hba->lrb_in_use);
1312                 goto out;
1313         }
1314         WARN_ON(hba->clk_gating.state != CLKS_ON);
1315
1316         lrbp = &hba->lrb[tag];
1317
1318         WARN_ON(lrbp->cmd);
1319         lrbp->cmd = cmd;
1320         lrbp->sense_bufflen = SCSI_SENSE_BUFFERSIZE;
1321         lrbp->sense_buffer = cmd->sense_buffer;
1322         lrbp->task_tag = tag;
1323         lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
1324         lrbp->intr_cmd = false;
1325         lrbp->command_type = UTP_CMD_TYPE_SCSI;
1326
1327         /* form UPIU before issuing the command */
1328         ufshcd_compose_upiu(hba, lrbp);
1329         err = ufshcd_map_sg(lrbp);
1330         if (err) {
1331                 lrbp->cmd = NULL;
1332                 clear_bit_unlock(tag, &hba->lrb_in_use);
1333                 goto out;
1334         }
1335
1336         /* issue command to the controller */
1337         spin_lock_irqsave(hba->host->host_lock, flags);
1338         ufshcd_send_command(hba, tag);
1339 out_unlock:
1340         spin_unlock_irqrestore(hba->host->host_lock, flags);
1341 out:
1342         return err;
1343 }
1344
1345 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
1346                 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
1347 {
1348         lrbp->cmd = NULL;
1349         lrbp->sense_bufflen = 0;
1350         lrbp->sense_buffer = NULL;
1351         lrbp->task_tag = tag;
1352         lrbp->lun = 0; /* device management cmd is not specific to any LUN */
1353         lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
1354         lrbp->intr_cmd = true; /* No interrupt aggregation */
1355         hba->dev_cmd.type = cmd_type;
1356
1357         return ufshcd_compose_upiu(hba, lrbp);
1358 }
1359
1360 static int
1361 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
1362 {
1363         int err = 0;
1364         unsigned long flags;
1365         u32 mask = 1 << tag;
1366
1367         /* clear outstanding transaction before retry */
1368         spin_lock_irqsave(hba->host->host_lock, flags);
1369         ufshcd_utrl_clear(hba, tag);
1370         spin_unlock_irqrestore(hba->host->host_lock, flags);
1371
1372         /*
1373          * wait for for h/w to clear corresponding bit in door-bell.
1374          * max. wait is 1 sec.
1375          */
1376         err = ufshcd_wait_for_register(hba,
1377                         REG_UTP_TRANSFER_REQ_DOOR_BELL,
1378                         mask, ~mask, 1000, 1000);
1379
1380         return err;
1381 }
1382
1383 static int
1384 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1385 {
1386         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1387
1388         /* Get the UPIU response */
1389         query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
1390                                 UPIU_RSP_CODE_OFFSET;
1391         return query_res->response;
1392 }
1393
1394 /**
1395  * ufshcd_dev_cmd_completion() - handles device management command responses
1396  * @hba: per adapter instance
1397  * @lrbp: pointer to local reference block
1398  */
1399 static int
1400 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1401 {
1402         int resp;
1403         int err = 0;
1404
1405         resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
1406
1407         switch (resp) {
1408         case UPIU_TRANSACTION_NOP_IN:
1409                 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
1410                         err = -EINVAL;
1411                         dev_err(hba->dev, "%s: unexpected response %x\n",
1412                                         __func__, resp);
1413                 }
1414                 break;
1415         case UPIU_TRANSACTION_QUERY_RSP:
1416                 err = ufshcd_check_query_response(hba, lrbp);
1417                 if (!err)
1418                         err = ufshcd_copy_query_response(hba, lrbp);
1419                 break;
1420         case UPIU_TRANSACTION_REJECT_UPIU:
1421                 /* TODO: handle Reject UPIU Response */
1422                 err = -EPERM;
1423                 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
1424                                 __func__);
1425                 break;
1426         default:
1427                 err = -EINVAL;
1428                 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
1429                                 __func__, resp);
1430                 break;
1431         }
1432
1433         return err;
1434 }
1435
1436 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
1437                 struct ufshcd_lrb *lrbp, int max_timeout)
1438 {
1439         int err = 0;
1440         unsigned long time_left;
1441         unsigned long flags;
1442
1443         time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
1444                         msecs_to_jiffies(max_timeout));
1445
1446         spin_lock_irqsave(hba->host->host_lock, flags);
1447         hba->dev_cmd.complete = NULL;
1448         if (likely(time_left)) {
1449                 err = ufshcd_get_tr_ocs(lrbp);
1450                 if (!err)
1451                         err = ufshcd_dev_cmd_completion(hba, lrbp);
1452         }
1453         spin_unlock_irqrestore(hba->host->host_lock, flags);
1454
1455         if (!time_left) {
1456                 err = -ETIMEDOUT;
1457                 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
1458                         /* sucessfully cleared the command, retry if needed */
1459                         err = -EAGAIN;
1460         }
1461
1462         return err;
1463 }
1464
1465 /**
1466  * ufshcd_get_dev_cmd_tag - Get device management command tag
1467  * @hba: per-adapter instance
1468  * @tag: pointer to variable with available slot value
1469  *
1470  * Get a free slot and lock it until device management command
1471  * completes.
1472  *
1473  * Returns false if free slot is unavailable for locking, else
1474  * return true with tag value in @tag.
1475  */
1476 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
1477 {
1478         int tag;
1479         bool ret = false;
1480         unsigned long tmp;
1481
1482         if (!tag_out)
1483                 goto out;
1484
1485         do {
1486                 tmp = ~hba->lrb_in_use;
1487                 tag = find_last_bit(&tmp, hba->nutrs);
1488                 if (tag >= hba->nutrs)
1489                         goto out;
1490         } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
1491
1492         *tag_out = tag;
1493         ret = true;
1494 out:
1495         return ret;
1496 }
1497
1498 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
1499 {
1500         clear_bit_unlock(tag, &hba->lrb_in_use);
1501 }
1502
1503 /**
1504  * ufshcd_exec_dev_cmd - API for sending device management requests
1505  * @hba - UFS hba
1506  * @cmd_type - specifies the type (NOP, Query...)
1507  * @timeout - time in seconds
1508  *
1509  * NOTE: Since there is only one available tag for device management commands,
1510  * it is expected you hold the hba->dev_cmd.lock mutex.
1511  */
1512 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
1513                 enum dev_cmd_type cmd_type, int timeout)
1514 {
1515         struct ufshcd_lrb *lrbp;
1516         int err;
1517         int tag;
1518         struct completion wait;
1519         unsigned long flags;
1520
1521         /*
1522          * Get free slot, sleep if slots are unavailable.
1523          * Even though we use wait_event() which sleeps indefinitely,
1524          * the maximum wait time is bounded by SCSI request timeout.
1525          */
1526         wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
1527
1528         init_completion(&wait);
1529         lrbp = &hba->lrb[tag];
1530         WARN_ON(lrbp->cmd);
1531         err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
1532         if (unlikely(err))
1533                 goto out_put_tag;
1534
1535         hba->dev_cmd.complete = &wait;
1536
1537         spin_lock_irqsave(hba->host->host_lock, flags);
1538         ufshcd_send_command(hba, tag);
1539         spin_unlock_irqrestore(hba->host->host_lock, flags);
1540
1541         err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
1542
1543 out_put_tag:
1544         ufshcd_put_dev_cmd_tag(hba, tag);
1545         wake_up(&hba->dev_cmd.tag_wq);
1546         return err;
1547 }
1548
1549 /**
1550  * ufshcd_init_query() - init the query response and request parameters
1551  * @hba: per-adapter instance
1552  * @request: address of the request pointer to be initialized
1553  * @response: address of the response pointer to be initialized
1554  * @opcode: operation to perform
1555  * @idn: flag idn to access
1556  * @index: LU number to access
1557  * @selector: query/flag/descriptor further identification
1558  */
1559 static inline void ufshcd_init_query(struct ufs_hba *hba,
1560                 struct ufs_query_req **request, struct ufs_query_res **response,
1561                 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
1562 {
1563         *request = &hba->dev_cmd.query.request;
1564         *response = &hba->dev_cmd.query.response;
1565         memset(*request, 0, sizeof(struct ufs_query_req));
1566         memset(*response, 0, sizeof(struct ufs_query_res));
1567         (*request)->upiu_req.opcode = opcode;
1568         (*request)->upiu_req.idn = idn;
1569         (*request)->upiu_req.index = index;
1570         (*request)->upiu_req.selector = selector;
1571 }
1572
1573 /**
1574  * ufshcd_query_flag() - API function for sending flag query requests
1575  * hba: per-adapter instance
1576  * query_opcode: flag query to perform
1577  * idn: flag idn to access
1578  * flag_res: the flag value after the query request completes
1579  *
1580  * Returns 0 for success, non-zero in case of failure
1581  */
1582 static int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
1583                         enum flag_idn idn, bool *flag_res)
1584 {
1585         struct ufs_query_req *request = NULL;
1586         struct ufs_query_res *response = NULL;
1587         int err, index = 0, selector = 0;
1588
1589         BUG_ON(!hba);
1590
1591         ufshcd_hold(hba, false);
1592         mutex_lock(&hba->dev_cmd.lock);
1593         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
1594                         selector);
1595
1596         switch (opcode) {
1597         case UPIU_QUERY_OPCODE_SET_FLAG:
1598         case UPIU_QUERY_OPCODE_CLEAR_FLAG:
1599         case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
1600                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
1601                 break;
1602         case UPIU_QUERY_OPCODE_READ_FLAG:
1603                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
1604                 if (!flag_res) {
1605                         /* No dummy reads */
1606                         dev_err(hba->dev, "%s: Invalid argument for read request\n",
1607                                         __func__);
1608                         err = -EINVAL;
1609                         goto out_unlock;
1610                 }
1611                 break;
1612         default:
1613                 dev_err(hba->dev,
1614                         "%s: Expected query flag opcode but got = %d\n",
1615                         __func__, opcode);
1616                 err = -EINVAL;
1617                 goto out_unlock;
1618         }
1619
1620         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
1621
1622         if (err) {
1623                 dev_err(hba->dev,
1624                         "%s: Sending flag query for idn %d failed, err = %d\n",
1625                         __func__, idn, err);
1626                 goto out_unlock;
1627         }
1628
1629         if (flag_res)
1630                 *flag_res = (be32_to_cpu(response->upiu_res.value) &
1631                                 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
1632
1633 out_unlock:
1634         mutex_unlock(&hba->dev_cmd.lock);
1635         ufshcd_release(hba);
1636         return err;
1637 }
1638
1639 /**
1640  * ufshcd_query_attr - API function for sending attribute requests
1641  * hba: per-adapter instance
1642  * opcode: attribute opcode
1643  * idn: attribute idn to access
1644  * index: index field
1645  * selector: selector field
1646  * attr_val: the attribute value after the query request completes
1647  *
1648  * Returns 0 for success, non-zero in case of failure
1649 */
1650 static int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
1651                         enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
1652 {
1653         struct ufs_query_req *request = NULL;
1654         struct ufs_query_res *response = NULL;
1655         int err;
1656
1657         BUG_ON(!hba);
1658
1659         ufshcd_hold(hba, false);
1660         if (!attr_val) {
1661                 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
1662                                 __func__, opcode);
1663                 err = -EINVAL;
1664                 goto out;
1665         }
1666
1667         mutex_lock(&hba->dev_cmd.lock);
1668         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
1669                         selector);
1670
1671         switch (opcode) {
1672         case UPIU_QUERY_OPCODE_WRITE_ATTR:
1673                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
1674                 request->upiu_req.value = cpu_to_be32(*attr_val);
1675                 break;
1676         case UPIU_QUERY_OPCODE_READ_ATTR:
1677                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
1678                 break;
1679         default:
1680                 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
1681                                 __func__, opcode);
1682                 err = -EINVAL;
1683                 goto out_unlock;
1684         }
1685
1686         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
1687
1688         if (err) {
1689                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
1690                                 __func__, opcode, idn, err);
1691                 goto out_unlock;
1692         }
1693
1694         *attr_val = be32_to_cpu(response->upiu_res.value);
1695
1696 out_unlock:
1697         mutex_unlock(&hba->dev_cmd.lock);
1698 out:
1699         ufshcd_release(hba);
1700         return err;
1701 }
1702
1703 /**
1704  * ufshcd_query_descriptor - API function for sending descriptor requests
1705  * hba: per-adapter instance
1706  * opcode: attribute opcode
1707  * idn: attribute idn to access
1708  * index: index field
1709  * selector: selector field
1710  * desc_buf: the buffer that contains the descriptor
1711  * buf_len: length parameter passed to the device
1712  *
1713  * Returns 0 for success, non-zero in case of failure.
1714  * The buf_len parameter will contain, on return, the length parameter
1715  * received on the response.
1716  */
1717 static int ufshcd_query_descriptor(struct ufs_hba *hba,
1718                         enum query_opcode opcode, enum desc_idn idn, u8 index,
1719                         u8 selector, u8 *desc_buf, int *buf_len)
1720 {
1721         struct ufs_query_req *request = NULL;
1722         struct ufs_query_res *response = NULL;
1723         int err;
1724
1725         BUG_ON(!hba);
1726
1727         ufshcd_hold(hba, false);
1728         if (!desc_buf) {
1729                 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
1730                                 __func__, opcode);
1731                 err = -EINVAL;
1732                 goto out;
1733         }
1734
1735         if (*buf_len <= QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
1736                 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
1737                                 __func__, *buf_len);
1738                 err = -EINVAL;
1739                 goto out;
1740         }
1741
1742         mutex_lock(&hba->dev_cmd.lock);
1743         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
1744                         selector);
1745         hba->dev_cmd.query.descriptor = desc_buf;
1746         request->upiu_req.length = cpu_to_be16(*buf_len);
1747
1748         switch (opcode) {
1749         case UPIU_QUERY_OPCODE_WRITE_DESC:
1750                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
1751                 break;
1752         case UPIU_QUERY_OPCODE_READ_DESC:
1753                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
1754                 break;
1755         default:
1756                 dev_err(hba->dev,
1757                                 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
1758                                 __func__, opcode);
1759                 err = -EINVAL;
1760                 goto out_unlock;
1761         }
1762
1763         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
1764
1765         if (err) {
1766                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
1767                                 __func__, opcode, idn, err);
1768                 goto out_unlock;
1769         }
1770
1771         hba->dev_cmd.query.descriptor = NULL;
1772         *buf_len = be16_to_cpu(response->upiu_res.length);
1773
1774 out_unlock:
1775         mutex_unlock(&hba->dev_cmd.lock);
1776 out:
1777         ufshcd_release(hba);
1778         return err;
1779 }
1780
1781 /**
1782  * ufshcd_read_desc_param - read the specified descriptor parameter
1783  * @hba: Pointer to adapter instance
1784  * @desc_id: descriptor idn value
1785  * @desc_index: descriptor index
1786  * @param_offset: offset of the parameter to read
1787  * @param_read_buf: pointer to buffer where parameter would be read
1788  * @param_size: sizeof(param_read_buf)
1789  *
1790  * Return 0 in case of success, non-zero otherwise
1791  */
1792 static int ufshcd_read_desc_param(struct ufs_hba *hba,
1793                                   enum desc_idn desc_id,
1794                                   int desc_index,
1795                                   u32 param_offset,
1796                                   u8 *param_read_buf,
1797                                   u32 param_size)
1798 {
1799         int ret;
1800         u8 *desc_buf;
1801         u32 buff_len;
1802         bool is_kmalloc = true;
1803
1804         /* safety checks */
1805         if (desc_id >= QUERY_DESC_IDN_MAX)
1806                 return -EINVAL;
1807
1808         buff_len = ufs_query_desc_max_size[desc_id];
1809         if ((param_offset + param_size) > buff_len)
1810                 return -EINVAL;
1811
1812         if (!param_offset && (param_size == buff_len)) {
1813                 /* memory space already available to hold full descriptor */
1814                 desc_buf = param_read_buf;
1815                 is_kmalloc = false;
1816         } else {
1817                 /* allocate memory to hold full descriptor */
1818                 desc_buf = kmalloc(buff_len, GFP_KERNEL);
1819                 if (!desc_buf)
1820                         return -ENOMEM;
1821         }
1822
1823         ret = ufshcd_query_descriptor(hba, UPIU_QUERY_OPCODE_READ_DESC,
1824                                       desc_id, desc_index, 0, desc_buf,
1825                                       &buff_len);
1826
1827         if (ret || (buff_len < ufs_query_desc_max_size[desc_id]) ||
1828             (desc_buf[QUERY_DESC_LENGTH_OFFSET] !=
1829              ufs_query_desc_max_size[desc_id])
1830             || (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id)) {
1831                 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d param_offset %d buff_len %d ret %d",
1832                         __func__, desc_id, param_offset, buff_len, ret);
1833                 if (!ret)
1834                         ret = -EINVAL;
1835
1836                 goto out;
1837         }
1838
1839         if (is_kmalloc)
1840                 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
1841 out:
1842         if (is_kmalloc)
1843                 kfree(desc_buf);
1844         return ret;
1845 }
1846
1847 static inline int ufshcd_read_desc(struct ufs_hba *hba,
1848                                    enum desc_idn desc_id,
1849                                    int desc_index,
1850                                    u8 *buf,
1851                                    u32 size)
1852 {
1853         return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
1854 }
1855
1856 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
1857                                          u8 *buf,
1858                                          u32 size)
1859 {
1860         return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
1861 }
1862
1863 /**
1864  * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
1865  * @hba: Pointer to adapter instance
1866  * @lun: lun id
1867  * @param_offset: offset of the parameter to read
1868  * @param_read_buf: pointer to buffer where parameter would be read
1869  * @param_size: sizeof(param_read_buf)
1870  *
1871  * Return 0 in case of success, non-zero otherwise
1872  */
1873 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
1874                                               int lun,
1875                                               enum unit_desc_param param_offset,
1876                                               u8 *param_read_buf,
1877                                               u32 param_size)
1878 {
1879         /*
1880          * Unit descriptors are only available for general purpose LUs (LUN id
1881          * from 0 to 7) and RPMB Well known LU.
1882          */
1883         if (lun != UFS_UPIU_RPMB_WLUN && (lun >= UFS_UPIU_MAX_GENERAL_LUN))
1884                 return -EOPNOTSUPP;
1885
1886         return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
1887                                       param_offset, param_read_buf, param_size);
1888 }
1889
1890 /**
1891  * ufshcd_memory_alloc - allocate memory for host memory space data structures
1892  * @hba: per adapter instance
1893  *
1894  * 1. Allocate DMA memory for Command Descriptor array
1895  *      Each command descriptor consist of Command UPIU, Response UPIU and PRDT
1896  * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
1897  * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
1898  *      (UTMRDL)
1899  * 4. Allocate memory for local reference block(lrb).
1900  *
1901  * Returns 0 for success, non-zero in case of failure
1902  */
1903 static int ufshcd_memory_alloc(struct ufs_hba *hba)
1904 {
1905         size_t utmrdl_size, utrdl_size, ucdl_size;
1906
1907         /* Allocate memory for UTP command descriptors */
1908         ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
1909         hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
1910                                                   ucdl_size,
1911                                                   &hba->ucdl_dma_addr,
1912                                                   GFP_KERNEL);
1913
1914         /*
1915          * UFSHCI requires UTP command descriptor to be 128 byte aligned.
1916          * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
1917          * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
1918          * be aligned to 128 bytes as well
1919          */
1920         if (!hba->ucdl_base_addr ||
1921             WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
1922                 dev_err(hba->dev,
1923                         "Command Descriptor Memory allocation failed\n");
1924                 goto out;
1925         }
1926
1927         /*
1928          * Allocate memory for UTP Transfer descriptors
1929          * UFSHCI requires 1024 byte alignment of UTRD
1930          */
1931         utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
1932         hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
1933                                                    utrdl_size,
1934                                                    &hba->utrdl_dma_addr,
1935                                                    GFP_KERNEL);
1936         if (!hba->utrdl_base_addr ||
1937             WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
1938                 dev_err(hba->dev,
1939                         "Transfer Descriptor Memory allocation failed\n");
1940                 goto out;
1941         }
1942
1943         /*
1944          * Allocate memory for UTP Task Management descriptors
1945          * UFSHCI requires 1024 byte alignment of UTMRD
1946          */
1947         utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
1948         hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
1949                                                     utmrdl_size,
1950                                                     &hba->utmrdl_dma_addr,
1951                                                     GFP_KERNEL);
1952         if (!hba->utmrdl_base_addr ||
1953             WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
1954                 dev_err(hba->dev,
1955                 "Task Management Descriptor Memory allocation failed\n");
1956                 goto out;
1957         }
1958
1959         /* Allocate memory for local reference block */
1960         hba->lrb = devm_kzalloc(hba->dev,
1961                                 hba->nutrs * sizeof(struct ufshcd_lrb),
1962                                 GFP_KERNEL);
1963         if (!hba->lrb) {
1964                 dev_err(hba->dev, "LRB Memory allocation failed\n");
1965                 goto out;
1966         }
1967         return 0;
1968 out:
1969         return -ENOMEM;
1970 }
1971
1972 /**
1973  * ufshcd_host_memory_configure - configure local reference block with
1974  *                              memory offsets
1975  * @hba: per adapter instance
1976  *
1977  * Configure Host memory space
1978  * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
1979  * address.
1980  * 2. Update each UTRD with Response UPIU offset, Response UPIU length
1981  * and PRDT offset.
1982  * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
1983  * into local reference block.
1984  */
1985 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
1986 {
1987         struct utp_transfer_cmd_desc *cmd_descp;
1988         struct utp_transfer_req_desc *utrdlp;
1989         dma_addr_t cmd_desc_dma_addr;
1990         dma_addr_t cmd_desc_element_addr;
1991         u16 response_offset;
1992         u16 prdt_offset;
1993         int cmd_desc_size;
1994         int i;
1995
1996         utrdlp = hba->utrdl_base_addr;
1997         cmd_descp = hba->ucdl_base_addr;
1998
1999         response_offset =
2000                 offsetof(struct utp_transfer_cmd_desc, response_upiu);
2001         prdt_offset =
2002                 offsetof(struct utp_transfer_cmd_desc, prd_table);
2003
2004         cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
2005         cmd_desc_dma_addr = hba->ucdl_dma_addr;
2006
2007         for (i = 0; i < hba->nutrs; i++) {
2008                 /* Configure UTRD with command descriptor base address */
2009                 cmd_desc_element_addr =
2010                                 (cmd_desc_dma_addr + (cmd_desc_size * i));
2011                 utrdlp[i].command_desc_base_addr_lo =
2012                                 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
2013                 utrdlp[i].command_desc_base_addr_hi =
2014                                 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
2015
2016                 /* Response upiu and prdt offset should be in double words */
2017                 utrdlp[i].response_upiu_offset =
2018                                 cpu_to_le16((response_offset >> 2));
2019                 utrdlp[i].prd_table_offset =
2020                                 cpu_to_le16((prdt_offset >> 2));
2021                 utrdlp[i].response_upiu_length =
2022                                 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
2023
2024                 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
2025                 hba->lrb[i].ucd_req_ptr =
2026                         (struct utp_upiu_req *)(cmd_descp + i);
2027                 hba->lrb[i].ucd_rsp_ptr =
2028                         (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2029                 hba->lrb[i].ucd_prdt_ptr =
2030                         (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2031         }
2032 }
2033
2034 /**
2035  * ufshcd_dme_link_startup - Notify Unipro to perform link startup
2036  * @hba: per adapter instance
2037  *
2038  * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
2039  * in order to initialize the Unipro link startup procedure.
2040  * Once the Unipro links are up, the device connected to the controller
2041  * is detected.
2042  *
2043  * Returns 0 on success, non-zero value on failure
2044  */
2045 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
2046 {
2047         struct uic_command uic_cmd = {0};
2048         int ret;
2049
2050         uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
2051
2052         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
2053         if (ret)
2054                 dev_err(hba->dev,
2055                         "dme-link-startup: error code %d\n", ret);
2056         return ret;
2057 }
2058
2059 /**
2060  * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
2061  * @hba: per adapter instance
2062  * @attr_sel: uic command argument1
2063  * @attr_set: attribute set type as uic command argument2
2064  * @mib_val: setting value as uic command argument3
2065  * @peer: indicate whether peer or local
2066  *
2067  * Returns 0 on success, non-zero value on failure
2068  */
2069 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
2070                         u8 attr_set, u32 mib_val, u8 peer)
2071 {
2072         struct uic_command uic_cmd = {0};
2073         static const char *const action[] = {
2074                 "dme-set",
2075                 "dme-peer-set"
2076         };
2077         const char *set = action[!!peer];
2078         int ret;
2079
2080         uic_cmd.command = peer ?
2081                 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
2082         uic_cmd.argument1 = attr_sel;
2083         uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
2084         uic_cmd.argument3 = mib_val;
2085
2086         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
2087         if (ret)
2088                 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
2089                         set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
2090
2091         return ret;
2092 }
2093 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
2094
2095 /**
2096  * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
2097  * @hba: per adapter instance
2098  * @attr_sel: uic command argument1
2099  * @mib_val: the value of the attribute as returned by the UIC command
2100  * @peer: indicate whether peer or local
2101  *
2102  * Returns 0 on success, non-zero value on failure
2103  */
2104 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
2105                         u32 *mib_val, u8 peer)
2106 {
2107         struct uic_command uic_cmd = {0};
2108         static const char *const action[] = {
2109                 "dme-get",
2110                 "dme-peer-get"
2111         };
2112         const char *get = action[!!peer];
2113         int ret;
2114
2115         uic_cmd.command = peer ?
2116                 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
2117         uic_cmd.argument1 = attr_sel;
2118
2119         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
2120         if (ret) {
2121                 dev_err(hba->dev, "%s: attr-id 0x%x error code %d\n",
2122                         get, UIC_GET_ATTR_ID(attr_sel), ret);
2123                 goto out;
2124         }
2125
2126         if (mib_val)
2127                 *mib_val = uic_cmd.argument3;
2128 out:
2129         return ret;
2130 }
2131 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
2132
2133 /**
2134  * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
2135  * state) and waits for it to take effect.
2136  *
2137  * @hba: per adapter instance
2138  * @cmd: UIC command to execute
2139  *
2140  * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
2141  * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
2142  * and device UniPro link and hence it's final completion would be indicated by
2143  * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
2144  * addition to normal UIC command completion Status (UCCS). This function only
2145  * returns after the relevant status bits indicate the completion.
2146  *
2147  * Returns 0 on success, non-zero value on failure
2148  */
2149 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
2150 {
2151         struct completion uic_async_done;
2152         unsigned long flags;
2153         u8 status;
2154         int ret;
2155
2156         mutex_lock(&hba->uic_cmd_mutex);
2157         init_completion(&uic_async_done);
2158
2159         spin_lock_irqsave(hba->host->host_lock, flags);
2160         hba->uic_async_done = &uic_async_done;
2161         ret = __ufshcd_send_uic_cmd(hba, cmd);
2162         spin_unlock_irqrestore(hba->host->host_lock, flags);
2163         if (ret) {
2164                 dev_err(hba->dev,
2165                         "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
2166                         cmd->command, cmd->argument3, ret);
2167                 goto out;
2168         }
2169         ret = ufshcd_wait_for_uic_cmd(hba, cmd);
2170         if (ret) {
2171                 dev_err(hba->dev,
2172                         "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
2173                         cmd->command, cmd->argument3, ret);
2174                 goto out;
2175         }
2176
2177         if (!wait_for_completion_timeout(hba->uic_async_done,
2178                                          msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
2179                 dev_err(hba->dev,
2180                         "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
2181                         cmd->command, cmd->argument3);
2182                 ret = -ETIMEDOUT;
2183                 goto out;
2184         }
2185
2186         status = ufshcd_get_upmcrs(hba);
2187         if (status != PWR_LOCAL) {
2188                 dev_err(hba->dev,
2189                         "pwr ctrl cmd 0x%0x failed, host umpcrs:0x%x\n",
2190                         cmd->command, status);
2191                 ret = (status != PWR_OK) ? status : -1;
2192         }
2193 out:
2194         spin_lock_irqsave(hba->host->host_lock, flags);
2195         hba->uic_async_done = NULL;
2196         spin_unlock_irqrestore(hba->host->host_lock, flags);
2197         mutex_unlock(&hba->uic_cmd_mutex);
2198
2199         return ret;
2200 }
2201
2202 /**
2203  * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
2204  *                              using DME_SET primitives.
2205  * @hba: per adapter instance
2206  * @mode: powr mode value
2207  *
2208  * Returns 0 on success, non-zero value on failure
2209  */
2210 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
2211 {
2212         struct uic_command uic_cmd = {0};
2213         int ret;
2214
2215         uic_cmd.command = UIC_CMD_DME_SET;
2216         uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
2217         uic_cmd.argument3 = mode;
2218         ufshcd_hold(hba, false);
2219         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
2220         ufshcd_release(hba);
2221
2222         return ret;
2223 }
2224
2225 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
2226 {
2227         struct uic_command uic_cmd = {0};
2228
2229         uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
2230
2231         return ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
2232 }
2233
2234 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
2235 {
2236         struct uic_command uic_cmd = {0};
2237         int ret;
2238
2239         uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
2240         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
2241         if (ret) {
2242                 ufshcd_set_link_off(hba);
2243                 ret = ufshcd_host_reset_and_restore(hba);
2244         }
2245
2246         return ret;
2247 }
2248
2249  /**
2250  * ufshcd_init_pwr_info - setting the POR (power on reset)
2251  * values in hba power info
2252  * @hba: per-adapter instance
2253  */
2254 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
2255 {
2256         hba->pwr_info.gear_rx = UFS_PWM_G1;
2257         hba->pwr_info.gear_tx = UFS_PWM_G1;
2258         hba->pwr_info.lane_rx = 1;
2259         hba->pwr_info.lane_tx = 1;
2260         hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
2261         hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
2262         hba->pwr_info.hs_rate = 0;
2263 }
2264
2265 /**
2266  * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
2267  * @hba: per-adapter instance
2268  */
2269 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
2270 {
2271         struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
2272
2273         if (hba->max_pwr_info.is_valid)
2274                 return 0;
2275
2276         pwr_info->pwr_tx = FASTAUTO_MODE;
2277         pwr_info->pwr_rx = FASTAUTO_MODE;
2278         pwr_info->hs_rate = PA_HS_MODE_B;
2279
2280         /* Get the connected lane count */
2281         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
2282                         &pwr_info->lane_rx);
2283         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
2284                         &pwr_info->lane_tx);
2285
2286         if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
2287                 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
2288                                 __func__,
2289                                 pwr_info->lane_rx,
2290                                 pwr_info->lane_tx);
2291                 return -EINVAL;
2292         }
2293
2294         /*
2295          * First, get the maximum gears of HS speed.
2296          * If a zero value, it means there is no HSGEAR capability.
2297          * Then, get the maximum gears of PWM speed.
2298          */
2299         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
2300         if (!pwr_info->gear_rx) {
2301                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
2302                                 &pwr_info->gear_rx);
2303                 if (!pwr_info->gear_rx) {
2304                         dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
2305                                 __func__, pwr_info->gear_rx);
2306                         return -EINVAL;
2307                 }
2308                 pwr_info->pwr_rx = SLOWAUTO_MODE;
2309         }
2310
2311         ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
2312                         &pwr_info->gear_tx);
2313         if (!pwr_info->gear_tx) {
2314                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
2315                                 &pwr_info->gear_tx);
2316                 if (!pwr_info->gear_tx) {
2317                         dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
2318                                 __func__, pwr_info->gear_tx);
2319                         return -EINVAL;
2320                 }
2321                 pwr_info->pwr_tx = SLOWAUTO_MODE;
2322         }
2323
2324         hba->max_pwr_info.is_valid = true;
2325         return 0;
2326 }
2327
2328 static int ufshcd_change_power_mode(struct ufs_hba *hba,
2329                              struct ufs_pa_layer_attr *pwr_mode)
2330 {
2331         int ret;
2332
2333         /* if already configured to the requested pwr_mode */
2334         if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
2335             pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
2336             pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
2337             pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
2338             pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
2339             pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
2340             pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
2341                 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
2342                 return 0;
2343         }
2344
2345         /*
2346          * Configure attributes for power mode change with below.
2347          * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
2348          * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
2349          * - PA_HSSERIES
2350          */
2351         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
2352         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
2353                         pwr_mode->lane_rx);
2354         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
2355                         pwr_mode->pwr_rx == FAST_MODE)
2356                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
2357         else
2358                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
2359
2360         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
2361         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
2362                         pwr_mode->lane_tx);
2363         if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
2364                         pwr_mode->pwr_tx == FAST_MODE)
2365                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
2366         else
2367                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
2368
2369         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
2370             pwr_mode->pwr_tx == FASTAUTO_MODE ||
2371             pwr_mode->pwr_rx == FAST_MODE ||
2372             pwr_mode->pwr_tx == FAST_MODE)
2373                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
2374                                                 pwr_mode->hs_rate);
2375
2376         ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
2377                         | pwr_mode->pwr_tx);
2378
2379         if (ret) {
2380                 dev_err(hba->dev,
2381                         "%s: power mode change failed %d\n", __func__, ret);
2382         } else {
2383                 if (hba->vops && hba->vops->pwr_change_notify)
2384                         hba->vops->pwr_change_notify(hba,
2385                                 POST_CHANGE, NULL, pwr_mode);
2386
2387                 memcpy(&hba->pwr_info, pwr_mode,
2388                         sizeof(struct ufs_pa_layer_attr));
2389         }
2390
2391         return ret;
2392 }
2393
2394 /**
2395  * ufshcd_config_pwr_mode - configure a new power mode
2396  * @hba: per-adapter instance
2397  * @desired_pwr_mode: desired power configuration
2398  */
2399 static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
2400                 struct ufs_pa_layer_attr *desired_pwr_mode)
2401 {
2402         struct ufs_pa_layer_attr final_params = { 0 };
2403         int ret;
2404
2405         if (hba->vops && hba->vops->pwr_change_notify)
2406                 hba->vops->pwr_change_notify(hba,
2407                      PRE_CHANGE, desired_pwr_mode, &final_params);
2408         else
2409                 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
2410
2411         ret = ufshcd_change_power_mode(hba, &final_params);
2412
2413         return ret;
2414 }
2415
2416 /**
2417  * ufshcd_complete_dev_init() - checks device readiness
2418  * hba: per-adapter instance
2419  *
2420  * Set fDeviceInit flag and poll until device toggles it.
2421  */
2422 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
2423 {
2424         int i, retries, err = 0;
2425         bool flag_res = 1;
2426
2427         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2428                 /* Set the fDeviceInit flag */
2429                 err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_SET_FLAG,
2430                                         QUERY_FLAG_IDN_FDEVICEINIT, NULL);
2431                 if (!err || err == -ETIMEDOUT)
2432                         break;
2433                 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
2434         }
2435         if (err) {
2436                 dev_err(hba->dev,
2437                         "%s setting fDeviceInit flag failed with error %d\n",
2438                         __func__, err);
2439                 goto out;
2440         }
2441
2442         /* poll for max. 100 iterations for fDeviceInit flag to clear */
2443         for (i = 0; i < 100 && !err && flag_res; i++) {
2444                 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2445                         err = ufshcd_query_flag(hba,
2446                                         UPIU_QUERY_OPCODE_READ_FLAG,
2447                                         QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
2448                         if (!err || err == -ETIMEDOUT)
2449                                 break;
2450                         dev_dbg(hba->dev, "%s: error %d retrying\n", __func__,
2451                                         err);
2452                 }
2453         }
2454         if (err)
2455                 dev_err(hba->dev,
2456                         "%s reading fDeviceInit flag failed with error %d\n",
2457                         __func__, err);
2458         else if (flag_res)
2459                 dev_err(hba->dev,
2460                         "%s fDeviceInit was not cleared by the device\n",
2461                         __func__);
2462
2463 out:
2464         return err;
2465 }
2466
2467 /**
2468  * ufshcd_make_hba_operational - Make UFS controller operational
2469  * @hba: per adapter instance
2470  *
2471  * To bring UFS host controller to operational state,
2472  * 1. Enable required interrupts
2473  * 2. Configure interrupt aggregation
2474  * 3. Program UTRL and UTMRL base addres
2475  * 4. Configure run-stop-registers
2476  *
2477  * Returns 0 on success, non-zero value on failure
2478  */
2479 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
2480 {
2481         int err = 0;
2482         u32 reg;
2483
2484         /* Enable required interrupts */
2485         ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
2486
2487         /* Configure interrupt aggregation */
2488         ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
2489
2490         /* Configure UTRL and UTMRL base address registers */
2491         ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
2492                         REG_UTP_TRANSFER_REQ_LIST_BASE_L);
2493         ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
2494                         REG_UTP_TRANSFER_REQ_LIST_BASE_H);
2495         ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
2496                         REG_UTP_TASK_REQ_LIST_BASE_L);
2497         ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
2498                         REG_UTP_TASK_REQ_LIST_BASE_H);
2499
2500         /*
2501          * UCRDY, UTMRLDY and UTRLRDY bits must be 1
2502          * DEI, HEI bits must be 0
2503          */
2504         reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
2505         if (!(ufshcd_get_lists_status(reg))) {
2506                 ufshcd_enable_run_stop_reg(hba);
2507         } else {
2508                 dev_err(hba->dev,
2509                         "Host controller not ready to process requests");
2510                 err = -EIO;
2511                 goto out;
2512         }
2513
2514 out:
2515         return err;
2516 }
2517
2518 /**
2519  * ufshcd_hba_enable - initialize the controller
2520  * @hba: per adapter instance
2521  *
2522  * The controller resets itself and controller firmware initialization
2523  * sequence kicks off. When controller is ready it will set
2524  * the Host Controller Enable bit to 1.
2525  *
2526  * Returns 0 on success, non-zero value on failure
2527  */
2528 static int ufshcd_hba_enable(struct ufs_hba *hba)
2529 {
2530         int retry;
2531
2532         /*
2533          * msleep of 1 and 5 used in this function might result in msleep(20),
2534          * but it was necessary to send the UFS FPGA to reset mode during
2535          * development and testing of this driver. msleep can be changed to
2536          * mdelay and retry count can be reduced based on the controller.
2537          */
2538         if (!ufshcd_is_hba_active(hba)) {
2539
2540                 /* change controller state to "reset state" */
2541                 ufshcd_hba_stop(hba);
2542
2543                 /*
2544                  * This delay is based on the testing done with UFS host
2545                  * controller FPGA. The delay can be changed based on the
2546                  * host controller used.
2547                  */
2548                 msleep(5);
2549         }
2550
2551         /* UniPro link is disabled at this point */
2552         ufshcd_set_link_off(hba);
2553
2554         if (hba->vops && hba->vops->hce_enable_notify)
2555                 hba->vops->hce_enable_notify(hba, PRE_CHANGE);
2556
2557         /* start controller initialization sequence */
2558         ufshcd_hba_start(hba);
2559
2560         /*
2561          * To initialize a UFS host controller HCE bit must be set to 1.
2562          * During initialization the HCE bit value changes from 1->0->1.
2563          * When the host controller completes initialization sequence
2564          * it sets the value of HCE bit to 1. The same HCE bit is read back
2565          * to check if the controller has completed initialization sequence.
2566          * So without this delay the value HCE = 1, set in the previous
2567          * instruction might be read back.
2568          * This delay can be changed based on the controller.
2569          */
2570         msleep(1);
2571
2572         /* wait for the host controller to complete initialization */
2573         retry = 10;
2574         while (ufshcd_is_hba_active(hba)) {
2575                 if (retry) {
2576                         retry--;
2577                 } else {
2578                         dev_err(hba->dev,
2579                                 "Controller enable failed\n");
2580                         return -EIO;
2581                 }
2582                 msleep(5);
2583         }
2584
2585         /* enable UIC related interrupts */
2586         ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
2587
2588         if (hba->vops && hba->vops->hce_enable_notify)
2589                 hba->vops->hce_enable_notify(hba, POST_CHANGE);
2590
2591         return 0;
2592 }
2593
2594 /**
2595  * ufshcd_link_startup - Initialize unipro link startup
2596  * @hba: per adapter instance
2597  *
2598  * Returns 0 for success, non-zero in case of failure
2599  */
2600 static int ufshcd_link_startup(struct ufs_hba *hba)
2601 {
2602         int ret;
2603         int retries = DME_LINKSTARTUP_RETRIES;
2604
2605         do {
2606                 if (hba->vops && hba->vops->link_startup_notify)
2607                         hba->vops->link_startup_notify(hba, PRE_CHANGE);
2608
2609                 ret = ufshcd_dme_link_startup(hba);
2610
2611                 /* check if device is detected by inter-connect layer */
2612                 if (!ret && !ufshcd_is_device_present(hba)) {
2613                         dev_err(hba->dev, "%s: Device not present\n", __func__);
2614                         ret = -ENXIO;
2615                         goto out;
2616                 }
2617
2618                 /*
2619                  * DME link lost indication is only received when link is up,
2620                  * but we can't be sure if the link is up until link startup
2621                  * succeeds. So reset the local Uni-Pro and try again.
2622                  */
2623                 if (ret && ufshcd_hba_enable(hba))
2624                         goto out;
2625         } while (ret && retries--);
2626
2627         if (ret)
2628                 /* failed to get the link up... retire */
2629                 goto out;
2630
2631         /* Include any host controller configuration via UIC commands */
2632         if (hba->vops && hba->vops->link_startup_notify) {
2633                 ret = hba->vops->link_startup_notify(hba, POST_CHANGE);
2634                 if (ret)
2635                         goto out;
2636         }
2637
2638         ret = ufshcd_make_hba_operational(hba);
2639 out:
2640         if (ret)
2641                 dev_err(hba->dev, "link startup failed %d\n", ret);
2642         return ret;
2643 }
2644
2645 /**
2646  * ufshcd_verify_dev_init() - Verify device initialization
2647  * @hba: per-adapter instance
2648  *
2649  * Send NOP OUT UPIU and wait for NOP IN response to check whether the
2650  * device Transport Protocol (UTP) layer is ready after a reset.
2651  * If the UTP layer at the device side is not initialized, it may
2652  * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
2653  * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
2654  */
2655 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
2656 {
2657         int err = 0;
2658         int retries;
2659
2660         ufshcd_hold(hba, false);
2661         mutex_lock(&hba->dev_cmd.lock);
2662         for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
2663                 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
2664                                                NOP_OUT_TIMEOUT);
2665
2666                 if (!err || err == -ETIMEDOUT)
2667                         break;
2668
2669                 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
2670         }
2671         mutex_unlock(&hba->dev_cmd.lock);
2672         ufshcd_release(hba);
2673
2674         if (err)
2675                 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
2676         return err;
2677 }
2678
2679 /**
2680  * ufshcd_set_queue_depth - set lun queue depth
2681  * @sdev: pointer to SCSI device
2682  *
2683  * Read bLUQueueDepth value and activate scsi tagged command
2684  * queueing. For WLUN, queue depth is set to 1. For best-effort
2685  * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
2686  * value that host can queue.
2687  */
2688 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
2689 {
2690         int ret = 0;
2691         u8 lun_qdepth;
2692         struct ufs_hba *hba;
2693
2694         hba = shost_priv(sdev->host);
2695
2696         lun_qdepth = hba->nutrs;
2697         ret = ufshcd_read_unit_desc_param(hba,
2698                                           ufshcd_scsi_to_upiu_lun(sdev->lun),
2699                                           UNIT_DESC_PARAM_LU_Q_DEPTH,
2700                                           &lun_qdepth,
2701                                           sizeof(lun_qdepth));
2702
2703         /* Some WLUN doesn't support unit descriptor */
2704         if (ret == -EOPNOTSUPP)
2705                 lun_qdepth = 1;
2706         else if (!lun_qdepth)
2707                 /* eventually, we can figure out the real queue depth */
2708                 lun_qdepth = hba->nutrs;
2709         else
2710                 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
2711
2712         dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
2713                         __func__, lun_qdepth);
2714         scsi_activate_tcq(sdev, lun_qdepth);
2715 }
2716
2717 /*
2718  * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
2719  * @hba: per-adapter instance
2720  * @lun: UFS device lun id
2721  * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
2722  *
2723  * Returns 0 in case of success and b_lu_write_protect status would be returned
2724  * @b_lu_write_protect parameter.
2725  * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
2726  * Returns -EINVAL in case of invalid parameters passed to this function.
2727  */
2728 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
2729                             u8 lun,
2730                             u8 *b_lu_write_protect)
2731 {
2732         int ret;
2733
2734         if (!b_lu_write_protect)
2735                 ret = -EINVAL;
2736         /*
2737          * According to UFS device spec, RPMB LU can't be write
2738          * protected so skip reading bLUWriteProtect parameter for
2739          * it. For other W-LUs, UNIT DESCRIPTOR is not available.
2740          */
2741         else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
2742                 ret = -ENOTSUPP;
2743         else
2744                 ret = ufshcd_read_unit_desc_param(hba,
2745                                           lun,
2746                                           UNIT_DESC_PARAM_LU_WR_PROTECT,
2747                                           b_lu_write_protect,
2748                                           sizeof(*b_lu_write_protect));
2749         return ret;
2750 }
2751
2752 /**
2753  * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
2754  * status
2755  * @hba: per-adapter instance
2756  * @sdev: pointer to SCSI device
2757  *
2758  */
2759 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
2760                                                     struct scsi_device *sdev)
2761 {
2762         if (hba->dev_info.f_power_on_wp_en &&
2763             !hba->dev_info.is_lu_power_on_wp) {
2764                 u8 b_lu_write_protect;
2765
2766                 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
2767                                       &b_lu_write_protect) &&
2768                     (b_lu_write_protect == UFS_LU_POWER_ON_WP))
2769                         hba->dev_info.is_lu_power_on_wp = true;
2770         }
2771 }
2772
2773 /**
2774  * ufshcd_slave_alloc - handle initial SCSI device configurations
2775  * @sdev: pointer to SCSI device
2776  *
2777  * Returns success
2778  */
2779 static int ufshcd_slave_alloc(struct scsi_device *sdev)
2780 {
2781         struct ufs_hba *hba;
2782
2783         hba = shost_priv(sdev->host);
2784         sdev->tagged_supported = 1;
2785
2786         /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
2787         sdev->use_10_for_ms = 1;
2788         scsi_set_tag_type(sdev, MSG_SIMPLE_TAG);
2789
2790         /* allow SCSI layer to restart the device in case of errors */
2791         sdev->allow_restart = 1;
2792
2793         /* REPORT SUPPORTED OPERATION CODES is not supported */
2794         sdev->no_report_opcodes = 1;
2795
2796
2797         ufshcd_set_queue_depth(sdev);
2798
2799         ufshcd_get_lu_power_on_wp_status(hba, sdev);
2800
2801         return 0;
2802 }
2803
2804 /**
2805  * ufshcd_change_queue_depth - change queue depth
2806  * @sdev: pointer to SCSI device
2807  * @depth: required depth to set
2808  * @reason: reason for changing the depth
2809  *
2810  * Change queue depth according to the reason and make sure
2811  * the max. limits are not crossed.
2812  */
2813 static int ufshcd_change_queue_depth(struct scsi_device *sdev,
2814                 int depth, int reason)
2815 {
2816         struct ufs_hba *hba = shost_priv(sdev->host);
2817
2818         if (depth > hba->nutrs)
2819                 depth = hba->nutrs;
2820
2821         switch (reason) {
2822         case SCSI_QDEPTH_DEFAULT:
2823         case SCSI_QDEPTH_RAMP_UP:
2824                 if (!sdev->tagged_supported)
2825                         depth = 1;
2826                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), depth);
2827                 break;
2828         case SCSI_QDEPTH_QFULL:
2829                 scsi_track_queue_full(sdev, depth);
2830                 break;
2831         default:
2832                 return -EOPNOTSUPP;
2833         }
2834
2835         return depth;
2836 }
2837
2838 /**
2839  * ufshcd_slave_configure - adjust SCSI device configurations
2840  * @sdev: pointer to SCSI device
2841  */
2842 static int ufshcd_slave_configure(struct scsi_device *sdev)
2843 {
2844         struct request_queue *q = sdev->request_queue;
2845
2846         blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
2847         blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
2848
2849         return 0;
2850 }
2851
2852 /**
2853  * ufshcd_slave_destroy - remove SCSI device configurations
2854  * @sdev: pointer to SCSI device
2855  */
2856 static void ufshcd_slave_destroy(struct scsi_device *sdev)
2857 {
2858         struct ufs_hba *hba;
2859
2860         hba = shost_priv(sdev->host);
2861         scsi_deactivate_tcq(sdev, hba->nutrs);
2862         /* Drop the reference as it won't be needed anymore */
2863         if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
2864                 unsigned long flags;
2865
2866                 spin_lock_irqsave(hba->host->host_lock, flags);
2867                 hba->sdev_ufs_device = NULL;
2868                 spin_unlock_irqrestore(hba->host->host_lock, flags);
2869         }
2870 }
2871
2872 /**
2873  * ufshcd_task_req_compl - handle task management request completion
2874  * @hba: per adapter instance
2875  * @index: index of the completed request
2876  * @resp: task management service response
2877  *
2878  * Returns non-zero value on error, zero on success
2879  */
2880 static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
2881 {
2882         struct utp_task_req_desc *task_req_descp;
2883         struct utp_upiu_task_rsp *task_rsp_upiup;
2884         unsigned long flags;
2885         int ocs_value;
2886         int task_result;
2887
2888         spin_lock_irqsave(hba->host->host_lock, flags);
2889
2890         /* Clear completed tasks from outstanding_tasks */
2891         __clear_bit(index, &hba->outstanding_tasks);
2892
2893         task_req_descp = hba->utmrdl_base_addr;
2894         ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
2895
2896         if (ocs_value == OCS_SUCCESS) {
2897                 task_rsp_upiup = (struct utp_upiu_task_rsp *)
2898                                 task_req_descp[index].task_rsp_upiu;
2899                 task_result = be32_to_cpu(task_rsp_upiup->header.dword_1);
2900                 task_result = ((task_result & MASK_TASK_RESPONSE) >> 8);
2901                 if (resp)
2902                         *resp = (u8)task_result;
2903         } else {
2904                 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
2905                                 __func__, ocs_value);
2906         }
2907         spin_unlock_irqrestore(hba->host->host_lock, flags);
2908
2909         return ocs_value;
2910 }
2911
2912 /**
2913  * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
2914  * @lrb: pointer to local reference block of completed command
2915  * @scsi_status: SCSI command status
2916  *
2917  * Returns value base on SCSI command status
2918  */
2919 static inline int
2920 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
2921 {
2922         int result = 0;
2923
2924         switch (scsi_status) {
2925         case SAM_STAT_CHECK_CONDITION:
2926                 ufshcd_copy_sense_data(lrbp);
2927         case SAM_STAT_GOOD:
2928                 result |= DID_OK << 16 |
2929                           COMMAND_COMPLETE << 8 |
2930                           scsi_status;
2931                 break;
2932         case SAM_STAT_TASK_SET_FULL:
2933         case SAM_STAT_BUSY:
2934         case SAM_STAT_TASK_ABORTED:
2935                 ufshcd_copy_sense_data(lrbp);
2936                 result |= scsi_status;
2937                 break;
2938         default:
2939                 result |= DID_ERROR << 16;
2940                 break;
2941         } /* end of switch */
2942
2943         return result;
2944 }
2945
2946 /**
2947  * ufshcd_transfer_rsp_status - Get overall status of the response
2948  * @hba: per adapter instance
2949  * @lrb: pointer to local reference block of completed command
2950  *
2951  * Returns result of the command to notify SCSI midlayer
2952  */
2953 static inline int
2954 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2955 {
2956         int result = 0;
2957         int scsi_status;
2958         int ocs;
2959
2960         /* overall command status of utrd */
2961         ocs = ufshcd_get_tr_ocs(lrbp);
2962
2963         switch (ocs) {
2964         case OCS_SUCCESS:
2965                 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2966
2967                 switch (result) {
2968                 case UPIU_TRANSACTION_RESPONSE:
2969                         /*
2970                          * get the response UPIU result to extract
2971                          * the SCSI command status
2972                          */
2973                         result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
2974
2975                         /*
2976                          * get the result based on SCSI status response
2977                          * to notify the SCSI midlayer of the command status
2978                          */
2979                         scsi_status = result & MASK_SCSI_STATUS;
2980                         result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
2981
2982                         if (ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
2983                                 schedule_work(&hba->eeh_work);
2984                         break;
2985                 case UPIU_TRANSACTION_REJECT_UPIU:
2986                         /* TODO: handle Reject UPIU Response */
2987                         result = DID_ERROR << 16;
2988                         dev_err(hba->dev,
2989                                 "Reject UPIU not fully implemented\n");
2990                         break;
2991                 default:
2992                         result = DID_ERROR << 16;
2993                         dev_err(hba->dev,
2994                                 "Unexpected request response code = %x\n",
2995                                 result);
2996                         break;
2997                 }
2998                 break;
2999         case OCS_ABORTED:
3000                 result |= DID_ABORT << 16;
3001                 break;
3002         case OCS_INVALID_COMMAND_STATUS:
3003                 result |= DID_REQUEUE << 16;
3004                 break;
3005         case OCS_INVALID_CMD_TABLE_ATTR:
3006         case OCS_INVALID_PRDT_ATTR:
3007         case OCS_MISMATCH_DATA_BUF_SIZE:
3008         case OCS_MISMATCH_RESP_UPIU_SIZE:
3009         case OCS_PEER_COMM_FAILURE:
3010         case OCS_FATAL_ERROR:
3011         default:
3012                 result |= DID_ERROR << 16;
3013                 dev_err(hba->dev,
3014                 "OCS error from controller = %x\n", ocs);
3015                 break;
3016         } /* end of switch */
3017
3018         return result;
3019 }
3020
3021 /**
3022  * ufshcd_uic_cmd_compl - handle completion of uic command
3023  * @hba: per adapter instance
3024  * @intr_status: interrupt status generated by the controller
3025  */
3026 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
3027 {
3028         if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
3029                 hba->active_uic_cmd->argument2 |=
3030                         ufshcd_get_uic_cmd_result(hba);
3031                 hba->active_uic_cmd->argument3 =
3032                         ufshcd_get_dme_attr_val(hba);
3033                 complete(&hba->active_uic_cmd->done);
3034         }
3035
3036         if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
3037                 complete(hba->uic_async_done);
3038 }
3039
3040 /**
3041  * ufshcd_transfer_req_compl - handle SCSI and query command completion
3042  * @hba: per adapter instance
3043  */
3044 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
3045 {
3046         struct ufshcd_lrb *lrbp;
3047         struct scsi_cmnd *cmd;
3048         unsigned long completed_reqs;
3049         u32 tr_doorbell;
3050         int result;
3051         int index;
3052
3053         /* Resetting interrupt aggregation counters first and reading the
3054          * DOOR_BELL afterward allows us to handle all the completed requests.
3055          * In order to prevent other interrupts starvation the DB is read once
3056          * after reset. The down side of this solution is the possibility of
3057          * false interrupt if device completes another request after resetting
3058          * aggregation and before reading the DB.
3059          */
3060         ufshcd_reset_intr_aggr(hba);
3061
3062         tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
3063         completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
3064
3065         for_each_set_bit(index, &completed_reqs, hba->nutrs) {
3066                 lrbp = &hba->lrb[index];
3067                 cmd = lrbp->cmd;
3068                 if (cmd) {
3069                         result = ufshcd_transfer_rsp_status(hba, lrbp);
3070                         scsi_dma_unmap(cmd);
3071                         cmd->result = result;
3072                         /* Mark completed command as NULL in LRB */
3073                         lrbp->cmd = NULL;
3074                         clear_bit_unlock(index, &hba->lrb_in_use);
3075                         /* Do not touch lrbp after scsi done */
3076                         cmd->scsi_done(cmd);
3077                         __ufshcd_release(hba);
3078                 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
3079                         if (hba->dev_cmd.complete)
3080                                 complete(hba->dev_cmd.complete);
3081                 }
3082         }
3083
3084         /* clear corresponding bits of completed commands */
3085         hba->outstanding_reqs ^= completed_reqs;
3086
3087         ufshcd_clk_scaling_update_busy(hba);
3088
3089         /* we might have free'd some tags above */
3090         wake_up(&hba->dev_cmd.tag_wq);
3091 }
3092
3093 /**
3094  * ufshcd_disable_ee - disable exception event
3095  * @hba: per-adapter instance
3096  * @mask: exception event to disable
3097  *
3098  * Disables exception event in the device so that the EVENT_ALERT
3099  * bit is not set.
3100  *
3101  * Returns zero on success, non-zero error value on failure.
3102  */
3103 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
3104 {
3105         int err = 0;
3106         u32 val;
3107
3108         if (!(hba->ee_ctrl_mask & mask))
3109                 goto out;
3110
3111         val = hba->ee_ctrl_mask & ~mask;
3112         val &= 0xFFFF; /* 2 bytes */
3113         err = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
3114                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
3115         if (!err)
3116                 hba->ee_ctrl_mask &= ~mask;
3117 out:
3118         return err;
3119 }
3120
3121 /**
3122  * ufshcd_enable_ee - enable exception event
3123  * @hba: per-adapter instance
3124  * @mask: exception event to enable
3125  *
3126  * Enable corresponding exception event in the device to allow
3127  * device to alert host in critical scenarios.
3128  *
3129  * Returns zero on success, non-zero error value on failure.
3130  */
3131 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
3132 {
3133         int err = 0;
3134         u32 val;
3135
3136         if (hba->ee_ctrl_mask & mask)
3137                 goto out;
3138
3139         val = hba->ee_ctrl_mask | mask;
3140         val &= 0xFFFF; /* 2 bytes */
3141         err = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
3142                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
3143         if (!err)
3144                 hba->ee_ctrl_mask |= mask;
3145 out:
3146         return err;
3147 }
3148
3149 /**
3150  * ufshcd_enable_auto_bkops - Allow device managed BKOPS
3151  * @hba: per-adapter instance
3152  *
3153  * Allow device to manage background operations on its own. Enabling
3154  * this might lead to inconsistent latencies during normal data transfers
3155  * as the device is allowed to manage its own way of handling background
3156  * operations.
3157  *
3158  * Returns zero on success, non-zero on failure.
3159  */
3160 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
3161 {
3162         int err = 0;
3163
3164         if (hba->auto_bkops_enabled)
3165                 goto out;
3166
3167         err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_SET_FLAG,
3168                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
3169         if (err) {
3170                 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
3171                                 __func__, err);
3172                 goto out;
3173         }
3174
3175         hba->auto_bkops_enabled = true;
3176
3177         /* No need of URGENT_BKOPS exception from the device */
3178         err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
3179         if (err)
3180                 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
3181                                 __func__, err);
3182 out:
3183         return err;
3184 }
3185
3186 /**
3187  * ufshcd_disable_auto_bkops - block device in doing background operations
3188  * @hba: per-adapter instance
3189  *
3190  * Disabling background operations improves command response latency but
3191  * has drawback of device moving into critical state where the device is
3192  * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
3193  * host is idle so that BKOPS are managed effectively without any negative
3194  * impacts.
3195  *
3196  * Returns zero on success, non-zero on failure.
3197  */
3198 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
3199 {
3200         int err = 0;
3201
3202         if (!hba->auto_bkops_enabled)
3203                 goto out;
3204
3205         /*
3206          * If host assisted BKOPs is to be enabled, make sure
3207          * urgent bkops exception is allowed.
3208          */
3209         err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
3210         if (err) {
3211                 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
3212                                 __func__, err);
3213                 goto out;
3214         }
3215
3216         err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
3217                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
3218         if (err) {
3219                 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
3220                                 __func__, err);
3221                 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
3222                 goto out;
3223         }
3224
3225         hba->auto_bkops_enabled = false;
3226 out:
3227         return err;
3228 }
3229
3230 /**
3231  * ufshcd_force_reset_auto_bkops - force enable of auto bkops
3232  * @hba: per adapter instance
3233  *
3234  * After a device reset the device may toggle the BKOPS_EN flag
3235  * to default value. The s/w tracking variables should be updated
3236  * as well. Do this by forcing enable of auto bkops.
3237  */
3238 static void  ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
3239 {
3240         hba->auto_bkops_enabled = false;
3241         hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
3242         ufshcd_enable_auto_bkops(hba);
3243 }
3244
3245 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
3246 {
3247         return ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3248                         QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
3249 }
3250
3251 /**
3252  * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
3253  * @hba: per-adapter instance
3254  * @status: bkops_status value
3255  *
3256  * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
3257  * flag in the device to permit background operations if the device
3258  * bkops_status is greater than or equal to "status" argument passed to
3259  * this function, disable otherwise.
3260  *
3261  * Returns 0 for success, non-zero in case of failure.
3262  *
3263  * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
3264  * to know whether auto bkops is enabled or disabled after this function
3265  * returns control to it.
3266  */
3267 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
3268                              enum bkops_status status)
3269 {
3270         int err;
3271         u32 curr_status = 0;
3272
3273         err = ufshcd_get_bkops_status(hba, &curr_status);
3274         if (err) {
3275                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
3276                                 __func__, err);
3277                 goto out;
3278         } else if (curr_status > BKOPS_STATUS_MAX) {
3279                 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
3280                                 __func__, curr_status);
3281                 err = -EINVAL;
3282                 goto out;
3283         }
3284
3285         if (curr_status >= status)
3286                 err = ufshcd_enable_auto_bkops(hba);
3287         else
3288                 err = ufshcd_disable_auto_bkops(hba);
3289 out:
3290         return err;
3291 }
3292
3293 /**
3294  * ufshcd_urgent_bkops - handle urgent bkops exception event
3295  * @hba: per-adapter instance
3296  *
3297  * Enable fBackgroundOpsEn flag in the device to permit background
3298  * operations.
3299  *
3300  * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
3301  * and negative error value for any other failure.
3302  */
3303 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
3304 {
3305         return ufshcd_bkops_ctrl(hba, BKOPS_STATUS_PERF_IMPACT);
3306 }
3307
3308 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
3309 {
3310         return ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3311                         QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
3312 }
3313
3314 /**
3315  * ufshcd_exception_event_handler - handle exceptions raised by device
3316  * @work: pointer to work data
3317  *
3318  * Read bExceptionEventStatus attribute from the device and handle the
3319  * exception event accordingly.
3320  */
3321 static void ufshcd_exception_event_handler(struct work_struct *work)
3322 {
3323         struct ufs_hba *hba;
3324         int err;
3325         u32 status = 0;
3326         hba = container_of(work, struct ufs_hba, eeh_work);
3327
3328         pm_runtime_get_sync(hba->dev);
3329         err = ufshcd_get_ee_status(hba, &status);
3330         if (err) {
3331                 dev_err(hba->dev, "%s: failed to get exception status %d\n",
3332                                 __func__, err);
3333                 goto out;
3334         }
3335
3336         status &= hba->ee_ctrl_mask;
3337         if (status & MASK_EE_URGENT_BKOPS) {
3338                 err = ufshcd_urgent_bkops(hba);
3339                 if (err < 0)
3340                         dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
3341                                         __func__, err);
3342         }
3343 out:
3344         pm_runtime_put_sync(hba->dev);
3345         return;
3346 }
3347
3348 /**
3349  * ufshcd_err_handler - handle UFS errors that require s/w attention
3350  * @work: pointer to work structure
3351  */
3352 static void ufshcd_err_handler(struct work_struct *work)
3353 {
3354         struct ufs_hba *hba;
3355         unsigned long flags;
3356         u32 err_xfer = 0;
3357         u32 err_tm = 0;
3358         int err = 0;
3359         int tag;
3360
3361         hba = container_of(work, struct ufs_hba, eh_work);
3362
3363         pm_runtime_get_sync(hba->dev);
3364         ufshcd_hold(hba, false);
3365
3366         spin_lock_irqsave(hba->host->host_lock, flags);
3367         if (hba->ufshcd_state == UFSHCD_STATE_RESET) {
3368                 spin_unlock_irqrestore(hba->host->host_lock, flags);
3369                 goto out;
3370         }
3371
3372         hba->ufshcd_state = UFSHCD_STATE_RESET;
3373         ufshcd_set_eh_in_progress(hba);
3374
3375         /* Complete requests that have door-bell cleared by h/w */
3376         ufshcd_transfer_req_compl(hba);
3377         ufshcd_tmc_handler(hba);
3378         spin_unlock_irqrestore(hba->host->host_lock, flags);
3379
3380         /* Clear pending transfer requests */
3381         for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs)
3382                 if (ufshcd_clear_cmd(hba, tag))
3383                         err_xfer |= 1 << tag;
3384
3385         /* Clear pending task management requests */
3386         for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs)
3387                 if (ufshcd_clear_tm_cmd(hba, tag))
3388                         err_tm |= 1 << tag;
3389
3390         /* Complete the requests that are cleared by s/w */
3391         spin_lock_irqsave(hba->host->host_lock, flags);
3392         ufshcd_transfer_req_compl(hba);
3393         ufshcd_tmc_handler(hba);
3394         spin_unlock_irqrestore(hba->host->host_lock, flags);
3395
3396         /* Fatal errors need reset */
3397         if (err_xfer || err_tm || (hba->saved_err & INT_FATAL_ERRORS) ||
3398                         ((hba->saved_err & UIC_ERROR) &&
3399                          (hba->saved_uic_err & UFSHCD_UIC_DL_PA_INIT_ERROR))) {
3400                 err = ufshcd_reset_and_restore(hba);
3401                 if (err) {
3402                         dev_err(hba->dev, "%s: reset and restore failed\n",
3403                                         __func__);
3404                         hba->ufshcd_state = UFSHCD_STATE_ERROR;
3405                 }
3406                 /*
3407                  * Inform scsi mid-layer that we did reset and allow to handle
3408                  * Unit Attention properly.
3409                  */
3410                 scsi_report_bus_reset(hba->host, 0);
3411                 hba->saved_err = 0;
3412                 hba->saved_uic_err = 0;
3413         }
3414         ufshcd_clear_eh_in_progress(hba);
3415
3416 out:
3417         scsi_unblock_requests(hba->host);
3418         ufshcd_release(hba);
3419         pm_runtime_put_sync(hba->dev);
3420 }
3421
3422 /**
3423  * ufshcd_update_uic_error - check and set fatal UIC error flags.
3424  * @hba: per-adapter instance
3425  */
3426 static void ufshcd_update_uic_error(struct ufs_hba *hba)
3427 {
3428         u32 reg;
3429
3430         /* PA_INIT_ERROR is fatal and needs UIC reset */
3431         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
3432         if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
3433                 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
3434
3435         /* UIC NL/TL/DME errors needs software retry */
3436         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
3437         if (reg)
3438                 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
3439
3440         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
3441         if (reg)
3442                 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
3443
3444         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
3445         if (reg)
3446                 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
3447
3448         dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
3449                         __func__, hba->uic_error);
3450 }
3451
3452 /**
3453  * ufshcd_check_errors - Check for errors that need s/w attention
3454  * @hba: per-adapter instance
3455  */
3456 static void ufshcd_check_errors(struct ufs_hba *hba)
3457 {
3458         bool queue_eh_work = false;
3459
3460         if (hba->errors & INT_FATAL_ERRORS)
3461                 queue_eh_work = true;
3462
3463         if (hba->errors & UIC_ERROR) {
3464                 hba->uic_error = 0;
3465                 ufshcd_update_uic_error(hba);
3466                 if (hba->uic_error)
3467                         queue_eh_work = true;
3468         }
3469
3470         if (queue_eh_work) {
3471                 /* handle fatal errors only when link is functional */
3472                 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
3473                         /* block commands from scsi mid-layer */
3474                         scsi_block_requests(hba->host);
3475
3476                         /* transfer error masks to sticky bits */
3477                         hba->saved_err |= hba->errors;
3478                         hba->saved_uic_err |= hba->uic_error;
3479
3480                         hba->ufshcd_state = UFSHCD_STATE_ERROR;
3481                         schedule_work(&hba->eh_work);
3482                 }
3483         }
3484         /*
3485          * if (!queue_eh_work) -
3486          * Other errors are either non-fatal where host recovers
3487          * itself without s/w intervention or errors that will be
3488          * handled by the SCSI core layer.
3489          */
3490 }
3491
3492 /**
3493  * ufshcd_tmc_handler - handle task management function completion
3494  * @hba: per adapter instance
3495  */
3496 static void ufshcd_tmc_handler(struct ufs_hba *hba)
3497 {
3498         u32 tm_doorbell;
3499
3500         tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
3501         hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
3502         wake_up(&hba->tm_wq);
3503 }
3504
3505 /**
3506  * ufshcd_sl_intr - Interrupt service routine
3507  * @hba: per adapter instance
3508  * @intr_status: contains interrupts generated by the controller
3509  */
3510 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
3511 {
3512         hba->errors = UFSHCD_ERROR_MASK & intr_status;
3513         if (hba->errors)
3514                 ufshcd_check_errors(hba);
3515
3516         if (intr_status & UFSHCD_UIC_MASK)
3517                 ufshcd_uic_cmd_compl(hba, intr_status);
3518
3519         if (intr_status & UTP_TASK_REQ_COMPL)
3520                 ufshcd_tmc_handler(hba);
3521
3522         if (intr_status & UTP_TRANSFER_REQ_COMPL)
3523                 ufshcd_transfer_req_compl(hba);
3524 }
3525
3526 /**
3527  * ufshcd_intr - Main interrupt service routine
3528  * @irq: irq number
3529  * @__hba: pointer to adapter instance
3530  *
3531  * Returns IRQ_HANDLED - If interrupt is valid
3532  *              IRQ_NONE - If invalid interrupt
3533  */
3534 static irqreturn_t ufshcd_intr(int irq, void *__hba)
3535 {
3536         u32 intr_status;
3537         irqreturn_t retval = IRQ_NONE;
3538         struct ufs_hba *hba = __hba;
3539
3540         spin_lock(hba->host->host_lock);
3541         intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
3542
3543         if (intr_status) {
3544                 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
3545                 ufshcd_sl_intr(hba, intr_status);
3546                 retval = IRQ_HANDLED;
3547         }
3548         spin_unlock(hba->host->host_lock);
3549         return retval;
3550 }
3551
3552 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
3553 {
3554         int err = 0;
3555         u32 mask = 1 << tag;
3556         unsigned long flags;
3557
3558         if (!test_bit(tag, &hba->outstanding_tasks))
3559                 goto out;
3560
3561         spin_lock_irqsave(hba->host->host_lock, flags);
3562         ufshcd_writel(hba, ~(1 << tag), REG_UTP_TASK_REQ_LIST_CLEAR);
3563         spin_unlock_irqrestore(hba->host->host_lock, flags);
3564
3565         /* poll for max. 1 sec to clear door bell register by h/w */
3566         err = ufshcd_wait_for_register(hba,
3567                         REG_UTP_TASK_REQ_DOOR_BELL,
3568                         mask, 0, 1000, 1000);
3569 out:
3570         return err;
3571 }
3572
3573 /**
3574  * ufshcd_issue_tm_cmd - issues task management commands to controller
3575  * @hba: per adapter instance
3576  * @lun_id: LUN ID to which TM command is sent
3577  * @task_id: task ID to which the TM command is applicable
3578  * @tm_function: task management function opcode
3579  * @tm_response: task management service response return value
3580  *
3581  * Returns non-zero value on error, zero on success.
3582  */
3583 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
3584                 u8 tm_function, u8 *tm_response)
3585 {
3586         struct utp_task_req_desc *task_req_descp;
3587         struct utp_upiu_task_req *task_req_upiup;
3588         struct Scsi_Host *host;
3589         unsigned long flags;
3590         int free_slot;
3591         int err;
3592         int task_tag;
3593
3594         host = hba->host;
3595
3596         /*
3597          * Get free slot, sleep if slots are unavailable.
3598          * Even though we use wait_event() which sleeps indefinitely,
3599          * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
3600          */
3601         wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
3602         ufshcd_hold(hba, false);
3603
3604         spin_lock_irqsave(host->host_lock, flags);
3605         task_req_descp = hba->utmrdl_base_addr;
3606         task_req_descp += free_slot;
3607
3608         /* Configure task request descriptor */
3609         task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
3610         task_req_descp->header.dword_2 =
3611                         cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
3612
3613         /* Configure task request UPIU */
3614         task_req_upiup =
3615                 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
3616         task_tag = hba->nutrs + free_slot;
3617         task_req_upiup->header.dword_0 =
3618                 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
3619                                               lun_id, task_tag);
3620         task_req_upiup->header.dword_1 =
3621                 UPIU_HEADER_DWORD(0, tm_function, 0, 0);
3622         /*
3623          * The host shall provide the same value for LUN field in the basic
3624          * header and for Input Parameter.
3625          */
3626         task_req_upiup->input_param1 = cpu_to_be32(lun_id);
3627         task_req_upiup->input_param2 = cpu_to_be32(task_id);
3628
3629         /* send command to the controller */
3630         __set_bit(free_slot, &hba->outstanding_tasks);
3631         ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
3632
3633         spin_unlock_irqrestore(host->host_lock, flags);
3634
3635         /* wait until the task management command is completed */
3636         err = wait_event_timeout(hba->tm_wq,
3637                         test_bit(free_slot, &hba->tm_condition),
3638                         msecs_to_jiffies(TM_CMD_TIMEOUT));
3639         if (!err) {
3640                 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
3641                                 __func__, tm_function);
3642                 if (ufshcd_clear_tm_cmd(hba, free_slot))
3643                         dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
3644                                         __func__, free_slot);
3645                 err = -ETIMEDOUT;
3646         } else {
3647                 err = ufshcd_task_req_compl(hba, free_slot, tm_response);
3648         }
3649
3650         clear_bit(free_slot, &hba->tm_condition);
3651         ufshcd_put_tm_slot(hba, free_slot);
3652         wake_up(&hba->tm_tag_wq);
3653
3654         ufshcd_release(hba);
3655         return err;
3656 }
3657
3658 /**
3659  * ufshcd_eh_device_reset_handler - device reset handler registered to
3660  *                                    scsi layer.
3661  * @cmd: SCSI command pointer
3662  *
3663  * Returns SUCCESS/FAILED
3664  */
3665 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
3666 {
3667         struct Scsi_Host *host;
3668         struct ufs_hba *hba;
3669         unsigned int tag;
3670         u32 pos;
3671         int err;
3672         u8 resp = 0xF;
3673         struct ufshcd_lrb *lrbp;
3674         unsigned long flags;
3675
3676         host = cmd->device->host;
3677         hba = shost_priv(host);
3678         tag = cmd->request->tag;
3679
3680         lrbp = &hba->lrb[tag];
3681         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
3682         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
3683                 if (!err)
3684                         err = resp;
3685                 goto out;
3686         }
3687
3688         /* clear the commands that were pending for corresponding LUN */
3689         for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
3690                 if (hba->lrb[pos].lun == lrbp->lun) {
3691                         err = ufshcd_clear_cmd(hba, pos);
3692                         if (err)
3693                                 break;
3694                 }
3695         }
3696         spin_lock_irqsave(host->host_lock, flags);
3697         ufshcd_transfer_req_compl(hba);
3698         spin_unlock_irqrestore(host->host_lock, flags);
3699 out:
3700         if (!err) {
3701                 err = SUCCESS;
3702         } else {
3703                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
3704                 err = FAILED;
3705         }
3706         return err;
3707 }
3708
3709 /**
3710  * ufshcd_abort - abort a specific command
3711  * @cmd: SCSI command pointer
3712  *
3713  * Abort the pending command in device by sending UFS_ABORT_TASK task management
3714  * command, and in host controller by clearing the door-bell register. There can
3715  * be race between controller sending the command to the device while abort is
3716  * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
3717  * really issued and then try to abort it.
3718  *
3719  * Returns SUCCESS/FAILED
3720  */
3721 static int ufshcd_abort(struct scsi_cmnd *cmd)
3722 {
3723         struct Scsi_Host *host;
3724         struct ufs_hba *hba;
3725         unsigned long flags;
3726         unsigned int tag;
3727         int err = 0;
3728         int poll_cnt;
3729         u8 resp = 0xF;
3730         struct ufshcd_lrb *lrbp;
3731         u32 reg;
3732
3733         host = cmd->device->host;
3734         hba = shost_priv(host);
3735         tag = cmd->request->tag;
3736
3737         ufshcd_hold(hba, false);
3738         /* If command is already aborted/completed, return SUCCESS */
3739         if (!(test_bit(tag, &hba->outstanding_reqs)))
3740                 goto out;
3741
3742         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
3743         if (!(reg & (1 << tag))) {
3744                 dev_err(hba->dev,
3745                 "%s: cmd was completed, but without a notifying intr, tag = %d",
3746                 __func__, tag);
3747         }
3748
3749         lrbp = &hba->lrb[tag];
3750         for (poll_cnt = 100; poll_cnt; poll_cnt--) {
3751                 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
3752                                 UFS_QUERY_TASK, &resp);
3753                 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
3754                         /* cmd pending in the device */
3755                         break;
3756                 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
3757                         /*
3758                          * cmd not pending in the device, check if it is
3759                          * in transition.
3760                          */
3761                         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
3762                         if (reg & (1 << tag)) {
3763                                 /* sleep for max. 200us to stabilize */
3764                                 usleep_range(100, 200);
3765                                 continue;
3766                         }
3767                         /* command completed already */
3768                         goto out;
3769                 } else {
3770                         if (!err)
3771                                 err = resp; /* service response error */
3772                         goto out;
3773                 }
3774         }
3775
3776         if (!poll_cnt) {
3777                 err = -EBUSY;
3778                 goto out;
3779         }
3780
3781         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
3782                         UFS_ABORT_TASK, &resp);
3783         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
3784                 if (!err)
3785                         err = resp; /* service response error */
3786                 goto out;
3787         }
3788
3789         err = ufshcd_clear_cmd(hba, tag);
3790         if (err)
3791                 goto out;
3792
3793         scsi_dma_unmap(cmd);
3794
3795         spin_lock_irqsave(host->host_lock, flags);
3796         __clear_bit(tag, &hba->outstanding_reqs);
3797         hba->lrb[tag].cmd = NULL;
3798         spin_unlock_irqrestore(host->host_lock, flags);
3799
3800         clear_bit_unlock(tag, &hba->lrb_in_use);
3801         wake_up(&hba->dev_cmd.tag_wq);
3802
3803 out:
3804         if (!err) {
3805                 err = SUCCESS;
3806         } else {
3807                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
3808                 err = FAILED;
3809         }
3810
3811         /*
3812          * This ufshcd_release() corresponds to the original scsi cmd that got
3813          * aborted here (as we won't get any IRQ for it).
3814          */
3815         ufshcd_release(hba);
3816         return err;
3817 }
3818
3819 /**
3820  * ufshcd_host_reset_and_restore - reset and restore host controller
3821  * @hba: per-adapter instance
3822  *
3823  * Note that host controller reset may issue DME_RESET to
3824  * local and remote (device) Uni-Pro stack and the attributes
3825  * are reset to default state.
3826  *
3827  * Returns zero on success, non-zero on failure
3828  */
3829 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
3830 {
3831         int err;
3832         unsigned long flags;
3833
3834         /* Reset the host controller */
3835         spin_lock_irqsave(hba->host->host_lock, flags);
3836         ufshcd_hba_stop(hba);
3837         spin_unlock_irqrestore(hba->host->host_lock, flags);
3838
3839         err = ufshcd_hba_enable(hba);
3840         if (err)
3841                 goto out;
3842
3843         /* Establish the link again and restore the device */
3844         err = ufshcd_probe_hba(hba);
3845
3846         if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
3847                 err = -EIO;
3848 out:
3849         if (err)
3850                 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
3851
3852         return err;
3853 }
3854
3855 /**
3856  * ufshcd_reset_and_restore - reset and re-initialize host/device
3857  * @hba: per-adapter instance
3858  *
3859  * Reset and recover device, host and re-establish link. This
3860  * is helpful to recover the communication in fatal error conditions.
3861  *
3862  * Returns zero on success, non-zero on failure
3863  */
3864 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
3865 {
3866         int err = 0;
3867         unsigned long flags;
3868         int retries = MAX_HOST_RESET_RETRIES;
3869
3870         do {
3871                 err = ufshcd_host_reset_and_restore(hba);
3872         } while (err && --retries);
3873
3874         /*
3875          * After reset the door-bell might be cleared, complete
3876          * outstanding requests in s/w here.
3877          */
3878         spin_lock_irqsave(hba->host->host_lock, flags);
3879         ufshcd_transfer_req_compl(hba);
3880         ufshcd_tmc_handler(hba);
3881         spin_unlock_irqrestore(hba->host->host_lock, flags);
3882
3883         return err;
3884 }
3885
3886 /**
3887  * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
3888  * @cmd - SCSI command pointer
3889  *
3890  * Returns SUCCESS/FAILED
3891  */
3892 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
3893 {
3894         int err;
3895         unsigned long flags;
3896         struct ufs_hba *hba;
3897
3898         hba = shost_priv(cmd->device->host);
3899
3900         ufshcd_hold(hba, false);
3901         /*
3902          * Check if there is any race with fatal error handling.
3903          * If so, wait for it to complete. Even though fatal error
3904          * handling does reset and restore in some cases, don't assume
3905          * anything out of it. We are just avoiding race here.
3906          */
3907         do {
3908                 spin_lock_irqsave(hba->host->host_lock, flags);
3909                 if (!(work_pending(&hba->eh_work) ||
3910                                 hba->ufshcd_state == UFSHCD_STATE_RESET))
3911                         break;
3912                 spin_unlock_irqrestore(hba->host->host_lock, flags);
3913                 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
3914                 flush_work(&hba->eh_work);
3915         } while (1);
3916
3917         hba->ufshcd_state = UFSHCD_STATE_RESET;
3918         ufshcd_set_eh_in_progress(hba);
3919         spin_unlock_irqrestore(hba->host->host_lock, flags);
3920
3921         err = ufshcd_reset_and_restore(hba);
3922
3923         spin_lock_irqsave(hba->host->host_lock, flags);
3924         if (!err) {
3925                 err = SUCCESS;
3926                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
3927         } else {
3928                 err = FAILED;
3929                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3930         }
3931         ufshcd_clear_eh_in_progress(hba);
3932         spin_unlock_irqrestore(hba->host->host_lock, flags);
3933
3934         ufshcd_release(hba);
3935         return err;
3936 }
3937
3938 /**
3939  * ufshcd_get_max_icc_level - calculate the ICC level
3940  * @sup_curr_uA: max. current supported by the regulator
3941  * @start_scan: row at the desc table to start scan from
3942  * @buff: power descriptor buffer
3943  *
3944  * Returns calculated max ICC level for specific regulator
3945  */
3946 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
3947 {
3948         int i;
3949         int curr_uA;
3950         u16 data;
3951         u16 unit;
3952
3953         for (i = start_scan; i >= 0; i--) {
3954                 data = be16_to_cpu(*((u16 *)(buff + 2*i)));
3955                 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
3956                                                 ATTR_ICC_LVL_UNIT_OFFSET;
3957                 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
3958                 switch (unit) {
3959                 case UFSHCD_NANO_AMP:
3960                         curr_uA = curr_uA / 1000;
3961                         break;
3962                 case UFSHCD_MILI_AMP:
3963                         curr_uA = curr_uA * 1000;
3964                         break;
3965                 case UFSHCD_AMP:
3966                         curr_uA = curr_uA * 1000 * 1000;
3967                         break;
3968                 case UFSHCD_MICRO_AMP:
3969                 default:
3970                         break;
3971                 }
3972                 if (sup_curr_uA >= curr_uA)
3973                         break;
3974         }
3975         if (i < 0) {
3976                 i = 0;
3977                 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
3978         }
3979
3980         return (u32)i;
3981 }
3982
3983 /**
3984  * ufshcd_calc_icc_level - calculate the max ICC level
3985  * In case regulators are not initialized we'll return 0
3986  * @hba: per-adapter instance
3987  * @desc_buf: power descriptor buffer to extract ICC levels from.
3988  * @len: length of desc_buff
3989  *
3990  * Returns calculated ICC level
3991  */
3992 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
3993                                                         u8 *desc_buf, int len)
3994 {
3995         u32 icc_level = 0;
3996
3997         if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
3998                                                 !hba->vreg_info.vccq2) {
3999                 dev_err(hba->dev,
4000                         "%s: Regulator capability was not set, actvIccLevel=%d",
4001                                                         __func__, icc_level);
4002                 goto out;
4003         }
4004
4005         if (hba->vreg_info.vcc)
4006                 icc_level = ufshcd_get_max_icc_level(
4007                                 hba->vreg_info.vcc->max_uA,
4008                                 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
4009                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
4010
4011         if (hba->vreg_info.vccq)
4012                 icc_level = ufshcd_get_max_icc_level(
4013                                 hba->vreg_info.vccq->max_uA,
4014                                 icc_level,
4015                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
4016
4017         if (hba->vreg_info.vccq2)
4018                 icc_level = ufshcd_get_max_icc_level(
4019                                 hba->vreg_info.vccq2->max_uA,
4020                                 icc_level,
4021                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
4022 out:
4023         return icc_level;
4024 }
4025
4026 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
4027 {
4028         int ret;
4029         int buff_len = QUERY_DESC_POWER_MAX_SIZE;
4030         u8 desc_buf[QUERY_DESC_POWER_MAX_SIZE];
4031
4032         ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
4033         if (ret) {
4034                 dev_err(hba->dev,
4035                         "%s: Failed reading power descriptor.len = %d ret = %d",
4036                         __func__, buff_len, ret);
4037                 return;
4038         }
4039
4040         hba->init_prefetch_data.icc_level =
4041                         ufshcd_find_max_sup_active_icc_level(hba,
4042                         desc_buf, buff_len);
4043         dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
4044                         __func__, hba->init_prefetch_data.icc_level);
4045
4046         ret = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4047                         QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
4048                         &hba->init_prefetch_data.icc_level);
4049
4050         if (ret)
4051                 dev_err(hba->dev,
4052                         "%s: Failed configuring bActiveICCLevel = %d ret = %d",
4053                         __func__, hba->init_prefetch_data.icc_level , ret);
4054
4055 }
4056
4057 /**
4058  * ufshcd_scsi_add_wlus - Adds required W-LUs
4059  * @hba: per-adapter instance
4060  *
4061  * UFS device specification requires the UFS devices to support 4 well known
4062  * logical units:
4063  *      "REPORT_LUNS" (address: 01h)
4064  *      "UFS Device" (address: 50h)
4065  *      "RPMB" (address: 44h)
4066  *      "BOOT" (address: 30h)
4067  * UFS device's power management needs to be controlled by "POWER CONDITION"
4068  * field of SSU (START STOP UNIT) command. But this "power condition" field
4069  * will take effect only when its sent to "UFS device" well known logical unit
4070  * hence we require the scsi_device instance to represent this logical unit in
4071  * order for the UFS host driver to send the SSU command for power management.
4072
4073  * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
4074  * Block) LU so user space process can control this LU. User space may also
4075  * want to have access to BOOT LU.
4076
4077  * This function adds scsi device instances for each of all well known LUs
4078  * (except "REPORT LUNS" LU).
4079  *
4080  * Returns zero on success (all required W-LUs are added successfully),
4081  * non-zero error value on failure (if failed to add any of the required W-LU).
4082  */
4083 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
4084 {
4085         int ret = 0;
4086         struct scsi_device *sdev_rpmb;
4087         struct scsi_device *sdev_boot;
4088
4089         hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
4090                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
4091         if (IS_ERR(hba->sdev_ufs_device)) {
4092                 ret = PTR_ERR(hba->sdev_ufs_device);
4093                 hba->sdev_ufs_device = NULL;
4094                 goto out;
4095         }
4096         scsi_device_put(hba->sdev_ufs_device);
4097
4098         sdev_boot = __scsi_add_device(hba->host, 0, 0,
4099                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
4100         if (IS_ERR(sdev_boot)) {
4101                 ret = PTR_ERR(sdev_boot);
4102                 goto remove_sdev_ufs_device;
4103         }
4104         scsi_device_put(sdev_boot);
4105
4106         sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
4107                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
4108         if (IS_ERR(sdev_rpmb)) {
4109                 ret = PTR_ERR(sdev_rpmb);
4110                 goto remove_sdev_boot;
4111         }
4112         scsi_device_put(sdev_rpmb);
4113         goto out;
4114
4115 remove_sdev_boot:
4116         scsi_remove_device(sdev_boot);
4117 remove_sdev_ufs_device:
4118         scsi_remove_device(hba->sdev_ufs_device);
4119 out:
4120         return ret;
4121 }
4122
4123 /**
4124  * ufshcd_probe_hba - probe hba to detect device and initialize
4125  * @hba: per-adapter instance
4126  *
4127  * Execute link-startup and verify device initialization
4128  */
4129 static int ufshcd_probe_hba(struct ufs_hba *hba)
4130 {
4131         int ret;
4132
4133         ret = ufshcd_link_startup(hba);
4134         if (ret)
4135                 goto out;
4136
4137         ufshcd_init_pwr_info(hba);
4138
4139         /* UniPro link is active now */
4140         ufshcd_set_link_active(hba);
4141
4142         ret = ufshcd_verify_dev_init(hba);
4143         if (ret)
4144                 goto out;
4145
4146         ret = ufshcd_complete_dev_init(hba);
4147         if (ret)
4148                 goto out;
4149
4150         /* UFS device is also active now */
4151         ufshcd_set_ufs_dev_active(hba);
4152         ufshcd_force_reset_auto_bkops(hba);
4153         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
4154         hba->wlun_dev_clr_ua = true;
4155
4156         if (ufshcd_get_max_pwr_mode(hba)) {
4157                 dev_err(hba->dev,
4158                         "%s: Failed getting max supported power mode\n",
4159                         __func__);
4160         } else {
4161                 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
4162                 if (ret)
4163                         dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
4164                                         __func__, ret);
4165         }
4166
4167         /*
4168          * If we are in error handling context or in power management callbacks
4169          * context, no need to scan the host
4170          */
4171         if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
4172                 bool flag;
4173
4174                 /* clear any previous UFS device information */
4175                 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
4176                 if (!ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4177                                        QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
4178                         hba->dev_info.f_power_on_wp_en = flag;
4179
4180                 if (!hba->is_init_prefetch)
4181                         ufshcd_init_icc_levels(hba);
4182
4183                 /* Add required well known logical units to scsi mid layer */
4184                 if (ufshcd_scsi_add_wlus(hba))
4185                         goto out;
4186
4187                 scsi_scan_host(hba->host);
4188                 pm_runtime_put_sync(hba->dev);
4189         }
4190
4191         if (!hba->is_init_prefetch)
4192                 hba->is_init_prefetch = true;
4193
4194         /* Resume devfreq after UFS device is detected */
4195         if (ufshcd_is_clkscaling_enabled(hba))
4196                 devfreq_resume_device(hba->devfreq);
4197
4198 out:
4199         /*
4200          * If we failed to initialize the device or the device is not
4201          * present, turn off the power/clocks etc.
4202          */
4203         if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
4204                 pm_runtime_put_sync(hba->dev);
4205                 ufshcd_hba_exit(hba);
4206         }
4207
4208         return ret;
4209 }
4210
4211 /**
4212  * ufshcd_async_scan - asynchronous execution for probing hba
4213  * @data: data pointer to pass to this function
4214  * @cookie: cookie data
4215  */
4216 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
4217 {
4218         struct ufs_hba *hba = (struct ufs_hba *)data;
4219
4220         ufshcd_probe_hba(hba);
4221 }
4222
4223 static struct scsi_host_template ufshcd_driver_template = {
4224         .module                 = THIS_MODULE,
4225         .name                   = UFSHCD,
4226         .proc_name              = UFSHCD,
4227         .queuecommand           = ufshcd_queuecommand,
4228         .slave_alloc            = ufshcd_slave_alloc,
4229         .slave_configure        = ufshcd_slave_configure,
4230         .slave_destroy          = ufshcd_slave_destroy,
4231         .change_queue_depth     = ufshcd_change_queue_depth,
4232         .eh_abort_handler       = ufshcd_abort,
4233         .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
4234         .eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
4235         .this_id                = -1,
4236         .sg_tablesize           = SG_ALL,
4237         .cmd_per_lun            = UFSHCD_CMD_PER_LUN,
4238         .can_queue              = UFSHCD_CAN_QUEUE,
4239         .max_host_blocked       = 1,
4240 };
4241
4242 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
4243                                    int ua)
4244 {
4245         int ret = 0;
4246         struct regulator *reg = vreg->reg;
4247         const char *name = vreg->name;
4248
4249         BUG_ON(!vreg);
4250
4251         ret = regulator_set_optimum_mode(reg, ua);
4252         if (ret >= 0) {
4253                 /*
4254                  * regulator_set_optimum_mode() returns new regulator
4255                  * mode upon success.
4256                  */
4257                 ret = 0;
4258         } else {
4259                 dev_err(dev, "%s: %s set optimum mode(ua=%d) failed, err=%d\n",
4260                                 __func__, name, ua, ret);
4261         }
4262
4263         return ret;
4264 }
4265
4266 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
4267                                          struct ufs_vreg *vreg)
4268 {
4269         return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
4270 }
4271
4272 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
4273                                          struct ufs_vreg *vreg)
4274 {
4275         return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
4276 }
4277
4278 static int ufshcd_config_vreg(struct device *dev,
4279                 struct ufs_vreg *vreg, bool on)
4280 {
4281         int ret = 0;
4282         struct regulator *reg = vreg->reg;
4283         const char *name = vreg->name;
4284         int min_uV, uA_load;
4285
4286         BUG_ON(!vreg);
4287
4288         if (regulator_count_voltages(reg) > 0) {
4289                 min_uV = on ? vreg->min_uV : 0;
4290                 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
4291                 if (ret) {
4292                         dev_err(dev, "%s: %s set voltage failed, err=%d\n",
4293                                         __func__, name, ret);
4294                         goto out;
4295                 }
4296
4297                 uA_load = on ? vreg->max_uA : 0;
4298                 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
4299                 if (ret)
4300                         goto out;
4301         }
4302 out:
4303         return ret;
4304 }
4305
4306 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
4307 {
4308         int ret = 0;
4309
4310         if (!vreg || vreg->enabled)
4311                 goto out;
4312
4313         ret = ufshcd_config_vreg(dev, vreg, true);
4314         if (!ret)
4315                 ret = regulator_enable(vreg->reg);
4316
4317         if (!ret)
4318                 vreg->enabled = true;
4319         else
4320                 dev_err(dev, "%s: %s enable failed, err=%d\n",
4321                                 __func__, vreg->name, ret);
4322 out:
4323         return ret;
4324 }
4325
4326 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
4327 {
4328         int ret = 0;
4329
4330         if (!vreg || !vreg->enabled)
4331                 goto out;
4332
4333         ret = regulator_disable(vreg->reg);
4334
4335         if (!ret) {
4336                 /* ignore errors on applying disable config */
4337                 ufshcd_config_vreg(dev, vreg, false);
4338                 vreg->enabled = false;
4339         } else {
4340                 dev_err(dev, "%s: %s disable failed, err=%d\n",
4341                                 __func__, vreg->name, ret);
4342         }
4343 out:
4344         return ret;
4345 }
4346
4347 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
4348 {
4349         int ret = 0;
4350         struct device *dev = hba->dev;
4351         struct ufs_vreg_info *info = &hba->vreg_info;
4352
4353         if (!info)
4354                 goto out;
4355
4356         ret = ufshcd_toggle_vreg(dev, info->vcc, on);
4357         if (ret)
4358                 goto out;
4359
4360         ret = ufshcd_toggle_vreg(dev, info->vccq, on);
4361         if (ret)
4362                 goto out;
4363
4364         ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
4365         if (ret)
4366                 goto out;
4367
4368 out:
4369         if (ret) {
4370                 ufshcd_toggle_vreg(dev, info->vccq2, false);
4371                 ufshcd_toggle_vreg(dev, info->vccq, false);
4372                 ufshcd_toggle_vreg(dev, info->vcc, false);
4373         }
4374         return ret;
4375 }
4376
4377 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
4378 {
4379         struct ufs_vreg_info *info = &hba->vreg_info;
4380
4381         if (info)
4382                 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
4383
4384         return 0;
4385 }
4386
4387 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
4388 {
4389         int ret = 0;
4390
4391         if (!vreg)
4392                 goto out;
4393
4394         vreg->reg = devm_regulator_get(dev, vreg->name);
4395         if (IS_ERR(vreg->reg)) {
4396                 ret = PTR_ERR(vreg->reg);
4397                 dev_err(dev, "%s: %s get failed, err=%d\n",
4398                                 __func__, vreg->name, ret);
4399         }
4400 out:
4401         return ret;
4402 }
4403
4404 static int ufshcd_init_vreg(struct ufs_hba *hba)
4405 {
4406         int ret = 0;
4407         struct device *dev = hba->dev;
4408         struct ufs_vreg_info *info = &hba->vreg_info;
4409
4410         if (!info)
4411                 goto out;
4412
4413         ret = ufshcd_get_vreg(dev, info->vcc);
4414         if (ret)
4415                 goto out;
4416
4417         ret = ufshcd_get_vreg(dev, info->vccq);
4418         if (ret)
4419                 goto out;
4420
4421         ret = ufshcd_get_vreg(dev, info->vccq2);
4422 out:
4423         return ret;
4424 }
4425
4426 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
4427 {
4428         struct ufs_vreg_info *info = &hba->vreg_info;
4429
4430         if (info)
4431                 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
4432
4433         return 0;
4434 }
4435
4436 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
4437                                         bool skip_ref_clk)
4438 {
4439         int ret = 0;
4440         struct ufs_clk_info *clki;
4441         struct list_head *head = &hba->clk_list_head;
4442         unsigned long flags;
4443
4444         if (!head || list_empty(head))
4445                 goto out;
4446
4447         list_for_each_entry(clki, head, list) {
4448                 if (!IS_ERR_OR_NULL(clki->clk)) {
4449                         if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
4450                                 continue;
4451
4452                         if (on && !clki->enabled) {
4453                                 ret = clk_prepare_enable(clki->clk);
4454                                 if (ret) {
4455                                         dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
4456                                                 __func__, clki->name, ret);
4457                                         goto out;
4458                                 }
4459                         } else if (!on && clki->enabled) {
4460                                 clk_disable_unprepare(clki->clk);
4461                         }
4462                         clki->enabled = on;
4463                         dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
4464                                         clki->name, on ? "en" : "dis");
4465                 }
4466         }
4467
4468         if (hba->vops && hba->vops->setup_clocks)
4469                 ret = hba->vops->setup_clocks(hba, on);
4470 out:
4471         if (ret) {
4472                 list_for_each_entry(clki, head, list) {
4473                         if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
4474                                 clk_disable_unprepare(clki->clk);
4475                 }
4476         } else if (on) {
4477                 spin_lock_irqsave(hba->host->host_lock, flags);
4478                 hba->clk_gating.state = CLKS_ON;
4479                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4480         }
4481         return ret;
4482 }
4483
4484 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
4485 {
4486         return  __ufshcd_setup_clocks(hba, on, false);
4487 }
4488
4489 static int ufshcd_init_clocks(struct ufs_hba *hba)
4490 {
4491         int ret = 0;
4492         struct ufs_clk_info *clki;
4493         struct device *dev = hba->dev;
4494         struct list_head *head = &hba->clk_list_head;
4495
4496         if (!head || list_empty(head))
4497                 goto out;
4498
4499         list_for_each_entry(clki, head, list) {
4500                 if (!clki->name)
4501                         continue;
4502
4503                 clki->clk = devm_clk_get(dev, clki->name);
4504                 if (IS_ERR(clki->clk)) {
4505                         ret = PTR_ERR(clki->clk);
4506                         dev_err(dev, "%s: %s clk get failed, %d\n",
4507                                         __func__, clki->name, ret);
4508                         goto out;
4509                 }
4510
4511                 if (clki->max_freq) {
4512                         ret = clk_set_rate(clki->clk, clki->max_freq);
4513                         if (ret) {
4514                                 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
4515                                         __func__, clki->name,
4516                                         clki->max_freq, ret);
4517                                 goto out;
4518                         }
4519                         clki->curr_freq = clki->max_freq;
4520                 }
4521                 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
4522                                 clki->name, clk_get_rate(clki->clk));
4523         }
4524 out:
4525         return ret;
4526 }
4527
4528 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
4529 {
4530         int err = 0;
4531
4532         if (!hba->vops)
4533                 goto out;
4534
4535         if (hba->vops->init) {
4536                 err = hba->vops->init(hba);
4537                 if (err)
4538                         goto out;
4539         }
4540
4541         if (hba->vops->setup_regulators) {
4542                 err = hba->vops->setup_regulators(hba, true);
4543                 if (err)
4544                         goto out_exit;
4545         }
4546
4547         goto out;
4548
4549 out_exit:
4550         if (hba->vops->exit)
4551                 hba->vops->exit(hba);
4552 out:
4553         if (err)
4554                 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
4555                         __func__, hba->vops ? hba->vops->name : "", err);
4556         return err;
4557 }
4558
4559 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
4560 {
4561         if (!hba->vops)
4562                 return;
4563
4564         if (hba->vops->setup_clocks)
4565                 hba->vops->setup_clocks(hba, false);
4566
4567         if (hba->vops->setup_regulators)
4568                 hba->vops->setup_regulators(hba, false);
4569
4570         if (hba->vops->exit)
4571                 hba->vops->exit(hba);
4572 }
4573
4574 static int ufshcd_hba_init(struct ufs_hba *hba)
4575 {
4576         int err;
4577
4578         /*
4579          * Handle host controller power separately from the UFS device power
4580          * rails as it will help controlling the UFS host controller power
4581          * collapse easily which is different than UFS device power collapse.
4582          * Also, enable the host controller power before we go ahead with rest
4583          * of the initialization here.
4584          */
4585         err = ufshcd_init_hba_vreg(hba);
4586         if (err)
4587                 goto out;
4588
4589         err = ufshcd_setup_hba_vreg(hba, true);
4590         if (err)
4591                 goto out;
4592
4593         err = ufshcd_init_clocks(hba);
4594         if (err)
4595                 goto out_disable_hba_vreg;
4596
4597         err = ufshcd_setup_clocks(hba, true);
4598         if (err)
4599                 goto out_disable_hba_vreg;
4600
4601         err = ufshcd_init_vreg(hba);
4602         if (err)
4603                 goto out_disable_clks;
4604
4605         err = ufshcd_setup_vreg(hba, true);
4606         if (err)
4607                 goto out_disable_clks;
4608
4609         err = ufshcd_variant_hba_init(hba);
4610         if (err)
4611                 goto out_disable_vreg;
4612
4613         hba->is_powered = true;
4614         goto out;
4615
4616 out_disable_vreg:
4617         ufshcd_setup_vreg(hba, false);
4618 out_disable_clks:
4619         ufshcd_setup_clocks(hba, false);
4620 out_disable_hba_vreg:
4621         ufshcd_setup_hba_vreg(hba, false);
4622 out:
4623         return err;
4624 }
4625
4626 static void ufshcd_hba_exit(struct ufs_hba *hba)
4627 {
4628         if (hba->is_powered) {
4629                 ufshcd_variant_hba_exit(hba);
4630                 ufshcd_setup_vreg(hba, false);
4631                 ufshcd_setup_clocks(hba, false);
4632                 ufshcd_setup_hba_vreg(hba, false);
4633                 hba->is_powered = false;
4634         }
4635 }
4636
4637 static int
4638 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
4639 {
4640         unsigned char cmd[6] = {REQUEST_SENSE,
4641                                 0,
4642                                 0,
4643                                 0,
4644                                 SCSI_SENSE_BUFFERSIZE,
4645                                 0};
4646         char *buffer;
4647         int ret;
4648
4649         buffer = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
4650         if (!buffer) {
4651                 ret = -ENOMEM;
4652                 goto out;
4653         }
4654
4655         ret = scsi_execute_req_flags(sdp, cmd, DMA_FROM_DEVICE, buffer,
4656                                 SCSI_SENSE_BUFFERSIZE, NULL,
4657                                 msecs_to_jiffies(1000), 3, NULL, REQ_PM);
4658         if (ret)
4659                 pr_err("%s: failed with err %d\n", __func__, ret);
4660
4661         kfree(buffer);
4662 out:
4663         return ret;
4664 }
4665
4666 /**
4667  * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
4668  *                           power mode
4669  * @hba: per adapter instance
4670  * @pwr_mode: device power mode to set
4671  *
4672  * Returns 0 if requested power mode is set successfully
4673  * Returns non-zero if failed to set the requested power mode
4674  */
4675 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
4676                                      enum ufs_dev_pwr_mode pwr_mode)
4677 {
4678         unsigned char cmd[6] = { START_STOP };
4679         struct scsi_sense_hdr sshdr;
4680         struct scsi_device *sdp;
4681         unsigned long flags;
4682         int ret;
4683
4684         spin_lock_irqsave(hba->host->host_lock, flags);
4685         sdp = hba->sdev_ufs_device;
4686         if (sdp) {
4687                 ret = scsi_device_get(sdp);
4688                 if (!ret && !scsi_device_online(sdp)) {
4689                         ret = -ENODEV;
4690                         scsi_device_put(sdp);
4691                 }
4692         } else {
4693                 ret = -ENODEV;
4694         }
4695         spin_unlock_irqrestore(hba->host->host_lock, flags);
4696
4697         if (ret)
4698                 return ret;
4699
4700         /*
4701          * If scsi commands fail, the scsi mid-layer schedules scsi error-
4702          * handling, which would wait for host to be resumed. Since we know
4703          * we are functional while we are here, skip host resume in error
4704          * handling context.
4705          */
4706         hba->host->eh_noresume = 1;
4707         if (hba->wlun_dev_clr_ua) {
4708                 ret = ufshcd_send_request_sense(hba, sdp);
4709                 if (ret)
4710                         goto out;
4711                 /* Unit attention condition is cleared now */
4712                 hba->wlun_dev_clr_ua = false;
4713         }
4714
4715         cmd[4] = pwr_mode << 4;
4716
4717         /*
4718          * Current function would be generally called from the power management
4719          * callbacks hence set the REQ_PM flag so that it doesn't resume the
4720          * already suspended childs.
4721          */
4722         ret = scsi_execute_req_flags(sdp, cmd, DMA_NONE, NULL, 0, &sshdr,
4723                                      START_STOP_TIMEOUT, 0, NULL, REQ_PM);
4724         if (ret) {
4725                 sdev_printk(KERN_WARNING, sdp,
4726                           "START_STOP failed for power mode: %d\n", pwr_mode);
4727                 scsi_show_result(ret);
4728                 if (driver_byte(ret) & DRIVER_SENSE) {
4729                         scsi_show_sense_hdr(&sshdr);
4730                         scsi_show_extd_sense(sshdr.asc, sshdr.ascq);
4731                 }
4732         }
4733
4734         if (!ret)
4735                 hba->curr_dev_pwr_mode = pwr_mode;
4736 out:
4737         scsi_device_put(sdp);
4738         hba->host->eh_noresume = 0;
4739         return ret;
4740 }
4741
4742 static int ufshcd_link_state_transition(struct ufs_hba *hba,
4743                                         enum uic_link_state req_link_state,
4744                                         int check_for_bkops)
4745 {
4746         int ret = 0;
4747
4748         if (req_link_state == hba->uic_link_state)
4749                 return 0;
4750
4751         if (req_link_state == UIC_LINK_HIBERN8_STATE) {
4752                 ret = ufshcd_uic_hibern8_enter(hba);
4753                 if (!ret)
4754                         ufshcd_set_link_hibern8(hba);
4755                 else
4756                         goto out;
4757         }
4758         /*
4759          * If autobkops is enabled, link can't be turned off because
4760          * turning off the link would also turn off the device.
4761          */
4762         else if ((req_link_state == UIC_LINK_OFF_STATE) &&
4763                    (!check_for_bkops || (check_for_bkops &&
4764                     !hba->auto_bkops_enabled))) {
4765                 /*
4766                  * Change controller state to "reset state" which
4767                  * should also put the link in off/reset state
4768                  */
4769                 ufshcd_hba_stop(hba);
4770                 /*
4771                  * TODO: Check if we need any delay to make sure that
4772                  * controller is reset
4773                  */
4774                 ufshcd_set_link_off(hba);
4775         }
4776
4777 out:
4778         return ret;
4779 }
4780
4781 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
4782 {
4783         /*
4784          * If UFS device is either in UFS_Sleep turn off VCC rail to save some
4785          * power.
4786          *
4787          * If UFS device and link is in OFF state, all power supplies (VCC,
4788          * VCCQ, VCCQ2) can be turned off if power on write protect is not
4789          * required. If UFS link is inactive (Hibern8 or OFF state) and device
4790          * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
4791          *
4792          * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
4793          * in low power state which would save some power.
4794          */
4795         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
4796             !hba->dev_info.is_lu_power_on_wp) {
4797                 ufshcd_setup_vreg(hba, false);
4798         } else if (!ufshcd_is_ufs_dev_active(hba)) {
4799                 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
4800                 if (!ufshcd_is_link_active(hba)) {
4801                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
4802                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
4803                 }
4804         }
4805 }
4806
4807 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
4808 {
4809         int ret = 0;
4810
4811         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
4812             !hba->dev_info.is_lu_power_on_wp) {
4813                 ret = ufshcd_setup_vreg(hba, true);
4814         } else if (!ufshcd_is_ufs_dev_active(hba)) {
4815                 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
4816                 if (!ret && !ufshcd_is_link_active(hba)) {
4817                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
4818                         if (ret)
4819                                 goto vcc_disable;
4820                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
4821                         if (ret)
4822                                 goto vccq_lpm;
4823                 }
4824         }
4825         goto out;
4826
4827 vccq_lpm:
4828         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
4829 vcc_disable:
4830         ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
4831 out:
4832         return ret;
4833 }
4834
4835 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
4836 {
4837         if (ufshcd_is_link_off(hba))
4838                 ufshcd_setup_hba_vreg(hba, false);
4839 }
4840
4841 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
4842 {
4843         if (ufshcd_is_link_off(hba))
4844                 ufshcd_setup_hba_vreg(hba, true);
4845 }
4846
4847 /**
4848  * ufshcd_suspend - helper function for suspend operations
4849  * @hba: per adapter instance
4850  * @pm_op: desired low power operation type
4851  *
4852  * This function will try to put the UFS device and link into low power
4853  * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
4854  * (System PM level).
4855  *
4856  * If this function is called during shutdown, it will make sure that
4857  * both UFS device and UFS link is powered off.
4858  *
4859  * NOTE: UFS device & link must be active before we enter in this function.
4860  *
4861  * Returns 0 for success and non-zero for failure
4862  */
4863 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
4864 {
4865         int ret = 0;
4866         enum ufs_pm_level pm_lvl;
4867         enum ufs_dev_pwr_mode req_dev_pwr_mode;
4868         enum uic_link_state req_link_state;
4869
4870         hba->pm_op_in_progress = 1;
4871         if (!ufshcd_is_shutdown_pm(pm_op)) {
4872                 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
4873                          hba->rpm_lvl : hba->spm_lvl;
4874                 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
4875                 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
4876         } else {
4877                 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
4878                 req_link_state = UIC_LINK_OFF_STATE;
4879         }
4880
4881         /*
4882          * If we can't transition into any of the low power modes
4883          * just gate the clocks.
4884          */
4885         ufshcd_hold(hba, false);
4886         hba->clk_gating.is_suspended = true;
4887
4888         if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
4889                         req_link_state == UIC_LINK_ACTIVE_STATE) {
4890                 goto disable_clks;
4891         }
4892
4893         if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
4894             (req_link_state == hba->uic_link_state))
4895                 goto out;
4896
4897         /* UFS device & link must be active before we enter in this function */
4898         if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
4899                 ret = -EINVAL;
4900                 goto out;
4901         }
4902
4903         if (ufshcd_is_runtime_pm(pm_op)) {
4904                 if (ufshcd_can_autobkops_during_suspend(hba)) {
4905                         /*
4906                          * The device is idle with no requests in the queue,
4907                          * allow background operations if bkops status shows
4908                          * that performance might be impacted.
4909                          */
4910                         ret = ufshcd_urgent_bkops(hba);
4911                         if (ret)
4912                                 goto enable_gating;
4913                 } else {
4914                         /* make sure that auto bkops is disabled */
4915                         ufshcd_disable_auto_bkops(hba);
4916                 }
4917         }
4918
4919         if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
4920              ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
4921                !ufshcd_is_runtime_pm(pm_op))) {
4922                 /* ensure that bkops is disabled */
4923                 ufshcd_disable_auto_bkops(hba);
4924                 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
4925                 if (ret)
4926                         goto enable_gating;
4927         }
4928
4929         ret = ufshcd_link_state_transition(hba, req_link_state, 1);
4930         if (ret)
4931                 goto set_dev_active;
4932
4933         ufshcd_vreg_set_lpm(hba);
4934
4935 disable_clks:
4936         /*
4937          * The clock scaling needs access to controller registers. Hence, Wait
4938          * for pending clock scaling work to be done before clocks are
4939          * turned off.
4940          */
4941         if (ufshcd_is_clkscaling_enabled(hba)) {
4942                 devfreq_suspend_device(hba->devfreq);
4943                 hba->clk_scaling.window_start_t = 0;
4944         }
4945         /*
4946          * Call vendor specific suspend callback. As these callbacks may access
4947          * vendor specific host controller register space call them before the
4948          * host clocks are ON.
4949          */
4950         if (hba->vops && hba->vops->suspend) {
4951                 ret = hba->vops->suspend(hba, pm_op);
4952                 if (ret)
4953                         goto set_link_active;
4954         }
4955
4956         if (hba->vops && hba->vops->setup_clocks) {
4957                 ret = hba->vops->setup_clocks(hba, false);
4958                 if (ret)
4959                         goto vops_resume;
4960         }
4961
4962         if (!ufshcd_is_link_active(hba))
4963                 ufshcd_setup_clocks(hba, false);
4964         else
4965                 /* If link is active, device ref_clk can't be switched off */
4966                 __ufshcd_setup_clocks(hba, false, true);
4967
4968         hba->clk_gating.state = CLKS_OFF;
4969         /*
4970          * Disable the host irq as host controller as there won't be any
4971          * host controller trasanction expected till resume.
4972          */
4973         ufshcd_disable_irq(hba);
4974         /* Put the host controller in low power mode if possible */
4975         ufshcd_hba_vreg_set_lpm(hba);
4976         goto out;
4977
4978 vops_resume:
4979         if (hba->vops && hba->vops->resume)
4980                 hba->vops->resume(hba, pm_op);
4981 set_link_active:
4982         ufshcd_vreg_set_hpm(hba);
4983         if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
4984                 ufshcd_set_link_active(hba);
4985         else if (ufshcd_is_link_off(hba))
4986                 ufshcd_host_reset_and_restore(hba);
4987 set_dev_active:
4988         if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
4989                 ufshcd_disable_auto_bkops(hba);
4990 enable_gating:
4991         hba->clk_gating.is_suspended = false;
4992         ufshcd_release(hba);
4993 out:
4994         hba->pm_op_in_progress = 0;
4995         return ret;
4996 }
4997
4998 /**
4999  * ufshcd_resume - helper function for resume operations
5000  * @hba: per adapter instance
5001  * @pm_op: runtime PM or system PM
5002  *
5003  * This function basically brings the UFS device, UniPro link and controller
5004  * to active state.
5005  *
5006  * Returns 0 for success and non-zero for failure
5007  */
5008 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
5009 {
5010         int ret;
5011         enum uic_link_state old_link_state;
5012
5013         hba->pm_op_in_progress = 1;
5014         old_link_state = hba->uic_link_state;
5015
5016         ufshcd_hba_vreg_set_hpm(hba);
5017         /* Make sure clocks are enabled before accessing controller */
5018         ret = ufshcd_setup_clocks(hba, true);
5019         if (ret)
5020                 goto out;
5021
5022         /* enable the host irq as host controller would be active soon */
5023         ret = ufshcd_enable_irq(hba);
5024         if (ret)
5025                 goto disable_irq_and_vops_clks;
5026
5027         ret = ufshcd_vreg_set_hpm(hba);
5028         if (ret)
5029                 goto disable_irq_and_vops_clks;
5030
5031         /*
5032          * Call vendor specific resume callback. As these callbacks may access
5033          * vendor specific host controller register space call them when the
5034          * host clocks are ON.
5035          */
5036         if (hba->vops && hba->vops->resume) {
5037                 ret = hba->vops->resume(hba, pm_op);
5038                 if (ret)
5039                         goto disable_vreg;
5040         }
5041
5042         if (ufshcd_is_link_hibern8(hba)) {
5043                 ret = ufshcd_uic_hibern8_exit(hba);
5044                 if (!ret)
5045                         ufshcd_set_link_active(hba);
5046                 else
5047                         goto vendor_suspend;
5048         } else if (ufshcd_is_link_off(hba)) {
5049                 ret = ufshcd_host_reset_and_restore(hba);
5050                 /*
5051                  * ufshcd_host_reset_and_restore() should have already
5052                  * set the link state as active
5053                  */
5054                 if (ret || !ufshcd_is_link_active(hba))
5055                         goto vendor_suspend;
5056         }
5057
5058         if (!ufshcd_is_ufs_dev_active(hba)) {
5059                 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
5060                 if (ret)
5061                         goto set_old_link_state;
5062         }
5063
5064         /*
5065          * If BKOPs operations are urgently needed at this moment then
5066          * keep auto-bkops enabled or else disable it.
5067          */
5068         ufshcd_urgent_bkops(hba);
5069         hba->clk_gating.is_suspended = false;
5070
5071         if (ufshcd_is_clkscaling_enabled(hba))
5072                 devfreq_resume_device(hba->devfreq);
5073
5074         /* Schedule clock gating in case of no access to UFS device yet */
5075         ufshcd_release(hba);
5076         goto out;
5077
5078 set_old_link_state:
5079         ufshcd_link_state_transition(hba, old_link_state, 0);
5080 vendor_suspend:
5081         if (hba->vops && hba->vops->suspend)
5082                 hba->vops->suspend(hba, pm_op);
5083 disable_vreg:
5084         ufshcd_vreg_set_lpm(hba);
5085 disable_irq_and_vops_clks:
5086         ufshcd_disable_irq(hba);
5087         ufshcd_setup_clocks(hba, false);
5088 out:
5089         hba->pm_op_in_progress = 0;
5090         return ret;
5091 }
5092
5093 /**
5094  * ufshcd_system_suspend - system suspend routine
5095  * @hba: per adapter instance
5096  * @pm_op: runtime PM or system PM
5097  *
5098  * Check the description of ufshcd_suspend() function for more details.
5099  *
5100  * Returns 0 for success and non-zero for failure
5101  */
5102 int ufshcd_system_suspend(struct ufs_hba *hba)
5103 {
5104         int ret = 0;
5105
5106         if (!hba || !hba->is_powered)
5107                 return 0;
5108
5109         if (pm_runtime_suspended(hba->dev)) {
5110                 if (hba->rpm_lvl == hba->spm_lvl)
5111                         /*
5112                          * There is possibility that device may still be in
5113                          * active state during the runtime suspend.
5114                          */
5115                         if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
5116                             hba->curr_dev_pwr_mode) && !hba->auto_bkops_enabled)
5117                                 goto out;
5118
5119                 /*
5120                  * UFS device and/or UFS link low power states during runtime
5121                  * suspend seems to be different than what is expected during
5122                  * system suspend. Hence runtime resume the devic & link and
5123                  * let the system suspend low power states to take effect.
5124                  * TODO: If resume takes longer time, we might have optimize
5125                  * it in future by not resuming everything if possible.
5126                  */
5127                 ret = ufshcd_runtime_resume(hba);
5128                 if (ret)
5129                         goto out;
5130         }
5131
5132         ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
5133 out:
5134         if (!ret)
5135                 hba->is_sys_suspended = true;
5136         return ret;
5137 }
5138 EXPORT_SYMBOL(ufshcd_system_suspend);
5139
5140 /**
5141  * ufshcd_system_resume - system resume routine
5142  * @hba: per adapter instance
5143  *
5144  * Returns 0 for success and non-zero for failure
5145  */
5146
5147 int ufshcd_system_resume(struct ufs_hba *hba)
5148 {
5149         if (!hba || !hba->is_powered || pm_runtime_suspended(hba->dev))
5150                 /*
5151                  * Let the runtime resume take care of resuming
5152                  * if runtime suspended.
5153                  */
5154                 return 0;
5155
5156         return ufshcd_resume(hba, UFS_SYSTEM_PM);
5157 }
5158 EXPORT_SYMBOL(ufshcd_system_resume);
5159
5160 /**
5161  * ufshcd_runtime_suspend - runtime suspend routine
5162  * @hba: per adapter instance
5163  *
5164  * Check the description of ufshcd_suspend() function for more details.
5165  *
5166  * Returns 0 for success and non-zero for failure
5167  */
5168 int ufshcd_runtime_suspend(struct ufs_hba *hba)
5169 {
5170         if (!hba || !hba->is_powered)
5171                 return 0;
5172
5173         return ufshcd_suspend(hba, UFS_RUNTIME_PM);
5174 }
5175 EXPORT_SYMBOL(ufshcd_runtime_suspend);
5176
5177 /**
5178  * ufshcd_runtime_resume - runtime resume routine
5179  * @hba: per adapter instance
5180  *
5181  * This function basically brings the UFS device, UniPro link and controller
5182  * to active state. Following operations are done in this function:
5183  *
5184  * 1. Turn on all the controller related clocks
5185  * 2. Bring the UniPro link out of Hibernate state
5186  * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
5187  *    to active state.
5188  * 4. If auto-bkops is enabled on the device, disable it.
5189  *
5190  * So following would be the possible power state after this function return
5191  * successfully:
5192  *      S1: UFS device in Active state with VCC rail ON
5193  *          UniPro link in Active state
5194  *          All the UFS/UniPro controller clocks are ON
5195  *
5196  * Returns 0 for success and non-zero for failure
5197  */
5198 int ufshcd_runtime_resume(struct ufs_hba *hba)
5199 {
5200         if (!hba || !hba->is_powered)
5201                 return 0;
5202         else
5203                 return ufshcd_resume(hba, UFS_RUNTIME_PM);
5204 }
5205 EXPORT_SYMBOL(ufshcd_runtime_resume);
5206
5207 int ufshcd_runtime_idle(struct ufs_hba *hba)
5208 {
5209         return 0;
5210 }
5211 EXPORT_SYMBOL(ufshcd_runtime_idle);
5212
5213 /**
5214  * ufshcd_shutdown - shutdown routine
5215  * @hba: per adapter instance
5216  *
5217  * This function would power off both UFS device and UFS link.
5218  *
5219  * Returns 0 always to allow force shutdown even in case of errors.
5220  */
5221 int ufshcd_shutdown(struct ufs_hba *hba)
5222 {
5223         int ret = 0;
5224
5225         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
5226                 goto out;
5227
5228         if (pm_runtime_suspended(hba->dev)) {
5229                 ret = ufshcd_runtime_resume(hba);
5230                 if (ret)
5231                         goto out;
5232         }
5233
5234         ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
5235 out:
5236         if (ret)
5237                 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
5238         /* allow force shutdown even in case of errors */
5239         return 0;
5240 }
5241 EXPORT_SYMBOL(ufshcd_shutdown);
5242
5243 /**
5244  * ufshcd_remove - de-allocate SCSI host and host memory space
5245  *              data structure memory
5246  * @hba - per adapter instance
5247  */
5248 void ufshcd_remove(struct ufs_hba *hba)
5249 {
5250         scsi_remove_host(hba->host);
5251         /* disable interrupts */
5252         ufshcd_disable_intr(hba, hba->intr_mask);
5253         ufshcd_hba_stop(hba);
5254
5255         scsi_host_put(hba->host);
5256
5257         ufshcd_exit_clk_gating(hba);
5258         if (ufshcd_is_clkscaling_enabled(hba))
5259                 devfreq_remove_device(hba->devfreq);
5260         ufshcd_hba_exit(hba);
5261 }
5262 EXPORT_SYMBOL_GPL(ufshcd_remove);
5263
5264 /**
5265  * ufshcd_set_dma_mask - Set dma mask based on the controller
5266  *                       addressing capability
5267  * @hba: per adapter instance
5268  *
5269  * Returns 0 for success, non-zero for failure
5270  */
5271 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
5272 {
5273         if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
5274                 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
5275                         return 0;
5276         }
5277         return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
5278 }
5279
5280 /**
5281  * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
5282  * @dev: pointer to device handle
5283  * @hba_handle: driver private handle
5284  * Returns 0 on success, non-zero value on failure
5285  */
5286 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
5287 {
5288         struct Scsi_Host *host;
5289         struct ufs_hba *hba;
5290         int err = 0;
5291
5292         if (!dev) {
5293                 dev_err(dev,
5294                 "Invalid memory reference for dev is NULL\n");
5295                 err = -ENODEV;
5296                 goto out_error;
5297         }
5298
5299         host = scsi_host_alloc(&ufshcd_driver_template,
5300                                 sizeof(struct ufs_hba));
5301         if (!host) {
5302                 dev_err(dev, "scsi_host_alloc failed\n");
5303                 err = -ENOMEM;
5304                 goto out_error;
5305         }
5306         hba = shost_priv(host);
5307         hba->host = host;
5308         hba->dev = dev;
5309         *hba_handle = hba;
5310
5311 out_error:
5312         return err;
5313 }
5314 EXPORT_SYMBOL(ufshcd_alloc_host);
5315
5316 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
5317 {
5318         int ret = 0;
5319         struct ufs_clk_info *clki;
5320         struct list_head *head = &hba->clk_list_head;
5321
5322         if (!head || list_empty(head))
5323                 goto out;
5324
5325         list_for_each_entry(clki, head, list) {
5326                 if (!IS_ERR_OR_NULL(clki->clk)) {
5327                         if (scale_up && clki->max_freq) {
5328                                 if (clki->curr_freq == clki->max_freq)
5329                                         continue;
5330                                 ret = clk_set_rate(clki->clk, clki->max_freq);
5331                                 if (ret) {
5332                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
5333                                                 __func__, clki->name,
5334                                                 clki->max_freq, ret);
5335                                         break;
5336                                 }
5337                                 clki->curr_freq = clki->max_freq;
5338
5339                         } else if (!scale_up && clki->min_freq) {
5340                                 if (clki->curr_freq == clki->min_freq)
5341                                         continue;
5342                                 ret = clk_set_rate(clki->clk, clki->min_freq);
5343                                 if (ret) {
5344                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
5345                                                 __func__, clki->name,
5346                                                 clki->min_freq, ret);
5347                                         break;
5348                                 }
5349                                 clki->curr_freq = clki->min_freq;
5350                         }
5351                 }
5352                 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
5353                                 clki->name, clk_get_rate(clki->clk));
5354         }
5355         if (hba->vops->clk_scale_notify)
5356                 hba->vops->clk_scale_notify(hba);
5357 out:
5358         return ret;
5359 }
5360
5361 static int ufshcd_devfreq_target(struct device *dev,
5362                                 unsigned long *freq, u32 flags)
5363 {
5364         int err = 0;
5365         struct ufs_hba *hba = dev_get_drvdata(dev);
5366
5367         if (!ufshcd_is_clkscaling_enabled(hba))
5368                 return -EINVAL;
5369
5370         if (*freq == UINT_MAX)
5371                 err = ufshcd_scale_clks(hba, true);
5372         else if (*freq == 0)
5373                 err = ufshcd_scale_clks(hba, false);
5374
5375         return err;
5376 }
5377
5378 static int ufshcd_devfreq_get_dev_status(struct device *dev,
5379                 struct devfreq_dev_status *stat)
5380 {
5381         struct ufs_hba *hba = dev_get_drvdata(dev);
5382         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
5383         unsigned long flags;
5384
5385         if (!ufshcd_is_clkscaling_enabled(hba))
5386                 return -EINVAL;
5387
5388         memset(stat, 0, sizeof(*stat));
5389
5390         spin_lock_irqsave(hba->host->host_lock, flags);
5391         if (!scaling->window_start_t)
5392                 goto start_window;
5393
5394         if (scaling->is_busy_started)
5395                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
5396                                         scaling->busy_start_t));
5397
5398         stat->total_time = jiffies_to_usecs((long)jiffies -
5399                                 (long)scaling->window_start_t);
5400         stat->busy_time = scaling->tot_busy_t;
5401 start_window:
5402         scaling->window_start_t = jiffies;
5403         scaling->tot_busy_t = 0;
5404
5405         if (hba->outstanding_reqs) {
5406                 scaling->busy_start_t = ktime_get();
5407                 scaling->is_busy_started = true;
5408         } else {
5409                 scaling->busy_start_t = ktime_set(0, 0);
5410                 scaling->is_busy_started = false;
5411         }
5412         spin_unlock_irqrestore(hba->host->host_lock, flags);
5413         return 0;
5414 }
5415
5416 static struct devfreq_dev_profile ufs_devfreq_profile = {
5417         .polling_ms     = 100,
5418         .target         = ufshcd_devfreq_target,
5419         .get_dev_status = ufshcd_devfreq_get_dev_status,
5420 };
5421
5422 /**
5423  * ufshcd_init - Driver initialization routine
5424  * @hba: per-adapter instance
5425  * @mmio_base: base register address
5426  * @irq: Interrupt line of device
5427  * Returns 0 on success, non-zero value on failure
5428  */
5429 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
5430 {
5431         int err;
5432         struct Scsi_Host *host = hba->host;
5433         struct device *dev = hba->dev;
5434
5435         if (!mmio_base) {
5436                 dev_err(hba->dev,
5437                 "Invalid memory reference for mmio_base is NULL\n");
5438                 err = -ENODEV;
5439                 goto out_error;
5440         }
5441
5442         hba->mmio_base = mmio_base;
5443         hba->irq = irq;
5444
5445         err = ufshcd_hba_init(hba);
5446         if (err)
5447                 goto out_error;
5448
5449         /* Read capabilities registers */
5450         ufshcd_hba_capabilities(hba);
5451
5452         /* Get UFS version supported by the controller */
5453         hba->ufs_version = ufshcd_get_ufs_version(hba);
5454
5455         /* Get Interrupt bit mask per version */
5456         hba->intr_mask = ufshcd_get_intr_mask(hba);
5457
5458         err = ufshcd_set_dma_mask(hba);
5459         if (err) {
5460                 dev_err(hba->dev, "set dma mask failed\n");
5461                 goto out_disable;
5462         }
5463
5464         /* Allocate memory for host memory space */
5465         err = ufshcd_memory_alloc(hba);
5466         if (err) {
5467                 dev_err(hba->dev, "Memory allocation failed\n");
5468                 goto out_disable;
5469         }
5470
5471         /* Configure LRB */
5472         ufshcd_host_memory_configure(hba);
5473
5474         host->can_queue = hba->nutrs;
5475         host->cmd_per_lun = hba->nutrs;
5476         host->max_id = UFSHCD_MAX_ID;
5477         host->max_lun = UFS_MAX_LUNS;
5478         host->max_channel = UFSHCD_MAX_CHANNEL;
5479         host->unique_id = host->host_no;
5480         host->max_cmd_len = MAX_CDB_SIZE;
5481
5482         hba->max_pwr_info.is_valid = false;
5483
5484         /* Initailize wait queue for task management */
5485         init_waitqueue_head(&hba->tm_wq);
5486         init_waitqueue_head(&hba->tm_tag_wq);
5487
5488         /* Initialize work queues */
5489         INIT_WORK(&hba->eh_work, ufshcd_err_handler);
5490         INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
5491
5492         /* Initialize UIC command mutex */
5493         mutex_init(&hba->uic_cmd_mutex);
5494
5495         /* Initialize mutex for device management commands */
5496         mutex_init(&hba->dev_cmd.lock);
5497
5498         /* Initialize device management tag acquire wait queue */
5499         init_waitqueue_head(&hba->dev_cmd.tag_wq);
5500
5501         ufshcd_init_clk_gating(hba);
5502         /* IRQ registration */
5503         err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
5504         if (err) {
5505                 dev_err(hba->dev, "request irq failed\n");
5506                 goto exit_gating;
5507         } else {
5508                 hba->is_irq_enabled = true;
5509         }
5510
5511         /* Enable SCSI tag mapping */
5512         err = scsi_init_shared_tag_map(host, host->can_queue);
5513         if (err) {
5514                 dev_err(hba->dev, "init shared queue failed\n");
5515                 goto exit_gating;
5516         }
5517
5518         err = scsi_add_host(host, hba->dev);
5519         if (err) {
5520                 dev_err(hba->dev, "scsi_add_host failed\n");
5521                 goto exit_gating;
5522         }
5523
5524         /* Host controller enable */
5525         err = ufshcd_hba_enable(hba);
5526         if (err) {
5527                 dev_err(hba->dev, "Host controller enable failed\n");
5528                 goto out_remove_scsi_host;
5529         }
5530
5531         if (ufshcd_is_clkscaling_enabled(hba)) {
5532                 hba->devfreq = devfreq_add_device(dev, &ufs_devfreq_profile,
5533                                                    "simple_ondemand", NULL);
5534                 if (IS_ERR(hba->devfreq)) {
5535                         dev_err(hba->dev, "Unable to register with devfreq %ld\n",
5536                                         PTR_ERR(hba->devfreq));
5537                         goto out_remove_scsi_host;
5538                 }
5539                 /* Suspend devfreq until the UFS device is detected */
5540                 devfreq_suspend_device(hba->devfreq);
5541                 hba->clk_scaling.window_start_t = 0;
5542         }
5543
5544         /* Hold auto suspend until async scan completes */
5545         pm_runtime_get_sync(dev);
5546
5547         /*
5548          * The device-initialize-sequence hasn't been invoked yet.
5549          * Set the device to power-off state
5550          */
5551         ufshcd_set_ufs_dev_poweroff(hba);
5552
5553         async_schedule(ufshcd_async_scan, hba);
5554
5555         return 0;
5556
5557 out_remove_scsi_host:
5558         scsi_remove_host(hba->host);
5559 exit_gating:
5560         ufshcd_exit_clk_gating(hba);
5561 out_disable:
5562         hba->is_irq_enabled = false;
5563         scsi_host_put(host);
5564         ufshcd_hba_exit(hba);
5565 out_error:
5566         return err;
5567 }
5568 EXPORT_SYMBOL_GPL(ufshcd_init);
5569
5570 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
5571 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
5572 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
5573 MODULE_LICENSE("GPL");
5574 MODULE_VERSION(UFSHCD_DRIVER_VERSION);