1 /***********************************
3 ************************************/
7 #define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
17 struct bcm_packettosend {
18 struct bcm_leader Leader;
22 struct bcm_control_packet {
25 struct bcm_control_packet *next;
28 struct bcm_link_request {
29 struct bcm_leader Leader;
33 #define MAX_IP_RANGE_LENGTH 4
34 #define MAX_PORT_RANGE 4
35 #define MAX_PROTOCOL_LENGTH 32
36 #define IPV6_ADDRESS_SIZEINBYTES 0x10
40 /* Source Ip Address Range */
41 ULONG ulIpv4Addr[MAX_IP_RANGE_LENGTH];
42 /* Source Ip Mask Address Range */
43 ULONG ulIpv4Mask[MAX_IP_RANGE_LENGTH];
46 ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4]; /* Source Ip Address Range */
47 ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4]; /* Source Ip Mask Address Range */
50 UCHAR ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
51 UCHAR ucIpv4Mask[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
54 UCHAR ucIpv6Address[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
55 UCHAR ucIpv6Mask[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
59 struct bcm_hdr_suppression_contextinfo {
60 UCHAR ucaHdrSuppressionInBuf[MAX_PHS_LENGTHS]; /* Intermediate buffer to accumulate pkt Header for PHS */
61 UCHAR ucaHdrSuppressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN]; /* Intermediate buffer containing pkt Header after PHS */
64 struct bcm_classifier_rule {
67 B_UINT16 uiClassifierRuleIndex;
70 B_UINT8 u8ClassifierRulePriority; /* This field detemines the Classifier Priority */
71 union u_ip_address stSrcIpAddress;
72 UCHAR ucIPSourceAddressLength; /* Ip Source Address Length */
74 union u_ip_address stDestIpAddress;
75 UCHAR ucIPDestinationAddressLength; /* Ip Destination Address Length */
76 UCHAR ucIPTypeOfServiceLength; /* Type of service Length */
77 UCHAR ucTosLow; /* Tos Low */
78 UCHAR ucTosHigh; /* Tos High */
79 UCHAR ucTosMask; /* Tos Mask */
81 UCHAR ucProtocolLength; /* protocol Length */
82 UCHAR ucProtocol[MAX_PROTOCOL_LENGTH]; /* protocol Length */
83 USHORT usSrcPortRangeLo[MAX_PORT_RANGE];
84 USHORT usSrcPortRangeHi[MAX_PORT_RANGE];
85 UCHAR ucSrcPortRangeLength;
87 USHORT usDestPortRangeLo[MAX_PORT_RANGE];
88 USHORT usDestPortRangeHi[MAX_PORT_RANGE];
89 UCHAR ucDestPortRangeLength;
96 /* For IPv6 Addressing */
100 struct bcm_phs_rule sPhsRule;
101 UCHAR u8AssociatedPHSI;
103 /* Classification fields for ETH CS */
104 UCHAR ucEthCSSrcMACLen;
105 UCHAR au8EThCSSrcMAC[MAC_ADDRESS_SIZE];
106 UCHAR au8EThCSSrcMACMask[MAC_ADDRESS_SIZE];
107 UCHAR ucEthCSDestMACLen;
108 UCHAR au8EThCSDestMAC[MAC_ADDRESS_SIZE];
109 UCHAR au8EThCSDestMACMask[MAC_ADDRESS_SIZE];
110 UCHAR ucEtherTypeLen;
111 UCHAR au8EthCSEtherType[NUM_ETHERTYPE_BYTES];
112 UCHAR usUserPriority[2];
114 USHORT usValidityBitMap;
117 struct bcm_fragmented_packet_info {
119 ULONG ulSrcIpAddress;
120 USHORT usIpIdentification;
121 struct bcm_classifier_rule *pstMatchedClassifierEntry;
122 bool bOutOfOrderFragment;
125 struct bcm_packet_info {
126 /* classification extension Rule */
130 /* This field determines the priority of the SF Queues */
131 B_UINT8 u8TrafficPriority;
135 bool bActivateRequestSent;
137 B_UINT8 u8QueueType; /* BE or rtPS */
139 UINT uiMaxBucketSize; /* maximum size of the bucket for the queue */
140 UINT uiCurrentQueueDepthOnTarget;
141 UINT uiCurrentBytesOnHost;
142 UINT uiCurrentPacketsOnHost;
143 UINT uiDroppedCountBytes;
144 UINT uiDroppedCountPackets;
147 UINT uiCurrentDrainRate;
148 UINT uiThisPeriodSentBytes;
149 LARGE_INTEGER liDrainCalculated;
150 UINT uiCurrentTokenCount;
151 LARGE_INTEGER liLastUpdateTokenAt;
152 UINT uiMaxAllowedRate;
153 UINT NumOfPacketsSent;
156 struct bcm_mibs_parameters stMibsExtServiceFlowTable;
157 UINT uiCurrentRxRate;
158 UINT uiThisPeriodRxBytes;
166 struct sk_buff *FirstTxQueue;
167 struct sk_buff *LastTxQueue;
170 struct sk_buff *ControlHead;
171 struct sk_buff *ControlTail;
183 bool bClassifierPriority;
184 UCHAR ucServiceClassName[MAX_CLASS_NAME_LENGTH];
185 bool bHeaderSuppressionEnabled;
186 spinlock_t SFQueueLock;
187 void *pstSFIndication;
188 struct timeval stLastUpdateTokenAt;
189 atomic_t uiPerSFTxResourceCount;
195 struct bcm_tarang_data {
196 struct bcm_tarang_data *next;
197 struct bcm_mini_adapter *Adapter;
198 struct sk_buff *RxAppControlHead;
199 struct sk_buff *RxAppControlTail;
201 bool MacTracingEnabled;
202 bool bApplicationToExit;
203 struct bcm_mibs_dropped_cntrl_msg stDroppedAppCntrlMsgs;
204 ULONG RxCntrlMsgBitMask;
207 struct bcm_targetdsx_buffer {
208 ULONG ulTargetDsxBuffer;
213 typedef int (*FP_FLASH_WRITE)(struct bcm_mini_adapter *, UINT, PVOID);
215 typedef int (*FP_FLASH_WRITE_STATUS)(struct bcm_mini_adapter *, UINT, PVOID);
218 * Driver adapter data structure
220 struct bcm_mini_adapter {
221 struct bcm_mini_adapter *next;
222 struct net_device *dev;
225 atomic_t ApplicationRunning;
226 bool AppCtrlQueueOverFlow;
227 atomic_t CurrentApplicationCount;
228 atomic_t RegisteredApplicationCount;
231 u32 StatisticsPointer;
232 struct sk_buff *RxControlHead;
233 struct sk_buff *RxControlTail;
234 struct semaphore RxAppControlQueuelock;
235 struct semaphore fw_download_sema;
236 struct bcm_tarang_data *pTarangs;
237 spinlock_t control_queue_lock;
238 wait_queue_head_t process_read_wait_queue;
240 /* the pointer to the first packet we have queued in send
241 * deserialized miniport support variables
243 atomic_t TotalPacketCount;
246 /* this to keep track of the Tx and Rx MailBox Registers. */
247 atomic_t CurrNumFreeTxDesc;
248 /* to keep track the no of byte received */
249 USHORT PrevNumRecvDescs;
250 USHORT CurrNumRecvDescs;
252 struct bcm_packet_info PackInfo[NO_OF_QUEUES];
253 struct bcm_classifier_rule astClassifierTable[MAX_CLASSIFIERS];
256 /*************** qos ******************/
259 ULONG rtPSBucketSize;
266 wait_queue_head_t tx_packet_wait_queue;
267 wait_queue_head_t process_rx_cntrlpkt;
268 atomic_t process_waiting;
269 bool fw_download_done;
271 char *txctlpacket[MAX_CNTRL_PKTS];
272 atomic_t cntrlpktCnt;
273 atomic_t index_app_read_cntrlpkt;
274 atomic_t index_wr_txcntrlpkt;
275 atomic_t index_rd_txcntrlpkt;
277 struct semaphore rdmwrmsync;
279 struct bcm_targetdsx_buffer astTargetDsxBuffer[MAX_TARGET_DSX_BUFFERS];
280 ULONG ulFreeTargetBufferCnt;
281 ULONG ulCurrentTargetBuffer;
282 ULONG ulTotalTargetBuffersAvailable;
283 unsigned long chip_id;
284 wait_queue_head_t lowpower_mode_wait_queue;
288 bool bSyncUpRequestSent;
289 USHORT usBestEffortQueueIndex;
290 wait_queue_head_t ioctl_fw_dnld_wait_queue;
291 bool waiting_to_fw_download_done;
292 pid_t fw_download_process_pid;
293 struct bcm_target_params *pstargetparams;
296 bool bIsAutoCorrectEnabled;
299 ULONG ulPowerSaveMode;
300 spinlock_t txtransmitlock;
301 B_UINT8 txtransmit_running;
302 /* Thread for control packet handling */
303 struct task_struct *control_packet_handler;
304 /* thread for transmitting packets. */
305 struct task_struct *transmit_packet_thread;
307 /* LED Related Structures */
308 struct bcm_led_info LEDInfo;
310 /* Driver State for LED Blinking */
311 enum bcm_led_events DriverState;
312 /* Interface Specific */
313 PVOID pvInterfaceAdapter;
314 int (*bcm_file_download)(PVOID,
317 int (*bcm_file_readback_from_chip)(PVOID,
320 int (*interface_rdm)(PVOID,
324 int (*interface_wrm)(PVOID,
328 int (*interface_transmit)(PVOID, PVOID , UINT);
330 bool bDregRequestSentInIdleMode;
331 bool bTriedToWakeUpFromlowPowerMode;
334 unsigned int usIdleModePattern;
335 /* BOOLEAN bTriedToWakeUpFromShutdown; */
336 bool bLinkDownRequested;
338 struct bcm_phs_extension stBCMPhsContext;
339 struct bcm_hdr_suppression_contextinfo stPhsTxContextInfo;
340 uint8_t ucaPHSPktRestoreBuf[2048];
345 UINT32 aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
346 UINT32 aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
347 struct bcm_fragmented_packet_info astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
350 enum bcm_nvm_type eNVMType;
352 UINT uiSectorSizeInCFG;
353 bool bSectorSizeOverride;
356 UINT uiVendorExtnFlag;
357 /* it will always represent chosen DSD at any point of time.
358 * Generally it is Active DSD but in case of NVM RD/WR it might be different.
360 UINT ulFlashCalStart;
361 ULONG ulFlashControlSectionStart;
362 ULONG ulFlashWriteSize;
364 FP_FLASH_WRITE fpFlashWrite;
365 FP_FLASH_WRITE_STATUS fpFlashWriteWithStatusCheck;
367 struct semaphore NVMRdmWrmLock;
368 struct device *pstCreatedClassDevice;
370 /* BOOLEAN InterfaceUpStatus; */
371 struct bcm_flash2x_cs_info *psFlash2xCSInfo;
372 struct bcm_flash_cs_info *psFlashCSInfo;
373 struct bcm_flash2x_vendor_info *psFlash2xVendorInfo;
374 UINT uiFlashBaseAdd; /* Flash start address */
375 UINT uiActiveISOOffset; /* Active ISO offset chosen before f/w download */
376 enum bcm_flash2x_section_val eActiveISO; /* Active ISO section val */
377 enum bcm_flash2x_section_val eActiveDSD; /* Active DSD val chosen before f/w download */
378 UINT uiActiveDSDOffsetAtFwDld; /* For accessing Active DSD chosen before f/w download */
379 UINT uiFlashLayoutMajorVersion;
380 UINT uiFlashLayoutMinorVersion;
381 bool bAllDSDWriteAllow;
383 /* this should be set who so ever want to change the Headers. after Write it should be reset immediately. */
384 bool bHeaderChangeAllowed;
386 bool bEndPointHalted;
387 /* while bFlashRawRead will be true, Driver ignore map lay out and consider flash as of without any map. */
389 bool bPreparingForLowPowerMode;
393 UINT32 liTimeSinceLastNetEntry; /* Used to Support extended CAPI requirements from */
394 struct semaphore LowPowerModeSync;
395 ULONG liDrainCalculated;
397 struct bcm_debug_state stDebugState;
400 #define GET_BCM_ADAPTER(net_dev) netdev_priv(net_dev)
402 struct bcm_eth_header {
403 UCHAR au8DestinationAddress[6];
404 UCHAR au8SourceAddress[6];
408 struct bcm_firmware_info {
409 void __user *pvMappedFirmwareAddress;
410 ULONG u32FirmwareLength;
411 ULONG u32StartingAddress;
414 /* holds the value of net_device structure.. */
415 extern struct net_device *gblpnetdev;
417 struct bcm_ddr_setting {
421 int InitAdapter(struct bcm_mini_adapter *psAdapter);
423 /* =====================================================================
424 * Beceem vendor request codes for EP0
425 * =====================================================================
428 #define BCM_REQUEST_READ 0x2
429 #define BCM_REQUEST_WRITE 0x1
430 #define EP2_MPS_REG 0x0F0110A0
433 #define EP2_CFG_REG 0x0F0110A8
434 #define EP2_CFG_INT 0x27
435 #define EP2_CFG_BULK 0x25
437 #define EP4_MPS_REG 0x0F0110F0
440 #define EP4_CFG_REG 0x0F0110F8
442 #define ISO_MPS_REG 0x0F0110C8
443 #define ISO_MPS 0x00000000
452 enum bcm_einterface_setting {
453 DEFAULT_SETTING_0 = 0,
454 ALTERNATE_SETTING_1 = 1,
457 #endif /* __ADAPTER_H__ */