1 /***********************************
3 ************************************/
7 #define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
17 struct bcm_packettosend {
18 struct bcm_leader Leader;
22 struct bcm_control_packet {
25 struct bcm_control_packet *next;
28 struct bcm_link_request {
29 struct bcm_leader Leader;
33 #define MAX_IP_RANGE_LENGTH 4
34 #define MAX_PORT_RANGE 4
35 #define MAX_PROTOCOL_LENGTH 32
36 #define IPV6_ADDRESS_SIZEINBYTES 0x10
40 /* Source Ip Address Range */
41 ULONG ulIpv4Addr[MAX_IP_RANGE_LENGTH];
42 /* Source Ip Mask Address Range */
43 ULONG ulIpv4Mask[MAX_IP_RANGE_LENGTH];
46 /* Source Ip Address Range */
47 ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4];
48 /* Source Ip Mask Address Range */
49 ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4];
52 UCHAR ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
53 UCHAR ucIpv4Mask[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
56 UCHAR ucIpv6Address[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
57 UCHAR ucIpv6Mask[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
61 struct bcm_hdr_suppression_contextinfo {
62 /* Intermediate buffer to accumulate pkt Header for PHS */
63 UCHAR ucaHdrSuppressionInBuf[MAX_PHS_LENGTHS];
64 /* Intermediate buffer containing pkt Header after PHS */
65 UCHAR ucaHdrSuppressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN];
68 struct bcm_classifier_rule {
71 B_UINT16 uiClassifierRuleIndex;
74 /* This field detemines the Classifier Priority */
75 B_UINT8 u8ClassifierRulePriority;
76 union u_ip_address stSrcIpAddress;
77 UCHAR ucIPSourceAddressLength; /* Ip Source Address Length */
79 union u_ip_address stDestIpAddress;
80 /* Ip Destination Address Length */
81 UCHAR ucIPDestinationAddressLength;
82 UCHAR ucIPTypeOfServiceLength; /* Type of service Length */
83 UCHAR ucTosLow; /* Tos Low */
84 UCHAR ucTosHigh; /* Tos High */
85 UCHAR ucTosMask; /* Tos Mask */
87 UCHAR ucProtocolLength; /* protocol Length */
88 UCHAR ucProtocol[MAX_PROTOCOL_LENGTH]; /* protocol Length */
89 USHORT usSrcPortRangeLo[MAX_PORT_RANGE];
90 USHORT usSrcPortRangeHi[MAX_PORT_RANGE];
91 UCHAR ucSrcPortRangeLength;
93 USHORT usDestPortRangeLo[MAX_PORT_RANGE];
94 USHORT usDestPortRangeHi[MAX_PORT_RANGE];
95 UCHAR ucDestPortRangeLength;
102 /* For IPv6 Addressing */
106 struct bcm_phs_rule sPhsRule;
107 UCHAR u8AssociatedPHSI;
109 /* Classification fields for ETH CS */
110 UCHAR ucEthCSSrcMACLen;
111 UCHAR au8EThCSSrcMAC[MAC_ADDRESS_SIZE];
112 UCHAR au8EThCSSrcMACMask[MAC_ADDRESS_SIZE];
113 UCHAR ucEthCSDestMACLen;
114 UCHAR au8EThCSDestMAC[MAC_ADDRESS_SIZE];
115 UCHAR au8EThCSDestMACMask[MAC_ADDRESS_SIZE];
116 UCHAR ucEtherTypeLen;
117 UCHAR au8EthCSEtherType[NUM_ETHERTYPE_BYTES];
118 UCHAR usUserPriority[2];
120 USHORT usValidityBitMap;
123 struct bcm_fragmented_packet_info {
125 ULONG ulSrcIpAddress;
126 USHORT usIpIdentification;
127 struct bcm_classifier_rule *pstMatchedClassifierEntry;
128 bool bOutOfOrderFragment;
131 struct bcm_packet_info {
132 /* classification extension Rule */
136 /* This field determines the priority of the SF Queues */
137 B_UINT8 u8TrafficPriority;
141 bool bActivateRequestSent;
143 B_UINT8 u8QueueType; /* BE or rtPS */
145 /* maximum size of the bucket for the queue */
146 UINT uiMaxBucketSize;
147 UINT uiCurrentQueueDepthOnTarget;
148 UINT uiCurrentBytesOnHost;
149 UINT uiCurrentPacketsOnHost;
150 UINT uiDroppedCountBytes;
151 UINT uiDroppedCountPackets;
154 UINT uiCurrentDrainRate;
155 UINT uiThisPeriodSentBytes;
156 LARGE_INTEGER liDrainCalculated;
157 UINT uiCurrentTokenCount;
158 LARGE_INTEGER liLastUpdateTokenAt;
159 UINT uiMaxAllowedRate;
160 UINT NumOfPacketsSent;
163 struct bcm_mibs_parameters stMibsExtServiceFlowTable;
164 UINT uiCurrentRxRate;
165 UINT uiThisPeriodRxBytes;
173 struct sk_buff *FirstTxQueue;
174 struct sk_buff *LastTxQueue;
177 struct sk_buff *ControlHead;
178 struct sk_buff *ControlTail;
190 bool bClassifierPriority;
191 UCHAR ucServiceClassName[MAX_CLASS_NAME_LENGTH];
192 bool bHeaderSuppressionEnabled;
193 spinlock_t SFQueueLock;
194 void *pstSFIndication;
195 struct timeval stLastUpdateTokenAt;
196 atomic_t uiPerSFTxResourceCount;
202 struct bcm_tarang_data {
203 struct bcm_tarang_data *next;
204 struct bcm_mini_adapter *Adapter;
205 struct sk_buff *RxAppControlHead;
206 struct sk_buff *RxAppControlTail;
208 bool MacTracingEnabled;
209 bool bApplicationToExit;
210 struct bcm_mibs_dropped_cntrl_msg stDroppedAppCntrlMsgs;
211 ULONG RxCntrlMsgBitMask;
214 struct bcm_targetdsx_buffer {
215 ULONG ulTargetDsxBuffer;
220 typedef int (*FP_FLASH_WRITE)(struct bcm_mini_adapter *, UINT, PVOID);
222 typedef int (*FP_FLASH_WRITE_STATUS)(struct bcm_mini_adapter *, UINT, PVOID);
225 * Driver adapter data structure
227 struct bcm_mini_adapter {
228 struct bcm_mini_adapter *next;
229 struct net_device *dev;
232 atomic_t ApplicationRunning;
233 bool AppCtrlQueueOverFlow;
234 atomic_t CurrentApplicationCount;
235 atomic_t RegisteredApplicationCount;
238 u32 StatisticsPointer;
239 struct sk_buff *RxControlHead;
240 struct sk_buff *RxControlTail;
241 struct semaphore RxAppControlQueuelock;
242 struct semaphore fw_download_sema;
243 struct bcm_tarang_data *pTarangs;
244 spinlock_t control_queue_lock;
245 wait_queue_head_t process_read_wait_queue;
247 /* the pointer to the first packet we have queued in send
248 * deserialized miniport support variables
250 atomic_t TotalPacketCount;
253 /* this to keep track of the Tx and Rx MailBox Registers. */
254 atomic_t CurrNumFreeTxDesc;
255 /* to keep track the no of byte received */
256 USHORT PrevNumRecvDescs;
257 USHORT CurrNumRecvDescs;
259 struct bcm_packet_info PackInfo[NO_OF_QUEUES];
260 struct bcm_classifier_rule astClassifierTable[MAX_CLASSIFIERS];
263 /*************** qos ******************/
266 ULONG rtPSBucketSize;
273 wait_queue_head_t tx_packet_wait_queue;
274 wait_queue_head_t process_rx_cntrlpkt;
275 atomic_t process_waiting;
276 bool fw_download_done;
278 char *txctlpacket[MAX_CNTRL_PKTS];
279 atomic_t cntrlpktCnt;
280 atomic_t index_app_read_cntrlpkt;
281 atomic_t index_wr_txcntrlpkt;
282 atomic_t index_rd_txcntrlpkt;
284 struct semaphore rdmwrmsync;
286 struct bcm_targetdsx_buffer astTargetDsxBuffer[MAX_TARGET_DSX_BUFFERS];
287 ULONG ulFreeTargetBufferCnt;
288 ULONG ulCurrentTargetBuffer;
289 ULONG ulTotalTargetBuffersAvailable;
290 unsigned long chip_id;
291 wait_queue_head_t lowpower_mode_wait_queue;
295 bool bSyncUpRequestSent;
296 USHORT usBestEffortQueueIndex;
297 wait_queue_head_t ioctl_fw_dnld_wait_queue;
298 bool waiting_to_fw_download_done;
299 pid_t fw_download_process_pid;
300 struct bcm_target_params *pstargetparams;
303 bool bIsAutoCorrectEnabled;
306 ULONG ulPowerSaveMode;
307 spinlock_t txtransmitlock;
308 B_UINT8 txtransmit_running;
309 /* Thread for control packet handling */
310 struct task_struct *control_packet_handler;
311 /* thread for transmitting packets. */
312 struct task_struct *transmit_packet_thread;
314 /* LED Related Structures */
315 struct bcm_led_info LEDInfo;
317 /* Driver State for LED Blinking */
318 enum bcm_led_events DriverState;
319 /* Interface Specific */
320 PVOID pvInterfaceAdapter;
321 int (*bcm_file_download)(PVOID,
324 int (*bcm_file_readback_from_chip)(PVOID,
327 int (*interface_rdm)(PVOID,
331 int (*interface_wrm)(PVOID,
335 int (*interface_transmit)(PVOID, PVOID , UINT);
337 bool bDregRequestSentInIdleMode;
338 bool bTriedToWakeUpFromlowPowerMode;
341 unsigned int usIdleModePattern;
342 /* BOOLEAN bTriedToWakeUpFromShutdown; */
343 bool bLinkDownRequested;
345 struct bcm_phs_extension stBCMPhsContext;
346 struct bcm_hdr_suppression_contextinfo stPhsTxContextInfo;
347 uint8_t ucaPHSPktRestoreBuf[2048];
352 UINT32 aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
353 UINT32 aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
354 struct bcm_fragmented_packet_info
355 astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
358 enum bcm_nvm_type eNVMType;
360 UINT uiSectorSizeInCFG;
361 bool bSectorSizeOverride;
364 UINT uiVendorExtnFlag;
365 /* it will always represent chosen DSD at any point of time.
366 * Generally it is Active DSD but in case of NVM RD/WR it
367 * might be different.
369 UINT ulFlashCalStart;
370 ULONG ulFlashControlSectionStart;
371 ULONG ulFlashWriteSize;
373 FP_FLASH_WRITE fpFlashWrite;
374 FP_FLASH_WRITE_STATUS fpFlashWriteWithStatusCheck;
376 struct semaphore NVMRdmWrmLock;
377 struct device *pstCreatedClassDevice;
379 /* BOOLEAN InterfaceUpStatus; */
380 struct bcm_flash2x_cs_info *psFlash2xCSInfo;
381 struct bcm_flash_cs_info *psFlashCSInfo;
382 struct bcm_flash2x_vendor_info *psFlash2xVendorInfo;
383 UINT uiFlashBaseAdd; /* Flash start address */
384 /* Active ISO offset chosen before f/w download */
385 UINT uiActiveISOOffset;
386 enum bcm_flash2x_section_val eActiveISO; /* Active ISO section val */
387 /* Active DSD val chosen before f/w download */
388 enum bcm_flash2x_section_val eActiveDSD;
389 /* For accessing Active DSD chosen before f/w download */
390 UINT uiActiveDSDOffsetAtFwDld;
391 UINT uiFlashLayoutMajorVersion;
392 UINT uiFlashLayoutMinorVersion;
393 bool bAllDSDWriteAllow;
395 /* this should be set who so ever want to change the Headers.
396 * after Write it should be reset immediately.
398 bool bHeaderChangeAllowed;
400 bool bEndPointHalted;
401 /* while bFlashRawRead will be true, Driver
402 * ignore map lay out and consider flash as of without any map.
405 bool bPreparingForLowPowerMode;
409 /* Used to Support extended CAPI requirements from */
410 UINT32 liTimeSinceLastNetEntry;
411 struct semaphore LowPowerModeSync;
412 ULONG liDrainCalculated;
414 struct bcm_debug_state stDebugState;
417 #define GET_BCM_ADAPTER(net_dev) netdev_priv(net_dev)
419 struct bcm_eth_header {
420 UCHAR au8DestinationAddress[6];
421 UCHAR au8SourceAddress[6];
425 struct bcm_firmware_info {
426 void __user *pvMappedFirmwareAddress;
427 ULONG u32FirmwareLength;
428 ULONG u32StartingAddress;
431 /* holds the value of net_device structure.. */
432 extern struct net_device *gblpnetdev;
434 struct bcm_ddr_setting {
438 int InitAdapter(struct bcm_mini_adapter *psAdapter);
440 /* =====================================================================
441 * Beceem vendor request codes for EP0
442 * =====================================================================
445 #define BCM_REQUEST_READ 0x2
446 #define BCM_REQUEST_WRITE 0x1
447 #define EP2_MPS_REG 0x0F0110A0
450 #define EP2_CFG_REG 0x0F0110A8
451 #define EP2_CFG_INT 0x27
452 #define EP2_CFG_BULK 0x25
454 #define EP4_MPS_REG 0x0F0110F0
457 #define EP4_CFG_REG 0x0F0110F8
459 #define ISO_MPS_REG 0x0F0110C8
460 #define ISO_MPS 0x00000000
469 enum bcm_einterface_setting {
470 DEFAULT_SETTING_0 = 0,
471 ALTERNATE_SETTING_1 = 1,
474 #endif /* __ADAPTER_H__ */