2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #ifndef _BRCM_PHY_INT_H_
18 #define _BRCM_PHY_INT_H_
21 #include <brcmu_utils.h>
22 #include <brcmu_wifi.h>
24 #define PHY_VERSION { 1, 82, 8, 0 }
26 #define PHYHAL_ERROR 0x0001
27 #define PHYHAL_TRACE 0x0002
28 #define PHYHAL_INFORM 0x0004
30 extern u32 phyhal_msg_level;
32 #define PHY_INFORM_ON() (phyhal_msg_level & PHYHAL_INFORM)
33 #define PHY_THERMAL_ON() (phyhal_msg_level & PHYHAL_THERMAL)
34 #define PHY_CAL_ON() (phyhal_msg_level & PHYHAL_CAL)
37 #define BOARDTYPE(_type) BOARD_TYPE
39 #define BOARDTYPE(_type) _type
42 #define LCNXN_BASEREV 16
44 struct brcms_phy_srom_fem {
45 /* TSSI positive slope, 1: positive, 0: negative */
47 /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */
49 /* support 32 combinations of different Pdet dynamic ranges */
51 /* TR switch isolation */
53 /* antswctrl lookup table configuration: 32 possible choices */
59 #define ISNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_N)
60 #define ISLCNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_LCN)
62 #define ISPHY_11N_CAP(pi) (ISNPHY(pi) || ISLCNPHY(pi))
64 #define IS20MHZ(pi) ((pi)->bw == WL_CHANSPEC_BW_20)
65 #define IS40MHZ(pi) ((pi)->bw == WL_CHANSPEC_BW_40)
67 #define PHY_GET_RFATTN(rfgain) ((rfgain) & 0x0f)
68 #define PHY_GET_PADMIX(rfgain) (((rfgain) & 0x10) >> 4)
69 #define PHY_GET_RFGAINID(rfattn, padmix, width) ((rfattn) + ((padmix)*(width)))
70 #define PHY_SAT(x, n) ((x) > ((1<<((n)-1))-1) ? ((1<<((n)-1))-1) : \
71 ((x) < -(1<<((n)-1)) ? -(1<<((n)-1)) : (x)))
72 #define PHY_SHIFT_ROUND(x, n) ((x) >= 0 ? ((x)+(1<<((n)-1)))>>(n) : (x)>>(n))
73 #define PHY_HW_ROUND(x, s) ((x >> s) + ((x >> (s-1)) & (s != 0)))
78 #define A_HIGH_CHANS 2
82 #define FIRST_REF5_CHANNUM 149
83 #define LAST_REF5_CHANNUM 165
84 #define FIRST_5G_CHAN 14
85 #define LAST_5G_CHAN 50
86 #define FIRST_MID_5G_CHAN 14
87 #define LAST_MID_5G_CHAN 35
88 #define FIRST_HIGH_5G_CHAN 36
89 #define LAST_HIGH_5G_CHAN 41
90 #define FIRST_LOW_5G_CHAN 42
91 #define LAST_LOW_5G_CHAN 50
93 #define BASE_LOW_5G_CHAN 4900
94 #define BASE_MID_5G_CHAN 5100
95 #define BASE_HIGH_5G_CHAN 5500
97 #define CHAN5G_FREQ(chan) (5000 + chan*5)
98 #define CHAN2G_FREQ(chan) (2407 + chan*5)
100 #define TXP_FIRST_CCK 0
101 #define TXP_LAST_CCK 3
102 #define TXP_FIRST_OFDM 4
103 #define TXP_LAST_OFDM 11
104 #define TXP_FIRST_OFDM_20_CDD 12
105 #define TXP_LAST_OFDM_20_CDD 19
106 #define TXP_FIRST_MCS_20_SISO 20
107 #define TXP_LAST_MCS_20_SISO 27
108 #define TXP_FIRST_MCS_20_CDD 28
109 #define TXP_LAST_MCS_20_CDD 35
110 #define TXP_FIRST_MCS_20_STBC 36
111 #define TXP_LAST_MCS_20_STBC 43
112 #define TXP_FIRST_MCS_20_SDM 44
113 #define TXP_LAST_MCS_20_SDM 51
114 #define TXP_FIRST_OFDM_40_SISO 52
115 #define TXP_LAST_OFDM_40_SISO 59
116 #define TXP_FIRST_OFDM_40_CDD 60
117 #define TXP_LAST_OFDM_40_CDD 67
118 #define TXP_FIRST_MCS_40_SISO 68
119 #define TXP_LAST_MCS_40_SISO 75
120 #define TXP_FIRST_MCS_40_CDD 76
121 #define TXP_LAST_MCS_40_CDD 83
122 #define TXP_FIRST_MCS_40_STBC 84
123 #define TXP_LAST_MCS_40_STBC 91
124 #define TXP_FIRST_MCS_40_SDM 92
125 #define TXP_LAST_MCS_40_SDM 99
126 #define TXP_MCS_32 100
127 #define TXP_NUM_RATES 101
128 #define ADJ_PWR_TBL_LEN 84
130 #define TXP_FIRST_SISO_MCS_20 20
131 #define TXP_LAST_SISO_MCS_20 27
133 #define PHY_CORE_NUM_1 1
134 #define PHY_CORE_NUM_2 2
135 #define PHY_CORE_NUM_3 3
136 #define PHY_CORE_NUM_4 4
137 #define PHY_CORE_MAX PHY_CORE_NUM_4
143 #define MA_WINDOW_SZ 8
145 #define PHY_NOISE_SAMPLE_MON 1
146 #define PHY_NOISE_SAMPLE_EXTERNAL 2
147 #define PHY_NOISE_WINDOW_SZ 16
148 #define PHY_NOISE_GLITCH_INIT_MA 10
149 #define PHY_NOISE_GLITCH_INIT_MA_BADPlCP 10
150 #define PHY_NOISE_STATE_MON 0x1
151 #define PHY_NOISE_STATE_EXTERNAL 0x2
152 #define PHY_NOISE_SAMPLE_LOG_NUM_NPHY 10
153 #define PHY_NOISE_SAMPLE_LOG_NUM_UCODE 9
155 #define PHY_NOISE_OFFSETFACT_4322 (-103)
156 #define PHY_NOISE_MA_WINDOW_SZ 2
158 #define PHY_RSSI_TABLE_SIZE 64
159 #define RSSI_ANT_MERGE_MAX 0
160 #define RSSI_ANT_MERGE_MIN 1
161 #define RSSI_ANT_MERGE_AVG 2
163 #define PHY_TSSI_TABLE_SIZE 64
164 #define APHY_TSSI_TABLE_SIZE 256
165 #define TX_GAIN_TABLE_LENGTH 64
166 #define DEFAULT_11A_TXP_IDX 24
167 #define NUM_TSSI_FRAMES 4
168 #define NULL_TSSI 0x7f
169 #define NULL_TSSI_W 0x7f7f
171 #define PHY_PAPD_EPS_TBL_SIZE_LCNPHY 64
173 #define LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL 9
175 #define PHY_TXPWR_MIN 10
176 #define PHY_TXPWR_MIN_NPHY 8
177 #define RADIOPWR_OVERRIDE_DEF (-1)
179 #define PWRTBL_NUM_COEFF 3
181 #define SPURAVOID_DISABLE 0
182 #define SPURAVOID_AUTO 1
183 #define SPURAVOID_FORCEON 2
184 #define SPURAVOID_FORCEON2 3
186 #define PHY_SW_TIMER_FAST 15
187 #define PHY_SW_TIMER_SLOW 60
188 #define PHY_SW_TIMER_GLACIAL 120
190 #define PHY_PERICAL_AUTO 0
191 #define PHY_PERICAL_FULL 1
192 #define PHY_PERICAL_PARTIAL 2
194 #define PHY_PERICAL_NODELAY 0
195 #define PHY_PERICAL_INIT_DELAY 5
196 #define PHY_PERICAL_ASSOC_DELAY 5
197 #define PHY_PERICAL_WDOG_DELAY 5
199 #define MPHASE_TXCAL_NUMCMDS 2
201 #define PHY_PERICAL_MPHASE_PENDING(pi) \
202 (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_IDLE)
205 MPHASE_CAL_STATE_IDLE = 0,
206 MPHASE_CAL_STATE_INIT = 1,
207 MPHASE_CAL_STATE_TXPHASE0,
208 MPHASE_CAL_STATE_TXPHASE1,
209 MPHASE_CAL_STATE_TXPHASE2,
210 MPHASE_CAL_STATE_TXPHASE3,
211 MPHASE_CAL_STATE_TXPHASE4,
212 MPHASE_CAL_STATE_TXPHASE5,
213 MPHASE_CAL_STATE_PAPDCAL,
214 MPHASE_CAL_STATE_RXCAL,
215 MPHASE_CAL_STATE_RSSICAL,
216 MPHASE_CAL_STATE_IDLETSSI
230 #define RDR_TIER_SIZE 64
231 #define RDR_LIST_SIZE (512/3)
232 #define RDR_EPOCH_SIZE 40
233 #define RDR_NANTENNAS 2
234 #define RDR_NTIER_SIZE RDR_LIST_SIZE
235 #define RDR_LP_BUFFER_SIZE 64
236 #define LP_LEN_HIS_SIZE 10
238 #define STATIC_NUM_RF 32
239 #define STATIC_NUM_BB 9
241 #define BB_MULT_MASK 0x0000ffff
242 #define BB_MULT_VALID_MASK 0x80000000
244 #define CORDIC_AG 39797
246 #define FIXED(X) ((s32)((X) << 16))
249 (((X) >= 0) ? ((((X) >> 15) + 1) >> 1) : -((((-(X)) >> 15) + 1) >> 1))
251 #define PHY_CHAIN_TX_DISABLE_TEMP 115
252 #define PHY_HYSTERESIS_DELTATEMP 5
254 #define PHY_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8))
256 #define MOD_PHY_REG(pi, phy_type, reg_name, field, value) \
257 mod_phy_reg(pi, phy_type##_##reg_name, \
258 phy_type##_##reg_name##_##field##_MASK, \
259 (value) << phy_type##_##reg_name##_##field##_##SHIFT)
261 #define READ_PHY_REG(pi, phy_type, reg_name, field) \
262 ((read_phy_reg(pi, phy_type##_##reg_name) & \
263 phy_type##_##reg_name##_##field##_##MASK) \
264 >> phy_type##_##reg_name##_##field##_##SHIFT)
266 #define VALID_PHYTYPE(phytype) (((uint)phytype == PHY_TYPE_N) || \
267 ((uint)phytype == PHY_TYPE_LCN))
269 #define VALID_N_RADIO(radioid) ((radioid == BCM2055_ID) || \
270 (radioid == BCM2056_ID) || \
271 (radioid == BCM2057_ID))
273 #define VALID_LCN_RADIO(radioid) (radioid == BCM2064_ID)
275 #define VALID_RADIO(pi, radioid) ( \
276 (ISNPHY(pi) ? VALID_N_RADIO(radioid) : false) || \
277 (ISLCNPHY(pi) ? VALID_LCN_RADIO(radioid) : false))
279 #define SCAN_INPROG_PHY(pi) \
280 (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN))
282 #define RM_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_RM))
284 #define PLT_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_PLT))
286 #define ASSOC_INPROG_PHY(pi) \
287 (mboolisset(pi->measure_hold, PHY_HOLD_FOR_ASSOC))
289 #define SCAN_RM_IN_PROGRESS(pi) \
290 (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN | PHY_HOLD_FOR_RM))
292 #define PHY_MUTED(pi) \
293 (mboolisset(pi->measure_hold, PHY_HOLD_FOR_MUTE))
295 #define PUB_NOT_ASSOC(pi) \
296 (mboolisset(pi->measure_hold, PHY_HOLD_FOR_NOT_ASSOC))
298 #if defined(EXT_CBALL)
299 #define NORADIO_ENAB(pub) ((pub).radioid == NORADIO_ID)
301 #define NORADIO_ENAB(pub) 0
304 #define PHY_LTRN_LIST_LEN 64
305 extern u16 ltrn_list[PHY_LTRN_LIST_LEN];
307 struct phy_table_info {
321 struct interference_info {
322 u8 curr_home_channel;
323 u16 crsminpwrthld_40_stored;
324 u16 crsminpwrthld_20L_stored;
325 u16 crsminpwrthld_20U_stored;
326 u16 init_gain_code_core1_stored;
327 u16 init_gain_code_core2_stored;
328 u16 init_gain_codeb_core1_stored;
329 u16 init_gain_codeb_core2_stored;
330 u16 init_gain_table_stored[4];
332 u16 clip1_hi_gain_code_core1_stored;
333 u16 clip1_hi_gain_code_core2_stored;
334 u16 clip1_hi_gain_codeb_core1_stored;
335 u16 clip1_hi_gain_codeb_core2_stored;
336 u16 nb_clip_thresh_core1_stored;
337 u16 nb_clip_thresh_core2_stored;
338 u16 init_ofdmlna2gainchange_stored[4];
339 u16 init_ccklna2gainchange_stored[4];
340 u16 clip1_lo_gain_code_core1_stored;
341 u16 clip1_lo_gain_code_core2_stored;
342 u16 clip1_lo_gain_codeb_core1_stored;
343 u16 clip1_lo_gain_codeb_core2_stored;
344 u16 w1_clip_thresh_core1_stored;
345 u16 w1_clip_thresh_core2_stored;
346 u16 radio_2056_core1_rssi_gain_stored;
347 u16 radio_2056_core2_rssi_gain_stored;
348 u16 energy_drop_timeout_len_stored;
350 u16 ed_crs40_assertthld0_stored;
351 u16 ed_crs40_assertthld1_stored;
352 u16 ed_crs40_deassertthld0_stored;
353 u16 ed_crs40_deassertthld1_stored;
354 u16 ed_crs20L_assertthld0_stored;
355 u16 ed_crs20L_assertthld1_stored;
356 u16 ed_crs20L_deassertthld0_stored;
357 u16 ed_crs20L_deassertthld1_stored;
358 u16 ed_crs20U_assertthld0_stored;
359 u16 ed_crs20U_assertthld1_stored;
360 u16 ed_crs20U_deassertthld0_stored;
361 u16 ed_crs20U_deassertthld1_stored;
364 u16 badplcp_ma_previous;
365 u16 badplcp_ma_total;
366 u16 badplcp_ma_list[MA_WINDOW_SZ];
367 int badplcp_ma_index;
369 s16 bphy_pre_badplcp_cnt;
373 u16 init_gainb_core1;
374 u16 init_gainb_core2;
375 u16 init_gain_rfseq[4];
383 u16 radio_2057_core1_rssi_wb1a_gc_stored;
384 u16 radio_2057_core2_rssi_wb1a_gc_stored;
385 u16 radio_2057_core1_rssi_wb1g_gc_stored;
386 u16 radio_2057_core2_rssi_wb1g_gc_stored;
387 u16 radio_2057_core1_rssi_wb2_gc_stored;
388 u16 radio_2057_core2_rssi_wb2_gc_stored;
389 u16 radio_2057_core1_rssi_nb_gc_stored;
390 u16 radio_2057_core2_rssi_nb_gc_stored;
393 struct aci_save_gphy {
403 u16 div_search_gn_change;
411 u16 clip_pwdn_thresh;
412 u16 clip_n1p1_thresh;
413 u16 clip_n1_pwdn_thresh;
417 u16 clip_p1_p2_thresh;
424 u16 div_srch_gn_back;
429 struct lo_complex_abgphy_info {
434 struct nphy_iq_comp {
441 struct nphy_txpwrindex {
444 s8 index_internal_save;
454 struct txiqcal_cache {
456 u16 txcal_coeffs_2G[8];
457 u16 txcal_radio_regs_2G[8];
458 struct nphy_iq_comp rxcal_coeffs_2G;
460 u16 txcal_coeffs_5G[8];
461 u16 txcal_radio_regs_5G[8];
462 struct nphy_iq_comp rxcal_coeffs_5G;
465 struct nphy_pwrctrl {
494 struct nphy_txgains {
502 #define PHY_NOISEVAR_BUFSIZE 10
504 struct nphy_noisevar_buf {
506 int tone_id[PHY_NOISEVAR_BUFSIZE];
507 u32 noise_vars[PHY_NOISEVAR_BUFSIZE];
508 u32 min_noise_vars[PHY_NOISEVAR_BUFSIZE];
511 struct rssical_cache {
512 u16 rssical_radio_regs_2G[2];
513 u16 rssical_phyregs_2G[12];
515 u16 rssical_radio_regs_5G[2];
516 u16 rssical_phyregs_5G[12];
519 struct lcnphy_cal_results {
529 u16 txiqlocal_bestcoeffs[11];
530 u16 txiqlocal_bestcoeffs_valid;
532 u32 papd_eps_tbl[PHY_PAPD_EPS_TBL_SIZE_LCNPHY];
539 u16 sslpnCalibClkEnCtrl;
541 u16 rxiqcal_coeff_a0;
542 u16 rxiqcal_coeff_b0;
546 struct brcms_phy *phy_head;
572 s8 phy_noise_window[MA_WINDOW_SZ];
573 uint phy_noise_index;
582 struct brcms_phy_pub {
595 struct phy_func_ptr {
596 void (*init)(struct brcms_phy *);
597 void (*calinit)(struct brcms_phy *);
598 void (*chanset)(struct brcms_phy *, u16 chanspec);
599 void (*txpwrrecalc)(struct brcms_phy *);
600 int (*longtrn)(struct brcms_phy *, int);
601 void (*txiqccget)(struct brcms_phy *, u16 *, u16 *);
602 void (*txiqccset)(struct brcms_phy *, u16, u16);
603 u16 (*txloccget)(struct brcms_phy *);
604 void (*radioloftget)(struct brcms_phy *, u8 *, u8 *, u8 *, u8 *);
605 void (*carrsuppr)(struct brcms_phy *);
606 s32 (*rxsigpwr)(struct brcms_phy *, s32);
607 void (*detach)(struct brcms_phy *);
611 struct brcms_phy_pub pubpi_ro;
612 struct shared_phy *sh;
613 struct phy_func_ptr pi_fptr;
617 struct brcms_phy_lcnphy *pi_lcnphy;
619 bool user_txpwr_at_rfport;
621 struct d11regs *regs;
622 struct brcms_phy *next;
624 struct brcms_phy_pub pubpi;
628 bool ofdm_rateset_war;
629 bool bf_preempt_4306;
636 bool init_in_progress;
640 bool watchdog_override;
643 int phynoise_chan_watchdog;
644 bool phynoise_polling;
648 s16 txpa_2g[PWRTBL_NUM_COEFF];
649 s16 txpa_2g_low_temp[PWRTBL_NUM_COEFF];
650 s16 txpa_2g_high_temp[PWRTBL_NUM_COEFF];
651 s16 txpa_5g_low[PWRTBL_NUM_COEFF];
652 s16 txpa_5g_mid[PWRTBL_NUM_COEFF];
653 s16 txpa_5g_hi[PWRTBL_NUM_COEFF];
656 u8 tx_srom_max_5g_low;
657 u8 tx_srom_max_5g_mid;
658 u8 tx_srom_max_5g_hi;
659 u8 tx_srom_max_rate_2g[TXP_NUM_RATES];
660 u8 tx_srom_max_rate_5g_low[TXP_NUM_RATES];
661 u8 tx_srom_max_rate_5g_mid[TXP_NUM_RATES];
662 u8 tx_srom_max_rate_5g_hi[TXP_NUM_RATES];
663 u8 tx_user_target[TXP_NUM_RATES];
664 s8 tx_power_offset[TXP_NUM_RATES];
665 u8 tx_power_target[TXP_NUM_RATES];
667 struct brcms_phy_srom_fem srom_fem2g;
668 struct brcms_phy_srom_fem srom_fem5g;
671 u8 tx_power_max_rate_ind;
680 s8 n_preamble_override;
684 s8 idle_tssi[CH_5G_GROUP];
688 u8 txpwr_limit[TXP_NUM_RATES];
689 u8 txpwr_env_limit[TXP_NUM_RATES];
690 u8 adj_pwr_tbl_nphy[ADJ_PWR_TBL_LEN];
692 bool channel_14_wide_filter;
695 bool txpwridx_override_aphy;
696 s16 radiopwr_override;
700 bool edcrs_threshold_lock;
705 s16 ofdm_analog_filt_bw_override;
706 s16 cck_analog_filt_bw_override;
707 s16 ofdm_rccal_override;
708 s16 cck_rccal_override;
711 uint interference_mode_crs_time;
713 bool interference_mode_crs;
715 u32 phy_tx_tone_freq;
718 bool phy_fixed_noise;
721 s8 carrier_suppr_disable;
728 s16 phy_txcore_disable_temp;
729 s16 phy_txcore_enable_temp;
730 s8 phy_tempsense_offset;
731 bool phy_txcore_heatedup;
739 struct lo_complex_abgphy_info gphy_locomp_iq
740 [STATIC_NUM_RF][STATIC_NUM_BB];
741 s8 stats_11b_txpower[STATIC_NUM_RF][STATIC_NUM_BB];
742 u16 gain_table[TX_GAIN_TABLE_LENGTH];
744 s16 max_lpback_gain_hdB;
745 s16 trsw_rx_gain_hdB;
749 int nrssi_table_delta;
750 int nrssi_slope_scale;
751 int nrssi_slope_offset;
758 u8 a_band_high_disable;
761 u16 global_tx_bb_dc_bias_loft;
781 u16 freqtrack_saved_regs[2];
782 int cur_interference_mode;
783 bool hwpwrctrl_capable;
784 bool temppwrctrl_capable;
793 bool nphy_tableloaded;
795 u32 nphy_bb_mult_save;
796 u16 nphy_txiqlocal_bestc[11];
797 bool nphy_txiqlocal_coeffsvalid;
798 struct nphy_txpwrindex nphy_txpwrindex[PHY_CORE_NUM_2];
799 struct nphy_pwrctrl nphy_pwrctrl_info[PHY_CORE_NUM_2];
825 u32 nphy_rxcalparams;
828 bool phy_isspuravoid;
834 s16 nphy_noise_win[PHY_CORE_MAX][PHY_NOISE_WINDOW_SZ];
837 u8 nphy_txpid2g[PHY_CORE_NUM_2];
838 u8 nphy_txpid5g[PHY_CORE_NUM_2];
839 u8 nphy_txpid5gl[PHY_CORE_NUM_2];
840 u8 nphy_txpid5gh[PHY_CORE_NUM_2];
842 bool nphy_gain_boost;
843 bool nphy_elna_gain_config;
845 u16 old_bphy_testcontrol;
851 uint nphy_perical_last;
852 u8 cal_type_override;
853 u8 mphase_cal_phase_id;
854 u8 mphase_txcal_cmdidx;
855 u8 mphase_txcal_numcmds;
856 u16 mphase_txcal_bestcoeffs[11];
857 u16 nphy_txiqlocal_chanspec;
858 u16 nphy_iqcal_chanspec_2G;
859 u16 nphy_iqcal_chanspec_5G;
860 u16 nphy_rssical_chanspec_2G;
861 u16 nphy_rssical_chanspec_5G;
862 struct wlapi_timer *phycal_timer;
863 bool use_int_tx_iqlo_cal_nphy;
864 bool internal_tx_iqlo_cal_tapoff_intpa_nphy;
865 s16 nphy_lastcal_temp;
867 struct txiqcal_cache calibration_cache;
868 struct rssical_cache rssical_cache;
870 u8 nphy_txpwr_idx[2];
871 u8 nphy_papd_cal_type;
872 uint nphy_papd_last_cal;
873 u16 nphy_papd_tx_gain_at_last_cal[2];
874 u8 nphy_papd_cal_gain_index[2];
875 s16 nphy_papd_epsilon_offset[2];
876 bool nphy_papd_recal_enable;
877 u32 nphy_papd_recal_counter;
878 bool nphy_force_papd_cal;
883 u16 classifier_state;
885 uint nphy_deaf_count;
889 u16 rfctrlIntc1_save;
890 u16 rfctrlIntc2_save;
891 bool first_cal_after_assoc;
892 u16 tx_rx_cal_radio_saveregs[22];
893 u16 tx_rx_cal_phy_saveregs[15];
895 u8 nphy_cal_orig_pwr_idx[2];
896 u8 nphy_txcal_pwr_idx[2];
897 u8 nphy_rxcal_pwr_idx[2];
898 u16 nphy_cal_orig_tx_gain[2];
899 struct nphy_txgains nphy_cal_target_gain;
900 u16 nphy_txcal_bbmult;
903 u16 nphy_saved_bbconf;
905 bool nphy_gband_spurwar_en;
906 bool nphy_gband_spurwar2_en;
907 bool nphy_aband_spurwar_en;
908 u16 nphy_rccal_value;
909 u16 nphy_crsminpwr[3];
910 struct nphy_noisevar_buf nphy_saved_noisevars;
911 bool nphy_anarxlpf_adjusted;
912 bool nphy_crsminpwr_adjusted;
913 bool nphy_noisevars_adjusted;
915 bool nphy_rxcal_active;
916 u16 radar_percal_mask;
917 bool dfs_lp_buffer_nphy;
919 u16 nphy_fineclockgatecontrol;
926 s16 noise_crsminpwr_index;
929 u16 init_gainb_core1;
930 u16 init_gainb_core2;
931 u8 aci_noise_curr_channel;
932 u16 init_gain_rfseq[4];
936 bool nphy_sample_play_lpf_bw_ctl_ovr;
943 uint tbl_save_offset;
946 s8 txpwrindex[PHY_CORE_MAX];
967 struct radio_20xx_regs {
973 struct lcnphy_radio_regs {
981 extern struct lcnphy_radio_regs lcnphy_radio_regs_2064[];
982 extern struct lcnphy_radio_regs lcnphy_radio_regs_2066[];
984 extern struct radio_regs regs_2055[], regs_SYN_2056[], regs_TX_2056[],
986 extern struct radio_regs regs_SYN_2056_A1[], regs_TX_2056_A1[],
988 extern struct radio_regs regs_SYN_2056_rev5[], regs_TX_2056_rev5[],
990 extern struct radio_regs regs_SYN_2056_rev6[], regs_TX_2056_rev6[],
992 extern struct radio_regs regs_SYN_2056_rev7[], regs_TX_2056_rev7[],
994 extern struct radio_regs regs_SYN_2056_rev8[], regs_TX_2056_rev8[],
997 extern struct radio_20xx_regs regs_2057_rev4[], regs_2057_rev5[],
999 extern struct radio_20xx_regs regs_2057_rev7[], regs_2057_rev8[];
1001 extern char *phy_getvar(struct brcms_phy *pi, const char *name);
1002 extern int phy_getintvar(struct brcms_phy *pi, const char *name);
1004 #define PHY_GETVAR(pi, name) phy_getvar(pi, name)
1005 #define PHY_GETINTVAR(pi, name) phy_getintvar(pi, name)
1007 extern u16 read_phy_reg(struct brcms_phy *pi, u16 addr);
1008 extern void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
1009 extern void and_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
1010 extern void or_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
1011 extern void mod_phy_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val);
1013 extern u16 read_radio_reg(struct brcms_phy *pi, u16 addr);
1014 extern void or_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
1015 extern void and_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
1016 extern void mod_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask,
1018 extern void xor_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask);
1020 extern void write_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
1022 extern void wlc_phyreg_enter(struct brcms_phy_pub *pih);
1023 extern void wlc_phyreg_exit(struct brcms_phy_pub *pih);
1024 extern void wlc_radioreg_enter(struct brcms_phy_pub *pih);
1025 extern void wlc_radioreg_exit(struct brcms_phy_pub *pih);
1027 extern void wlc_phy_read_table(struct brcms_phy *pi,
1028 const struct phytbl_info *ptbl_info,
1029 u16 tblAddr, u16 tblDataHi,
1031 extern void wlc_phy_write_table(struct brcms_phy *pi,
1032 const struct phytbl_info *ptbl_info,
1033 u16 tblAddr, u16 tblDataHi, u16 tblDatalo);
1034 extern void wlc_phy_table_addr(struct brcms_phy *pi, uint tbl_id,
1035 uint tbl_offset, u16 tblAddr, u16 tblDataHi,
1037 extern void wlc_phy_table_data_write(struct brcms_phy *pi, uint width, u32 val);
1039 extern void write_phy_channel_reg(struct brcms_phy *pi, uint val);
1040 extern void wlc_phy_txpower_update_shm(struct brcms_phy *pi);
1042 extern void wlc_phy_cordic(s32 theta, struct cs32 *val);
1043 extern u8 wlc_phy_nbits(s32 value);
1044 extern void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_dB, u8 core);
1046 extern uint wlc_phy_init_radio_regs_allbands(struct brcms_phy *pi,
1047 struct radio_20xx_regs *radioregs);
1048 extern uint wlc_phy_init_radio_regs(struct brcms_phy *pi,
1049 struct radio_regs *radioregs,
1052 extern void wlc_phy_txpower_ipa_upd(struct brcms_phy *pi);
1054 extern void wlc_phy_do_dummy_tx(struct brcms_phy *pi, bool ofdm, bool pa_on);
1055 extern void wlc_phy_papd_decode_epsilon(u32 epsilon, s32 *eps_real,
1058 extern void wlc_phy_cal_perical_mphase_reset(struct brcms_phy *pi);
1059 extern void wlc_phy_cal_perical_mphase_restart(struct brcms_phy *pi);
1061 extern bool wlc_phy_attach_nphy(struct brcms_phy *pi);
1062 extern bool wlc_phy_attach_lcnphy(struct brcms_phy *pi);
1064 extern void wlc_phy_detach_lcnphy(struct brcms_phy *pi);
1066 extern void wlc_phy_init_nphy(struct brcms_phy *pi);
1067 extern void wlc_phy_init_lcnphy(struct brcms_phy *pi);
1069 extern void wlc_phy_cal_init_nphy(struct brcms_phy *pi);
1070 extern void wlc_phy_cal_init_lcnphy(struct brcms_phy *pi);
1072 extern void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi,
1074 extern void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi,
1076 extern void wlc_phy_chanspec_set_fixup_lcnphy(struct brcms_phy *pi,
1078 extern int wlc_phy_channel2freq(uint channel);
1079 extern int wlc_phy_chanspec_freq2bandrange_lpssn(uint);
1080 extern int wlc_phy_chanspec_bandrange_get(struct brcms_phy *, u16 chanspec);
1082 extern void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode);
1083 extern s8 wlc_lcnphy_get_current_tx_pwr_idx(struct brcms_phy *pi);
1085 extern void wlc_phy_txpower_recalc_target_nphy(struct brcms_phy *pi);
1086 extern void wlc_lcnphy_txpower_recalc_target(struct brcms_phy *pi);
1087 extern void wlc_phy_txpower_recalc_target_lcnphy(struct brcms_phy *pi);
1089 extern void wlc_lcnphy_set_tx_pwr_by_index(struct brcms_phy *pi, int index);
1090 extern void wlc_lcnphy_tx_pu(struct brcms_phy *pi, bool bEnable);
1091 extern void wlc_lcnphy_stop_tx_tone(struct brcms_phy *pi);
1092 extern void wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz,
1093 u16 max_val, bool iqcalmode);
1095 extern void wlc_phy_txpower_sromlimit_get_nphy(struct brcms_phy *pi, uint chan,
1096 u8 *max_pwr, u8 rate_id);
1097 extern void wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start,
1099 u8 rate_ofdm_start);
1100 extern void wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power,
1105 extern u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode);
1106 extern s16 wlc_lcnphy_tempsense_new(struct brcms_phy *pi, bool mode);
1107 extern s8 wlc_lcnphy_tempsense_degree(struct brcms_phy *pi, bool mode);
1108 extern s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode);
1109 extern void wlc_phy_carrier_suppress_lcnphy(struct brcms_phy *pi);
1110 extern void wlc_lcnphy_crsuprs(struct brcms_phy *pi, int channel);
1111 extern void wlc_lcnphy_epa_switch(struct brcms_phy *pi, bool mode);
1112 extern void wlc_2064_vco_cal(struct brcms_phy *pi);
1114 extern void wlc_phy_txpower_recalc_target(struct brcms_phy *pi);
1116 #define LCNPHY_TBL_ID_PAPDCOMPDELTATBL 0x18
1117 #define LCNPHY_TX_POWER_TABLE_SIZE 128
1118 #define LCNPHY_MAX_TX_POWER_INDEX (LCNPHY_TX_POWER_TABLE_SIZE - 1)
1119 #define LCNPHY_TBL_ID_TXPWRCTL 0x07
1120 #define LCNPHY_TX_PWR_CTRL_OFF 0
1121 #define LCNPHY_TX_PWR_CTRL_SW (0x1 << 15)
1122 #define LCNPHY_TX_PWR_CTRL_HW ((0x1 << 15) | \
1126 #define LCNPHY_TX_PWR_CTRL_TEMPBASED 0xE001
1128 extern void wlc_lcnphy_write_table(struct brcms_phy *pi,
1129 const struct phytbl_info *pti);
1130 extern void wlc_lcnphy_read_table(struct brcms_phy *pi,
1131 struct phytbl_info *pti);
1132 extern void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b);
1133 extern void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq);
1134 extern void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b);
1135 extern u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi);
1136 extern void wlc_lcnphy_get_radio_loft(struct brcms_phy *pi, u8 *ei0,
1137 u8 *eq0, u8 *fi0, u8 *fq0);
1138 extern void wlc_lcnphy_calib_modes(struct brcms_phy *pi, uint mode);
1139 extern void wlc_lcnphy_deaf_mode(struct brcms_phy *pi, bool mode);
1140 extern bool wlc_phy_tpc_isenabled_lcnphy(struct brcms_phy *pi);
1141 extern void wlc_lcnphy_tx_pwr_update_npt(struct brcms_phy *pi);
1142 extern s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1);
1143 extern void wlc_lcnphy_get_tssi(struct brcms_phy *pi, s8 *ofdm_pwr,
1145 extern void wlc_lcnphy_tx_power_adjustment(struct brcms_phy_pub *ppi);
1147 extern s32 wlc_lcnphy_rx_signal_power(struct brcms_phy *pi, s32 gain_index);
1149 #define NPHY_MAX_HPVGA1_INDEX 10
1150 #define NPHY_DEF_HPVGA1_INDEXLIMIT 7
1158 extern void wlc_phy_stay_in_carriersearch_nphy(struct brcms_phy *pi,
1160 extern void wlc_nphy_deaf_mode(struct brcms_phy *pi, bool mode);
1162 #define wlc_phy_write_table_nphy(pi, pti) \
1163 wlc_phy_write_table(pi, pti, 0x72, 0x74, 0x73)
1165 #define wlc_phy_read_table_nphy(pi, pti) \
1166 wlc_phy_read_table(pi, pti, 0x72, 0x74, 0x73)
1168 #define wlc_nphy_table_addr(pi, id, off) \
1169 wlc_phy_table_addr((pi), (id), (off), 0x72, 0x74, 0x73)
1171 #define wlc_nphy_table_data_write(pi, w, v) \
1172 wlc_phy_table_data_write((pi), (w), (v))
1174 extern void wlc_phy_table_read_nphy(struct brcms_phy *pi, u32, u32 l, u32 o,
1176 extern void wlc_phy_table_write_nphy(struct brcms_phy *pi, u32, u32, u32,
1179 #define PHY_IPA(pi) \
1180 ((pi->ipa2g_on && CHSPEC_IS2G(pi->radio_chanspec)) || \
1181 (pi->ipa5g_on && CHSPEC_IS5G(pi->radio_chanspec)))
1183 #define BRCMS_PHY_WAR_PR51571(pi) \
1184 if (((pi)->sh->bustype == PCI_BUS) && NREV_LT((pi)->pubpi.phy_rev, 3)) \
1185 (void)R_REG(&(pi)->regs->maccontrol)
1187 extern void wlc_phy_cal_perical_nphy_run(struct brcms_phy *pi, u8 caltype);
1188 extern void wlc_phy_aci_reset_nphy(struct brcms_phy *pi);
1189 extern void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en);
1191 extern u8 wlc_phy_get_chan_freq_range_nphy(struct brcms_phy *pi, uint chan);
1192 extern void wlc_phy_switch_radio_nphy(struct brcms_phy *pi, bool on);
1194 extern void wlc_phy_stf_chain_upd_nphy(struct brcms_phy *pi);
1196 extern void wlc_phy_force_rfseq_nphy(struct brcms_phy *pi, u8 cmd);
1197 extern s16 wlc_phy_tempsense_nphy(struct brcms_phy *pi);
1199 extern u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val);
1201 extern void wlc_phy_rx_iq_est_nphy(struct brcms_phy *pi, struct phy_iq_est *est,
1202 u16 num_samps, u8 wait_time,
1205 extern void wlc_phy_rx_iq_coeffs_nphy(struct brcms_phy *pi, u8 write,
1206 struct nphy_iq_comp *comp);
1207 extern void wlc_phy_aci_and_noise_reduction_nphy(struct brcms_phy *pi);
1209 extern void wlc_phy_rxcore_setstate_nphy(struct brcms_phy_pub *pih,
1211 extern u8 wlc_phy_rxcore_getstate_nphy(struct brcms_phy_pub *pih);
1213 extern void wlc_phy_txpwrctrl_enable_nphy(struct brcms_phy *pi, u8 ctrl_type);
1214 extern void wlc_phy_txpwr_fixpower_nphy(struct brcms_phy *pi);
1215 extern void wlc_phy_txpwr_apply_nphy(struct brcms_phy *pi);
1216 extern void wlc_phy_txpwr_papd_cal_nphy(struct brcms_phy *pi);
1217 extern u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi);
1219 extern struct nphy_txgains wlc_phy_get_tx_gain_nphy(struct brcms_phy *pi);
1220 extern int wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi,
1221 struct nphy_txgains target_gain,
1223 extern int wlc_phy_cal_rxiq_nphy(struct brcms_phy *pi,
1224 struct nphy_txgains target_gain,
1226 extern void wlc_phy_txpwr_index_nphy(struct brcms_phy *pi, u8 core_mask,
1227 s8 txpwrindex, bool res);
1228 extern void wlc_phy_rssisel_nphy(struct brcms_phy *pi, u8 core, u8 rssi_type);
1229 extern int wlc_phy_poll_rssi_nphy(struct brcms_phy *pi, u8 rssi_type,
1230 s32 *rssi_buf, u8 nsamps);
1231 extern void wlc_phy_rssi_cal_nphy(struct brcms_phy *pi);
1232 extern int wlc_phy_aci_scan_nphy(struct brcms_phy *pi);
1233 extern void wlc_phy_cal_txgainctrl_nphy(struct brcms_phy *pi,
1234 s32 dBm_targetpower, bool debug);
1235 extern int wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val,
1237 extern void wlc_phy_stopplayback_nphy(struct brcms_phy *pi);
1238 extern void wlc_phy_est_tonepwr_nphy(struct brcms_phy *pi, s32 *qdBm_pwrbuf,
1240 extern void wlc_phy_radio205x_vcocal_nphy(struct brcms_phy *pi);
1242 extern int wlc_phy_rssi_compute_nphy(struct brcms_phy *pi,
1243 struct brcms_d11rxhdr *wlc_rxh);
1245 #define NPHY_TESTPATTERN_BPHY_EVM 0
1246 #define NPHY_TESTPATTERN_BPHY_RFCS 1
1248 extern void wlc_phy_nphy_tkip_rifs_war(struct brcms_phy *pi, u8 rifs);
1250 void wlc_phy_get_pwrdet_offsets(struct brcms_phy *pi, s8 *cckoffset,
1252 extern s8 wlc_phy_upd_rssi_offset(struct brcms_phy *pi, s8 rssi,
1255 extern bool wlc_phy_n_txpower_ipa_ison(struct brcms_phy *pih);
1256 #endif /* _BRCM_PHY_INT_H_ */