2 * comedi/drivers/daqboard2000.c
3 * hardware driver for IOtech DAQboard/2000
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 1999 Anders Blomdell <anders.blomdell@control.lth.se>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 * Driver: daqboard2000
20 * Description: IOTech DAQBoard/2000
21 * Author: Anders Blomdell <anders.blomdell@control.lth.se>
23 * Updated: Mon, 14 Apr 2008 15:28:52 +0100
24 * Devices: [IOTech] DAQBoard/2000 (daqboard2000)
26 * Much of the functionality of this driver was determined from reading
27 * the source code for the Windows driver.
29 * The FPGA on the board requires firmware, which is available from
30 * http://www.comedi.org in the comedi_nonfree_firmware tarball.
32 * Configuration options: not applicable, uses PCI auto config
35 * This card was obviously never intended to leave the Windows world,
36 * since it lacked all kind of hardware documentation (except for cable
37 * pinouts, plug and pray has something to catch up with yet).
39 * With some help from our swedish distributor, we got the Windows sourcecode
40 * for the card, and here are the findings so far.
42 * 1. A good document that describes the PCI interface chip is 9080db-106.pdf
43 * available from http://www.plxtech.com/products/io/pci9080
45 * 2. The initialization done so far is:
46 * a. program the FPGA (windows code sans a lot of error messages)
49 * 3. Analog out seems to work OK with DAC's disabled, if DAC's are enabled,
50 * you have to output values to all enabled DAC's until result appears, I
51 * guess that it has something to do with pacer clocks, but the source
52 * gives me no clues. I'll keep it simple so far.
55 * Each channel in the scanlist seems to be controlled by four
59 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
60 * ! | | | ! | | | ! | | | ! | | | !
61 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
64 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
65 * ! | | | ! | | | ! | | | ! | | | !
66 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
68 * +------+------+ | | | | +-- Digital input (??)
69 * | | | | +---- 10 us settling time
70 * | | | +------ Suspend acquisition (last to scan)
71 * | | +-------- Simultaneous sample and hold
72 * | +---------- Signed data format
73 * +------------------------- Correction offset low
76 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
77 * ! | | | ! | | | ! | | | ! | | | !
78 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
80 * +-----+ +--+--+ +++ +++ +--+--+
81 * | | | | +----- Expansion channel
82 * | | | +----------- Expansion gain
83 * | | +--------------- Channel (low)
84 * | +--------------------- Correction offset high
85 * +----------------------------- Correction gain low
87 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
88 * ! | | | ! | | | ! | | | ! | | | !
89 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
91 * +------+------+ | | +-+-+ | | +-- Low bank enable
92 * | | | | | +---- High bank enable
93 * | | | | +------ Hi/low select
94 * | | | +---------- Gain (1,?,2,4,8,16,32,64)
95 * | | +-------------- differential/single ended
96 * | +---------------- Unipolar
97 * +------------------------- Correction gain high
99 * 999. The card seems to have an incredible amount of capabilities, but
100 * trying to reverse engineer them from the Windows source is beyond my
105 #include <linux/module.h>
106 #include <linux/delay.h>
107 #include <linux/interrupt.h>
109 #include "../comedi_pci.h"
113 #define DAQBOARD2000_FIRMWARE "daqboard2000_firmware.bin"
115 #define DAQBOARD2000_SUBSYSTEM_IDS2 0x0002 /* Daqboard/2000 - 2 Dacs */
116 #define DAQBOARD2000_SUBSYSTEM_IDS4 0x0004 /* Daqboard/2000 - 4 Dacs */
118 /* Initialization bits for the Serial EEPROM Control Register */
119 #define DB2K_SECR_PROG_PIN_HI 0x8001767e
120 #define DB2K_SECR_PROG_PIN_LO 0x8000767e
121 #define DB2K_SECR_LOCAL_BUS_HI 0xc000767e
122 #define DB2K_SECR_LOCAL_BUS_LO 0x8000767e
123 #define DB2K_SECR_RELOAD_HI 0xa000767e
124 #define DB2K_SECR_RELOAD_LO 0x8000767e
126 /* SECR status bits */
127 #define DAQBOARD2000_EEPROM_PRESENT 0x10000000
129 /* CPLD status bits */
130 #define DAQBOARD2000_CPLD_INIT 0x0002
131 #define DAQBOARD2000_CPLD_DONE 0x0004
133 static const struct comedi_lrange range_daqboard2000_ai = {
152 * Register Memory Map
154 #define DB2K_REG_ACQ_CONTROL 0x00 /* u16 */
155 #define DB2K_REG_ACQ_SCAN_LIST_FIFO 0x02 /* u16 */
156 #define DB2K_REG_ACQ_PACER_CLOCK_DIV_LOW 0x04 /* u32 */
157 #define DB2K_REG_ACQ_SCAN_COUNTER 0x08 /* u16 */
158 #define DB2K_REG_ACQ_PACER_CLOCK_DIV_HIGH 0x0a /* u16 */
159 #define DB2K_REG_ACQ_TRIGGER_COUNT 0x0c /* u16 */
160 #define DB2K_REG_ACQ_RESULTS_FIFO 0x10 /* u16 */
161 #define DB2K_REG_ACQ_RESULTS_SHADOW 0x14 /* u16 */
162 #define DB2K_REG_ACQ_ADC_RESULT 0x18 /* u16 */
163 #define DB2K_REG_DAC_SCAN_COUNTER 0x1c /* u16 */
164 #define DB2K_REG_DAC_CONTROL 0x20 /* u16 */
165 #define DB2K_REG_DAC_FIFO 0x24 /* s16 */
166 #define DB2K_REG_DAC_PACER_CLOCK_DIV 0x2a /* u16 */
167 #define DB2K_REG_REF_DACS 0x2c /* u16 */
168 #define DB2K_REG_DIO_CONTROL 0x30 /* u16 */
169 #define DB2K_REG_P3_HSIO_DATA 0x32 /* s16 */
170 #define DB2K_REG_P3_CONTROL 0x34 /* u16 */
171 #define DB2K_REG_CAL_EEPROM_CONTROL 0x36 /* u16 */
172 #define DB2K_REG_DAC_SETTING(x) (0x38 + (x) * 2) /* s16 */
173 #define DB2K_REG_DIO_P2_EXP_IO_8_BIT 0x40 /* s16 */
174 #define DB2K_REG_COUNTER_TIMER_CONTROL 0x80 /* u16 */
175 #define DB2K_REG_COUNTER_INPUT(x) (0x88 + (x) * 2) /* s16 */
176 #define DB2K_REG_TIMER_DIV(x) (0xa0 + (x) * 2) /* u16 */
177 #define DB2K_REG_DMA_CONTROL 0xb0 /* u16 */
178 #define DB2K_REG_TRIG_CONTROL 0xb2 /* u16 */
179 #define DB2K_REG_CAL_EEPROM 0xb8 /* u16 */
180 #define DB2K_REG_ACQ_DIGITAL_MARK 0xba /* u16 */
181 #define DB2K_REG_TRIG_DACS 0xbc /* u16 */
182 #define DB2K_REG_DIO_P2_EXP_IO_16_BIT(x) (0xc0 + (x) * 2) /* s16 */
184 /* Scan Sequencer programming */
185 #define DAQBOARD2000_SeqStartScanList 0x0011
186 #define DAQBOARD2000_SeqStopScanList 0x0010
188 /* Prepare for acquisition */
189 #define DAQBOARD2000_AcqResetScanListFifo 0x0004
190 #define DAQBOARD2000_AcqResetResultsFifo 0x0002
191 #define DAQBOARD2000_AcqResetConfigPipe 0x0001
193 /* Acqusition status bits */
194 #define DAQBOARD2000_AcqResultsFIFOMore1Sample 0x0001
195 #define DAQBOARD2000_AcqResultsFIFOHasValidData 0x0002
196 #define DAQBOARD2000_AcqResultsFIFOOverrun 0x0004
197 #define DAQBOARD2000_AcqLogicScanning 0x0008
198 #define DAQBOARD2000_AcqConfigPipeFull 0x0010
199 #define DAQBOARD2000_AcqScanListFIFOEmpty 0x0020
200 #define DAQBOARD2000_AcqAdcNotReady 0x0040
201 #define DAQBOARD2000_ArbitrationFailure 0x0080
202 #define DAQBOARD2000_AcqPacerOverrun 0x0100
203 #define DAQBOARD2000_DacPacerOverrun 0x0200
204 #define DAQBOARD2000_AcqHardwareError 0x01c0
206 /* Scan Sequencer programming */
207 #define DAQBOARD2000_SeqStartScanList 0x0011
208 #define DAQBOARD2000_SeqStopScanList 0x0010
210 /* Pacer Clock Control */
211 #define DAQBOARD2000_AdcPacerInternal 0x0030
212 #define DAQBOARD2000_AdcPacerExternal 0x0032
213 #define DAQBOARD2000_AdcPacerEnable 0x0031
214 #define DAQBOARD2000_AdcPacerEnableDacPacer 0x0034
215 #define DAQBOARD2000_AdcPacerDisable 0x0030
216 #define DAQBOARD2000_AdcPacerNormalMode 0x0060
217 #define DAQBOARD2000_AdcPacerCompatibilityMode 0x0061
218 #define DAQBOARD2000_AdcPacerInternalOutEnable 0x0008
219 #define DAQBOARD2000_AdcPacerExternalRising 0x0100
222 #define DAQBOARD2000_DacFull 0x0001
223 #define DAQBOARD2000_RefBusy 0x0002
224 #define DAQBOARD2000_TrgBusy 0x0004
225 #define DAQBOARD2000_CalBusy 0x0008
226 #define DAQBOARD2000_Dac0Busy 0x0010
227 #define DAQBOARD2000_Dac1Busy 0x0020
228 #define DAQBOARD2000_Dac2Busy 0x0040
229 #define DAQBOARD2000_Dac3Busy 0x0080
232 #define DAQBOARD2000_Dac0Enable 0x0021
233 #define DAQBOARD2000_Dac1Enable 0x0031
234 #define DAQBOARD2000_Dac2Enable 0x0041
235 #define DAQBOARD2000_Dac3Enable 0x0051
236 #define DAQBOARD2000_DacEnableBit 0x0001
237 #define DAQBOARD2000_Dac0Disable 0x0020
238 #define DAQBOARD2000_Dac1Disable 0x0030
239 #define DAQBOARD2000_Dac2Disable 0x0040
240 #define DAQBOARD2000_Dac3Disable 0x0050
241 #define DAQBOARD2000_DacResetFifo 0x0004
242 #define DAQBOARD2000_DacPatternDisable 0x0060
243 #define DAQBOARD2000_DacPatternEnable 0x0061
244 #define DAQBOARD2000_DacSelectSignedData 0x0002
245 #define DAQBOARD2000_DacSelectUnsignedData 0x0000
247 /* Trigger Control */
248 #define DAQBOARD2000_TrigAnalog 0x0000
249 #define DAQBOARD2000_TrigTTL 0x0010
250 #define DAQBOARD2000_TrigTransHiLo 0x0004
251 #define DAQBOARD2000_TrigTransLoHi 0x0000
252 #define DAQBOARD2000_TrigAbove 0x0000
253 #define DAQBOARD2000_TrigBelow 0x0004
254 #define DAQBOARD2000_TrigLevelSense 0x0002
255 #define DAQBOARD2000_TrigEdgeSense 0x0000
256 #define DAQBOARD2000_TrigEnable 0x0001
257 #define DAQBOARD2000_TrigDisable 0x0000
259 /* Reference Dac Selection */
260 #define DAQBOARD2000_PosRefDacSelect 0x0100
261 #define DAQBOARD2000_NegRefDacSelect 0x0000
263 struct daq200_boardtype {
268 static const struct daq200_boardtype boardtypes[] = {
269 {"ids2", DAQBOARD2000_SUBSYSTEM_IDS2},
270 {"ids4", DAQBOARD2000_SUBSYSTEM_IDS4},
273 struct daqboard2000_private {
280 static void writeAcqScanListEntry(struct comedi_device *dev, u16 entry)
282 writew(entry & 0x00ff, dev->mmio + DB2K_REG_ACQ_SCAN_LIST_FIFO);
283 writew((entry >> 8) & 0x00ff,
284 dev->mmio + DB2K_REG_ACQ_SCAN_LIST_FIFO);
287 static void setup_sampling(struct comedi_device *dev, int chan, int gain)
289 u16 word0, word1, word2, word3;
291 /* Channel 0-7 diff, channel 8-23 single ended */
293 word1 = 0x0004; /* Last scan */
294 word2 = (chan << 6) & 0x00c0;
318 /* These should be read from EEPROM */
319 word2 |= 0x0800; /* offset */
320 word3 |= 0xc000; /* gain */
321 writeAcqScanListEntry(dev, word0);
322 writeAcqScanListEntry(dev, word1);
323 writeAcqScanListEntry(dev, word2);
324 writeAcqScanListEntry(dev, word3);
327 static int daqboard2000_ai_status(struct comedi_device *dev,
328 struct comedi_subdevice *s,
329 struct comedi_insn *insn,
330 unsigned long context)
334 status = readw(dev->mmio + DB2K_REG_ACQ_CONTROL);
335 if (status & context)
340 static int daqboard2000_ai_insn_read(struct comedi_device *dev,
341 struct comedi_subdevice *s,
342 struct comedi_insn *insn,
349 writew(DAQBOARD2000_AcqResetScanListFifo |
350 DAQBOARD2000_AcqResetResultsFifo |
351 DAQBOARD2000_AcqResetConfigPipe,
352 dev->mmio + DB2K_REG_ACQ_CONTROL);
355 * If pacer clock is not set to some high value (> 10 us), we
356 * risk multiple samples to be put into the result FIFO.
358 /* 1 second, should be long enough */
359 writel(1000000, dev->mmio + DB2K_REG_ACQ_PACER_CLOCK_DIV_LOW);
360 writew(0, dev->mmio + DB2K_REG_ACQ_PACER_CLOCK_DIV_HIGH);
362 gain = CR_RANGE(insn->chanspec);
363 chan = CR_CHAN(insn->chanspec);
366 * This doesn't look efficient. I decided to take the conservative
367 * approach when I did the insn conversion. Perhaps it would be
368 * better to have broken it completely, then someone would have been
369 * forced to fix it. --ds
371 for (i = 0; i < insn->n; i++) {
372 setup_sampling(dev, chan, gain);
373 /* Enable reading from the scanlist FIFO */
374 writew(DAQBOARD2000_SeqStartScanList,
375 dev->mmio + DB2K_REG_ACQ_CONTROL);
377 ret = comedi_timeout(dev, s, insn, daqboard2000_ai_status,
378 DAQBOARD2000_AcqConfigPipeFull);
382 writew(DAQBOARD2000_AdcPacerEnable,
383 dev->mmio + DB2K_REG_ACQ_CONTROL);
385 ret = comedi_timeout(dev, s, insn, daqboard2000_ai_status,
386 DAQBOARD2000_AcqLogicScanning);
390 ret = comedi_timeout(dev, s, insn, daqboard2000_ai_status,
391 DAQBOARD2000_AcqResultsFIFOHasValidData);
395 data[i] = readw(dev->mmio + DB2K_REG_ACQ_RESULTS_FIFO);
396 writew(DAQBOARD2000_AdcPacerDisable,
397 dev->mmio + DB2K_REG_ACQ_CONTROL);
398 writew(DAQBOARD2000_SeqStopScanList,
399 dev->mmio + DB2K_REG_ACQ_CONTROL);
405 static int daqboard2000_ao_eoc(struct comedi_device *dev,
406 struct comedi_subdevice *s,
407 struct comedi_insn *insn,
408 unsigned long context)
410 unsigned int chan = CR_CHAN(insn->chanspec);
413 status = readw(dev->mmio + DB2K_REG_DAC_CONTROL);
414 if ((status & ((chan + 1) * 0x0010)) == 0)
419 static int daqboard2000_ao_insn_write(struct comedi_device *dev,
420 struct comedi_subdevice *s,
421 struct comedi_insn *insn,
424 unsigned int chan = CR_CHAN(insn->chanspec);
427 for (i = 0; i < insn->n; i++) {
428 unsigned int val = data[i];
431 writew(val, dev->mmio + DB2K_REG_DAC_SETTING(chan));
433 ret = comedi_timeout(dev, s, insn, daqboard2000_ao_eoc, 0);
437 s->readback[chan] = val;
443 static void daqboard2000_resetLocalBus(struct comedi_device *dev)
445 struct daqboard2000_private *devpriv = dev->private;
447 writel(DB2K_SECR_LOCAL_BUS_HI, devpriv->plx + 0x6c);
449 writel(DB2K_SECR_LOCAL_BUS_LO, devpriv->plx + 0x6c);
453 static void daqboard2000_reloadPLX(struct comedi_device *dev)
455 struct daqboard2000_private *devpriv = dev->private;
457 writel(DB2K_SECR_RELOAD_LO, devpriv->plx + 0x6c);
459 writel(DB2K_SECR_RELOAD_HI, devpriv->plx + 0x6c);
461 writel(DB2K_SECR_RELOAD_LO, devpriv->plx + 0x6c);
465 static void daqboard2000_pulseProgPin(struct comedi_device *dev)
467 struct daqboard2000_private *devpriv = dev->private;
469 writel(DB2K_SECR_PROG_PIN_HI, devpriv->plx + 0x6c);
471 writel(DB2K_SECR_PROG_PIN_LO, devpriv->plx + 0x6c);
472 mdelay(10); /* Not in the original code, but I like symmetry... */
475 static int daqboard2000_pollCPLD(struct comedi_device *dev, int mask)
481 /* timeout after 50 tries -> 5ms */
482 for (i = 0; i < 50; i++) {
483 cpld = readw(dev->mmio + 0x1000);
484 if ((cpld & mask) == mask) {
494 static int daqboard2000_writeCPLD(struct comedi_device *dev, int data)
499 writew(data, dev->mmio + 0x1000);
500 if ((readw(dev->mmio + 0x1000) & DAQBOARD2000_CPLD_INIT) ==
501 DAQBOARD2000_CPLD_INIT) {
507 static int initialize_daqboard2000(struct comedi_device *dev,
508 const u8 *cpld_array, size_t len,
509 unsigned long context)
511 struct daqboard2000_private *devpriv = dev->private;
513 /* Read the serial EEPROM control register */
518 /* Check to make sure the serial eeprom is present on the board */
519 secr = readl(devpriv->plx + 0x6c);
520 if (!(secr & DAQBOARD2000_EEPROM_PRESENT))
523 for (retry = 0; retry < 3; retry++) {
524 daqboard2000_resetLocalBus(dev);
525 daqboard2000_reloadPLX(dev);
526 daqboard2000_pulseProgPin(dev);
527 if (daqboard2000_pollCPLD(dev, DAQBOARD2000_CPLD_INIT)) {
528 for (i = 0; i < len; i++) {
529 if (cpld_array[i] == 0xff &&
530 cpld_array[i + 1] == 0x20)
533 for (; i < len; i += 2) {
535 (cpld_array[i] << 8) + cpld_array[i + 1];
536 if (!daqboard2000_writeCPLD(dev, data))
540 daqboard2000_resetLocalBus(dev);
541 daqboard2000_reloadPLX(dev);
550 static void daqboard2000_adcStopDmaTransfer(struct comedi_device *dev)
554 static void daqboard2000_adcDisarm(struct comedi_device *dev)
556 /* Disable hardware triggers */
558 writew(DAQBOARD2000_TrigAnalog | DAQBOARD2000_TrigDisable,
559 dev->mmio + DB2K_REG_TRIG_CONTROL);
561 writew(DAQBOARD2000_TrigTTL | DAQBOARD2000_TrigDisable,
562 dev->mmio + DB2K_REG_TRIG_CONTROL);
564 /* Stop the scan list FIFO from loading the configuration pipe */
566 writew(DAQBOARD2000_SeqStopScanList,
567 dev->mmio + DB2K_REG_ACQ_CONTROL);
569 /* Stop the pacer clock */
571 writew(DAQBOARD2000_AdcPacerDisable,
572 dev->mmio + DB2K_REG_ACQ_CONTROL);
574 /* Stop the input dma (abort channel 1) */
575 daqboard2000_adcStopDmaTransfer(dev);
578 static void daqboard2000_activateReferenceDacs(struct comedi_device *dev)
583 /* Set the + reference dac value in the FPGA */
584 writew(0x80 | DAQBOARD2000_PosRefDacSelect,
585 dev->mmio + DB2K_REG_REF_DACS);
586 for (timeout = 0; timeout < 20; timeout++) {
587 val = readw(dev->mmio + DB2K_REG_DAC_CONTROL);
588 if ((val & DAQBOARD2000_RefBusy) == 0)
593 /* Set the - reference dac value in the FPGA */
594 writew(0x80 | DAQBOARD2000_NegRefDacSelect,
595 dev->mmio + DB2K_REG_REF_DACS);
596 for (timeout = 0; timeout < 20; timeout++) {
597 val = readw(dev->mmio + DB2K_REG_DAC_CONTROL);
598 if ((val & DAQBOARD2000_RefBusy) == 0)
604 static void daqboard2000_initializeCtrs(struct comedi_device *dev)
608 static void daqboard2000_initializeTmrs(struct comedi_device *dev)
612 static void daqboard2000_dacDisarm(struct comedi_device *dev)
616 static void daqboard2000_initializeAdc(struct comedi_device *dev)
618 daqboard2000_adcDisarm(dev);
619 daqboard2000_activateReferenceDacs(dev);
620 daqboard2000_initializeCtrs(dev);
621 daqboard2000_initializeTmrs(dev);
624 static void daqboard2000_initializeDac(struct comedi_device *dev)
626 daqboard2000_dacDisarm(dev);
629 static int daqboard2000_8255_cb(struct comedi_device *dev,
630 int dir, int port, int data,
631 unsigned long iobase)
634 writew(data, dev->mmio + iobase + port * 2);
637 return readw(dev->mmio + iobase + port * 2);
640 static const void *daqboard2000_find_boardinfo(struct comedi_device *dev,
641 struct pci_dev *pcidev)
643 const struct daq200_boardtype *board;
646 if (pcidev->subsystem_device != PCI_VENDOR_ID_IOTECH)
649 for (i = 0; i < ARRAY_SIZE(boardtypes); i++) {
650 board = &boardtypes[i];
651 if (pcidev->subsystem_device == board->id)
657 static int daqboard2000_auto_attach(struct comedi_device *dev,
658 unsigned long context_unused)
660 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
661 const struct daq200_boardtype *board;
662 struct daqboard2000_private *devpriv;
663 struct comedi_subdevice *s;
666 board = daqboard2000_find_boardinfo(dev, pcidev);
669 dev->board_ptr = board;
670 dev->board_name = board->name;
672 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
676 result = comedi_pci_enable(dev);
680 devpriv->plx = pci_ioremap_bar(pcidev, 0);
681 dev->mmio = pci_ioremap_bar(pcidev, 2);
682 if (!devpriv->plx || !dev->mmio)
685 result = comedi_alloc_subdevices(dev, 3);
689 readl(devpriv->plx + 0x6c);
691 result = comedi_load_firmware(dev, &comedi_to_pci_dev(dev)->dev,
692 DAQBOARD2000_FIRMWARE,
693 initialize_daqboard2000, 0);
697 daqboard2000_initializeAdc(dev);
698 daqboard2000_initializeDac(dev);
700 s = &dev->subdevices[0];
702 s->type = COMEDI_SUBD_AI;
703 s->subdev_flags = SDF_READABLE | SDF_GROUND;
706 s->insn_read = daqboard2000_ai_insn_read;
707 s->range_table = &range_daqboard2000_ai;
709 s = &dev->subdevices[1];
711 s->type = COMEDI_SUBD_AO;
712 s->subdev_flags = SDF_WRITABLE;
715 s->insn_write = daqboard2000_ao_insn_write;
716 s->range_table = &range_bipolar10;
718 result = comedi_alloc_subdev_readback(s);
722 s = &dev->subdevices[2];
723 return subdev_8255_init(dev, s, daqboard2000_8255_cb,
724 DB2K_REG_DIO_P2_EXP_IO_8_BIT);
727 static void daqboard2000_detach(struct comedi_device *dev)
729 struct daqboard2000_private *devpriv = dev->private;
731 if (devpriv && devpriv->plx)
732 iounmap(devpriv->plx);
733 comedi_pci_detach(dev);
736 static struct comedi_driver daqboard2000_driver = {
737 .driver_name = "daqboard2000",
738 .module = THIS_MODULE,
739 .auto_attach = daqboard2000_auto_attach,
740 .detach = daqboard2000_detach,
743 static int daqboard2000_pci_probe(struct pci_dev *dev,
744 const struct pci_device_id *id)
746 return comedi_pci_auto_config(dev, &daqboard2000_driver,
750 static const struct pci_device_id daqboard2000_pci_table[] = {
751 { PCI_DEVICE(PCI_VENDOR_ID_IOTECH, 0x0409) },
754 MODULE_DEVICE_TABLE(pci, daqboard2000_pci_table);
756 static struct pci_driver daqboard2000_pci_driver = {
757 .name = "daqboard2000",
758 .id_table = daqboard2000_pci_table,
759 .probe = daqboard2000_pci_probe,
760 .remove = comedi_pci_auto_unconfig,
762 module_comedi_pci_driver(daqboard2000_driver, daqboard2000_pci_driver);
764 MODULE_AUTHOR("Comedi http://www.comedi.org");
765 MODULE_DESCRIPTION("Comedi low-level driver");
766 MODULE_LICENSE("GPL");
767 MODULE_FIRMWARE(DAQBOARD2000_FIRMWARE);