drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at http://comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 /* #define LABPC_DEBUG    enable debugging messages */
  78
  79 #include <linux/interrupt.h>
  80 #include <linux/slab.h>
  81 #include <linux/io.h>
  82 #include "../comedidev.h"
  83
  84 #include <linux/delay.h>
  85 #include <asm/dma.h>
  86
  87 #include "8253.h"
  88 #include "8255.h"
  89 #include "mite.h"
  90 #include "comedi_fc.h"
  91 #include "ni_labpc.h"
  92
  93 #define DRV_NAME "ni_labpc"
  94
  95 /* size of io region used by board */
  96 #define LABPC_SIZE           32
  97 /* 2 MHz master clock */
  98 #define LABPC_TIMER_BASE            500
  99
 100 /* Registers for the lab-pc+ */
 101
 102 /* write-only registers */
 103 #define COMMAND1_REG    0x0
 104 #define   ADC_GAIN_MASK (0x7 << 4)
 105 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 106 /* enables multi channel scans */
 107 #define   ADC_SCAN_EN_BIT       0x80
 108 #define COMMAND2_REG    0x1
 109 /* enable pretriggering (used in conjunction with SWTRIG) */
 110 #define   PRETRIG_BIT   0x1
 111 /* enable paced conversions on external trigger */
 112 #define   HWTRIG_BIT    0x2
 113 /* enable paced conversions */
 114 #define   SWTRIG_BIT    0x4
 115 /* use two cascaded counters for pacing */
 116 #define   CASCADE_BIT   0x8
 117 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 118 #define COMMAND3_REG    0x2
 119 /* enable dma transfers */
 120 #define   DMA_EN_BIT    0x1
 121 /* enable interrupts for 8255 */
 122 #define   DIO_INTR_EN_BIT       0x2
 123 /* enable dma terminal count interrupt */
 124 #define   DMATC_INTR_EN_BIT     0x4
 125 /* enable timer interrupt */
 126 #define   TIMER_INTR_EN_BIT     0x8
 127 /* enable error interrupt */
 128 #define   ERR_INTR_EN_BIT       0x10
 129 /* enable fifo not empty interrupt */
 130 #define   ADC_FNE_INTR_EN_BIT   0x20
 131 #define ADC_CONVERT_REG 0x3
 132 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 133 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 134 #define ADC_CLEAR_REG   0x8
 135 #define DMATC_CLEAR_REG 0xa
 136 #define TIMER_CLEAR_REG 0xc
 137 /* 1200 boards only */
 138 #define COMMAND6_REG    0xe
 139 /* select ground or common-mode reference */
 140 #define   ADC_COMMON_BIT        0x1
 141 /*  adc unipolar */
 142 #define   ADC_UNIP_BIT  0x2
 143 /*  dac unipolar */
 144 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
 145 /* enable fifo half full interrupt */
 146 #define   ADC_FHF_INTR_EN_BIT   0x20
 147 /* enable interrupt on end of hardware count */
 148 #define   A1_INTR_EN_BIT        0x40
 149 /* scan up from channel zero instead of down to zero */
 150 #define   ADC_SCAN_UP_BIT 0x80
 151 #define COMMAND4_REG    0xf
 152 /* enables 'interval' scanning */
 153 #define   INTERVAL_SCAN_EN_BIT  0x1
 154 /* enables external signal on counter b1 output to trigger scan */
 155 #define   EXT_SCAN_EN_BIT       0x2
 156 /* chooses direction (output or input) for EXTCONV* line */
 157 #define   EXT_CONVERT_OUT_BIT   0x4
 158 /* chooses differential inputs for adc (in conjunction with board jumper) */
 159 #define   ADC_DIFF_BIT  0x8
 160 #define   EXT_CONVERT_DISABLE_BIT       0x10
 161 /* 1200 boards only, calibration stuff */
 162 #define COMMAND5_REG    0x1c
 163 /* enable eeprom for write */
 164 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
 165 /* enable dithering */
 166 #define   DITHER_EN_BIT 0x8
 167 /* load calibration dac */
 168 #define   CALDAC_LOAD_BIT       0x10
 169 /* serial clock - rising edge writes, falling edge reads */
 170 #define   SCLOCK_BIT    0x20
 171 /* serial data bit for writing to eeprom or calibration dacs */
 172 #define   SDATA_BIT     0x40
 173 /* enable eeprom for read/write */
 174 #define   EEPROM_EN_BIT 0x80
 175 #define INTERVAL_COUNT_REG      0x1e
 176 #define INTERVAL_LOAD_REG       0x1f
 177 #define   INTERVAL_LOAD_BITS    0x1
 178
 179 /* read-only registers */
 180 #define STATUS1_REG     0x0
 181 /* data is available in fifo */
 182 #define   DATA_AVAIL_BIT        0x1
 183 /* overrun has occurred */
 184 #define   OVERRUN_BIT   0x2
 185 /* fifo overflow */
 186 #define   OVERFLOW_BIT  0x4
 187 /* timer interrupt has occurred */
 188 #define   TIMER_BIT     0x8
 189 /* dma terminal count has occurred */
 190 #define   DMATC_BIT     0x10
 191 /* external trigger has occurred */
 192 #define   EXT_TRIG_BIT  0x40
 193 /* 1200 boards only */
 194 #define STATUS2_REG     0x1d
 195 /* programmable eeprom serial output */
 196 #define   EEPROM_OUT_BIT        0x1
 197 /* counter A1 terminal count */
 198 #define   A1_TC_BIT     0x2
 199 /* fifo not half full */
 200 #define   FNHF_BIT      0x4
 201 #define ADC_FIFO_REG    0xa
 202
 203 #define DIO_BASE_REG    0x10
 204 #define COUNTER_A_BASE_REG      0x14
 205 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 206 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
 207 #define   INIT_A0_BITS  0x14
 208 /* put hardware conversion counter output in harmless state (a1 mode 0) */
 209 #define   INIT_A1_BITS  0x70
 210 #define COUNTER_B_BASE_REG      0x18
 211
 212 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
 213 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
 214 static irqreturn_t labpc_interrupt(int irq, void *d);
 215 static int labpc_drain_fifo(struct comedi_device *dev);
 216 #ifdef CONFIG_ISA_DMA_API
 217 static void labpc_drain_dma(struct comedi_device *dev);
 218 static void handle_isa_dma(struct comedi_device *dev);
 219 #endif
 220 static void labpc_drain_dregs(struct comedi_device *dev);
 221 static int labpc_ai_cmdtest(struct comedi_device *dev,
 222                             struct comedi_subdevice *s, struct comedi_cmd *cmd);
 223 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
 224 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 225                           struct comedi_insn *insn, unsigned int *data);
 226 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
 227                           struct comedi_insn *insn, unsigned int *data);
 228 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 229                           struct comedi_insn *insn, unsigned int *data);
 230 static int labpc_calib_read_insn(struct comedi_device *dev,
 231                                  struct comedi_subdevice *s,
 232                                  struct comedi_insn *insn, unsigned int *data);
 233 static int labpc_calib_write_insn(struct comedi_device *dev,
 234                                   struct comedi_subdevice *s,
 235                                   struct comedi_insn *insn, unsigned int *data);
 236 static int labpc_eeprom_read_insn(struct comedi_device *dev,
 237                                   struct comedi_subdevice *s,
 238                                   struct comedi_insn *insn, unsigned int *data);
 239 static int labpc_eeprom_write_insn(struct comedi_device *dev,
 240                                    struct comedi_subdevice *s,
 241                                    struct comedi_insn *insn,
 242                                    unsigned int *data);
 243 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
 244 #ifdef CONFIG_ISA_DMA_API
 245 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
 246 #endif
 247 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 248 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
 249 #endif
 250 static int labpc_dio_mem_callback(int dir, int port, int data,
 251                                   unsigned long arg);
 252 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 253                              unsigned int num_bits);
 254 static unsigned int labpc_serial_in(struct comedi_device *dev);
 255 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
 256                                       unsigned int address);
 257 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
 258 static int labpc_eeprom_write(struct comedi_device *dev,
 259                                        unsigned int address,
 260                                        unsigned int value);
 261 static void write_caldac(struct comedi_device *dev, unsigned int channel,
 262                          unsigned int value);
 263
 264 enum scan_mode {
 265         MODE_SINGLE_CHAN,
 266         MODE_SINGLE_CHAN_INTERVAL,
 267         MODE_MULT_CHAN_UP,
 268         MODE_MULT_CHAN_DOWN,
 269 };
 270
 271 /* analog input ranges */
 272 #define NUM_LABPC_PLUS_AI_RANGES 16
 273 /* indicates unipolar ranges */
 274 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 275         0,
 276         0,
 277         0,
 278         0,
 279         0,
 280         0,
 281         0,
 282         0,
 283         1,
 284         1,
 285         1,
 286         1,
 287         1,
 288         1,
 289         1,
 290         1,
 291 };
 292
 293 /* map range index to gain bits */
 294 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 295         0x00,
 296         0x10,
 297         0x20,
 298         0x30,
 299         0x40,
 300         0x50,
 301         0x60,
 302         0x70,
 303         0x00,
 304         0x10,
 305         0x20,
 306         0x30,
 307         0x40,
 308         0x50,
 309         0x60,
 310         0x70,
 311 };
 312
 313 static const struct comedi_lrange range_labpc_plus_ai = {
 314         NUM_LABPC_PLUS_AI_RANGES,
 315         {
 316          BIP_RANGE(5),
 317          BIP_RANGE(4),
 318          BIP_RANGE(2.5),
 319          BIP_RANGE(1),
 320          BIP_RANGE(0.5),
 321          BIP_RANGE(0.25),
 322          BIP_RANGE(0.1),
 323          BIP_RANGE(0.05),
 324          UNI_RANGE(10),
 325          UNI_RANGE(8),
 326          UNI_RANGE(5),
 327          UNI_RANGE(2),
 328          UNI_RANGE(1),
 329          UNI_RANGE(0.5),
 330          UNI_RANGE(0.2),
 331          UNI_RANGE(0.1),
 332          }
 333 };
 334
 335 #define NUM_LABPC_1200_AI_RANGES 14
 336 /* indicates unipolar ranges */
 337 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 338         0,
 339         0,
 340         0,
 341         0,
 342         0,
 343         0,
 344         0,
 345         1,
 346         1,
 347         1,
 348         1,
 349         1,
 350         1,
 351         1,
 352 };
 353 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);
 354
 355 /* map range index to gain bits */
 356 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 357         0x00,
 358         0x20,
 359         0x30,
 360         0x40,
 361         0x50,
 362         0x60,
 363         0x70,
 364         0x00,
 365         0x20,
 366         0x30,
 367         0x40,
 368         0x50,
 369         0x60,
 370         0x70,
 371 };
 372 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
 373
 374 const struct comedi_lrange range_labpc_1200_ai = {
 375         NUM_LABPC_1200_AI_RANGES,
 376         {
 377          BIP_RANGE(5),
 378          BIP_RANGE(2.5),
 379          BIP_RANGE(1),
 380          BIP_RANGE(0.5),
 381          BIP_RANGE(0.25),
 382          BIP_RANGE(0.1),
 383          BIP_RANGE(0.05),
 384          UNI_RANGE(10),
 385          UNI_RANGE(5),
 386          UNI_RANGE(2),
 387          UNI_RANGE(1),
 388          UNI_RANGE(0.5),
 389          UNI_RANGE(0.2),
 390          UNI_RANGE(0.1),
 391          }
 392 };
 393 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
 394
 395 /* analog output ranges */
 396 #define AO_RANGE_IS_UNIPOLAR 0x1
 397 static const struct comedi_lrange range_labpc_ao = {
 398         2,
 399         {
 400          BIP_RANGE(5),
 401          UNI_RANGE(10),
 402          }
 403 };
 404
 405 /* functions that do inb/outb and readb/writeb so we can use
 406  * function pointers to decide which to use */
 407 static inline unsigned int labpc_inb(unsigned long address)
 408 {
 409         return inb(address);
 410 }
 411
 412 static inline void labpc_outb(unsigned int byte, unsigned long address)
 413 {
 414         outb(byte, address);
 415 }
 416
 417 static inline unsigned int labpc_readb(unsigned long address)
 418 {
 419         return readb((void *)address);
 420 }
 421
 422 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 423 {
 424         writeb(byte, (void *)address);
 425 }
 426
 427 static const struct labpc_board_struct labpc_boards[] = {
 428         {
 429          .name = "lab-pc-1200",
 430          .ai_speed = 10000,
 431          .bustype = isa_bustype,
 432          .register_layout = labpc_1200_layout,
 433          .has_ao = 1,
 434          .ai_range_table = &range_labpc_1200_ai,
 435          .ai_range_code = labpc_1200_ai_gain_bits,
 436          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 437          .ai_scan_up = 1,
 438          .memory_mapped_io = 0,
 439          },
 440         {
 441          .name = "lab-pc-1200ai",
 442          .ai_speed = 10000,
 443          .bustype = isa_bustype,
 444          .register_layout = labpc_1200_layout,
 445          .has_ao = 0,
 446          .ai_range_table = &range_labpc_1200_ai,
 447          .ai_range_code = labpc_1200_ai_gain_bits,
 448          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 449          .ai_scan_up = 1,
 450          .memory_mapped_io = 0,
 451          },
 452         {
 453          .name = "lab-pc+",
 454          .ai_speed = 12000,
 455          .bustype = isa_bustype,
 456          .register_layout = labpc_plus_layout,
 457          .has_ao = 1,
 458          .ai_range_table = &range_labpc_plus_ai,
 459          .ai_range_code = labpc_plus_ai_gain_bits,
 460          .ai_range_is_unipolar = labpc_plus_is_unipolar,
 461          .ai_scan_up = 0,
 462          .memory_mapped_io = 0,
 463          },
 464 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 465         {
 466          .name = "pci-1200",
 467          .device_id = 0x161,
 468          .ai_speed = 10000,
 469          .bustype = pci_bustype,
 470          .register_layout = labpc_1200_layout,
 471          .has_ao = 1,
 472          .ai_range_table = &range_labpc_1200_ai,
 473          .ai_range_code = labpc_1200_ai_gain_bits,
 474          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 475          .ai_scan_up = 1,
 476          .memory_mapped_io = 1,
 477          },
 478 /* dummy entry so pci board works when comedi_config is passed driver name */
 479         {
 480          .name = DRV_NAME,
 481          .bustype = pci_bustype,
 482          },
 483 #endif
 484 };
 485
 486 /*
 487  * Useful for shorthand access to the particular board structure
 488  */
 489 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
 490
 491 /* size in bytes of dma buffer */
 492 static const int dma_buffer_size = 0xff00;
 493 /* 2 bytes per sample */
 494 static const int sample_size = 2;
 495
 496 #define devpriv ((struct labpc_private *)dev->private)
 497
 498 static struct comedi_driver driver_labpc = {
 499         .driver_name = DRV_NAME,
 500         .module = THIS_MODULE,
 501         .attach = labpc_attach,
 502         .detach = labpc_common_detach,
 503         .num_names = ARRAY_SIZE(labpc_boards),
 504         .board_name = &labpc_boards[0].name,
 505         .offset = sizeof(struct labpc_board_struct),
 506 };
 507
 508 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 509 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 510         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161)},
 511         {0}
 512 };
 513
 514 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 515 #endif /* CONFIG_COMEDI_PCI_DRIVERS */
 516
 517 static inline int labpc_counter_load(struct comedi_device *dev,
 518                                      unsigned long base_address,
 519                                      unsigned int counter_number,
 520                                      unsigned int count, unsigned int mode)
 521 {
 522         if (thisboard->memory_mapped_io)
 523                 return i8254_mm_load((void *)base_address, 0, counter_number,
 524                                      count, mode);
 525         else
 526                 return i8254_load(base_address, 0, counter_number, count, mode);
 527 }
 528
 529 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
 530                         unsigned int irq, unsigned int dma_chan)
 531 {
 532         struct comedi_subdevice *s;
 533         int i;
 534         unsigned long isr_flags;
 535 #ifdef CONFIG_ISA_DMA_API
 536         unsigned long dma_flags;
 537 #endif
 538         short lsb, msb;
 539
 540         printk(KERN_ERR "comedi%d: ni_labpc: %s, io 0x%lx", dev->minor,
 541                                                                 thisboard->name,
 542                iobase);
 543         if (irq)
 544                 printk(", irq %u", irq);
 545         if (dma_chan)
 546                 printk(", dma %u", dma_chan);
 547         printk("\n");
 548
 549         if (iobase == 0) {
 550                 printk(KERN_ERR "io base address is zero!\n");
 551                 return -EINVAL;
 552         }
 553         /*  request io regions for isa boards */
 554         if (thisboard->bustype == isa_bustype) {
 555                 /* check if io addresses are available */
 556                 if (!request_region(iobase, LABPC_SIZE,
 557                                     driver_labpc.driver_name)) {
 558                         printk(KERN_ERR "I/O port conflict\n");
 559                         return -EIO;
 560                 }
 561         }
 562         dev->iobase = iobase;
 563
 564         if (thisboard->memory_mapped_io) {
 565                 devpriv->read_byte = labpc_readb;
 566                 devpriv->write_byte = labpc_writeb;
 567         } else {
 568                 devpriv->read_byte = labpc_inb;
 569                 devpriv->write_byte = labpc_outb;
 570         }
 571         /* initialize board's command registers */
 572         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 573         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 574         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 575         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 576         if (thisboard->register_layout == labpc_1200_layout) {
 577                 devpriv->write_byte(devpriv->command5_bits,
 578                                     dev->iobase + COMMAND5_REG);
 579                 devpriv->write_byte(devpriv->command6_bits,
 580                                     dev->iobase + COMMAND6_REG);
 581         }
 582
 583         /* grab our IRQ */
 584         if (irq) {
 585                 isr_flags = 0;
 586                 if (thisboard->bustype == pci_bustype
 587                     || thisboard->bustype == pcmcia_bustype)
 588                         isr_flags |= IRQF_SHARED;
 589                 if (request_irq(irq, labpc_interrupt, isr_flags,
 590                                 driver_labpc.driver_name, dev)) {
 591                         printk(KERN_ERR "unable to allocate irq %u\n", irq);
 592                         return -EINVAL;
 593                 }
 594         }
 595         dev->irq = irq;
 596
 597 #ifdef CONFIG_ISA_DMA_API
 598         /* grab dma channel */
 599         if (dma_chan > 3) {
 600                 printk(KERN_ERR " invalid dma channel %u\n", dma_chan);
 601                 return -EINVAL;
 602         } else if (dma_chan) {
 603                 /* allocate dma buffer */
 604                 devpriv->dma_buffer =
 605                     kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 606                 if (devpriv->dma_buffer == NULL) {
 607                         printk(KERN_ERR " failed to allocate dma buffer\n");
 608                         return -ENOMEM;
 609                 }
 610                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 611                         printk(KERN_ERR " failed to allocate dma channel %u\n",
 612                                dma_chan);
 613                         return -EINVAL;
 614                 }
 615                 devpriv->dma_chan = dma_chan;
 616                 dma_flags = claim_dma_lock();
 617                 disable_dma(devpriv->dma_chan);
 618                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 619                 release_dma_lock(dma_flags);
 620         }
 621 #endif
 622
 623         dev->board_name = thisboard->name;
 624
 625         if (alloc_subdevices(dev, 5) < 0)
 626                 return -ENOMEM;
 627
 628         /* analog input subdevice */
 629         s = dev->subdevices + 0;
 630         dev->read_subdev = s;
 631         s->type = COMEDI_SUBD_AI;
 632         s->subdev_flags =
 633             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
 634         s->n_chan = 8;
 635         s->len_chanlist = 8;
 636         s->maxdata = (1 << 12) - 1;     /* 12 bit resolution */
 637         s->range_table = thisboard->ai_range_table;
 638         s->do_cmd = labpc_ai_cmd;
 639         s->do_cmdtest = labpc_ai_cmdtest;
 640         s->insn_read = labpc_ai_rinsn;
 641         s->cancel = labpc_cancel;
 642
 643         /* analog output */
 644         s = dev->subdevices + 1;
 645         if (thisboard->has_ao) {
 646                 /*
 647                  * Could provide command support, except it only has a
 648                  * one sample hardware buffer for analog output and no
 649                  * underrun flag.
 650                  */
 651                 s->type = COMEDI_SUBD_AO;
 652                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 653                 s->n_chan = NUM_AO_CHAN;
 654                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 655                 s->range_table = &range_labpc_ao;
 656                 s->insn_read = labpc_ao_rinsn;
 657                 s->insn_write = labpc_ao_winsn;
 658                 /* initialize analog outputs to a known value */
 659                 for (i = 0; i < s->n_chan; i++) {
 660                         devpriv->ao_value[i] = s->maxdata / 2;
 661                         lsb = devpriv->ao_value[i] & 0xff;
 662                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 663                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 664                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 665                 }
 666         } else {
 667                 s->type = COMEDI_SUBD_UNUSED;
 668         }
 669
 670         /* 8255 dio */
 671         s = dev->subdevices + 2;
 672         /*  if board uses io memory we have to give a custom callback
 673          * function to the 8255 driver */
 674         if (thisboard->memory_mapped_io)
 675                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 676                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
 677         else
 678                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 679
 680         /*  calibration subdevices for boards that have one */
 681         s = dev->subdevices + 3;
 682         if (thisboard->register_layout == labpc_1200_layout) {
 683                 s->type = COMEDI_SUBD_CALIB;
 684                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 685                 s->n_chan = 16;
 686                 s->maxdata = 0xff;
 687                 s->insn_read = labpc_calib_read_insn;
 688                 s->insn_write = labpc_calib_write_insn;
 689
 690                 for (i = 0; i < s->n_chan; i++)
 691                         write_caldac(dev, i, s->maxdata / 2);
 692         } else
 693                 s->type = COMEDI_SUBD_UNUSED;
 694
 695         /* EEPROM */
 696         s = dev->subdevices + 4;
 697         if (thisboard->register_layout == labpc_1200_layout) {
 698                 s->type = COMEDI_SUBD_MEMORY;
 699                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 700                 s->n_chan = EEPROM_SIZE;
 701                 s->maxdata = 0xff;
 702                 s->insn_read = labpc_eeprom_read_insn;
 703                 s->insn_write = labpc_eeprom_write_insn;
 704
 705                 for (i = 0; i < EEPROM_SIZE; i++)
 706                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 707 #ifdef LABPC_DEBUG
 708                 printk(KERN_ERR " eeprom:");
 709                 for (i = 0; i < EEPROM_SIZE; i++)
 710                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 711                 printk("\n");
 712 #endif
 713         } else
 714                 s->type = COMEDI_SUBD_UNUSED;
 715
 716         return 0;
 717 }
 718 EXPORT_SYMBOL_GPL(labpc_common_attach);
 719
 720 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 721 {
 722         unsigned long iobase = 0;
 723         unsigned int irq = 0;
 724         unsigned int dma_chan = 0;
 725 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 726         int retval;
 727 #endif
 728
 729         /* allocate and initialize dev->private */
 730         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
 731                 return -ENOMEM;
 732
 733         /* get base address, irq etc. based on bustype */
 734         switch (thisboard->bustype) {
 735         case isa_bustype:
 736 #ifdef CONFIG_ISA_DMA_API
 737                 iobase = it->options[0];
 738                 irq = it->options[1];
 739                 dma_chan = it->options[2];
 740 #else
 741                 printk(KERN_ERR " this driver has not been built with ISA DMA "
 742                                                                 "support.\n");
 743                 return -EINVAL;
 744 #endif
 745                 break;
 746         case pci_bustype:
 747 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 748                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 749                 if (retval < 0)
 750                         return retval;
 751                 retval = mite_setup(devpriv->mite);
 752                 if (retval < 0)
 753                         return retval;
 754                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 755                 irq = mite_irq(devpriv->mite);
 756 #else
 757                 printk(KERN_ERR " this driver has not been built with PCI "
 758                                                                 "support.\n");
 759                 return -EINVAL;
 760 #endif
 761                 break;
 762         case pcmcia_bustype:
 763                 printk
 764                     (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 765                 return -EINVAL;
 766                 break;
 767         default:
 768                 printk(KERN_ERR "bug! couldn't determine board type\n");
 769                 return -EINVAL;
 770                 break;
 771         }
 772
 773         return labpc_common_attach(dev, iobase, irq, dma_chan);
 774 }
 775
 776 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
 777 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 778 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
 779 {
 780         struct mite_struct *mite;
 781         int i;
 782         for (mite = mite_devices; mite; mite = mite->next) {
 783                 if (mite->used)
 784                         continue;
 785 /* if bus/slot are specified then make sure we have the right bus/slot */
 786                 if (bus || slot) {
 787                         if (bus != mite->pcidev->bus->number
 788                             || slot != PCI_SLOT(mite->pcidev->devfn))
 789                                 continue;
 790                 }
 791                 for (i = 0; i < driver_labpc.num_names; i++) {
 792                         if (labpc_boards[i].bustype != pci_bustype)
 793                                 continue;
 794                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 795                                 devpriv->mite = mite;
 796 /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */
 797                                 dev->board_ptr = &labpc_boards[i];
 798                                 return 0;
 799                         }
 800                 }
 801         }
 802         printk(KERN_ERR "no device found\n");
 803         mite_list_devices();
 804         return -EIO;
 805 }
 806 #endif
 807
 808 void labpc_common_detach(struct comedi_device *dev)
 809 {
 810         if (dev->subdevices)
 811                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 812 #ifdef CONFIG_ISA_DMA_API
 813         /* only free stuff if it has been allocated by _attach */
 814         kfree(devpriv->dma_buffer);
 815         if (devpriv->dma_chan)
 816                 free_dma(devpriv->dma_chan);
 817 #endif
 818         if (dev->irq)
 819                 free_irq(dev->irq, dev);
 820         if (thisboard->bustype == isa_bustype && dev->iobase)
 821                 release_region(dev->iobase, LABPC_SIZE);
 822 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 823         if (devpriv->mite)
 824                 mite_unsetup(devpriv->mite);
 825 #endif
 826 };
 827 EXPORT_SYMBOL_GPL(labpc_common_detach);
 828
 829 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 830 {
 831         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 832         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 833         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 834 }
 835
 836 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 837 {
 838         unsigned long flags;
 839
 840         spin_lock_irqsave(&dev->spinlock, flags);
 841         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 842         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 843         spin_unlock_irqrestore(&dev->spinlock, flags);
 844
 845         devpriv->command3_bits = 0;
 846         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 847
 848         return 0;
 849 }
 850
 851 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 852 {
 853         if (cmd->chanlist_len == 1)
 854                 return MODE_SINGLE_CHAN;
 855
 856         /* chanlist may be NULL during cmdtest. */
 857         if (cmd->chanlist == NULL)
 858                 return MODE_MULT_CHAN_UP;
 859
 860         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 861                 return MODE_SINGLE_CHAN_INTERVAL;
 862
 863         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 864                 return MODE_MULT_CHAN_UP;
 865
 866         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 867                 return MODE_MULT_CHAN_DOWN;
 868
 869         printk(KERN_ERR "ni_labpc: bug! this should never happen\n");
 870
 871         return 0;
 872 }
 873
 874 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 875                                      const struct comedi_cmd *cmd)
 876 {
 877         int mode, channel, range, aref, i;
 878
 879         if (cmd->chanlist == NULL)
 880                 return 0;
 881
 882         mode = labpc_ai_scan_mode(cmd);
 883
 884         if (mode == MODE_SINGLE_CHAN)
 885                 return 0;
 886
 887         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 888                 if (cmd->chanlist_len > 0xff) {
 889                         comedi_error(dev,
 890                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 891                         return 1;
 892                 }
 893         }
 894
 895         channel = CR_CHAN(cmd->chanlist[0]);
 896         range = CR_RANGE(cmd->chanlist[0]);
 897         aref = CR_AREF(cmd->chanlist[0]);
 898
 899         for (i = 0; i < cmd->chanlist_len; i++) {
 900
 901                 switch (mode) {
 902                 case MODE_SINGLE_CHAN_INTERVAL:
 903                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 904                                 comedi_error(dev,
 905                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 906                                 return 1;
 907                         }
 908                         break;
 909                 case MODE_MULT_CHAN_UP:
 910                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 911                                 comedi_error(dev,
 912                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 913                                 return 1;
 914                         }
 915                         break;
 916                 case MODE_MULT_CHAN_DOWN:
 917                         if (CR_CHAN(cmd->chanlist[i]) !=
 918                             cmd->chanlist_len - i - 1) {
 919                                 comedi_error(dev,
 920                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 921                                 return 1;
 922                         }
 923                         break;
 924                 default:
 925                         printk(KERN_ERR "ni_labpc: bug! in chanlist check\n");
 926                         return 1;
 927                         break;
 928                 }
 929
 930                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 931                         comedi_error(dev,
 932                                      "entries in chanlist must all have the same range\n");
 933                         return 1;
 934                 }
 935
 936                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 937                         comedi_error(dev,
 938                                      "entries in chanlist must all have the same reference\n");
 939                         return 1;
 940                 }
 941         }
 942
 943         return 0;
 944 }
 945
 946 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
 947 {
 948         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 949                 return 1;
 950
 951         if (cmd->scan_begin_src == TRIG_FOLLOW)
 952                 return 1;
 953
 954         return 0;
 955 }
 956
 957 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
 958 {
 959         if (cmd->convert_src != TRIG_TIMER)
 960                 return 0;
 961
 962         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 963             cmd->scan_begin_src == TRIG_TIMER)
 964                 return cmd->scan_begin_arg;
 965
 966         return cmd->convert_arg;
 967 }
 968
 969 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
 970 {
 971         if (cmd->convert_src != TRIG_TIMER)
 972                 return;
 973
 974         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 975             cmd->scan_begin_src == TRIG_TIMER) {
 976                 cmd->scan_begin_arg = ns;
 977                 if (cmd->convert_arg > cmd->scan_begin_arg)
 978                         cmd->convert_arg = cmd->scan_begin_arg;
 979         } else
 980                 cmd->convert_arg = ns;
 981 }
 982
 983 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
 984 {
 985         if (cmd->scan_begin_src != TRIG_TIMER)
 986                 return 0;
 987
 988         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 989             cmd->convert_src == TRIG_TIMER)
 990                 return 0;
 991
 992         return cmd->scan_begin_arg;
 993 }
 994
 995 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
 996 {
 997         if (cmd->scan_begin_src != TRIG_TIMER)
 998                 return;
 999
1000         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
1001             cmd->convert_src == TRIG_TIMER)
1002                 return;
1003
1004         cmd->scan_begin_arg = ns;
1005 }
1006
1007 static int labpc_ai_cmdtest(struct comedi_device *dev,
1008                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
1009 {
1010         int err = 0;
1011         int tmp, tmp2;
1012         int stop_mask;
1013
1014         /* step 1: make sure trigger sources are trivially valid */
1015
1016         tmp = cmd->start_src;
1017         cmd->start_src &= TRIG_NOW | TRIG_EXT;
1018         if (!cmd->start_src || tmp != cmd->start_src)
1019                 err++;
1020
1021         tmp = cmd->scan_begin_src;
1022         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
1023         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1024                 err++;
1025
1026         tmp = cmd->convert_src;
1027         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
1028         if (!cmd->convert_src || tmp != cmd->convert_src)
1029                 err++;
1030
1031         tmp = cmd->scan_end_src;
1032         cmd->scan_end_src &= TRIG_COUNT;
1033         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1034                 err++;
1035
1036         tmp = cmd->stop_src;
1037         stop_mask = TRIG_COUNT | TRIG_NONE;
1038         if (thisboard->register_layout == labpc_1200_layout)
1039                 stop_mask |= TRIG_EXT;
1040         cmd->stop_src &= stop_mask;
1041         if (!cmd->stop_src || tmp != cmd->stop_src)
1042                 err++;
1043
1044         if (err)
1045                 return 1;
1046
1047         /* step 2: make sure trigger sources are unique and mutually compatible */
1048
1049         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1050                 err++;
1051         if (cmd->scan_begin_src != TRIG_TIMER &&
1052             cmd->scan_begin_src != TRIG_FOLLOW &&
1053             cmd->scan_begin_src != TRIG_EXT)
1054                 err++;
1055         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
1056                 err++;
1057         if (cmd->stop_src != TRIG_COUNT &&
1058             cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
1059                 err++;
1060
1061         /* can't have external stop and start triggers at once */
1062         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1063                 err++;
1064
1065         if (err)
1066                 return 2;
1067
1068         /* step 3: make sure arguments are trivially compatible */
1069
1070         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1071                 cmd->start_arg = 0;
1072                 err++;
1073         }
1074
1075         if (!cmd->chanlist_len)
1076                 err++;
1077
1078         if (cmd->scan_end_arg != cmd->chanlist_len) {
1079                 cmd->scan_end_arg = cmd->chanlist_len;
1080                 err++;
1081         }
1082
1083         if (cmd->convert_src == TRIG_TIMER) {
1084                 if (cmd->convert_arg < thisboard->ai_speed) {
1085                         cmd->convert_arg = thisboard->ai_speed;
1086                         err++;
1087                 }
1088         }
1089         /* make sure scan timing is not too fast */
1090         if (cmd->scan_begin_src == TRIG_TIMER) {
1091                 if (cmd->convert_src == TRIG_TIMER &&
1092                     cmd->scan_begin_arg <
1093                     cmd->convert_arg * cmd->chanlist_len) {
1094                         cmd->scan_begin_arg =
1095                             cmd->convert_arg * cmd->chanlist_len;
1096                         err++;
1097                 }
1098                 if (cmd->scan_begin_arg <
1099                     thisboard->ai_speed * cmd->chanlist_len) {
1100                         cmd->scan_begin_arg =
1101                             thisboard->ai_speed * cmd->chanlist_len;
1102                         err++;
1103                 }
1104         }
1105         /* stop source */
1106         switch (cmd->stop_src) {
1107         case TRIG_COUNT:
1108                 if (!cmd->stop_arg) {
1109                         cmd->stop_arg = 1;
1110                         err++;
1111                 }
1112                 break;
1113         case TRIG_NONE:
1114                 if (cmd->stop_arg != 0) {
1115                         cmd->stop_arg = 0;
1116                         err++;
1117                 }
1118                 break;
1119                 /*
1120                  * TRIG_EXT doesn't care since it doesn't
1121                  * trigger off a numbered channel
1122                  */
1123         default:
1124                 break;
1125         }
1126
1127         if (err)
1128                 return 3;
1129
1130         /* step 4: fix up any arguments */
1131
1132         tmp = cmd->convert_arg;
1133         tmp2 = cmd->scan_begin_arg;
1134         labpc_adc_timing(dev, cmd);
1135         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1136                 err++;
1137
1138         if (err)
1139                 return 4;
1140
1141         if (labpc_ai_chanlist_invalid(dev, cmd))
1142                 return 5;
1143
1144         return 0;
1145 }
1146
1147 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1148 {
1149         int channel, range, aref;
1150 #ifdef CONFIG_ISA_DMA_API
1151         unsigned long irq_flags;
1152 #endif
1153         int ret;
1154         struct comedi_async *async = s->async;
1155         struct comedi_cmd *cmd = &async->cmd;
1156         enum transfer_type xfer;
1157         unsigned long flags;
1158
1159         if (!dev->irq) {
1160                 comedi_error(dev, "no irq assigned, cannot perform command");
1161                 return -1;
1162         }
1163
1164         range = CR_RANGE(cmd->chanlist[0]);
1165         aref = CR_AREF(cmd->chanlist[0]);
1166
1167         /* make sure board is disabled before setting up acquisition */
1168         spin_lock_irqsave(&dev->spinlock, flags);
1169         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1170         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1171         spin_unlock_irqrestore(&dev->spinlock, flags);
1172
1173         devpriv->command3_bits = 0;
1174         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1175
1176         /*  initialize software conversion count */
1177         if (cmd->stop_src == TRIG_COUNT)
1178                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1179
1180         /*  setup hardware conversion counter */
1181         if (cmd->stop_src == TRIG_EXT) {
1182                 /*
1183                  * load counter a1 with count of 3
1184                  * (pc+ manual says this is minimum allowed) using mode 0
1185                  */
1186                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1187                                          1, 3, 0);
1188                 if (ret < 0) {
1189                         comedi_error(dev, "error loading counter a1");
1190                         return -1;
1191                 }
1192         } else                  /*
1193                                  * otherwise, just put a1 in mode 0
1194                                  * with no count to set its output low
1195                                  */
1196                 devpriv->write_byte(INIT_A1_BITS,
1197                                     dev->iobase + COUNTER_A_CONTROL_REG);
1198
1199 #ifdef CONFIG_ISA_DMA_API
1200         /*  figure out what method we will use to transfer data */
1201         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1202                 /*
1203                  * dma unsafe at RT priority,
1204                  * and too much setup time for TRIG_WAKE_EOS for
1205                  */
1206             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1207             /*  only available on the isa boards */
1208             thisboard->bustype == isa_bustype) {
1209                 xfer = isa_dma_transfer;
1210                 /* pc-plus has no fifo-half full interrupt */
1211         } else
1212 #endif
1213         if (thisboard->register_layout == labpc_1200_layout &&
1214                    /*  wake-end-of-scan should interrupt on fifo not empty */
1215                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1216                    /*  make sure we are taking more than just a few points */
1217                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1218                 xfer = fifo_half_full_transfer;
1219         } else
1220                 xfer = fifo_not_empty_transfer;
1221         devpriv->current_transfer = xfer;
1222
1223         /*  setup command6 register for 1200 boards */
1224         if (thisboard->register_layout == labpc_1200_layout) {
1225                 /*  reference inputs to ground or common? */
1226                 if (aref != AREF_GROUND)
1227                         devpriv->command6_bits |= ADC_COMMON_BIT;
1228                 else
1229                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1230                 /*  bipolar or unipolar range? */
1231                 if (thisboard->ai_range_is_unipolar[range])
1232                         devpriv->command6_bits |= ADC_UNIP_BIT;
1233                 else
1234                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1235                 /*  interrupt on fifo half full? */
1236                 if (xfer == fifo_half_full_transfer)
1237                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1238                 else
1239                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1240                 /*  enable interrupt on counter a1 terminal count? */
1241                 if (cmd->stop_src == TRIG_EXT)
1242                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1243                 else
1244                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1245                 /*  are we scanning up or down through channels? */
1246                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1247                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1248                 else
1249                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1250                 /*  write to register */
1251                 devpriv->write_byte(devpriv->command6_bits,
1252                                     dev->iobase + COMMAND6_REG);
1253         }
1254
1255         /* setup channel list, etc (command1 register) */
1256         devpriv->command1_bits = 0;
1257         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1258                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1259         else
1260                 channel = CR_CHAN(cmd->chanlist[0]);
1261         /* munge channel bits for differential / scan disabled mode */
1262         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1263                 channel *= 2;
1264         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1265         devpriv->command1_bits |= thisboard->ai_range_code[range];
1266         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1267         /* manual says to set scan enable bit on second pass */
1268         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1269             labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1270                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1271                 /* need a brief delay before enabling scan, or scan
1272                  * list will get screwed when you switch
1273                  * between scan up to scan down mode - dunno why */
1274                 udelay(1);
1275                 devpriv->write_byte(devpriv->command1_bits,
1276                                     dev->iobase + COMMAND1_REG);
1277         }
1278         /*  setup any external triggering/pacing (command4 register) */
1279         devpriv->command4_bits = 0;
1280         if (cmd->convert_src != TRIG_EXT)
1281                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1282         /* XXX should discard first scan when using interval scanning
1283          * since manual says it is not synced with scan clock */
1284         if (labpc_use_continuous_mode(cmd) == 0) {
1285                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1286                 if (cmd->scan_begin_src == TRIG_EXT)
1287                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1288         }
1289         /*  single-ended/differential */
1290         if (aref == AREF_DIFF)
1291                 devpriv->command4_bits |= ADC_DIFF_BIT;
1292         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1293
1294         devpriv->write_byte(cmd->chanlist_len,
1295                             dev->iobase + INTERVAL_COUNT_REG);
1296         /*  load count */
1297         devpriv->write_byte(INTERVAL_LOAD_BITS,
1298                             dev->iobase + INTERVAL_LOAD_REG);
1299
1300         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1301                 /*  set up pacing */
1302                 labpc_adc_timing(dev, cmd);
1303                 /*  load counter b0 in mode 3 */
1304                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1305                                          0, devpriv->divisor_b0, 3);
1306                 if (ret < 0) {
1307                         comedi_error(dev, "error loading counter b0");
1308                         return -1;
1309                 }
1310         }
1311         /*  set up conversion pacing */
1312         if (labpc_ai_convert_period(cmd)) {
1313                 /*  load counter a0 in mode 2 */
1314                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1315                                          0, devpriv->divisor_a0, 2);
1316                 if (ret < 0) {
1317                         comedi_error(dev, "error loading counter a0");
1318                         return -1;
1319                 }
1320         } else
1321                 devpriv->write_byte(INIT_A0_BITS,
1322                                     dev->iobase + COUNTER_A_CONTROL_REG);
1323
1324         /*  set up scan pacing */
1325         if (labpc_ai_scan_period(cmd)) {
1326                 /*  load counter b1 in mode 2 */
1327                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1328                                          1, devpriv->divisor_b1, 2);
1329                 if (ret < 0) {
1330                         comedi_error(dev, "error loading counter b1");
1331                         return -1;
1332                 }
1333         }
1334
1335         labpc_clear_adc_fifo(dev);
1336
1337 #ifdef CONFIG_ISA_DMA_API
1338         /*  set up dma transfer */
1339         if (xfer == isa_dma_transfer) {
1340                 irq_flags = claim_dma_lock();
1341                 disable_dma(devpriv->dma_chan);
1342                 /* clear flip-flop to make sure 2-byte registers for
1343                  * count and address get set correctly */
1344                 clear_dma_ff(devpriv->dma_chan);
1345                 set_dma_addr(devpriv->dma_chan,
1346                              virt_to_bus(devpriv->dma_buffer));
1347                 /*  set appropriate size of transfer */
1348                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1349                 if (cmd->stop_src == TRIG_COUNT &&
1350                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1351                         devpriv->dma_transfer_size =
1352                             devpriv->count * sample_size;
1353                 }
1354                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1355                 enable_dma(devpriv->dma_chan);
1356                 release_dma_lock(irq_flags);
1357                 /*  enable board's dma */
1358                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1359         } else
1360                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1361 #endif
1362
1363         /*  enable error interrupts */
1364         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1365         /*  enable fifo not empty interrupt? */
1366         if (xfer == fifo_not_empty_transfer)
1367                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1368         else
1369                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1370         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1371
1372         /*  startup acquisition */
1373
1374         /*  command2 reg */
1375         /*  use 2 cascaded counters for pacing */
1376         spin_lock_irqsave(&dev->spinlock, flags);
1377         devpriv->command2_bits |= CASCADE_BIT;
1378         switch (cmd->start_src) {
1379         case TRIG_EXT:
1380                 devpriv->command2_bits |= HWTRIG_BIT;
1381                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1382                 break;
1383         case TRIG_NOW:
1384                 devpriv->command2_bits |= SWTRIG_BIT;
1385                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1386                 break;
1387         default:
1388                 comedi_error(dev, "bug with start_src");
1389                 return -1;
1390                 break;
1391         }
1392         switch (cmd->stop_src) {
1393         case TRIG_EXT:
1394                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1395                 break;
1396         case TRIG_COUNT:
1397         case TRIG_NONE:
1398                 break;
1399         default:
1400                 comedi_error(dev, "bug with stop_src");
1401                 return -1;
1402         }
1403         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1404         spin_unlock_irqrestore(&dev->spinlock, flags);
1405
1406         return 0;
1407 }
1408
1409 /* interrupt service routine */
1410 static irqreturn_t labpc_interrupt(int irq, void *d)
1411 {
1412         struct comedi_device *dev = d;
1413         struct comedi_subdevice *s = dev->read_subdev;
1414         struct comedi_async *async;
1415         struct comedi_cmd *cmd;
1416
1417         if (dev->attached == 0) {
1418                 comedi_error(dev, "premature interrupt");
1419                 return IRQ_HANDLED;
1420         }
1421
1422         async = s->async;
1423         cmd = &async->cmd;
1424         async->events = 0;
1425
1426         /* read board status */
1427         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1428         if (thisboard->register_layout == labpc_1200_layout)
1429                 devpriv->status2_bits =
1430                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1431
1432         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1433                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1434             && (devpriv->status2_bits & A1_TC_BIT) == 0
1435             && (devpriv->status2_bits & FNHF_BIT)) {
1436                 return IRQ_NONE;
1437         }
1438
1439         if (devpriv->status1_bits & OVERRUN_BIT) {
1440                 /* clear error interrupt */
1441                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1442                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1443                 comedi_event(dev, s);
1444                 comedi_error(dev, "overrun");
1445                 return IRQ_HANDLED;
1446         }
1447
1448 #ifdef CONFIG_ISA_DMA_API
1449         if (devpriv->current_transfer == isa_dma_transfer) {
1450                 /*
1451                  * if a dma terminal count of external stop trigger
1452                  * has occurred
1453                  */
1454                 if (devpriv->status1_bits & DMATC_BIT ||
1455                     (thisboard->register_layout == labpc_1200_layout
1456                      && devpriv->status2_bits & A1_TC_BIT)) {
1457                         handle_isa_dma(dev);
1458                 }
1459         } else
1460 #endif
1461                 labpc_drain_fifo(dev);
1462
1463         if (devpriv->status1_bits & TIMER_BIT) {
1464                 comedi_error(dev, "handled timer interrupt?");
1465                 /*  clear it */
1466                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1467         }
1468
1469         if (devpriv->status1_bits & OVERFLOW_BIT) {
1470                 /*  clear error interrupt */
1471                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1472                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1473                 comedi_event(dev, s);
1474                 comedi_error(dev, "overflow");
1475                 return IRQ_HANDLED;
1476         }
1477         /*  handle external stop trigger */
1478         if (cmd->stop_src == TRIG_EXT) {
1479                 if (devpriv->status2_bits & A1_TC_BIT) {
1480                         labpc_drain_dregs(dev);
1481                         labpc_cancel(dev, s);
1482                         async->events |= COMEDI_CB_EOA;
1483                 }
1484         }
1485
1486         /* TRIG_COUNT end of acquisition */
1487         if (cmd->stop_src == TRIG_COUNT) {
1488                 if (devpriv->count == 0) {
1489                         labpc_cancel(dev, s);
1490                         async->events |= COMEDI_CB_EOA;
1491                 }
1492         }
1493
1494         comedi_event(dev, s);
1495         return IRQ_HANDLED;
1496 }
1497
1498 /* read all available samples from ai fifo */
1499 static int labpc_drain_fifo(struct comedi_device *dev)
1500 {
1501         unsigned int lsb, msb;
1502         short data;
1503         struct comedi_async *async = dev->read_subdev->async;
1504         const int timeout = 10000;
1505         unsigned int i;
1506
1507         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1508
1509         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1510              i++) {
1511                 /*  quit if we have all the data we want */
1512                 if (async->cmd.stop_src == TRIG_COUNT) {
1513                         if (devpriv->count == 0)
1514                                 break;
1515                         devpriv->count--;
1516                 }
1517                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1518                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1519                 data = (msb << 8) | lsb;
1520                 cfc_write_to_buffer(dev->read_subdev, data);
1521                 devpriv->status1_bits =
1522                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1523         }
1524         if (i == timeout) {
1525                 comedi_error(dev, "ai timeout, fifo never empties");
1526                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1527                 return -1;
1528         }
1529
1530         return 0;
1531 }
1532
1533 #ifdef CONFIG_ISA_DMA_API
1534 static void labpc_drain_dma(struct comedi_device *dev)
1535 {
1536         struct comedi_subdevice *s = dev->read_subdev;
1537         struct comedi_async *async = s->async;
1538         int status;
1539         unsigned long flags;
1540         unsigned int max_points, num_points, residue, leftover;
1541         int i;
1542
1543         status = devpriv->status1_bits;
1544
1545         flags = claim_dma_lock();
1546         disable_dma(devpriv->dma_chan);
1547         /* clear flip-flop to make sure 2-byte registers for
1548          * count and address get set correctly */
1549         clear_dma_ff(devpriv->dma_chan);
1550
1551         /*  figure out how many points to read */
1552         max_points = devpriv->dma_transfer_size / sample_size;
1553         /* residue is the number of points left to be done on the dma
1554          * transfer.  It should always be zero at this point unless
1555          * the stop_src is set to external triggering.
1556          */
1557         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1558         num_points = max_points - residue;
1559         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1560                 num_points = devpriv->count;
1561
1562         /*  figure out how many points will be stored next time */
1563         leftover = 0;
1564         if (async->cmd.stop_src != TRIG_COUNT) {
1565                 leftover = devpriv->dma_transfer_size / sample_size;
1566         } else if (devpriv->count > num_points) {
1567                 leftover = devpriv->count - num_points;
1568                 if (leftover > max_points)
1569                         leftover = max_points;
1570         }
1571
1572         /* write data to comedi buffer */
1573         for (i = 0; i < num_points; i++)
1574                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1575
1576         if (async->cmd.stop_src == TRIG_COUNT)
1577                 devpriv->count -= num_points;
1578
1579         /*  set address and count for next transfer */
1580         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1581         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1582         release_dma_lock(flags);
1583
1584         async->events |= COMEDI_CB_BLOCK;
1585 }
1586
1587 static void handle_isa_dma(struct comedi_device *dev)
1588 {
1589         labpc_drain_dma(dev);
1590
1591         enable_dma(devpriv->dma_chan);
1592
1593         /*  clear dma tc interrupt */
1594         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1595 }
1596 #endif
1597
1598 /* makes sure all data acquired by board is transferred to comedi (used
1599  * when acquisition is terminated by stop_src == TRIG_EXT). */
1600 static void labpc_drain_dregs(struct comedi_device *dev)
1601 {
1602 #ifdef CONFIG_ISA_DMA_API
1603         if (devpriv->current_transfer == isa_dma_transfer)
1604                 labpc_drain_dma(dev);
1605 #endif
1606
1607         labpc_drain_fifo(dev);
1608 }
1609
1610 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1611                           struct comedi_insn *insn, unsigned int *data)
1612 {
1613         int i, n;
1614         int chan, range;
1615         int lsb, msb;
1616         int timeout = 1000;
1617         unsigned long flags;
1618
1619         /*  disable timed conversions */
1620         spin_lock_irqsave(&dev->spinlock, flags);
1621         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1622         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1623         spin_unlock_irqrestore(&dev->spinlock, flags);
1624
1625         /*  disable interrupt generation and dma */
1626         devpriv->command3_bits = 0;
1627         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1628
1629         /* set gain and channel */
1630         devpriv->command1_bits = 0;
1631         chan = CR_CHAN(insn->chanspec);
1632         range = CR_RANGE(insn->chanspec);
1633         devpriv->command1_bits |= thisboard->ai_range_code[range];
1634         /* munge channel bits for differential/scan disabled mode */
1635         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1636                 chan *= 2;
1637         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1638         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1639
1640         /* setup command6 register for 1200 boards */
1641         if (thisboard->register_layout == labpc_1200_layout) {
1642                 /*  reference inputs to ground or common? */
1643                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1644                         devpriv->command6_bits |= ADC_COMMON_BIT;
1645                 else
1646                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1647                 /* bipolar or unipolar range? */
1648                 if (thisboard->ai_range_is_unipolar[range])
1649                         devpriv->command6_bits |= ADC_UNIP_BIT;
1650                 else
1651                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1652                 /* don't interrupt on fifo half full */
1653                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1654                 /* don't enable interrupt on counter a1 terminal count? */
1655                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1656                 /* write to register */
1657                 devpriv->write_byte(devpriv->command6_bits,
1658                                     dev->iobase + COMMAND6_REG);
1659         }
1660         /* setup command4 register */
1661         devpriv->command4_bits = 0;
1662         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1663         /* single-ended/differential */
1664         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1665                 devpriv->command4_bits |= ADC_DIFF_BIT;
1666         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1667
1668         /*
1669          * initialize pacer counter output to make sure it doesn't
1670          * cause any problems
1671          */
1672         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1673
1674         labpc_clear_adc_fifo(dev);
1675
1676         for (n = 0; n < insn->n; n++) {
1677                 /* trigger conversion */
1678                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1679
1680                 for (i = 0; i < timeout; i++) {
1681                         if (devpriv->read_byte(dev->iobase +
1682                                                STATUS1_REG) & DATA_AVAIL_BIT)
1683                                 break;
1684                         udelay(1);
1685                 }
1686                 if (i == timeout) {
1687                         comedi_error(dev, "timeout");
1688                         return -ETIME;
1689                 }
1690                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1691                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1692                 data[n] = (msb << 8) | lsb;
1693         }
1694
1695         return n;
1696 }
1697
1698 /* analog output insn */
1699 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1700                           struct comedi_insn *insn, unsigned int *data)
1701 {
1702         int channel, range;
1703         unsigned long flags;
1704         int lsb, msb;
1705
1706         channel = CR_CHAN(insn->chanspec);
1707
1708         /* turn off pacing of analog output channel */
1709         /* note: hardware bug in daqcard-1200 means pacing cannot
1710          * be independently enabled/disabled for its the two channels */
1711         spin_lock_irqsave(&dev->spinlock, flags);
1712         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1713         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1714         spin_unlock_irqrestore(&dev->spinlock, flags);
1715
1716         /* set range */
1717         if (thisboard->register_layout == labpc_1200_layout) {
1718                 range = CR_RANGE(insn->chanspec);
1719                 if (range & AO_RANGE_IS_UNIPOLAR)
1720                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1721                 else
1722                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1723                 /*  write to register */
1724                 devpriv->write_byte(devpriv->command6_bits,
1725                                     dev->iobase + COMMAND6_REG);
1726         }
1727         /* send data */
1728         lsb = data[0] & 0xff;
1729         msb = (data[0] >> 8) & 0xff;
1730         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1731         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1732
1733         /* remember value for readback */
1734         devpriv->ao_value[channel] = data[0];
1735
1736         return 1;
1737 }
1738
1739 /* analog output readback insn */
1740 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1741                           struct comedi_insn *insn, unsigned int *data)
1742 {
1743         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1744
1745         return 1;
1746 }
1747
1748 static int labpc_calib_read_insn(struct comedi_device *dev,
1749                                  struct comedi_subdevice *s,
1750                                  struct comedi_insn *insn, unsigned int *data)
1751 {
1752         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1753
1754         return 1;
1755 }
1756
1757 static int labpc_calib_write_insn(struct comedi_device *dev,
1758                                   struct comedi_subdevice *s,
1759                                   struct comedi_insn *insn, unsigned int *data)
1760 {
1761         int channel = CR_CHAN(insn->chanspec);
1762
1763         write_caldac(dev, channel, data[0]);
1764         return 1;
1765 }
1766
1767 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1768                                   struct comedi_subdevice *s,
1769                                   struct comedi_insn *insn, unsigned int *data)
1770 {
1771         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1772
1773         return 1;
1774 }
1775
1776 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1777                                    struct comedi_subdevice *s,
1778                                    struct comedi_insn *insn, unsigned int *data)
1779 {
1780         int channel = CR_CHAN(insn->chanspec);
1781         int ret;
1782
1783         /*  only allow writes to user area of eeprom */
1784         if (channel < 16 || channel > 127) {
1785                 printk
1786                     ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1787                 return -EINVAL;
1788         }
1789
1790         ret = labpc_eeprom_write(dev, channel, data[0]);
1791         if (ret < 0)
1792                 return ret;
1793
1794         return 1;
1795 }
1796
1797 #ifdef CONFIG_ISA_DMA_API
1798 /* utility function that suggests a dma transfer size in bytes */
1799 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1800 {
1801         unsigned int size;
1802         unsigned int freq;
1803
1804         if (cmd.convert_src == TRIG_TIMER)
1805                 freq = 1000000000 / cmd.convert_arg;
1806         /* return some default value */
1807         else
1808                 freq = 0xffffffff;
1809
1810         /* make buffer fill in no more than 1/3 second */
1811         size = (freq / 3) * sample_size;
1812
1813         /* set a minimum and maximum size allowed */
1814         if (size > dma_buffer_size)
1815                 size = dma_buffer_size - dma_buffer_size % sample_size;
1816         else if (size < sample_size)
1817                 size = sample_size;
1818
1819         return size;
1820 }
1821 #endif
1822
1823 /* figures out what counter values to use based on command */
1824 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1825 {
1826         /* max value for 16 bit counter in mode 2 */
1827         const int max_counter_value = 0x10000;
1828         /* min value for 16 bit counter in mode 2 */
1829         const int min_counter_value = 2;
1830         unsigned int base_period;
1831
1832         /*
1833          * if both convert and scan triggers are TRIG_TIMER, then they
1834          * both rely on counter b0
1835          */
1836         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1837                 /*
1838                  * pick the lowest b0 divisor value we can (for maximum input
1839                  * clock speed on convert and scan counters)
1840                  */
1841                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1842                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1843                 if (devpriv->divisor_b0 < min_counter_value)
1844                         devpriv->divisor_b0 = min_counter_value;
1845                 if (devpriv->divisor_b0 > max_counter_value)
1846                         devpriv->divisor_b0 = max_counter_value;
1847
1848                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1849
1850                 /*  set a0 for conversion frequency and b1 for scan frequency */
1851                 switch (cmd->flags & TRIG_ROUND_MASK) {
1852                 default:
1853                 case TRIG_ROUND_NEAREST:
1854                         devpriv->divisor_a0 =
1855                             (labpc_ai_convert_period(cmd) +
1856                              (base_period / 2)) / base_period;
1857                         devpriv->divisor_b1 =
1858                             (labpc_ai_scan_period(cmd) +
1859                              (base_period / 2)) / base_period;
1860                         break;
1861                 case TRIG_ROUND_UP:
1862                         devpriv->divisor_a0 =
1863                             (labpc_ai_convert_period(cmd) + (base_period -
1864                                                              1)) / base_period;
1865                         devpriv->divisor_b1 =
1866                             (labpc_ai_scan_period(cmd) + (base_period -
1867                                                           1)) / base_period;
1868                         break;
1869                 case TRIG_ROUND_DOWN:
1870                         devpriv->divisor_a0 =
1871                             labpc_ai_convert_period(cmd) / base_period;
1872                         devpriv->divisor_b1 =
1873                             labpc_ai_scan_period(cmd) / base_period;
1874                         break;
1875                 }
1876                 /*  make sure a0 and b1 values are acceptable */
1877                 if (devpriv->divisor_a0 < min_counter_value)
1878                         devpriv->divisor_a0 = min_counter_value;
1879                 if (devpriv->divisor_a0 > max_counter_value)
1880                         devpriv->divisor_a0 = max_counter_value;
1881                 if (devpriv->divisor_b1 < min_counter_value)
1882                         devpriv->divisor_b1 = min_counter_value;
1883                 if (devpriv->divisor_b1 > max_counter_value)
1884                         devpriv->divisor_b1 = max_counter_value;
1885                 /*  write corrected timings to command */
1886                 labpc_set_ai_convert_period(cmd,
1887                                             base_period * devpriv->divisor_a0);
1888                 labpc_set_ai_scan_period(cmd,
1889                                          base_period * devpriv->divisor_b1);
1890                 /*
1891                  * if only one TRIG_TIMER is used, we can employ the generic
1892                  * cascaded timing functions
1893                  */
1894         } else if (labpc_ai_scan_period(cmd)) {
1895                 unsigned int scan_period;
1896
1897                 scan_period = labpc_ai_scan_period(cmd);
1898                 /*
1899                  * calculate cascaded counter values
1900                  * that give desired scan timing
1901                  */
1902                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1903                                                &(devpriv->divisor_b1),
1904                                                &(devpriv->divisor_b0),
1905                                                &scan_period,
1906                                                cmd->flags & TRIG_ROUND_MASK);
1907                 labpc_set_ai_scan_period(cmd, scan_period);
1908         } else if (labpc_ai_convert_period(cmd)) {
1909                 unsigned int convert_period;
1910
1911                 convert_period = labpc_ai_convert_period(cmd);
1912                 /*
1913                  * calculate cascaded counter values
1914                  * that give desired conversion timing
1915                  */
1916                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1917                                                &(devpriv->divisor_a0),
1918                                                &(devpriv->divisor_b0),
1919                                                &convert_period,
1920                                                cmd->flags & TRIG_ROUND_MASK);
1921                 labpc_set_ai_convert_period(cmd, convert_period);
1922         }
1923 }
1924
1925 static int labpc_dio_mem_callback(int dir, int port, int data,
1926                                   unsigned long iobase)
1927 {
1928         if (dir) {
1929                 writeb(data, (void *)(iobase + port));
1930                 return 0;
1931         } else {
1932                 return readb((void *)(iobase + port));
1933         }
1934 }
1935
1936 /* lowlevel write to eeprom/dac */
1937 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1938                              unsigned int value_width)
1939 {
1940         int i;
1941
1942         for (i = 1; i <= value_width; i++) {
1943                 /*  clear serial clock */
1944                 devpriv->command5_bits &= ~SCLOCK_BIT;
1945                 /*  send bits most significant bit first */
1946                 if (value & (1 << (value_width - i)))
1947                         devpriv->command5_bits |= SDATA_BIT;
1948                 else
1949                         devpriv->command5_bits &= ~SDATA_BIT;
1950                 udelay(1);
1951                 devpriv->write_byte(devpriv->command5_bits,
1952                                     dev->iobase + COMMAND5_REG);
1953                 /*  set clock to load bit */
1954                 devpriv->command5_bits |= SCLOCK_BIT;
1955                 udelay(1);
1956                 devpriv->write_byte(devpriv->command5_bits,
1957                                     dev->iobase + COMMAND5_REG);
1958         }
1959 }
1960
1961 /* lowlevel read from eeprom */
1962 static unsigned int labpc_serial_in(struct comedi_device *dev)
1963 {
1964         unsigned int value = 0;
1965         int i;
1966         const int value_width = 8;      /*  number of bits wide values are */
1967
1968         for (i = 1; i <= value_width; i++) {
1969                 /*  set serial clock */
1970                 devpriv->command5_bits |= SCLOCK_BIT;
1971                 udelay(1);
1972                 devpriv->write_byte(devpriv->command5_bits,
1973                                     dev->iobase + COMMAND5_REG);
1974                 /*  clear clock bit */
1975                 devpriv->command5_bits &= ~SCLOCK_BIT;
1976                 udelay(1);
1977                 devpriv->write_byte(devpriv->command5_bits,
1978                                     dev->iobase + COMMAND5_REG);
1979                 /*  read bits most significant bit first */
1980                 udelay(1);
1981                 devpriv->status2_bits =
1982                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1983                 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1984                         value |= 1 << (value_width - i);
1985         }
1986
1987         return value;
1988 }
1989
1990 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1991                                       unsigned int address)
1992 {
1993         unsigned int value;
1994         /*  bits to tell eeprom to expect a read */
1995         const int read_instruction = 0x3;
1996         /*  8 bit write lengths to eeprom */
1997         const int write_length = 8;
1998
1999         /*  enable read/write to eeprom */
2000         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2001         udelay(1);
2002         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2003         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2004         udelay(1);
2005         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2006
2007         /*  send read instruction */
2008         labpc_serial_out(dev, read_instruction, write_length);
2009         /*  send 8 bit address to read from */
2010         labpc_serial_out(dev, address, write_length);
2011         /*  read result */
2012         value = labpc_serial_in(dev);
2013
2014         /*  disable read/write to eeprom */
2015         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2016         udelay(1);
2017         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2018
2019         return value;
2020 }
2021
2022 static int labpc_eeprom_write(struct comedi_device *dev,
2023                                 unsigned int address, unsigned int value)
2024 {
2025         const int write_enable_instruction = 0x6;
2026         const int write_instruction = 0x2;
2027         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2028         const int write_in_progress_bit = 0x1;
2029         const int timeout = 10000;
2030         int i;
2031
2032         /*  make sure there isn't already a write in progress */
2033         for (i = 0; i < timeout; i++) {
2034                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
2035                     0)
2036                         break;
2037         }
2038         if (i == timeout) {
2039                 comedi_error(dev, "eeprom write timed out");
2040                 return -ETIME;
2041         }
2042         /*  update software copy of eeprom */
2043         devpriv->eeprom_data[address] = value;
2044
2045         /*  enable read/write to eeprom */
2046         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2047         udelay(1);
2048         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2049         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2050         udelay(1);
2051         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2052
2053         /*  send write_enable instruction */
2054         labpc_serial_out(dev, write_enable_instruction, write_length);
2055         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2056         udelay(1);
2057         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2058
2059         /*  send write instruction */
2060         devpriv->command5_bits |= EEPROM_EN_BIT;
2061         udelay(1);
2062         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2063         labpc_serial_out(dev, write_instruction, write_length);
2064         /*  send 8 bit address to write to */
2065         labpc_serial_out(dev, address, write_length);
2066         /*  write value */
2067         labpc_serial_out(dev, value, write_length);
2068         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2069         udelay(1);
2070         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2071
2072         /*  disable read/write to eeprom */
2073         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2074         udelay(1);
2075         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2076
2077         return 0;
2078 }
2079
2080 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2081 {
2082         unsigned int value;
2083         const int read_status_instruction = 0x5;
2084         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2085
2086         /*  enable read/write to eeprom */
2087         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2088         udelay(1);
2089         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2090         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2091         udelay(1);
2092         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2093
2094         /*  send read status instruction */
2095         labpc_serial_out(dev, read_status_instruction, write_length);
2096         /*  read result */
2097         value = labpc_serial_in(dev);
2098
2099         /*  disable read/write to eeprom */
2100         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2101         udelay(1);
2102         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2103
2104         return value;
2105 }
2106
2107 /* writes to 8 bit calibration dacs */
2108 static void write_caldac(struct comedi_device *dev, unsigned int channel,
2109                          unsigned int value)
2110 {
2111         if (value == devpriv->caldac[channel])
2112                 return;
2113         devpriv->caldac[channel] = value;
2114
2115         /*  clear caldac load bit and make sure we don't write to eeprom */
2116         devpriv->command5_bits &=
2117             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2118         udelay(1);
2119         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2120
2121         /*  write 4 bit channel */
2122         labpc_serial_out(dev, channel, 4);
2123         /*  write 8 bit caldac value */
2124         labpc_serial_out(dev, value, 8);
2125
2126         /*  set and clear caldac bit to load caldac value */
2127         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2128         udelay(1);
2129         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2130         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2131         udelay(1);
2132         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2133 }
2134
2135 #ifdef CONFIG_COMEDI_PCI_DRIVERS
2136 static int __devinit driver_labpc_pci_probe(struct pci_dev *dev,
2137                                             const struct pci_device_id *ent)
2138 {
2139         return comedi_pci_auto_config(dev, &driver_labpc);
2140 }
2141
2142 static void __devexit driver_labpc_pci_remove(struct pci_dev *dev)
2143 {
2144         comedi_pci_auto_unconfig(dev);
2145 }
2146
2147 static struct pci_driver driver_labpc_pci_driver = {
2148         .id_table = labpc_pci_table,
2149         .probe = &driver_labpc_pci_probe,
2150         .remove = __devexit_p(&driver_labpc_pci_remove)
2151 };
2152
2153 static int __init driver_labpc_init_module(void)
2154 {
2155         int retval;
2156
2157         retval = comedi_driver_register(&driver_labpc);
2158         if (retval < 0)
2159                 return retval;
2160
2161         driver_labpc_pci_driver.name = (char *)driver_labpc.driver_name;
2162         return pci_register_driver(&driver_labpc_pci_driver);
2163 }
2164
2165 static void __exit driver_labpc_cleanup_module(void)
2166 {
2167         pci_unregister_driver(&driver_labpc_pci_driver);
2168         comedi_driver_unregister(&driver_labpc);
2169 }
2170
2171 module_init(driver_labpc_init_module);
2172 module_exit(driver_labpc_cleanup_module);
2173 #else
2174 static int __init driver_labpc_init_module(void)
2175 {
2176         return comedi_driver_register(&driver_labpc);
2177 }
2178
2179 static void __exit driver_labpc_cleanup_module(void)
2180 {
2181         comedi_driver_unregister(&driver_labpc);
2182 }
2183
2184 module_init(driver_labpc_init_module);
2185 module_exit(driver_labpc_cleanup_module);
2186 #endif
2187
2188
2189 MODULE_AUTHOR("Comedi http://www.comedi.org");
2190 MODULE_DESCRIPTION("Comedi low-level driver");
2191 MODULE_LICENSE("GPL");