2 * Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
3 * Jason Lapenta, Scott Smedley
5 * This file is part of the DT3155 Device Driver.
7 * The DT3155 Device Driver is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * The DT3155 Device Driver is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
15 * Public License for more details.
19 * This file provides some basic register io routines. It is modified from
20 * demo code provided by Data Translations.
23 #include <linux/delay.h>
27 #include "dt3155_io.h"
28 #include "dt3155_drv.h"
31 /****** local copies of board's 32 bit registers ******/
32 u32 even_dma_start_r; /* bit 0 should always be 0 */
33 u32 odd_dma_start_r; /* .. */
34 u32 even_dma_stride_r; /* bits 0&1 should always be 0 */
35 u32 odd_dma_stride_r; /* .. */
39 FIFO_TRIGGER_R fifo_trigger_r;
40 XFER_MODE_R xfer_mode_r;
42 RETRY_WAIT_CNT_R retry_wait_cnt_r;
48 MASK_LENGTH_R mask_length_r;
49 FIFO_FLAG_CNT_R fifo_flag_cnt_r;
50 IIC_CLK_DUR_R iic_clk_dur_r;
51 IIC_CSR1_R iic_csr1_r;
52 IIC_CSR2_R iic_csr2_r;
53 DMA_UPPER_LMT_R even_dma_upper_lmt_r;
54 DMA_UPPER_LMT_R odd_dma_upper_lmt_r;
58 /******** local copies of board's 8 bit I2C registers ******/
60 I2C_EVEN_CSR i2c_even_csr;
61 I2C_ODD_CSR i2c_odd_csr;
62 I2C_CONFIG i2c_config;
70 I2C_AD_CMD i2c_ad_cmd;
78 * This function handles read/write timing and r/w timeout error
80 static int wait_ibsyclr(void __iomem *mmio)
82 /* wait 100 microseconds */
84 /* __delay(loops_per_sec/10000); */
86 iic_csr2_r.reg = readl(mmio + IIC_CSR2);
87 if (iic_csr2_r.fld.NEW_CYCLE) {
88 /* if NEW_CYCLE didn't clear */
90 dt3155_errno = DT_ERR_I2C_TIMEOUT;
94 return 0; /* no error */
100 * This function handles writing to 8-bit DT3155 registers
102 * 1st parameter is pointer to 32-bit register base address
103 * 2nd parameter is reg. index;
104 * 3rd is value to be written
106 int WriteI2C(void __iomem *mmio, u_short wIregIndex, u8 byVal)
108 /* read 32 bit IIC_CSR2 register data into union */
110 iic_csr2_r.reg = readl(mmio + IIC_CSR2);
112 /* for write operation */
113 iic_csr2_r.fld.DIR_RD = 0;
114 /* I2C address of I2C register: */
115 iic_csr2_r.fld.DIR_ADDR = wIregIndex;
116 /* 8 bit data to be written to I2C reg */
117 iic_csr2_r.fld.DIR_WR_DATA = byVal;
118 /* will start a direct I2C cycle: */
119 iic_csr2_r.fld.NEW_CYCLE = 1;
121 /* xfer union data into 32 bit IIC_CSR2 register */
122 writel(iic_csr2_r.reg, mmio + IIC_CSR2);
124 /* wait for IIC cycle to finish */
125 return wait_ibsyclr(mmio);
131 * This function handles reading from 8-bit DT3155 registers
133 * 1st parameter is pointer to 32-bit register base address
134 * 2nd parameter is reg. index;
135 * 3rd is adrs of value to be read
137 int ReadI2C(void __iomem *mmio, u_short wIregIndex, u8 *byVal)
139 int writestat; /* status for return */
141 /* read 32 bit IIC_CSR2 register data into union */
142 iic_csr2_r.reg = readl(mmio + IIC_CSR2);
144 /* for read operation */
145 iic_csr2_r.fld.DIR_RD = 1;
147 /* I2C address of I2C register: */
148 iic_csr2_r.fld.DIR_ADDR = wIregIndex;
150 /* will start a direct I2C cycle: */
151 iic_csr2_r.fld.NEW_CYCLE = 1;
153 /* xfer union's data into 32 bit IIC_CSR2 register */
154 writel(iic_csr2_r.reg, mmio + IIC_CSR2);
156 /* wait for IIC cycle to finish */
157 writestat = wait_ibsyclr(mmio);
159 /* Next 2 commands read 32 bit IIC_CSR1 register's data into union */
160 /* first read data is in IIC_CSR1 */
161 iic_csr1_r.reg = readl(mmio + IIC_CSR1);
163 /* now get data u8 out of register */
164 *byVal = (u8) iic_csr1_r.fld.RD_DATA;