2 * drivers/usb/gadget/emxx_udc.c
3 * EMXX FCD (Function Controller Driver) for USB.
5 * Copyright (C) 2010 Renesas Electronics Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2
9 * as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/platform_device.h>
20 #include <linux/delay.h>
21 #include <linux/ioport.h>
22 #include <linux/slab.h>
23 #include <linux/errno.h>
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/interrupt.h>
27 #include <linux/proc_fs.h>
28 #include <linux/clk.h>
29 #include <linux/ctype.h>
30 #include <linux/string.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/workqueue.h>
33 #include <linux/device.h>
35 #include <linux/usb/ch9.h>
36 #include <linux/usb/gadget.h>
38 #include <linux/irq.h>
39 #include <linux/gpio.h>
43 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
45 static const char driver_name[] = "emxx_udc";
47 /*===========================================================================*/
49 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
50 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
51 /*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
52 static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
53 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
54 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
56 static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
57 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
59 /*===========================================================================*/
61 #define _nbu2ss_zero_len_pkt(udc, epnum) \
62 _nbu2ss_ep_in_end(udc, epnum, 0, 0)
64 /*===========================================================================*/
66 struct nbu2ss_udc udc_controller;
68 /*-------------------------------------------------------------------------*/
70 static inline u32 _nbu2ss_readl(void *address)
72 return __raw_readl(address);
75 /*-------------------------------------------------------------------------*/
77 static inline void _nbu2ss_writel(void *address, u32 udata)
79 __raw_writel(udata, address);
82 /*-------------------------------------------------------------------------*/
84 static inline void _nbu2ss_bitset(void *address, u32 udata)
86 u32 reg_dt = __raw_readl(address) | (udata);
88 __raw_writel(reg_dt, address);
91 /*-------------------------------------------------------------------------*/
93 static inline void _nbu2ss_bitclr(void *address, u32 udata)
95 u32 reg_dt = __raw_readl(address) & ~(udata);
97 __raw_writel(reg_dt, address);
100 #ifdef UDC_DEBUG_DUMP
101 /*-------------------------------------------------------------------------*/
102 static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
107 pr_info("=== %s()\n", __func__);
110 pr_err("%s udc == NULL\n", __func__);
114 spin_unlock(&udc->lock);
116 dev_dbg(&udc->dev, "\n-USB REG-\n");
117 for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
118 reg_data = _nbu2ss_readl(
119 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
120 dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
122 reg_data = _nbu2ss_readl(
123 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
124 dev_dbg(&udc->dev, " %08x", (int)reg_data);
126 reg_data = _nbu2ss_readl(
127 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
128 dev_dbg(&udc->dev, " %08x", (int)reg_data);
130 reg_data = _nbu2ss_readl(
131 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
132 dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
136 spin_lock(&udc->lock);
138 #endif /* UDC_DEBUG_DUMP */
140 /*-------------------------------------------------------------------------*/
141 /* Endpoint 0 Callback (Complete) */
142 static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
147 struct usb_ctrlrequest *p_ctrl;
148 struct nbu2ss_udc *udc;
150 if ((!_ep) || (!_req))
153 udc = (struct nbu2ss_udc *)_req->context;
155 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
157 if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
158 /*-------------------------------------------------*/
160 recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
161 selector = p_ctrl->wValue;
162 if ((recipient == USB_RECIP_DEVICE) &&
163 (selector == USB_DEVICE_TEST_MODE)) {
164 test_mode = (u32)(p_ctrl->wIndex >> 8);
165 _nbu2ss_set_test_mode(udc, test_mode);
171 /*-------------------------------------------------------------------------*/
172 /* Initialization usb_request */
173 static void _nbu2ss_create_ep0_packet(
174 struct nbu2ss_udc *udc,
179 udc->ep0_req.req.buf = p_buf;
180 udc->ep0_req.req.length = length;
181 udc->ep0_req.req.dma = 0;
182 udc->ep0_req.req.zero = TRUE;
183 udc->ep0_req.req.complete = _nbu2ss_ep0_complete;
184 udc->ep0_req.req.status = -EINPROGRESS;
185 udc->ep0_req.req.context = udc;
186 udc->ep0_req.req.actual = 0;
189 /*-------------------------------------------------------------------------*/
190 /* Acquisition of the first address of RAM(FIFO) */
191 static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
194 u32 data, last_ram_adr, use_ram_size;
196 struct ep_regs *p_ep_regs;
198 last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
201 for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
202 p_ep_regs = &udc->p_regs->EP_REGS[num];
203 data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
204 buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPn_BUF_TYPE;
207 use_ram_size += (data & EPn_MPKT) / sizeof(u32);
210 use_ram_size += ((data & EPn_MPKT) / sizeof(u32)) * 2;
213 if ((data >> 16) > last_ram_adr)
214 last_ram_adr = data >> 16;
217 return last_ram_adr + use_ram_size;
220 /*-------------------------------------------------------------------------*/
221 /* Construction of Endpoint */
222 static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
233 /*-------------------------------------------------------------*/
234 /* RAM Transfer Address */
235 begin_adrs = _nbu2ss_get_begin_ram_address(udc);
236 data = (begin_adrs << 16) | ep->ep.maxpacket;
237 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
239 /*-------------------------------------------------------------*/
240 /* Interrupt Enable */
241 data = 1 << (ep->epnum + 8);
242 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
244 /*-------------------------------------------------------------*/
245 /* Endpoint Type(Mode) */
246 /* Bulk, Interrupt, ISO */
247 switch (ep->ep_type) {
248 case USB_ENDPOINT_XFER_BULK:
252 case USB_ENDPOINT_XFER_INT:
253 data = EPn_BUF_SINGLE | EPn_INTERRUPT;
256 case USB_ENDPOINT_XFER_ISOC:
265 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
266 _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum|ep->direct));
268 if (ep->direct == USB_DIR_OUT) {
269 /*---------------------------------------------------------*/
271 data = EPn_EN | EPn_BCLR | EPn_DIR0;
272 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
274 data = (EPn_ONAK | EPn_OSTL_EN | EPn_OSTL);
275 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
277 data = (EPn_OUT_EN | EPn_OUT_END_EN);
278 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
280 /*---------------------------------------------------------*/
282 data = (EPn_EN | EPn_BCLR | EPn_AUTO);
283 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
286 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
288 data = (EPn_IN_EN | EPn_IN_END_EN);
289 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
295 /*-------------------------------------------------------------------------*/
296 /* Release of Endpoint */
297 static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
302 if ((ep->epnum == 0) || (udc->vbus_active == 0))
307 /*-------------------------------------------------------------*/
308 /* RAM Transfer Address */
309 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
311 /*-------------------------------------------------------------*/
312 /* Interrupt Disable */
313 data = 1 << (ep->epnum + 8);
314 _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
316 if (ep->direct == USB_DIR_OUT) {
317 /*---------------------------------------------------------*/
319 data = EPn_ONAK | EPn_BCLR;
320 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
322 data = EPn_EN | EPn_DIR0;
323 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
325 data = EPn_OUT_EN | EPn_OUT_END_EN;
326 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
328 /*---------------------------------------------------------*/
331 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
333 data = EPn_EN | EPn_AUTO;
334 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
336 data = EPn_IN_EN | EPn_IN_END_EN;
337 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
343 /*-------------------------------------------------------------------------*/
344 /* DMA setting (without Endpoint 0) */
345 static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
350 data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
351 if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
352 return; /* Not Support DMA */
356 if (ep->direct == USB_DIR_OUT) {
357 /*---------------------------------------------------------*/
359 data = ep->ep.maxpacket;
360 _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
362 /*---------------------------------------------------------*/
363 /* Transfer Direct */
364 data = DCR1_EPn_DIR0;
365 _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
367 /*---------------------------------------------------------*/
369 data = EPn_STOP_MODE | EPn_STOP_SET | EPn_DMAMODE0;
370 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
372 /*---------------------------------------------------------*/
374 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPn_AUTO);
376 /*---------------------------------------------------------*/
378 data = EPn_BURST_SET | EPn_DMAMODE0;
379 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
383 /*-------------------------------------------------------------------------*/
384 /* DMA setting release */
385 static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
389 struct fc_regs *preg = udc->p_regs;
391 if (udc->vbus_active == 0)
392 return; /* VBUS OFF */
394 data = _nbu2ss_readl(&preg->USBSSCONF);
395 if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
396 return; /* Not Support DMA */
400 _nbu2ss_ep_dma_abort(udc, ep);
402 if (ep->direct == USB_DIR_OUT) {
403 /*---------------------------------------------------------*/
405 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
406 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_DIR0);
407 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
409 /*---------------------------------------------------------*/
411 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
412 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
416 /*-------------------------------------------------------------------------*/
418 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
420 struct fc_regs *preg = udc->p_regs;
422 _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum-1].EP_DCR1, DCR1_EPn_REQEN);
423 mdelay(DMA_DISABLE_TIME); /* DCR1_EPn_REQEN Clear */
424 _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum-1].EP_DMA_CTRL, EPn_DMA_EN);
427 /*-------------------------------------------------------------------------*/
428 /* Start IN Transfer */
429 static void _nbu2ss_ep_in_end(
430 struct nbu2ss_udc *udc,
438 struct fc_regs *preg = udc->p_regs;
440 if (length >= sizeof(u32))
444 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
446 /* Writing of 1-4 bytes */
448 _nbu2ss_writel(&preg->EP0_WRITE, data32);
450 data = ((length << 5) & EP0_DW) | EP0_DEND;
451 _nbu2ss_writel(&preg->EP0_CONTROL, data);
453 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
457 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
459 /* Writing of 1-4 bytes */
461 _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
463 data = (((((u32)length) << 5) & EPn_DW) | EPn_DEND);
464 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
466 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
471 /*-------------------------------------------------------------------------*/
472 static void _nbu2ss_dma_map_single(
473 struct nbu2ss_udc *udc,
474 struct nbu2ss_ep *ep,
475 struct nbu2ss_req *req,
479 if (req->req.dma == DMA_ADDR_INVALID) {
481 req->req.dma = ep->phys_buf;
483 req->req.dma = dma_map_single(
484 udc->gadget.dev.parent,
487 (direct == USB_DIR_IN)
488 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
493 dma_sync_single_for_device(
494 udc->gadget.dev.parent,
497 (direct == USB_DIR_IN)
498 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
504 /*-------------------------------------------------------------------------*/
505 static void _nbu2ss_dma_unmap_single(
506 struct nbu2ss_udc *udc,
507 struct nbu2ss_ep *ep,
508 struct nbu2ss_req *req,
516 if (direct == USB_DIR_OUT) {
517 count = req->req.actual % 4;
520 p += (req->req.actual - count);
521 memcpy(data, p, count);
526 if (req->unaligned) {
527 if (direct == USB_DIR_OUT)
528 memcpy(req->req.buf, ep->virt_buf,
529 req->req.actual & 0xfffffffc);
531 dma_unmap_single(udc->gadget.dev.parent,
532 req->req.dma, req->req.length,
533 (direct == USB_DIR_IN)
536 req->req.dma = DMA_ADDR_INVALID;
540 dma_sync_single_for_cpu(udc->gadget.dev.parent,
541 req->req.dma, req->req.length,
542 (direct == USB_DIR_IN)
549 p += (req->req.actual - count);
550 memcpy(p, data, count);
555 /*-------------------------------------------------------------------------*/
556 /* Endpoint 0 OUT Transfer (PIO) */
557 static int EP0_out_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
562 union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
564 /*------------------------------------------------------------*/
566 iWordLength = length / sizeof(u32);
568 /*------------------------------------------------------------*/
571 for (i = 0; i < iWordLength; i++) {
572 pBuf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
575 nret = iWordLength * sizeof(u32);
581 /*-------------------------------------------------------------------------*/
582 /* Endpoint 0 OUT Transfer (PIO, OverBytes) */
583 static int EP0_out_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
587 union usb_reg_access Temp32;
588 union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
590 if ((length > 0) && (length < sizeof(u32))) {
591 Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
592 for (i = 0 ; i < length ; i++)
593 pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
600 /*-------------------------------------------------------------------------*/
601 /* Endpoint 0 IN Transfer (PIO) */
602 static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
605 u32 iMaxLength = EP0_PACKETSIZE;
607 u32 iWriteLength = 0;
608 union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
610 /*------------------------------------------------------------*/
611 /* Transfer Length */
612 if (iMaxLength < length)
613 iWordLength = iMaxLength / sizeof(u32);
615 iWordLength = length / sizeof(u32);
617 /*------------------------------------------------------------*/
619 for (i = 0; i < iWordLength; i++) {
620 _nbu2ss_writel(&udc->p_regs->EP0_WRITE, pBuf32->dw);
622 iWriteLength += sizeof(u32);
628 /*-------------------------------------------------------------------------*/
629 /* Endpoint 0 IN Transfer (PIO, OverBytes) */
630 static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
633 union usb_reg_access Temp32;
634 union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
636 if ((iRemainSize > 0) && (iRemainSize < sizeof(u32))) {
637 for (i = 0 ; i < iRemainSize ; i++)
638 Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
639 _nbu2ss_ep_in_end(udc, 0, Temp32.dw, iRemainSize);
647 /*-------------------------------------------------------------------------*/
648 /* Transfer NULL Packet (Epndoint 0) */
649 static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
653 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
654 data &= ~(u32)EP0_INAK;
657 data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
659 data |= (EP0_INAK_EN | EP0_DEND);
661 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
666 /*-------------------------------------------------------------------------*/
667 /* Receive NULL Packet (Endpoint 0) */
668 static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
672 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
673 data &= ~(u32)EP0_ONAK;
678 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
683 /*-------------------------------------------------------------------------*/
684 static int _nbu2ss_ep0_in_transfer(
685 struct nbu2ss_udc *udc,
686 struct nbu2ss_req *req
689 u8 *pBuffer; /* IN Data Buffer */
694 /*-------------------------------------------------------------*/
695 /* End confirmation */
696 if (req->req.actual == req->req.length) {
697 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
700 EP0_send_NULL(udc, FALSE);
705 return 0; /* Transfer End */
708 /*-------------------------------------------------------------*/
710 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
712 data &= ~(u32)EP0_INAK;
713 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
715 iRemainSize = req->req.length - req->req.actual;
716 pBuffer = (u8 *)req->req.buf;
717 pBuffer += req->req.actual;
719 /*-------------------------------------------------------------*/
721 result = EP0_in_PIO(udc, pBuffer, iRemainSize);
723 req->div_len = result;
724 iRemainSize -= result;
726 if (iRemainSize == 0) {
727 EP0_send_NULL(udc, FALSE);
731 if ((iRemainSize < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
733 result += EP0_in_OverBytes(udc, pBuffer, iRemainSize);
734 req->div_len = result;
740 /*-------------------------------------------------------------------------*/
741 static int _nbu2ss_ep0_out_transfer(
742 struct nbu2ss_udc *udc,
743 struct nbu2ss_req *req
752 /*-------------------------------------------------------------*/
753 /* Receive data confirmation */
754 iRecvLength = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
755 if (iRecvLength != 0) {
759 iRemainSize = req->req.length - req->req.actual;
760 pBuffer = (u8 *)req->req.buf;
761 pBuffer += req->req.actual;
763 result = EP0_out_PIO(udc, pBuffer
764 , min(iRemainSize, iRecvLength));
768 req->req.actual += result;
769 iRecvLength -= result;
771 if ((iRecvLength > 0) && (iRecvLength < sizeof(u32))) {
773 iRemainSize -= result;
775 result = EP0_out_OverBytes(udc, pBuffer
776 , min(iRemainSize, iRecvLength));
777 req->req.actual += result;
783 /*-------------------------------------------------------------*/
784 /* End confirmation */
785 if (req->req.actual == req->req.length) {
786 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
789 EP0_receive_NULL(udc, FALSE);
794 return 0; /* Transfer End */
797 if ((req->req.actual % EP0_PACKETSIZE) != 0)
798 return 0; /* Short Packet Transfer End */
800 if (req->req.actual > req->req.length) {
801 dev_err(udc->dev, " *** Overrun Error\n");
806 iRemainSize = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
807 if (iRemainSize & EP0_ONAK) {
808 /*---------------------------------------------------*/
810 _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
818 /*-------------------------------------------------------------------------*/
819 static int _nbu2ss_out_dma(
820 struct nbu2ss_udc *udc,
821 struct nbu2ss_req *req,
832 int result = -EINVAL;
833 struct fc_regs *preg = udc->p_regs;
836 return 1; /* DMA is forwarded */
838 req->dma_flag = TRUE;
839 pBuffer = req->req.dma;
840 pBuffer += req->req.actual;
843 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
845 /* Number of transfer packets */
846 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
847 dmacnt = (length / mpkt);
848 lmpkt = (length % mpkt) & ~(u32)0x03;
850 if (dmacnt > DMA_MAX_COUNT) {
851 dmacnt = DMA_MAX_COUNT;
853 } else if (lmpkt != 0) {
855 burst = 0; /* Burst OFF */
859 data = mpkt | (lmpkt << 16);
860 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
862 data = ((dmacnt & 0xff) << 16) | DCR1_EPn_DIR0 | DCR1_EPn_REQEN;
863 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
866 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
867 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
869 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
871 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
873 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
875 result = length & ~(u32)0x03;
876 req->div_len = result;
881 /*-------------------------------------------------------------------------*/
882 static int _nbu2ss_epn_out_pio(
883 struct nbu2ss_udc *udc,
884 struct nbu2ss_ep *ep,
885 struct nbu2ss_req *req,
893 union usb_reg_access Temp32;
894 union usb_reg_access *pBuf32;
896 struct fc_regs *preg = udc->p_regs;
899 return 1; /* DMA is forwarded */
904 pBuffer = (u8 *)req->req.buf;
905 pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
907 iWordLength = length / sizeof(u32);
908 if (iWordLength > 0) {
909 /*---------------------------------------------------------*/
910 /* Copy of every four bytes */
911 for (i = 0; i < iWordLength; i++) {
913 _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_READ);
916 result = iWordLength * sizeof(u32);
919 data = length - result;
921 /*---------------------------------------------------------*/
922 /* Copy of fraction byte */
923 Temp32.dw = _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_READ);
924 for (i = 0 ; i < data ; i++)
925 pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
929 req->req.actual += result;
931 if ((req->req.actual == req->req.length)
932 || ((req->req.actual % ep->ep.maxpacket) != 0)) {
940 /*-------------------------------------------------------------------------*/
941 static int _nbu2ss_epn_out_data(
942 struct nbu2ss_udc *udc,
943 struct nbu2ss_ep *ep,
944 struct nbu2ss_req *req,
957 iBufSize = min((req->req.length - req->req.actual), data_size);
959 if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
960 && (req->req.dma != 0)
961 && (iBufSize >= sizeof(u32))) {
962 nret = _nbu2ss_out_dma(udc, req, num, iBufSize);
964 iBufSize = min_t(u32, iBufSize, ep->ep.maxpacket);
965 nret = _nbu2ss_epn_out_pio(udc, ep, req, iBufSize);
971 /*-------------------------------------------------------------------------*/
972 static int _nbu2ss_epn_out_transfer(
973 struct nbu2ss_udc *udc,
974 struct nbu2ss_ep *ep,
975 struct nbu2ss_req *req
981 struct fc_regs *preg = udc->p_regs;
988 /*-------------------------------------------------------------*/
991 = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPn_LDATA;
993 if (iRecvLength != 0) {
994 result = _nbu2ss_epn_out_data(udc, ep, req, iRecvLength);
995 if (iRecvLength < ep->ep.maxpacket) {
996 if (iRecvLength == result) {
997 req->req.actual += result;
1002 if ((req->req.actual == req->req.length)
1003 || ((req->req.actual % ep->ep.maxpacket) != 0)) {
1010 if ((req->req.actual % ep->ep.maxpacket) == 0) {
1018 if (req->req.actual > req->req.length) {
1019 dev_err(udc->dev, " Overrun Error\n");
1020 dev_err(udc->dev, " actual = %d, length = %d\n",
1021 req->req.actual, req->req.length);
1022 result = -EOVERFLOW;
1028 /*-------------------------------------------------------------------------*/
1029 static int _nbu2ss_in_dma(
1030 struct nbu2ss_udc *udc,
1031 struct nbu2ss_ep *ep,
1032 struct nbu2ss_req *req,
1038 u32 mpkt; /* MaxPacketSize */
1039 u32 lmpkt; /* Last Packet Data Size */
1040 u32 dmacnt; /* IN Data Size */
1043 int result = -EINVAL;
1044 struct fc_regs *preg = udc->p_regs;
1047 return 1; /* DMA is forwarded */
1050 if (req->req.actual == 0)
1051 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1053 req->dma_flag = TRUE;
1055 /* MAX Packet Size */
1056 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
1058 if ((DMA_MAX_COUNT * mpkt) < length)
1059 iWriteLength = DMA_MAX_COUNT * mpkt;
1061 iWriteLength = length;
1063 /*------------------------------------------------------------*/
1064 /* Number of transmission packets */
1065 if (mpkt < iWriteLength) {
1066 dmacnt = iWriteLength / mpkt;
1067 lmpkt = (iWriteLength % mpkt) & ~(u32)0x3;
1071 lmpkt = mpkt & ~(u32)0x3;
1075 lmpkt = iWriteLength & ~(u32)0x3;
1078 /* Packet setting */
1079 data = mpkt | (lmpkt << 16);
1080 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1082 /* Address setting */
1083 pBuffer = req->req.dma;
1084 pBuffer += req->req.actual;
1085 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
1087 /* Packet and DMA setting */
1088 data = ((dmacnt & 0xff) << 16) | DCR1_EPn_REQEN;
1089 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1091 /* Packet setting of EPC */
1092 data = dmacnt << 16;
1093 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1095 /*DMA setting of EPC */
1096 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
1098 result = iWriteLength & ~(u32)0x3;
1099 req->div_len = result;
1104 /*-------------------------------------------------------------------------*/
1105 static int _nbu2ss_epn_in_pio(
1106 struct nbu2ss_udc *udc,
1107 struct nbu2ss_ep *ep,
1108 struct nbu2ss_req *req,
1116 union usb_reg_access Temp32;
1117 union usb_reg_access *pBuf32 = NULL;
1119 struct fc_regs *preg = udc->p_regs;
1122 return 1; /* DMA is forwarded */
1125 pBuffer = (u8 *)req->req.buf;
1126 pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
1128 iWordLength = length / sizeof(u32);
1129 if (iWordLength > 0) {
1130 for (i = 0; i < iWordLength; i++) {
1132 &preg->EP_REGS[ep->epnum-1].EP_WRITE
1138 result = iWordLength * sizeof(u32);
1142 if (result != ep->ep.maxpacket) {
1143 data = length - result;
1145 for (i = 0 ; i < data ; i++)
1146 Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
1148 _nbu2ss_ep_in_end(udc, ep->epnum, Temp32.dw, data);
1152 req->div_len = result;
1157 /*-------------------------------------------------------------------------*/
1158 static int _nbu2ss_epn_in_data(
1159 struct nbu2ss_udc *udc,
1160 struct nbu2ss_ep *ep,
1161 struct nbu2ss_req *req,
1171 num = ep->epnum - 1;
1173 if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
1174 && (req->req.dma != 0)
1175 && (data_size >= sizeof(u32))) {
1176 nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1178 data_size = min_t(u32, data_size, ep->ep.maxpacket);
1179 nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1185 /*-------------------------------------------------------------------------*/
1186 static int _nbu2ss_epn_in_transfer(
1187 struct nbu2ss_udc *udc,
1188 struct nbu2ss_ep *ep,
1189 struct nbu2ss_req *req
1200 num = ep->epnum - 1;
1202 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1204 /*-------------------------------------------------------------*/
1205 /* State confirmation of FIFO */
1206 if (req->req.actual == 0) {
1207 if ((status & EPn_IN_EMPTY) == 0)
1208 return 1; /* Not Empty */
1211 if ((status & EPn_IN_FULL) != 0)
1212 return 1; /* Not Empty */
1215 /*-------------------------------------------------------------*/
1216 /* Start transfer */
1217 iBufSize = req->req.length - req->req.actual;
1219 result = _nbu2ss_epn_in_data(udc, ep, req, iBufSize);
1220 else if (req->req.length == 0)
1221 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1226 /*-------------------------------------------------------------------------*/
1227 static int _nbu2ss_start_transfer(
1228 struct nbu2ss_udc *udc,
1229 struct nbu2ss_ep *ep,
1230 struct nbu2ss_req *req,
1235 req->dma_flag = FALSE;
1238 if (req->req.length == 0)
1241 if ((req->req.length % ep->ep.maxpacket) == 0)
1242 req->zero = req->req.zero;
1247 if (ep->epnum == 0) {
1249 switch (udc->ep0state) {
1250 case EP0_IN_DATA_PHASE:
1251 nret = _nbu2ss_ep0_in_transfer(udc, req);
1254 case EP0_OUT_DATA_PHASE:
1255 nret = _nbu2ss_ep0_out_transfer(udc, req);
1258 case EP0_IN_STATUS_PHASE:
1259 nret = EP0_send_NULL(udc, TRUE);
1268 if (ep->direct == USB_DIR_OUT) {
1271 nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1274 nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1281 /*-------------------------------------------------------------------------*/
1282 static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1286 struct nbu2ss_req *req;
1288 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1292 if (ep->epnum > 0) {
1293 length = _nbu2ss_readl(
1294 &ep->udc->p_regs->EP_REGS[ep->epnum-1].EP_LEN_DCNT);
1296 length &= EPn_LDATA;
1297 if (length < ep->ep.maxpacket)
1301 _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1304 /*-------------------------------------------------------------------------*/
1305 /* Endpoint Toggle Reset */
1306 static void _nbu2ss_endpoint_toggle_reset(
1307 struct nbu2ss_udc *udc,
1313 if ((ep_adrs == 0) || (ep_adrs == 0x80))
1316 num = (ep_adrs & 0x7F) - 1;
1318 if (ep_adrs & USB_DIR_IN)
1321 data = EPn_BCLR | EPn_OPIDCLR;
1323 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1326 /*-------------------------------------------------------------------------*/
1327 /* Endpoint STALL set */
1328 static void _nbu2ss_set_endpoint_stall(
1329 struct nbu2ss_udc *udc,
1335 struct nbu2ss_ep *ep;
1336 struct fc_regs *preg = udc->p_regs;
1338 if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1341 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1344 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1347 epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1349 ep = &udc->ep[epnum];
1355 if (ep_adrs & USB_DIR_IN)
1356 data = EPn_BCLR | EPn_ISTL;
1358 data = EPn_OSTL_EN | EPn_OSTL;
1360 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1363 ep->stalled = FALSE;
1364 if (ep_adrs & USB_DIR_IN) {
1365 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1369 _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1372 data |= EPn_OSTL_EN;
1374 _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1378 ep->stalled = FALSE;
1381 _nbu2ss_restert_transfer(ep);
1387 /*-------------------------------------------------------------------------*/
1388 /* Device Descriptor */
1389 static struct usb_device_descriptor device_desc = {
1390 .bLength = sizeof(device_desc),
1391 .bDescriptorType = USB_DT_DEVICE,
1392 .bcdUSB = cpu_to_le16(0x0200),
1393 .bDeviceClass = USB_CLASS_VENDOR_SPEC,
1394 .bDeviceSubClass = 0x00,
1395 .bDeviceProtocol = 0x00,
1396 .bMaxPacketSize0 = 64,
1397 .idVendor = cpu_to_le16(0x0409),
1398 .idProduct = cpu_to_le16(0xfff0),
1399 .bcdDevice = 0xffff,
1400 .iManufacturer = 0x00,
1402 .iSerialNumber = 0x00,
1403 .bNumConfigurations = 0x01,
1406 /*-------------------------------------------------------------------------*/
1407 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1411 if (mode > MAX_TEST_MODE_NUM)
1414 dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
1416 data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1417 data &= ~TEST_FORCE_ENABLE;
1418 data |= mode << TEST_MODE_SHIFT;
1420 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1421 _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1424 /*-------------------------------------------------------------------------*/
1425 static int _nbu2ss_set_feature_device(
1426 struct nbu2ss_udc *udc,
1431 int result = -EOPNOTSUPP;
1434 case USB_DEVICE_REMOTE_WAKEUP:
1435 if (wIndex == 0x0000) {
1436 udc->remote_wakeup = U2F_ENABLE;
1441 case USB_DEVICE_TEST_MODE:
1443 if (wIndex <= MAX_TEST_MODE_NUM)
1454 /*-------------------------------------------------------------------------*/
1455 static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1458 u32 data = 0, bit_data;
1459 struct fc_regs *preg = udc->p_regs;
1461 epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1463 data = _nbu2ss_readl(&preg->EP0_CONTROL);
1467 data = _nbu2ss_readl(&preg->EP_REGS[epnum-1].EP_CONTROL);
1468 if ((data & EPn_EN) == 0)
1471 if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1472 bit_data = EPn_ISTL;
1474 bit_data = EPn_OSTL;
1477 if ((data & bit_data) == 0)
1482 /*-------------------------------------------------------------------------*/
1483 static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1485 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1486 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1487 u16 selector = udc->ctrl.wValue;
1488 u16 wIndex = udc->ctrl.wIndex;
1490 int result = -EOPNOTSUPP;
1492 if ((udc->ctrl.wLength != 0x0000) ||
1493 (direction != USB_DIR_OUT)) {
1497 switch (recipient) {
1498 case USB_RECIP_DEVICE:
1501 _nbu2ss_set_feature_device(udc, selector, wIndex);
1504 case USB_RECIP_ENDPOINT:
1505 if (0x0000 == (wIndex & 0xFF70)) {
1506 if (selector == USB_ENDPOINT_HALT) {
1507 ep_adrs = wIndex & 0xFF;
1509 _nbu2ss_endpoint_toggle_reset(
1513 _nbu2ss_set_endpoint_stall(
1514 udc, ep_adrs, bset);
1526 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1531 /*-------------------------------------------------------------------------*/
1532 static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1535 enum usb_device_speed speed = USB_SPEED_FULL;
1537 data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1538 if (data & HIGH_SPEED)
1539 speed = USB_SPEED_HIGH;
1544 /*-------------------------------------------------------------------------*/
1545 static void _nbu2ss_epn_set_stall(
1546 struct nbu2ss_udc *udc,
1547 struct nbu2ss_ep *ep
1554 struct fc_regs *preg = udc->p_regs;
1556 if (ep->direct == USB_DIR_IN) {
1558 ; limit_cnt < IN_DATA_EMPTY_COUNT
1561 regdata = _nbu2ss_readl(
1562 &preg->EP_REGS[ep->epnum-1].EP_STATUS);
1564 if ((regdata & EPn_IN_DATA) == 0)
1571 ep_adrs = ep->epnum | ep->direct;
1572 _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1575 /*-------------------------------------------------------------------------*/
1576 static int std_req_get_status(struct nbu2ss_udc *udc)
1579 u16 status_data = 0;
1580 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1581 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1583 int result = -EINVAL;
1585 if ((udc->ctrl.wValue != 0x0000)
1586 || (direction != USB_DIR_IN)) {
1591 length = min_t(u16, udc->ctrl.wLength, sizeof(status_data));
1593 switch (recipient) {
1594 case USB_RECIP_DEVICE:
1595 if (udc->ctrl.wIndex == 0x0000) {
1596 if (udc->gadget.is_selfpowered)
1597 status_data |= (1 << USB_DEVICE_SELF_POWERED);
1599 if (udc->remote_wakeup)
1600 status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1606 case USB_RECIP_ENDPOINT:
1607 if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
1608 ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
1609 result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1612 status_data |= (1 << USB_ENDPOINT_HALT);
1621 memcpy(udc->ep0_buf, &status_data, length);
1622 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1623 _nbu2ss_ep0_in_transfer(udc, &udc->ep0_req);
1626 dev_err(udc->dev, " Error GET_STATUS\n");
1632 /*-------------------------------------------------------------------------*/
1633 static int std_req_clear_feature(struct nbu2ss_udc *udc)
1635 return _nbu2ss_req_feature(udc, FALSE);
1638 /*-------------------------------------------------------------------------*/
1639 static int std_req_set_feature(struct nbu2ss_udc *udc)
1641 return _nbu2ss_req_feature(udc, TRUE);
1644 /*-------------------------------------------------------------------------*/
1645 static int std_req_set_address(struct nbu2ss_udc *udc)
1648 u32 wValue = udc->ctrl.wValue;
1650 if ((udc->ctrl.bRequestType != 0x00) ||
1651 (udc->ctrl.wIndex != 0x0000) ||
1652 (udc->ctrl.wLength != 0x0000)) {
1656 if (wValue != (wValue & 0x007F))
1659 wValue <<= USB_ADRS_SHIFT;
1661 _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1662 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1667 /*-------------------------------------------------------------------------*/
1668 static int std_req_set_configuration(struct nbu2ss_udc *udc)
1670 u32 ConfigValue = (u32)(udc->ctrl.wValue & 0x00ff);
1672 if ((udc->ctrl.wIndex != 0x0000) ||
1673 (udc->ctrl.wLength != 0x0000) ||
1674 (udc->ctrl.bRequestType != 0x00)) {
1678 udc->curr_config = ConfigValue;
1680 if (ConfigValue > 0) {
1681 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1682 udc->devstate = USB_STATE_CONFIGURED;
1685 _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1686 udc->devstate = USB_STATE_ADDRESS;
1692 /*-------------------------------------------------------------------------*/
1693 static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1695 if ((!udc) && (!pdata))
1698 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1700 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1703 /*-------------------------------------------------------------------------*/
1704 static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1706 bool bcall_back = TRUE;
1708 struct usb_ctrlrequest *p_ctrl;
1710 p_ctrl = &udc->ctrl;
1711 _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1713 /* ep0 state control */
1714 if (p_ctrl->wLength == 0) {
1715 udc->ep0state = EP0_IN_STATUS_PHASE;
1718 if (p_ctrl->bRequestType & USB_DIR_IN)
1719 udc->ep0state = EP0_IN_DATA_PHASE;
1721 udc->ep0state = EP0_OUT_DATA_PHASE;
1724 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1725 switch (p_ctrl->bRequest) {
1726 case USB_REQ_GET_STATUS:
1727 nret = std_req_get_status(udc);
1731 case USB_REQ_CLEAR_FEATURE:
1732 nret = std_req_clear_feature(udc);
1736 case USB_REQ_SET_FEATURE:
1737 nret = std_req_set_feature(udc);
1741 case USB_REQ_SET_ADDRESS:
1742 nret = std_req_set_address(udc);
1746 case USB_REQ_SET_CONFIGURATION:
1747 nret = std_req_set_configuration(udc);
1756 if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1758 /*--------------------------------------*/
1760 nret = EP0_send_NULL(udc, TRUE);
1765 spin_unlock(&udc->lock);
1766 nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1767 spin_lock(&udc->lock);
1771 udc->ep0state = EP0_IDLE;
1776 /*-------------------------------------------------------------------------*/
1777 static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1780 struct nbu2ss_req *req;
1781 struct nbu2ss_ep *ep = &udc->ep[0];
1783 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1785 req = &udc->ep0_req;
1787 req->req.actual += req->div_len;
1790 nret = _nbu2ss_ep0_in_transfer(udc, req);
1792 udc->ep0state = EP0_OUT_STATUS_PAHSE;
1793 EP0_receive_NULL(udc, TRUE);
1799 /*-------------------------------------------------------------------------*/
1800 static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1803 struct nbu2ss_req *req;
1804 struct nbu2ss_ep *ep = &udc->ep[0];
1806 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1808 req = &udc->ep0_req;
1810 nret = _nbu2ss_ep0_out_transfer(udc, req);
1812 udc->ep0state = EP0_IN_STATUS_PHASE;
1813 EP0_send_NULL(udc, TRUE);
1815 } else if (nret < 0) {
1816 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1817 req->req.status = nret;
1823 /*-------------------------------------------------------------------------*/
1824 static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1826 struct nbu2ss_req *req;
1827 struct nbu2ss_ep *ep = &udc->ep[0];
1829 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1831 req = &udc->ep0_req;
1832 if (req->req.complete)
1833 req->req.complete(&ep->ep, &req->req);
1836 if (req->req.complete)
1837 _nbu2ss_ep_done(ep, req, 0);
1840 udc->ep0state = EP0_IDLE;
1845 /*-------------------------------------------------------------------------*/
1846 static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1853 status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1854 intr = status & EP0_STATUS_RW_BIT;
1855 _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~(u32)intr);
1857 status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1858 | STG_END_INT | EP0_OUT_NULL_INT);
1861 dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
1862 dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
1866 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1867 udc->gadget.speed = _nbu2ss_get_speed(udc);
1869 for (i = 0; i < EP0_END_XFER; i++) {
1870 switch (udc->ep0state) {
1872 if (status & SETUP_INT) {
1874 nret = _nbu2ss_decode_request(udc);
1878 case EP0_IN_DATA_PHASE:
1879 if (status & EP0_IN_INT) {
1880 status &= ~EP0_IN_INT;
1881 nret = _nbu2ss_ep0_in_data_stage(udc);
1885 case EP0_OUT_DATA_PHASE:
1886 if (status & EP0_OUT_INT) {
1887 status &= ~EP0_OUT_INT;
1888 nret = _nbu2ss_ep0_out_data_stage(udc);
1892 case EP0_IN_STATUS_PHASE:
1893 if ((status & STG_END_INT) || (status & SETUP_INT)) {
1894 status &= ~(STG_END_INT | EP0_IN_INT);
1895 nret = _nbu2ss_ep0_status_stage(udc);
1899 case EP0_OUT_STATUS_PAHSE:
1900 if ((status & STG_END_INT)
1901 || (status & SETUP_INT)
1902 || (status & EP0_OUT_NULL_INT)) {
1903 status &= ~(STG_END_INT
1905 | EP0_OUT_NULL_INT);
1907 nret = _nbu2ss_ep0_status_stage(udc);
1923 _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
1927 /*-------------------------------------------------------------------------*/
1928 static void _nbu2ss_ep_done(
1929 struct nbu2ss_ep *ep,
1930 struct nbu2ss_req *req,
1933 struct nbu2ss_udc *udc = ep->udc;
1935 list_del_init(&req->queue);
1937 if (status == -ECONNRESET)
1938 _nbu2ss_fifo_flush(udc, ep);
1940 if (likely(req->req.status == -EINPROGRESS))
1941 req->req.status = status;
1944 _nbu2ss_epn_set_stall(udc, ep);
1946 if (!list_empty(&ep->queue))
1947 _nbu2ss_restert_transfer(ep);
1951 if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1952 (req->req.dma != 0))
1953 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1956 spin_unlock(&udc->lock);
1957 req->req.complete(&ep->ep, &req->req);
1958 spin_lock(&udc->lock);
1961 /*-------------------------------------------------------------------------*/
1962 static inline void _nbu2ss_epn_in_int(
1963 struct nbu2ss_udc *udc,
1964 struct nbu2ss_ep *ep,
1965 struct nbu2ss_req *req)
1970 struct fc_regs *preg = udc->p_regs;
1973 return; /* DMA is forwarded */
1975 req->req.actual += req->div_len;
1978 if (req->req.actual != req->req.length) {
1979 /*---------------------------------------------------------*/
1980 /* remainder of data */
1981 result = _nbu2ss_epn_in_transfer(udc, ep, req);
1984 if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
1987 _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_STATUS);
1989 if ((status & EPn_IN_FULL) == 0) {
1990 /*-----------------------------------------*/
1991 /* 0 Length Packet */
1993 _nbu2ss_zero_len_pkt(udc, ep->epnum);
2000 /*---------------------------------------------------------*/
2002 _nbu2ss_ep_done(ep, req, result);
2006 /*-------------------------------------------------------------------------*/
2007 static inline void _nbu2ss_epn_out_int(
2008 struct nbu2ss_udc *udc,
2009 struct nbu2ss_ep *ep,
2010 struct nbu2ss_req *req)
2014 result = _nbu2ss_epn_out_transfer(udc, ep, req);
2016 _nbu2ss_ep_done(ep, req, result);
2019 /*-------------------------------------------------------------------------*/
2020 static inline void _nbu2ss_epn_in_dma_int(
2021 struct nbu2ss_udc *udc,
2022 struct nbu2ss_ep *ep,
2023 struct nbu2ss_req *req)
2027 struct usb_request *preq;
2034 preq->actual += req->div_len;
2036 req->dma_flag = FALSE;
2039 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
2042 if (preq->actual != preq->length) {
2043 _nbu2ss_epn_in_transfer(udc, ep, req);
2045 mpkt = ep->ep.maxpacket;
2046 size = preq->actual % mpkt;
2048 if (((preq->actual & 0x03) == 0) && (size < mpkt))
2049 _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
2051 _nbu2ss_epn_in_int(udc, ep, req);
2056 /*-------------------------------------------------------------------------*/
2057 static inline void _nbu2ss_epn_out_dma_int(
2058 struct nbu2ss_udc *udc,
2059 struct nbu2ss_ep *ep,
2060 struct nbu2ss_req *req)
2064 u32 dmacnt, ep_dmacnt;
2066 struct fc_regs *preg = udc->p_regs;
2068 num = ep->epnum - 1;
2070 if (req->req.actual == req->req.length) {
2071 if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
2073 req->dma_flag = FALSE;
2074 _nbu2ss_ep_done(ep, req, 0);
2079 ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
2083 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2084 dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
2087 if (ep_dmacnt == dmacnt)
2091 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_REQEN);
2094 mpkt = ep->ep.maxpacket;
2095 if ((req->div_len % mpkt) == 0)
2096 req->div_len -= mpkt * dmacnt;
2099 if ((req->req.actual % ep->ep.maxpacket) > 0) {
2100 if (req->req.actual == req->div_len) {
2102 req->dma_flag = FALSE;
2103 _nbu2ss_ep_done(ep, req, 0);
2108 req->req.actual += req->div_len;
2110 req->dma_flag = FALSE;
2112 _nbu2ss_epn_out_int(udc, ep, req);
2115 /*-------------------------------------------------------------------------*/
2116 static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2121 struct nbu2ss_req *req;
2122 struct nbu2ss_ep *ep = &udc->ep[epnum];
2126 /* Interrupt Status */
2127 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2129 /* Interrupt Clear */
2130 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~(u32)status);
2132 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
2134 /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2138 if (status & EPn_OUT_END_INT) {
2139 status &= ~EPn_OUT_INT;
2140 _nbu2ss_epn_out_dma_int(udc, ep, req);
2143 if (status & EPn_OUT_INT)
2144 _nbu2ss_epn_out_int(udc, ep, req);
2146 if (status & EPn_IN_END_INT) {
2147 status &= ~EPn_IN_INT;
2148 _nbu2ss_epn_in_dma_int(udc, ep, req);
2151 if (status & EPn_IN_INT)
2152 _nbu2ss_epn_in_int(udc, ep, req);
2155 /*-------------------------------------------------------------------------*/
2156 static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2159 _nbu2ss_ep0_int(udc);
2161 _nbu2ss_epn_int(udc, epnum);
2164 /*-------------------------------------------------------------------------*/
2165 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2167 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2168 _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2171 /*-------------------------------------------------------------------------*/
2172 static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2173 struct nbu2ss_ep *ep,
2176 struct nbu2ss_req *req;
2178 /* Endpoint Disable */
2179 _nbu2ss_epn_exit(udc, ep);
2182 _nbu2ss_ep_dma_exit(udc, ep);
2184 if (list_empty(&ep->queue))
2187 /* called with irqs blocked */
2188 list_for_each_entry(req, &ep->queue, queue) {
2189 _nbu2ss_ep_done(ep, req, status);
2195 /*-------------------------------------------------------------------------*/
2196 static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2198 struct nbu2ss_ep *ep;
2200 udc->gadget.speed = USB_SPEED_UNKNOWN;
2202 _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2205 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2206 _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2210 /*-------------------------------------------------------------------------*/
2211 static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2215 if (udc->vbus_active == 0)
2221 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2222 | PUE2) & ~(u32)CONNECTB;
2224 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2229 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2232 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2233 udc->gadget.speed = USB_SPEED_UNKNOWN;
2239 /*-------------------------------------------------------------------------*/
2240 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2242 struct fc_regs *p = udc->p_regs;
2244 if (udc->vbus_active == 0)
2247 if (ep->epnum == 0) {
2249 _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2253 _nbu2ss_ep_dma_abort(udc, ep);
2254 _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPn_BCLR);
2258 /*-------------------------------------------------------------------------*/
2259 static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2263 if (udc->udc_enabled)
2269 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2270 udelay(EPC_RST_DISABLE_TIME); /* 1us wait */
2272 _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2273 mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2275 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2277 _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2279 _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2280 HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2282 while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2284 udelay(1); /* 1us wait */
2285 if (waitcnt == EPC_PLL_LOCK_COUNT) {
2286 dev_err(udc->dev, "*** Reset Cancel failed\n");
2291 _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2293 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2296 _nbu2ss_ep0_enable(udc);
2298 /* USB Interrupt Enable */
2299 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2301 udc->udc_enabled = TRUE;
2306 /*-------------------------------------------------------------------------*/
2307 static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2309 _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2310 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2313 /*-------------------------------------------------------------------------*/
2314 static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2316 if (udc->udc_enabled) {
2317 udc->udc_enabled = FALSE;
2318 _nbu2ss_reset_controller(udc);
2319 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2323 /*-------------------------------------------------------------------------*/
2324 static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2330 mdelay(VBUS_CHATTERING_MDELAY); /* wait (ms) */
2333 reg_dt = gpio_get_value(VBUS_VALUE);
2336 udc->linux_suspended = 0;
2338 _nbu2ss_reset_controller(udc);
2339 dev_info(udc->dev, " ----- VBUS OFF\n");
2341 if (udc->vbus_active == 1) {
2343 udc->vbus_active = 0;
2344 if (udc->usb_suspended) {
2345 udc->usb_suspended = 0;
2346 /* _nbu2ss_reset_controller(udc); */
2348 udc->devstate = USB_STATE_NOTATTACHED;
2350 _nbu2ss_quiesce(udc);
2352 spin_unlock(&udc->lock);
2353 udc->driver->disconnect(&udc->gadget);
2354 spin_lock(&udc->lock);
2357 _nbu2ss_disable_controller(udc);
2360 mdelay(5); /* wait (5ms) */
2361 reg_dt = gpio_get_value(VBUS_VALUE);
2365 dev_info(udc->dev, " ----- VBUS ON\n");
2367 if (udc->linux_suspended)
2370 if (udc->vbus_active == 0) {
2372 udc->vbus_active = 1;
2373 udc->devstate = USB_STATE_POWERED;
2375 nret = _nbu2ss_enable_controller(udc);
2377 _nbu2ss_disable_controller(udc);
2378 udc->vbus_active = 0;
2382 _nbu2ss_pullup(udc, 1);
2384 #ifdef UDC_DEBUG_DUMP
2385 _nbu2ss_dump_register(udc);
2386 #endif /* UDC_DEBUG_DUMP */
2389 if (udc->devstate == USB_STATE_POWERED)
2390 _nbu2ss_pullup(udc, 1);
2395 /*-------------------------------------------------------------------------*/
2396 static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2398 udc->devstate = USB_STATE_DEFAULT;
2399 udc->remote_wakeup = 0;
2401 _nbu2ss_quiesce(udc);
2403 udc->ep0state = EP0_IDLE;
2406 /*-------------------------------------------------------------------------*/
2407 static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2409 if (udc->usb_suspended == 1) {
2410 udc->usb_suspended = 0;
2411 if (udc->driver && udc->driver->resume) {
2412 spin_unlock(&udc->lock);
2413 udc->driver->resume(&udc->gadget);
2414 spin_lock(&udc->lock);
2419 /*-------------------------------------------------------------------------*/
2420 static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2424 if (udc->usb_suspended == 0) {
2425 reg_dt = gpio_get_value(VBUS_VALUE);
2430 udc->usb_suspended = 1;
2431 if (udc->driver && udc->driver->suspend) {
2432 spin_unlock(&udc->lock);
2433 udc->driver->suspend(&udc->gadget);
2434 spin_lock(&udc->lock);
2437 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2441 /*-------------------------------------------------------------------------*/
2442 /* VBUS (GPIO153) Interrupt */
2443 static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2445 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2447 spin_lock(&udc->lock);
2448 _nbu2ss_check_vbus(udc);
2449 spin_unlock(&udc->lock);
2454 /*-------------------------------------------------------------------------*/
2455 /* Interrupt (udc) */
2456 static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2458 u8 suspend_flag = 0;
2462 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2463 struct fc_regs *preg = udc->p_regs;
2465 if (gpio_get_value(VBUS_VALUE) == 0) {
2466 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2467 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2471 spin_lock(&udc->lock);
2474 if (gpio_get_value(VBUS_VALUE) == 0) {
2475 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2476 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2479 status = _nbu2ss_readl(&preg->USB_INT_STA);
2484 _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2486 if (status & USB_RST_INT) {
2488 _nbu2ss_int_bus_reset(udc);
2491 if (status & RSUM_INT) {
2493 _nbu2ss_int_usb_resume(udc);
2496 if (status & SPND_INT) {
2501 if (status & EPn_INT) {
2503 int_bit = status >> 8;
2505 for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2508 _nbu2ss_ep_int(udc, epnum);
2519 _nbu2ss_int_usb_suspend(udc);
2521 spin_unlock(&udc->lock);
2526 /*-------------------------------------------------------------------------*/
2528 static int nbu2ss_ep_enable(
2530 const struct usb_endpoint_descriptor *desc)
2533 unsigned long flags;
2535 struct nbu2ss_ep *ep;
2536 struct nbu2ss_udc *udc;
2538 if ((!_ep) || (!desc)) {
2539 pr_err(" *** %s, bad param\n", __func__);
2543 ep = container_of(_ep, struct nbu2ss_ep, ep);
2544 if ((!ep) || (!ep->udc)) {
2545 pr_err(" *** %s, ep == NULL !!\n", __func__);
2549 ep_type = usb_endpoint_type(desc);
2550 if ((ep_type == USB_ENDPOINT_XFER_CONTROL)
2551 || (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2553 pr_err(" *** %s, bat bmAttributes\n", __func__);
2558 if (udc->vbus_active == 0)
2562 || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2564 dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
2568 spin_lock_irqsave(&udc->lock, flags);
2571 ep->epnum = usb_endpoint_num(desc);
2572 ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2573 ep->ep_type = ep_type;
2576 ep->stalled = FALSE;
2578 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2581 _nbu2ss_ep_dma_init(udc, ep);
2583 /* Endpoint setting */
2584 _nbu2ss_ep_init(udc, ep);
2586 spin_unlock_irqrestore(&udc->lock, flags);
2591 /*-------------------------------------------------------------------------*/
2592 static int nbu2ss_ep_disable(struct usb_ep *_ep)
2594 struct nbu2ss_ep *ep;
2595 struct nbu2ss_udc *udc;
2596 unsigned long flags;
2599 pr_err(" *** %s, bad param\n", __func__);
2603 ep = container_of(_ep, struct nbu2ss_ep, ep);
2604 if ((!ep) || (!ep->udc)) {
2605 pr_err("udc: *** %s, ep == NULL !!\n", __func__);
2610 if (udc->vbus_active == 0)
2613 spin_lock_irqsave(&udc->lock, flags);
2614 _nbu2ss_nuke(udc, ep, -EINPROGRESS); /* dequeue request */
2615 spin_unlock_irqrestore(&udc->lock, flags);
2620 /*-------------------------------------------------------------------------*/
2621 static struct usb_request *nbu2ss_ep_alloc_request(
2625 struct nbu2ss_req *req;
2627 req = kzalloc(sizeof(*req), gfp_flags);
2632 req->req.dma = DMA_ADDR_INVALID;
2634 INIT_LIST_HEAD(&req->queue);
2639 /*-------------------------------------------------------------------------*/
2640 static void nbu2ss_ep_free_request(
2642 struct usb_request *_req)
2644 struct nbu2ss_req *req;
2647 req = container_of(_req, struct nbu2ss_req, req);
2653 /*-------------------------------------------------------------------------*/
2654 static int nbu2ss_ep_queue(
2656 struct usb_request *_req,
2659 struct nbu2ss_req *req;
2660 struct nbu2ss_ep *ep;
2661 struct nbu2ss_udc *udc;
2662 unsigned long flags;
2664 int result = -EINVAL;
2666 /* catch various bogus parameters */
2667 if ((!_ep) || (!_req)) {
2669 pr_err("udc: %s --- _ep == NULL\n", __func__);
2672 pr_err("udc: %s --- _req == NULL\n", __func__);
2677 req = container_of(_req, struct nbu2ss_req, req);
2679 (!_req->complete || !_req->buf
2680 || !list_empty(&req->queue))) {
2682 if (!_req->complete)
2683 pr_err("udc: %s --- !_req->complete\n", __func__);
2686 pr_err("udc:%s --- !_req->buf\n", __func__);
2688 if (!list_empty(&req->queue))
2689 pr_err("%s --- !list_empty(&req->queue)\n", __func__);
2694 ep = container_of(_ep, struct nbu2ss_ep, ep);
2697 if (udc->vbus_active == 0) {
2698 dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
2702 if (unlikely(!udc->driver)) {
2703 dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
2708 spin_lock_irqsave(&udc->lock, flags);
2711 if ((uintptr_t)req->req.buf & 0x3)
2712 req->unaligned = TRUE;
2714 req->unaligned = FALSE;
2716 if (req->unaligned) {
2718 ep->virt_buf = (u8 *)dma_alloc_coherent(
2720 &ep->phys_buf, GFP_ATOMIC | GFP_DMA);
2721 if (ep->epnum > 0) {
2722 if (ep->direct == USB_DIR_IN)
2723 memcpy(ep->virt_buf, req->req.buf,
2728 if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2729 (req->req.dma != 0))
2730 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2733 _req->status = -EINPROGRESS;
2736 bflag = list_empty(&ep->queue);
2737 list_add_tail(&req->queue, &ep->queue);
2739 if (bflag && !ep->stalled) {
2741 result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
2743 dev_err(udc->dev, " *** %s, result = %d\n", __func__,
2745 list_del(&req->queue);
2746 } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2748 if (req->req.length < 4 &&
2749 req->req.length == req->req.actual)
2751 if (req->req.length == req->req.actual)
2753 _nbu2ss_ep_done(ep, req, result);
2757 spin_unlock_irqrestore(&udc->lock, flags);
2762 /*-------------------------------------------------------------------------*/
2763 static int nbu2ss_ep_dequeue(
2765 struct usb_request *_req)
2767 struct nbu2ss_req *req;
2768 struct nbu2ss_ep *ep;
2769 struct nbu2ss_udc *udc;
2770 unsigned long flags;
2772 /* catch various bogus parameters */
2773 if ((!_ep) || (!_req)) {
2774 /* pr_err("%s, bad param(1)\n", __func__); */
2778 ep = container_of(_ep, struct nbu2ss_ep, ep);
2780 pr_err("%s, ep == NULL !!\n", __func__);
2788 spin_lock_irqsave(&udc->lock, flags);
2790 /* make sure it's actually queued on this endpoint */
2791 list_for_each_entry(req, &ep->queue, queue) {
2792 if (&req->req == _req)
2795 if (&req->req != _req) {
2796 spin_unlock_irqrestore(&udc->lock, flags);
2797 pr_debug("%s no queue(EINVAL)\n", __func__);
2801 _nbu2ss_ep_done(ep, req, -ECONNRESET);
2803 spin_unlock_irqrestore(&udc->lock, flags);
2808 /*-------------------------------------------------------------------------*/
2809 static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2812 unsigned long flags;
2814 struct nbu2ss_ep *ep;
2815 struct nbu2ss_udc *udc;
2818 pr_err("%s, bad param\n", __func__);
2822 ep = container_of(_ep, struct nbu2ss_ep, ep);
2824 pr_err("%s, bad ep\n", __func__);
2830 dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
2834 spin_lock_irqsave(&udc->lock, flags);
2836 ep_adrs = ep->epnum | ep->direct;
2838 _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2839 ep->stalled = FALSE;
2841 if (list_empty(&ep->queue))
2842 _nbu2ss_epn_set_stall(udc, ep);
2850 spin_unlock_irqrestore(&udc->lock, flags);
2855 static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2857 return nbu2ss_ep_set_halt(_ep, 1);
2860 /*-------------------------------------------------------------------------*/
2861 static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2864 struct nbu2ss_ep *ep;
2865 struct nbu2ss_udc *udc;
2866 unsigned long flags;
2867 struct fc_regs *preg;
2870 pr_err("%s, bad param\n", __func__);
2874 ep = container_of(_ep, struct nbu2ss_ep, ep);
2876 pr_err("%s, bad ep\n", __func__);
2882 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2888 data = gpio_get_value(VBUS_VALUE);
2892 spin_lock_irqsave(&udc->lock, flags);
2894 if (ep->epnum == 0) {
2895 data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2898 data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_LEN_DCNT)
2902 spin_unlock_irqrestore(&udc->lock, flags);
2907 /*-------------------------------------------------------------------------*/
2908 static void nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2911 struct nbu2ss_ep *ep;
2912 struct nbu2ss_udc *udc;
2913 unsigned long flags;
2916 pr_err("udc: %s, bad param\n", __func__);
2920 ep = container_of(_ep, struct nbu2ss_ep, ep);
2922 pr_err("udc: %s, bad ep\n", __func__);
2928 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2932 data = gpio_get_value(VBUS_VALUE);
2936 spin_lock_irqsave(&udc->lock, flags);
2937 _nbu2ss_fifo_flush(udc, ep);
2938 spin_unlock_irqrestore(&udc->lock, flags);
2941 /*-------------------------------------------------------------------------*/
2942 static struct usb_ep_ops nbu2ss_ep_ops = {
2943 .enable = nbu2ss_ep_enable,
2944 .disable = nbu2ss_ep_disable,
2946 .alloc_request = nbu2ss_ep_alloc_request,
2947 .free_request = nbu2ss_ep_free_request,
2949 .queue = nbu2ss_ep_queue,
2950 .dequeue = nbu2ss_ep_dequeue,
2952 .set_halt = nbu2ss_ep_set_halt,
2953 .set_wedge = nbu2ss_ep_set_wedge,
2955 .fifo_status = nbu2ss_ep_fifo_status,
2956 .fifo_flush = nbu2ss_ep_fifo_flush,
2959 /*-------------------------------------------------------------------------*/
2960 /* usb_gadget_ops */
2962 /*-------------------------------------------------------------------------*/
2963 static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
2966 struct nbu2ss_udc *udc;
2969 pr_err("udc: %s, bad param\n", __func__);
2973 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2975 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2979 data = gpio_get_value(VBUS_VALUE);
2983 data = _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
2988 /*-------------------------------------------------------------------------*/
2989 static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
2994 struct nbu2ss_udc *udc;
2997 pr_err("%s, bad param\n", __func__);
3001 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3003 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
3007 data = gpio_get_value(VBUS_VALUE);
3009 dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
3013 _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
3015 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
3016 data = _nbu2ss_readl(&udc->p_regs->EPCTR);
3018 if (data & PLL_LOCK)
3022 _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
3027 /*-------------------------------------------------------------------------*/
3028 static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
3031 struct nbu2ss_udc *udc;
3032 unsigned long flags;
3035 pr_err("%s, bad param\n", __func__);
3039 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3041 spin_lock_irqsave(&udc->lock, flags);
3042 pgadget->is_selfpowered = (is_selfpowered != 0);
3043 spin_unlock_irqrestore(&udc->lock, flags);
3048 /*-------------------------------------------------------------------------*/
3049 static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
3054 /*-------------------------------------------------------------------------*/
3055 static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned mA)
3057 struct nbu2ss_udc *udc;
3058 unsigned long flags;
3061 pr_err("%s, bad param\n", __func__);
3065 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3067 spin_lock_irqsave(&udc->lock, flags);
3069 spin_unlock_irqrestore(&udc->lock, flags);
3074 /*-------------------------------------------------------------------------*/
3075 static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
3077 struct nbu2ss_udc *udc;
3078 unsigned long flags;
3081 pr_err("%s, bad param\n", __func__);
3085 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3088 pr_warn("%s, Not Regist Driver\n", __func__);
3092 if (udc->vbus_active == 0)
3095 spin_lock_irqsave(&udc->lock, flags);
3096 _nbu2ss_pullup(udc, is_on);
3097 spin_unlock_irqrestore(&udc->lock, flags);
3102 /*-------------------------------------------------------------------------*/
3103 static int nbu2ss_gad_ioctl(
3104 struct usb_gadget *pgadget,
3106 unsigned long param)
3111 static const struct usb_gadget_ops nbu2ss_gadget_ops = {
3112 .get_frame = nbu2ss_gad_get_frame,
3113 .wakeup = nbu2ss_gad_wakeup,
3114 .set_selfpowered = nbu2ss_gad_set_selfpowered,
3115 .vbus_session = nbu2ss_gad_vbus_session,
3116 .vbus_draw = nbu2ss_gad_vbus_draw,
3117 .pullup = nbu2ss_gad_pullup,
3118 .ioctl = nbu2ss_gad_ioctl,
3121 static const struct {
3123 const struct usb_ep_caps caps;
3124 } ep_info[NUM_ENDPOINTS] = {
3125 #define EP_INFO(_name, _caps) \
3132 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
3134 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3136 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3137 EP_INFO("ep3in-int",
3138 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3140 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3142 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3144 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3146 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3147 EP_INFO("ep8in-int",
3148 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3150 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3152 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3154 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3156 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3157 EP_INFO("epdin-int",
3158 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3163 /*-------------------------------------------------------------------------*/
3164 static void __init nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3168 INIT_LIST_HEAD(&udc->gadget.ep_list);
3169 udc->gadget.ep0 = &udc->ep[0].ep;
3171 for (i = 0; i < NUM_ENDPOINTS; i++) {
3172 struct nbu2ss_ep *ep = &udc->ep[i];
3177 ep->ep.driver_data = NULL;
3178 ep->ep.name = ep_info[i].name;
3179 ep->ep.caps = ep_info[i].caps;
3180 ep->ep.ops = &nbu2ss_ep_ops;
3182 usb_ep_set_maxpacket_limit(&ep->ep,
3183 i == 0 ? EP0_PACKETSIZE : EP_PACKETSIZE);
3185 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3186 INIT_LIST_HEAD(&ep->queue);
3189 list_del_init(&udc->ep[0].ep.ep_list);
3192 /*-------------------------------------------------------------------------*/
3193 /* platform_driver */
3194 static int __init nbu2ss_drv_contest_init(
3195 struct platform_device *pdev,
3196 struct nbu2ss_udc *udc)
3198 spin_lock_init(&udc->lock);
3199 udc->dev = &pdev->dev;
3201 udc->gadget.is_selfpowered = 1;
3202 udc->devstate = USB_STATE_NOTATTACHED;
3206 udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3209 nbu2ss_drv_ep_init(udc);
3212 udc->gadget.ops = &nbu2ss_gadget_ops;
3213 udc->gadget.ep0 = &udc->ep[0].ep;
3214 udc->gadget.speed = USB_SPEED_UNKNOWN;
3215 udc->gadget.name = driver_name;
3216 /* udc->gadget.is_dualspeed = 1; */
3218 device_initialize(&udc->gadget.dev);
3220 dev_set_name(&udc->gadget.dev, "gadget");
3221 udc->gadget.dev.parent = &pdev->dev;
3222 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3228 * probe - binds to the platform device
3230 static int nbu2ss_drv_probe(struct platform_device *pdev)
3232 int status = -ENODEV;
3233 struct nbu2ss_udc *udc;
3236 void __iomem *mmio_base;
3238 udc = &udc_controller;
3239 memset(udc, 0, sizeof(struct nbu2ss_udc));
3241 platform_set_drvdata(pdev, udc);
3243 /* require I/O memory and IRQ to be provided as resources */
3244 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3245 mmio_base = devm_ioremap_resource(&pdev->dev, r);
3246 if (IS_ERR(mmio_base))
3247 return PTR_ERR(mmio_base);
3249 irq = platform_get_irq(pdev, 0);
3251 dev_err(&pdev->dev, "failed to get IRQ\n");
3254 status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3255 0, driver_name, udc);
3258 udc->p_regs = (struct fc_regs *)mmio_base;
3260 /* USB Function Controller Interrupt */
3262 dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
3266 /* Driver Initialization */
3267 status = nbu2ss_drv_contest_init(pdev, udc);
3273 /* VBUS Interrupt */
3274 irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
3275 status = request_irq(INT_VBUS,
3282 dev_err(udc->dev, "request_irq(INT_VBUS) failed\n");
3289 /*-------------------------------------------------------------------------*/
3290 static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3292 struct nbu2ss_udc *udc;
3294 udc = platform_get_drvdata(pdev);
3298 _nbu2ss_disable_controller(udc);
3301 /*-------------------------------------------------------------------------*/
3302 static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3304 struct nbu2ss_udc *udc;
3306 udc = platform_get_drvdata(pdev);
3310 if (udc->vbus_active) {
3311 udc->vbus_active = 0;
3312 udc->devstate = USB_STATE_NOTATTACHED;
3313 udc->linux_suspended = 1;
3315 if (udc->usb_suspended) {
3316 udc->usb_suspended = 0;
3317 _nbu2ss_reset_controller(udc);
3320 _nbu2ss_quiesce(udc);
3322 _nbu2ss_disable_controller(udc);
3327 /*-------------------------------------------------------------------------*/
3328 static int nbu2ss_drv_resume(struct platform_device *pdev)
3331 struct nbu2ss_udc *udc;
3333 udc = platform_get_drvdata(pdev);
3337 data = gpio_get_value(VBUS_VALUE);
3339 udc->vbus_active = 1;
3340 udc->devstate = USB_STATE_POWERED;
3341 _nbu2ss_enable_controller(udc);
3342 _nbu2ss_pullup(udc, 1);
3345 udc->linux_suspended = 0;
3350 static struct platform_driver udc_driver = {
3351 .probe = nbu2ss_drv_probe,
3352 .shutdown = nbu2ss_drv_shutdown,
3353 .suspend = nbu2ss_drv_suspend,
3354 .resume = nbu2ss_drv_resume,
3356 .name = driver_name,
3357 .suppress_bind_attrs = true,
3361 builtin_platform_driver(udc_driver);