2 * FB driver for the ILI9320 LCD Controller
4 * Copyright (C) 2013 Noralf Tronnes
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/gpio.h>
25 #include <linux/spi/spi.h>
26 #include <linux/delay.h>
30 #define DRVNAME "fb_ili9320"
33 #define DEFAULT_GAMMA "07 07 6 0 0 0 5 5 4 0\n" \
34 "07 08 4 7 5 1 2 0 7 7"
37 static unsigned read_devicecode(struct fbtft_par *par)
42 write_reg(par, 0x0000);
43 ret = par->fbtftops.read(par, rxbuf, 4);
44 return (rxbuf[2] << 8) | rxbuf[3];
47 static int init_display(struct fbtft_par *par)
51 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
53 par->fbtftops.reset(par);
55 devcode = read_devicecode(par);
56 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "Device code: 0x%04X\n",
58 if ((devcode != 0x0000) && (devcode != 0x9320))
59 dev_warn(par->info->device,
60 "Unrecognized Device code: 0x%04X (expected 0x9320)\n",
63 /* Initialization sequence from ILI9320 Application Notes */
65 /* *********** Start Initial Sequence ********* */
66 /* Set the Vcore voltage and this setting is must. */
67 write_reg(par, 0x00E5, 0x8000);
69 /* Start internal OSC. */
70 write_reg(par, 0x0000, 0x0001);
72 /* set SS and SM bit */
73 write_reg(par, 0x0001, 0x0100);
75 /* set 1 line inversion */
76 write_reg(par, 0x0002, 0x0700);
79 write_reg(par, 0x0004, 0x0000);
81 /* set the back and front porch */
82 write_reg(par, 0x0008, 0x0202);
84 /* set non-display area refresh cycle */
85 write_reg(par, 0x0009, 0x0000);
88 write_reg(par, 0x000A, 0x0000);
90 /* RGB interface setting */
91 write_reg(par, 0x000C, 0x0000);
93 /* Frame marker Position */
94 write_reg(par, 0x000D, 0x0000);
96 /* RGB interface polarity */
97 write_reg(par, 0x000F, 0x0000);
100 /* ***********Power On sequence *************** */
101 /* SAP, BT[3:0], AP, DSTB, SLP, STB */
102 write_reg(par, 0x0010, 0x0000);
104 /* DC1[2:0], DC0[2:0], VC[2:0] */
105 write_reg(par, 0x0011, 0x0007);
107 /* VREG1OUT voltage */
108 write_reg(par, 0x0012, 0x0000);
110 /* VDV[4:0] for VCOM amplitude */
111 write_reg(par, 0x0013, 0x0000);
113 /* Dis-charge capacitor power voltage */
116 /* SAP, BT[3:0], AP, DSTB, SLP, STB */
117 write_reg(par, 0x0010, 0x17B0);
119 /* R11h=0x0031 at VCI=3.3V DC1[2:0], DC0[2:0], VC[2:0] */
120 write_reg(par, 0x0011, 0x0031);
123 /* R12h=0x0138 at VCI=3.3V VREG1OUT voltage */
124 write_reg(par, 0x0012, 0x0138);
127 /* R13h=0x1800 at VCI=3.3V VDV[4:0] for VCOM amplitude */
128 write_reg(par, 0x0013, 0x1800);
130 /* R29h=0x0008 at VCI=3.3V VCM[4:0] for VCOMH */
131 write_reg(par, 0x0029, 0x0008);
134 /* GRAM horizontal Address */
135 write_reg(par, 0x0020, 0x0000);
137 /* GRAM Vertical Address */
138 write_reg(par, 0x0021, 0x0000);
140 /* ------------------ Set GRAM area --------------- */
141 /* Horizontal GRAM Start Address */
142 write_reg(par, 0x0050, 0x0000);
144 /* Horizontal GRAM End Address */
145 write_reg(par, 0x0051, 0x00EF);
147 /* Vertical GRAM Start Address */
148 write_reg(par, 0x0052, 0x0000);
150 /* Vertical GRAM End Address */
151 write_reg(par, 0x0053, 0x013F);
154 write_reg(par, 0x0060, 0x2700);
157 write_reg(par, 0x0061, 0x0001);
159 /* set scrolling line */
160 write_reg(par, 0x006A, 0x0000);
162 /* -------------- Partial Display Control --------- */
163 write_reg(par, 0x0080, 0x0000);
164 write_reg(par, 0x0081, 0x0000);
165 write_reg(par, 0x0082, 0x0000);
166 write_reg(par, 0x0083, 0x0000);
167 write_reg(par, 0x0084, 0x0000);
168 write_reg(par, 0x0085, 0x0000);
170 /* -------------- Panel Control ------------------- */
171 write_reg(par, 0x0090, 0x0010);
172 write_reg(par, 0x0092, 0x0000);
173 write_reg(par, 0x0093, 0x0003);
174 write_reg(par, 0x0095, 0x0110);
175 write_reg(par, 0x0097, 0x0000);
176 write_reg(par, 0x0098, 0x0000);
177 write_reg(par, 0x0007, 0x0173); /* 262K color and display ON */
182 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
184 fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
185 "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
187 switch (par->info->var.rotate) {
188 /* R20h = Horizontal GRAM Start Address */
189 /* R21h = Vertical GRAM Start Address */
191 write_reg(par, 0x0020, xs);
192 write_reg(par, 0x0021, ys);
195 write_reg(par, 0x0020, WIDTH - 1 - xs);
196 write_reg(par, 0x0021, HEIGHT - 1 - ys);
199 write_reg(par, 0x0020, WIDTH - 1 - ys);
200 write_reg(par, 0x0021, xs);
203 write_reg(par, 0x0020, ys);
204 write_reg(par, 0x0021, HEIGHT - 1 - xs);
207 write_reg(par, 0x0022); /* Write Data to GRAM */
210 static int set_var(struct fbtft_par *par)
212 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
214 switch (par->info->var.rotate) {
216 write_reg(par, 0x3, (par->bgr << 12) | 0x30);
219 write_reg(par, 0x3, (par->bgr << 12) | 0x28);
222 write_reg(par, 0x3, (par->bgr << 12) | 0x00);
225 write_reg(par, 0x3, (par->bgr << 12) | 0x18);
233 VRP0 VRP1 RP0 RP1 KP0 KP1 KP2 KP3 KP4 KP5
234 VRN0 VRN1 RN0 RN1 KN0 KN1 KN2 KN3 KN4 KN5
236 #define CURVE(num, idx) curves[num*par->gamma.num_values + idx]
237 static int set_gamma(struct fbtft_par *par, unsigned long *curves)
239 unsigned long mask[] = {
240 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
241 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
245 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
248 for (i = 0; i < 2; i++)
249 for (j = 0; j < 10; j++)
250 CURVE(i, j) &= mask[i*par->gamma.num_values + j];
252 write_reg(par, 0x0030, CURVE(0, 5) << 8 | CURVE(0, 4));
253 write_reg(par, 0x0031, CURVE(0, 7) << 8 | CURVE(0, 6));
254 write_reg(par, 0x0032, CURVE(0, 9) << 8 | CURVE(0, 8));
255 write_reg(par, 0x0035, CURVE(0, 3) << 8 | CURVE(0, 2));
256 write_reg(par, 0x0036, CURVE(0, 1) << 8 | CURVE(0, 0));
258 write_reg(par, 0x0037, CURVE(1, 5) << 8 | CURVE(1, 4));
259 write_reg(par, 0x0038, CURVE(1, 7) << 8 | CURVE(1, 6));
260 write_reg(par, 0x0039, CURVE(1, 9) << 8 | CURVE(1, 8));
261 write_reg(par, 0x003C, CURVE(1, 3) << 8 | CURVE(1, 2));
262 write_reg(par, 0x003D, CURVE(1, 1) << 8 | CURVE(1, 0));
269 static struct fbtft_display display = {
275 .gamma = DEFAULT_GAMMA,
277 .init_display = init_display,
278 .set_addr_win = set_addr_win,
280 .set_gamma = set_gamma,
283 FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9320", &display);
285 MODULE_ALIAS("spi:" DRVNAME);
286 MODULE_ALIAS("platform:" DRVNAME);
287 MODULE_ALIAS("spi:ili9320");
288 MODULE_ALIAS("platform:ili9320");
290 MODULE_DESCRIPTION("FB driver for the ILI9320 LCD Controller");
291 MODULE_AUTHOR("Noralf Tronnes");
292 MODULE_LICENSE("GPL");