2 * drivers/mtd/devices/goldfish_nand.c
4 * Copyright (C) 2007 Google, Inc.
5 * Copyright (C) 2012 Intel, Inc.
6 * Copyright (C) 2013 Intel, Inc.
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
20 #include <linux/device.h>
21 #include <linux/module.h>
22 #include <linux/slab.h>
23 #include <linux/ioport.h>
24 #include <linux/vmalloc.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/platform_device.h>
28 #include <asm/div64.h>
30 #include "goldfish_nand_reg.h"
32 struct goldfish_nand {
34 unsigned char __iomem *base;
35 struct cmd_params *cmd_params;
37 struct mtd_info mtd[0];
40 static u32 goldfish_nand_cmd_with_params(struct mtd_info *mtd,
41 enum nand_cmd cmd, u64 addr, u32 len,
45 struct goldfish_nand *nand = mtd->priv;
46 struct cmd_params *cps = nand->cmd_params;
47 unsigned char __iomem *base = nand->base;
54 cmdp = NAND_CMD_ERASE_WITH_PARAMS;
57 cmdp = NAND_CMD_READ_WITH_PARAMS;
60 cmdp = NAND_CMD_WRITE_WITH_PARAMS;
65 cps->dev = mtd - nand->mtd;
66 cps->addr_high = (u32)(addr >> 32);
67 cps->addr_low = (u32)addr;
68 cps->transfer_size = len;
70 writel(cmdp, base + NAND_COMMAND);
75 static u32 goldfish_nand_cmd(struct mtd_info *mtd, enum nand_cmd cmd,
76 u64 addr, u32 len, void *ptr)
78 struct goldfish_nand *nand = mtd->priv;
80 unsigned long irq_flags;
81 unsigned char __iomem *base = nand->base;
83 spin_lock_irqsave(&nand->lock, irq_flags);
84 if (goldfish_nand_cmd_with_params(mtd, cmd, addr, len, ptr, &rv)) {
85 writel(mtd - nand->mtd, base + NAND_DEV);
86 writel((u32)(addr >> 32), base + NAND_ADDR_HIGH);
87 writel((u32)addr, base + NAND_ADDR_LOW);
88 writel(len, base + NAND_TRANSFER_SIZE);
89 writel((u32)ptr, base + NAND_DATA);
90 writel(cmd, base + NAND_COMMAND);
91 rv = readl(base + NAND_RESULT);
93 spin_unlock_irqrestore(&nand->lock, irq_flags);
97 static int goldfish_nand_erase(struct mtd_info *mtd, struct erase_info *instr)
99 loff_t ofs = instr->addr;
100 u32 len = instr->len;
103 if (ofs + len > mtd->size)
105 rem = do_div(ofs, mtd->writesize);
108 ofs *= (mtd->writesize + mtd->oobsize);
110 if (len % mtd->writesize)
112 len = len / mtd->writesize * (mtd->writesize + mtd->oobsize);
114 if (goldfish_nand_cmd(mtd, NAND_CMD_ERASE, ofs, len, NULL) != len) {
115 pr_err("goldfish_nand_erase: erase failed, start %llx, len %x, dev_size %llx, erase_size %x\n",
116 ofs, len, mtd->size, mtd->erasesize);
120 instr->state = MTD_ERASE_DONE;
121 mtd_erase_callback(instr);
126 pr_err("goldfish_nand_erase: invalid erase, start %llx, len %x, dev_size %llx, erase_size %x\n",
127 ofs, len, mtd->size, mtd->erasesize);
131 static int goldfish_nand_read_oob(struct mtd_info *mtd, loff_t ofs,
132 struct mtd_oob_ops *ops)
136 if (ofs + ops->len > mtd->size)
138 if (ops->datbuf && ops->len && ops->len != mtd->writesize)
140 if (ops->ooblen + ops->ooboffs > mtd->oobsize)
143 rem = do_div(ofs, mtd->writesize);
146 ofs *= (mtd->writesize + mtd->oobsize);
149 ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
150 ops->len, ops->datbuf);
151 ofs += mtd->writesize + ops->ooboffs;
153 ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
154 ops->ooblen, ops->oobbuf);
158 pr_err("goldfish_nand_read_oob: invalid read, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x\n",
159 ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
163 static int goldfish_nand_write_oob(struct mtd_info *mtd, loff_t ofs,
164 struct mtd_oob_ops *ops)
168 if (ofs + ops->len > mtd->size)
170 if (ops->len && ops->len != mtd->writesize)
172 if (ops->ooblen + ops->ooboffs > mtd->oobsize)
175 rem = do_div(ofs, mtd->writesize);
178 ofs *= (mtd->writesize + mtd->oobsize);
181 ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
182 ops->len, ops->datbuf);
183 ofs += mtd->writesize + ops->ooboffs;
185 ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
186 ops->ooblen, ops->oobbuf);
190 pr_err("goldfish_nand_write_oob: invalid write, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x\n",
191 ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
195 static int goldfish_nand_read(struct mtd_info *mtd, loff_t from, size_t len,
196 size_t *retlen, u_char *buf)
200 if (from + len > mtd->size)
202 if (len != mtd->writesize)
205 rem = do_div(from, mtd->writesize);
208 from *= (mtd->writesize + mtd->oobsize);
210 *retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, from, len, buf);
214 pr_err("goldfish_nand_read: invalid read, start %llx, len %zx, dev_size %llx, write_size %x\n",
215 from, len, mtd->size, mtd->writesize);
219 static int goldfish_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
220 size_t *retlen, const u_char *buf)
224 if (to + len > mtd->size)
226 if (len != mtd->writesize)
229 rem = do_div(to, mtd->writesize);
232 to *= (mtd->writesize + mtd->oobsize);
234 *retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, to, len, (void *)buf);
238 pr_err("goldfish_nand_write: invalid write, start %llx, len %zx, dev_size %llx, write_size %x\n",
239 to, len, mtd->size, mtd->writesize);
243 static int goldfish_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
247 if (ofs >= mtd->size)
250 rem = do_div(ofs, mtd->erasesize);
253 ofs *= mtd->erasesize / mtd->writesize;
254 ofs *= (mtd->writesize + mtd->oobsize);
256 return goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_GET, ofs, 0, NULL);
259 pr_err("goldfish_nand_block_isbad: invalid arg, ofs %llx, dev_size %llx, write_size %x\n",
260 ofs, mtd->size, mtd->writesize);
264 static int goldfish_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
268 if (ofs >= mtd->size)
271 rem = do_div(ofs, mtd->erasesize);
274 ofs *= mtd->erasesize / mtd->writesize;
275 ofs *= (mtd->writesize + mtd->oobsize);
277 if (goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_SET, ofs, 0, NULL) != 1)
282 pr_err("goldfish_nand_block_markbad: invalid arg, ofs %llx, dev_size %llx, write_size %x\n",
283 ofs, mtd->size, mtd->writesize);
287 static int nand_setup_cmd_params(struct platform_device *pdev,
288 struct goldfish_nand *nand)
291 unsigned char __iomem *base = nand->base;
293 nand->cmd_params = devm_kzalloc(&pdev->dev,
294 sizeof(struct cmd_params), GFP_KERNEL);
295 if (!nand->cmd_params)
298 paddr = __pa(nand->cmd_params);
299 writel((u32)(paddr >> 32), base + NAND_CMD_PARAMS_ADDR_HIGH);
300 writel((u32)paddr, base + NAND_CMD_PARAMS_ADDR_LOW);
304 static int goldfish_nand_init_device(struct platform_device *pdev,
305 struct goldfish_nand *nand, int id)
310 unsigned long irq_flags;
311 unsigned char __iomem *base = nand->base;
312 struct mtd_info *mtd = &nand->mtd[id];
315 spin_lock_irqsave(&nand->lock, irq_flags);
316 writel(id, base + NAND_DEV);
317 flags = readl(base + NAND_DEV_FLAGS);
318 name_len = readl(base + NAND_DEV_NAME_LEN);
319 mtd->writesize = readl(base + NAND_DEV_PAGE_SIZE);
320 mtd->size = readl(base + NAND_DEV_SIZE_LOW);
321 mtd->size |= (u64)readl(base + NAND_DEV_SIZE_HIGH) << 32;
322 mtd->oobsize = readl(base + NAND_DEV_EXTRA_SIZE);
323 mtd->oobavail = mtd->oobsize;
324 mtd->erasesize = readl(base + NAND_DEV_ERASE_SIZE) /
325 (mtd->writesize + mtd->oobsize) * mtd->writesize;
326 do_div(mtd->size, mtd->writesize + mtd->oobsize);
327 mtd->size *= mtd->writesize;
329 "goldfish nand dev%d: size %llx, page %d, extra %d, erase %d\n",
330 id, mtd->size, mtd->writesize,
331 mtd->oobsize, mtd->erasesize);
332 spin_unlock_irqrestore(&nand->lock, irq_flags);
336 mtd->name = name = devm_kzalloc(&pdev->dev, name_len + 1, GFP_KERNEL);
340 result = goldfish_nand_cmd(mtd, NAND_CMD_GET_DEV_NAME, 0, name_len,
342 if (result != name_len) {
344 "goldfish_nand_init_device failed to get dev name %d != %d\n",
348 ((char *) mtd->name)[name_len] = '\0';
350 /* Setup the MTD structure */
351 mtd->type = MTD_NANDFLASH;
352 mtd->flags = MTD_CAP_NANDFLASH;
353 if (flags & NAND_DEV_FLAG_READ_ONLY)
354 mtd->flags &= ~MTD_WRITEABLE;
355 if (flags & NAND_DEV_FLAG_CMD_PARAMS_CAP)
356 nand_setup_cmd_params(pdev, nand);
358 mtd->owner = THIS_MODULE;
359 mtd->_erase = goldfish_nand_erase;
360 mtd->_read = goldfish_nand_read;
361 mtd->_write = goldfish_nand_write;
362 mtd->_read_oob = goldfish_nand_read_oob;
363 mtd->_write_oob = goldfish_nand_write_oob;
364 mtd->_block_isbad = goldfish_nand_block_isbad;
365 mtd->_block_markbad = goldfish_nand_block_markbad;
367 if (mtd_device_register(mtd, NULL, 0))
373 static int goldfish_nand_probe(struct platform_device *pdev)
381 struct goldfish_nand *nand;
382 unsigned char __iomem *base;
384 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
388 base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
392 version = readl(base + NAND_VERSION);
393 if (version != NAND_VERSION_CURRENT) {
395 "goldfish_nand_init: version mismatch, got %d, expected %d\n",
396 version, NAND_VERSION_CURRENT);
399 num_dev = readl(base + NAND_NUM_DEV);
403 nand = devm_kzalloc(&pdev->dev, sizeof(*nand) +
404 sizeof(struct mtd_info) * num_dev, GFP_KERNEL);
408 spin_lock_init(&nand->lock);
410 nand->mtd_count = num_dev;
411 platform_set_drvdata(pdev, nand);
414 for (i = 0; i < num_dev; i++) {
415 err = goldfish_nand_init_device(pdev, nand, i);
419 if (num_dev_working == 0)
424 static int goldfish_nand_remove(struct platform_device *pdev)
426 struct goldfish_nand *nand = platform_get_drvdata(pdev);
428 for (i = 0; i < nand->mtd_count; i++) {
429 if (nand->mtd[i].name)
430 mtd_device_unregister(&nand->mtd[i]);
435 static struct platform_driver goldfish_nand_driver = {
436 .probe = goldfish_nand_probe,
437 .remove = goldfish_nand_remove,
439 .name = "goldfish_nand"
443 module_platform_driver(goldfish_nand_driver);
444 MODULE_LICENSE("GPL");