drivers/staging/iio/adc/max1363_core.c

   1  /*
   2   * iio/adc/max1363.c
   3   * Copyright (C) 2008-2010 Jonathan Cameron
   4   *
   5   * based on linux/drivers/i2c/chips/max123x
   6   * Copyright (C) 2002-2004 Stefan Eletzhofer
   7   *
   8   * based on linux/drivers/acron/char/pcf8583.c
   9   * Copyright (C) 2000 Russell King
  10   *
  11   * This program is free software; you can redistribute it and/or modify
  12   * it under the terms of the GNU General Public License version 2 as
  13   * published by the Free Software Foundation.
  14   *
  15   * max1363.c
  16   *
  17   * Partial support for max1363 and similar chips.
  18   *
  19   * Not currently implemented.
  20   *
  21   * - Control of internal reference.
  22   */
  23
  24 #include <linux/interrupt.h>
  25 #include <linux/device.h>
  26 #include <linux/kernel.h>
  27 #include <linux/sysfs.h>
  28 #include <linux/list.h>
  29 #include <linux/i2c.h>
  30 #include <linux/regulator/consumer.h>
  31 #include <linux/slab.h>
  32 #include <linux/err.h>
  33 #include <linux/module.h>
  34
  35 #include <linux/iio/iio.h>
  36 #include <linux/iio/sysfs.h>
  37 #include <linux/iio/events.h>
  38 #include <linux/iio/buffer.h>
  39 #include <linux/iio/driver.h>
  40
  41 #include "max1363.h"
  42
  43 #define MAX1363_MODE_SINGLE(_num, _mask) {                              \
  44                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  45                         | MAX1363_CONFIG_SCAN_SINGLE_1                  \
  46                         | MAX1363_CONFIG_SE,                            \
  47                         .modemask[0] = _mask,                           \
  48                         }
  49
  50 #define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) {                     \
  51                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  52                         | MAX1363_CONFIG_SCAN_TO_CS                     \
  53                         | MAX1363_CONFIG_SE,                            \
  54                         .modemask[0] = _mask,                           \
  55                         }
  56
  57 /* note not available for max1363 hence naming */
  58 #define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) {           \
  59                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  60                         | MAX1236_SCAN_MID_TO_CHANNEL                   \
  61                         | MAX1363_CONFIG_SE,                            \
  62                         .modemask[0] = _mask                            \
  63 }
  64
  65 #define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) {                 \
  66                 .conf = MAX1363_CHANNEL_SEL(_nump)                      \
  67                         | MAX1363_CONFIG_SCAN_SINGLE_1                  \
  68                         | MAX1363_CONFIG_DE,                            \
  69                         .modemask[0] = _mask                            \
  70                         }
  71
  72 /* Can't think how to automate naming so specify for now */
  73 #define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) {      \
  74                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  75                         | MAX1363_CONFIG_SCAN_TO_CS                     \
  76                         | MAX1363_CONFIG_DE,                            \
  77                         .modemask[0] = _mask                            \
  78                         }
  79
  80 /* note only available for max1363 hence naming */
  81 #define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) {  \
  82                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  83                         | MAX1236_SCAN_MID_TO_CHANNEL                   \
  84                         | MAX1363_CONFIG_SE,                            \
  85                         .modemask[0] = _mask                            \
  86 }
  87
  88 static const struct max1363_mode max1363_mode_table[] = {
  89         /* All of the single channel options first */
  90         MAX1363_MODE_SINGLE(0, 1 << 0),
  91         MAX1363_MODE_SINGLE(1, 1 << 1),
  92         MAX1363_MODE_SINGLE(2, 1 << 2),
  93         MAX1363_MODE_SINGLE(3, 1 << 3),
  94         MAX1363_MODE_SINGLE(4, 1 << 4),
  95         MAX1363_MODE_SINGLE(5, 1 << 5),
  96         MAX1363_MODE_SINGLE(6, 1 << 6),
  97         MAX1363_MODE_SINGLE(7, 1 << 7),
  98         MAX1363_MODE_SINGLE(8, 1 << 8),
  99         MAX1363_MODE_SINGLE(9, 1 << 9),
 100         MAX1363_MODE_SINGLE(10, 1 << 10),
 101         MAX1363_MODE_SINGLE(11, 1 << 11),
 102
 103         MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12),
 104         MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13),
 105         MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14),
 106         MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15),
 107         MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16),
 108         MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),
 109         MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18),
 110         MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19),
 111         MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20),
 112         MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21),
 113         MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22),
 114         MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),
 115
 116         /* The multichannel scans next */
 117         MAX1363_MODE_SCAN_TO_CHANNEL(1, 0x003),
 118         MAX1363_MODE_SCAN_TO_CHANNEL(2, 0x007),
 119         MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3, 0x00C),
 120         MAX1363_MODE_SCAN_TO_CHANNEL(3, 0x00F),
 121         MAX1363_MODE_SCAN_TO_CHANNEL(4, 0x01F),
 122         MAX1363_MODE_SCAN_TO_CHANNEL(5, 0x03F),
 123         MAX1363_MODE_SCAN_TO_CHANNEL(6, 0x07F),
 124         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7, 0x0C0),
 125         MAX1363_MODE_SCAN_TO_CHANNEL(7, 0x0FF),
 126         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8, 0x1C0),
 127         MAX1363_MODE_SCAN_TO_CHANNEL(8, 0x1FF),
 128         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9, 0x3C0),
 129         MAX1363_MODE_SCAN_TO_CHANNEL(9, 0x3FF),
 130         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),
 131         MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),
 132         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11, 0xFC0),
 133         MAX1363_MODE_SCAN_TO_CHANNEL(11, 0xFFF),
 134
 135         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(2, 2, 0x003000),
 136         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(4, 3, 0x007000),
 137         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(6, 4, 0x00F000),
 138         MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(8, 2, 0x018000),
 139         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(8, 5, 0x01F000),
 140         MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),
 141         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),
 142         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(3, 2, 0x0C0000),
 143         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(5, 3, 0x1C0000),
 144         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(7, 4, 0x3C0000),
 145         MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(9, 2, 0x600000),
 146         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(9, 5, 0x7C0000),
 147         MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(11, 3, 0xE00000),
 148         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),
 149 };
 150
 151 const struct max1363_mode
 152 *max1363_match_mode(const unsigned long *mask,
 153 const struct max1363_chip_info *ci)
 154 {
 155         int i;
 156         if (mask)
 157                 for (i = 0; i < ci->num_modes; i++)
 158                         if (bitmap_subset(mask,
 159                                           max1363_mode_table[ci->mode_list[i]].
 160                                           modemask,
 161                                           MAX1363_MAX_CHANNELS))
 162                                 return &max1363_mode_table[ci->mode_list[i]];
 163         return NULL;
 164 }
 165
 166 static int max1363_write_basic_config(struct i2c_client *client,
 167                                       unsigned char d1,
 168                                       unsigned char d2)
 169 {
 170         u8 tx_buf[2] = {d1, d2};
 171
 172         return i2c_master_send(client, tx_buf, 2);
 173 }
 174
 175 int max1363_set_scan_mode(struct max1363_state *st)
 176 {
 177         st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
 178                             | MAX1363_SCAN_MASK
 179                             | MAX1363_SE_DE_MASK);
 180         st->configbyte |= st->current_mode->conf;
 181
 182         return max1363_write_basic_config(st->client,
 183                                           st->setupbyte,
 184                                           st->configbyte);
 185 }
 186
 187 static int max1363_read_single_chan(struct iio_dev *indio_dev,
 188                                     struct iio_chan_spec const *chan,
 189                                     int *val,
 190                                     long m)
 191 {
 192         int ret = 0;
 193         s32 data;
 194         char rxbuf[2];
 195         struct max1363_state *st = iio_priv(indio_dev);
 196         struct i2c_client *client = st->client;
 197
 198         mutex_lock(&indio_dev->mlock);
 199         /*
 200          * If monitor mode is enabled, the method for reading a single
 201          * channel will have to be rather different and has not yet
 202          * been implemented.
 203          *
 204          * Also, cannot read directly if buffered capture enabled.
 205          */
 206         if (st->monitor_on || iio_buffer_enabled(indio_dev)) {
 207                 ret = -EBUSY;
 208                 goto error_ret;
 209         }
 210
 211         /* Check to see if current scan mode is correct */
 212         if (st->current_mode != &max1363_mode_table[chan->address]) {
 213                 /* Update scan mode if needed */
 214                 st->current_mode = &max1363_mode_table[chan->address];
 215                 ret = max1363_set_scan_mode(st);
 216                 if (ret < 0)
 217                         goto error_ret;
 218         }
 219         if (st->chip_info->bits != 8) {
 220                 /* Get reading */
 221                 data = i2c_master_recv(client, rxbuf, 2);
 222                 if (data < 0) {
 223                         ret = data;
 224                         goto error_ret;
 225                 }
 226                 data = (s32)(rxbuf[1]) | ((s32)(rxbuf[0] & 0x0F)) << 8;
 227         } else {
 228                 /* Get reading */
 229                 data = i2c_master_recv(client, rxbuf, 1);
 230                 if (data < 0) {
 231                         ret = data;
 232                         goto error_ret;
 233                 }
 234                 data = rxbuf[0];
 235         }
 236         *val = data;
 237 error_ret:
 238         mutex_unlock(&indio_dev->mlock);
 239         return ret;
 240
 241 }
 242
 243 static int max1363_read_raw(struct iio_dev *indio_dev,
 244                             struct iio_chan_spec const *chan,
 245                             int *val,
 246                             int *val2,
 247                             long m)
 248 {
 249         struct max1363_state *st = iio_priv(indio_dev);
 250         int ret;
 251         switch (m) {
 252         case IIO_CHAN_INFO_RAW:
 253                 ret = max1363_read_single_chan(indio_dev, chan, val, m);
 254                 if (ret < 0)
 255                         return ret;
 256                 return IIO_VAL_INT;
 257         case IIO_CHAN_INFO_SCALE:
 258                 if ((1 << (st->chip_info->bits + 1)) >
 259                     st->chip_info->int_vref_mv) {
 260                         *val = 0;
 261                         *val2 = 500000;
 262                         return IIO_VAL_INT_PLUS_MICRO;
 263                 } else {
 264                         *val = (st->chip_info->int_vref_mv)
 265                                 >> st->chip_info->bits;
 266                         return IIO_VAL_INT;
 267                 }
 268         default:
 269                 return -EINVAL;
 270         }
 271         return 0;
 272 }
 273
 274 /* Applies to max1363 */
 275 static const enum max1363_modes max1363_mode_list[] = {
 276         _s0, _s1, _s2, _s3,
 277         s0to1, s0to2, s0to3,
 278         d0m1, d2m3, d1m0, d3m2,
 279         d0m1to2m3, d1m0to3m2,
 280 };
 281
 282 #define MAX1363_EV_M                                            \
 283         (IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING)      \
 284          | IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING))
 285 #define MAX1363_INFO_MASK (IIO_CHAN_INFO_RAW_SEPARATE_BIT |     \
 286                            IIO_CHAN_INFO_SCALE_SHARED_BIT)
 287 #define MAX1363_CHAN_U(num, addr, si, bits, evmask)                     \
 288         {                                                               \
 289                 .type = IIO_VOLTAGE,                                    \
 290                 .indexed = 1,                                           \
 291                 .channel = num,                                         \
 292                 .address = addr,                                        \
 293                 .info_mask = MAX1363_INFO_MASK,                         \
 294                 .datasheet_name = "AIN"#num,                            \
 295                 .scan_type = {                                          \
 296                         .sign = 'u',                                    \
 297                         .realbits = bits,                               \
 298                         .storagebits = (bits > 8) ? 16 : 8,             \
 299                         .endianness = IIO_BE,                           \
 300                 },                                                      \
 301                 .scan_index = si,                                       \
 302                 .event_mask = evmask,                                   \
 303         }
 304
 305 /* bipolar channel */
 306 #define MAX1363_CHAN_B(num, num2, addr, si, bits, evmask)               \
 307         {                                                               \
 308                 .type = IIO_VOLTAGE,                                    \
 309                 .differential = 1,                                      \
 310                 .indexed = 1,                                           \
 311                 .channel = num,                                         \
 312                 .channel2 = num2,                                       \
 313                 .address = addr,                                        \
 314                 .info_mask = MAX1363_INFO_MASK,                         \
 315                 .datasheet_name = "AIN"#num"-AIN"#num2,                 \
 316                 .scan_type = {                                          \
 317                         .sign = 's',                                    \
 318                         .realbits = bits,                               \
 319                         .storagebits = (bits > 8) ? 16 : 8,             \
 320                         .endianness = IIO_BE,                           \
 321                 },                                                      \
 322                 .scan_index = si,                                       \
 323                 .event_mask = evmask,                                   \
 324         }
 325
 326 #define MAX1363_4X_CHANS(bits, em) {                    \
 327         MAX1363_CHAN_U(0, _s0, 0, bits, em),            \
 328         MAX1363_CHAN_U(1, _s1, 1, bits, em),            \
 329         MAX1363_CHAN_U(2, _s2, 2, bits, em),            \
 330         MAX1363_CHAN_U(3, _s3, 3, bits, em),            \
 331         MAX1363_CHAN_B(0, 1, d0m1, 4, bits, em),        \
 332         MAX1363_CHAN_B(2, 3, d2m3, 5, bits, em),        \
 333         MAX1363_CHAN_B(1, 0, d1m0, 6, bits, em),        \
 334         MAX1363_CHAN_B(3, 2, d3m2, 7, bits, em),        \
 335         IIO_CHAN_SOFT_TIMESTAMP(8)                      \
 336         }
 337
 338 static const struct iio_chan_spec max1036_channels[] = MAX1363_4X_CHANS(8, 0);
 339 static const struct iio_chan_spec max1136_channels[] = MAX1363_4X_CHANS(10, 0);
 340 static const struct iio_chan_spec max1236_channels[] = MAX1363_4X_CHANS(12, 0);
 341 static const struct iio_chan_spec max1361_channels[] =
 342         MAX1363_4X_CHANS(10, MAX1363_EV_M);
 343 static const struct iio_chan_spec max1363_channels[] =
 344         MAX1363_4X_CHANS(12, MAX1363_EV_M);
 345
 346 /* Applies to max1236, max1237 */
 347 static const enum max1363_modes max1236_mode_list[] = {
 348         _s0, _s1, _s2, _s3,
 349         s0to1, s0to2, s0to3,
 350         d0m1, d2m3, d1m0, d3m2,
 351         d0m1to2m3, d1m0to3m2,
 352         s2to3,
 353 };
 354
 355 /* Applies to max1238, max1239 */
 356 static const enum max1363_modes max1238_mode_list[] = {
 357         _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
 358         s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,
 359         s0to7, s0to8, s0to9, s0to10, s0to11,
 360         d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
 361         d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
 362         d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11,
 363         d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10,
 364         s6to7, s6to8, s6to9, s6to10, s6to11,
 365         d6m7to8m9, d6m7to10m11, d7m6to9m8, d7m6to11m10,
 366 };
 367
 368 #define MAX1363_12X_CHANS(bits) {                       \
 369         MAX1363_CHAN_U(0, _s0, 0, bits, 0),             \
 370         MAX1363_CHAN_U(1, _s1, 1, bits, 0),             \
 371         MAX1363_CHAN_U(2, _s2, 2, bits, 0),             \
 372         MAX1363_CHAN_U(3, _s3, 3, bits, 0),             \
 373         MAX1363_CHAN_U(4, _s4, 4, bits, 0),             \
 374         MAX1363_CHAN_U(5, _s5, 5, bits, 0),             \
 375         MAX1363_CHAN_U(6, _s6, 6, bits, 0),             \
 376         MAX1363_CHAN_U(7, _s7, 7, bits, 0),             \
 377         MAX1363_CHAN_U(8, _s8, 8, bits, 0),             \
 378         MAX1363_CHAN_U(9, _s9, 9, bits, 0),             \
 379         MAX1363_CHAN_U(10, _s10, 10, bits, 0),          \
 380         MAX1363_CHAN_U(11, _s11, 11, bits, 0),          \
 381         MAX1363_CHAN_B(0, 1, d0m1, 12, bits, 0),        \
 382         MAX1363_CHAN_B(2, 3, d2m3, 13, bits, 0),        \
 383         MAX1363_CHAN_B(4, 5, d4m5, 14, bits, 0),        \
 384         MAX1363_CHAN_B(6, 7, d6m7, 15, bits, 0),        \
 385         MAX1363_CHAN_B(8, 9, d8m9, 16, bits, 0),        \
 386         MAX1363_CHAN_B(10, 11, d10m11, 17, bits, 0),    \
 387         MAX1363_CHAN_B(1, 0, d1m0, 18, bits, 0),        \
 388         MAX1363_CHAN_B(3, 2, d3m2, 19, bits, 0),        \
 389         MAX1363_CHAN_B(5, 4, d5m4, 20, bits, 0),        \
 390         MAX1363_CHAN_B(7, 6, d7m6, 21, bits, 0),        \
 391         MAX1363_CHAN_B(9, 8, d9m8, 22, bits, 0),        \
 392         MAX1363_CHAN_B(11, 10, d11m10, 23, bits, 0),    \
 393         IIO_CHAN_SOFT_TIMESTAMP(24)                     \
 394         }
 395 static const struct iio_chan_spec max1038_channels[] = MAX1363_12X_CHANS(8);
 396 static const struct iio_chan_spec max1138_channels[] = MAX1363_12X_CHANS(10);
 397 static const struct iio_chan_spec max1238_channels[] = MAX1363_12X_CHANS(12);
 398
 399 static const enum max1363_modes max11607_mode_list[] = {
 400         _s0, _s1, _s2, _s3,
 401         s0to1, s0to2, s0to3,
 402         s2to3,
 403         d0m1, d2m3, d1m0, d3m2,
 404         d0m1to2m3, d1m0to3m2,
 405 };
 406
 407 static const enum max1363_modes max11608_mode_list[] = {
 408         _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7,
 409         s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, s0to7,
 410         s6to7,
 411         d0m1, d2m3, d4m5, d6m7,
 412         d1m0, d3m2, d5m4, d7m6,
 413         d0m1to2m3, d0m1to4m5, d0m1to6m7,
 414         d1m0to3m2, d1m0to5m4, d1m0to7m6,
 415 };
 416
 417 #define MAX1363_8X_CHANS(bits) {                        \
 418         MAX1363_CHAN_U(0, _s0, 0, bits, 0),             \
 419         MAX1363_CHAN_U(1, _s1, 1, bits, 0),             \
 420         MAX1363_CHAN_U(2, _s2, 2, bits, 0),             \
 421         MAX1363_CHAN_U(3, _s3, 3, bits, 0),             \
 422         MAX1363_CHAN_U(4, _s4, 4, bits, 0),             \
 423         MAX1363_CHAN_U(5, _s5, 5, bits, 0),             \
 424         MAX1363_CHAN_U(6, _s6, 6, bits, 0),             \
 425         MAX1363_CHAN_U(7, _s7, 7, bits, 0),             \
 426         MAX1363_CHAN_B(0, 1, d0m1, 8, bits, 0), \
 427         MAX1363_CHAN_B(2, 3, d2m3, 9, bits, 0), \
 428         MAX1363_CHAN_B(4, 5, d4m5, 10, bits, 0),        \
 429         MAX1363_CHAN_B(6, 7, d6m7, 11, bits, 0),        \
 430         MAX1363_CHAN_B(1, 0, d1m0, 12, bits, 0),        \
 431         MAX1363_CHAN_B(3, 2, d3m2, 13, bits, 0),        \
 432         MAX1363_CHAN_B(5, 4, d5m4, 14, bits, 0),        \
 433         MAX1363_CHAN_B(7, 6, d7m6, 15, bits, 0),        \
 434         IIO_CHAN_SOFT_TIMESTAMP(16)                     \
 435 }
 436 static const struct iio_chan_spec max11602_channels[] = MAX1363_8X_CHANS(8);
 437 static const struct iio_chan_spec max11608_channels[] = MAX1363_8X_CHANS(10);
 438 static const struct iio_chan_spec max11614_channels[] = MAX1363_8X_CHANS(12);
 439
 440 static const enum max1363_modes max11644_mode_list[] = {
 441         _s0, _s1, s0to1, d0m1, d1m0,
 442 };
 443
 444 #define MAX1363_2X_CHANS(bits) {                        \
 445         MAX1363_CHAN_U(0, _s0, 0, bits, 0),             \
 446         MAX1363_CHAN_U(1, _s1, 1, bits, 0),             \
 447         MAX1363_CHAN_B(0, 1, d0m1, 2, bits, 0), \
 448         MAX1363_CHAN_B(1, 0, d1m0, 3, bits, 0), \
 449         IIO_CHAN_SOFT_TIMESTAMP(4)                      \
 450         }
 451
 452 static const struct iio_chan_spec max11646_channels[] = MAX1363_2X_CHANS(10);
 453 static const struct iio_chan_spec max11644_channels[] = MAX1363_2X_CHANS(12);
 454
 455 enum { max1361,
 456        max1362,
 457        max1363,
 458        max1364,
 459        max1036,
 460        max1037,
 461        max1038,
 462        max1039,
 463        max1136,
 464        max1137,
 465        max1138,
 466        max1139,
 467        max1236,
 468        max1237,
 469        max1238,
 470        max1239,
 471        max11600,
 472        max11601,
 473        max11602,
 474        max11603,
 475        max11604,
 476        max11605,
 477        max11606,
 478        max11607,
 479        max11608,
 480        max11609,
 481        max11610,
 482        max11611,
 483        max11612,
 484        max11613,
 485        max11614,
 486        max11615,
 487        max11616,
 488        max11617,
 489        max11644,
 490        max11645,
 491        max11646,
 492        max11647
 493 };
 494
 495 static const int max1363_monitor_speeds[] = { 133000, 665000, 33300, 16600,
 496                                               8300, 4200, 2000, 1000 };
 497
 498 static ssize_t max1363_monitor_show_freq(struct device *dev,
 499                                         struct device_attribute *attr,
 500                                         char *buf)
 501 {
 502         struct max1363_state *st = iio_priv(dev_to_iio_dev(dev));
 503         return sprintf(buf, "%d\n", max1363_monitor_speeds[st->monitor_speed]);
 504 }
 505
 506 static ssize_t max1363_monitor_store_freq(struct device *dev,
 507                                         struct device_attribute *attr,
 508                                         const char *buf,
 509                                         size_t len)
 510 {
 511         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 512         struct max1363_state *st = iio_priv(indio_dev);
 513         int i, ret;
 514         unsigned long val;
 515         bool found = false;
 516
 517         ret = strict_strtoul(buf, 10, &val);
 518         if (ret)
 519                 return -EINVAL;
 520         for (i = 0; i < ARRAY_SIZE(max1363_monitor_speeds); i++)
 521                 if (val == max1363_monitor_speeds[i]) {
 522                         found = true;
 523                         break;
 524                 }
 525         if (!found)
 526                 return -EINVAL;
 527
 528         mutex_lock(&indio_dev->mlock);
 529         st->monitor_speed = i;
 530         mutex_unlock(&indio_dev->mlock);
 531
 532         return 0;
 533 }
 534
 535 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR,
 536                         max1363_monitor_show_freq,
 537                         max1363_monitor_store_freq);
 538
 539 static IIO_CONST_ATTR(sampling_frequency_available,
 540                 "133000 665000 33300 16600 8300 4200 2000 1000");
 541
 542 static int max1363_read_thresh(struct iio_dev *indio_dev,
 543                                u64 event_code,
 544                                int *val)
 545 {
 546         struct max1363_state *st = iio_priv(indio_dev);
 547         if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)
 548                 *val = st->thresh_low[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)];
 549         else
 550                 *val = st->thresh_high[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)];
 551         return 0;
 552 }
 553
 554 static int max1363_write_thresh(struct iio_dev *indio_dev,
 555                                 u64 event_code,
 556                                 int val)
 557 {
 558         struct max1363_state *st = iio_priv(indio_dev);
 559         /* make it handle signed correctly as well */
 560         switch (st->chip_info->bits) {
 561         case 10:
 562                 if (val > 0x3FF)
 563                         return -EINVAL;
 564                 break;
 565         case 12:
 566                 if (val > 0xFFF)
 567                         return -EINVAL;
 568                 break;
 569         }
 570
 571         switch (IIO_EVENT_CODE_EXTRACT_DIR(event_code)) {
 572         case IIO_EV_DIR_FALLING:
 573                 st->thresh_low[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)] = val;
 574                 break;
 575         case IIO_EV_DIR_RISING:
 576                 st->thresh_high[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)] = val;
 577                 break;
 578         }
 579
 580         return 0;
 581 }
 582
 583 static const u64 max1363_event_codes[] = {
 584         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,
 585                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 586         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,
 587                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 588         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,
 589                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 590         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,
 591                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 592         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,
 593                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 594         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,
 595                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 596         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,
 597                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 598         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,
 599                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 600 };
 601
 602 static irqreturn_t max1363_event_handler(int irq, void *private)
 603 {
 604         struct iio_dev *indio_dev = private;
 605         struct max1363_state *st = iio_priv(indio_dev);
 606         s64 timestamp = iio_get_time_ns();
 607         unsigned long mask, loc;
 608         u8 rx;
 609         u8 tx[2] = { st->setupbyte,
 610                      MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0 };
 611
 612         i2c_master_recv(st->client, &rx, 1);
 613         mask = rx;
 614         for_each_set_bit(loc, &mask, 8)
 615                 iio_push_event(indio_dev, max1363_event_codes[loc], timestamp);
 616         i2c_master_send(st->client, tx, 2);
 617
 618         return IRQ_HANDLED;
 619 }
 620
 621 static int max1363_read_event_config(struct iio_dev *indio_dev,
 622                                      u64 event_code)
 623 {
 624         struct max1363_state *st = iio_priv(indio_dev);
 625
 626         int val;
 627         int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);
 628         mutex_lock(&indio_dev->mlock);
 629         if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)
 630                 val = (1 << number) & st->mask_low;
 631         else
 632                 val = (1 << number) & st->mask_high;
 633         mutex_unlock(&indio_dev->mlock);
 634
 635         return val;
 636 }
 637
 638 static int max1363_monitor_mode_update(struct max1363_state *st, int enabled)
 639 {
 640         u8 *tx_buf;
 641         int ret, i = 3, j;
 642         unsigned long numelements;
 643         int len;
 644         const long *modemask;
 645
 646         if (!enabled) {
 647                 /* transition to ring capture is not currently supported */
 648                 st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;
 649                 st->configbyte &= ~MAX1363_SCAN_MASK;
 650                 st->monitor_on = false;
 651                 return max1363_write_basic_config(st->client,
 652                                                 st->setupbyte,
 653                                                 st->configbyte);
 654         }
 655
 656         /* Ensure we are in the relevant mode */
 657         st->setupbyte |= MAX1363_SETUP_MONITOR_SETUP;
 658         st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
 659                             | MAX1363_SCAN_MASK
 660                         | MAX1363_SE_DE_MASK);
 661         st->configbyte |= MAX1363_CONFIG_SCAN_MONITOR_MODE;
 662         if ((st->mask_low | st->mask_high) & 0x0F) {
 663                 st->configbyte |= max1363_mode_table[s0to3].conf;
 664                 modemask = max1363_mode_table[s0to3].modemask;
 665         } else if ((st->mask_low | st->mask_high) & 0x30) {
 666                 st->configbyte |= max1363_mode_table[d0m1to2m3].conf;
 667                 modemask = max1363_mode_table[d0m1to2m3].modemask;
 668         } else {
 669                 st->configbyte |= max1363_mode_table[d1m0to3m2].conf;
 670                 modemask = max1363_mode_table[d1m0to3m2].modemask;
 671         }
 672         numelements = bitmap_weight(modemask, MAX1363_MAX_CHANNELS);
 673         len = 3 * numelements + 3;
 674         tx_buf = kmalloc(len, GFP_KERNEL);
 675         if (!tx_buf) {
 676                 ret = -ENOMEM;
 677                 goto error_ret;
 678         }
 679         tx_buf[0] = st->configbyte;
 680         tx_buf[1] = st->setupbyte;
 681         tx_buf[2] = (st->monitor_speed << 1);
 682
 683         /*
 684          * So we need to do yet another bit of nefarious scan mode
 685          * setup to match what we need.
 686          */
 687         for (j = 0; j < 8; j++)
 688                 if (test_bit(j, modemask)) {
 689                         /* Establish the mode is in the scan */
 690                         if (st->mask_low & (1 << j)) {
 691                                 tx_buf[i] = (st->thresh_low[j] >> 4) & 0xFF;
 692                                 tx_buf[i + 1] = (st->thresh_low[j] << 4) & 0xF0;
 693                         } else if (j < 4) {
 694                                 tx_buf[i] = 0;
 695                                 tx_buf[i + 1] = 0;
 696                         } else {
 697                                 tx_buf[i] = 0x80;
 698                                 tx_buf[i + 1] = 0;
 699                         }
 700                         if (st->mask_high & (1 << j)) {
 701                                 tx_buf[i + 1] |=
 702                                         (st->thresh_high[j] >> 8) & 0x0F;
 703                                 tx_buf[i + 2] = st->thresh_high[j] & 0xFF;
 704                         } else if (j < 4) {
 705                                 tx_buf[i + 1] |= 0x0F;
 706                                 tx_buf[i + 2] = 0xFF;
 707                         } else {
 708                                 tx_buf[i + 1] |= 0x07;
 709                                 tx_buf[i + 2] = 0xFF;
 710                         }
 711                         i += 3;
 712                 }
 713
 714
 715         ret = i2c_master_send(st->client, tx_buf, len);
 716         if (ret < 0)
 717                 goto error_ret;
 718         if (ret != len) {
 719                 ret = -EIO;
 720                 goto error_ret;
 721         }
 722
 723         /*
 724          * Now that we hopefully have sensible thresholds in place it is
 725          * time to turn the interrupts on.
 726          * It is unclear from the data sheet if this should be necessary
 727          * (i.e. whether monitor mode setup is atomic) but it appears to
 728          * be in practice.
 729          */
 730         tx_buf[0] = st->setupbyte;
 731         tx_buf[1] = MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0;
 732         ret = i2c_master_send(st->client, tx_buf, 2);
 733         if (ret < 0)
 734                 goto error_ret;
 735         if (ret != 2) {
 736                 ret = -EIO;
 737                 goto error_ret;
 738         }
 739         ret = 0;
 740         st->monitor_on = true;
 741 error_ret:
 742
 743         kfree(tx_buf);
 744
 745         return ret;
 746 }
 747
 748 /*
 749  * To keep this manageable we always use one of 3 scan modes.
 750  * Scan 0...3, 0-1,2-3 and 1-0,3-2
 751  */
 752
 753 static inline int __max1363_check_event_mask(int thismask, int checkmask)
 754 {
 755         int ret = 0;
 756         /* Is it unipolar */
 757         if (thismask < 4) {
 758                 if (checkmask & ~0x0F) {
 759                         ret = -EBUSY;
 760                         goto error_ret;
 761                 }
 762         } else if (thismask < 6) {
 763                 if (checkmask & ~0x30) {
 764                         ret = -EBUSY;
 765                         goto error_ret;
 766                 }
 767         } else if (checkmask & ~0xC0)
 768                 ret = -EBUSY;
 769 error_ret:
 770         return ret;
 771 }
 772
 773 static int max1363_write_event_config(struct iio_dev *indio_dev,
 774                                       u64 event_code,
 775                                       int state)
 776 {
 777         int ret = 0;
 778         struct max1363_state *st = iio_priv(indio_dev);
 779         u16 unifiedmask;
 780         int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);
 781
 782         mutex_lock(&indio_dev->mlock);
 783         unifiedmask = st->mask_low | st->mask_high;
 784         if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING) {
 785
 786                 if (state == 0)
 787                         st->mask_low &= ~(1 << number);
 788                 else {
 789                         ret = __max1363_check_event_mask((1 << number),
 790                                                          unifiedmask);
 791                         if (ret)
 792                                 goto error_ret;
 793                         st->mask_low |= (1 << number);
 794                 }
 795         } else {
 796                 if (state == 0)
 797                         st->mask_high &= ~(1 << number);
 798                 else {
 799                         ret = __max1363_check_event_mask((1 << number),
 800                                                          unifiedmask);
 801                         if (ret)
 802                                 goto error_ret;
 803                         st->mask_high |= (1 << number);
 804                 }
 805         }
 806
 807         max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low));
 808 error_ret:
 809         mutex_unlock(&indio_dev->mlock);
 810
 811         return ret;
 812 }
 813
 814 /*
 815  * As with scan_elements, only certain sets of these can
 816  * be combined.
 817  */
 818 static struct attribute *max1363_event_attributes[] = {
 819         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 820         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 821         NULL,
 822 };
 823
 824 static struct attribute_group max1363_event_attribute_group = {
 825         .attrs = max1363_event_attributes,
 826         .name = "events",
 827 };
 828
 829 #define MAX1363_EVENT_FUNCS                                             \
 830
 831
 832 static const struct iio_info max1238_info = {
 833         .read_raw = &max1363_read_raw,
 834         .driver_module = THIS_MODULE,
 835         .update_scan_mode = &max1363_update_scan_mode,
 836 };
 837
 838 static const struct iio_info max1363_info = {
 839         .read_event_value = &max1363_read_thresh,
 840         .write_event_value = &max1363_write_thresh,
 841         .read_event_config = &max1363_read_event_config,
 842         .write_event_config = &max1363_write_event_config,
 843         .read_raw = &max1363_read_raw,
 844         .update_scan_mode = &max1363_update_scan_mode,
 845         .driver_module = THIS_MODULE,
 846         .event_attrs = &max1363_event_attribute_group,
 847 };
 848
 849 /* max1363 and max1368 tested - rest from data sheet */
 850 static const struct max1363_chip_info max1363_chip_info_tbl[] = {
 851         [max1361] = {
 852                 .bits = 10,
 853                 .int_vref_mv = 2048,
 854                 .mode_list = max1363_mode_list,
 855                 .num_modes = ARRAY_SIZE(max1363_mode_list),
 856                 .default_mode = s0to3,
 857                 .channels = max1361_channels,
 858                 .num_channels = ARRAY_SIZE(max1361_channels),
 859                 .info = &max1363_info,
 860         },
 861         [max1362] = {
 862                 .bits = 10,
 863                 .int_vref_mv = 4096,
 864                 .mode_list = max1363_mode_list,
 865                 .num_modes = ARRAY_SIZE(max1363_mode_list),
 866                 .default_mode = s0to3,
 867                 .channels = max1361_channels,
 868                 .num_channels = ARRAY_SIZE(max1361_channels),
 869                 .info = &max1363_info,
 870         },
 871         [max1363] = {
 872                 .bits = 12,
 873                 .int_vref_mv = 2048,
 874                 .mode_list = max1363_mode_list,
 875                 .num_modes = ARRAY_SIZE(max1363_mode_list),
 876                 .default_mode = s0to3,
 877                 .channels = max1363_channels,
 878                 .num_channels = ARRAY_SIZE(max1363_channels),
 879                 .info = &max1363_info,
 880         },
 881         [max1364] = {
 882                 .bits = 12,
 883                 .int_vref_mv = 4096,
 884                 .mode_list = max1363_mode_list,
 885                 .num_modes = ARRAY_SIZE(max1363_mode_list),
 886                 .default_mode = s0to3,
 887                 .channels = max1363_channels,
 888                 .num_channels = ARRAY_SIZE(max1363_channels),
 889                 .info = &max1363_info,
 890         },
 891         [max1036] = {
 892                 .bits = 8,
 893                 .int_vref_mv = 4096,
 894                 .mode_list = max1236_mode_list,
 895                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 896                 .default_mode = s0to3,
 897                 .info = &max1238_info,
 898                 .channels = max1036_channels,
 899                 .num_channels = ARRAY_SIZE(max1036_channels),
 900         },
 901         [max1037] = {
 902                 .bits = 8,
 903                 .int_vref_mv = 2048,
 904                 .mode_list = max1236_mode_list,
 905                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 906                 .default_mode = s0to3,
 907                 .info = &max1238_info,
 908                 .channels = max1036_channels,
 909                 .num_channels = ARRAY_SIZE(max1036_channels),
 910         },
 911         [max1038] = {
 912                 .bits = 8,
 913                 .int_vref_mv = 4096,
 914                 .mode_list = max1238_mode_list,
 915                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 916                 .default_mode = s0to11,
 917                 .info = &max1238_info,
 918                 .channels = max1038_channels,
 919                 .num_channels = ARRAY_SIZE(max1038_channels),
 920         },
 921         [max1039] = {
 922                 .bits = 8,
 923                 .int_vref_mv = 2048,
 924                 .mode_list = max1238_mode_list,
 925                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 926                 .default_mode = s0to11,
 927                 .info = &max1238_info,
 928                 .channels = max1038_channels,
 929                 .num_channels = ARRAY_SIZE(max1038_channels),
 930         },
 931         [max1136] = {
 932                 .bits = 10,
 933                 .int_vref_mv = 4096,
 934                 .mode_list = max1236_mode_list,
 935                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 936                 .default_mode = s0to3,
 937                 .info = &max1238_info,
 938                 .channels = max1136_channels,
 939                 .num_channels = ARRAY_SIZE(max1136_channels),
 940         },
 941         [max1137] = {
 942                 .bits = 10,
 943                 .int_vref_mv = 2048,
 944                 .mode_list = max1236_mode_list,
 945                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 946                 .default_mode = s0to3,
 947                 .info = &max1238_info,
 948                 .channels = max1136_channels,
 949                 .num_channels = ARRAY_SIZE(max1136_channels),
 950         },
 951         [max1138] = {
 952                 .bits = 10,
 953                 .int_vref_mv = 4096,
 954                 .mode_list = max1238_mode_list,
 955                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 956                 .default_mode = s0to11,
 957                 .info = &max1238_info,
 958                 .channels = max1138_channels,
 959                 .num_channels = ARRAY_SIZE(max1138_channels),
 960         },
 961         [max1139] = {
 962                 .bits = 10,
 963                 .int_vref_mv = 2048,
 964                 .mode_list = max1238_mode_list,
 965                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 966                 .default_mode = s0to11,
 967                 .info = &max1238_info,
 968                 .channels = max1138_channels,
 969                 .num_channels = ARRAY_SIZE(max1138_channels),
 970         },
 971         [max1236] = {
 972                 .bits = 12,
 973                 .int_vref_mv = 4096,
 974                 .mode_list = max1236_mode_list,
 975                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 976                 .default_mode = s0to3,
 977                 .info = &max1238_info,
 978                 .channels = max1236_channels,
 979                 .num_channels = ARRAY_SIZE(max1236_channels),
 980         },
 981         [max1237] = {
 982                 .bits = 12,
 983                 .int_vref_mv = 2048,
 984                 .mode_list = max1236_mode_list,
 985                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 986                 .default_mode = s0to3,
 987                 .info = &max1238_info,
 988                 .channels = max1236_channels,
 989                 .num_channels = ARRAY_SIZE(max1236_channels),
 990         },
 991         [max1238] = {
 992                 .bits = 12,
 993                 .int_vref_mv = 4096,
 994                 .mode_list = max1238_mode_list,
 995                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 996                 .default_mode = s0to11,
 997                 .info = &max1238_info,
 998                 .channels = max1238_channels,
 999                 .num_channels = ARRAY_SIZE(max1238_channels),
1000         },
1001         [max1239] = {
1002                 .bits = 12,
1003                 .int_vref_mv = 2048,
1004                 .mode_list = max1238_mode_list,
1005                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1006                 .default_mode = s0to11,
1007                 .info = &max1238_info,
1008                 .channels = max1238_channels,
1009                 .num_channels = ARRAY_SIZE(max1238_channels),
1010         },
1011         [max11600] = {
1012                 .bits = 8,
1013                 .int_vref_mv = 4096,
1014                 .mode_list = max11607_mode_list,
1015                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1016                 .default_mode = s0to3,
1017                 .info = &max1238_info,
1018                 .channels = max1036_channels,
1019                 .num_channels = ARRAY_SIZE(max1036_channels),
1020         },
1021         [max11601] = {
1022                 .bits = 8,
1023                 .int_vref_mv = 2048,
1024                 .mode_list = max11607_mode_list,
1025                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1026                 .default_mode = s0to3,
1027                 .info = &max1238_info,
1028                 .channels = max1036_channels,
1029                 .num_channels = ARRAY_SIZE(max1036_channels),
1030         },
1031         [max11602] = {
1032                 .bits = 8,
1033                 .int_vref_mv = 4096,
1034                 .mode_list = max11608_mode_list,
1035                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1036                 .default_mode = s0to7,
1037                 .info = &max1238_info,
1038                 .channels = max11602_channels,
1039                 .num_channels = ARRAY_SIZE(max11602_channels),
1040         },
1041         [max11603] = {
1042                 .bits = 8,
1043                 .int_vref_mv = 2048,
1044                 .mode_list = max11608_mode_list,
1045                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1046                 .default_mode = s0to7,
1047                 .info = &max1238_info,
1048                 .channels = max11602_channels,
1049                 .num_channels = ARRAY_SIZE(max11602_channels),
1050         },
1051         [max11604] = {
1052                 .bits = 8,
1053                 .int_vref_mv = 4098,
1054                 .mode_list = max1238_mode_list,
1055                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1056                 .default_mode = s0to11,
1057                 .info = &max1238_info,
1058                 .channels = max1238_channels,
1059                 .num_channels = ARRAY_SIZE(max1238_channels),
1060         },
1061         [max11605] = {
1062                 .bits = 8,
1063                 .int_vref_mv = 2048,
1064                 .mode_list = max1238_mode_list,
1065                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1066                 .default_mode = s0to11,
1067                 .info = &max1238_info,
1068                 .channels = max1238_channels,
1069                 .num_channels = ARRAY_SIZE(max1238_channels),
1070         },
1071         [max11606] = {
1072                 .bits = 10,
1073                 .int_vref_mv = 4096,
1074                 .mode_list = max11607_mode_list,
1075                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1076                 .default_mode = s0to3,
1077                 .info = &max1238_info,
1078                 .channels = max1136_channels,
1079                 .num_channels = ARRAY_SIZE(max1136_channels),
1080         },
1081         [max11607] = {
1082                 .bits = 10,
1083                 .int_vref_mv = 2048,
1084                 .mode_list = max11607_mode_list,
1085                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1086                 .default_mode = s0to3,
1087                 .info = &max1238_info,
1088                 .channels = max1136_channels,
1089                 .num_channels = ARRAY_SIZE(max1136_channels),
1090         },
1091         [max11608] = {
1092                 .bits = 10,
1093                 .int_vref_mv = 4096,
1094                 .mode_list = max11608_mode_list,
1095                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1096                 .default_mode = s0to7,
1097                 .info = &max1238_info,
1098                 .channels = max11608_channels,
1099                 .num_channels = ARRAY_SIZE(max11608_channels),
1100         },
1101         [max11609] = {
1102                 .bits = 10,
1103                 .int_vref_mv = 2048,
1104                 .mode_list = max11608_mode_list,
1105                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1106                 .default_mode = s0to7,
1107                 .info = &max1238_info,
1108                 .channels = max11608_channels,
1109                 .num_channels = ARRAY_SIZE(max11608_channels),
1110         },
1111         [max11610] = {
1112                 .bits = 10,
1113                 .int_vref_mv = 4098,
1114                 .mode_list = max1238_mode_list,
1115                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1116                 .default_mode = s0to11,
1117                 .info = &max1238_info,
1118                 .channels = max1238_channels,
1119                 .num_channels = ARRAY_SIZE(max1238_channels),
1120         },
1121         [max11611] = {
1122                 .bits = 10,
1123                 .int_vref_mv = 2048,
1124                 .mode_list = max1238_mode_list,
1125                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1126                 .default_mode = s0to11,
1127                 .info = &max1238_info,
1128                 .channels = max1238_channels,
1129                 .num_channels = ARRAY_SIZE(max1238_channels),
1130         },
1131         [max11612] = {
1132                 .bits = 12,
1133                 .int_vref_mv = 4096,
1134                 .mode_list = max11607_mode_list,
1135                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1136                 .default_mode = s0to3,
1137                 .info = &max1238_info,
1138                 .channels = max1363_channels,
1139                 .num_channels = ARRAY_SIZE(max1363_channels),
1140         },
1141         [max11613] = {
1142                 .bits = 12,
1143                 .int_vref_mv = 2048,
1144                 .mode_list = max11607_mode_list,
1145                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1146                 .default_mode = s0to3,
1147                 .info = &max1238_info,
1148                 .channels = max1363_channels,
1149                 .num_channels = ARRAY_SIZE(max1363_channels),
1150         },
1151         [max11614] = {
1152                 .bits = 12,
1153                 .int_vref_mv = 4096,
1154                 .mode_list = max11608_mode_list,
1155                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1156                 .default_mode = s0to7,
1157                 .info = &max1238_info,
1158                 .channels = max11614_channels,
1159                 .num_channels = ARRAY_SIZE(max11614_channels),
1160         },
1161         [max11615] = {
1162                 .bits = 12,
1163                 .int_vref_mv = 2048,
1164                 .mode_list = max11608_mode_list,
1165                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1166                 .default_mode = s0to7,
1167                 .info = &max1238_info,
1168                 .channels = max11614_channels,
1169                 .num_channels = ARRAY_SIZE(max11614_channels),
1170         },
1171         [max11616] = {
1172                 .bits = 12,
1173                 .int_vref_mv = 4098,
1174                 .mode_list = max1238_mode_list,
1175                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1176                 .default_mode = s0to11,
1177                 .info = &max1238_info,
1178                 .channels = max1238_channels,
1179                 .num_channels = ARRAY_SIZE(max1238_channels),
1180         },
1181         [max11617] = {
1182                 .bits = 12,
1183                 .int_vref_mv = 2048,
1184                 .mode_list = max1238_mode_list,
1185                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1186                 .default_mode = s0to11,
1187                 .info = &max1238_info,
1188                 .channels = max1238_channels,
1189                 .num_channels = ARRAY_SIZE(max1238_channels),
1190         },
1191         [max11644] = {
1192                 .bits = 12,
1193                 .int_vref_mv = 2048,
1194                 .mode_list = max11644_mode_list,
1195                 .num_modes = ARRAY_SIZE(max11644_mode_list),
1196                 .default_mode = s0to1,
1197                 .info = &max1238_info,
1198                 .channels = max11644_channels,
1199                 .num_channels = ARRAY_SIZE(max11644_channels),
1200         },
1201         [max11645] = {
1202                 .bits = 12,
1203                 .int_vref_mv = 4096,
1204                 .mode_list = max11644_mode_list,
1205                 .num_modes = ARRAY_SIZE(max11644_mode_list),
1206                 .default_mode = s0to1,
1207                 .info = &max1238_info,
1208                 .channels = max11644_channels,
1209                 .num_channels = ARRAY_SIZE(max11644_channels),
1210         },
1211         [max11646] = {
1212                 .bits = 10,
1213                 .int_vref_mv = 2048,
1214                 .mode_list = max11644_mode_list,
1215                 .num_modes = ARRAY_SIZE(max11644_mode_list),
1216                 .default_mode = s0to1,
1217                 .info = &max1238_info,
1218                 .channels = max11646_channels,
1219                 .num_channels = ARRAY_SIZE(max11646_channels),
1220         },
1221         [max11647] = {
1222                 .bits = 10,
1223                 .int_vref_mv = 4096,
1224                 .mode_list = max11644_mode_list,
1225                 .num_modes = ARRAY_SIZE(max11644_mode_list),
1226                 .default_mode = s0to1,
1227                 .info = &max1238_info,
1228                 .channels = max11646_channels,
1229                 .num_channels = ARRAY_SIZE(max11646_channels),
1230         },
1231 };
1232
1233
1234
1235 static int max1363_initial_setup(struct max1363_state *st)
1236 {
1237         st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD
1238                 | MAX1363_SETUP_POWER_UP_INT_REF
1239                 | MAX1363_SETUP_INT_CLOCK
1240                 | MAX1363_SETUP_UNIPOLAR
1241                 | MAX1363_SETUP_NORESET;
1242
1243         /* Set scan mode writes the config anyway so wait until then*/
1244         st->setupbyte = MAX1363_SETUP_BYTE(st->setupbyte);
1245         st->current_mode = &max1363_mode_table[st->chip_info->default_mode];
1246         st->configbyte = MAX1363_CONFIG_BYTE(st->configbyte);
1247
1248         return max1363_set_scan_mode(st);
1249 }
1250
1251 static int __devinit max1363_alloc_scan_masks(struct iio_dev *indio_dev)
1252 {
1253         struct max1363_state *st = iio_priv(indio_dev);
1254         unsigned long *masks;
1255         int i;
1256
1257         masks = kzalloc(BITS_TO_LONGS(MAX1363_MAX_CHANNELS)*sizeof(long)*
1258                           (st->chip_info->num_modes + 1), GFP_KERNEL);
1259         if (!masks)
1260                 return -ENOMEM;
1261
1262         for (i = 0; i < st->chip_info->num_modes; i++)
1263                 bitmap_copy(masks + BITS_TO_LONGS(MAX1363_MAX_CHANNELS)*i,
1264                             max1363_mode_table[st->chip_info->mode_list[i]]
1265                             .modemask, MAX1363_MAX_CHANNELS);
1266
1267         indio_dev->available_scan_masks = masks;
1268
1269         return 0;
1270 }
1271
1272 static int __devinit max1363_probe(struct i2c_client *client,
1273                                    const struct i2c_device_id *id)
1274 {
1275         int ret;
1276         struct max1363_state *st;
1277         struct iio_dev *indio_dev;
1278         struct regulator *reg;
1279
1280         reg = regulator_get(&client->dev, "vcc");
1281         if (IS_ERR(reg)) {
1282                 ret = PTR_ERR(reg);
1283                 goto error_out;
1284         }
1285
1286         ret = regulator_enable(reg);
1287         if (ret)
1288                 goto error_put_reg;
1289
1290         indio_dev = iio_device_alloc(sizeof(struct max1363_state));
1291         if (indio_dev == NULL) {
1292                 ret = -ENOMEM;
1293                 goto error_disable_reg;
1294         }
1295         ret = iio_map_array_register(indio_dev, client->dev.platform_data);
1296         if (ret < 0)
1297                 goto error_free_device;
1298         st = iio_priv(indio_dev);
1299         st->reg = reg;
1300         /* this is only used for device removal purposes */
1301         i2c_set_clientdata(client, indio_dev);
1302
1303         st->chip_info = &max1363_chip_info_tbl[id->driver_data];
1304         st->client = client;
1305
1306         ret = max1363_alloc_scan_masks(indio_dev);
1307         if (ret)
1308                 goto error_unregister_map;
1309
1310         /* Estabilish that the iio_dev is a child of the i2c device */
1311         indio_dev->dev.parent = &client->dev;
1312         indio_dev->name = id->name;
1313         indio_dev->channels = st->chip_info->channels;
1314         indio_dev->num_channels = st->chip_info->num_channels;
1315         indio_dev->info = st->chip_info->info;
1316         indio_dev->modes = INDIO_DIRECT_MODE;
1317         indio_dev->channels = st->chip_info->channels;
1318         indio_dev->num_channels = st->chip_info->num_channels;
1319         ret = max1363_initial_setup(st);
1320         if (ret < 0)
1321                 goto error_free_available_scan_masks;
1322
1323         ret = max1363_register_ring_funcs_and_init(indio_dev);
1324         if (ret)
1325                 goto error_free_available_scan_masks;
1326
1327         ret = iio_buffer_register(indio_dev,
1328                                   st->chip_info->channels,
1329                                   st->chip_info->num_channels);
1330         if (ret)
1331                 goto error_cleanup_ring;
1332
1333         if (client->irq) {
1334                 ret = request_threaded_irq(st->client->irq,
1335                                            NULL,
1336                                            &max1363_event_handler,
1337                                            IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1338                                            "max1363_event",
1339                                            indio_dev);
1340
1341                 if (ret)
1342                         goto error_uninit_ring;
1343         }
1344
1345         ret = iio_device_register(indio_dev);
1346         if (ret < 0)
1347                 goto error_free_irq;
1348
1349         return 0;
1350 error_free_irq:
1351         free_irq(st->client->irq, indio_dev);
1352 error_uninit_ring:
1353         iio_buffer_unregister(indio_dev);
1354 error_cleanup_ring:
1355         max1363_ring_cleanup(indio_dev);
1356 error_free_available_scan_masks:
1357         kfree(indio_dev->available_scan_masks);
1358 error_unregister_map:
1359         iio_map_array_unregister(indio_dev, client->dev.platform_data);
1360 error_free_device:
1361         iio_device_free(indio_dev);
1362 error_disable_reg:
1363         regulator_disable(reg);
1364 error_put_reg:
1365         regulator_put(reg);
1366 error_out:
1367         return ret;
1368 }
1369
1370 static int __devexit max1363_remove(struct i2c_client *client)
1371 {
1372         struct iio_dev *indio_dev = i2c_get_clientdata(client);
1373         struct max1363_state *st = iio_priv(indio_dev);
1374         struct regulator *reg = st->reg;
1375
1376         iio_device_unregister(indio_dev);
1377         if (client->irq)
1378                 free_irq(st->client->irq, indio_dev);
1379         iio_buffer_unregister(indio_dev);
1380         max1363_ring_cleanup(indio_dev);
1381         kfree(indio_dev->available_scan_masks);
1382         if (!IS_ERR(reg)) {
1383                 regulator_disable(reg);
1384                 regulator_put(reg);
1385         }
1386         iio_map_array_unregister(indio_dev, client->dev.platform_data);
1387         iio_device_free(indio_dev);
1388
1389         return 0;
1390 }
1391
1392 static const struct i2c_device_id max1363_id[] = {
1393         { "max1361", max1361 },
1394         { "max1362", max1362 },
1395         { "max1363", max1363 },
1396         { "max1364", max1364 },
1397         { "max1036", max1036 },
1398         { "max1037", max1037 },
1399         { "max1038", max1038 },
1400         { "max1039", max1039 },
1401         { "max1136", max1136 },
1402         { "max1137", max1137 },
1403         { "max1138", max1138 },
1404         { "max1139", max1139 },
1405         { "max1236", max1236 },
1406         { "max1237", max1237 },
1407         { "max1238", max1238 },
1408         { "max1239", max1239 },
1409         { "max11600", max11600 },
1410         { "max11601", max11601 },
1411         { "max11602", max11602 },
1412         { "max11603", max11603 },
1413         { "max11604", max11604 },
1414         { "max11605", max11605 },
1415         { "max11606", max11606 },
1416         { "max11607", max11607 },
1417         { "max11608", max11608 },
1418         { "max11609", max11609 },
1419         { "max11610", max11610 },
1420         { "max11611", max11611 },
1421         { "max11612", max11612 },
1422         { "max11613", max11613 },
1423         { "max11614", max11614 },
1424         { "max11615", max11615 },
1425         { "max11616", max11616 },
1426         { "max11617", max11617 },
1427         {}
1428 };
1429
1430 MODULE_DEVICE_TABLE(i2c, max1363_id);
1431
1432 static struct i2c_driver max1363_driver = {
1433         .driver = {
1434                 .name = "max1363",
1435         },
1436         .probe = max1363_probe,
1437         .remove = __devexit_p(max1363_remove),
1438         .id_table = max1363_id,
1439 };
1440 module_i2c_driver(max1363_driver);
1441
1442 MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>");
1443 MODULE_DESCRIPTION("Maxim 1363 ADC");
1444 MODULE_LICENSE("GPL v2");