drivers/staging/iio/meter/ade7758_core.c

   1 /*
   2  * ADE7758 Poly Phase Multifunction Energy Metering IC driver
   3  *
   4  * Copyright 2010-2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/irq.h>
  11 #include <linux/delay.h>
  12 #include <linux/mutex.h>
  13 #include <linux/device.h>
  14 #include <linux/kernel.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/slab.h>
  17 #include <linux/sysfs.h>
  18 #include <linux/list.h>
  19 #include <linux/module.h>
  20
  21 #include <linux/iio/iio.h>
  22 #include <linux/iio/sysfs.h>
  23 #include <linux/iio/buffer.h>
  24 #include "meter.h"
  25 #include "ade7758.h"
  26
  27 int ade7758_spi_write_reg_8(struct device *dev,
  28                 u8 reg_address,
  29                 u8 val)
  30 {
  31         int ret;
  32         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  33         struct ade7758_state *st = iio_priv(indio_dev);
  34
  35         mutex_lock(&st->buf_lock);
  36         st->tx[0] = ADE7758_WRITE_REG(reg_address);
  37         st->tx[1] = val;
  38
  39         ret = spi_write(st->us, st->tx, 2);
  40         mutex_unlock(&st->buf_lock);
  41
  42         return ret;
  43 }
  44
  45 static int ade7758_spi_write_reg_16(struct device *dev,
  46                 u8 reg_address,
  47                 u16 value)
  48 {
  49         int ret;
  50         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  51         struct ade7758_state *st = iio_priv(indio_dev);
  52         struct spi_transfer xfers[] = {
  53                 {
  54                         .tx_buf = st->tx,
  55                         .bits_per_word = 8,
  56                         .len = 3,
  57                 }
  58         };
  59
  60         mutex_lock(&st->buf_lock);
  61         st->tx[0] = ADE7758_WRITE_REG(reg_address);
  62         st->tx[1] = (value >> 8) & 0xFF;
  63         st->tx[2] = value & 0xFF;
  64
  65         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
  66         mutex_unlock(&st->buf_lock);
  67
  68         return ret;
  69 }
  70
  71 static int ade7758_spi_write_reg_24(struct device *dev,
  72                 u8 reg_address,
  73                 u32 value)
  74 {
  75         int ret;
  76         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  77         struct ade7758_state *st = iio_priv(indio_dev);
  78         struct spi_transfer xfers[] = {
  79                 {
  80                         .tx_buf = st->tx,
  81                         .bits_per_word = 8,
  82                         .len = 4,
  83                 }
  84         };
  85
  86         mutex_lock(&st->buf_lock);
  87         st->tx[0] = ADE7758_WRITE_REG(reg_address);
  88         st->tx[1] = (value >> 16) & 0xFF;
  89         st->tx[2] = (value >> 8) & 0xFF;
  90         st->tx[3] = value & 0xFF;
  91
  92         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
  93         mutex_unlock(&st->buf_lock);
  94
  95         return ret;
  96 }
  97
  98 int ade7758_spi_read_reg_8(struct device *dev,
  99                 u8 reg_address,
 100                 u8 *val)
 101 {
 102         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 103         struct ade7758_state *st = iio_priv(indio_dev);
 104         int ret;
 105         struct spi_transfer xfers[] = {
 106                 {
 107                         .tx_buf = st->tx,
 108                         .bits_per_word = 8,
 109                         .len = 1,
 110                         .delay_usecs = 4,
 111                 },
 112                 {
 113                         .tx_buf = &st->tx[1],
 114                         .rx_buf = st->rx,
 115                         .bits_per_word = 8,
 116                         .len = 1,
 117                 },
 118         };
 119
 120         mutex_lock(&st->buf_lock);
 121         st->tx[0] = ADE7758_READ_REG(reg_address);
 122         st->tx[1] = 0;
 123
 124         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
 125         if (ret) {
 126                 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
 127                                 reg_address);
 128                 goto error_ret;
 129         }
 130         *val = st->rx[0];
 131
 132 error_ret:
 133         mutex_unlock(&st->buf_lock);
 134         return ret;
 135 }
 136
 137 static int ade7758_spi_read_reg_16(struct device *dev,
 138                 u8 reg_address,
 139                 u16 *val)
 140 {
 141         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 142         struct ade7758_state *st = iio_priv(indio_dev);
 143         int ret;
 144         struct spi_transfer xfers[] = {
 145                 {
 146                         .tx_buf = st->tx,
 147                         .bits_per_word = 8,
 148                         .len = 1,
 149                         .delay_usecs = 4,
 150                 },
 151                 {
 152                         .tx_buf = &st->tx[1],
 153                         .rx_buf = st->rx,
 154                         .bits_per_word = 8,
 155                         .len = 2,
 156                 },
 157         };
 158
 159
 160         mutex_lock(&st->buf_lock);
 161         st->tx[0] = ADE7758_READ_REG(reg_address);
 162         st->tx[1] = 0;
 163         st->tx[2] = 0;
 164
 165         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
 166         if (ret) {
 167                 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
 168                                 reg_address);
 169                 goto error_ret;
 170         }
 171
 172         *val = (st->rx[0] << 8) | st->rx[1];
 173
 174 error_ret:
 175         mutex_unlock(&st->buf_lock);
 176         return ret;
 177 }
 178
 179 static int ade7758_spi_read_reg_24(struct device *dev,
 180                 u8 reg_address,
 181                 u32 *val)
 182 {
 183         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 184         struct ade7758_state *st = iio_priv(indio_dev);
 185         int ret;
 186         struct spi_transfer xfers[] = {
 187                 {
 188                         .tx_buf = st->tx,
 189                         .bits_per_word = 8,
 190                         .len = 1,
 191                         .delay_usecs = 4,
 192                 },
 193                 {
 194                         .tx_buf = &st->tx[1],
 195                         .rx_buf = st->rx,
 196                         .bits_per_word = 8,
 197                         .len = 3,
 198                 },
 199         };
 200
 201         mutex_lock(&st->buf_lock);
 202         st->tx[0] = ADE7758_READ_REG(reg_address);
 203         st->tx[1] = 0;
 204         st->tx[2] = 0;
 205         st->tx[3] = 0;
 206
 207         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
 208         if (ret) {
 209                 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
 210                                 reg_address);
 211                 goto error_ret;
 212         }
 213         *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
 214
 215 error_ret:
 216         mutex_unlock(&st->buf_lock);
 217         return ret;
 218 }
 219
 220 static ssize_t ade7758_read_8bit(struct device *dev,
 221                 struct device_attribute *attr,
 222                 char *buf)
 223 {
 224         int ret;
 225         u8 val = 0;
 226         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 227
 228         ret = ade7758_spi_read_reg_8(dev, this_attr->address, &val);
 229         if (ret)
 230                 return ret;
 231
 232         return sprintf(buf, "%u\n", val);
 233 }
 234
 235 static ssize_t ade7758_read_16bit(struct device *dev,
 236                 struct device_attribute *attr,
 237                 char *buf)
 238 {
 239         int ret;
 240         u16 val = 0;
 241         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 242
 243         ret = ade7758_spi_read_reg_16(dev, this_attr->address, &val);
 244         if (ret)
 245                 return ret;
 246
 247         return sprintf(buf, "%u\n", val);
 248 }
 249
 250 static ssize_t ade7758_read_24bit(struct device *dev,
 251                 struct device_attribute *attr,
 252                 char *buf)
 253 {
 254         int ret;
 255         u32 val = 0;
 256         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 257
 258         ret = ade7758_spi_read_reg_24(dev, this_attr->address, &val);
 259         if (ret)
 260                 return ret;
 261
 262         return sprintf(buf, "%u\n", val & 0xFFFFFF);
 263 }
 264
 265 static ssize_t ade7758_write_8bit(struct device *dev,
 266                 struct device_attribute *attr,
 267                 const char *buf,
 268                 size_t len)
 269 {
 270         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 271         int ret;
 272         u8 val;
 273
 274         ret = kstrtou8(buf, 10, &val);
 275         if (ret)
 276                 goto error_ret;
 277         ret = ade7758_spi_write_reg_8(dev, this_attr->address, val);
 278
 279 error_ret:
 280         return ret ? ret : len;
 281 }
 282
 283 static ssize_t ade7758_write_16bit(struct device *dev,
 284                 struct device_attribute *attr,
 285                 const char *buf,
 286                 size_t len)
 287 {
 288         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 289         int ret;
 290         u16 val;
 291
 292         ret = kstrtou16(buf, 10, &val);
 293         if (ret)
 294                 goto error_ret;
 295         ret = ade7758_spi_write_reg_16(dev, this_attr->address, val);
 296
 297 error_ret:
 298         return ret ? ret : len;
 299 }
 300
 301 static int ade7758_reset(struct device *dev)
 302 {
 303         int ret;
 304         u8 val;
 305         ade7758_spi_read_reg_8(dev,
 306                         ADE7758_OPMODE,
 307                         &val);
 308         val |= 1 << 6; /* Software Chip Reset */
 309         ret = ade7758_spi_write_reg_8(dev,
 310                         ADE7758_OPMODE,
 311                         val);
 312
 313         return ret;
 314 }
 315
 316 static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
 317                 ade7758_read_8bit,
 318                 ade7758_write_8bit,
 319                 ADE7758_VPEAK);
 320 static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
 321                 ade7758_read_8bit,
 322                 ade7758_write_8bit,
 323                 ADE7758_VPEAK);
 324 static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
 325                 ade7758_read_8bit,
 326                 ade7758_write_8bit,
 327                 ADE7758_APHCAL);
 328 static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
 329                 ade7758_read_8bit,
 330                 ade7758_write_8bit,
 331                 ADE7758_BPHCAL);
 332 static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
 333                 ade7758_read_8bit,
 334                 ade7758_write_8bit,
 335                 ADE7758_CPHCAL);
 336 static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
 337                 ade7758_read_8bit,
 338                 ade7758_write_8bit,
 339                 ADE7758_WDIV);
 340 static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
 341                 ade7758_read_8bit,
 342                 ade7758_write_8bit,
 343                 ADE7758_VADIV);
 344 static IIO_DEV_ATTR_AIRMS(S_IRUGO,
 345                 ade7758_read_24bit,
 346                 NULL,
 347                 ADE7758_AIRMS);
 348 static IIO_DEV_ATTR_BIRMS(S_IRUGO,
 349                 ade7758_read_24bit,
 350                 NULL,
 351                 ADE7758_BIRMS);
 352 static IIO_DEV_ATTR_CIRMS(S_IRUGO,
 353                 ade7758_read_24bit,
 354                 NULL,
 355                 ADE7758_CIRMS);
 356 static IIO_DEV_ATTR_AVRMS(S_IRUGO,
 357                 ade7758_read_24bit,
 358                 NULL,
 359                 ADE7758_AVRMS);
 360 static IIO_DEV_ATTR_BVRMS(S_IRUGO,
 361                 ade7758_read_24bit,
 362                 NULL,
 363                 ADE7758_BVRMS);
 364 static IIO_DEV_ATTR_CVRMS(S_IRUGO,
 365                 ade7758_read_24bit,
 366                 NULL,
 367                 ADE7758_CVRMS);
 368 static IIO_DEV_ATTR_AIRMSOS(S_IWUSR | S_IRUGO,
 369                 ade7758_read_16bit,
 370                 ade7758_write_16bit,
 371                 ADE7758_AIRMSOS);
 372 static IIO_DEV_ATTR_BIRMSOS(S_IWUSR | S_IRUGO,
 373                 ade7758_read_16bit,
 374                 ade7758_write_16bit,
 375                 ADE7758_BIRMSOS);
 376 static IIO_DEV_ATTR_CIRMSOS(S_IWUSR | S_IRUGO,
 377                 ade7758_read_16bit,
 378                 ade7758_write_16bit,
 379                 ADE7758_CIRMSOS);
 380 static IIO_DEV_ATTR_AVRMSOS(S_IWUSR | S_IRUGO,
 381                 ade7758_read_16bit,
 382                 ade7758_write_16bit,
 383                 ADE7758_AVRMSOS);
 384 static IIO_DEV_ATTR_BVRMSOS(S_IWUSR | S_IRUGO,
 385                 ade7758_read_16bit,
 386                 ade7758_write_16bit,
 387                 ADE7758_BVRMSOS);
 388 static IIO_DEV_ATTR_CVRMSOS(S_IWUSR | S_IRUGO,
 389                 ade7758_read_16bit,
 390                 ade7758_write_16bit,
 391                 ADE7758_CVRMSOS);
 392 static IIO_DEV_ATTR_AIGAIN(S_IWUSR | S_IRUGO,
 393                 ade7758_read_16bit,
 394                 ade7758_write_16bit,
 395                 ADE7758_AIGAIN);
 396 static IIO_DEV_ATTR_BIGAIN(S_IWUSR | S_IRUGO,
 397                 ade7758_read_16bit,
 398                 ade7758_write_16bit,
 399                 ADE7758_BIGAIN);
 400 static IIO_DEV_ATTR_CIGAIN(S_IWUSR | S_IRUGO,
 401                 ade7758_read_16bit,
 402                 ade7758_write_16bit,
 403                 ADE7758_CIGAIN);
 404 static IIO_DEV_ATTR_AVRMSGAIN(S_IWUSR | S_IRUGO,
 405                 ade7758_read_16bit,
 406                 ade7758_write_16bit,
 407                 ADE7758_AVRMSGAIN);
 408 static IIO_DEV_ATTR_BVRMSGAIN(S_IWUSR | S_IRUGO,
 409                 ade7758_read_16bit,
 410                 ade7758_write_16bit,
 411                 ADE7758_BVRMSGAIN);
 412 static IIO_DEV_ATTR_CVRMSGAIN(S_IWUSR | S_IRUGO,
 413                 ade7758_read_16bit,
 414                 ade7758_write_16bit,
 415                 ADE7758_CVRMSGAIN);
 416
 417 int ade7758_set_irq(struct device *dev, bool enable)
 418 {
 419         int ret;
 420         u32 irqen;
 421         ret = ade7758_spi_read_reg_24(dev, ADE7758_MASK, &irqen);
 422         if (ret)
 423                 goto error_ret;
 424
 425         if (enable)
 426                 irqen |= 1 << 16; /* Enables an interrupt when a data is
 427                                      present in the waveform register */
 428         else
 429                 irqen &= ~(1 << 16);
 430
 431         ret = ade7758_spi_write_reg_24(dev, ADE7758_MASK, irqen);
 432         if (ret)
 433                 goto error_ret;
 434
 435 error_ret:
 436         return ret;
 437 }
 438
 439 /* Power down the device */
 440 static int ade7758_stop_device(struct device *dev)
 441 {
 442         int ret;
 443         u8 val;
 444         ade7758_spi_read_reg_8(dev,
 445                         ADE7758_OPMODE,
 446                         &val);
 447         val |= 7 << 3;  /* ADE7758 powered down */
 448         ret = ade7758_spi_write_reg_8(dev,
 449                         ADE7758_OPMODE,
 450                         val);
 451
 452         return ret;
 453 }
 454
 455 static int ade7758_initial_setup(struct iio_dev *indio_dev)
 456 {
 457         struct ade7758_state *st = iio_priv(indio_dev);
 458         struct device *dev = &indio_dev->dev;
 459         int ret;
 460
 461         /* use low spi speed for init */
 462         st->us->mode = SPI_MODE_1;
 463         spi_setup(st->us);
 464
 465         /* Disable IRQ */
 466         ret = ade7758_set_irq(dev, false);
 467         if (ret) {
 468                 dev_err(dev, "disable irq failed");
 469                 goto err_ret;
 470         }
 471
 472         ade7758_reset(dev);
 473         msleep(ADE7758_STARTUP_DELAY);
 474
 475 err_ret:
 476         return ret;
 477 }
 478
 479 static ssize_t ade7758_read_frequency(struct device *dev,
 480                 struct device_attribute *attr,
 481                 char *buf)
 482 {
 483         int ret, len = 0;
 484         u8 t;
 485         int sps;
 486         ret = ade7758_spi_read_reg_8(dev,
 487                         ADE7758_WAVMODE,
 488                         &t);
 489         if (ret)
 490                 return ret;
 491
 492         t = (t >> 5) & 0x3;
 493         sps = 26040 / (1 << t);
 494
 495         len = sprintf(buf, "%d SPS\n", sps);
 496         return len;
 497 }
 498
 499 static ssize_t ade7758_write_frequency(struct device *dev,
 500                 struct device_attribute *attr,
 501                 const char *buf,
 502                 size_t len)
 503 {
 504         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 505         u16 val;
 506         int ret;
 507         u8 reg, t;
 508
 509         ret = kstrtou16(buf, 10, &val);
 510         if (ret)
 511                 return ret;
 512
 513         mutex_lock(&indio_dev->mlock);
 514
 515         switch (val) {
 516         case 26040:
 517                 t = 0;
 518                 break;
 519         case 13020:
 520                 t = 1;
 521                 break;
 522         case 6510:
 523                 t = 2;
 524                 break;
 525         case 3255:
 526                 t = 3;
 527                 break;
 528         default:
 529                 ret = -EINVAL;
 530                 goto out;
 531         }
 532
 533         ret = ade7758_spi_read_reg_8(dev,
 534                         ADE7758_WAVMODE,
 535                         &reg);
 536         if (ret)
 537                 goto out;
 538
 539         reg &= ~(5 << 3);
 540         reg |= t << 5;
 541
 542         ret = ade7758_spi_write_reg_8(dev,
 543                         ADE7758_WAVMODE,
 544                         reg);
 545
 546 out:
 547         mutex_unlock(&indio_dev->mlock);
 548
 549         return ret ? ret : len;
 550 }
 551
 552 static IIO_DEV_ATTR_TEMP_RAW(ade7758_read_8bit);
 553 static IIO_CONST_ATTR(in_temp_offset, "129 C");
 554 static IIO_CONST_ATTR(in_temp_scale, "4 C");
 555
 556 static IIO_DEV_ATTR_AWATTHR(ade7758_read_16bit,
 557                 ADE7758_AWATTHR);
 558 static IIO_DEV_ATTR_BWATTHR(ade7758_read_16bit,
 559                 ADE7758_BWATTHR);
 560 static IIO_DEV_ATTR_CWATTHR(ade7758_read_16bit,
 561                 ADE7758_CWATTHR);
 562 static IIO_DEV_ATTR_AVARHR(ade7758_read_16bit,
 563                 ADE7758_AVARHR);
 564 static IIO_DEV_ATTR_BVARHR(ade7758_read_16bit,
 565                 ADE7758_BVARHR);
 566 static IIO_DEV_ATTR_CVARHR(ade7758_read_16bit,
 567                 ADE7758_CVARHR);
 568 static IIO_DEV_ATTR_AVAHR(ade7758_read_16bit,
 569                 ADE7758_AVAHR);
 570 static IIO_DEV_ATTR_BVAHR(ade7758_read_16bit,
 571                 ADE7758_BVAHR);
 572 static IIO_DEV_ATTR_CVAHR(ade7758_read_16bit,
 573                 ADE7758_CVAHR);
 574
 575 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
 576                 ade7758_read_frequency,
 577                 ade7758_write_frequency);
 578
 579 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26040 13020 6510 3255");
 580
 581 static struct attribute *ade7758_attributes[] = {
 582         &iio_dev_attr_in_temp_raw.dev_attr.attr,
 583         &iio_const_attr_in_temp_offset.dev_attr.attr,
 584         &iio_const_attr_in_temp_scale.dev_attr.attr,
 585         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 586         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 587         &iio_dev_attr_awatthr.dev_attr.attr,
 588         &iio_dev_attr_bwatthr.dev_attr.attr,
 589         &iio_dev_attr_cwatthr.dev_attr.attr,
 590         &iio_dev_attr_avarhr.dev_attr.attr,
 591         &iio_dev_attr_bvarhr.dev_attr.attr,
 592         &iio_dev_attr_cvarhr.dev_attr.attr,
 593         &iio_dev_attr_avahr.dev_attr.attr,
 594         &iio_dev_attr_bvahr.dev_attr.attr,
 595         &iio_dev_attr_cvahr.dev_attr.attr,
 596         &iio_dev_attr_vpeak.dev_attr.attr,
 597         &iio_dev_attr_ipeak.dev_attr.attr,
 598         &iio_dev_attr_aphcal.dev_attr.attr,
 599         &iio_dev_attr_bphcal.dev_attr.attr,
 600         &iio_dev_attr_cphcal.dev_attr.attr,
 601         &iio_dev_attr_wdiv.dev_attr.attr,
 602         &iio_dev_attr_vadiv.dev_attr.attr,
 603         &iio_dev_attr_airms.dev_attr.attr,
 604         &iio_dev_attr_birms.dev_attr.attr,
 605         &iio_dev_attr_cirms.dev_attr.attr,
 606         &iio_dev_attr_avrms.dev_attr.attr,
 607         &iio_dev_attr_bvrms.dev_attr.attr,
 608         &iio_dev_attr_cvrms.dev_attr.attr,
 609         &iio_dev_attr_aigain.dev_attr.attr,
 610         &iio_dev_attr_bigain.dev_attr.attr,
 611         &iio_dev_attr_cigain.dev_attr.attr,
 612         &iio_dev_attr_avrmsgain.dev_attr.attr,
 613         &iio_dev_attr_bvrmsgain.dev_attr.attr,
 614         &iio_dev_attr_cvrmsgain.dev_attr.attr,
 615         &iio_dev_attr_airmsos.dev_attr.attr,
 616         &iio_dev_attr_birmsos.dev_attr.attr,
 617         &iio_dev_attr_cirmsos.dev_attr.attr,
 618         &iio_dev_attr_avrmsos.dev_attr.attr,
 619         &iio_dev_attr_bvrmsos.dev_attr.attr,
 620         &iio_dev_attr_cvrmsos.dev_attr.attr,
 621         NULL,
 622 };
 623
 624 static const struct attribute_group ade7758_attribute_group = {
 625         .attrs = ade7758_attributes,
 626 };
 627
 628 static const struct iio_chan_spec ade7758_channels[] = {
 629         {
 630                 .type = IIO_VOLTAGE,
 631                 .indexed = 1,
 632                 .channel = 0,
 633                 .extend_name = "raw",
 634                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 635                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 636                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_VOLTAGE),
 637                 .scan_index = 0,
 638                 .scan_type = {
 639                         .sign = 's',
 640                         .realbits = 24,
 641                         .storagebits = 32,
 642                 },
 643         }, {
 644                 .type = IIO_CURRENT,
 645                 .indexed = 1,
 646                 .channel = 0,
 647                 .extend_name = "raw",
 648                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 649                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 650                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_CURRENT),
 651                 .scan_index = 1,
 652                 .scan_type = {
 653                         .sign = 's',
 654                         .realbits = 24,
 655                         .storagebits = 32,
 656                 },
 657         }, {
 658                 .type = IIO_POWER,
 659                 .indexed = 1,
 660                 .channel = 0,
 661                 .extend_name = "apparent_raw",
 662                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 663                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 664                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_APP_PWR),
 665                 .scan_index = 2,
 666                 .scan_type = {
 667                         .sign = 's',
 668                         .realbits = 24,
 669                         .storagebits = 32,
 670                 },
 671         }, {
 672                 .type = IIO_POWER,
 673                 .indexed = 1,
 674                 .channel = 0,
 675                 .extend_name = "active_raw",
 676                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 677                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 678                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_ACT_PWR),
 679                 .scan_index = 3,
 680                 .scan_type = {
 681                         .sign = 's',
 682                         .realbits = 24,
 683                         .storagebits = 32,
 684                 },
 685         }, {
 686                 .type = IIO_POWER,
 687                 .indexed = 1,
 688                 .channel = 0,
 689                 .extend_name = "reactive_raw",
 690                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 691                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 692                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_REACT_PWR),
 693                 .scan_index = 4,
 694                 .scan_type = {
 695                         .sign = 's',
 696                         .realbits = 24,
 697                         .storagebits = 32,
 698                 },
 699         }, {
 700                 .type = IIO_VOLTAGE,
 701                 .indexed = 1,
 702                 .channel = 1,
 703                 .extend_name = "raw",
 704                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 705                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 706                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_VOLTAGE),
 707                 .scan_index = 5,
 708                 .scan_type = {
 709                         .sign = 's',
 710                         .realbits = 24,
 711                         .storagebits = 32,
 712                 },
 713         }, {
 714                 .type = IIO_CURRENT,
 715                 .indexed = 1,
 716                 .channel = 1,
 717                 .extend_name = "raw",
 718                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 719                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 720                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_CURRENT),
 721                 .scan_index = 6,
 722                 .scan_type = {
 723                         .sign = 's',
 724                         .realbits = 24,
 725                         .storagebits = 32,
 726                 },
 727         }, {
 728                 .type = IIO_POWER,
 729                 .indexed = 1,
 730                 .channel = 1,
 731                 .extend_name = "apparent_raw",
 732                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 733                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 734                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_APP_PWR),
 735                 .scan_index = 7,
 736                 .scan_type = {
 737                         .sign = 's',
 738                         .realbits = 24,
 739                         .storagebits = 32,
 740                 },
 741         }, {
 742                 .type = IIO_POWER,
 743                 .indexed = 1,
 744                 .channel = 1,
 745                 .extend_name = "active_raw",
 746                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 747                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 748                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_ACT_PWR),
 749                 .scan_index = 8,
 750                 .scan_type = {
 751                         .sign = 's',
 752                         .realbits = 24,
 753                         .storagebits = 32,
 754                 },
 755         }, {
 756                 .type = IIO_POWER,
 757                 .indexed = 1,
 758                 .channel = 1,
 759                 .extend_name = "reactive_raw",
 760                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 761                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 762                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_REACT_PWR),
 763                 .scan_index = 9,
 764                 .scan_type = {
 765                         .sign = 's',
 766                         .realbits = 24,
 767                         .storagebits = 32,
 768                 },
 769         }, {
 770                 .type = IIO_VOLTAGE,
 771                 .indexed = 1,
 772                 .channel = 2,
 773                 .extend_name = "raw",
 774                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 775                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 776                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_VOLTAGE),
 777                 .scan_index = 10,
 778                 .scan_type = {
 779                         .sign = 's',
 780                         .realbits = 24,
 781                         .storagebits = 32,
 782                 },
 783         }, {
 784                 .type = IIO_CURRENT,
 785                 .indexed = 1,
 786                 .channel = 2,
 787                 .extend_name = "raw",
 788                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 789                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 790                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_CURRENT),
 791                 .scan_index = 11,
 792                 .scan_type = {
 793                         .sign = 's',
 794                         .realbits = 24,
 795                         .storagebits = 32,
 796                 },
 797         }, {
 798                 .type = IIO_POWER,
 799                 .indexed = 1,
 800                 .channel = 2,
 801                 .extend_name = "apparent_raw",
 802                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 803                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 804                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_APP_PWR),
 805                 .scan_index = 12,
 806                 .scan_type = {
 807                         .sign = 's',
 808                         .realbits = 24,
 809                         .storagebits = 32,
 810                 },
 811         }, {
 812                 .type = IIO_POWER,
 813                 .indexed = 1,
 814                 .channel = 2,
 815                 .extend_name = "active_raw",
 816                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 817                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 818                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_ACT_PWR),
 819                 .scan_index = 13,
 820                 .scan_type = {
 821                         .sign = 's',
 822                         .realbits = 24,
 823                         .storagebits = 32,
 824                 },
 825         }, {
 826                 .type = IIO_POWER,
 827                 .indexed = 1,
 828                 .channel = 2,
 829                 .extend_name = "reactive_raw",
 830                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 831                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 832                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_REACT_PWR),
 833                 .scan_index = 14,
 834                 .scan_type = {
 835                         .sign = 's',
 836                         .realbits = 24,
 837                         .storagebits = 32,
 838                 },
 839         },
 840         IIO_CHAN_SOFT_TIMESTAMP(15),
 841 };
 842
 843 static const struct iio_info ade7758_info = {
 844         .attrs = &ade7758_attribute_group,
 845         .driver_module = THIS_MODULE,
 846 };
 847
 848 static int ade7758_probe(struct spi_device *spi)
 849 {
 850         int ret;
 851         struct ade7758_state *st;
 852         struct iio_dev *indio_dev;
 853
 854         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 855         if (!indio_dev)
 856                 return -ENOMEM;
 857
 858         st = iio_priv(indio_dev);
 859         /* this is only used for removal purposes */
 860         spi_set_drvdata(spi, indio_dev);
 861
 862         /* Allocate the comms buffers */
 863         st->rx = kcalloc(ADE7758_MAX_RX, sizeof(*st->rx), GFP_KERNEL);
 864         if (!st->rx)
 865                 return -ENOMEM;
 866         st->tx = kcalloc(ADE7758_MAX_TX, sizeof(*st->tx), GFP_KERNEL);
 867         if (st->tx == NULL) {
 868                 ret = -ENOMEM;
 869                 goto error_free_rx;
 870         }
 871         st->us = spi;
 872         st->ade7758_ring_channels = &ade7758_channels[0];
 873         mutex_init(&st->buf_lock);
 874
 875         indio_dev->name = spi->dev.driver->name;
 876         indio_dev->dev.parent = &spi->dev;
 877         indio_dev->info = &ade7758_info;
 878         indio_dev->modes = INDIO_DIRECT_MODE;
 879
 880         ret = ade7758_configure_ring(indio_dev);
 881         if (ret)
 882                 goto error_free_tx;
 883
 884         ret = iio_buffer_register(indio_dev,
 885                                   &ade7758_channels[0],
 886                                   ARRAY_SIZE(ade7758_channels));
 887         if (ret) {
 888                 dev_err(&spi->dev, "failed to initialize the ring\n");
 889                 goto error_unreg_ring_funcs;
 890         }
 891
 892         /* Get the device into a sane initial state */
 893         ret = ade7758_initial_setup(indio_dev);
 894         if (ret)
 895                 goto error_uninitialize_ring;
 896
 897         if (spi->irq) {
 898                 ret = ade7758_probe_trigger(indio_dev);
 899                 if (ret)
 900                         goto error_uninitialize_ring;
 901         }
 902
 903         ret = iio_device_register(indio_dev);
 904         if (ret)
 905                 goto error_remove_trigger;
 906
 907         return 0;
 908
 909 error_remove_trigger:
 910         if (spi->irq)
 911                 ade7758_remove_trigger(indio_dev);
 912 error_uninitialize_ring:
 913         ade7758_uninitialize_ring(indio_dev);
 914 error_unreg_ring_funcs:
 915         ade7758_unconfigure_ring(indio_dev);
 916 error_free_tx:
 917         kfree(st->tx);
 918 error_free_rx:
 919         kfree(st->rx);
 920         return ret;
 921 }
 922
 923 static int ade7758_remove(struct spi_device *spi)
 924 {
 925         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 926         struct ade7758_state *st = iio_priv(indio_dev);
 927
 928         iio_device_unregister(indio_dev);
 929         ade7758_stop_device(&indio_dev->dev);
 930         ade7758_remove_trigger(indio_dev);
 931         ade7758_uninitialize_ring(indio_dev);
 932         ade7758_unconfigure_ring(indio_dev);
 933         kfree(st->tx);
 934         kfree(st->rx);
 935
 936         return 0;
 937 }
 938
 939 static const struct spi_device_id ade7758_id[] = {
 940         {"ade7758", 0},
 941         {}
 942 };
 943 MODULE_DEVICE_TABLE(spi, ade7758_id);
 944
 945 static struct spi_driver ade7758_driver = {
 946         .driver = {
 947                 .name = "ade7758",
 948                 .owner = THIS_MODULE,
 949         },
 950         .probe = ade7758_probe,
 951         .remove = ade7758_remove,
 952         .id_table = ade7758_id,
 953 };
 954 module_spi_driver(ade7758_driver);
 955
 956 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
 957 MODULE_DESCRIPTION("Analog Devices ADE7758 Polyphase Multifunction Energy Metering IC Driver");
 958 MODULE_LICENSE("GPL v2");