drivers/staging/imx-drm/ipuv3-crtc.c

   1 /*
   2  * i.MX IPUv3 Graphics driver
   3  *
   4  * Copyright (C) 2011 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18  * MA 02110-1301, USA.
  19  */
  20 #include <linux/module.h>
  21 #include <linux/export.h>
  22 #include <linux/device.h>
  23 #include <linux/platform_device.h>
  24 #include <drm/drmP.h>
  25 #include <drm/drm_crtc_helper.h>
  26 #include <linux/fb.h>
  27 #include <linux/clk.h>
  28 #include <drm/drm_gem_cma_helper.h>
  29 #include <drm/drm_fb_cma_helper.h>
  30
  31 #include "ipu-v3/imx-ipu-v3.h"
  32 #include "imx-drm.h"
  33
  34 #define DRIVER_DESC             "i.MX IPUv3 Graphics"
  35
  36 struct ipu_crtc {
  37         struct device           *dev;
  38         struct drm_crtc         base;
  39         struct imx_drm_crtc     *imx_crtc;
  40         struct ipuv3_channel    *ipu_ch;
  41         struct ipu_dc           *dc;
  42         struct ipu_dp           *dp;
  43         struct dmfc_channel     *dmfc;
  44         struct ipu_di           *di;
  45         int                     enabled;
  46         struct drm_pending_vblank_event *page_flip_event;
  47         struct drm_framebuffer  *newfb;
  48         int                     irq;
  49         u32                     interface_pix_fmt;
  50         unsigned long           di_clkflags;
  51         int                     di_hsync_pin;
  52         int                     di_vsync_pin;
  53 };
  54
  55 #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
  56
  57 static int calc_vref(struct drm_display_mode *mode)
  58 {
  59         unsigned long htotal, vtotal;
  60
  61         htotal = mode->htotal;
  62         vtotal = mode->vtotal;
  63
  64         if (!htotal || !vtotal)
  65                 return 60;
  66
  67         return mode->clock * 1000 / vtotal / htotal;
  68 }
  69
  70 static int calc_bandwidth(struct drm_display_mode *mode, unsigned int vref)
  71 {
  72         return mode->hdisplay * mode->vdisplay * vref;
  73 }
  74
  75 static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
  76 {
  77         if (ipu_crtc->enabled)
  78                 return;
  79
  80         ipu_di_enable(ipu_crtc->di);
  81         ipu_dmfc_enable_channel(ipu_crtc->dmfc);
  82         ipu_idmac_enable_channel(ipu_crtc->ipu_ch);
  83         ipu_dc_enable_channel(ipu_crtc->dc);
  84         if (ipu_crtc->dp)
  85                 ipu_dp_enable_channel(ipu_crtc->dp);
  86
  87         ipu_crtc->enabled = 1;
  88 }
  89
  90 static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
  91 {
  92         if (!ipu_crtc->enabled)
  93                 return;
  94
  95         if (ipu_crtc->dp)
  96                 ipu_dp_disable_channel(ipu_crtc->dp);
  97         ipu_dc_disable_channel(ipu_crtc->dc);
  98         ipu_idmac_wait_busy(ipu_crtc->ipu_ch, 50);
  99         ipu_idmac_disable_channel(ipu_crtc->ipu_ch);
 100         ipu_dmfc_disable_channel(ipu_crtc->dmfc);
 101         ipu_di_disable(ipu_crtc->di);
 102
 103         ipu_crtc->enabled = 0;
 104 }
 105
 106 static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
 107 {
 108         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 109
 110         dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
 111
 112         switch (mode) {
 113         case DRM_MODE_DPMS_ON:
 114                 ipu_fb_enable(ipu_crtc);
 115                 break;
 116         case DRM_MODE_DPMS_STANDBY:
 117         case DRM_MODE_DPMS_SUSPEND:
 118         case DRM_MODE_DPMS_OFF:
 119                 ipu_fb_disable(ipu_crtc);
 120                 break;
 121         }
 122 }
 123
 124 static int ipu_page_flip(struct drm_crtc *crtc,
 125                 struct drm_framebuffer *fb,
 126                 struct drm_pending_vblank_event *event,
 127                 uint32_t page_flip_flags)
 128 {
 129         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 130         int ret;
 131
 132         if (ipu_crtc->newfb)
 133                 return -EBUSY;
 134
 135         ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
 136         if (ret) {
 137                 dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
 138                 list_del(&event->base.link);
 139
 140                 return ret;
 141         }
 142
 143         ipu_crtc->newfb = fb;
 144         ipu_crtc->page_flip_event = event;
 145         crtc->fb = fb;
 146
 147         return 0;
 148 }
 149
 150 static const struct drm_crtc_funcs ipu_crtc_funcs = {
 151         .set_config = drm_crtc_helper_set_config,
 152         .destroy = drm_crtc_cleanup,
 153         .page_flip = ipu_page_flip,
 154 };
 155
 156 static int ipu_drm_set_base(struct drm_crtc *crtc, int x, int y)
 157 {
 158         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 159         struct drm_gem_cma_object *cma_obj;
 160         struct drm_framebuffer *fb = crtc->fb;
 161         unsigned long phys;
 162
 163         cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
 164         if (!cma_obj) {
 165                 DRM_LOG_KMS("entry is null.\n");
 166                 return -EFAULT;
 167         }
 168
 169         phys = cma_obj->paddr;
 170         phys += x * (fb->bits_per_pixel >> 3);
 171         phys += y * fb->pitches[0];
 172
 173         dev_dbg(ipu_crtc->dev, "%s: phys: 0x%lx\n", __func__, phys);
 174         dev_dbg(ipu_crtc->dev, "%s: xy: %dx%d\n", __func__, x, y);
 175
 176         ipu_cpmem_set_stride(ipu_get_cpmem(ipu_crtc->ipu_ch), fb->pitches[0]);
 177         ipu_cpmem_set_buffer(ipu_get_cpmem(ipu_crtc->ipu_ch),
 178                           0, phys);
 179
 180         return 0;
 181 }
 182
 183 static int ipu_crtc_mode_set(struct drm_crtc *crtc,
 184                                struct drm_display_mode *orig_mode,
 185                                struct drm_display_mode *mode,
 186                                int x, int y,
 187                                struct drm_framebuffer *old_fb)
 188 {
 189         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 190         struct drm_framebuffer *fb = ipu_crtc->base.fb;
 191         int ret;
 192         struct ipu_di_signal_cfg sig_cfg = {};
 193         u32 out_pixel_fmt;
 194         struct ipu_ch_param __iomem *cpmem = ipu_get_cpmem(ipu_crtc->ipu_ch);
 195         int bpp;
 196         u32 v4l2_fmt;
 197
 198         dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
 199                         mode->hdisplay);
 200         dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
 201                         mode->vdisplay);
 202
 203         ipu_ch_param_zero(cpmem);
 204
 205         switch (fb->pixel_format) {
 206         case DRM_FORMAT_XRGB8888:
 207         case DRM_FORMAT_ARGB8888:
 208                 v4l2_fmt = V4L2_PIX_FMT_RGB32;
 209                 bpp = 32;
 210                 break;
 211         case DRM_FORMAT_RGB565:
 212                 v4l2_fmt = V4L2_PIX_FMT_RGB565;
 213                 bpp = 16;
 214                 break;
 215         case DRM_FORMAT_RGB888:
 216                 v4l2_fmt = V4L2_PIX_FMT_RGB24;
 217                 bpp = 24;
 218                 break;
 219         case DRM_FORMAT_BGR888:
 220                 v4l2_fmt = V4L2_PIX_FMT_BGR24;
 221                 bpp = 24;
 222                 break;
 223         default:
 224                 dev_err(ipu_crtc->dev, "unsupported pixel format 0x%08x\n",
 225                                 fb->pixel_format);
 226                 return -EINVAL;
 227         }
 228
 229         out_pixel_fmt = ipu_crtc->interface_pix_fmt;
 230
 231         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 232                 sig_cfg.interlaced = 1;
 233         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 234                 sig_cfg.Hsync_pol = 1;
 235         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 236                 sig_cfg.Vsync_pol = 1;
 237
 238         sig_cfg.enable_pol = 1;
 239         sig_cfg.clk_pol = 0;
 240         sig_cfg.width = mode->hdisplay;
 241         sig_cfg.height = mode->vdisplay;
 242         sig_cfg.pixel_fmt = out_pixel_fmt;
 243         sig_cfg.h_start_width = mode->htotal - mode->hsync_end;
 244         sig_cfg.h_sync_width = mode->hsync_end - mode->hsync_start;
 245         sig_cfg.h_end_width = mode->hsync_start - mode->hdisplay;
 246
 247         sig_cfg.v_start_width = mode->vtotal - mode->vsync_end;
 248         sig_cfg.v_sync_width = mode->vsync_end - mode->vsync_start;
 249         sig_cfg.v_end_width = mode->vsync_start - mode->vdisplay;
 250         sig_cfg.pixelclock = mode->clock * 1000;
 251         sig_cfg.clkflags = ipu_crtc->di_clkflags;
 252
 253         sig_cfg.v_to_h_sync = 0;
 254
 255         sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
 256         sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;
 257
 258         if (ipu_crtc->dp) {
 259                 ret = ipu_dp_setup_channel(ipu_crtc->dp, IPUV3_COLORSPACE_RGB,
 260                                 IPUV3_COLORSPACE_RGB);
 261                 if (ret) {
 262                         dev_err(ipu_crtc->dev,
 263                                 "initializing display processor failed with %d\n",
 264                                 ret);
 265                         return ret;
 266                 }
 267                 ipu_dp_set_global_alpha(ipu_crtc->dp, 1, 0, 1);
 268         }
 269
 270         ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, sig_cfg.interlaced,
 271                         out_pixel_fmt, mode->hdisplay);
 272         if (ret) {
 273                 dev_err(ipu_crtc->dev,
 274                                 "initializing display controller failed with %d\n",
 275                                 ret);
 276                 return ret;
 277         }
 278
 279         ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
 280         if (ret) {
 281                 dev_err(ipu_crtc->dev,
 282                                 "initializing panel failed with %d\n", ret);
 283                 return ret;
 284         }
 285
 286         ipu_cpmem_set_resolution(cpmem, mode->hdisplay, mode->vdisplay);
 287         ipu_cpmem_set_fmt(cpmem, v4l2_fmt);
 288         ipu_cpmem_set_high_priority(ipu_crtc->ipu_ch);
 289
 290         ret = ipu_dmfc_init_channel(ipu_crtc->dmfc, mode->hdisplay);
 291         if (ret) {
 292                 dev_err(ipu_crtc->dev,
 293                                 "initializing dmfc channel failed with %d\n",
 294                                 ret);
 295                 return ret;
 296         }
 297
 298         ret = ipu_dmfc_alloc_bandwidth(ipu_crtc->dmfc,
 299                         calc_bandwidth(mode, calc_vref(mode)), 64);
 300         if (ret) {
 301                 dev_err(ipu_crtc->dev,
 302                                 "allocating dmfc bandwidth failed with %d\n",
 303                                 ret);
 304                 return ret;
 305         }
 306
 307         ipu_drm_set_base(crtc, x, y);
 308
 309         return 0;
 310 }
 311
 312 static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
 313 {
 314         unsigned long flags;
 315         struct drm_device *drm = ipu_crtc->base.dev;
 316
 317         spin_lock_irqsave(&drm->event_lock, flags);
 318         if (ipu_crtc->page_flip_event)
 319                 drm_send_vblank_event(drm, -1, ipu_crtc->page_flip_event);
 320         ipu_crtc->page_flip_event = NULL;
 321         imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
 322         spin_unlock_irqrestore(&drm->event_lock, flags);
 323 }
 324
 325 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
 326 {
 327         struct ipu_crtc *ipu_crtc = dev_id;
 328
 329         imx_drm_handle_vblank(ipu_crtc->imx_crtc);
 330
 331         if (ipu_crtc->newfb) {
 332                 ipu_crtc->newfb = NULL;
 333                 ipu_drm_set_base(&ipu_crtc->base, 0, 0);
 334                 ipu_crtc_handle_pageflip(ipu_crtc);
 335         }
 336
 337         return IRQ_HANDLED;
 338 }
 339
 340 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
 341                                   const struct drm_display_mode *mode,
 342                                   struct drm_display_mode *adjusted_mode)
 343 {
 344         return true;
 345 }
 346
 347 static void ipu_crtc_prepare(struct drm_crtc *crtc)
 348 {
 349         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 350
 351         ipu_fb_disable(ipu_crtc);
 352 }
 353
 354 static void ipu_crtc_commit(struct drm_crtc *crtc)
 355 {
 356         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 357
 358         ipu_fb_enable(ipu_crtc);
 359 }
 360
 361 static struct drm_crtc_helper_funcs ipu_helper_funcs = {
 362         .dpms = ipu_crtc_dpms,
 363         .mode_fixup = ipu_crtc_mode_fixup,
 364         .mode_set = ipu_crtc_mode_set,
 365         .prepare = ipu_crtc_prepare,
 366         .commit = ipu_crtc_commit,
 367 };
 368
 369 static int ipu_enable_vblank(struct drm_crtc *crtc)
 370 {
 371         return 0;
 372 }
 373
 374 static void ipu_disable_vblank(struct drm_crtc *crtc)
 375 {
 376         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 377
 378         ipu_crtc->page_flip_event = NULL;
 379         ipu_crtc->newfb = NULL;
 380 }
 381
 382 static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc, u32 encoder_type,
 383                 u32 pixfmt, int hsync_pin, int vsync_pin)
 384 {
 385         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 386
 387         ipu_crtc->interface_pix_fmt = pixfmt;
 388         ipu_crtc->di_hsync_pin = hsync_pin;
 389         ipu_crtc->di_vsync_pin = vsync_pin;
 390
 391         switch (encoder_type) {
 392         case DRM_MODE_ENCODER_DAC:
 393         case DRM_MODE_ENCODER_TVDAC:
 394         case DRM_MODE_ENCODER_LVDS:
 395                 ipu_crtc->di_clkflags = IPU_DI_CLKMODE_SYNC |
 396                         IPU_DI_CLKMODE_EXT;
 397                 break;
 398         case DRM_MODE_ENCODER_NONE:
 399                 ipu_crtc->di_clkflags = 0;
 400                 break;
 401         }
 402
 403         return 0;
 404 }
 405
 406 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
 407         .enable_vblank = ipu_enable_vblank,
 408         .disable_vblank = ipu_disable_vblank,
 409         .set_interface_pix_fmt = ipu_set_interface_pix_fmt,
 410         .crtc_funcs = &ipu_crtc_funcs,
 411         .crtc_helper_funcs = &ipu_helper_funcs,
 412 };
 413
 414 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
 415 {
 416         if (!IS_ERR_OR_NULL(ipu_crtc->ipu_ch))
 417                 ipu_idmac_put(ipu_crtc->ipu_ch);
 418         if (!IS_ERR_OR_NULL(ipu_crtc->dmfc))
 419                 ipu_dmfc_put(ipu_crtc->dmfc);
 420         if (!IS_ERR_OR_NULL(ipu_crtc->dp))
 421                 ipu_dp_put(ipu_crtc->dp);
 422         if (!IS_ERR_OR_NULL(ipu_crtc->di))
 423                 ipu_di_put(ipu_crtc->di);
 424 }
 425
 426 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
 427                 struct ipu_client_platformdata *pdata)
 428 {
 429         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 430         int ret;
 431
 432         ipu_crtc->ipu_ch = ipu_idmac_get(ipu, pdata->dma[0]);
 433         if (IS_ERR(ipu_crtc->ipu_ch)) {
 434                 ret = PTR_ERR(ipu_crtc->ipu_ch);
 435                 goto err_out;
 436         }
 437
 438         ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
 439         if (IS_ERR(ipu_crtc->dc)) {
 440                 ret = PTR_ERR(ipu_crtc->dc);
 441                 goto err_out;
 442         }
 443
 444         ipu_crtc->dmfc = ipu_dmfc_get(ipu, pdata->dma[0]);
 445         if (IS_ERR(ipu_crtc->dmfc)) {
 446                 ret = PTR_ERR(ipu_crtc->dmfc);
 447                 goto err_out;
 448         }
 449
 450         if (pdata->dp >= 0) {
 451                 ipu_crtc->dp = ipu_dp_get(ipu, pdata->dp);
 452                 if (IS_ERR(ipu_crtc->dp)) {
 453                         ret = PTR_ERR(ipu_crtc->dp);
 454                         goto err_out;
 455                 }
 456         }
 457
 458         ipu_crtc->di = ipu_di_get(ipu, pdata->di);
 459         if (IS_ERR(ipu_crtc->di)) {
 460                 ret = PTR_ERR(ipu_crtc->di);
 461                 goto err_out;
 462         }
 463
 464         return 0;
 465 err_out:
 466         ipu_put_resources(ipu_crtc);
 467
 468         return ret;
 469 }
 470
 471 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
 472                 struct ipu_client_platformdata *pdata)
 473 {
 474         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 475         int ret;
 476
 477         ret = ipu_get_resources(ipu_crtc, pdata);
 478         if (ret) {
 479                 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
 480                                 ret);
 481                 return ret;
 482         }
 483
 484         ret = imx_drm_add_crtc(&ipu_crtc->base,
 485                         &ipu_crtc->imx_crtc,
 486                         &ipu_crtc_helper_funcs, THIS_MODULE,
 487                         ipu_crtc->dev->parent->of_node, pdata->di);
 488         if (ret) {
 489                 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
 490                 goto err_put_resources;
 491         }
 492
 493         ipu_crtc->irq = ipu_idmac_channel_irq(ipu, ipu_crtc->ipu_ch,
 494                         IPU_IRQ_EOF);
 495         ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
 496                         "imx_drm", ipu_crtc);
 497         if (ret < 0) {
 498                 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
 499                 goto err_put_resources;
 500         }
 501
 502         return 0;
 503
 504 err_put_resources:
 505         ipu_put_resources(ipu_crtc);
 506
 507         return ret;
 508 }
 509
 510 static int ipu_drm_probe(struct platform_device *pdev)
 511 {
 512         struct ipu_client_platformdata *pdata = pdev->dev.platform_data;
 513         struct ipu_crtc *ipu_crtc;
 514         int ret;
 515
 516         if (!pdata)
 517                 return -EINVAL;
 518
 519         pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
 520
 521         ipu_crtc = devm_kzalloc(&pdev->dev, sizeof(*ipu_crtc), GFP_KERNEL);
 522         if (!ipu_crtc)
 523                 return -ENOMEM;
 524
 525         ipu_crtc->dev = &pdev->dev;
 526
 527         ret = ipu_crtc_init(ipu_crtc, pdata);
 528         if (ret)
 529                 return ret;
 530
 531         platform_set_drvdata(pdev, ipu_crtc);
 532
 533         return 0;
 534 }
 535
 536 static int ipu_drm_remove(struct platform_device *pdev)
 537 {
 538         struct ipu_crtc *ipu_crtc = platform_get_drvdata(pdev);
 539
 540         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
 541
 542         ipu_put_resources(ipu_crtc);
 543
 544         return 0;
 545 }
 546
 547 static struct platform_driver ipu_drm_driver = {
 548         .driver = {
 549                 .name = "imx-ipuv3-crtc",
 550         },
 551         .probe = ipu_drm_probe,
 552         .remove = ipu_drm_remove,
 553 };
 554 module_platform_driver(ipu_drm_driver);
 555
 556 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
 557 MODULE_DESCRIPTION(DRIVER_DESC);
 558 MODULE_LICENSE("GPL");
 559 MODULE_ALIAS("platform:imx-ipuv3-crtc");