drivers/staging/imx-drm/ipuv3-crtc.c

   1 /*
   2  * i.MX IPUv3 Graphics driver
   3  *
   4  * Copyright (C) 2011 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18  * MA 02110-1301, USA.
  19  */
  20 #include <linux/module.h>
  21 #include <linux/export.h>
  22 #include <linux/device.h>
  23 #include <linux/platform_device.h>
  24 #include <drm/drmP.h>
  25 #include <drm/drm_crtc_helper.h>
  26 #include <linux/fb.h>
  27 #include <linux/clk.h>
  28 #include <drm/drm_gem_cma_helper.h>
  29 #include <drm/drm_fb_cma_helper.h>
  30
  31 #include "ipu-v3/imx-ipu-v3.h"
  32 #include "imx-drm.h"
  33
  34 #define DRIVER_DESC             "i.MX IPUv3 Graphics"
  35
  36 struct ipu_framebuffer {
  37         struct drm_framebuffer  base;
  38         void                    *virt;
  39         dma_addr_t              phys;
  40         size_t                  len;
  41 };
  42
  43 struct ipu_crtc {
  44         struct device           *dev;
  45         struct drm_crtc         base;
  46         struct imx_drm_crtc     *imx_crtc;
  47         struct ipuv3_channel    *ipu_ch;
  48         struct ipu_dc           *dc;
  49         struct ipu_dp           *dp;
  50         struct dmfc_channel     *dmfc;
  51         struct ipu_di           *di;
  52         int                     enabled;
  53         struct drm_pending_vblank_event *page_flip_event;
  54         struct drm_framebuffer  *newfb;
  55         int                     irq;
  56         u32                     interface_pix_fmt;
  57         unsigned long           di_clkflags;
  58         int                     di_hsync_pin;
  59         int                     di_vsync_pin;
  60 };
  61
  62 #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
  63
  64 static int calc_vref(struct drm_display_mode *mode)
  65 {
  66         unsigned long htotal, vtotal;
  67
  68         htotal = mode->htotal;
  69         vtotal = mode->vtotal;
  70
  71         if (!htotal || !vtotal)
  72                 return 60;
  73
  74         return mode->clock * 1000 / vtotal / htotal;
  75 }
  76
  77 static int calc_bandwidth(struct drm_display_mode *mode, unsigned int vref)
  78 {
  79         return mode->hdisplay * mode->vdisplay * vref;
  80 }
  81
  82 static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
  83 {
  84         if (ipu_crtc->enabled)
  85                 return;
  86
  87         ipu_di_enable(ipu_crtc->di);
  88         ipu_dmfc_enable_channel(ipu_crtc->dmfc);
  89         ipu_idmac_enable_channel(ipu_crtc->ipu_ch);
  90         ipu_dc_enable_channel(ipu_crtc->dc);
  91         if (ipu_crtc->dp)
  92                 ipu_dp_enable_channel(ipu_crtc->dp);
  93
  94         ipu_crtc->enabled = 1;
  95 }
  96
  97 static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
  98 {
  99         if (!ipu_crtc->enabled)
 100                 return;
 101
 102         if (ipu_crtc->dp)
 103                 ipu_dp_disable_channel(ipu_crtc->dp);
 104         ipu_dc_disable_channel(ipu_crtc->dc);
 105         ipu_idmac_disable_channel(ipu_crtc->ipu_ch);
 106         ipu_dmfc_disable_channel(ipu_crtc->dmfc);
 107         ipu_di_disable(ipu_crtc->di);
 108
 109         ipu_crtc->enabled = 0;
 110 }
 111
 112 static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
 113 {
 114         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 115
 116         dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
 117
 118         switch (mode) {
 119         case DRM_MODE_DPMS_ON:
 120                 ipu_fb_enable(ipu_crtc);
 121                 break;
 122         case DRM_MODE_DPMS_STANDBY:
 123         case DRM_MODE_DPMS_SUSPEND:
 124         case DRM_MODE_DPMS_OFF:
 125                 ipu_fb_disable(ipu_crtc);
 126                 break;
 127         }
 128 }
 129
 130 static int ipu_page_flip(struct drm_crtc *crtc,
 131                 struct drm_framebuffer *fb,
 132                 struct drm_pending_vblank_event *event)
 133 {
 134         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 135         int ret;
 136
 137         if (ipu_crtc->newfb)
 138                 return -EBUSY;
 139
 140         ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
 141         if (ret) {
 142                 dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
 143                 list_del(&event->base.link);
 144
 145                 return ret;
 146         }
 147
 148         ipu_crtc->newfb = fb;
 149         ipu_crtc->page_flip_event = event;
 150         crtc->fb = fb;
 151
 152         return 0;
 153 }
 154
 155 static const struct drm_crtc_funcs ipu_crtc_funcs = {
 156         .set_config = drm_crtc_helper_set_config,
 157         .destroy = drm_crtc_cleanup,
 158         .page_flip = ipu_page_flip,
 159 };
 160
 161 static int ipu_drm_set_base(struct drm_crtc *crtc, int x, int y)
 162 {
 163         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 164         struct drm_gem_cma_object *cma_obj;
 165         struct drm_framebuffer *fb = crtc->fb;
 166         unsigned long phys;
 167
 168         cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
 169         if (!cma_obj) {
 170                 DRM_LOG_KMS("entry is null.\n");
 171                 return -EFAULT;
 172         }
 173
 174         phys = cma_obj->paddr;
 175         phys += x * (fb->bits_per_pixel >> 3);
 176         phys += y * fb->pitches[0];
 177
 178         dev_dbg(ipu_crtc->dev, "%s: phys: 0x%lx\n", __func__, phys);
 179         dev_dbg(ipu_crtc->dev, "%s: xy: %dx%d\n", __func__, x, y);
 180
 181         ipu_cpmem_set_stride(ipu_get_cpmem(ipu_crtc->ipu_ch), fb->pitches[0]);
 182         ipu_cpmem_set_buffer(ipu_get_cpmem(ipu_crtc->ipu_ch),
 183                           0, phys);
 184
 185         return 0;
 186 }
 187
 188 static int ipu_crtc_mode_set(struct drm_crtc *crtc,
 189                                struct drm_display_mode *orig_mode,
 190                                struct drm_display_mode *mode,
 191                                int x, int y,
 192                                struct drm_framebuffer *old_fb)
 193 {
 194         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 195         struct drm_framebuffer *fb = ipu_crtc->base.fb;
 196         int ret;
 197         struct ipu_di_signal_cfg sig_cfg = {};
 198         u32 out_pixel_fmt;
 199         struct ipu_ch_param __iomem *cpmem = ipu_get_cpmem(ipu_crtc->ipu_ch);
 200         int bpp;
 201         u32 v4l2_fmt;
 202
 203         dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
 204                         mode->hdisplay);
 205         dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
 206                         mode->vdisplay);
 207
 208         ipu_ch_param_zero(cpmem);
 209
 210         switch (fb->pixel_format) {
 211         case DRM_FORMAT_XRGB8888:
 212         case DRM_FORMAT_ARGB8888:
 213                 v4l2_fmt = V4L2_PIX_FMT_RGB32;
 214                 bpp = 32;
 215                 break;
 216         case DRM_FORMAT_RGB565:
 217                 v4l2_fmt = V4L2_PIX_FMT_RGB565;
 218                 bpp = 16;
 219                 break;
 220         case DRM_FORMAT_RGB888:
 221                 v4l2_fmt = V4L2_PIX_FMT_RGB24;
 222                 bpp = 24;
 223                 break;
 224         default:
 225                 dev_err(ipu_crtc->dev, "unsupported pixel format 0x%08x\n",
 226                                 fb->pixel_format);
 227                 return -EINVAL;
 228         }
 229
 230         out_pixel_fmt = ipu_crtc->interface_pix_fmt;
 231
 232         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 233                 sig_cfg.interlaced = 1;
 234         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 235                 sig_cfg.Hsync_pol = 1;
 236         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 237                 sig_cfg.Vsync_pol = 1;
 238
 239         sig_cfg.enable_pol = 1;
 240         sig_cfg.clk_pol = 0;
 241         sig_cfg.width = mode->hdisplay;
 242         sig_cfg.height = mode->vdisplay;
 243         sig_cfg.pixel_fmt = out_pixel_fmt;
 244         sig_cfg.h_start_width = mode->htotal - mode->hsync_end;
 245         sig_cfg.h_sync_width = mode->hsync_end - mode->hsync_start;
 246         sig_cfg.h_end_width = mode->hsync_start - mode->hdisplay;
 247
 248         sig_cfg.v_start_width = mode->vtotal - mode->vsync_end;
 249         sig_cfg.v_sync_width = mode->vsync_end - mode->vsync_start;
 250         sig_cfg.v_end_width = mode->vsync_start - mode->vdisplay;
 251         sig_cfg.pixelclock = mode->clock * 1000;
 252         sig_cfg.clkflags = ipu_crtc->di_clkflags;
 253
 254         sig_cfg.v_to_h_sync = 0;
 255
 256         sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
 257         sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;
 258
 259         if (ipu_crtc->dp) {
 260                 ret = ipu_dp_setup_channel(ipu_crtc->dp, IPUV3_COLORSPACE_RGB,
 261                                 IPUV3_COLORSPACE_RGB);
 262                 if (ret) {
 263                         dev_err(ipu_crtc->dev,
 264                                 "initializing display processor failed with %d\n",
 265                                 ret);
 266                         return ret;
 267                 }
 268                 ipu_dp_set_global_alpha(ipu_crtc->dp, 1, 0, 1);
 269         }
 270
 271         ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, sig_cfg.interlaced,
 272                         out_pixel_fmt, mode->hdisplay);
 273         if (ret) {
 274                 dev_err(ipu_crtc->dev,
 275                                 "initializing display controller failed with %d\n",
 276                                 ret);
 277                 return ret;
 278         }
 279
 280         ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
 281         if (ret) {
 282                 dev_err(ipu_crtc->dev,
 283                                 "initializing panel failed with %d\n", ret);
 284                 return ret;
 285         }
 286
 287         ipu_cpmem_set_resolution(cpmem, mode->hdisplay, mode->vdisplay);
 288         ipu_cpmem_set_fmt(cpmem, v4l2_fmt);
 289         ipu_cpmem_set_high_priority(ipu_crtc->ipu_ch);
 290
 291         ret = ipu_dmfc_init_channel(ipu_crtc->dmfc, mode->hdisplay);
 292         if (ret) {
 293                 dev_err(ipu_crtc->dev,
 294                                 "initializing dmfc channel failed with %d\n",
 295                                 ret);
 296                 return ret;
 297         }
 298
 299         ret = ipu_dmfc_alloc_bandwidth(ipu_crtc->dmfc,
 300                         calc_bandwidth(mode, calc_vref(mode)), 64);
 301         if (ret) {
 302                 dev_err(ipu_crtc->dev,
 303                                 "allocating dmfc bandwidth failed with %d\n",
 304                                 ret);
 305                 return ret;
 306         }
 307
 308         ipu_drm_set_base(crtc, x, y);
 309
 310         return 0;
 311 }
 312
 313 static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
 314 {
 315         unsigned long flags;
 316         struct drm_device *drm = ipu_crtc->base.dev;
 317
 318         spin_lock_irqsave(&drm->event_lock, flags);
 319         if (ipu_crtc->page_flip_event)
 320                 drm_send_vblank_event(drm, -1, ipu_crtc->page_flip_event);
 321         ipu_crtc->page_flip_event = NULL;
 322         imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
 323         spin_unlock_irqrestore(&drm->event_lock, flags);
 324 }
 325
 326 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
 327 {
 328         struct ipu_crtc *ipu_crtc = dev_id;
 329
 330         imx_drm_handle_vblank(ipu_crtc->imx_crtc);
 331
 332         if (ipu_crtc->newfb) {
 333                 ipu_crtc->newfb = NULL;
 334                 ipu_drm_set_base(&ipu_crtc->base, 0, 0);
 335                 ipu_crtc_handle_pageflip(ipu_crtc);
 336         }
 337
 338         return IRQ_HANDLED;
 339 }
 340
 341 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
 342                                   const struct drm_display_mode *mode,
 343                                   struct drm_display_mode *adjusted_mode)
 344 {
 345         return true;
 346 }
 347
 348 static void ipu_crtc_prepare(struct drm_crtc *crtc)
 349 {
 350         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 351
 352         ipu_fb_disable(ipu_crtc);
 353 }
 354
 355 static void ipu_crtc_commit(struct drm_crtc *crtc)
 356 {
 357         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 358
 359         ipu_fb_enable(ipu_crtc);
 360 }
 361
 362 static struct drm_crtc_helper_funcs ipu_helper_funcs = {
 363         .dpms = ipu_crtc_dpms,
 364         .mode_fixup = ipu_crtc_mode_fixup,
 365         .mode_set = ipu_crtc_mode_set,
 366         .prepare = ipu_crtc_prepare,
 367         .commit = ipu_crtc_commit,
 368 };
 369
 370 static int ipu_enable_vblank(struct drm_crtc *crtc)
 371 {
 372         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 373
 374         enable_irq(ipu_crtc->irq);
 375
 376         return 0;
 377 }
 378
 379 static void ipu_disable_vblank(struct drm_crtc *crtc)
 380 {
 381         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 382
 383         disable_irq(ipu_crtc->irq);
 384 }
 385
 386 static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc, u32 encoder_type,
 387                 u32 pixfmt, int hsync_pin, int vsync_pin)
 388 {
 389         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 390
 391         ipu_crtc->interface_pix_fmt = pixfmt;
 392         ipu_crtc->di_hsync_pin = hsync_pin;
 393         ipu_crtc->di_vsync_pin = vsync_pin;
 394
 395         switch (encoder_type) {
 396         case DRM_MODE_ENCODER_DAC:
 397         case DRM_MODE_ENCODER_TVDAC:
 398         case DRM_MODE_ENCODER_LVDS:
 399                 ipu_crtc->di_clkflags = IPU_DI_CLKMODE_SYNC |
 400                         IPU_DI_CLKMODE_EXT;
 401                 break;
 402         case DRM_MODE_ENCODER_NONE:
 403                 ipu_crtc->di_clkflags = 0;
 404                 break;
 405         }
 406
 407         return 0;
 408 }
 409
 410 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
 411         .enable_vblank = ipu_enable_vblank,
 412         .disable_vblank = ipu_disable_vblank,
 413         .set_interface_pix_fmt = ipu_set_interface_pix_fmt,
 414         .crtc_funcs = &ipu_crtc_funcs,
 415         .crtc_helper_funcs = &ipu_helper_funcs,
 416 };
 417
 418 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
 419 {
 420         if (!IS_ERR_OR_NULL(ipu_crtc->ipu_ch))
 421                 ipu_idmac_put(ipu_crtc->ipu_ch);
 422         if (!IS_ERR_OR_NULL(ipu_crtc->dmfc))
 423                 ipu_dmfc_put(ipu_crtc->dmfc);
 424         if (!IS_ERR_OR_NULL(ipu_crtc->dp))
 425                 ipu_dp_put(ipu_crtc->dp);
 426         if (!IS_ERR_OR_NULL(ipu_crtc->di))
 427                 ipu_di_put(ipu_crtc->di);
 428 }
 429
 430 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
 431                 struct ipu_client_platformdata *pdata)
 432 {
 433         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 434         int ret;
 435
 436         ipu_crtc->ipu_ch = ipu_idmac_get(ipu, pdata->dma[0]);
 437         if (IS_ERR(ipu_crtc->ipu_ch)) {
 438                 ret = PTR_ERR(ipu_crtc->ipu_ch);
 439                 goto err_out;
 440         }
 441
 442         ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
 443         if (IS_ERR(ipu_crtc->dc)) {
 444                 ret = PTR_ERR(ipu_crtc->dc);
 445                 goto err_out;
 446         }
 447
 448         ipu_crtc->dmfc = ipu_dmfc_get(ipu, pdata->dma[0]);
 449         if (IS_ERR(ipu_crtc->dmfc)) {
 450                 ret = PTR_ERR(ipu_crtc->dmfc);
 451                 goto err_out;
 452         }
 453
 454         if (pdata->dp >= 0) {
 455                 ipu_crtc->dp = ipu_dp_get(ipu, pdata->dp);
 456                 if (IS_ERR(ipu_crtc->dp)) {
 457                         ret = PTR_ERR(ipu_crtc->dp);
 458                         goto err_out;
 459                 }
 460         }
 461
 462         ipu_crtc->di = ipu_di_get(ipu, pdata->di);
 463         if (IS_ERR(ipu_crtc->di)) {
 464                 ret = PTR_ERR(ipu_crtc->di);
 465                 goto err_out;
 466         }
 467
 468         return 0;
 469 err_out:
 470         ipu_put_resources(ipu_crtc);
 471
 472         return ret;
 473 }
 474
 475 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
 476                 struct ipu_client_platformdata *pdata)
 477 {
 478         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 479         int ret;
 480
 481         ret = ipu_get_resources(ipu_crtc, pdata);
 482         if (ret) {
 483                 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
 484                                 ret);
 485                 return ret;
 486         }
 487
 488         ret = imx_drm_add_crtc(&ipu_crtc->base,
 489                         &ipu_crtc->imx_crtc,
 490                         &ipu_crtc_helper_funcs, THIS_MODULE,
 491                         ipu_crtc->dev->parent->of_node, pdata->di);
 492         if (ret) {
 493                 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
 494                 goto err_put_resources;
 495         }
 496
 497         ipu_crtc->irq = ipu_idmac_channel_irq(ipu, ipu_crtc->ipu_ch,
 498                         IPU_IRQ_EOF);
 499         ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
 500                         "imx_drm", ipu_crtc);
 501         if (ret < 0) {
 502                 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
 503                 goto err_put_resources;
 504         }
 505
 506         disable_irq(ipu_crtc->irq);
 507
 508         return 0;
 509
 510 err_put_resources:
 511         ipu_put_resources(ipu_crtc);
 512
 513         return ret;
 514 }
 515
 516 static int ipu_drm_probe(struct platform_device *pdev)
 517 {
 518         struct ipu_client_platformdata *pdata = pdev->dev.platform_data;
 519         struct ipu_crtc *ipu_crtc;
 520         int ret;
 521
 522         if (!pdata)
 523                 return -EINVAL;
 524
 525         pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
 526
 527         ipu_crtc = devm_kzalloc(&pdev->dev, sizeof(*ipu_crtc), GFP_KERNEL);
 528         if (!ipu_crtc)
 529                 return -ENOMEM;
 530
 531         ipu_crtc->dev = &pdev->dev;
 532
 533         ret = ipu_crtc_init(ipu_crtc, pdata);
 534         if (ret)
 535                 return ret;
 536
 537         platform_set_drvdata(pdev, ipu_crtc);
 538
 539         return 0;
 540 }
 541
 542 static int ipu_drm_remove(struct platform_device *pdev)
 543 {
 544         struct ipu_crtc *ipu_crtc = platform_get_drvdata(pdev);
 545
 546         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
 547
 548         ipu_put_resources(ipu_crtc);
 549
 550         return 0;
 551 }
 552
 553 static struct platform_driver ipu_drm_driver = {
 554         .driver = {
 555                 .name = "imx-ipuv3-crtc",
 556         },
 557         .probe = ipu_drm_probe,
 558         .remove = ipu_drm_remove,
 559 };
 560 module_platform_driver(ipu_drm_driver);
 561
 562 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
 563 MODULE_DESCRIPTION(DRIVER_DESC);
 564 MODULE_LICENSE("GPL");
 565 MODULE_ALIAS("platform:imx-ipuv3-crtc");