2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
37 #include "../rt_config.h"
39 u8 BIT8[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
41 { "none", "wep64", "wep128", "TKIP", "AES", "CKIP64", "CKIP128" };
44 /* BBP register initialization set */
46 struct rt_reg_pair BBPRegTable[] = {
47 {BBP_R65, 0x2C}, /* fix rssi issue */
48 {BBP_R66, 0x38}, /* Also set this default value to pAd->BbpTuning.R66CurrentValue at initial */
50 {BBP_R70, 0xa}, /* BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa */
55 {BBP_R84, 0x99}, /* 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before */
56 {BBP_R86, 0x00}, /* middle range issue, Rory @2008-01-28 */
57 {BBP_R91, 0x04}, /* middle range issue, Rory @2008-01-28 */
58 {BBP_R92, 0x00}, /* middle range issue, Rory @2008-01-28 */
59 {BBP_R103, 0x00}, /* near range high-power issue, requested from Gary @2008-0528 */
60 {BBP_R105, 0x05}, /* 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before. */
61 {BBP_R106, 0x35}, /* for ShortGI throughput */
64 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(struct rt_reg_pair))
67 /* ASIC register initialization sets */
70 struct rt_rtmp_reg_pair MACRegTable[] = {
71 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
72 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
73 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
74 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
75 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
76 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
78 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!
79 #endif /* HW_BEACON_OFFSET // */
81 {LEGACY_BASIC_RATE, 0x0000013f}, /* Basic rate set bitmap */
82 {HT_BASIC_RATE, 0x00008003}, /* Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI. */
83 {MAC_SYS_CTRL, 0x00}, /* 0x1004, , default Disable RX */
84 {RX_FILTR_CFG, 0x17f97}, /*0x1400 , RX filter control, */
85 {BKOFF_SLOT_CFG, 0x209}, /* default set short slot time, CC_DELAY_TIME should be 2 */
86 /*{TX_SW_CFG0, 0x40a06}, // Gary,2006-08-23 */
87 {TX_SW_CFG0, 0x0}, /* Gary,2008-05-21 for CWC test */
88 {TX_SW_CFG1, 0x80606}, /* Gary,2006-08-23 */
89 {TX_LINK_CFG, 0x1020}, /* Gary,2006-08-23 */
90 /*{TX_TIMEOUT_CFG, 0x00182090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT */
91 {TX_TIMEOUT_CFG, 0x000a2090}, /* CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01 */
92 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, /* 0x3018, MAX frame length. Max PSDU = 16kbytes. */
93 {LED_CFG, 0x7f031e46}, /* Gary, 2006-08-23 */
95 {PBF_MAX_PCNT, 0x1F3FBF9F}, /*0x1F3f7f9f}, //Jan, 2006/04/20 */
97 {TX_RTY_CFG, 0x47d01f0f}, /* Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03 */
99 {AUTO_RSP_CFG, 0x00000013}, /* Initial Auto_Responder, because QA will turn off Auto-Responder */
100 {CCK_PROT_CFG, 0x05740003 /*0x01740003 */ }, /* Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled. */
101 {OFDM_PROT_CFG, 0x05740003 /*0x01740003 */ }, /* Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled. */
103 {PBF_CFG, 0xf40006}, /* Only enable Queue 2 */
104 {MM40_PROT_CFG, 0x3F44084}, /* Initial Auto_Responder, because QA will turn off Auto-Responder */
105 {WPDMA_GLO_CFG, 0x00000030},
106 #endif /* RTMP_MAC_USB // */
107 {GF20_PROT_CFG, 0x01744004}, /* set 19:18 --> Short NAV for MIMO PS */
108 {GF40_PROT_CFG, 0x03F44084},
109 {MM20_PROT_CFG, 0x01744004},
111 {MM40_PROT_CFG, 0x03F54084},
112 #endif /* RTMP_MAC_PCI // */
113 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f *//*0x000024bf */ }, /*Extension channel backoff. */
114 {TX_RTS_CFG, 0x00092b20},
115 {EXP_ACK_TIME, 0x002400ca}, /* default value */
117 {TXOP_HLDR_ET, 0x00000002},
119 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
120 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
121 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
122 will always lost. So we change the SIFS of CCK from 10us to 16us. */
123 {XIFS_TIME_CFG, 0x33a41010},
124 {PWR_PIN_CFG, 0x00000003}, /* patch for 2880-E */
127 struct rt_rtmp_reg_pair STAMACRegTable[] = {
128 {WMM_AIFSN_CFG, 0x00002273},
129 {WMM_CWMIN_CFG, 0x00002344},
130 {WMM_CWMAX_CFG, 0x000034aa},
133 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(struct rt_rtmp_reg_pair))
134 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(struct rt_rtmp_reg_pair))
137 ========================================================================
140 Allocate struct rt_rtmp_adapter data block and do some initialization
143 Adapter Pointer to our adapter
153 ========================================================================
155 int RTMPAllocAdapterBlock(void *handle,
156 struct rt_rtmp_adapter * * ppAdapter)
158 struct rt_rtmp_adapter *pAd;
161 u8 *pBeaconBuf = NULL;
163 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
168 /* Allocate struct rt_rtmp_adapter memory block */
169 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
170 if (pBeaconBuf == NULL) {
171 Status = NDIS_STATUS_FAILURE;
172 DBGPRINT_ERR("Failed to allocate memory - BeaconBuf!\n");
175 NdisZeroMemory(pBeaconBuf, MAX_BEACON_SIZE);
177 Status = AdapterBlockAllocateMemory(handle, (void **) & pAd);
178 if (Status != NDIS_STATUS_SUCCESS) {
179 DBGPRINT_ERR("Failed to allocate memory - ADAPTER\n");
182 pAd->BeaconBuf = pBeaconBuf;
183 DBGPRINT(RT_DEBUG_OFF,
184 ("=== pAd = %p, size = %d ===\n", pAd,
185 (u32)sizeof(struct rt_rtmp_adapter)));
187 /* Init spin locks */
188 NdisAllocateSpinLock(&pAd->MgmtRingLock);
190 NdisAllocateSpinLock(&pAd->RxRingLock);
192 NdisAllocateSpinLock(&pAd->McuCmdLock);
193 #endif /* RT3090 // */
194 #endif /* RTMP_MAC_PCI // */
196 for (index = 0; index < NUM_OF_TX_RING; index++) {
197 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
198 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
199 pAd->DeQueueRunning[index] = FALSE;
202 NdisAllocateSpinLock(&pAd->irq_lock);
206 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
211 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
216 ========================================================================
219 Read initial Tx power per MCS and BW from EEPROM
222 Adapter Pointer to our adapter
231 ========================================================================
233 void RTMPReadTxPwrPerRate(struct rt_rtmp_adapter *pAd)
235 unsigned long data, Adata, Gdata;
236 u16 i, value, value2;
237 int Apwrdelta, Gpwrdelta;
239 BOOLEAN bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
242 /* Get power delta for 20MHz and 40MHz. */
244 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
245 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
249 if ((value2 & 0xff) != 0xff) {
251 Gpwrdelta = (value2 & 0xf);
254 bGpwrdeltaMinus = FALSE;
256 bGpwrdeltaMinus = TRUE;
258 if ((value2 & 0xff00) != 0xff00) {
259 if ((value2 & 0x8000))
260 Apwrdelta = ((value2 & 0xf00) >> 8);
262 if ((value2 & 0x4000))
263 bApwrdeltaMinus = FALSE;
265 bApwrdeltaMinus = TRUE;
267 DBGPRINT(RT_DEBUG_TRACE,
268 ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
271 /* Get Txpower per MCS for 20MHz in 2.4G. */
273 for (i = 0; i < 5; i++) {
274 RT28xx_EEPROM_READ16(pAd,
275 EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i * 4,
278 if (bApwrdeltaMinus == FALSE) {
279 t1 = (value & 0xf) + (Apwrdelta);
282 t2 = ((value & 0xf0) >> 4) + (Apwrdelta);
285 t3 = ((value & 0xf00) >> 8) + (Apwrdelta);
288 t4 = ((value & 0xf000) >> 12) + (Apwrdelta);
292 if ((value & 0xf) > Apwrdelta)
293 t1 = (value & 0xf) - (Apwrdelta);
296 if (((value & 0xf0) >> 4) > Apwrdelta)
297 t2 = ((value & 0xf0) >> 4) - (Apwrdelta);
300 if (((value & 0xf00) >> 8) > Apwrdelta)
301 t3 = ((value & 0xf00) >> 8) - (Apwrdelta);
304 if (((value & 0xf000) >> 12) > Apwrdelta)
305 t4 = ((value & 0xf000) >> 12) - (Apwrdelta);
309 Adata = t1 + (t2 << 4) + (t3 << 8) + (t4 << 12);
310 if (bGpwrdeltaMinus == FALSE) {
311 t1 = (value & 0xf) + (Gpwrdelta);
314 t2 = ((value & 0xf0) >> 4) + (Gpwrdelta);
317 t3 = ((value & 0xf00) >> 8) + (Gpwrdelta);
320 t4 = ((value & 0xf000) >> 12) + (Gpwrdelta);
324 if ((value & 0xf) > Gpwrdelta)
325 t1 = (value & 0xf) - (Gpwrdelta);
328 if (((value & 0xf0) >> 4) > Gpwrdelta)
329 t2 = ((value & 0xf0) >> 4) - (Gpwrdelta);
332 if (((value & 0xf00) >> 8) > Gpwrdelta)
333 t3 = ((value & 0xf00) >> 8) - (Gpwrdelta);
336 if (((value & 0xf000) >> 12) > Gpwrdelta)
337 t4 = ((value & 0xf000) >> 12) - (Gpwrdelta);
341 Gdata = t1 + (t2 << 4) + (t3 << 8) + (t4 << 12);
343 RT28xx_EEPROM_READ16(pAd,
344 EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i * 4 +
346 if (bApwrdeltaMinus == FALSE) {
347 t1 = (value & 0xf) + (Apwrdelta);
350 t2 = ((value & 0xf0) >> 4) + (Apwrdelta);
353 t3 = ((value & 0xf00) >> 8) + (Apwrdelta);
356 t4 = ((value & 0xf000) >> 12) + (Apwrdelta);
360 if ((value & 0xf) > Apwrdelta)
361 t1 = (value & 0xf) - (Apwrdelta);
364 if (((value & 0xf0) >> 4) > Apwrdelta)
365 t2 = ((value & 0xf0) >> 4) - (Apwrdelta);
368 if (((value & 0xf00) >> 8) > Apwrdelta)
369 t3 = ((value & 0xf00) >> 8) - (Apwrdelta);
372 if (((value & 0xf000) >> 12) > Apwrdelta)
373 t4 = ((value & 0xf000) >> 12) - (Apwrdelta);
377 Adata |= ((t1 << 16) + (t2 << 20) + (t3 << 24) + (t4 << 28));
378 if (bGpwrdeltaMinus == FALSE) {
379 t1 = (value & 0xf) + (Gpwrdelta);
382 t2 = ((value & 0xf0) >> 4) + (Gpwrdelta);
385 t3 = ((value & 0xf00) >> 8) + (Gpwrdelta);
388 t4 = ((value & 0xf000) >> 12) + (Gpwrdelta);
392 if ((value & 0xf) > Gpwrdelta)
393 t1 = (value & 0xf) - (Gpwrdelta);
396 if (((value & 0xf0) >> 4) > Gpwrdelta)
397 t2 = ((value & 0xf0) >> 4) - (Gpwrdelta);
400 if (((value & 0xf00) >> 8) > Gpwrdelta)
401 t3 = ((value & 0xf00) >> 8) - (Gpwrdelta);
404 if (((value & 0xf000) >> 12) > Gpwrdelta)
405 t4 = ((value & 0xf000) >> 12) - (Gpwrdelta);
409 Gdata |= ((t1 << 16) + (t2 << 20) + (t3 << 24) + (t4 << 28));
410 data |= (value << 16);
412 /* For 20M/40M Power Delta issue */
413 pAd->Tx20MPwrCfgABand[i] = data;
414 pAd->Tx20MPwrCfgGBand[i] = data;
415 pAd->Tx40MPwrCfgABand[i] = Adata;
416 pAd->Tx40MPwrCfgGBand[i] = Gdata;
418 if (data != 0xffffffff)
419 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i * 4, data);
420 DBGPRINT_RAW(RT_DEBUG_TRACE,
421 ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n",
422 data, Adata, Gdata));
427 ========================================================================
430 Read initial channel power parameters from EEPROM
433 Adapter Pointer to our adapter
442 ========================================================================
444 void RTMPReadChannelPwr(struct rt_rtmp_adapter *pAd)
447 EEPROM_TX_PWR_STRUC Power;
448 EEPROM_TX_PWR_STRUC Power2;
450 /* Read Tx power value for all channels */
451 /* Value from 1 - 0x7f. Default value is 24. */
452 /* Power value : 2.4G 0x00 (0) ~ 0x1F (31) */
453 /* : 5.5G 0xF9 (-7) ~ 0x0F (15) */
455 /* 0. 11b/g, ch1 - ch 14 */
456 for (i = 0; i < 7; i++) {
457 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2,
459 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2,
461 pAd->TxPower[i * 2].Channel = i * 2 + 1;
462 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
464 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
465 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
467 pAd->TxPower[i * 2].Power = Power.field.Byte0;
469 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
470 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
472 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
474 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
475 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
477 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
479 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
480 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
482 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
485 /* 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz) */
486 /* 1.1 Fill up channel */
488 for (i = 0; i < 4; i++) {
489 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
490 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
491 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
493 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
494 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
495 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
497 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
498 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
499 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
502 /* 1.2 Fill up power */
503 for (i = 0; i < 6; i++) {
504 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2,
506 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2,
509 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
510 pAd->TxPower[i * 2 + choffset + 0].Power =
513 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
514 pAd->TxPower[i * 2 + choffset + 1].Power =
517 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
518 pAd->TxPower[i * 2 + choffset + 0].Power2 =
521 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
522 pAd->TxPower[i * 2 + choffset + 1].Power2 =
526 /* 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz) */
527 /* 2.1 Fill up channel */
529 for (i = 0; i < 5; i++) {
530 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
531 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
532 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
534 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
535 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
536 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
538 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
539 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
540 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
542 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
543 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
544 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
546 /* 2.2 Fill up power */
547 for (i = 0; i < 8; i++) {
548 RT28xx_EEPROM_READ16(pAd,
549 EEPROM_A_TX_PWR_OFFSET + (choffset - 14) +
551 RT28xx_EEPROM_READ16(pAd,
552 EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) +
555 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
556 pAd->TxPower[i * 2 + choffset + 0].Power =
559 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
560 pAd->TxPower[i * 2 + choffset + 1].Power =
563 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
564 pAd->TxPower[i * 2 + choffset + 0].Power2 =
567 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
568 pAd->TxPower[i * 2 + choffset + 1].Power2 =
572 /* 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165, 167, 169; 171, 173 (including central frequency in BW 40MHz) */
573 /* 3.1 Fill up channel */
574 choffset = 14 + 12 + 16;
575 /*for (i = 0; i < 2; i++) */
576 for (i = 0; i < 3; i++) {
577 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
578 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
579 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
581 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
582 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
583 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
585 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
586 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
587 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
589 pAd->TxPower[3 * 3 + choffset + 0].Channel = 171;
590 pAd->TxPower[3 * 3 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
591 pAd->TxPower[3 * 3 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
593 pAd->TxPower[3 * 3 + choffset + 1].Channel = 173;
594 pAd->TxPower[3 * 3 + choffset + 1].Power = DEFAULT_RF_TX_POWER;
595 pAd->TxPower[3 * 3 + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
597 /* 3.2 Fill up power */
598 /*for (i = 0; i < 4; i++) */
599 for (i = 0; i < 6; i++) {
600 RT28xx_EEPROM_READ16(pAd,
601 EEPROM_A_TX_PWR_OFFSET + (choffset - 14) +
603 RT28xx_EEPROM_READ16(pAd,
604 EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) +
607 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
608 pAd->TxPower[i * 2 + choffset + 0].Power =
611 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
612 pAd->TxPower[i * 2 + choffset + 1].Power =
615 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
616 pAd->TxPower[i * 2 + choffset + 0].Power2 =
619 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
620 pAd->TxPower[i * 2 + choffset + 1].Power2 =
624 /* 4. Print and Debug */
625 /*choffset = 14 + 12 + 16 + 7; */
626 choffset = 14 + 12 + 16 + 11;
631 ========================================================================
634 Read the following from the registry
635 1. All the parameters
639 Adapter Pointer to our adapter
640 WrapperConfigurationContext For use by NdisOpenConfiguration
645 NDIS_STATUS_RESOURCES
651 ========================================================================
653 int NICReadRegParameters(struct rt_rtmp_adapter *pAd,
654 void *WrapperConfigurationContext)
656 int Status = NDIS_STATUS_SUCCESS;
657 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
662 ========================================================================
665 Read initial parameters from EEPROM
668 Adapter Pointer to our adapter
677 ========================================================================
679 void NICReadEEPROMParameters(struct rt_rtmp_adapter *pAd, u8 *mac_addr)
682 u16 i, value, value2;
684 EEPROM_TX_PWR_STRUC Power;
685 EEPROM_VERSION_STRUC Version;
686 EEPROM_ANTENNA_STRUC Antenna;
687 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
689 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
691 if (pAd->chipOps.eeinit)
692 pAd->chipOps.eeinit(pAd);
694 /* Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8 */
695 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
696 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
698 if ((data & 0x30) == 0)
699 pAd->EEPROMAddressNum = 6; /* 93C46 */
700 else if ((data & 0x30) == 0x10)
701 pAd->EEPROMAddressNum = 8; /* 93C66 */
703 pAd->EEPROMAddressNum = 8; /* 93C86 */
704 DBGPRINT(RT_DEBUG_TRACE,
705 ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum));
707 /* RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to initialize */
708 /* MAC address registers according to E2PROM setting */
709 if (mac_addr == NULL ||
710 strlen((char *)mac_addr) != 17 ||
711 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
712 mac_addr[11] != ':' || mac_addr[14] != ':') {
713 u16 Addr01, Addr23, Addr45;
715 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
716 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
717 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
719 pAd->PermanentAddress[0] = (u8)(Addr01 & 0xff);
720 pAd->PermanentAddress[1] = (u8)(Addr01 >> 8);
721 pAd->PermanentAddress[2] = (u8)(Addr23 & 0xff);
722 pAd->PermanentAddress[3] = (u8)(Addr23 >> 8);
723 pAd->PermanentAddress[4] = (u8)(Addr45 & 0xff);
724 pAd->PermanentAddress[5] = (u8)(Addr45 >> 8);
726 DBGPRINT(RT_DEBUG_TRACE,
727 ("Initialize MAC Address from E2PROM \n"));
732 macptr = (char *)mac_addr;
734 for (j = 0; j < MAC_ADDR_LEN; j++) {
735 AtoH(macptr, &pAd->PermanentAddress[j], 1);
739 DBGPRINT(RT_DEBUG_TRACE,
740 ("Initialize MAC Address from module parameter \n"));
744 /*more conveninet to test mbssid, so ap's bssid &0xf1 */
745 if (pAd->PermanentAddress[0] == 0xff)
746 pAd->PermanentAddress[0] = RandomByte(pAd) & 0xf8;
748 /*if (pAd->PermanentAddress[5] == 0xff) */
749 /* pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8; */
751 DBGPRINT_RAW(RT_DEBUG_TRACE,
752 ("E2PROM MAC: =%pM\n", pAd->PermanentAddress));
753 if (pAd->bLocalAdminMAC == FALSE) {
756 COPY_MAC_ADDR(pAd->CurrentAddress,
757 pAd->PermanentAddress);
758 csr2.field.Byte0 = pAd->CurrentAddress[0];
759 csr2.field.Byte1 = pAd->CurrentAddress[1];
760 csr2.field.Byte2 = pAd->CurrentAddress[2];
761 csr2.field.Byte3 = pAd->CurrentAddress[3];
762 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
764 csr3.field.Byte4 = pAd->CurrentAddress[4];
765 csr3.field.Byte5 = pAd->CurrentAddress[5];
766 csr3.field.U2MeMask = 0xff;
767 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
768 DBGPRINT_RAW(RT_DEBUG_TRACE,
769 ("E2PROM MAC: =%pM\n",
770 pAd->PermanentAddress));
774 /* if not return early. cause fail at emulation. */
775 /* Init the channel number for TX channel power */
776 RTMPReadChannelPwr(pAd);
778 /* if E2PROM version mismatch with driver's expectation, then skip */
779 /* all subsequent E2RPOM retieval and set a system error bit to notify GUI */
780 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
782 Version.field.Version + Version.field.FaeReleaseNumber * 256;
783 DBGPRINT(RT_DEBUG_TRACE,
784 ("E2PROM: Version = %d, FAE release #%d\n",
785 Version.field.Version, Version.field.FaeReleaseNumber));
787 if (Version.field.Version > VALID_EEPROM_VERSION) {
788 DBGPRINT_ERR("E2PROM: WRONG VERSION 0x%x, should be %d\n", Version.field.Version, VALID_EEPROM_VERSION);
789 /*pAd->SystemErrorBitmap |= 0x00000001;
791 // hard-code default value when no proper E2PROM installed
792 pAd->bAutoTxAgcA = FALSE;
793 pAd->bAutoTxAgcG = FALSE;
795 // Default the channel power
796 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
797 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
799 // Default the channel power
800 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
801 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
803 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
804 pAd->EEPROMDefaultValue[i] = 0xffff;
807 /* Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd */
808 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
809 pAd->EEPROMDefaultValue[0] = value;
811 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
812 pAd->EEPROMDefaultValue[1] = value;
814 RT28xx_EEPROM_READ16(pAd, 0x38, value); /* Country Region */
815 pAd->EEPROMDefaultValue[2] = value;
817 for (i = 0; i < 8; i++) {
818 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i * 2,
820 pAd->EEPROMDefaultValue[i + 3] = value;
823 /* We have to parse NIC configuration 0 at here. */
824 /* If TSSI did not have preloaded value, it should reset the TxAutoAgc to false */
825 /* Therefore, we have to read TxAutoAgc control beforehand. */
826 /* Read Tx AGC control bit */
827 Antenna.word = pAd->EEPROMDefaultValue[0];
828 if (Antenna.word == 0xFFFF) {
830 if (IS_RT3090(pAd) || IS_RT3390(pAd)) {
832 Antenna.field.RfIcType = RFIC_3020;
833 Antenna.field.TxPath = 1;
834 Antenna.field.RxPath = 1;
836 #endif /* RT30xx // */
840 Antenna.field.RfIcType = RFIC_2820;
841 Antenna.field.TxPath = 1;
842 Antenna.field.RxPath = 2;
843 DBGPRINT(RT_DEBUG_WARN,
844 ("E2PROM error, hard code as 0x%04x\n",
848 /* Choose the desired Tx&Rx stream. */
849 if ((pAd->CommonCfg.TxStream == 0)
850 || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
851 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
853 if ((pAd->CommonCfg.RxStream == 0)
854 || (pAd->CommonCfg.RxStream > Antenna.field.RxPath)) {
855 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
857 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
858 (pAd->CommonCfg.RxStream > 2)) {
859 /* only 2 Rx streams for RT2860 series */
860 pAd->CommonCfg.RxStream = 2;
864 /* read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2 */
866 for (i = 0; i < 3; i++) {
869 NicConfig2.word = pAd->EEPROMDefaultValue[1];
872 if ((NicConfig2.word & 0x00ff) == 0xff) {
873 NicConfig2.word &= 0xff00;
876 if ((NicConfig2.word >> 8) == 0xff) {
877 NicConfig2.word &= 0x00ff;
881 if (NicConfig2.field.DynamicTxAgcControl == 1)
882 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
884 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
886 DBGPRINT_RAW(RT_DEBUG_TRACE,
887 ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n",
888 Antenna.field.RxPath, Antenna.field.TxPath));
890 /* Save the antenna for future use */
891 pAd->Antenna.word = Antenna.word;
893 /* Set the RfICType here, then we can initialize RFIC related operation callbacks */
894 pAd->Mlme.RealRxPath = (u8)Antenna.field.RxPath;
895 pAd->RfIcType = (u8)Antenna.field.RfIcType;
897 #ifdef RTMP_RF_RW_SUPPORT
898 RtmpChipOpsRFHook(pAd);
899 #endif /* RTMP_RF_RW_SUPPORT // */
902 sprintf((char *)pAd->nickname, "RT2860STA");
903 #endif /* RTMP_MAC_PCI // */
906 /* Reset PhyMode if we don't support 802.11a */
907 /* Only RFIC_2850 & RFIC_2750 support 802.11a */
909 if ((Antenna.field.RfIcType != RFIC_2850)
910 && (Antenna.field.RfIcType != RFIC_2750)
911 && (Antenna.field.RfIcType != RFIC_3052)) {
912 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
913 (pAd->CommonCfg.PhyMode == PHY_11A))
914 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
915 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
916 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
917 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
918 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
919 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
921 /* Read TSSI reference and TSSI boundary for temperature compensation. This is ugly */
924 /* these are tempature reference value (0x00 ~ 0xFE)
925 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
926 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
927 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
928 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
929 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
930 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
931 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
932 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
933 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
934 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
935 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
936 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
937 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
938 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
939 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
940 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
941 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
942 pAd->TxAgcStepG = Power.field.Byte1;
943 pAd->TxAgcCompensateG = 0;
944 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
945 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
947 /* Disable TxAgc if the based value is not right */
948 if (pAd->TssiRefG == 0xff)
949 pAd->bAutoTxAgcG = FALSE;
951 DBGPRINT(RT_DEBUG_TRACE,
952 ("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
953 pAd->TssiMinusBoundaryG[4],
954 pAd->TssiMinusBoundaryG[3],
955 pAd->TssiMinusBoundaryG[2],
956 pAd->TssiMinusBoundaryG[1], pAd->TssiRefG,
957 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2],
958 pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
959 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
963 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
964 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
965 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
966 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
967 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
968 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
969 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
970 pAd->TssiRefA = Power.field.Byte0;
971 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
972 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
973 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
974 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
975 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
976 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
977 pAd->TxAgcStepA = Power.field.Byte1;
978 pAd->TxAgcCompensateA = 0;
979 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
980 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
982 /* Disable TxAgc if the based value is not right */
983 if (pAd->TssiRefA == 0xff)
984 pAd->bAutoTxAgcA = FALSE;
986 DBGPRINT(RT_DEBUG_TRACE,
987 ("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
988 pAd->TssiMinusBoundaryA[4],
989 pAd->TssiMinusBoundaryA[3],
990 pAd->TssiMinusBoundaryA[2],
991 pAd->TssiMinusBoundaryA[1], pAd->TssiRefA,
992 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2],
993 pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
994 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
996 pAd->BbpRssiToDbmDelta = 0x0;
998 /* Read frequency offset setting for RF */
999 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1000 if ((value & 0x00FF) != 0x00FF)
1001 pAd->RfFreqOffset = (unsigned long)(value & 0x00FF);
1003 pAd->RfFreqOffset = 0;
1004 DBGPRINT(RT_DEBUG_TRACE,
1005 ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1007 /*CountryRegion byte offset (38h) */
1008 value = pAd->EEPROMDefaultValue[2] >> 8; /* 2.4G band */
1009 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; /* 5G band */
1011 if ((value <= REGION_MAXIMUM_BG_BAND)
1012 && (value2 <= REGION_MAXIMUM_A_BAND)) {
1013 pAd->CommonCfg.CountryRegion = ((u8)value) | 0x80;
1014 pAd->CommonCfg.CountryRegionForABand = ((u8)value2) | 0x80;
1015 TmpPhy = pAd->CommonCfg.PhyMode;
1016 pAd->CommonCfg.PhyMode = 0xff;
1017 RTMPSetPhyMode(pAd, TmpPhy);
1021 /* Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch. */
1022 /* The valid value are (-10 ~ 10) */
1024 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1025 pAd->BGRssiOffset0 = value & 0x00ff;
1026 pAd->BGRssiOffset1 = (value >> 8);
1027 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET + 2, value);
1028 pAd->BGRssiOffset2 = value & 0x00ff;
1029 pAd->ALNAGain1 = (value >> 8);
1030 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1031 pAd->BLNAGain = value & 0x00ff;
1032 pAd->ALNAGain0 = (value >> 8);
1034 /* Validate 11b/g RSSI_0 offset. */
1035 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1036 pAd->BGRssiOffset0 = 0;
1038 /* Validate 11b/g RSSI_1 offset. */
1039 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1040 pAd->BGRssiOffset1 = 0;
1042 /* Validate 11b/g RSSI_2 offset. */
1043 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1044 pAd->BGRssiOffset2 = 0;
1046 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1047 pAd->ARssiOffset0 = value & 0x00ff;
1048 pAd->ARssiOffset1 = (value >> 8);
1049 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET + 2), value);
1050 pAd->ARssiOffset2 = value & 0x00ff;
1051 pAd->ALNAGain2 = (value >> 8);
1053 if (((u8)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1054 pAd->ALNAGain1 = pAd->ALNAGain0;
1055 if (((u8)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1056 pAd->ALNAGain2 = pAd->ALNAGain0;
1058 /* Validate 11a RSSI_0 offset. */
1059 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1060 pAd->ARssiOffset0 = 0;
1062 /* Validate 11a RSSI_1 offset. */
1063 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1064 pAd->ARssiOffset1 = 0;
1066 /*Validate 11a RSSI_2 offset. */
1067 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1068 pAd->ARssiOffset2 = 0;
1072 /* Get TX mixer gain setting */
1073 /* 0xff are invalid value */
1074 /* Note: RT30xX default value is 0x00 and will program to RF_R17 only when this value is not zero. */
1075 /* RT359X default value is 0x02 */
1077 if (IS_RT30xx(pAd) || IS_RT3572(pAd)) {
1078 RT28xx_EEPROM_READ16(pAd, EEPROM_TXMIXER_GAIN_2_4G, value);
1079 pAd->TxMixerGain24G = 0;
1081 if (value != 0xff) {
1083 pAd->TxMixerGain24G = (u8)value;
1086 #endif /* RT30xx // */
1089 /* Get LED Setting. */
1091 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1092 pAd->LedCntl.word = (value >> 8);
1093 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1095 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1097 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1100 RTMPReadTxPwrPerRate(pAd);
1103 #ifdef RTMP_EFUSE_SUPPORT
1104 RtmpEfuseSupportCheck(pAd);
1105 #endif /* RTMP_EFUSE_SUPPORT // */
1106 #endif /* RT30xx // */
1108 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1112 ========================================================================
1114 Routine Description:
1115 Set default value from EEPROM
1118 Adapter Pointer to our adapter
1123 IRQL = PASSIVE_LEVEL
1127 ========================================================================
1129 void NICInitAsicFromEEPROM(struct rt_rtmp_adapter *pAd)
1134 /* EEPROM_ANTENNA_STRUC Antenna; */
1135 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1138 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1139 for (i = 3; i < NUM_EEPROM_BBP_PARMS; i++) {
1140 u8 BbpRegIdx, BbpValue;
1142 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF)
1143 && (pAd->EEPROMDefaultValue[i] != 0)) {
1144 BbpRegIdx = (u8)(pAd->EEPROMDefaultValue[i] >> 8);
1145 BbpValue = (u8)(pAd->EEPROMDefaultValue[i] & 0xff);
1146 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1150 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1153 if ((NicConfig2.word & 0x00ff) == 0xff) {
1154 NicConfig2.word &= 0xff00;
1157 if ((NicConfig2.word >> 8) == 0xff) {
1158 NicConfig2.word &= 0x00ff;
1162 /* Save the antenna for future use */
1163 pAd->NicConfig2.word = NicConfig2.word;
1166 /* set default antenna as main */
1167 if (pAd->RfIcType == RFIC_3020)
1168 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1169 #endif /* RT30xx // */
1172 /* Send LED Setting to MCU. */
1174 if (pAd->LedCntl.word == 0xFF) {
1175 pAd->LedCntl.word = 0x01;
1181 #endif /* RTMP_MAC_PCI // */
1184 #endif /* RTMP_MAC_USB // */
1187 AsicSendCommandToMcu(pAd, 0x52, 0xff, (u8)pAd->Led1,
1188 (u8)(pAd->Led1 >> 8));
1189 AsicSendCommandToMcu(pAd, 0x53, 0xff, (u8)pAd->Led2,
1190 (u8)(pAd->Led2 >> 8));
1191 AsicSendCommandToMcu(pAd, 0x54, 0xff, (u8)pAd->Led3,
1192 (u8)(pAd->Led3 >> 8));
1193 AsicSendCommandToMcu(pAd, 0x51, 0xff, 0, pAd->LedCntl.field.Polarity);
1195 pAd->LedIndicatorStrength = 0xFF;
1196 RTMPSetSignalLED(pAd, -100); /* Force signal strength Led to be turned off, before link up */
1199 /* Read Hardware controlled Radio state enable bit */
1200 if (NicConfig2.field.HardwareRadioControl == 1) {
1201 pAd->StaCfg.bHardwareRadio = TRUE;
1203 /* Read GPIO pin2 as Hardware controlled radio state */
1204 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1205 if ((data & 0x04) == 0) {
1206 pAd->StaCfg.bHwRadio = FALSE;
1207 pAd->StaCfg.bRadio = FALSE;
1208 /* RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818); */
1209 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1212 pAd->StaCfg.bHardwareRadio = FALSE;
1214 if (pAd->StaCfg.bRadio == FALSE) {
1215 RTMPSetLED(pAd, LED_RADIO_OFF);
1217 RTMPSetLED(pAd, LED_RADIO_ON);
1220 AsicSendCommandToMcu(pAd, 0x30, PowerRadioOffCID, 0xff,
1222 AsicCheckCommanOk(pAd, PowerRadioOffCID);
1223 #endif /* RT3090 // */
1225 AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1226 #endif /* RT3090 // */
1227 AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00,
1229 /* 2-1. wait command ok. */
1230 AsicCheckCommanOk(pAd, PowerWakeCID);
1231 #endif /* RTMP_MAC_PCI // */
1237 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) {
1238 struct rt_rtmp_chip_op *pChipOps = &pAd->chipOps;
1239 if (pChipOps->AsicReverseRfFromSleepMode)
1240 pChipOps->AsicReverseRfFromSleepMode(pAd);
1242 /* 3090 MCU Wakeup command needs more time to be stable. */
1243 /* Before stable, don't issue other MCU command to prevent from firmware error. */
1245 if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1246 && IS_VERSION_AFTER_F(pAd)
1247 && (pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3)
1248 && (pAd->StaCfg.PSControl.field.EnableNewPS == TRUE)) {
1249 DBGPRINT(RT_DEBUG_TRACE, ("%s, release Mcu Lock\n", __func__));
1250 RTMP_SEM_LOCK(&pAd->McuCmdLock);
1251 pAd->brt30xxBanMcuCmd = FALSE;
1252 RTMP_SEM_UNLOCK(&pAd->McuCmdLock);
1254 #endif /* RT30xx // */
1255 #endif /* RTMP_MAC_PCI // */
1257 /* Turn off patching for cardbus controller */
1258 if (NicConfig2.field.CardbusAcceleration == 1) {
1259 /* pAd->bTest1 = TRUE; */
1262 if (NicConfig2.field.DynamicTxAgcControl == 1)
1263 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1265 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1267 /* Since BBP has been progamed, to make sure BBP setting will be */
1268 /* upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND! */
1270 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1272 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1274 if (pAd->Antenna.field.RxPath == 3) {
1276 } else if (pAd->Antenna.field.RxPath == 2) {
1278 } else if (pAd->Antenna.field.RxPath == 1) {
1281 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1284 /* Handle the difference when 1T */
1285 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1286 if (pAd->Antenna.field.TxPath == 1) {
1289 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1291 DBGPRINT(RT_DEBUG_TRACE,
1292 ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n",
1293 pAd->CommonCfg.bHardwareRadio,
1294 pAd->CommonCfg.bHardwareRadio));
1299 /* update registers from EEPROM for RT3071 or later(3572/3592). */
1301 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) {
1302 u8 RegIdx, RegValue;
1305 /* after RT3071, write BBP from EEPROM 0xF0 to 0x102 */
1306 for (i = 0xF0; i <= 0x102; i = i + 2) {
1308 RT28xx_EEPROM_READ16(pAd, i, value);
1309 if ((value != 0xFFFF) && (value != 0)) {
1310 RegIdx = (u8)(value >> 8);
1311 RegValue = (u8)(value & 0xff);
1312 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, RegIdx,
1314 DBGPRINT(RT_DEBUG_TRACE,
1315 ("Update BBP Registers from EEPROM(0x%0x), BBP(0x%x) = 0x%x\n",
1316 i, RegIdx, RegValue));
1320 /* after RT3071, write RF from EEPROM 0x104 to 0x116 */
1321 for (i = 0x104; i <= 0x116; i = i + 2) {
1323 RT28xx_EEPROM_READ16(pAd, i, value);
1324 if ((value != 0xFFFF) && (value != 0)) {
1325 RegIdx = (u8)(value >> 8);
1326 RegValue = (u8)(value & 0xff);
1327 RT30xxWriteRFRegister(pAd, RegIdx, RegValue);
1328 DBGPRINT(RT_DEBUG_TRACE,
1329 ("Update RF Registers from EEPROM0x%x), BBP(0x%x) = 0x%x\n",
1330 i, RegIdx, RegValue));
1334 #endif /* RT30xx // */
1335 #endif /* RTMP_MAC_USB // */
1337 DBGPRINT(RT_DEBUG_TRACE,
1338 ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n",
1339 pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath,
1340 pAd->RfIcType, pAd->LedCntl.word));
1341 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1345 ========================================================================
1347 Routine Description:
1348 Initialize NIC hardware
1351 Adapter Pointer to our adapter
1356 IRQL = PASSIVE_LEVEL
1360 ========================================================================
1362 int NICInitializeAdapter(struct rt_rtmp_adapter *pAd, IN BOOLEAN bHardReset)
1364 int Status = NDIS_STATUS_SUCCESS;
1365 WPDMA_GLO_CFG_STRUC GloCfg;
1368 DELAY_INT_CFG_STRUC IntCfg;
1369 #endif /* RTMP_MAC_PCI // */
1370 /* INT_MASK_CSR_STRUC IntMask; */
1371 unsigned long i = 0, j = 0;
1372 AC_TXOP_CSR0_STRUC csr0;
1374 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1376 /* 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits: */
1380 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1381 if ((GloCfg.field.TxDMABusy == 0)
1382 && (GloCfg.field.RxDMABusy == 0))
1385 RTMPusecDelay(1000);
1388 DBGPRINT(RT_DEBUG_TRACE,
1389 ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1390 GloCfg.word &= 0xff0;
1391 GloCfg.field.EnTXWriteBackDDONE = 1;
1392 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1394 /* Record HW Beacon offset */
1395 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1396 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1397 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1398 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1399 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1400 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1401 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1402 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1405 /* write all shared Ring's base address into ASIC */
1408 /* asic simulation sequence put this ahead before loading firmware. */
1409 /* pbf hardware reset */
1411 RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f); /* 0x10000 for reset rx, 0x3f resets all 6 tx rings. */
1412 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1413 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1414 #endif /* RTMP_MAC_PCI // */
1416 /* Initialze ASIC for TX & Rx operation */
1417 if (NICInitializeAsic(pAd, bHardReset) != NDIS_STATUS_SUCCESS) {
1419 NICLoadFirmware(pAd);
1422 return NDIS_STATUS_FAILURE;
1426 /* Write AC_BK base address register */
1428 RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1429 RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1430 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1432 /* Write AC_BE base address register */
1434 RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1435 RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1436 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1438 /* Write AC_VI base address register */
1440 RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1441 RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1442 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1444 /* Write AC_VO base address register */
1446 RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1447 RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1448 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1450 /* Write MGMT_BASE_CSR register */
1451 Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1452 RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1453 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1455 /* Write RX_BASE_CSR register */
1456 Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1457 RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1458 DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1460 /* Init RX Ring index pointer */
1461 pAd->RxRing.RxSwReadIdx = 0;
1462 pAd->RxRing.RxCpuIdx = RX_RING_SIZE - 1;
1463 RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1465 /* Init TX rings index pointer */
1467 for (i = 0; i < NUM_OF_TX_RING; i++) {
1468 pAd->TxRing[i].TxSwFreeIdx = 0;
1469 pAd->TxRing[i].TxCpuIdx = 0;
1470 RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10),
1471 pAd->TxRing[i].TxCpuIdx);
1475 /* init MGMT ring index pointer */
1476 pAd->MgmtRing.TxSwFreeIdx = 0;
1477 pAd->MgmtRing.TxCpuIdx = 0;
1478 RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX, pAd->MgmtRing.TxCpuIdx);
1481 /* set each Ring's SIZE into ASIC. Descriptor Size is fixed by design. */
1484 /* Write TX_RING_CSR0 register */
1485 Value = TX_RING_SIZE;
1486 RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1487 RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1488 RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1489 RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1490 RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1491 Value = MGMT_RING_SIZE;
1492 RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1494 /* Write RX_RING_CSR register */
1495 Value = RX_RING_SIZE;
1496 RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1497 #endif /* RTMP_MAC_PCI // */
1501 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1502 if (pAd->CommonCfg.PhyMode == PHY_11B) {
1503 csr0.field.Ac0Txop = 192; /* AC_VI: 192*32us ~= 6ms */
1504 csr0.field.Ac1Txop = 96; /* AC_VO: 96*32us ~= 3ms */
1506 csr0.field.Ac0Txop = 96; /* AC_VI: 96*32us ~= 3ms */
1507 csr0.field.Ac1Txop = 48; /* AC_VO: 48*32us ~= 1.5ms */
1509 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1512 /* 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits: */
1515 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1516 if ((GloCfg.field.TxDMABusy == 0)
1517 && (GloCfg.field.RxDMABusy == 0))
1520 RTMPusecDelay(1000);
1524 GloCfg.word &= 0xff0;
1525 GloCfg.field.EnTXWriteBackDDONE = 1;
1526 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1529 RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1530 #endif /* RTMP_MAC_PCI // */
1534 /* Status = NICLoadFirmware(pAd); */
1536 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1541 ========================================================================
1543 Routine Description:
1547 Adapter Pointer to our adapter
1552 IRQL = PASSIVE_LEVEL
1556 ========================================================================
1558 int NICInitializeAsic(struct rt_rtmp_adapter *pAd, IN BOOLEAN bHardReset)
1560 unsigned long Index = 0;
1562 u32 MacCsr12 = 0, Counter = 0;
1567 #endif /* RTMP_MAC_USB // */
1571 #endif /* RT30xx // */
1575 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1578 RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x3); /* To fix driver disable/enable hang issue when radio off */
1579 if (bHardReset == TRUE) {
1580 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1582 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1584 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1585 /* Initialize MAC register to default value */
1586 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++) {
1587 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register,
1588 MACRegTable[Index].Value);
1592 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++) {
1593 RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register,
1594 STAMACRegTable[Index].Value);
1597 #endif /* RTMP_MAC_PCI // */
1600 /* Make sure MAC gets ready after NICLoadFirmware(). */
1604 /*To avoid hang-on issue when interface up in kernel 2.4, */
1605 /*we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly. */
1607 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
1609 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
1613 } while (Index++ < 100);
1615 pAd->MACVersion = MacCsr0;
1616 DBGPRINT(RT_DEBUG_TRACE,
1617 ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
1618 /* turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue. */
1619 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
1620 MacCsr12 &= (~0x2000);
1621 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
1623 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1624 RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
1625 Status = RTUSBVenderReset(pAd);
1627 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1629 /* Initialize MAC register to default value */
1630 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++) {
1632 if ((MACRegTable[Index].Register == TX_SW_CFG0)
1633 && (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd)
1634 || IS_RT3090(pAd) || IS_RT3390(pAd))) {
1635 MACRegTable[Index].Value = 0x00000400;
1637 #endif /* RT30xx // */
1638 RTMP_IO_WRITE32(pAd, (u16)MACRegTable[Index].Register,
1639 MACRegTable[Index].Value);
1643 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++) {
1644 RTMP_IO_WRITE32(pAd,
1645 (u16)STAMACRegTable[Index].Register,
1646 STAMACRegTable[Index].Value);
1649 #endif /* RTMP_MAC_USB // */
1652 /* Initialize RT3070 serial MAC registers which is different from RT2870 serial */
1653 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) {
1654 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1656 /* RT3071 version E has fixed this issue */
1657 if ((pAd->MACVersion & 0xffff) < 0x0211) {
1658 if (pAd->NicConfig2.field.DACTestBit == 1) {
1659 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); /* To fix throughput drop drastically */
1661 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); /* To fix throughput drop drastically */
1664 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
1666 } else if (IS_RT3070(pAd)) {
1667 if (((pAd->MACVersion & 0xffff) < 0x0201)) {
1668 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1669 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); /* To fix throughput drop drastically */
1671 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0);
1674 #endif /* RT30xx // */
1677 /* Before program BBP, we need to wait BBP/RF get wake up. */
1681 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1683 if ((MacCsr12 & 0x03) == 0) /* if BB.RF is stable */
1686 DBGPRINT(RT_DEBUG_TRACE,
1687 ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
1688 RTMPusecDelay(1000);
1689 } while (Index++ < 100);
1691 /* The commands to firmware should be after these commands, these commands will init firmware */
1692 /* PCI and USB are not the same because PCI driver needs to wait for PCI bus ready */
1693 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); /* initialize BBP R/W access agent */
1694 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1696 /*2008/11/28:KH add to fix the dead rf frequency offset bug<-- */
1697 AsicSendCommandToMcu(pAd, 0x72, 0, 0, 0);
1698 /*2008/11/28:KH add to fix the dead rf frequency offset bug--> */
1699 #endif /* RT3090 // */
1700 RTMPusecDelay(1000);
1702 /* Read BBP register, make sure BBP is up and running before write new data */
1705 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1706 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1707 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1708 /*ASSERT(Index < 20); //this will cause BSOD on Check-build driver */
1710 if ((R0 == 0xff) || (R0 == 0x00))
1711 return NDIS_STATUS_FAILURE;
1713 /* Initialize BBP register to default value */
1714 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++) {
1715 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register,
1716 BBPRegTable[Index].Value);
1720 /* TODO: shiang, check MACVersion, currently, rbus-based chip use this. */
1721 if (pAd->MACVersion == 0x28720200) {
1723 unsigned long value2;
1725 /*disable MLD by Bruce 20080704 */
1726 /*BBP_IO_READ8_BY_REG_ID(pAd, BBP_R105, &value); */
1727 /*BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, value | 4); */
1729 /*Maximum PSDU length from 16K to 32K bytes */
1730 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &value2);
1731 value2 &= ~(0x3 << 12);
1732 value2 |= (0x2 << 12);
1733 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, value2);
1735 #endif /* RTMP_MAC_PCI // */
1737 /* for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT. */
1738 /* RT3090 should not program BBP R84 to 0x19, otherwise TX will block. */
1739 /*3070/71/72,3090,3090A( are included in RT30xx),3572,3390 */
1740 if (((pAd->MACVersion & 0xffff) != 0x0101)
1741 && !(IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)))
1742 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1745 /* add by johnli, RF power sequence setup */
1746 if (IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) { /*update for RT3070/71/72/90/91/92,3572,3390. */
1747 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
1748 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
1749 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
1752 if (IS_RT3090(pAd) || IS_RT3390(pAd)) /* RT309x, RT3071/72 */
1754 /* enable DC filter */
1755 if ((pAd->MACVersion & 0xffff) >= 0x0211) {
1756 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1758 /* improve power consumption */
1759 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
1760 if (pAd->Antenna.field.TxPath == 1) {
1761 /* turn off tx DAC_1 */
1762 bbpreg = (bbpreg | 0x20);
1765 if (pAd->Antenna.field.RxPath == 1) {
1766 /* turn off tx ADC_1 */
1769 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
1771 /* improve power consumption in RT3071 Ver.E */
1772 if ((pAd->MACVersion & 0xffff) >= 0x0211) {
1773 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1775 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1777 } else if (IS_RT3070(pAd)) {
1778 if ((pAd->MACVersion & 0xffff) >= 0x0201) {
1779 /* enable DC filter */
1780 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1782 /* improve power consumption in RT3070 Ver.F */
1783 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1785 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1787 /* TX_LO1_en, RF R17 register Bit 3 to 0 */
1788 RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
1790 /* to fix rx long range issue */
1791 if (pAd->NicConfig2.field.ExternalLNAForG == 0) {
1794 /* set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h */
1795 if (pAd->TxMixerGain24G >= 1) {
1796 RFValue &= (~0x7); /* clean bit [2:0] */
1797 RFValue |= pAd->TxMixerGain24G;
1799 RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
1802 #endif /* RT30xx // */
1804 if (pAd->MACVersion == 0x28600100) {
1805 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1806 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1809 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) /* 3*3 */
1811 /* enlarge MAX_LEN_CFG */
1813 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1816 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1821 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0, 0 };
1823 /*Initialize WCID table */
1825 for (Index = 0; Index < 254; Index++) {
1826 RTUSBMultiWrite(pAd,
1827 (u16)(MAC_WCID_BASE + Index * 8),
1831 #endif /* RTMP_MAC_USB // */
1833 /* Add radio off control */
1835 if (pAd->StaCfg.bRadio == FALSE) {
1836 /* RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818); */
1837 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1838 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1842 /* Clear raw counters */
1843 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1844 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1845 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1846 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1847 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1848 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1850 /* ASIC will keep garbage value after boot */
1851 /* Clear all shared key table when initial */
1852 /* This routine can be ignored in radio-ON/OFF operation. */
1854 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++) {
1855 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4 * KeyIdx,
1859 /* Clear all pairwise key table when initial */
1860 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++) {
1861 RTMP_IO_WRITE32(pAd,
1862 MAC_WCID_ATTRIBUTE_BASE +
1863 (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1866 /* assert HOST ready bit */
1867 /* RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark */
1868 /* RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4); */
1870 /* It isn't necessary to clear this space when not hard reset. */
1871 if (bHardReset == TRUE) {
1872 /* clear all on-chip BEACON frame space */
1873 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++) {
1874 for (i = 0; i < HW_BEACON_OFFSET >> 2; i += 4)
1875 RTMP_IO_WRITE32(pAd,
1876 pAd->BeaconOffset[apidx] + i,
1881 AsicDisableSync(pAd);
1882 /* Clear raw counters */
1883 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1884 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1885 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1886 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1887 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1888 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1889 /* Default PCI clock cycle per ms is different as default setting, which is based on PCI. */
1890 RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
1891 Counter &= 0xffffff00;
1892 Counter |= 0x000001e;
1893 RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
1894 #endif /* RTMP_MAC_USB // */
1897 /* for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT. */
1898 if ((pAd->MACVersion & 0xffff) != 0x0101)
1899 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1902 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1903 return NDIS_STATUS_SUCCESS;
1907 ========================================================================
1909 Routine Description:
1913 Adapter Pointer to our adapter
1918 IRQL = PASSIVE_LEVEL
1921 Reset NIC to initial state AS IS system boot up time.
1923 ========================================================================
1925 void NICIssueReset(struct rt_rtmp_adapter *pAd)
1928 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
1930 /* Abort Tx, prevent ASIC from writing to Host memory */
1931 /*RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000); */
1933 /* Disable Rx, register value supposed will remain after reset */
1934 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1935 Value &= (0xfffffff3);
1936 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1938 /* Issue reset and clear from reset state */
1939 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); /* 2004-09-17 change from 0x01 */
1940 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
1942 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
1946 ========================================================================
1948 Routine Description:
1949 Check ASIC registers and find any reason the system might hang
1952 Adapter Pointer to our adapter
1957 IRQL = DISPATCH_LEVEL
1959 ========================================================================
1961 BOOLEAN NICCheckForHang(struct rt_rtmp_adapter *pAd)
1966 void NICUpdateFifoStaCounters(struct rt_rtmp_adapter *pAd)
1968 TX_STA_FIFO_STRUC StaFifo;
1969 struct rt_mac_table_entry *pEntry;
1971 u8 pid = 0, wcid = 0;
1976 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
1978 if (StaFifo.field.bValid == 0)
1981 wcid = (u8)StaFifo.field.wcid;
1983 /* ignore NoACK and MGMT frame use 0xFF as WCID */
1984 if ((StaFifo.field.TxAckRequired == 0)
1985 || (wcid >= MAX_LEN_OF_MAC_TABLE)) {
1990 /* PID store Tx MCS Rate */
1991 pid = (u8)StaFifo.field.PidType;
1993 pEntry = &pAd->MacTab.Content[wcid];
1995 pEntry->DebugFIFOCount++;
1997 if (StaFifo.field.TxBF) /* 3*3 */
1998 pEntry->TxBFCount++;
2000 if (!StaFifo.field.TxSuccess) {
2001 pEntry->FIFOCount++;
2002 pEntry->OneSecTxFailCount++;
2004 if (pEntry->FIFOCount >= 1) {
2005 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2006 pEntry->NoBADataCountDown = 64;
2008 if (pEntry->PsMode == PWR_ACTIVE) {
2010 for (tid = 0; tid < NUM_OF_TID; tid++) {
2011 BAOriSessionTearDown(pAd,
2018 /* Update the continuous transmission counter except PS mode */
2019 pEntry->ContinueTxFailCnt++;
2021 /* Clear the FIFOCount when sta in Power Save mode. Basically we assume */
2022 /* this tx error happened due to sta just go to sleep. */
2023 pEntry->FIFOCount = 0;
2024 pEntry->ContinueTxFailCnt = 0;
2026 /*pEntry->FIFOCount = 0; */
2028 /*pEntry->bSendBAR = TRUE; */
2030 if ((pEntry->PsMode != PWR_SAVE)
2031 && (pEntry->NoBADataCountDown > 0)) {
2032 pEntry->NoBADataCountDown--;
2033 if (pEntry->NoBADataCountDown == 0) {
2034 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2038 pEntry->FIFOCount = 0;
2039 pEntry->OneSecTxNoRetryOkCount++;
2040 /* update NoDataIdleCount when sucessful send packet to STA. */
2041 pEntry->NoDataIdleCount = 0;
2042 pEntry->ContinueTxFailCnt = 0;
2045 succMCS = StaFifo.field.SuccessRate & 0x7F;
2047 reTry = pid - succMCS;
2049 if (StaFifo.field.TxSuccess) {
2050 pEntry->TXMCSExpected[pid]++;
2051 if (pid == succMCS) {
2052 pEntry->TXMCSSuccessful[pid]++;
2054 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2057 pEntry->TXMCSFailed[pid]++;
2061 if ((pid >= 12) && succMCS <= 7) {
2064 pEntry->OneSecTxRetryOkCount += reTry;
2068 /* ASIC store 16 stack */
2069 } while (i < (2 * TX_RING_SIZE));
2074 ========================================================================
2076 Routine Description:
2077 Read statistical counters from hardware registers and record them
2078 in software variables for later on query
2081 pAd Pointer to our adapter
2086 IRQL = DISPATCH_LEVEL
2088 ========================================================================
2090 void NICUpdateRawCounters(struct rt_rtmp_adapter *pAd)
2092 u32 OldValue; /*, Value2; */
2093 /*unsigned long PageSum, OneSecTransmitCount; */
2094 /*unsigned long TxErrorRatio, Retry, Fail; */
2095 RX_STA_CNT0_STRUC RxStaCnt0;
2096 RX_STA_CNT1_STRUC RxStaCnt1;
2097 RX_STA_CNT2_STRUC RxStaCnt2;
2098 TX_STA_CNT0_STRUC TxStaCnt0;
2099 TX_STA_CNT1_STRUC StaTx1;
2100 TX_STA_CNT2_STRUC StaTx2;
2101 TX_AGG_CNT_STRUC TxAggCnt;
2102 TX_AGG_CNT0_STRUC TxAggCnt0;
2103 TX_AGG_CNT1_STRUC TxAggCnt1;
2104 TX_AGG_CNT2_STRUC TxAggCnt2;
2105 TX_AGG_CNT3_STRUC TxAggCnt3;
2106 TX_AGG_CNT4_STRUC TxAggCnt4;
2107 TX_AGG_CNT5_STRUC TxAggCnt5;
2108 TX_AGG_CNT6_STRUC TxAggCnt6;
2109 TX_AGG_CNT7_STRUC TxAggCnt7;
2110 struct rt_counter_ralink *pRalinkCounters;
2112 pRalinkCounters = &pAd->RalinkCounters;
2114 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2115 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2118 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2119 /* Update RX PLCP error counter */
2120 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2121 /* Update False CCA counter */
2122 pAd->RalinkCounters.OneSecFalseCCACnt +=
2123 RxStaCnt1.field.FalseCca;
2126 /* Update FCS counters */
2127 OldValue = pAd->WlanCounters.FCSErrorCount.u.LowPart;
2128 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); /* >> 7); */
2129 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2130 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2132 /* Add FCS error count to private counters */
2133 pRalinkCounters->OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2134 OldValue = pRalinkCounters->RealFcsErrCount.u.LowPart;
2135 pRalinkCounters->RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2136 if (pRalinkCounters->RealFcsErrCount.u.LowPart < OldValue)
2137 pRalinkCounters->RealFcsErrCount.u.HighPart++;
2139 /* Update Duplicate Rcv check */
2140 pRalinkCounters->DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2141 pAd->WlanCounters.FrameDuplicateCount.u.LowPart +=
2142 RxStaCnt2.field.RxDupliCount;
2143 /* Update RX Overflow counter */
2144 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2146 /*pAd->RalinkCounters.RxCount = 0; */
2148 if (pRalinkCounters->RxCount != pAd->watchDogRxCnt) {
2149 pAd->watchDogRxCnt = pRalinkCounters->RxCount;
2150 pAd->watchDogRxOverFlowCnt = 0;
2152 if (RxStaCnt2.field.RxFifoOverflowCount)
2153 pAd->watchDogRxOverFlowCnt++;
2155 pAd->watchDogRxOverFlowCnt = 0;
2157 #endif /* RTMP_MAC_USB // */
2159 /*if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) || */
2160 /* (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1))) */
2161 if (!pAd->bUpdateBcnCntDone) {
2162 /* Update BEACON sent count */
2163 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2164 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2165 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2166 pRalinkCounters->OneSecBeaconSentCnt +=
2167 TxStaCnt0.field.TxBeaconCount;
2168 pRalinkCounters->OneSecTxRetryOkCount +=
2169 StaTx1.field.TxRetransmit;
2170 pRalinkCounters->OneSecTxNoRetryOkCount +=
2171 StaTx1.field.TxSuccess;
2172 pRalinkCounters->OneSecTxFailCount +=
2173 TxStaCnt0.field.TxFailCount;
2174 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart +=
2175 StaTx1.field.TxSuccess;
2176 pAd->WlanCounters.RetryCount.u.LowPart +=
2177 StaTx1.field.TxRetransmit;
2178 pAd->WlanCounters.FailedCount.u.LowPart +=
2179 TxStaCnt0.field.TxFailCount;
2182 /*if (pAd->bStaFifoTest == TRUE) */
2184 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2185 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2186 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2187 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2188 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2189 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2190 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2191 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2192 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2193 pRalinkCounters->TxAggCount += TxAggCnt.field.AggTxCount;
2194 pRalinkCounters->TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2195 pRalinkCounters->TxAgg1MPDUCount +=
2196 TxAggCnt0.field.AggSize1Count;
2197 pRalinkCounters->TxAgg2MPDUCount +=
2198 TxAggCnt0.field.AggSize2Count;
2200 pRalinkCounters->TxAgg3MPDUCount +=
2201 TxAggCnt1.field.AggSize3Count;
2202 pRalinkCounters->TxAgg4MPDUCount +=
2203 TxAggCnt1.field.AggSize4Count;
2204 pRalinkCounters->TxAgg5MPDUCount +=
2205 TxAggCnt2.field.AggSize5Count;
2206 pRalinkCounters->TxAgg6MPDUCount +=
2207 TxAggCnt2.field.AggSize6Count;
2209 pRalinkCounters->TxAgg7MPDUCount +=
2210 TxAggCnt3.field.AggSize7Count;
2211 pRalinkCounters->TxAgg8MPDUCount +=
2212 TxAggCnt3.field.AggSize8Count;
2213 pRalinkCounters->TxAgg9MPDUCount +=
2214 TxAggCnt4.field.AggSize9Count;
2215 pRalinkCounters->TxAgg10MPDUCount +=
2216 TxAggCnt4.field.AggSize10Count;
2218 pRalinkCounters->TxAgg11MPDUCount +=
2219 TxAggCnt5.field.AggSize11Count;
2220 pRalinkCounters->TxAgg12MPDUCount +=
2221 TxAggCnt5.field.AggSize12Count;
2222 pRalinkCounters->TxAgg13MPDUCount +=
2223 TxAggCnt6.field.AggSize13Count;
2224 pRalinkCounters->TxAgg14MPDUCount +=
2225 TxAggCnt6.field.AggSize14Count;
2227 pRalinkCounters->TxAgg15MPDUCount +=
2228 TxAggCnt7.field.AggSize15Count;
2229 pRalinkCounters->TxAgg16MPDUCount +=
2230 TxAggCnt7.field.AggSize16Count;
2232 /* Calculate the transmitted A-MPDU count */
2233 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2234 TxAggCnt0.field.AggSize1Count;
2235 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2236 (TxAggCnt0.field.AggSize2Count / 2);
2238 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2239 (TxAggCnt1.field.AggSize3Count / 3);
2240 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2241 (TxAggCnt1.field.AggSize4Count / 4);
2243 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2244 (TxAggCnt2.field.AggSize5Count / 5);
2245 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2246 (TxAggCnt2.field.AggSize6Count / 6);
2248 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2249 (TxAggCnt3.field.AggSize7Count / 7);
2250 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2251 (TxAggCnt3.field.AggSize8Count / 8);
2253 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2254 (TxAggCnt4.field.AggSize9Count / 9);
2255 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2256 (TxAggCnt4.field.AggSize10Count / 10);
2258 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2259 (TxAggCnt5.field.AggSize11Count / 11);
2260 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2261 (TxAggCnt5.field.AggSize12Count / 12);
2263 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2264 (TxAggCnt6.field.AggSize13Count / 13);
2265 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2266 (TxAggCnt6.field.AggSize14Count / 14);
2268 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2269 (TxAggCnt7.field.AggSize15Count / 15);
2270 pRalinkCounters->TransmittedAMPDUCount.u.LowPart +=
2271 (TxAggCnt7.field.AggSize16Count / 16);
2277 ========================================================================
2279 Routine Description:
2280 Reset NIC from error
2283 Adapter Pointer to our adapter
2288 IRQL = PASSIVE_LEVEL
2291 Reset NIC from error state
2293 ========================================================================
2295 void NICResetFromError(struct rt_rtmp_adapter *pAd)
2297 /* Reset BBP (according to alex, reset ASIC will force reset BBP */
2298 /* Therefore, skip the reset BBP */
2299 /* RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2); */
2301 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2302 /* Remove ASIC from reset state */
2303 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2305 NICInitializeAdapter(pAd, FALSE);
2306 NICInitAsicFromEEPROM(pAd);
2308 /* Switch to current channel, since during reset process, the connection should remains on. */
2309 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2310 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2313 int NICLoadFirmware(struct rt_rtmp_adapter *pAd)
2315 int status = NDIS_STATUS_SUCCESS;
2316 if (pAd->chipOps.loadFirmware)
2317 status = pAd->chipOps.loadFirmware(pAd);
2323 ========================================================================
2325 Routine Description:
2326 erase 8051 firmware image in MAC ASIC
2329 Adapter Pointer to our adapter
2331 IRQL = PASSIVE_LEVEL
2333 ========================================================================
2335 void NICEraseFirmware(struct rt_rtmp_adapter *pAd)
2337 if (pAd->chipOps.eraseFirmware)
2338 pAd->chipOps.eraseFirmware(pAd);
2340 } /* End of NICEraseFirmware */
2343 ========================================================================
2345 Routine Description:
2346 Load Tx rate switching parameters
2349 Adapter Pointer to our adapter
2352 NDIS_STATUS_SUCCESS firmware image load ok
2353 NDIS_STATUS_FAILURE image not found
2355 IRQL = PASSIVE_LEVEL
2358 1. (B0: Valid Item number) (B1:Initial item from zero)
2359 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
2361 ========================================================================
2363 int NICLoadRateSwitchingParams(struct rt_rtmp_adapter *pAd)
2365 return NDIS_STATUS_SUCCESS;
2369 ========================================================================
2371 Routine Description:
2372 Compare two memory block
2375 pSrc1 Pointer to first memory address
2376 pSrc2 Pointer to second memory address
2380 1: pSrc1 memory is larger
2381 2: pSrc2 memory is larger
2383 IRQL = DISPATCH_LEVEL
2387 ========================================================================
2389 unsigned long RTMPCompareMemory(void *pSrc1, void *pSrc2, unsigned long Length)
2393 unsigned long Index = 0;
2395 pMem1 = (u8 *)pSrc1;
2396 pMem2 = (u8 *)pSrc2;
2398 for (Index = 0; Index < Length; Index++) {
2399 if (pMem1[Index] > pMem2[Index])
2401 else if (pMem1[Index] < pMem2[Index])
2410 ========================================================================
2412 Routine Description:
2413 Zero out memory block
2416 pSrc1 Pointer to memory address
2422 IRQL = PASSIVE_LEVEL
2423 IRQL = DISPATCH_LEVEL
2427 ========================================================================
2429 void RTMPZeroMemory(void *pSrc, unsigned long Length)
2432 unsigned long Index = 0;
2436 for (Index = 0; Index < Length; Index++) {
2442 ========================================================================
2444 Routine Description:
2445 Copy data from memory block 1 to memory block 2
2448 pDest Pointer to destination memory address
2449 pSrc Pointer to source memory address
2455 IRQL = PASSIVE_LEVEL
2456 IRQL = DISPATCH_LEVEL
2460 ========================================================================
2462 void RTMPMoveMemory(void *pDest, void *pSrc, unsigned long Length)
2468 ASSERT((Length == 0) || (pDest && pSrc));
2470 pMem1 = (u8 *)pDest;
2473 for (Index = 0; Index < Length; Index++) {
2474 pMem1[Index] = pMem2[Index];
2479 ========================================================================
2481 Routine Description:
2482 Initialize port configuration structure
2485 Adapter Pointer to our adapter
2490 IRQL = PASSIVE_LEVEL
2494 ========================================================================
2496 void UserCfgInit(struct rt_rtmp_adapter *pAd)
2498 u32 key_index, bss_index;
2500 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2503 /* part I. initialize common configuration */
2506 pAd->BulkOutReq = 0;
2508 pAd->BulkOutComplete = 0;
2509 pAd->BulkOutCompleteOther = 0;
2510 pAd->BulkOutCompleteCancel = 0;
2512 pAd->BulkInComplete = 0;
2513 pAd->BulkInCompleteFail = 0;
2515 /*pAd->QuickTimerP = 100; */
2516 /*pAd->TurnAggrBulkInCount = 0; */
2517 pAd->bUsbTxBulkAggre = 0;
2519 /* init as unsed value to ensure driver will set to MCU once. */
2520 pAd->LedIndicatorStrength = 0xFF;
2522 pAd->CommonCfg.MaxPktOneTxBulk = 2;
2523 pAd->CommonCfg.TxBulkFactor = 1;
2524 pAd->CommonCfg.RxBulkFactor = 1;
2526 pAd->CommonCfg.TxPower = 100; /*mW */
2528 NdisZeroMemory(&pAd->CommonCfg.IOTestParm,
2529 sizeof(pAd->CommonCfg.IOTestParm));
2530 #endif /* RTMP_MAC_USB // */
2532 for (key_index = 0; key_index < SHARE_KEY_NUM; key_index++) {
2533 for (bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++) {
2534 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2535 pAd->SharedKey[bss_index][key_index].CipherAlg =
2540 pAd->EepromAccess = FALSE;
2542 pAd->Antenna.word = 0;
2543 pAd->CommonCfg.BBPCurrentBW = BW_20;
2545 pAd->LedCntl.word = 0;
2547 pAd->LedIndicatorStrength = 0;
2548 pAd->RLnkCtrlOffset = 0;
2549 pAd->HostLnkCtrlOffset = 0;
2550 pAd->StaCfg.PSControl.field.EnableNewPS = TRUE;
2551 pAd->CheckDmaBusyCount = 0;
2552 #endif /* RTMP_MAC_PCI // */
2554 pAd->bAutoTxAgcA = FALSE; /* Default is OFF */
2555 pAd->bAutoTxAgcG = FALSE; /* Default is OFF */
2556 pAd->RfIcType = RFIC_2820;
2558 /* Init timer for reset complete event */
2559 pAd->CommonCfg.CentralChannel = 1;
2560 pAd->bForcePrintTX = FALSE;
2561 pAd->bForcePrintRX = FALSE;
2562 pAd->bStaFifoTest = FALSE;
2563 pAd->bProtectionTest = FALSE;
2564 pAd->CommonCfg.Dsifs = 10; /* in units of usec */
2565 pAd->CommonCfg.TxPower = 100; /*mW */
2566 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; /* AUTO */
2567 pAd->CommonCfg.TxPowerDefault = 0xffffffff; /* AUTO */
2568 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; /* use Long preamble on TX by defaut */
2569 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2570 pAd->CommonCfg.RtsThreshold = 2347;
2571 pAd->CommonCfg.FragmentThreshold = 2346;
2572 pAd->CommonCfg.UseBGProtection = 0; /* 0: AUTO */
2573 pAd->CommonCfg.bEnableTxBurst = TRUE; /*0; */
2574 pAd->CommonCfg.PhyMode = 0xff; /* unknown */
2575 pAd->CommonCfg.BandState = UNKNOWN_BAND;
2576 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2577 pAd->CommonCfg.RadarDetect.CSCount = 0;
2578 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2580 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2581 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2582 pAd->CommonCfg.bAPSDCapable = FALSE;
2583 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2584 pAd->CommonCfg.TriggerTimerCount = 0;
2585 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2586 pAd->CommonCfg.bCountryFlag = FALSE;
2587 pAd->CommonCfg.TxStream = 0;
2588 pAd->CommonCfg.RxStream = 0;
2590 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2592 NdisZeroMemory(&pAd->CommonCfg.HtCapability,
2593 sizeof(pAd->CommonCfg.HtCapability));
2594 pAd->HTCEnable = FALSE;
2595 pAd->bBroadComHT = FALSE;
2596 pAd->CommonCfg.bRdg = FALSE;
2598 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo,
2599 sizeof(pAd->CommonCfg.AddHTInfo));
2600 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2601 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2602 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2603 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; /*32; */
2604 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; /*32; */
2605 DBGPRINT(RT_DEBUG_TRACE,
2606 ("--> UserCfgInit. BACapability = 0x%x\n",
2607 pAd->CommonCfg.BACapability.word));
2609 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2610 BATableInit(pAd, &pAd->BATable);
2612 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2613 pAd->CommonCfg.bHTProtect = 1;
2614 pAd->CommonCfg.bMIMOPSEnable = TRUE;
2615 /*2008/11/05:KH add to support Antenna power-saving of AP<-- */
2616 pAd->CommonCfg.bGreenAPEnable = FALSE;
2617 /*2008/11/05:KH add to support Antenna power-saving of AP--> */
2618 pAd->CommonCfg.bBADecline = FALSE;
2619 pAd->CommonCfg.bDisableReordering = FALSE;
2621 if (pAd->MACVersion == 0x28720200) {
2622 pAd->CommonCfg.TxBASize = 13; /*by Jerry recommend */
2624 pAd->CommonCfg.TxBASize = 7;
2627 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2629 /*pAd->CommonCfg.HTPhyMode.field.BW = BW_20; */
2630 /*pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO; */
2631 /*pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800; */
2632 /*pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE; */
2633 pAd->CommonCfg.TxRate = RATE_6;
2635 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2636 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2637 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2639 pAd->CommonCfg.BeaconPeriod = 100; /* in mSec */
2642 /* part II. initialize STA specific configuration */
2645 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2646 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2647 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2648 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2650 pAd->StaCfg.Psm = PWR_ACTIVE;
2652 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2653 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2654 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
2655 pAd->StaCfg.bMixCipher = FALSE;
2656 pAd->StaCfg.DefaultKeyId = 0;
2658 /* 802.1x port control */
2659 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
2660 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2661 pAd->StaCfg.LastMicErrorTime = 0;
2662 pAd->StaCfg.MicErrCnt = 0;
2663 pAd->StaCfg.bBlockAssoc = FALSE;
2664 pAd->StaCfg.WpaState = SS_NOTUSE;
2666 pAd->CommonCfg.NdisRadioStateOff = FALSE; /* New to support microsoft disable radio with OID command */
2668 pAd->StaCfg.RssiTrigger = 0;
2669 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(struct rt_rssi_sample));
2670 pAd->StaCfg.RssiTriggerMode =
2671 RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
2672 pAd->StaCfg.AtimWin = 0;
2673 pAd->StaCfg.DefaultListenCount = 3; /*default listen count; */
2674 pAd->StaCfg.BssType = BSS_INFRA; /* BSS_INFRA or BSS_ADHOC or BSS_MONITOR */
2675 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
2676 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
2677 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
2679 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
2680 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
2683 #ifdef PCIE_PS_SUPPORT
2684 pAd->brt30xxBanMcuCmd = FALSE;
2685 pAd->b3090ESpecialChip = FALSE;
2686 /*KH Debug:the following must be removed */
2687 pAd->StaCfg.PSControl.field.rt30xxPowerMode = 3;
2688 pAd->StaCfg.PSControl.field.rt30xxForceASPMTest = 0;
2689 pAd->StaCfg.PSControl.field.rt30xxFollowHostASPM = 1;
2690 #endif /* PCIE_PS_SUPPORT // */
2692 /* global variables mXXXX used in MAC protocol state machines */
2693 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
2694 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
2695 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
2697 /* PHY specification */
2698 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; /* default PHY mode */
2699 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); /* CCK use long preamble */
2702 /* user desired power mode */
2703 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
2704 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
2705 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
2707 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer,
2708 GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec),
2710 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
2712 /* Patch for Ndtest */
2713 pAd->StaCfg.ScanCnt = 0;
2715 pAd->StaCfg.bHwRadio = TRUE; /* Default Hardware Radio status is On */
2716 pAd->StaCfg.bSwRadio = TRUE; /* Default Software Radio status is On */
2717 pAd->StaCfg.bRadio = TRUE; /* bHwRadio && bSwRadio */
2718 pAd->StaCfg.bHardwareRadio = FALSE; /* Default is OFF */
2719 pAd->StaCfg.bShowHiddenSSID = FALSE; /* Default no show */
2721 /* Nitro mode control */
2722 pAd->StaCfg.bAutoReconnect = TRUE;
2724 /* Save the init time as last scan time, the system should do scan after 2 seconds. */
2725 /* This patch is for driver wake up from standby mode, system will do scan right away. */
2726 NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
2727 if (pAd->StaCfg.LastScanTime > 10 * OS_HZ)
2728 pAd->StaCfg.LastScanTime -= (10 * OS_HZ);
2730 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE + 1);
2732 sprintf((char *)pAd->nickname, "RT2860STA");
2733 #endif /* RTMP_MAC_PCI // */
2735 sprintf((char *)pAd->nickname, "RT2870STA");
2736 #endif /* RTMP_MAC_USB // */
2737 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer,
2738 GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc),
2740 pAd->StaCfg.IEEE8021X = FALSE;
2741 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
2742 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
2743 pAd->StaCfg.bRSN_IE_FromWpaSupplicant = FALSE;
2744 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
2746 NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);
2748 pAd->StaCfg.bAutoConnectByBssid = FALSE;
2749 pAd->StaCfg.BeaconLostTime = BEACON_LOST_TIME;
2750 NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
2751 pAd->StaCfg.WpaPassPhraseLen = 0;
2752 pAd->StaCfg.bAutoRoaming = FALSE;
2753 pAd->StaCfg.bForceTxBurst = FALSE;
2756 /* Default for extra information is not valid */
2757 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
2759 /* Default Config change flag */
2760 pAd->bConfigChanged = FALSE;
2763 /* part III. AP configurations */
2767 /* part IV. others */
2769 /* dynamic BBP R66:sensibity tuning to overcome background noise */
2770 pAd->BbpTuning.bEnable = TRUE;
2771 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
2772 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
2773 pAd->BbpTuning.R66Delta = 4;
2774 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
2777 /* Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value. */
2778 /* if not initial this value, the default value will be 0. */
2780 pAd->BbpTuning.R66CurrentValue = 0x38;
2782 pAd->Bbp94 = BBPR94_DEFAULT;
2783 pAd->BbpForCCK = FALSE;
2785 /* Default is FALSE for test bit 1 */
2786 /*pAd->bTest1 = FALSE; */
2788 /* initialize MAC table and allocate spin lock */
2789 NdisZeroMemory(&pAd->MacTab, sizeof(struct rt_mac_table));
2790 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
2791 NdisAllocateSpinLock(&pAd->MacTabLock);
2793 /*RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE); */
2794 /*RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV); */
2796 pAd->CommonCfg.bWiFiTest = FALSE;
2798 pAd->bPCIclkOff = FALSE;
2799 #endif /* RTMP_MAC_PCI // */
2801 RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
2802 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
2805 /* IRQL = PASSIVE_LEVEL */
2807 /* FUNCTION: AtoH(char *, u8 *, int) */
2809 /* PURPOSE: Converts ascii string to network order hex */
2812 /* src - pointer to input ascii string */
2813 /* dest - pointer to output hex */
2814 /* destlen - size of dest */
2818 /* 2 ascii bytes make a hex byte so must put 1st ascii byte of pair */
2819 /* into upper nibble and 2nd ascii byte of pair into lower nibble. */
2821 /* IRQL = PASSIVE_LEVEL */
2823 void AtoH(char *src, u8 *dest, int destlen)
2829 destTemp = (u8 *)dest;
2832 *destTemp = hex_to_bin(*srcptr++) << 4; /* Put 1st ascii byte in upper nibble. */
2833 *destTemp += hex_to_bin(*srcptr++); /* Add 2nd ascii byte to above. */
2838 /*+++Mark by shiang, not use now, need to remove after confirm */
2839 /*---Mark by shiang, not use now, need to remove after confirm */
2842 ========================================================================
2844 Routine Description:
2848 pAd Pointer to our adapter
2849 pTimer Timer structure
2850 pTimerFunc Function to execute when timer expired
2851 Repeat Ture for period timer
2858 ========================================================================
2860 void RTMPInitTimer(struct rt_rtmp_adapter *pAd,
2861 struct rt_ralink_timer *pTimer,
2862 void *pTimerFunc, void *pData, IN BOOLEAN Repeat)
2865 /* Set Valid to TRUE for later used. */
2866 /* It will crash if we cancel a timer or set a timer */
2867 /* that we haven't initialize before. */
2869 pTimer->Valid = TRUE;
2871 pTimer->PeriodicType = Repeat;
2872 pTimer->State = FALSE;
2873 pTimer->cookie = (unsigned long)pData;
2875 #ifdef RTMP_TIMER_TASK_SUPPORT
2877 #endif /* RTMP_TIMER_TASK_SUPPORT // */
2879 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (void *)pTimer);
2883 ========================================================================
2885 Routine Description:
2889 pTimer Timer structure
2890 Value Timer value in milliseconds
2896 To use this routine, must call RTMPInitTimer before.
2898 ========================================================================
2900 void RTMPSetTimer(struct rt_ralink_timer *pTimer, unsigned long Value)
2902 if (pTimer->Valid) {
2903 pTimer->TimerValue = Value;
2904 pTimer->State = FALSE;
2905 if (pTimer->PeriodicType == TRUE) {
2906 pTimer->Repeat = TRUE;
2907 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
2909 pTimer->Repeat = FALSE;
2910 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
2913 DBGPRINT_ERR("RTMPSetTimer failed, Timer hasn't been initialize!\n");
2918 ========================================================================
2920 Routine Description:
2924 pTimer Timer structure
2925 Value Timer value in milliseconds
2931 To use this routine, must call RTMPInitTimer before.
2933 ========================================================================
2935 void RTMPModTimer(struct rt_ralink_timer *pTimer, unsigned long Value)
2939 if (pTimer->Valid) {
2940 pTimer->TimerValue = Value;
2941 pTimer->State = FALSE;
2942 if (pTimer->PeriodicType == TRUE) {
2943 RTMPCancelTimer(pTimer, &Cancel);
2944 RTMPSetTimer(pTimer, Value);
2946 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
2949 DBGPRINT_ERR("RTMPModTimer failed, Timer hasn't been initialize!\n");
2954 ========================================================================
2956 Routine Description:
2957 Cancel timer objects
2960 Adapter Pointer to our adapter
2965 IRQL = PASSIVE_LEVEL
2966 IRQL = DISPATCH_LEVEL
2969 1.) To use this routine, must call RTMPInitTimer before.
2970 2.) Reset NIC to initial state AS IS system boot up time.
2972 ========================================================================
2974 void RTMPCancelTimer(struct rt_ralink_timer *pTimer, OUT BOOLEAN * pCancelled)
2976 if (pTimer->Valid) {
2977 if (pTimer->State == FALSE)
2978 pTimer->Repeat = FALSE;
2980 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
2982 if (*pCancelled == TRUE)
2983 pTimer->State = TRUE;
2985 #ifdef RTMP_TIMER_TASK_SUPPORT
2986 /* We need to go-through the TimerQ to findout this timer handler and remove it if */
2987 /* it's still waiting for execution. */
2988 RtmpTimerQRemove(pTimer->pAd, pTimer);
2989 #endif /* RTMP_TIMER_TASK_SUPPORT // */
2991 DBGPRINT_ERR("RTMPCancelTimer failed, Timer hasn't been initialize!\n");
2996 ========================================================================
2998 Routine Description:
3002 pAd Pointer to our adapter
3008 IRQL = PASSIVE_LEVEL
3009 IRQL = DISPATCH_LEVEL
3013 ========================================================================
3015 void RTMPSetLED(struct rt_rtmp_adapter *pAd, u8 Status)
3017 /*unsigned long data; */
3021 LowByte = pAd->LedCntl.field.LedMode & 0x7f;
3025 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3026 pAd->LedIndicatorStrength = 0;
3029 if (pAd->CommonCfg.Channel > 14)
3033 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3037 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3040 LowByte = 0; /* Driver sets MAC register and MAC controls LED */
3043 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3047 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3049 case LED_ON_SITE_SURVEY:
3051 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3055 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3058 DBGPRINT(RT_DEBUG_WARN,
3059 ("RTMPSetLED::Unknown Status %d\n", Status));
3064 /* Keep LED status for LED SiteSurvey mode. */
3065 /* After SiteSurvey, we will set the LED mode to previous status. */
3067 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3068 pAd->LedStatus = Status;
3070 DBGPRINT(RT_DEBUG_TRACE,
3071 ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n",
3072 pAd->LedCntl.field.LedMode, HighByte, LowByte));
3076 ========================================================================
3078 Routine Description:
3079 Set LED Signal Stregth
3082 pAd Pointer to our adapter
3088 IRQL = PASSIVE_LEVEL
3091 Can be run on any IRQL level.
3093 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3100 ========================================================================
3102 void RTMPSetSignalLED(struct rt_rtmp_adapter *pAd, IN NDIS_802_11_RSSI Dbm)
3106 if (pAd->LedCntl.field.LedMode == LED_MODE_SIGNAL_STREGTH) {
3109 else if (Dbm <= -81)
3111 else if (Dbm <= -71)
3113 else if (Dbm <= -67)
3115 else if (Dbm <= -57)
3121 /* Update Signal Stregth to firmware if changed. */
3123 if (pAd->LedIndicatorStrength != nLed) {
3124 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed,
3125 pAd->LedCntl.field.Polarity);
3126 pAd->LedIndicatorStrength = nLed;
3132 ========================================================================
3134 Routine Description:
3138 pAd Pointer to our adapter
3143 IRQL <= DISPATCH_LEVEL
3146 Before Enable RX, make sure you have enabled Interrupt.
3147 ========================================================================
3149 void RTMPEnableRxTx(struct rt_rtmp_adapter *pAd)
3151 /* WPDMA_GLO_CFG_STRUC GloCfg; */
3152 /* unsigned long i = 0; */
3155 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3157 /* Enable Rx DMA. */
3158 RT28XXDMAEnable(pAd);
3160 /* enable RX of MAC block */
3161 if (pAd->OpMode == OPMODE_AP) {
3162 rx_filter_flag = APNORMAL;
3164 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); /* enable RX of DMA block */
3166 if (pAd->CommonCfg.PSPXlink)
3167 rx_filter_flag = PSPXLINK;
3169 rx_filter_flag = STANORMAL; /* Staion not drop control frame will fail WiFi Certification. */
3170 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);
3173 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3174 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3177 /*+++Add by shiang, move from os/linux/rt_main_dev.c */
3178 void CfgInitHook(struct rt_rtmp_adapter *pAd)
3180 pAd->bBroadComHT = TRUE;
3183 int rt28xx_init(struct rt_rtmp_adapter *pAd,
3184 char *pDefaultMac, char *pHostName)
3193 /* If dirver doesn't wake up firmware here, */
3194 /* NICLoadFirmware will hang forever when interface is up again. */
3196 if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
3197 OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE)) {
3198 AUTO_WAKEUP_STRUC AutoWakeupCfg;
3199 AsicForceWakeup(pAd, TRUE);
3200 AutoWakeupCfg.word = 0;
3201 RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG,
3202 AutoWakeupCfg.word);
3203 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3206 #endif /* RTMP_MAC_PCI // */
3208 /* reset Adapter flags */
3209 RTMP_CLEAR_FLAGS(pAd);
3211 /* Init BssTab & ChannelInfo tabbles for auto channel select. */
3213 /* Allocate BA Reordering memory */
3214 ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM);
3216 /* Make sure MAC gets ready. */
3219 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
3220 pAd->MACVersion = MacCsr0;
3222 if ((pAd->MACVersion != 0x00)
3223 && (pAd->MACVersion != 0xFFFFFFFF))
3227 } while (index++ < 100);
3228 DBGPRINT(RT_DEBUG_TRACE,
3229 ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
3232 #ifdef PCIE_PS_SUPPORT
3233 /*Iverson patch PCIE L1 issue to make sure that driver can be read,write ,BBP and RF register at pcie L.1 level */
3234 if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
3235 && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE)) {
3236 RTMP_IO_READ32(pAd, AUX_CTRL, &MacCsr0);
3238 RTMP_IO_WRITE32(pAd, AUX_CTRL, MacCsr0);
3239 DBGPRINT(RT_DEBUG_TRACE, ("AUX_CTRL = 0x%x\n", MacCsr0));
3241 #endif /* PCIE_PS_SUPPORT // */
3243 /* To fix driver disable/enable hang issue when radio off */
3244 RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2);
3245 #endif /* RTMP_MAC_PCI // */
3248 RT28XXDMADisable(pAd);
3250 /* Load 8051 firmware */
3251 Status = NICLoadFirmware(pAd);
3252 if (Status != NDIS_STATUS_SUCCESS) {
3253 DBGPRINT_ERR("NICLoadFirmware failed, Status[=0x%08x]\n", Status);
3257 NICLoadRateSwitchingParams(pAd);
3259 /* Disable interrupts here which is as soon as possible */
3260 /* This statement should never be true. We might consider to remove it later */
3262 if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE)) {
3263 RTMP_ASIC_INTERRUPT_DISABLE(pAd);
3265 #endif /* RTMP_MAC_PCI // */
3267 Status = RTMPAllocTxRxRingMemory(pAd);
3268 if (Status != NDIS_STATUS_SUCCESS) {
3269 DBGPRINT_ERR("RTMPAllocDMAMemory failed, Status[=0x%08x]\n", Status);
3273 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3275 /* initialize MLME */
3278 Status = RtmpMgmtTaskInit(pAd);
3279 if (Status != NDIS_STATUS_SUCCESS)
3282 Status = MlmeInit(pAd);
3283 if (Status != NDIS_STATUS_SUCCESS) {
3284 DBGPRINT_ERR("MlmeInit failed, Status[=0x%08x]\n", Status);
3287 /* Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default */
3290 Status = RtmpNetTaskInit(pAd);
3291 if (Status != NDIS_STATUS_SUCCESS)
3294 /* COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr); */
3295 /* pAd->bForcePrintTX = TRUE; */
3299 NdisAllocateSpinLock(&pAd->MacTabLock);
3301 MeasureReqTabInit(pAd);
3305 /* Init the hardware, we need to init asic before read registry, otherwise mac register will be reset */
3307 Status = NICInitializeAdapter(pAd, TRUE);
3308 if (Status != NDIS_STATUS_SUCCESS) {
3309 DBGPRINT_ERR("NICInitializeAdapter failed, Status[=0x%08x]\n", Status);
3310 if (Status != NDIS_STATUS_SUCCESS)
3314 DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3317 pAd->CommonCfg.bMultipleIRP = FALSE;
3319 if (pAd->CommonCfg.bMultipleIRP)
3320 pAd->CommonCfg.NumOfBulkInIRP = RX_RING_SIZE;
3322 pAd->CommonCfg.NumOfBulkInIRP = 1;
3323 #endif /* RTMP_MAC_USB // */
3325 /*Init Ba Capability parameters. */
3326 /* RT28XX_BA_INIT(pAd); */
3327 pAd->CommonCfg.DesiredHtPhy.MpduDensity =
3328 (u8)pAd->CommonCfg.BACapability.field.MpduDensity;
3329 pAd->CommonCfg.DesiredHtPhy.AmsduEnable =
3330 (u16)pAd->CommonCfg.BACapability.field.AmsduEnable;
3331 pAd->CommonCfg.DesiredHtPhy.AmsduSize =
3332 (u16)pAd->CommonCfg.BACapability.field.AmsduSize;
3333 pAd->CommonCfg.DesiredHtPhy.MimoPs =
3334 (u16)pAd->CommonCfg.BACapability.field.MMPSmode;
3335 /* UPdata to HT IE */
3336 pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs =
3337 (u16)pAd->CommonCfg.BACapability.field.MMPSmode;
3338 pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize =
3339 (u16)pAd->CommonCfg.BACapability.field.AmsduSize;
3340 pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity =
3341 (u8)pAd->CommonCfg.BACapability.field.MpduDensity;
3343 /* after reading Registry, we now know if in AP mode or STA mode */
3345 /* Load 8051 firmware; crash when FW image not existent */
3346 /* Status = NICLoadFirmware(pAd); */
3347 /* if (Status != NDIS_STATUS_SUCCESS) */
3350 DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3352 /* We should read EEPROM for all cases. rt2860b */
3353 NICReadEEPROMParameters(pAd, (u8 *)pDefaultMac);
3355 DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3357 NICInitAsicFromEEPROM(pAd); /*rt2860b */
3359 /* Set PHY to appropriate mode */
3360 TmpPhy = pAd->CommonCfg.PhyMode;
3361 pAd->CommonCfg.PhyMode = 0xff;
3362 RTMPSetPhyMode(pAd, TmpPhy);
3365 /* No valid channels. */
3366 if (pAd->ChannelListNum == 0) {
3367 DBGPRINT(RT_DEBUG_ERROR,
3368 ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
3372 DBGPRINT(RT_DEBUG_OFF,
3373 ("MCS Set = %02x %02x %02x %02x %02x\n",
3374 pAd->CommonCfg.HtCapability.MCSSet[0],
3375 pAd->CommonCfg.HtCapability.MCSSet[1],
3376 pAd->CommonCfg.HtCapability.MCSSet[2],
3377 pAd->CommonCfg.HtCapability.MCSSet[3],
3378 pAd->CommonCfg.HtCapability.MCSSet[4]));
3380 #ifdef RTMP_RF_RW_SUPPORT
3381 /*Init RT30xx RFRegisters after read RFIC type from EEPROM */
3382 NICInitRFRegisters(pAd);
3383 #endif /* RTMP_RF_RW_SUPPORT // */
3385 /* APInitialize(pAd); */
3388 /* Initialize RF register to default value */
3390 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3391 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3393 /* 8051 firmware require the signal during booting time. */
3394 /*2008/11/28:KH marked the following codes to patch Frequency offset bug */
3395 /*AsicSendCommandToMcu(pAd, 0x72, 0xFF, 0x00, 0x00); */
3397 if (pAd && (Status != NDIS_STATUS_SUCCESS)) {
3399 /* Undo everything if it failed */
3401 if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) {
3402 /* NdisMDeregisterInterrupt(&pAd->Interrupt); */
3403 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3405 /* RTMPFreeAdapter(pAd); // we will free it in disconnect() */
3407 /* Microsoft HCT require driver send a disconnect event after driver initialization. */
3408 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
3409 /* pAd->IndicateMediaState = NdisMediaStateDisconnected; */
3410 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
3412 DBGPRINT(RT_DEBUG_TRACE,
3413 ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
3416 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
3417 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
3420 /* Support multiple BulkIn IRP, */
3421 /* the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1. */
3423 for (index = 0; index < pAd->CommonCfg.NumOfBulkInIRP; index++) {
3424 RTUSBBulkReceive(pAd);
3425 DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n"));
3427 #endif /* RTMP_MAC_USB // */
3430 /* Set up the Mac address */
3431 RtmpOSNetDevAddrSet(pAd->net_dev, &pAd->CurrentAddress[0]);
3433 DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
3441 RTMPFreeTxRxRingMemory(pAd);
3444 os_free_mem(pAd, pAd->mpdu_blk_pool.mem); /* free BA pool */
3446 /* shall not set priv to NULL here because the priv didn't been free yet. */
3447 /*net_dev->ml_priv = 0; */
3452 DBGPRINT(RT_DEBUG_ERROR, ("rt28xx Initialized fail!\n"));
3456 /*---Add by shiang, move from os/linux/rt_main_dev.c */
3458 static int RtmpChipOpsRegister(struct rt_rtmp_adapter *pAd, int infType)
3460 struct rt_rtmp_chip_op *pChipOps = &pAd->chipOps;
3463 memset(pChipOps, 0, sizeof(struct rt_rtmp_chip_op));
3465 /* set eeprom related hook functions */
3466 status = RtmpChipOpsEepromHook(pAd, infType);
3468 /* set mcu related hook functions */
3470 #ifdef RTMP_PCI_SUPPORT
3471 case RTMP_DEV_INF_PCI:
3472 pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3473 pChipOps->eraseFirmware = RtmpAsicEraseFirmware;
3474 pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3476 #endif /* RTMP_PCI_SUPPORT // */
3477 #ifdef RTMP_USB_SUPPORT
3478 case RTMP_DEV_INF_USB:
3479 pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3480 pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3482 #endif /* RTMP_USB_SUPPORT // */
3490 int RtmpRaDevCtrlInit(struct rt_rtmp_adapter *pAd, IN RTMP_INF_TYPE infType)
3494 /* Assign the interface type. We need use it when do register/EEPROM access. */
3495 pAd->infType = infType;
3497 pAd->OpMode = OPMODE_STA;
3498 DBGPRINT(RT_DEBUG_TRACE,
3499 ("STA Driver version-%s\n", STA_DRIVER_VERSION));
3502 sema_init(&(pAd->UsbVendorReq_semaphore), 1);
3503 os_alloc_mem(pAd, (u8 **) & pAd->UsbVendorReqBuf,
3504 MAX_PARAM_BUFFER_SIZE - 1);
3505 if (pAd->UsbVendorReqBuf == NULL) {
3506 DBGPRINT(RT_DEBUG_ERROR,
3507 ("Allocate vendor request temp buffer failed!\n"));
3510 #endif /* RTMP_MAC_USB // */
3512 RtmpChipOpsRegister(pAd, infType);
3517 BOOLEAN RtmpRaDevCtrlExit(struct rt_rtmp_adapter *pAd)
3520 RTMPFreeAdapter(pAd);
3525 /* not yet support MBSS */
3526 struct net_device *get_netdev_from_bssid(struct rt_rtmp_adapter *pAd, u8 FromWhichBSSID)
3528 struct net_device *dev_p = NULL;
3531 dev_p = pAd->net_dev;
3535 return dev_p; /* return one of MBSS */